drivers/staging/rtl8821ae/btcoexist/halbtc8192e2ant.c

   1 /**************************************************************
   2  * Description:
   3  *
   4  * This file is for RTL8192E Co-exist mechanism
   5  *
   6  * History
   7  * 2012/11/15 Cosa first check in.
   8  *
   9  **************************************************************/
  10
  11 /**************************************************************
  12  *   include files
  13  **************************************************************/
  14 #include "halbt_precomp.h"
  15 #if 1
  16 /**************************************************************
  17  *   Global variables, these are static variables
  18  **************************************************************/
  19 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
  20 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
  21 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
  22 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
  23
  24 const char *const GLBtInfoSrc8192e2Ant[]={
  25         "BT Info[wifi fw]",
  26         "BT Info[bt rsp]",
  27         "BT Info[bt auto report]",
  28 };
  29
  30 u32 glcoex_ver_date_8192e_2ant = 20130902;
  31 u32 glcoex_ver_8192e_2ant = 0x34;
  32
  33 /**************************************************************
  34  *   local function proto type if needed
  35  **************************************************************/
  36 /**************************************************************
  37  *   local function start with halbtc8192e2ant_
  38  **************************************************************/
  39 u8 halbtc8192e2ant_btrssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
  40 {
  41         int btrssi=0;
  42         u8 btrssi_state = coex_sta->pre_bt_rssi_state;
  43
  44         btrssi = coex_sta->bt_rssi;
  45
  46         if (level_num == 2) {
  47                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  48                     (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  49                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  50                                   "BT Rssi pre state=LOW\n");
  51                         if (btrssi >= (rssi_thresh +
  52                                        BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  53                                 btrssi_state = BTC_RSSI_STATE_HIGH;
  54                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  55                                           "BT Rssi state switch to High\n");
  56                         } else {
  57                                 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
  58                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  59                                           "BT Rssi state stay at Low\n");
  60                         }
  61                 } else {
  62                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  63                                   "BT Rssi pre state=HIGH\n");
  64                         if (btrssi < rssi_thresh) {
  65                                 btrssi_state = BTC_RSSI_STATE_LOW;
  66                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  67                                           "BT Rssi state switch to Low\n");
  68                         } else {
  69                                 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
  70                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  71                                           "BT Rssi state stay at High\n");
  72                         }
  73                 }
  74         } else if (level_num == 3) {
  75                 if (rssi_thresh > rssi_thresh1) {
  76                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  77                                   "BT Rssi thresh error!!\n");
  78                         return coex_sta->pre_bt_rssi_state;
  79                 }
  80
  81                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  82                     (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  83                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  84                                   "BT Rssi pre state=LOW\n");
  85                         if(btrssi >= (rssi_thresh +
  86                                       BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  87                                 btrssi_state = BTC_RSSI_STATE_MEDIUM;
  88                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  89                                           "BT Rssi state switch to Medium\n");
  90                         } else {
  91                                 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
  92                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  93                                           "BT Rssi state stay at Low\n");
  94                         }
  95                 } else if ((coex_sta->pre_bt_rssi_state ==
  96                             BTC_RSSI_STATE_MEDIUM) ||
  97                            (coex_sta->pre_bt_rssi_state ==
  98                             BTC_RSSI_STATE_STAY_MEDIUM)) {
  99                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 100                                   "[BTCoex], BT Rssi pre state=MEDIUM\n");
 101                         if (btrssi >= (rssi_thresh1 +
 102                                        BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
 103                                 btrssi_state = BTC_RSSI_STATE_HIGH;
 104                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 105                                           "BT Rssi state switch to High\n");
 106                         } else if (btrssi < rssi_thresh) {
 107                                 btrssi_state = BTC_RSSI_STATE_LOW;
 108                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 109                                           "BT Rssi state switch to Low\n");
 110                         } else {
 111                                 btrssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 112                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 113                                           "BT Rssi state stay at Medium\n");
 114                         }
 115                 } else {
 116                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 117                                   "BT Rssi pre state=HIGH\n");
 118                         if (btrssi < rssi_thresh1) {
 119                                 btrssi_state = BTC_RSSI_STATE_MEDIUM;
 120                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 121                                           "BT Rssi state switch to Medium\n");
 122                         } else {
 123                                 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
 124                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 125                                           "BT Rssi state stay at High\n");
 126                         }
 127                 }
 128         }
 129
 130         coex_sta->pre_bt_rssi_state = btrssi_state;
 131
 132         return btrssi_state;
 133 }
 134
 135 u8 halbtc8192e2ant_wifirssi_state(struct btc_coexist * btcoexist, u8 index,
 136                                   u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
 137 {
 138         int wifirssi = 0;
 139         u8 wifirssi_state = coex_sta->pre_wifi_rssi_state[index];
 140
 141         btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
 142
 143         if (level_num == 2) {
 144                 if ((coex_sta->pre_wifi_rssi_state[index] ==
 145                      BTC_RSSI_STATE_LOW) ||
 146                     (coex_sta->pre_wifi_rssi_state[index] ==
 147                      BTC_RSSI_STATE_STAY_LOW)) {
 148                         if (wifirssi >= (rssi_thresh +
 149                                          BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
 150                                 wifirssi_state = BTC_RSSI_STATE_HIGH;
 151                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 152                                           ALGO_WIFI_RSSI_STATE,
 153                                           "wifi RSSI state switch to High\n");
 154                         } else {
 155                                 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
 156                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 157                                           ALGO_WIFI_RSSI_STATE,
 158                                           "wifi RSSI state stay at Low\n");
 159                         }
 160                 } else {
 161                         if (wifirssi < rssi_thresh) {
 162                                 wifirssi_state = BTC_RSSI_STATE_LOW;
 163                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 164                                           ALGO_WIFI_RSSI_STATE,
 165                                           "wifi RSSI state switch to Low\n");
 166                         } else {
 167                                 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
 168                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 169                                           ALGO_WIFI_RSSI_STATE,
 170                                           "wifi RSSI state stay at High\n");
 171                         }
 172                 }
 173         } else if (level_num == 3) {
 174                 if (rssi_thresh > rssi_thresh1) {
 175                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE,
 176                                   "wifi RSSI thresh error!!\n");
 177                         return coex_sta->pre_wifi_rssi_state[index];
 178                 }
 179
 180                 if ((coex_sta->pre_wifi_rssi_state[index] ==
 181                      BTC_RSSI_STATE_LOW) ||
 182                     (coex_sta->pre_wifi_rssi_state[index] ==
 183                      BTC_RSSI_STATE_STAY_LOW)) {
 184                         if (wifirssi >= (rssi_thresh +
 185                                          BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
 186                                 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
 187                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 188                                           ALGO_WIFI_RSSI_STATE,
 189                                           "wifi RSSI state switch to Medium\n");
 190                         } else {
 191                                 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
 192                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 193                                           ALGO_WIFI_RSSI_STATE,
 194                                           "wifi RSSI state stay at Low\n");
 195                         }
 196                 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
 197                             BTC_RSSI_STATE_MEDIUM) ||
 198                            (coex_sta->pre_wifi_rssi_state[index] ==
 199                             BTC_RSSI_STATE_STAY_MEDIUM)) {
 200                         if (wifirssi >= (rssi_thresh1 +
 201                                          BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
 202                                 wifirssi_state = BTC_RSSI_STATE_HIGH;
 203                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 204                                           ALGO_WIFI_RSSI_STATE,
 205                                           "wifi RSSI state switch to High\n");
 206                         } else if (wifirssi < rssi_thresh) {
 207                                 wifirssi_state = BTC_RSSI_STATE_LOW;
 208                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 209                                           ALGO_WIFI_RSSI_STATE,
 210                                           "wifi RSSI state switch to Low\n");
 211                         } else {
 212                                 wifirssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 213                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 214                                           ALGO_WIFI_RSSI_STATE,
 215                                           "wifi RSSI state stay at Medium\n");
 216                         }
 217                 } else {
 218                         if (wifirssi < rssi_thresh1) {
 219                                 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
 220                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 221                                           ALGO_WIFI_RSSI_STATE,
 222                                           "wifi RSSI state switch to Medium\n");
 223                         } else {
 224                                 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
 225                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 226                                           ALGO_WIFI_RSSI_STATE,
 227                                           "wifi RSSI state stay at High\n");
 228                         }
 229                 }
 230         }
 231
 232         coex_sta->pre_wifi_rssi_state[index] = wifirssi_state;
 233
 234         return wifirssi_state;
 235 }
 236
 237 void halbtc8192e2ant_monitor_bt_enable_disable(struct btc_coexist *btcoexist)
 238 {
 239         static bool pre_bt_disabled = false;
 240         static u32 bt_disable_cnt = 0;
 241         bool bt_active = true, bt_disabled = false;
 242
 243         /* This function check if bt is disabled */
 244
 245         if (coex_sta->high_priority_tx == 0 &&
 246             coex_sta->high_priority_rx == 0 &&
 247             coex_sta->low_priority_tx == 0 &&
 248             coex_sta->low_priority_rx == 0)
 249                 bt_active = false;
 250
 251         if (coex_sta->high_priority_tx == 0xffff &&
 252             coex_sta->high_priority_rx == 0xffff &&
 253             coex_sta->low_priority_tx == 0xffff &&
 254             coex_sta->low_priority_rx == 0xffff)
 255                 bt_active = false;
 256
 257         if (bt_active) {
 258                 bt_disable_cnt = 0;
 259                 bt_disabled = false;
 260                 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 261                                    &bt_disabled);
 262                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 263                           "[BTCoex], BT is enabled !!\n");
 264         } else {
 265                 bt_disable_cnt++;
 266                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 267                           "[BTCoex], bt all counters=0, %d times!!\n",
 268                           bt_disable_cnt);
 269                 if (bt_disable_cnt >= 2) {
 270                         bt_disabled = true;
 271                         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 272                                            &bt_disabled);
 273                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 274                                   "[BTCoex], BT is disabled !!\n");
 275                 }
 276         }
 277         if (pre_bt_disabled != bt_disabled) {
 278                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 279                           "[BTCoex], BT is from %s to %s!!\n",
 280                           (pre_bt_disabled ? "disabled":"enabled"),
 281                           (bt_disabled ? "disabled":"enabled"));
 282                 pre_bt_disabled = bt_disabled;
 283         }
 284 }
 285
 286 u32 halbtc8192e2ant_decidera_mask(struct btc_coexist *btcoexist,
 287                                   u8 sstype, u32 ra_masktype)
 288 {
 289         u32 disra_mask = 0x0;
 290
 291         switch (ra_masktype) {
 292         case 0: /* normal mode */
 293                 if (sstype == 2)
 294                         disra_mask = 0x0;       /* enable 2ss */
 295                 else
 296                         disra_mask = 0xfff00000;/* disable 2ss */
 297                 break;
 298         case 1: /* disable cck 1/2 */
 299                 if(sstype == 2)
 300                         disra_mask = 0x00000003;/* enable 2ss */
 301                 else
 302                         disra_mask = 0xfff00003;/* disable 2ss */
 303                 break;
 304         case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
 305                 if(sstype == 2)
 306                         disra_mask = 0x0001f1f7;/* enable 2ss */
 307                 else
 308                         disra_mask = 0xfff1f1f7;/* disable 2ss */
 309                 break;
 310         default:
 311                 break;
 312         }
 313
 314         return disra_mask;
 315 }
 316
 317 void halbtc8192e2ant_Updatera_mask(struct btc_coexist *btcoexist,
 318                                    bool force_exec, u32 dis_ratemask)
 319 {
 320         coex_dm->curra_mask = dis_ratemask;
 321
 322         if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
 323                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
 324                                    &coex_dm->curra_mask);
 325         coex_dm->prera_mask = coex_dm->curra_mask;
 326 }
 327
 328 void halbtc8192e2ant_autorate_fallback_retry(struct btc_coexist *btcoexist,
 329                                              bool force_exec, u8 type)
 330 {
 331         bool wifi_under_bmode = false;
 332
 333         coex_dm->cur_arfrtype = type;
 334
 335         if (force_exec || (coex_dm->pre_arfrtype != coex_dm->cur_arfrtype)) {
 336                 switch (coex_dm->cur_arfrtype) {
 337                 case 0: /* normal mode */
 338                         btcoexist->btc_write_4byte(btcoexist, 0x430,
 339                                                    coex_dm->backup_arfr_cnt1);
 340                         btcoexist->btc_write_4byte(btcoexist, 0x434,
 341                                                    coex_dm->backup_arfr_cnt2);
 342                         break;
 343                 case 1:
 344                         btcoexist->btc_get(btcoexist,
 345                                            BTC_GET_BL_WIFI_UNDER_B_MODE,
 346                                            &wifi_under_bmode);
 347                         if (wifi_under_bmode) {
 348                                 btcoexist->btc_write_4byte(btcoexist, 0x430,
 349                                                            0x0);
 350                                 btcoexist->btc_write_4byte(btcoexist, 0x434,
 351                                                            0x01010101);
 352                         } else {
 353                                 btcoexist->btc_write_4byte(btcoexist, 0x430,
 354                                                            0x0);
 355                                 btcoexist->btc_write_4byte(btcoexist, 0x434,
 356                                                            0x04030201);
 357                         }
 358                         break;
 359                 default:
 360                         break;
 361                 }
 362         }
 363
 364         coex_dm->pre_arfrtype = coex_dm->cur_arfrtype;
 365 }
 366
 367 void halbtc8192e2ant_retrylimit(struct btc_coexist *btcoexist,
 368                                 bool force_exec, u8 type)
 369 {
 370         coex_dm->cur_retrylimit_type = type;
 371
 372         if (force_exec || (coex_dm->pre_retrylimit_type !=
 373                            coex_dm->cur_retrylimit_type)) {
 374                 switch (coex_dm->cur_retrylimit_type) {
 375                         case 0: /* normal mode */
 376                                 btcoexist->btc_write_2byte(btcoexist, 0x42a,
 377                                                     coex_dm->backup_retrylimit);
 378                                 break;
 379                         case 1: /* retry limit=8 */
 380                                 btcoexist->btc_write_2byte(btcoexist, 0x42a,
 381                                                            0x0808);
 382                                 break;
 383                         default:
 384                                 break;
 385                 }
 386         }
 387
 388         coex_dm->pre_retrylimit_type = coex_dm->cur_retrylimit_type;
 389 }
 390
 391 void halbtc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
 392                                    bool force_exec, u8 type)
 393 {
 394         coex_dm->cur_ampdutime_type = type;
 395
 396         if (force_exec || (coex_dm->pre_ampdutime_type !=
 397                            coex_dm->cur_ampdutime_type)) {
 398                 switch (coex_dm->cur_ampdutime_type) {
 399                 case 0: /* normal mode */
 400                         btcoexist->btc_write_1byte(btcoexist, 0x456,
 401                                                 coex_dm->backup_ampdu_maxtime);
 402                         break;
 403                 case 1: /* AMPDU timw = 0x38 * 32us */
 404                         btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
 405                         break;
 406                 default:
 407                         break;
 408                 }
 409         }
 410
 411         coex_dm->pre_ampdutime_type = coex_dm->cur_ampdutime_type;
 412 }
 413
 414 void halbtc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
 415                                 bool force_exec, u8 ra_masktype, u8 arfr_type,
 416                                 u8 retrylimit_type, u8 ampdutime_type)
 417 {
 418         u32 disra_mask = 0x0;
 419
 420         coex_dm->curra_masktype = ra_masktype;
 421         disra_mask = halbtc8192e2ant_decidera_mask(btcoexist,
 422                                                    coex_dm->cur_sstype,
 423                                                    ra_masktype);
 424         halbtc8192e2ant_Updatera_mask(btcoexist, force_exec, disra_mask);
 425
 426         halbtc8192e2ant_autorate_fallback_retry(btcoexist, force_exec,
 427                                                 arfr_type);
 428         halbtc8192e2ant_retrylimit(btcoexist, force_exec, retrylimit_type);
 429         halbtc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdutime_type);
 430 }
 431
 432 void halbtc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
 433                                 bool force_exec, bool rej_ap_agg_pkt,
 434                                 bool b_bt_ctrl_agg_buf_size,
 435                                 u8 agg_buf_size)
 436 {
 437         bool reject_rx_agg = rej_ap_agg_pkt;
 438         bool bt_ctrl_rx_agg_size = b_bt_ctrl_agg_buf_size;
 439         u8 rx_agg_size = agg_buf_size;
 440
 441         /*********************************************
 442          *      Rx Aggregation related setting
 443          *********************************************/
 444         btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
 445                            &reject_rx_agg);
 446         /* decide BT control aggregation buf size or not */
 447         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 448                            &bt_ctrl_rx_agg_size);
 449         /* aggregation buf size, only work
 450          * when BT control Rx aggregation size. */
 451         btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 452         /* real update aggregation setting */
 453         btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 454
 455
 456 }
 457
 458 void halbtc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
 459 {
 460         u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
 461         u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
 462
 463         reg_hp_txrx = 0x770;
 464         reg_lp_txrx = 0x774;
 465
 466         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
 467         reg_hp_tx = u32tmp & MASKLWORD;
 468         reg_hp_rx = (u32tmp & MASKHWORD)>>16;
 469
 470         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
 471         reg_lp_tx = u32tmp & MASKLWORD;
 472         reg_lp_rx = (u32tmp & MASKHWORD)>>16;
 473
 474         coex_sta->high_priority_tx = reg_hp_tx;
 475         coex_sta->high_priority_rx = reg_hp_rx;
 476         coex_sta->low_priority_tx = reg_lp_tx;
 477         coex_sta->low_priority_rx = reg_lp_rx;
 478
 479         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 480                   "[BTCoex] High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 481                   reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
 482         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 483                   "[BTCoex] Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 484                   reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
 485
 486         /* reset counter */
 487         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 488 }
 489
 490 void halbtc8192e2ant_querybt_info(struct btc_coexist *btcoexist)
 491 {
 492         u8 h2c_parameter[1] ={0};
 493
 494         coex_sta->c2h_bt_info_req_sent = true;
 495
 496         h2c_parameter[0] |= BIT0;       /* trigger */
 497
 498         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 499                   "[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
 500                   h2c_parameter[0]);
 501
 502         btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
 503 }
 504
 505 bool halbtc8192e2ant_iswifi_status_changed(struct btc_coexist *btcoexist)
 506 {
 507         static bool pre_wifi_busy = false;
 508         static bool pre_under_4way = false, pre_bt_hson = false;
 509         bool wifi_busy = false, under_4way = false, bt_hson = false;
 510         bool wifi_connected = false;
 511
 512         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 513                            &wifi_connected);
 514         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 515         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
 516         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 517                            &under_4way);
 518
 519         if (wifi_connected) {
 520                 if (wifi_busy != pre_wifi_busy) {
 521                         pre_wifi_busy = wifi_busy;
 522                         return true;
 523                 }
 524                 if (under_4way != pre_under_4way) {
 525                         pre_under_4way = under_4way;
 526                         return true;
 527                 }
 528                 if (bt_hson != pre_bt_hson) {
 529                         pre_bt_hson = bt_hson;
 530                         return true;
 531                 }
 532         }
 533
 534         return false;
 535 }
 536
 537 void halbtc8192e2ant_update_btlink_info(struct btc_coexist *btcoexist)
 538 {
 539         struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 540         bool bt_hson = false;
 541
 542         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
 543
 544         bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
 545         bt_link_info->sco_exist = coex_sta->sco_exist;
 546         bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
 547         bt_link_info->pan_exist = coex_sta->pan_exist;
 548         bt_link_info->hid_exist = coex_sta->hid_exist;
 549
 550         /* work around for HS mode. */
 551         if (bt_hson) {
 552                 bt_link_info->pan_exist = true;
 553                 bt_link_info->bt_link_exist = true;
 554         }
 555
 556         /* check if Sco only */
 557         if (bt_link_info->sco_exist &&
 558             !bt_link_info->a2dp_exist &&
 559             !bt_link_info->pan_exist &&
 560             !bt_link_info->hid_exist)
 561                 bt_link_info->sco_only = true;
 562         else
 563                 bt_link_info->sco_only = false;
 564
 565         /* check if A2dp only */
 566         if (!bt_link_info->sco_exist &&
 567             bt_link_info->a2dp_exist &&
 568             !bt_link_info->pan_exist &&
 569             !bt_link_info->hid_exist)
 570                 bt_link_info->a2dp_only = true;
 571         else
 572                 bt_link_info->a2dp_only = false;
 573
 574         /* check if Pan only */
 575         if (!bt_link_info->sco_exist &&
 576             !bt_link_info->a2dp_exist &&
 577             bt_link_info->pan_exist &&
 578             !bt_link_info->hid_exist)
 579                 bt_link_info->pan_only = true;
 580         else
 581                 bt_link_info->pan_only = false;
 582
 583         /* check if Hid only */
 584         if (!bt_link_info->sco_exist &&
 585             !bt_link_info->a2dp_exist &&
 586             !bt_link_info->pan_exist &&
 587             bt_link_info->hid_exist)
 588                 bt_link_info->hid_only = true;
 589         else
 590                 bt_link_info->hid_only = false;
 591 }
 592
 593 u8 halbtc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
 594 {
 595         struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 596         struct btc_stack_info *stack_info = &btcoexist->stack_info;
 597         bool bt_hson=false;
 598         u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
 599         u8 numOfDiffProfile = 0;
 600
 601         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
 602
 603         if (!bt_link_info->bt_link_exist) {
 604                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 605                           "No BT link exists!!!\n");
 606                 return algorithm;
 607         }
 608
 609         if (bt_link_info->sco_exist)
 610                 numOfDiffProfile++;
 611         if (bt_link_info->hid_exist)
 612                 numOfDiffProfile++;
 613         if (bt_link_info->pan_exist)
 614                 numOfDiffProfile++;
 615         if (bt_link_info->a2dp_exist)
 616                 numOfDiffProfile++;
 617
 618         if (numOfDiffProfile == 1) {
 619                 if (bt_link_info->sco_exist) {
 620                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 621                                   "SCO only\n");
 622                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 623                 } else {
 624                         if (bt_link_info->hid_exist) {
 625                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 626                                           "HID only\n");
 627                                 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 628                         } else if (bt_link_info->a2dp_exist) {
 629                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 630                                           "A2DP only\n");
 631                                 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
 632                         } else if (bt_link_info->pan_exist) {
 633                                 if (bt_hson) {
 634                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 635                                                   "PAN(HS) only\n");
 636                                         algorithm =
 637                                                 BT_8192E_2ANT_COEX_ALGO_PANHS;
 638                                 } else {
 639                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 640                                                   "PAN(EDR) only\n");
 641                                         algorithm =
 642                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR;
 643                                 }
 644                         }
 645                 }
 646         } else if (numOfDiffProfile == 2) {
 647                 if (bt_link_info->sco_exist) {
 648                         if (bt_link_info->hid_exist) {
 649                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 650                                           "SCO + HID\n");
 651                                 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 652                         } else if (bt_link_info->a2dp_exist) {
 653                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 654                                           "SCO + A2DP ==> SCO\n");
 655                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 656                         } else if (bt_link_info->pan_exist) {
 657                                 if (bt_hson) {
 658                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 659                                                   "SCO + PAN(HS)\n");
 660                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 661                                 } else {
 662                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 663                                                   "SCO + PAN(EDR)\n");
 664                                         algorithm =
 665                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 666                                 }
 667                         }
 668                 } else {
 669                         if (bt_link_info->hid_exist &&
 670                             bt_link_info->a2dp_exist) {
 671                                 if (stack_info->num_of_hid >= 2) {
 672                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 673                                                   "HID*2 + A2DP\n");
 674                                         algorithm =
 675                                         BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 676                                 } else {
 677                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 678                                                   "HID + A2DP\n");
 679                                         algorithm =
 680                                             BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 681                                 }
 682                         } else if (bt_link_info->hid_exist &&
 683                                    bt_link_info->pan_exist) {
 684                                 if (bt_hson) {
 685                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 686                                                   "HID + PAN(HS)\n");
 687                                         algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 688                                 } else {
 689                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 690                                                   "HID + PAN(EDR)\n");
 691                                         algorithm =
 692                                             BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 693                                 }
 694                         } else if (bt_link_info->pan_exist &&
 695                                    bt_link_info->a2dp_exist) {
 696                                 if (bt_hson) {
 697                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 698                                                   "A2DP + PAN(HS)\n");
 699                                         algorithm =
 700                                             BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
 701                                 } else {
 702                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 703                                                   "A2DP + PAN(EDR)\n");
 704                                         algorithm =
 705                                             BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
 706                                 }
 707                         }
 708                 }
 709         } else if (numOfDiffProfile == 3) {
 710                 if (bt_link_info->sco_exist) {
 711                         if (bt_link_info->hid_exist &&
 712                             bt_link_info->a2dp_exist) {
 713                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 714                                           "SCO + HID + A2DP ==> HID\n");
 715                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 716                         } else if (bt_link_info->hid_exist &&
 717                                    bt_link_info->pan_exist) {
 718                                 if (bt_hson) {
 719                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 720                                                   "SCO + HID + PAN(HS)\n");
 721                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 722                                 } else {
 723                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 724                                                   "SCO + HID + PAN(EDR)\n");
 725                                         algorithm =
 726                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 727                                 }
 728                         } else if (bt_link_info->pan_exist &&
 729                                    bt_link_info->a2dp_exist) {
 730                                 if (bt_hson) {
 731                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 732                                                   "SCO + A2DP + PAN(HS)\n");
 733                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 734                                 } else {
 735                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 736                                                   "SCO + A2DP + PAN(EDR)\n");
 737                                         algorithm =
 738                                             BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 739                                 }
 740                         }
 741                 } else {
 742                         if (bt_link_info->hid_exist &&
 743                             bt_link_info->pan_exist &&
 744                             bt_link_info->a2dp_exist) {
 745                                 if (bt_hson) {
 746                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 747                                                   "HID + A2DP + PAN(HS)\n");
 748                                         algorithm =
 749                                             BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 750                                 } else {
 751                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 752                                                   "HID + A2DP + PAN(EDR)\n");
 753                                         algorithm =
 754                                         BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 755                                 }
 756                         }
 757                 }
 758         } else if (numOfDiffProfile >= 3) {
 759                 if (bt_link_info->sco_exist) {
 760                         if (bt_link_info->hid_exist &&
 761                             bt_link_info->pan_exist &&
 762                             bt_link_info->a2dp_exist) {
 763                                 if (bt_hson) {
 764                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 765                                                   "ErrorSCO+HID+A2DP+PAN(HS)\n");
 766
 767                                 } else {
 768                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 769                                                   "SCO+HID+A2DP+PAN(EDR)\n");
 770                                         algorithm =
 771                                             BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 772                                 }
 773                         }
 774                 }
 775         }
 776
 777         return algorithm;
 778 }
 779
 780 void halbtc8192e2ant_setfw_dac_swinglevel(struct btc_coexist *btcoexist,
 781                                           u8 dac_swinglvl)
 782 {
 783         u8 h2c_parameter[1] ={0};
 784
 785         /* There are several type of dacswing
 786          * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
 787         h2c_parameter[0] = dac_swinglvl;
 788
 789         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 790                   "[BTCoex], Set Dac Swing Level=0x%x\n", dac_swinglvl);
 791         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 792                   "[BTCoex], FW write 0x64=0x%x\n", h2c_parameter[0]);
 793
 794         btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
 795 }
 796
 797 void halbtc8192e2ant_set_fwdec_btpwr(struct btc_coexist *btcoexist,
 798                                      u8 dec_btpwr_lvl)
 799 {
 800         u8 h2c_parameter[1] ={0};
 801
 802         h2c_parameter[0] = dec_btpwr_lvl;
 803
 804         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 805                   "[BTCoex] decrease Bt Power level = %d, FW write 0x62=0x%x\n",
 806                   dec_btpwr_lvl, h2c_parameter[0]);
 807
 808         btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
 809 }
 810
 811 void halbtc8192e2ant_dec_btpwr(struct btc_coexist *btcoexist,
 812                                bool force_exec, u8 dec_btpwr_lvl)
 813 {
 814         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
 815                   "[BTCoex], %s Dec BT power level = %d\n",
 816                   (force_exec? "force to":""), dec_btpwr_lvl);
 817         coex_dm->cur_dec_bt_pwr = dec_btpwr_lvl;
 818
 819         if (!force_exec) {
 820                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
 821                           "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
 822                           coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
 823         }
 824         halbtc8192e2ant_set_fwdec_btpwr(btcoexist, coex_dm->cur_dec_bt_pwr);
 825
 826         coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
 827 }
 828
 829 void halbtc8192e2ant_set_bt_autoreport(struct btc_coexist *btcoexist,
 830                                        bool enable_autoreport)
 831 {
 832         u8 h2c_parameter[1] ={0};
 833
 834         h2c_parameter[0] = 0;
 835
 836         if (enable_autoreport)
 837                 h2c_parameter[0] |= BIT0;
 838
 839         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 840                   "[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
 841                   (enable_autoreport? "Enabled!!":"Disabled!!"),
 842                   h2c_parameter[0]);
 843
 844         btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
 845 }
 846
 847 void halbtc8192e2ant_bt_autoreport(struct btc_coexist *btcoexist,
 848                                    bool force_exec, bool enable_autoreport)
 849 {
 850         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
 851                   "[BTCoex], %s BT Auto report = %s\n",
 852                   (force_exec? "force to":""),
 853                   ((enable_autoreport)? "Enabled":"Disabled"));
 854         coex_dm->cur_bt_auto_report = enable_autoreport;
 855
 856         if (!force_exec) {
 857                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
 858                           "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
 859                           coex_dm->pre_bt_auto_report,
 860                           coex_dm->cur_bt_auto_report);
 861
 862                 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
 863                         return;
 864         }
 865         halbtc8192e2ant_set_bt_autoreport(btcoexist,
 866                                           coex_dm->cur_bt_auto_report);
 867
 868         coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
 869 }
 870
 871 void halbtc8192e2ant_fw_dac_swinglvl(struct btc_coexist *btcoexist,
 872                                      bool force_exec, u8 fw_dac_swinglvl)
 873 {
 874         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
 875                   "[BTCoex], %s set FW Dac Swing level = %d\n",
 876                   (force_exec? "force to":""), fw_dac_swinglvl);
 877         coex_dm->cur_fw_dac_swing_lvl = fw_dac_swinglvl;
 878
 879         if (!force_exec) {
 880                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
 881                           "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
 882                           coex_dm->pre_fw_dac_swing_lvl,
 883                           coex_dm->cur_fw_dac_swing_lvl);
 884
 885                 if (coex_dm->pre_fw_dac_swing_lvl ==
 886                     coex_dm->cur_fw_dac_swing_lvl)
 887                         return;
 888         }
 889
 890         halbtc8192e2ant_setfw_dac_swinglevel(btcoexist,
 891                                              coex_dm->cur_fw_dac_swing_lvl);
 892
 893         coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 894 }
 895
 896 void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
 897                                              bool rx_rf_shrink_on)
 898 {
 899         if (rx_rf_shrink_on) {
 900                 /* Shrink RF Rx LPF corner */
 901                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
 902                           "[BTCoex], Shrink RF Rx LPF corner!!\n");
 903                 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 904                                           0xfffff, 0xffffc);
 905         } else {
 906                 /* Resume RF Rx LPF corner
 907                  * After initialized, we can use coex_dm->btRf0x1eBackup */
 908                 if (btcoexist->initilized) {
 909                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
 910                                   "[BTCoex], Resume RF Rx LPF corner!!\n");
 911                         btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 912                                                   0xfffff,
 913                                                   coex_dm->bt_rf0x1e_backup);
 914                 }
 915         }
 916 }
 917
 918 void halbtc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
 919                                bool force_exec, bool rx_rf_shrink_on)
 920 {
 921         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
 922                   "[BTCoex], %s turn Rx RF Shrink = %s\n",
 923                   (force_exec? "force to":""), ((rx_rf_shrink_on)? "ON":"OFF"));
 924         coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
 925
 926         if (!force_exec) {
 927                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
 928                           "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n",
 929                           coex_dm->pre_rf_rx_lpf_shrink,
 930                           coex_dm->cur_rf_rx_lpf_shrink);
 931
 932                 if (coex_dm->pre_rf_rx_lpf_shrink ==
 933                     coex_dm->cur_rf_rx_lpf_shrink)
 934                         return;
 935         }
 936         halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
 937                                                 coex_dm->cur_rf_rx_lpf_shrink);
 938
 939         coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
 940 }
 941
 942 void halbtc8192e2ant_set_sw_penalty_tx_rateadaptive(
 943                                                 struct btc_coexist *btcoexist,
 944                                                 bool low_penalty_ra)
 945 {
 946         u8 h2c_parameter[6] ={0};
 947
 948         h2c_parameter[0] = 0x6; /* opCode, 0x6= Retry_Penalty */
 949
 950         if (low_penalty_ra) {
 951                 h2c_parameter[1] |= BIT0;
 952                 /* normal rate except MCS7/6/5, OFDM54/48/36 */
 953                 h2c_parameter[2] = 0x00;
 954                 h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
 955                 h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
 956                 h2c_parameter[5] = 0xf9;  /* MCS5 or OFDM36 */
 957         }
 958
 959         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 960                   "[BTCoex], set WiFi Low-Penalty Retry: %s",
 961                   (low_penalty_ra? "ON!!":"OFF!!"));
 962
 963         btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
 964 }
 965
 966 void halbtc8192e2ant_low_penalty_ra(struct btc_coexist *btcoexist,
 967                                     bool force_exec, bool low_penalty_ra)
 968 {
 969         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
 970                   "[BTCoex], %s turn LowPenaltyRA = %s\n",
 971                   (force_exec? "force to":""), ((low_penalty_ra)? "ON":"OFF"));
 972         coex_dm->cur_low_penalty_ra = low_penalty_ra;
 973
 974         if (!force_exec) {
 975                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
 976                           "[BTCoex] bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n",
 977                           coex_dm->pre_low_penalty_ra,
 978                           coex_dm->cur_low_penalty_ra);
 979
 980                 if (coex_dm->pre_low_penalty_ra ==
 981                     coex_dm->cur_low_penalty_ra)
 982                         return;
 983         }
 984         halbtc8192e2ant_set_sw_penalty_tx_rateadaptive(btcoexist,
 985                                                 coex_dm->cur_low_penalty_ra);
 986
 987         coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
 988 }
 989
 990 void halbtc8192e2ant_set_dac_swingreg(struct btc_coexist *btcoexist,
 991                                       u32 level)
 992 {
 993         u8 val = (u8)level;
 994
 995         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
 996                   "[BTCoex], Write SwDacSwing = 0x%x\n", level);
 997         btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
 998 }
 999
1000 void halbtc8192e2ant_setsw_fulltime_dacswing(struct btc_coexist *btcoexist,
1001                                              bool sw_dac_swingon,
1002                                              u32 sw_dac_swinglvl)
1003 {
1004         if (sw_dac_swingon)
1005                 halbtc8192e2ant_set_dac_swingreg(btcoexist, sw_dac_swinglvl);
1006         else
1007                 halbtc8192e2ant_set_dac_swingreg(btcoexist, 0x18);
1008 }
1009
1010
1011 void halbtc8192e2ant_DacSwing(struct btc_coexist *btcoexist,
1012                               bool force_exec, bool dac_swingon,
1013                               u32 dac_swinglvl)
1014 {
1015         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1016                   "[BTCoex], %s turn DacSwing=%s, dac_swinglvl=0x%x\n",
1017                   (force_exec? "force to":""),
1018                   ((dac_swingon)? "ON":"OFF"), dac_swinglvl);
1019         coex_dm->cur_dac_swing_on = dac_swingon;
1020         coex_dm->cur_dac_swing_lvl = dac_swinglvl;
1021
1022         if (!force_exec) {
1023                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1024                           "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, ",
1025                           coex_dm->pre_dac_swing_on,
1026                           coex_dm->pre_dac_swing_lvl);
1027                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1028                           "bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n",
1029                           coex_dm->cur_dac_swing_on,
1030                           coex_dm->cur_dac_swing_lvl);
1031
1032                 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
1033                     (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
1034                         return;
1035         }
1036         mdelay(30);
1037         halbtc8192e2ant_setsw_fulltime_dacswing(btcoexist, dac_swingon,
1038                                                 dac_swinglvl);
1039
1040         coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
1041         coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
1042 }
1043
1044 void halbtc8192e2ant_set_adc_backoff(struct btc_coexist *btcoexist,
1045                                      bool adc_backoff)
1046 {
1047         if(adc_backoff)
1048         {
1049                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1050                           "[BTCoex], BB BackOff Level On!\n");
1051                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
1052         }
1053         else
1054         {
1055                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1056                           "[BTCoex], BB BackOff Level Off!\n");
1057                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
1058         }
1059 }
1060
1061 void halbtc8192e2ant_adc_backoff(struct btc_coexist *btcoexist,
1062                                  bool force_exec, bool adc_backoff)
1063 {
1064         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1065                   "[BTCoex], %s turn AdcBackOff = %s\n",
1066                   (force_exec? "force to":""), ((adc_backoff)? "ON":"OFF"));
1067         coex_dm->cur_adc_back_off = adc_backoff;
1068
1069         if (!force_exec) {
1070                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1071                           "[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n",
1072                           coex_dm->pre_adc_back_off, coex_dm->cur_adc_back_off);
1073
1074                 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
1075                         return;
1076         }
1077         halbtc8192e2ant_set_adc_backoff(btcoexist, coex_dm->cur_adc_back_off);
1078
1079         coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
1080 }
1081
1082 void halbtc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
1083                                    bool agc_table_en)
1084 {
1085
1086         /* BB AGC Gain Table */
1087         if (agc_table_en) {
1088                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1089                           "[BTCoex], BB Agc Table On!\n");
1090                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
1091                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
1092                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
1093                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
1094                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
1095                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
1096         } else {
1097                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1098                           "[BTCoex], BB Agc Table Off!\n");
1099                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
1100                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
1101                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
1102                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
1103                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
1104                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
1105         }
1106 }
1107
1108 void halbtc8192e2ant_AgcTable(struct btc_coexist *btcoexist,
1109                               bool force_exec, bool agc_table_en)
1110 {
1111         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1112                   "[BTCoex], %s %s Agc Table\n",
1113                   (force_exec? "force to":""),
1114                   ((agc_table_en)? "Enable":"Disable"));
1115         coex_dm->cur_agc_table_en = agc_table_en;
1116
1117         if (!force_exec) {
1118                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1119                           "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
1120                           coex_dm->pre_agc_table_en, coex_dm->cur_agc_table_en);
1121
1122                 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1123                         return;
1124         }
1125         halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1126
1127         coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1128 }
1129
1130 void halbtc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
1131                                     u32 val0x6c0, u32 val0x6c4,
1132                                     u32 val0x6c8, u8 val0x6cc)
1133 {
1134         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1135                   "[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0);
1136         btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1137
1138         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1139                   "[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4);
1140         btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1141
1142         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1143                   "[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8);
1144         btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1145
1146         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1147                   "[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc);
1148         btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1149 }
1150
1151 void halbtc8192e2ant_coex_table(struct btc_coexist *btcoexist, bool force_exec,
1152                                 u32 val0x6c0, u32 val0x6c4,
1153                                 u32 val0x6c8, u8 val0x6cc)
1154 {
1155         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1156                   "[BTCoex], %s write Coex Table 0x6c0=0x%x, ",
1157                   (force_exec? "force to":""), val0x6c0);
1158         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1159                   "0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
1160                   val0x6c4, val0x6c8, val0x6cc);
1161         coex_dm->cur_val0x6c0 = val0x6c0;
1162         coex_dm->cur_val0x6c4 = val0x6c4;
1163         coex_dm->cur_val0x6c8 = val0x6c8;
1164         coex_dm->cur_val0x6cc = val0x6cc;
1165
1166         if (!force_exec) {
1167                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1168                           "[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, ",
1169                           coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4);
1170                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1171                           "preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n",
1172                           coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
1173                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1174                           "[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x, \n",
1175                           coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4);
1176                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1177                           "curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n",
1178                           coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
1179
1180                 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1181                     (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1182                     (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1183                     (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1184                         return;
1185         }
1186         halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
1187                                        val0x6c8, val0x6cc);
1188
1189         coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1190         coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1191         coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1192         coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1193 }
1194
1195 void halbtc8192e2ant_coex_table_with_type(struct btc_coexist *btcoexist,
1196                                           bool force_exec, u8 type)
1197 {
1198         switch (type) {
1199         case 0:
1200                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1201                                            0x5a5a5a5a, 0xffffff, 0x3);
1202                 break;
1203         case 1:
1204                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1205                                            0x5a5a5a5a, 0xffffff, 0x3);
1206                 break;
1207         case 2:
1208                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1209                                            0x5ffb5ffb, 0xffffff, 0x3);
1210                 break;
1211         case 3:
1212                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1213                                            0x5fdb5fdb, 0xffffff, 0x3);
1214                 break;
1215         case 4:
1216                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1217                                            0x5ffb5ffb, 0xffffff, 0x3);
1218                 break;
1219         default:
1220                 break;
1221         }
1222 }
1223
1224 void halbtc8192e2ant_set_fw_ignore_wlanact(struct btc_coexist *btcoexist,
1225                                            bool enable)
1226 {
1227         u8 h2c_parameter[1] ={0};
1228
1229         if (enable)
1230                 h2c_parameter[0] |= BIT0; /* function enable */
1231
1232         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1233                   "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
1234                   h2c_parameter[0]);
1235
1236         btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1237 }
1238
1239 void halbtc8192e2ant_IgnoreWlanAct(struct btc_coexist *btcoexist,
1240                                    bool force_exec, bool enable)
1241 {
1242         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1243                   "[BTCoex], %s turn Ignore WlanAct %s\n",
1244                   (force_exec? "force to":""), (enable? "ON":"OFF"));
1245         coex_dm->cur_ignore_wlan_act = enable;
1246
1247         if (!force_exec) {
1248                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1249                           "[BTCoex], bPreIgnoreWlanAct = %d ",
1250                           coex_dm->pre_ignore_wlan_act);
1251                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1252                           "bCurIgnoreWlanAct = %d!!\n",
1253                           coex_dm->cur_ignore_wlan_act);
1254
1255                 if (coex_dm->pre_ignore_wlan_act ==
1256                     coex_dm->cur_ignore_wlan_act)
1257                         return;
1258         }
1259         halbtc8192e2ant_set_fw_ignore_wlanact(btcoexist, enable);
1260
1261         coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1262 }
1263
1264 void halbtc8192e2ant_SetFwPstdma(struct btc_coexist *btcoexist, u8 byte1,
1265                                  u8 byte2, u8 byte3, u8 byte4, u8 byte5)
1266 {
1267         u8 h2c_parameter[5] ={0};
1268
1269         h2c_parameter[0] = byte1;
1270         h2c_parameter[1] = byte2;
1271         h2c_parameter[2] = byte3;
1272         h2c_parameter[3] = byte4;
1273         h2c_parameter[4] = byte5;
1274
1275         coex_dm->ps_tdma_para[0] = byte1;
1276         coex_dm->ps_tdma_para[1] = byte2;
1277         coex_dm->ps_tdma_para[2] = byte3;
1278         coex_dm->ps_tdma_para[3] = byte4;
1279         coex_dm->ps_tdma_para[4] = byte5;
1280
1281         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1282                   "[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
1283                   h2c_parameter[0],
1284                   h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
1285                   h2c_parameter[3] << 8 | h2c_parameter[4]);
1286
1287         btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1288 }
1289
1290 void halbtc8192e2ant_sw_mechanism1(struct btc_coexist *btcoexist,
1291                                    bool shrink_rx_lpf, bool low_penalty_ra,
1292                                    bool limited_dig, bool btlan_constrain)
1293 {
1294         halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1295 }
1296
1297 void halbtc8192e2ant_sw_mechanism2(struct btc_coexist *btcoexist,
1298                                    bool agc_table_shift, bool adc_backoff,
1299                                    bool sw_dac_swing, u32 dac_swinglvl)
1300 {
1301         halbtc8192e2ant_AgcTable(btcoexist, NORMAL_EXEC, agc_table_shift);
1302         halbtc8192e2ant_DacSwing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1303                                  dac_swinglvl);
1304 }
1305
1306 void halbtc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
1307                              bool force_exec, bool turn_on, u8 type)
1308 {
1309
1310         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1311                   "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1312                   (force_exec? "force to":""), (turn_on? "ON":"OFF"), type);
1313         coex_dm->cur_ps_tdma_on = turn_on;
1314         coex_dm->cur_ps_tdma = type;
1315
1316         if (!force_exec) {
1317                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1318                           "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1319                           coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1320                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1321                           "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1322                           coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
1323
1324                 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1325                     (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1326                         return;
1327         }
1328         if (turn_on) {
1329                 switch (type) {
1330                 case 1:
1331                 default:
1332                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1333                                                     0x1a, 0xe1, 0x90);
1334                         break;
1335                 case 2:
1336                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1337                                                     0x12, 0xe1, 0x90);
1338                         break;
1339                 case 3:
1340                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1341                                                     0x3, 0xf1, 0x90);
1342                         break;
1343                 case 4:
1344                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1345                                                     0x3, 0xf1, 0x90);
1346                         break;
1347                 case 5:
1348                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1349                                                     0x1a, 0x60, 0x90);
1350                         break;
1351                 case 6:
1352                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1353                                                      0x12, 0x60, 0x90);
1354                         break;
1355                 case 7:
1356                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1357                                                     0x3, 0x70, 0x90);
1358                         break;
1359                 case 8:
1360                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xa3, 0x10,
1361                                                     0x3, 0x70, 0x90);
1362                         break;
1363                 case 9:
1364                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1365                                                     0x1a, 0xe1, 0x10);
1366                         break;
1367                 case 10:
1368                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1369                                                     0x12, 0xe1, 0x10);
1370                         break;
1371                 case 11:
1372                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1373                                                     0x3, 0xf1, 0x10);
1374                         break;
1375                 case 12:
1376                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1377                                                     0x3, 0xf1, 0x10);
1378                         break;
1379                 case 13:
1380                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1381                                                     0x1a, 0xe0, 0x10);
1382                         break;
1383                 case 14:
1384                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1385                                                     0x12, 0xe0, 0x10);
1386                         break;
1387                 case 15:
1388                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1389                                                     0x3, 0xf0, 0x10);
1390                         break;
1391                 case 16:
1392                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1393                                                     0x3, 0xf0, 0x10);
1394                         break;
1395                 case 17:
1396                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0x61, 0x20,
1397                                                     0x03, 0x10, 0x10);
1398                         break;
1399                 case 18:
1400                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x5,
1401                                                     0x5, 0xe1, 0x90);
1402                         break;
1403                 case 19:
1404                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1405                                                     0x25, 0xe1, 0x90);
1406                         break;
1407                 case 20:
1408                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1409                                                     0x25, 0x60, 0x90);
1410                         break;
1411                 case 21:
1412                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x15,
1413                                                     0x03, 0x70, 0x90);
1414                         break;
1415                 case 71:
1416                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1417                                                     0x1a, 0xe1, 0x90);
1418                         break;
1419                 }
1420         } else {
1421                 /* disable PS tdma */
1422                 switch (type) {
1423                 default:
1424                 case 0:
1425                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0x8, 0x0, 0x0,
1426                                                     0x0, 0x0);
1427                         btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1428                         break;
1429                 case 1:
1430                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0x0, 0x0, 0x0,
1431                                                     0x8, 0x0);
1432                         mdelay(5);
1433                         btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1434                         break;
1435                 }
1436         }
1437
1438         /* update pre state */
1439         coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1440         coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1441 }
1442
1443 void halbtc8192e2ant_set_switch_sstype(struct btc_coexist *btcoexist, u8 sstype)
1444 {
1445         u8 mimops = BTC_MIMO_PS_DYNAMIC;
1446         u32 disra_mask = 0x0;
1447
1448         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1449                   "[BTCoex], REAL set SS Type = %d\n", sstype);
1450
1451         disra_mask = halbtc8192e2ant_decidera_mask(btcoexist, sstype,
1452                                                    coex_dm->curra_masktype);
1453         halbtc8192e2ant_Updatera_mask(btcoexist, FORCE_EXEC, disra_mask);
1454
1455         if (sstype == 1) {
1456                 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1457                 /* switch ofdm path */
1458                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1459                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1460                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1461                 /* switch cck patch */
1462                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
1463                 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
1464                 mimops=BTC_MIMO_PS_STATIC;
1465         } else if (sstype == 2) {
1466                 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1467                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1468                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1469                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1470                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0);
1471                 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41);
1472                 mimops=BTC_MIMO_PS_DYNAMIC;
1473         }
1474         /* set rx 1ss or 2ss */
1475         btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
1476 }
1477
1478 void halbtc8192e2ant_switch_sstype(struct btc_coexist *btcoexist,
1479                                    bool force_exec, u8 new_sstype)
1480 {
1481         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1482                   "[BTCoex], %s Switch SS Type = %d\n",
1483                   (force_exec? "force to":""), new_sstype);
1484         coex_dm->cur_sstype = new_sstype;
1485
1486         if (!force_exec) {
1487                 if (coex_dm->pre_sstype == coex_dm->cur_sstype)
1488                         return;
1489         }
1490         halbtc8192e2ant_set_switch_sstype(btcoexist, coex_dm->cur_sstype);
1491
1492         coex_dm->pre_sstype = coex_dm->cur_sstype;
1493 }
1494
1495 void halbtc8192e2ant_coex_alloff(struct btc_coexist *btcoexist)
1496 {
1497         /* fw all off */
1498         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1499         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1500         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1501
1502         /* sw all off */
1503         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1504         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1505
1506         /* hw all off */
1507         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1508 }
1509
1510 void halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
1511 {
1512         /* force to reset coex mechanism */
1513
1514         halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1515         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, FORCE_EXEC, 6);
1516         halbtc8192e2ant_dec_btpwr(btcoexist, FORCE_EXEC, 0);
1517
1518         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1519         halbtc8192e2ant_switch_sstype(btcoexist, FORCE_EXEC, 2);
1520
1521         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1522         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1523 }
1524
1525 void halbtc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
1526 {
1527         bool low_pwr_disable = true;
1528
1529         btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1530                            &low_pwr_disable);
1531
1532         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
1533
1534         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
1535         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1536         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1537         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1538
1539         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1540         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1541 }
1542
1543 bool halbtc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
1544 {
1545         struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1546         bool common = false, wifi_connected = false, wifi_busy = false;
1547         bool bt_hson = false, low_pwr_disable = false;
1548
1549         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
1550         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1551                            &wifi_connected);
1552         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1553
1554         if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1555                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1556         else
1557                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1558
1559         if (!wifi_connected) {
1560                 low_pwr_disable = false;
1561                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1562                                    &low_pwr_disable);
1563
1564                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1565                           "[BTCoex], Wifi non-connected idle!!\n");
1566
1567                 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1568                      coex_dm->bt_status) ||
1569                     (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1570                      coex_dm->bt_status)) {
1571                         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1572                                                       2);
1573                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1574                                                              NORMAL_EXEC, 1);
1575                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1576                                                 0);
1577                 } else {
1578                         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1579                                                       1);
1580                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1581                                                              NORMAL_EXEC, 0);
1582                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1583                                                 1);
1584                 }
1585
1586                 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1587                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1588
1589                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false,
1590                                               false);
1591                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
1592                                               0x18);
1593
1594                 common = true;
1595         } else {
1596                 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1597                     coex_dm->bt_status) {
1598                         low_pwr_disable = false;
1599                         btcoexist->btc_set(btcoexist,
1600                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1601                                            &low_pwr_disable);
1602
1603                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1604                                   "Wifi connected + BT non connected-idle!!\n");
1605
1606                         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1607                                                       2);
1608                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1609                                                              NORMAL_EXEC, 1);
1610                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1611                                                 0);
1612                         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC,
1613                                                         6);
1614                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1615
1616                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
1617                                                       false, false);
1618                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1619                                                       false, 0x18);
1620
1621                         common = true;
1622                 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1623                            coex_dm->bt_status) {
1624                         low_pwr_disable = true;
1625                         btcoexist->btc_set(btcoexist,
1626                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1627                                            &low_pwr_disable);
1628
1629                         if (bt_hson)
1630                                 return false;
1631                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1632                                   "Wifi connected + BT connected-idle!!\n");
1633
1634                         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1635                                                       2);
1636                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1637                                                              NORMAL_EXEC, 1);
1638                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1639                                                 0);
1640                         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC,
1641                                                         6);
1642                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1643
1644                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
1645                                                       false, false);
1646                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1647                                                       false, 0x18);
1648
1649                         common = true;
1650                 } else {
1651                         low_pwr_disable = true;
1652                         btcoexist->btc_set(btcoexist,
1653                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1654                                            &low_pwr_disable);
1655
1656                         if (wifi_busy) {
1657                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1658                                           "Wifi Connected-Busy + BT Busy!!\n");
1659                                 common = false;
1660                         } else {
1661                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1662                                           "Wifi Connected-Idle + BT Busy!!\n");
1663
1664                                 halbtc8192e2ant_switch_sstype(btcoexist,
1665                                                               NORMAL_EXEC, 1);
1666                                 halbtc8192e2ant_coex_table_with_type(btcoexist,
1667                                                                     NORMAL_EXEC,
1668                                                                     2);
1669                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1670                                                         true, 21);
1671                                 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1672                                                                 NORMAL_EXEC, 6);
1673                                 halbtc8192e2ant_dec_btpwr(btcoexist,
1674                                                           NORMAL_EXEC, 0);
1675                                 halbtc8192e2ant_sw_mechanism1(btcoexist, false,
1676                                                               false, false,
1677                                                               false);
1678                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false,
1679                                                               false, false,
1680                                                               0x18);
1681                                 common = true;
1682                         }
1683                 }
1684         }
1685         return common;
1686 }
1687
1688 void halbtc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
1689                                           bool sco_hid, bool tx_pause,
1690                                           u8 max_interval)
1691 {
1692         static int up, dn, m, n, wait_cnt;
1693         /* 0: no change, +1: increase WiFi duration,
1694          * -1: decrease WiFi duration */
1695         int result;
1696         u8 retry_cnt = 0;
1697
1698         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1699                   "[BTCoex], TdmaDurationAdjust()\n");
1700
1701         if (!coex_dm->auto_tdma_adjust) {
1702                 coex_dm->auto_tdma_adjust = true;
1703                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1704                           "[BTCoex], first run TdmaDurationAdjust()!!\n");
1705                 if (sco_hid) {
1706                         if (tx_pause) {
1707                                 if (max_interval == 1) {
1708                                         halbtc8192e2ant_ps_tdma(btcoexist,
1709                                                                 NORMAL_EXEC,
1710                                                                 true, 13);
1711                                         coex_dm->ps_tdma_du_adj_type = 13;
1712                                 } else if (max_interval == 2) {
1713                                         halbtc8192e2ant_ps_tdma(btcoexist,
1714                                                                 NORMAL_EXEC,
1715                                                                 true, 14);
1716                                         coex_dm->ps_tdma_du_adj_type = 14;
1717                                 } else if (max_interval == 3) {
1718                                         halbtc8192e2ant_ps_tdma(btcoexist,
1719                                                                 NORMAL_EXEC,
1720                                                                 true, 15);
1721                                         coex_dm->ps_tdma_du_adj_type = 15;
1722                                 } else {
1723                                         halbtc8192e2ant_ps_tdma(btcoexist,
1724                                                                 NORMAL_EXEC,
1725                                                                 true, 15);
1726                                         coex_dm->ps_tdma_du_adj_type = 15;
1727                                 }
1728                         } else {
1729                                 if (max_interval == 1) {
1730                                         halbtc8192e2ant_ps_tdma(btcoexist,
1731                                                                 NORMAL_EXEC,
1732                                                                 true, 9);
1733                                         coex_dm->ps_tdma_du_adj_type = 9;
1734                                 } else if (max_interval == 2) {
1735                                         halbtc8192e2ant_ps_tdma(btcoexist,
1736                                                                 NORMAL_EXEC,
1737                                                                 true, 10);
1738                                         coex_dm->ps_tdma_du_adj_type = 10;
1739                                 } else if (max_interval == 3) {
1740                                         halbtc8192e2ant_ps_tdma(btcoexist,
1741                                                                 NORMAL_EXEC,
1742                                                                 true, 11);
1743                                         coex_dm->ps_tdma_du_adj_type = 11;
1744                                 } else {
1745                                         halbtc8192e2ant_ps_tdma(btcoexist,
1746                                                                 NORMAL_EXEC,
1747                                                                 true, 11);
1748                                         coex_dm->ps_tdma_du_adj_type = 11;
1749                                 }
1750                         }
1751                 } else {
1752                         if (tx_pause) {
1753                                 if (max_interval == 1) {
1754                                         halbtc8192e2ant_ps_tdma(btcoexist,
1755                                                                 NORMAL_EXEC,
1756                                                                 true, 5);
1757                                         coex_dm->ps_tdma_du_adj_type = 5;
1758                                 } else if (max_interval == 2) {
1759                                         halbtc8192e2ant_ps_tdma(btcoexist,
1760                                                                 NORMAL_EXEC,
1761                                                                 true, 6);
1762                                         coex_dm->ps_tdma_du_adj_type = 6;
1763                                 } else if (max_interval == 3) {
1764                                         halbtc8192e2ant_ps_tdma(btcoexist,
1765                                                                 NORMAL_EXEC,
1766                                                                 true, 7);
1767                                         coex_dm->ps_tdma_du_adj_type = 7;
1768                                 } else {
1769                                         halbtc8192e2ant_ps_tdma(btcoexist,
1770                                                                 NORMAL_EXEC,
1771                                                                 true, 7);
1772                                         coex_dm->ps_tdma_du_adj_type = 7;
1773                                 }
1774                         } else {
1775                                 if (max_interval == 1) {
1776                                         halbtc8192e2ant_ps_tdma(btcoexist,
1777                                                                 NORMAL_EXEC,
1778                                                                 true, 1);
1779                                         coex_dm->ps_tdma_du_adj_type = 1;
1780                                 } else if (max_interval == 2) {
1781                                         halbtc8192e2ant_ps_tdma(btcoexist,
1782                                                                 NORMAL_EXEC,
1783                                                                 true, 2);
1784                                         coex_dm->ps_tdma_du_adj_type = 2;
1785                                 } else if (max_interval == 3) {
1786                                         halbtc8192e2ant_ps_tdma(btcoexist,
1787                                                                 NORMAL_EXEC,
1788                                                                 true, 3);
1789                                         coex_dm->ps_tdma_du_adj_type = 3;
1790                                 } else {
1791                                         halbtc8192e2ant_ps_tdma(btcoexist,
1792                                                                 NORMAL_EXEC,
1793                                                                 true, 3);
1794                                         coex_dm->ps_tdma_du_adj_type = 3;
1795                                 }
1796                         }
1797                 }
1798
1799                 up = 0;
1800                 dn = 0;
1801                 m = 1;
1802                 n= 3;
1803                 result = 0;
1804                 wait_cnt = 0;
1805         } else {
1806                 /* accquire the BT TRx retry count from BT_Info byte2 */
1807                 retry_cnt = coex_sta->bt_retry_cnt;
1808                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1809                           "[BTCoex], retry_cnt = %d\n", retry_cnt);
1810                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1811                           "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n",
1812                           up, dn, m, n, wait_cnt);
1813                 result = 0;
1814                 wait_cnt++;
1815                 /* no retry in the last 2-second duration */
1816                 if (retry_cnt == 0) {
1817                         up++;
1818                         dn--;
1819
1820                         if (dn <= 0)
1821                                 dn = 0;
1822
1823                         if (up >= n) {
1824                                 wait_cnt = 0;
1825                                 n = 3;
1826                                 up = 0;
1827                                 dn = 0;
1828                                 result = 1;
1829                                 BTC_PRINT(BTC_MSG_ALGORITHM,
1830                                           ALGO_TRACE_FW_DETAIL,
1831                                           "[BTCoex]Increase wifi duration!!\n");
1832                         }
1833                 } else if (retry_cnt <= 3) {
1834                         up--;
1835                         dn++;
1836
1837                         if (up <= 0)
1838                                 up = 0;
1839
1840                         if (dn == 2) {
1841                                 if (wait_cnt <= 2)
1842                                         m++;
1843                                 else
1844                                         m = 1;
1845
1846                                 if (m >= 20)
1847                                         m = 20;
1848
1849                                 n = 3 * m;
1850                                 up = 0;
1851                                 dn = 0;
1852                                 wait_cnt = 0;
1853                                 result = -1;
1854                                 BTC_PRINT(BTC_MSG_ALGORITHM,
1855                                           ALGO_TRACE_FW_DETAIL,
1856                                           "Reduce wifi duration for retry<3\n");
1857                         }
1858                 } else {
1859                         if (wait_cnt == 1)
1860                                 m++;
1861                         else
1862                                 m = 1;
1863
1864                         if (m >= 20)
1865                                 m = 20;
1866
1867                         n = 3*m;
1868                         up = 0;
1869                         dn = 0;
1870                         wait_cnt = 0;
1871                         result = -1;
1872                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1873                                   "Decrease wifi duration for retryCounter>3!!\n");
1874                 }
1875
1876                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1877                           "[BTCoex], max Interval = %d\n", max_interval);
1878                 if (max_interval == 1) {
1879                         if (tx_pause) {
1880                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1881                                           "[BTCoex], TxPause = 1\n");
1882
1883                                 if (coex_dm->cur_ps_tdma == 71) {
1884                                         halbtc8192e2ant_ps_tdma(btcoexist,
1885                                                                 NORMAL_EXEC,
1886                                                                 true, 5);
1887                                         coex_dm->ps_tdma_du_adj_type = 5;
1888                                 } else if (coex_dm->cur_ps_tdma == 1) {
1889                                         halbtc8192e2ant_ps_tdma(btcoexist,
1890                                                                 NORMAL_EXEC,
1891                                                                 true, 5);
1892                                         coex_dm->ps_tdma_du_adj_type = 5;
1893                                 } else if (coex_dm->cur_ps_tdma == 2) {
1894                                         halbtc8192e2ant_ps_tdma(btcoexist,
1895                                                                 NORMAL_EXEC,
1896                                                                 true, 6);
1897                                         coex_dm->ps_tdma_du_adj_type = 6;
1898                                 } else if (coex_dm->cur_ps_tdma == 3) {
1899                                         halbtc8192e2ant_ps_tdma(btcoexist,
1900                                                                 NORMAL_EXEC,
1901                                                                 true, 7);
1902                                         coex_dm->ps_tdma_du_adj_type = 7;
1903                                 } else if (coex_dm->cur_ps_tdma == 4) {
1904                                         halbtc8192e2ant_ps_tdma(btcoexist,
1905                                                                 NORMAL_EXEC,
1906                                                                 true, 8);
1907                                         coex_dm->ps_tdma_du_adj_type = 8;
1908                                 }
1909                                 if (coex_dm->cur_ps_tdma == 9) {
1910                                         halbtc8192e2ant_ps_tdma(btcoexist,
1911                                                                 NORMAL_EXEC,
1912                                                                 true, 13);
1913                                         coex_dm->ps_tdma_du_adj_type = 13;
1914                                 } else if (coex_dm->cur_ps_tdma == 10) {
1915                                         halbtc8192e2ant_ps_tdma(btcoexist,
1916                                                                 NORMAL_EXEC,
1917                                                                 true, 14);
1918                                         coex_dm->ps_tdma_du_adj_type = 14;
1919                                 } else if (coex_dm->cur_ps_tdma == 11) {
1920                                         halbtc8192e2ant_ps_tdma(btcoexist,
1921                                                                 NORMAL_EXEC,
1922                                                                 true, 15);
1923                                         coex_dm->ps_tdma_du_adj_type = 15;
1924                                 } else if (coex_dm->cur_ps_tdma == 12) {
1925                                         halbtc8192e2ant_ps_tdma(btcoexist,
1926                                                                 NORMAL_EXEC,
1927                                                                 true, 16);
1928                                         coex_dm->ps_tdma_du_adj_type = 16;
1929                                 }
1930
1931                                 if (result == -1) {
1932                                         if (coex_dm->cur_ps_tdma == 5) {
1933                                                 halbtc8192e2ant_ps_tdma(
1934                                                                     btcoexist,
1935                                                                     NORMAL_EXEC,
1936                                                                     true, 6);
1937                                                 coex_dm->ps_tdma_du_adj_type =
1938                                                                              6;
1939                                         } else if (coex_dm->cur_ps_tdma == 6) {
1940                                                 halbtc8192e2ant_ps_tdma(
1941                                                                     btcoexist,
1942                                                                     NORMAL_EXEC,
1943                                                                     true, 7);
1944                                                 coex_dm->ps_tdma_du_adj_type =
1945                                                                              7;
1946                                         } else if (coex_dm->cur_ps_tdma == 7) {
1947                                                 halbtc8192e2ant_ps_tdma(
1948                                                                     btcoexist,
1949                                                                     NORMAL_EXEC,
1950                                                                     true, 8);
1951                                                 coex_dm->ps_tdma_du_adj_type =
1952                                                                              8;
1953                                         } else if (coex_dm->cur_ps_tdma == 13) {
1954                                                 halbtc8192e2ant_ps_tdma(
1955                                                                     btcoexist,
1956                                                                     NORMAL_EXEC,
1957                                                                     true, 14);
1958                                                 coex_dm->ps_tdma_du_adj_type =
1959                                                                              14;
1960                                         } else if (coex_dm->cur_ps_tdma == 14) {
1961                                                 halbtc8192e2ant_ps_tdma(
1962                                                                     btcoexist,
1963                                                                     NORMAL_EXEC,
1964                                                                     true, 15);
1965                                                 coex_dm->ps_tdma_du_adj_type =
1966                                                                              15;
1967                                         } else if (coex_dm->cur_ps_tdma == 15) {
1968                                                 halbtc8192e2ant_ps_tdma(
1969                                                                     btcoexist,
1970                                                                     NORMAL_EXEC,
1971                                                                     true, 16);
1972                                                 coex_dm->ps_tdma_du_adj_type =
1973                                                                              16;
1974                                         }
1975                                 } else if (result == 1) {
1976                                         if (coex_dm->cur_ps_tdma == 8) {
1977                                                 halbtc8192e2ant_ps_tdma(
1978                                                                     btcoexist,
1979                                                                     NORMAL_EXEC,
1980                                                                     true, 7);
1981                                                 coex_dm->ps_tdma_du_adj_type =
1982                                                                              7;
1983                                         } else if (coex_dm->cur_ps_tdma == 7) {
1984                                                 halbtc8192e2ant_ps_tdma(
1985                                                                     btcoexist,
1986                                                                     NORMAL_EXEC,
1987                                                                     true, 6);
1988                                                 coex_dm->ps_tdma_du_adj_type =
1989                                                                              6;
1990                                         } else if (coex_dm->cur_ps_tdma == 6) {
1991                                                 halbtc8192e2ant_ps_tdma(
1992                                                                     btcoexist,
1993                                                                     NORMAL_EXEC,
1994                                                                     true, 5);
1995                                                 coex_dm->ps_tdma_du_adj_type =
1996                                                                              5;
1997                                         } else if (coex_dm->cur_ps_tdma == 16) {
1998                                                 halbtc8192e2ant_ps_tdma(
1999                                                                     btcoexist,
2000                                                                     NORMAL_EXEC,
2001                                                                     true, 15);
2002                                                 coex_dm->ps_tdma_du_adj_type =
2003                                                                              15;
2004                                         } else if (coex_dm->cur_ps_tdma == 15) {
2005                                                 halbtc8192e2ant_ps_tdma(
2006                                                                     btcoexist,
2007                                                                     NORMAL_EXEC,
2008                                                                     true, 14);
2009                                                 coex_dm->ps_tdma_du_adj_type =
2010                                                                              14;
2011                                         } else if (coex_dm->cur_ps_tdma == 14) {
2012                                                 halbtc8192e2ant_ps_tdma(
2013                                                                     btcoexist,
2014                                                                     NORMAL_EXEC,
2015                                                                     true, 13);
2016                                                 coex_dm->ps_tdma_du_adj_type =
2017                                                                              13;
2018                                         }
2019                                 }
2020                         } else {
2021                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2022                                           ALGO_TRACE_FW_DETAIL,
2023                                           "[BTCoex], TxPause = 0\n");
2024                                 if (coex_dm->cur_ps_tdma == 5) {
2025                                         halbtc8192e2ant_ps_tdma(btcoexist,
2026                                                                 NORMAL_EXEC,
2027                                                                 true, 71);
2028                                         coex_dm->ps_tdma_du_adj_type = 71;
2029                                 } else if (coex_dm->cur_ps_tdma == 6) {
2030                                         halbtc8192e2ant_ps_tdma(btcoexist,
2031                                                                 NORMAL_EXEC,
2032                                                                 true, 2);
2033                                         coex_dm->ps_tdma_du_adj_type = 2;
2034                                 } else if (coex_dm->cur_ps_tdma == 7) {
2035                                         halbtc8192e2ant_ps_tdma(btcoexist,
2036                                                                 NORMAL_EXEC,
2037                                                                 true, 3);
2038                                         coex_dm->ps_tdma_du_adj_type = 3;
2039                                 } else if (coex_dm->cur_ps_tdma == 8) {
2040                                         halbtc8192e2ant_ps_tdma(btcoexist,
2041                                                                 NORMAL_EXEC,
2042                                                                 true, 4);
2043                                         coex_dm->ps_tdma_du_adj_type = 4;
2044                                 }
2045                                 if (coex_dm->cur_ps_tdma == 13) {
2046                                         halbtc8192e2ant_ps_tdma(btcoexist,
2047                                                                 NORMAL_EXEC,
2048                                                                 true, 9);
2049                                         coex_dm->ps_tdma_du_adj_type = 9;
2050                                 } else if (coex_dm->cur_ps_tdma == 14) {
2051                                         halbtc8192e2ant_ps_tdma(btcoexist,
2052                                                                 NORMAL_EXEC,
2053                                                                 true, 10);
2054                                         coex_dm->ps_tdma_du_adj_type = 10;
2055                                 } else if (coex_dm->cur_ps_tdma == 15) {
2056                                         halbtc8192e2ant_ps_tdma(btcoexist,
2057                                                                 NORMAL_EXEC,
2058                                                                 true, 11);
2059                                         coex_dm->ps_tdma_du_adj_type = 11;
2060                                 } else if (coex_dm->cur_ps_tdma == 16) {
2061                                         halbtc8192e2ant_ps_tdma(btcoexist,
2062                                                                 NORMAL_EXEC,
2063                                                                 true, 12);
2064                                         coex_dm->ps_tdma_du_adj_type = 12;
2065                                 }
2066
2067                                 if (result == -1) {
2068                                         if (coex_dm->cur_ps_tdma == 71) {
2069                                                 halbtc8192e2ant_ps_tdma(
2070                                                                     btcoexist,
2071                                                                     NORMAL_EXEC,
2072                                                                     true, 1);
2073                                                 coex_dm->ps_tdma_du_adj_type =
2074                                                                              1;
2075                                         } else if (coex_dm->cur_ps_tdma == 1) {
2076                                                 halbtc8192e2ant_ps_tdma(
2077                                                                     btcoexist,
2078                                                                     NORMAL_EXEC,
2079                                                                     true, 2);
2080                                                 coex_dm->ps_tdma_du_adj_type =
2081                                                                              2;
2082                                         } else if (coex_dm->cur_ps_tdma == 2) {
2083                                                 halbtc8192e2ant_ps_tdma(
2084                                                                     btcoexist,
2085                                                                     NORMAL_EXEC,
2086                                                                     true, 3);
2087                                                 coex_dm->ps_tdma_du_adj_type =
2088                                                                              3;
2089                                         } else if (coex_dm->cur_ps_tdma == 3) {
2090                                                 halbtc8192e2ant_ps_tdma(
2091                                                                     btcoexist,
2092                                                                     NORMAL_EXEC,
2093                                                                     true, 4);
2094                                                 coex_dm->ps_tdma_du_adj_type =
2095                                                                              4;
2096                                         } else if (coex_dm->cur_ps_tdma == 9) {
2097                                                 halbtc8192e2ant_ps_tdma(
2098                                                                     btcoexist,
2099                                                                     NORMAL_EXEC,
2100                                                                     true, 10);
2101                                                 coex_dm->ps_tdma_du_adj_type =
2102                                                                              10;
2103                                         } else if (coex_dm->cur_ps_tdma == 10) {
2104                                                 halbtc8192e2ant_ps_tdma(
2105                                                                     btcoexist,
2106                                                                     NORMAL_EXEC,
2107                                                                     true, 11);
2108                                                 coex_dm->ps_tdma_du_adj_type =
2109                                                                              11;
2110                                         } else if (coex_dm->cur_ps_tdma == 11) {
2111                                                 halbtc8192e2ant_ps_tdma(
2112                                                                     btcoexist,
2113                                                                     NORMAL_EXEC,
2114                                                                     true, 12);
2115                                                 coex_dm->ps_tdma_du_adj_type =
2116                                                                              12;
2117                                         }
2118                                 } else if (result == 1) {
2119                                         if (coex_dm->cur_ps_tdma == 4) {
2120                                                 halbtc8192e2ant_ps_tdma(
2121                                                                     btcoexist,
2122                                                                     NORMAL_EXEC,
2123                                                                     true, 3);
2124                                                 coex_dm->ps_tdma_du_adj_type =
2125                                                                              3;
2126                                         } else if (coex_dm->cur_ps_tdma == 3) {
2127                                                 halbtc8192e2ant_ps_tdma(
2128                                                                     btcoexist,
2129                                                                     NORMAL_EXEC,
2130                                                                     true, 2);
2131                                                 coex_dm->ps_tdma_du_adj_type =
2132                                                                              2;
2133                                         } else if (coex_dm->cur_ps_tdma == 2) {
2134                                                 halbtc8192e2ant_ps_tdma(
2135                                                                     btcoexist,
2136                                                                     NORMAL_EXEC,
2137                                                                     true, 1);
2138                                                 coex_dm->ps_tdma_du_adj_type =
2139                                                                              1;
2140                                         } else if (coex_dm->cur_ps_tdma == 1) {
2141                                                 halbtc8192e2ant_ps_tdma(
2142                                                                     btcoexist,
2143                                                                     NORMAL_EXEC,
2144                                                                     true, 71);
2145                                                 coex_dm->ps_tdma_du_adj_type =
2146                                                                              71;
2147                                         } else if (coex_dm->cur_ps_tdma == 12) {
2148                                                 halbtc8192e2ant_ps_tdma(
2149                                                                     btcoexist,
2150                                                                     NORMAL_EXEC,
2151                                                                     true, 11);
2152                                                 coex_dm->ps_tdma_du_adj_type =
2153                                                                              11;
2154                                         } else if (coex_dm->cur_ps_tdma == 11) {
2155                                                 halbtc8192e2ant_ps_tdma(
2156                                                                     btcoexist,
2157                                                                     NORMAL_EXEC,
2158                                                                     true, 10);
2159                                                 coex_dm->ps_tdma_du_adj_type =
2160                                                                              10;
2161                                         } else if (coex_dm->cur_ps_tdma == 10) {
2162                                                 halbtc8192e2ant_ps_tdma(
2163                                                                     btcoexist,
2164                                                                     NORMAL_EXEC,
2165                                                                     true, 9);
2166                                                 coex_dm->ps_tdma_du_adj_type =
2167                                                                              9;
2168                                         }
2169                                 }
2170                         }
2171                 } else if (max_interval == 2) {
2172                         if (tx_pause) {
2173                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2174                                           ALGO_TRACE_FW_DETAIL,
2175                                           "[BTCoex], TxPause = 1\n");
2176                                 if (coex_dm->cur_ps_tdma == 1) {
2177                                         halbtc8192e2ant_ps_tdma(btcoexist,
2178                                                                 NORMAL_EXEC,
2179                                                                 true, 6);
2180                                         coex_dm->ps_tdma_du_adj_type = 6;
2181                                 } else if (coex_dm->cur_ps_tdma == 2) {
2182                                         halbtc8192e2ant_ps_tdma(btcoexist,
2183                                                                 NORMAL_EXEC,
2184                                                                 true, 6);
2185                                         coex_dm->ps_tdma_du_adj_type = 6;
2186                                 } else if (coex_dm->cur_ps_tdma == 3) {
2187                                         halbtc8192e2ant_ps_tdma(btcoexist,
2188                                                                 NORMAL_EXEC,
2189                                                                 true, 7);
2190                                         coex_dm->ps_tdma_du_adj_type = 7;
2191                                 } else if (coex_dm->cur_ps_tdma == 4) {
2192                                         halbtc8192e2ant_ps_tdma(btcoexist,
2193                                                                 NORMAL_EXEC,
2194                                                                 true, 8);
2195                                         coex_dm->ps_tdma_du_adj_type = 8;
2196                                 }
2197                                 if (coex_dm->cur_ps_tdma == 9) {
2198                                         halbtc8192e2ant_ps_tdma(btcoexist,
2199                                                                 NORMAL_EXEC,
2200                                                                 true, 14);
2201                                         coex_dm->ps_tdma_du_adj_type = 14;
2202                                 } else if (coex_dm->cur_ps_tdma == 10) {
2203                                         halbtc8192e2ant_ps_tdma(btcoexist,
2204                                                                 NORMAL_EXEC,
2205                                                                 true, 14);
2206                                         coex_dm->ps_tdma_du_adj_type = 14;
2207                                 } else if (coex_dm->cur_ps_tdma == 11) {
2208                                         halbtc8192e2ant_ps_tdma(btcoexist,
2209                                                                 NORMAL_EXEC,
2210                                                                 true, 15);
2211                                         coex_dm->ps_tdma_du_adj_type = 15;
2212                                 } else if (coex_dm->cur_ps_tdma == 12) {
2213                                         halbtc8192e2ant_ps_tdma(btcoexist,
2214                                                                 NORMAL_EXEC,
2215                                                                 true, 16);
2216                                         coex_dm->ps_tdma_du_adj_type = 16;
2217                                 }
2218                                 if (result == -1) {
2219                                         if (coex_dm->cur_ps_tdma == 5) {
2220                                                 halbtc8192e2ant_ps_tdma(
2221                                                                     btcoexist,
2222                                                                     NORMAL_EXEC,
2223                                                                     true, 6);
2224                                                 coex_dm->ps_tdma_du_adj_type =
2225                                                                              6;
2226                                         } else if (coex_dm->cur_ps_tdma == 6) {
2227                                                 halbtc8192e2ant_ps_tdma(
2228                                                                     btcoexist,
2229                                                                     NORMAL_EXEC,
2230                                                                     true, 7);
2231                                                 coex_dm->ps_tdma_du_adj_type =
2232                                                                              7;
2233                                         } else if (coex_dm->cur_ps_tdma == 7) {
2234                                                 halbtc8192e2ant_ps_tdma(
2235                                                                     btcoexist,
2236                                                                     NORMAL_EXEC,
2237                                                                     true, 8);
2238                                                 coex_dm->ps_tdma_du_adj_type =
2239                                                                              8;
2240                                         } else if (coex_dm->cur_ps_tdma == 13) {
2241                                                 halbtc8192e2ant_ps_tdma(
2242                                                                     btcoexist,
2243                                                                     NORMAL_EXEC,
2244                                                                     true, 14);
2245                                                 coex_dm->ps_tdma_du_adj_type =
2246                                                                              14;
2247                                         } else if (coex_dm->cur_ps_tdma == 14) {
2248                                                 halbtc8192e2ant_ps_tdma(
2249                                                                     btcoexist,
2250                                                                     NORMAL_EXEC,
2251                                                                     true, 15);
2252                                                 coex_dm->ps_tdma_du_adj_type =
2253                                                                              15;
2254                                         } else if (coex_dm->cur_ps_tdma == 15) {
2255                                                 halbtc8192e2ant_ps_tdma(
2256                                                                     btcoexist,
2257                                                                     NORMAL_EXEC,
2258                                                                     true, 16);
2259                                                 coex_dm->ps_tdma_du_adj_type =
2260                                                                              16;
2261                                         }
2262                                 } else if (result == 1) {
2263                                         if (coex_dm->cur_ps_tdma == 8) {
2264                                                 halbtc8192e2ant_ps_tdma(
2265                                                                     btcoexist,
2266                                                                     NORMAL_EXEC,
2267                                                                     true, 7);
2268                                                 coex_dm->ps_tdma_du_adj_type =
2269                                                                              7;
2270                                         } else if (coex_dm->cur_ps_tdma == 7) {
2271                                                 halbtc8192e2ant_ps_tdma(
2272                                                                     btcoexist,
2273                                                                     NORMAL_EXEC,
2274                                                                     true, 6);
2275                                                 coex_dm->ps_tdma_du_adj_type =
2276                                                                              6;
2277                                         } else if (coex_dm->cur_ps_tdma == 6) {
2278                                                 halbtc8192e2ant_ps_tdma(
2279                                                                     btcoexist,
2280                                                                     NORMAL_EXEC,
2281                                                                     true, 6);
2282                                                 coex_dm->ps_tdma_du_adj_type =
2283                                                                              6;
2284                                         } else if (coex_dm->cur_ps_tdma == 16) {
2285                                                 halbtc8192e2ant_ps_tdma(
2286                                                                     btcoexist,
2287                                                                     NORMAL_EXEC,
2288                                                                     true, 15);
2289                                                 coex_dm->ps_tdma_du_adj_type =
2290                                                                              15;
2291                                         } else if (coex_dm->cur_ps_tdma == 15) {
2292                                                 halbtc8192e2ant_ps_tdma(
2293                                                                     btcoexist,
2294                                                                     NORMAL_EXEC,
2295                                                                     true, 14);
2296                                                 coex_dm->ps_tdma_du_adj_type =
2297                                                                              14;
2298                                         } else if (coex_dm->cur_ps_tdma == 14) {
2299                                                 halbtc8192e2ant_ps_tdma(
2300                                                                     btcoexist,
2301                                                                     NORMAL_EXEC,
2302                                                                     true, 14);
2303                                                 coex_dm->ps_tdma_du_adj_type =
2304                                                                              14;
2305                                         }
2306                                 }
2307                         } else {
2308                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2309                                           ALGO_TRACE_FW_DETAIL,
2310                                           "[BTCoex], TxPause = 0\n");
2311                                 if (coex_dm->cur_ps_tdma == 5) {
2312                                         halbtc8192e2ant_ps_tdma(btcoexist,
2313                                                                 NORMAL_EXEC,
2314                                                                 true, 2);
2315                                         coex_dm->ps_tdma_du_adj_type = 2;
2316                                 } else if (coex_dm->cur_ps_tdma == 6) {
2317                                         halbtc8192e2ant_ps_tdma(btcoexist,
2318                                                                 NORMAL_EXEC,
2319                                                                 true, 2);
2320                                         coex_dm->ps_tdma_du_adj_type = 2;
2321                                 } else if (coex_dm->cur_ps_tdma == 7) {
2322                                         halbtc8192e2ant_ps_tdma(btcoexist,
2323                                                                 NORMAL_EXEC,
2324                                                                 true, 3);
2325                                         coex_dm->ps_tdma_du_adj_type = 3;
2326                                 } else if (coex_dm->cur_ps_tdma == 8) {
2327                                         halbtc8192e2ant_ps_tdma(btcoexist,
2328                                                                 NORMAL_EXEC,
2329                                                                 true, 4);
2330                                         coex_dm->ps_tdma_du_adj_type = 4;
2331                                 }
2332                                 if (coex_dm->cur_ps_tdma == 13) {
2333                                         halbtc8192e2ant_ps_tdma(btcoexist,
2334                                                                 NORMAL_EXEC,
2335                                                                 true, 10);
2336                                         coex_dm->ps_tdma_du_adj_type = 10;
2337                                 } else if (coex_dm->cur_ps_tdma == 14) {
2338                                         halbtc8192e2ant_ps_tdma(btcoexist,
2339                                                                 NORMAL_EXEC,
2340                                                                 true, 10);
2341                                         coex_dm->ps_tdma_du_adj_type = 10;
2342                                 } else if (coex_dm->cur_ps_tdma == 15) {
2343                                         halbtc8192e2ant_ps_tdma(btcoexist,
2344                                                                 NORMAL_EXEC,
2345                                                                 true, 11);
2346                                         coex_dm->ps_tdma_du_adj_type = 11;
2347                                 } else if (coex_dm->cur_ps_tdma == 16) {
2348                                         halbtc8192e2ant_ps_tdma(btcoexist,
2349                                                                 NORMAL_EXEC,
2350                                                                 true, 12);
2351                                         coex_dm->ps_tdma_du_adj_type = 12;
2352                                 }
2353                                 if (result == -1) {
2354                                         if (coex_dm->cur_ps_tdma == 1) {
2355                                                 halbtc8192e2ant_ps_tdma(
2356                                                                     btcoexist,
2357                                                                     NORMAL_EXEC,
2358                                                                     true, 2);
2359                                                 coex_dm->ps_tdma_du_adj_type =
2360                                                                              2;
2361                                         } else if (coex_dm->cur_ps_tdma == 2) {
2362                                                 halbtc8192e2ant_ps_tdma(
2363                                                                     btcoexist,
2364                                                                     NORMAL_EXEC,
2365                                                                     true, 3);
2366                                                 coex_dm->ps_tdma_du_adj_type =
2367                                                                              3;
2368                                         } else if (coex_dm->cur_ps_tdma == 3) {
2369                                                 halbtc8192e2ant_ps_tdma(
2370                                                                     btcoexist,
2371                                                                     NORMAL_EXEC,
2372                                                                     true, 4);
2373                                                 coex_dm->ps_tdma_du_adj_type =
2374                                                                              4;
2375                                         } else if (coex_dm->cur_ps_tdma == 9) {
2376                                                 halbtc8192e2ant_ps_tdma(
2377                                                                     btcoexist,
2378                                                                     NORMAL_EXEC,
2379                                                                     true, 10);
2380                                                 coex_dm->ps_tdma_du_adj_type =
2381                                                                              10;
2382                                         } else if (coex_dm->cur_ps_tdma == 10) {
2383                                                 halbtc8192e2ant_ps_tdma(
2384                                                                     btcoexist,
2385                                                                     NORMAL_EXEC,
2386                                                                     true, 11);
2387                                                 coex_dm->ps_tdma_du_adj_type =
2388                                                                              11;
2389                                         } else if (coex_dm->cur_ps_tdma == 11) {
2390                                                 halbtc8192e2ant_ps_tdma(
2391                                                                     btcoexist,
2392                                                                     NORMAL_EXEC,
2393                                                                     true, 12);
2394                                                 coex_dm->ps_tdma_du_adj_type =
2395                                                                              12;
2396                                         }
2397                                 } else if (result == 1) {
2398                                         if (coex_dm->cur_ps_tdma == 4) {
2399                                                 halbtc8192e2ant_ps_tdma(
2400                                                                     btcoexist,
2401                                                                     NORMAL_EXEC,
2402                                                                     true, 3);
2403                                                 coex_dm->ps_tdma_du_adj_type =
2404                                                                              3;
2405                                         } else if (coex_dm->cur_ps_tdma == 3) {
2406                                                 halbtc8192e2ant_ps_tdma(
2407                                                                     btcoexist,
2408                                                                     NORMAL_EXEC,
2409                                                                     true, 2);
2410                                                 coex_dm->ps_tdma_du_adj_type =
2411                                                                              2;
2412                                         } else if (coex_dm->cur_ps_tdma == 2) {
2413                                                 halbtc8192e2ant_ps_tdma(
2414                                                                     btcoexist,
2415                                                                     NORMAL_EXEC,
2416                                                                     true, 2);
2417                                                 coex_dm->ps_tdma_du_adj_type =
2418                                                                              2;
2419                                         } else if(coex_dm->cur_ps_tdma == 12) {
2420                                                 halbtc8192e2ant_ps_tdma(
2421                                                                     btcoexist,
2422                                                                     NORMAL_EXEC,
2423                                                                     true, 11);
2424                                                 coex_dm->ps_tdma_du_adj_type =
2425                                                                              11;
2426                                         } else if(coex_dm->cur_ps_tdma == 11) {
2427                                                 halbtc8192e2ant_ps_tdma(
2428                                                                     btcoexist,
2429                                                                     NORMAL_EXEC,
2430                                                                     true, 10);
2431                                                 coex_dm->ps_tdma_du_adj_type =
2432                                                                              10;
2433                                         } else if(coex_dm->cur_ps_tdma == 10) {
2434                                                 halbtc8192e2ant_ps_tdma(
2435                                                                     btcoexist,
2436                                                                     NORMAL_EXEC,
2437                                                                     true, 10);
2438                                                 coex_dm->ps_tdma_du_adj_type =
2439                                                                              10;
2440                                         }
2441                                 }
2442                         }
2443                 } else if (max_interval == 3) {
2444                         if (tx_pause) {
2445                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2446                                           ALGO_TRACE_FW_DETAIL,
2447                                           "[BTCoex], TxPause = 1\n");
2448                                 if (coex_dm->cur_ps_tdma == 1) {
2449                                         halbtc8192e2ant_ps_tdma(btcoexist,
2450                                                                 NORMAL_EXEC,
2451                                                                 true, 7);
2452                                         coex_dm->ps_tdma_du_adj_type = 7;
2453                                 } else if (coex_dm->cur_ps_tdma == 2) {
2454                                         halbtc8192e2ant_ps_tdma(btcoexist,
2455                                                                 NORMAL_EXEC,
2456                                                                 true, 7);
2457                                         coex_dm->ps_tdma_du_adj_type = 7;
2458                                 } else if (coex_dm->cur_ps_tdma == 3) {
2459                                         halbtc8192e2ant_ps_tdma(btcoexist,
2460                                                                 NORMAL_EXEC,
2461                                                                 true, 7);
2462                                         coex_dm->ps_tdma_du_adj_type = 7;
2463                                 } else if (coex_dm->cur_ps_tdma == 4) {
2464                                         halbtc8192e2ant_ps_tdma(btcoexist,
2465                                                                 NORMAL_EXEC,
2466                                                                 true, 8);
2467                                         coex_dm->ps_tdma_du_adj_type = 8;
2468                                 }
2469                                 if (coex_dm->cur_ps_tdma == 9) {
2470                                         halbtc8192e2ant_ps_tdma(btcoexist,
2471                                                                 NORMAL_EXEC,
2472                                                                 true, 15);
2473                                         coex_dm->ps_tdma_du_adj_type = 15;
2474                                 } else if (coex_dm->cur_ps_tdma == 10) {
2475                                         halbtc8192e2ant_ps_tdma(btcoexist,
2476                                                                 NORMAL_EXEC,
2477                                                                 true, 15);
2478                                         coex_dm->ps_tdma_du_adj_type = 15;
2479                                 } else if (coex_dm->cur_ps_tdma == 11) {
2480                                         halbtc8192e2ant_ps_tdma(btcoexist,
2481                                                                 NORMAL_EXEC,
2482                                                                 true, 15);
2483                                         coex_dm->ps_tdma_du_adj_type = 15;
2484                                 } else if (coex_dm->cur_ps_tdma == 12) {
2485                                         halbtc8192e2ant_ps_tdma(btcoexist,
2486                                                                 NORMAL_EXEC,
2487                                                                 true, 16);
2488                                         coex_dm->ps_tdma_du_adj_type = 16;
2489                                 }
2490                                 if (result == -1) {
2491                                         if (coex_dm->cur_ps_tdma == 5) {
2492                                                 halbtc8192e2ant_ps_tdma(
2493                                                                     btcoexist,
2494                                                                     NORMAL_EXEC,
2495                                                                     true, 7);
2496                                                 coex_dm->ps_tdma_du_adj_type =
2497                                                                              7;
2498                                         } else if (coex_dm->cur_ps_tdma == 6) {
2499                                                 halbtc8192e2ant_ps_tdma(
2500                                                                     btcoexist,
2501                                                                     NORMAL_EXEC,
2502                                                                     true, 7);
2503                                                 coex_dm->ps_tdma_du_adj_type =
2504                                                                              7;
2505                                         } else if (coex_dm->cur_ps_tdma == 7) {
2506                                                 halbtc8192e2ant_ps_tdma(
2507                                                                     btcoexist,
2508                                                                     NORMAL_EXEC,
2509                                                                     true, 8);
2510                                                 coex_dm->ps_tdma_du_adj_type =
2511                                                                              8;
2512                                         } else if (coex_dm->cur_ps_tdma == 13) {
2513                                                 halbtc8192e2ant_ps_tdma(
2514                                                                     btcoexist,
2515                                                                     NORMAL_EXEC,
2516                                                                     true, 15);
2517                                                 coex_dm->ps_tdma_du_adj_type =
2518                                                                              15;
2519                                         } else if (coex_dm->cur_ps_tdma == 14) {
2520                                                 halbtc8192e2ant_ps_tdma(
2521                                                                     btcoexist,
2522                                                                     NORMAL_EXEC,
2523                                                                     true, 15);
2524                                                 coex_dm->ps_tdma_du_adj_type =
2525                                                                              15;
2526                                         } else if (coex_dm->cur_ps_tdma == 15) {
2527                                                 halbtc8192e2ant_ps_tdma(
2528                                                                     btcoexist,
2529                                                                     NORMAL_EXEC,
2530                                                                     true, 16);
2531                                                 coex_dm->ps_tdma_du_adj_type =
2532                                                                              16;
2533                                         }
2534                                 } else if (result == 1) {
2535                                         if (coex_dm->cur_ps_tdma == 8) {
2536                                                 halbtc8192e2ant_ps_tdma(
2537                                                                     btcoexist,
2538                                                                     NORMAL_EXEC,
2539                                                                     true, 7);
2540                                                 coex_dm->ps_tdma_du_adj_type =
2541                                                                              7;
2542                                         } else if (coex_dm->cur_ps_tdma == 7) {
2543                                                 halbtc8192e2ant_ps_tdma(
2544                                                                     btcoexist,
2545                                                                     NORMAL_EXEC,
2546                                                                     true, 7);
2547                                                 coex_dm->ps_tdma_du_adj_type =
2548                                                                              7;
2549                                         } else if (coex_dm->cur_ps_tdma == 6) {
2550                                                 halbtc8192e2ant_ps_tdma(
2551                                                                     btcoexist,
2552                                                                     NORMAL_EXEC,
2553                                                                     true, 7);
2554                                                 coex_dm->ps_tdma_du_adj_type =
2555                                                                              7;
2556                                         } else if (coex_dm->cur_ps_tdma == 16) {
2557                                                 halbtc8192e2ant_ps_tdma(
2558                                                                     btcoexist,
2559                                                                     NORMAL_EXEC,
2560                                                                     true, 15);
2561                                                 coex_dm->ps_tdma_du_adj_type =
2562                                                                              15;
2563                                         } else if (coex_dm->cur_ps_tdma == 15) {
2564                                                 halbtc8192e2ant_ps_tdma(
2565                                                                     btcoexist,
2566                                                                     NORMAL_EXEC,
2567                                                                     true, 15);
2568                                                 coex_dm->ps_tdma_du_adj_type =
2569                                                                              15;
2570                                         } else if (coex_dm->cur_ps_tdma == 14) {
2571                                                 halbtc8192e2ant_ps_tdma(
2572                                                                     btcoexist,
2573                                                                     NORMAL_EXEC,
2574                                                                     true, 15);
2575                                                 coex_dm->ps_tdma_du_adj_type =
2576                                                                              15;
2577                                         }
2578                                 }
2579                         } else {
2580                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2581                                           ALGO_TRACE_FW_DETAIL,
2582                                           "[BTCoex], TxPause = 0\n");
2583                                 if (coex_dm->cur_ps_tdma == 5) {
2584                                         halbtc8192e2ant_ps_tdma(btcoexist,
2585                                                                 NORMAL_EXEC,
2586                                                                 true, 3);
2587                                         coex_dm->ps_tdma_du_adj_type = 3;
2588                                 } else if (coex_dm->cur_ps_tdma == 6) {
2589                                         halbtc8192e2ant_ps_tdma(btcoexist,
2590                                                                 NORMAL_EXEC,
2591                                                                 true, 3);
2592                                         coex_dm->ps_tdma_du_adj_type = 3;
2593                                 } else if (coex_dm->cur_ps_tdma == 7) {
2594                                         halbtc8192e2ant_ps_tdma(btcoexist,
2595                                                                 NORMAL_EXEC,
2596                                                                 true, 3);
2597                                         coex_dm->ps_tdma_du_adj_type = 3;
2598                                 } else if (coex_dm->cur_ps_tdma == 8) {
2599                                         halbtc8192e2ant_ps_tdma(btcoexist,
2600                                                                 NORMAL_EXEC,
2601                                                                 true, 4);
2602                                         coex_dm->ps_tdma_du_adj_type = 4;
2603                                 }
2604                                 if (coex_dm->cur_ps_tdma == 13) {
2605                                         halbtc8192e2ant_ps_tdma(btcoexist,
2606                                                                 NORMAL_EXEC,
2607                                                                 true, 11);
2608                                         coex_dm->ps_tdma_du_adj_type = 11;
2609                                 } else if (coex_dm->cur_ps_tdma == 14) {
2610                                         halbtc8192e2ant_ps_tdma(btcoexist,
2611                                                                 NORMAL_EXEC,
2612                                                                 true, 11);
2613                                         coex_dm->ps_tdma_du_adj_type = 11;
2614                                 } else if (coex_dm->cur_ps_tdma == 15) {
2615                                         halbtc8192e2ant_ps_tdma(btcoexist,
2616                                                                 NORMAL_EXEC,
2617                                                                 true, 11);
2618                                         coex_dm->ps_tdma_du_adj_type = 11;
2619                                 } else if (coex_dm->cur_ps_tdma == 16) {
2620                                         halbtc8192e2ant_ps_tdma(btcoexist,
2621                                                                 NORMAL_EXEC,
2622                                                                 true, 12);
2623                                         coex_dm->ps_tdma_du_adj_type = 12;
2624                                 }
2625                                 if (result == -1) {
2626                                         if (coex_dm->cur_ps_tdma == 1) {
2627                                                 halbtc8192e2ant_ps_tdma(
2628                                                                     btcoexist,
2629                                                                     NORMAL_EXEC,
2630                                                                     true, 3);
2631                                                 coex_dm->ps_tdma_du_adj_type =
2632                                                                              3;
2633                                         } else if (coex_dm->cur_ps_tdma == 2) {
2634                                                 halbtc8192e2ant_ps_tdma(
2635                                                                     btcoexist,
2636                                                                     NORMAL_EXEC,
2637                                                                     true, 3);
2638                                                 coex_dm->ps_tdma_du_adj_type =
2639                                                                              3;
2640                                         } else if (coex_dm->cur_ps_tdma == 3) {
2641                                                 halbtc8192e2ant_ps_tdma(
2642                                                                     btcoexist,
2643                                                                     NORMAL_EXEC,
2644                                                                     true, 4);
2645                                                 coex_dm->ps_tdma_du_adj_type =
2646                                                                              4;
2647                                         } else if (coex_dm->cur_ps_tdma == 9) {
2648                                                 halbtc8192e2ant_ps_tdma(
2649                                                                     btcoexist,
2650                                                                     NORMAL_EXEC,
2651                                                                     true, 11);
2652                                                 coex_dm->ps_tdma_du_adj_type =
2653                                                                              11;
2654                                         } else if (coex_dm->cur_ps_tdma == 10) {
2655                                                 halbtc8192e2ant_ps_tdma(
2656                                                                     btcoexist,
2657                                                                     NORMAL_EXEC,
2658                                                                     true, 11);
2659                                                 coex_dm->ps_tdma_du_adj_type =
2660                                                                              11;
2661                                         } else if (coex_dm->cur_ps_tdma == 11) {
2662                                                 halbtc8192e2ant_ps_tdma(
2663                                                                     btcoexist,
2664                                                                     NORMAL_EXEC,
2665                                                                     true, 12);
2666                                                 coex_dm->ps_tdma_du_adj_type =
2667                                                                              12;
2668                                         }
2669                                 } else if (result == 1) {
2670                                         if (coex_dm->cur_ps_tdma == 4) {
2671                                                 halbtc8192e2ant_ps_tdma(
2672                                                                     btcoexist,
2673                                                                     NORMAL_EXEC,
2674                                                                     true, 3);
2675                                                 coex_dm->ps_tdma_du_adj_type =
2676                                                                              3;
2677                                         } else if (coex_dm->cur_ps_tdma == 3) {
2678                                                 halbtc8192e2ant_ps_tdma(
2679                                                                     btcoexist,
2680                                                                     NORMAL_EXEC,
2681                                                                     true, 3);
2682                                                 coex_dm->ps_tdma_du_adj_type =
2683                                                                              3;
2684                                         } else if (coex_dm->cur_ps_tdma == 2) {
2685                                                 halbtc8192e2ant_ps_tdma(
2686                                                                     btcoexist,
2687                                                                     NORMAL_EXEC,
2688                                                                     true, 3);
2689                                                 coex_dm->ps_tdma_du_adj_type =
2690                                                                              3;
2691                                         } else if (coex_dm->cur_ps_tdma == 12) {
2692                                                 halbtc8192e2ant_ps_tdma(
2693                                                                     btcoexist,
2694                                                                     NORMAL_EXEC,
2695                                                                     true, 11);
2696                                                 coex_dm->ps_tdma_du_adj_type =
2697                                                                              11;
2698                                         } else if (coex_dm->cur_ps_tdma == 11) {
2699                                                 halbtc8192e2ant_ps_tdma(
2700                                                                     btcoexist,
2701                                                                     NORMAL_EXEC,
2702                                                                     true, 11);
2703                                                 coex_dm->ps_tdma_du_adj_type =
2704                                                                              11;
2705                                         } else if (coex_dm->cur_ps_tdma == 10) {
2706                                                 halbtc8192e2ant_ps_tdma(
2707                                                                     btcoexist,
2708                                                                     NORMAL_EXEC,
2709                                                                     true, 11);
2710                                                 coex_dm->ps_tdma_du_adj_type =
2711                                                                              11;
2712                                         }
2713                                 }
2714                         }
2715                 }
2716         }
2717
2718         /* if current PsTdma not match with
2719          * the recorded one (when scan, dhcp...),
2720          * then we have to adjust it back to the previous record one. */
2721         if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2722                 bool scan = false, link = false, roam = false;
2723                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2724                           "[BTCoex], PsTdma type dismatch!!!, " );
2725                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2726                           "curPsTdma=%d, recordPsTdma=%d\n",
2727                           coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2728
2729                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2730                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2731                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2732
2733                 if ( !scan && !link && !roam)
2734                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2735                                                 true,
2736                                                 coex_dm->ps_tdma_du_adj_type);
2737                 else
2738                         BTC_PRINT(BTC_MSG_ALGORITHM,
2739                                   ALGO_TRACE_FW_DETAIL,
2740                                   "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2741         }
2742 }
2743
2744 /* SCO only or SCO+PAN(HS) */
2745 void halbtc8192e2ant_action_sco(struct btc_coexist *btcoexist)
2746 {
2747         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2748         u32 wifi_bw;
2749
2750         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2751
2752         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2753         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2754
2755         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2756
2757         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2758
2759         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2760
2761         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2762             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2763                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2764                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2765         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2766                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2767                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2768                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2769         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2770                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2771                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2772                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2773         }
2774
2775         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2776
2777         /* sw mechanism */
2778         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2779                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2780                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2781                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2782                                                       false, false);
2783                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2784                                                       false, 0x6);
2785                 } else {
2786                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2787                                                       false, false);
2788                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2789                                                       false, 0x6);
2790                 }
2791         } else {
2792                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2793                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2794                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2795                                                       false, false);
2796                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2797                                                       false, 0x6);
2798                 } else {
2799                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2800                                                       false, false);
2801                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2802                                                       false, 0x6);
2803                 }
2804         }
2805 }
2806
2807 void halbtc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
2808 {
2809         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2810         u32 wifi_bw;
2811
2812         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2813
2814         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2815         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2816
2817         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2818
2819         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2820
2821         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2822
2823         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2824             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2825                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2826                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2827         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2828                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2829                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2830                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2831         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2832                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2833                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2834                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2835         }
2836
2837         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2838
2839         /* sw mechanism */
2840         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2841                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2842                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2843                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2844                                                       false, false);
2845                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2846                                                       false, 0x6);
2847                 } else {
2848                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2849                                                       false, false);
2850                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2851                                                       false, 0x6);
2852                 }
2853         } else {
2854                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2855                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2856                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2857                                                       false, false);
2858                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2859                                                       false, 0x6);
2860                 } else {
2861                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2862                                                       false, false);
2863                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2864                                                       false, 0x6);
2865                 }
2866         }
2867 }
2868
2869 void halbtc8192e2ant_action_hid(struct btc_coexist *btcoexist)
2870 {
2871         u8 wifirssi_state, btrssi_state=BTC_RSSI_STATE_HIGH;
2872         u32 wifi_bw;
2873
2874         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2875         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2876
2877         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2878         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2879
2880         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2881
2882         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2883
2884         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2885
2886         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2887             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2888                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2889                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2890         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2891                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2892                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2893                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2894         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2895                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2896                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2897                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2898         }
2899
2900         /* sw mechanism */
2901         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2902                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2903                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2904                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2905                                                       false, false);
2906                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2907                                                       false, 0x18);
2908                 } else {
2909                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2910                                                       false, false);
2911                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2912                                                       false, 0x18);
2913                 }
2914         } else {
2915                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2916                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2917                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2918                                                       false, false);
2919                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2920                                                       false, 0x18);
2921                 } else {
2922                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2923                                                       false, false);
2924                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2925                                                       false, 0x18);
2926                 }
2927         }
2928 }
2929
2930 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2931 void halbtc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
2932 {
2933         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2934         u32 wifi_bw;
2935         bool long_dist = false;
2936
2937         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2938         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2939
2940         if ((btrssi_state == BTC_RSSI_STATE_LOW ||
2941              btrssi_state == BTC_RSSI_STATE_STAY_LOW) &&
2942             (wifirssi_state == BTC_RSSI_STATE_LOW ||
2943              wifirssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2944                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2945                           "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
2946                 long_dist = true;
2947         }
2948         if (long_dist) {
2949                 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 2);
2950                 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
2951                                            0x4);
2952         } else {
2953                 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2954                 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2955                                            0x8);
2956         }
2957
2958         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2959
2960         if (long_dist)
2961                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2962         else
2963                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2964
2965
2966         if (long_dist) {
2967                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
2968                 coex_dm->auto_tdma_adjust = false;
2969                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2970         } else {
2971                 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2972                     (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2973                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2974                                                              true, 1);
2975                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2976                 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2977                            (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2978                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2979                                                              false, 1);
2980                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2981                 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2982                            (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2983                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2984                                                              false, 1);
2985                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2986                 }
2987         }
2988
2989         /* sw mechanism */
2990         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2991         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2992                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2993                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2994                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2995                                                       false, false);
2996                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2997                                                       false, 0x18);
2998                 } else {
2999                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3000                                                       false, false);
3001                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3002                                                       false, 0x18);
3003                 }
3004         } else {
3005                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3006                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3007                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3008                                                       false, false);
3009                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3010                                                       false, 0x18);
3011                 } else {
3012                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3013                                                       false, false);
3014                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3015                                                       false, 0x18);
3016                 }
3017         }
3018 }
3019
3020 void halbtc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
3021 {
3022         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3023         u32 wifi_bw;
3024
3025         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3026         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3027
3028         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3029         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3030
3031         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3032         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3033
3034         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3035             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3036                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
3037                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3038         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3039                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3040                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3041                                                      2);
3042                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3043         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3044                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3045                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3046                                                      2);
3047                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3048         }
3049
3050         /* sw mechanism */
3051         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3052         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3053                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3054                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3055                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3056                                                       false, false);
3057                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3058                                                       true, 0x6);
3059                 } else {
3060                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3061                                                       false, false);
3062                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3063                                                       true, 0x6);
3064                 }
3065         } else {
3066                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3067                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3068                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3069                                                       false, false);
3070                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3071                                                       true, 0x6);
3072                 } else {
3073                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3074                                                       false, false);
3075                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3076                                                       true, 0x6);
3077                 }
3078         }
3079 }
3080
3081 void halbtc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
3082 {
3083         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3084         u32 wifi_bw;
3085
3086         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3087         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3088
3089         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3090         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3091
3092         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3093
3094         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3095
3096         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3097             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3098                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3099                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
3100         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3101                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3102                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3103                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3104         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3105                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3106                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3107                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3108         }
3109
3110         /* sw mechanism */
3111         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3112         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3113                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3114                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3115                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3116                                                       false, false);
3117                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3118                                                       false, 0x18);
3119                 } else {
3120                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3121                                                       false, false);
3122                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3123                                                       false, 0x18);
3124                 }
3125         } else {
3126                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3127                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3128                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3129                                                       false, false);
3130                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3131                                                       false, 0x18);
3132                 } else {
3133                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3134                                                       false, false);
3135                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3136                                                       false, 0x18);
3137                 }
3138         }
3139 }
3140
3141 /* PAN(HS) only */
3142 void halbtc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
3143 {
3144         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3145         u32 wifi_bw;
3146
3147         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3148         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3149
3150         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3151         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3152
3153         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3154
3155         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3156
3157         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3158             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3159                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3160         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3161                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3162                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3163         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3164                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3165                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3166         }
3167         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3168
3169         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3170         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3171                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3172                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3173                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3174                                                       false, false);
3175                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3176                                                       false, 0x18);
3177                 } else {
3178                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3179                                                       false, false);
3180                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3181                                                       false, 0x18);
3182                 }
3183         } else {
3184                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3185                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3186                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3187                                                       false, false);
3188                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3189                                                       false, 0x18);
3190                 } else {
3191                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3192                                                       false, false);
3193                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3194                                                       false, 0x18);
3195                 }
3196         }
3197 }
3198
3199 /* PAN(EDR)+A2DP */
3200 void halbtc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
3201 {
3202         u8 wifirssi_state, btrssi_state=BTC_RSSI_STATE_HIGH;
3203         u32 wifi_bw;
3204
3205         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3206         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3207
3208         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3209         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3210
3211         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3212
3213         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3214
3215         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3216
3217         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3218             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3219                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3220                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
3221         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3222                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3223                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3224                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3225                                                      3);
3226         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3227                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3228                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3229                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3230                                                      3);
3231         }
3232
3233         /* sw mechanism */
3234         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3235                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3236                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3237                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3238                                                       false, false);
3239                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3240                                                       false, 0x18);
3241                 } else {
3242                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3243                                                       false, false);
3244                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3245                                                       false, 0x18);
3246                 }
3247         } else {
3248                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3249                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3250                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3251                                                       false, false);
3252                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3253                                                       false, 0x18);
3254                 } else {
3255                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3256                                                       false, false);
3257                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3258                                                       false, 0x18);
3259                 }
3260         }
3261 }
3262
3263 void halbtc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
3264 {
3265         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3266         u32 wifi_bw;
3267
3268         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3269         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3270
3271         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3272
3273         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3274         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3275
3276         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3277
3278         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3279
3280         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3281             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3282                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3283                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
3284         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3285                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3286                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3287                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3288         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3289                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3290                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3291                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3292         }
3293
3294         /* sw mechanism */
3295         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3296                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3297                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3298                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3299                                                       false, false);
3300                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3301                                                       false, 0x18);
3302                 } else {
3303                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3304                                                       false, false);
3305                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3306                                                       false, 0x18);
3307                 }
3308         } else {
3309                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3310                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3311                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3312                                                       false, false);
3313                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3314                                                       false, 0x18);
3315                 } else {
3316                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3317                                                       false, false);
3318                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3319                                                       false, 0x18);
3320                 }
3321         }
3322 }
3323
3324 /* HID+A2DP+PAN(EDR) */
3325 void halbtc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
3326 {
3327         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3328         u32 wifi_bw;
3329
3330         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3331         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3332
3333         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3334         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3335
3336         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3337
3338         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3339
3340         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3341
3342         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3343            (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3344                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3345                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3346         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3347                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3348                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3349                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3350         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3351                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3352                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3353                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3354         }
3355
3356         /* sw mechanism */
3357         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3358                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3359                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3360                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3361                                                       false, false);
3362                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3363                                                       false, 0x18);
3364                 } else {
3365                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3366                                                       false, false);
3367                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3368                                                       false, 0x18);
3369                 }
3370         } else {
3371                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3372                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3373                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3374                                                       false, false);
3375                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3376                                                       false, 0x18);
3377                 } else {
3378                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3379                                                       false, false);
3380                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3381                                                       false, 0x18);
3382                 }
3383         }
3384 }
3385
3386 void halbtc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
3387 {
3388         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3389         u32 wifi_bw;
3390
3391         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3392         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3393
3394         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3395         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3396
3397         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3398
3399         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3400
3401         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3402             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3403                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3404                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3405         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3406                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM))        {
3407                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3408                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3409         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3410                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3411                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3412                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3413         }
3414
3415         /* sw mechanism */
3416         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3417                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3418                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3419                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3420                                                       false, false);
3421                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3422                                                       false, 0x18);
3423                 } else {
3424                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3425                                                       false, false);
3426                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3427                                                       false, 0x18);
3428                 }
3429         } else {
3430                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3431                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3432                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3433                                                       false, false);
3434                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3435                                                       false, 0x18);
3436                 } else {
3437                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3438                                                       false, false);
3439                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3440                                                       false, 0x18);
3441                 }
3442         }
3443 }
3444
3445 void halbtc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
3446 {
3447         u8 algorithm = 0;
3448
3449         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3450                   "[BTCoex], RunCoexistMechanism()===>\n");
3451
3452         if (btcoexist->manual_control) {
3453                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3454                           "[BTCoex], return for Manual CTRL <===\n");
3455                 return;
3456         }
3457
3458         if (coex_sta->under_ips) {
3459                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3460                           "[BTCoex], wifi is under IPS !!!\n");
3461                 return;
3462         }
3463
3464         algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3465         if (coex_sta->c2h_bt_inquiry_page &&
3466             (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3467                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3468                           "[BTCoex], BT is under inquiry/page scan !!\n");
3469                 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3470                 return;
3471         }
3472
3473         coex_dm->cur_algorithm = algorithm;
3474         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3475                   "[BTCoex], Algorithm = %d \n", coex_dm->cur_algorithm);
3476
3477         if (halbtc8192e2ant_is_common_action(btcoexist)) {
3478                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3479                           "[BTCoex], Action 2-Ant common.\n");
3480                 coex_dm->auto_tdma_adjust = false;
3481         } else {
3482                 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3483                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3484                                   "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n",
3485                                   coex_dm->pre_algorithm,
3486                                   coex_dm->cur_algorithm);
3487                         coex_dm->auto_tdma_adjust = false;
3488                 }
3489                 switch (coex_dm->cur_algorithm) {
3490                 case BT_8192E_2ANT_COEX_ALGO_SCO:
3491                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3492                                   "Action 2-Ant, algorithm = SCO.\n");
3493                         halbtc8192e2ant_action_sco(btcoexist);
3494                         break;
3495                 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3496                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3497                                   "Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3498                         halbtc8192e2ant_action_sco_pan(btcoexist);
3499                         break;
3500                 case BT_8192E_2ANT_COEX_ALGO_HID:
3501                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3502                                   "Action 2-Ant, algorithm = HID.\n");
3503                         halbtc8192e2ant_action_hid(btcoexist);
3504                         break;
3505                 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3506                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3507                                   "Action 2-Ant, algorithm = A2DP.\n");
3508                         halbtc8192e2ant_action_a2dp(btcoexist);
3509                         break;
3510                 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3511                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3512                                   "Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3513                         halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3514                         break;
3515                 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3516                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3517                                   "Action 2-Ant, algorithm = PAN(EDR).\n");
3518                         halbtc8192e2ant_action_pan_edr(btcoexist);
3519                         break;
3520                 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3521                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3522                                   "Action 2-Ant, algorithm = HS mode.\n");
3523                         halbtc8192e2ant_action_pan_hs(btcoexist);
3524                         break;
3525                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3526                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3527                                   "Action 2-Ant, algorithm = PAN+A2DP.\n");
3528                         halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3529                         break;
3530                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3531                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3532                                   "Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3533                         halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3534                         break;
3535                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3536                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3537                                   "Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3538                         halbtc8192e2ant_action_hid_a2dp_pan_edr(btcoexist);
3539                         break;
3540                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3541                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3542                                   "Action 2-Ant, algorithm = HID+A2DP.\n");
3543                         halbtc8192e2ant_action_hid_a2dp(btcoexist);
3544                         break;
3545                 default:
3546                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3547                                   "Action 2-Ant, algorithm = unknown!!\n");
3548                         /* halbtc8192e2ant_coex_alloff(btcoexist); */
3549                         break;
3550                 }
3551                 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3552         }
3553 }
3554
3555 void halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist, bool backup)
3556 {
3557         u16 u16tmp = 0;
3558         u8 u8tmp = 0;
3559
3560         BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3561                   "[BTCoex], 2Ant Init HW Config!!\n");
3562
3563         if (backup) {
3564                 /* backup rf 0x1e value */
3565                 coex_dm->bt_rf0x1e_backup =
3566                         btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A,
3567                                                   0x1e, 0xfffff);
3568
3569                 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3570                                                                       0x430);
3571                 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3572                                                                      0x434);
3573                 coex_dm->backup_retrylimit = btcoexist->btc_read_2byte(
3574                                                                     btcoexist,
3575                                                                     0x42a);
3576                 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
3577                                                                     btcoexist,
3578                                                                     0x456);
3579         }
3580
3581         /* antenna sw ctrl to bt */
3582         btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6);
3583         btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
3584         btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
3585         btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
3586         if (btcoexist->chip_interface == BTC_INTF_USB)
3587                 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
3588         else
3589                 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
3590
3591         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3592
3593         /* antenna switch control parameter */
3594         btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
3595
3596         /* coex parameters */
3597         btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3598         /* 0x790[5:0]=0x5 */
3599         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3600         u8tmp &= 0xc0;
3601         u8tmp |= 0x5;
3602         btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3603
3604         /* enable counter statistics */
3605         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3606
3607         /* enable PTA */
3608         btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3609         /* enable mailbox interface */
3610         u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3611         u16tmp |= BIT9;
3612         btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3613
3614         /* enable PTA I2C mailbox  */
3615         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3616         u8tmp |= BIT4;
3617         btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3618
3619         /* enable bt clock when wifi is disabled. */
3620         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3621         u8tmp |= BIT0;
3622         btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3623         /* enable bt clock when suspend. */
3624         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3625         u8tmp |= BIT0;
3626         btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3627 }
3628
3629 /*************************************************************
3630  *   work around function start with wa_halbtc8192e2ant_
3631  *************************************************************/
3632
3633 /************************************************************
3634  *   extern function start with EXhalbtc8192e2ant_
3635  ************************************************************/
3636
3637 void ex_halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
3638 {
3639         halbtc8192e2ant_init_hwconfig(btcoexist, true);
3640 }
3641
3642 void ex_halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
3643 {
3644         BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3645                   "[BTCoex], Coex Mechanism Init!!\n");
3646         halbtc8192e2ant_init_coex_dm(btcoexist);
3647 }
3648
3649 void ex_halbtc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
3650 {
3651         struct btc_board_info *board_info = &btcoexist->board_info;
3652         struct btc_stack_info*stack_info = &btcoexist->stack_info;
3653         u8 *cli_buf = btcoexist->cli_buf;
3654         u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3655         u16 u16tmp[4];
3656         u32 u32tmp[4];
3657         bool roam = false, scan = false, link = false, wifi_under_5g = false;
3658         bool bt_hson = false, wifi_busy = false;
3659         int wifirssi = 0, bt_hs_rssi = 0;
3660         u32 wifi_bw, wifi_traffic_dir;
3661         u8 wifi_dot11_chnl, wifi_hs_chnl;
3662         u32 fw_ver = 0, bt_patch_ver = 0;
3663
3664         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3665                    "\r\n ============[BT Coexist info]============");
3666         CL_PRINTF(cli_buf);
3667
3668         if (btcoexist->manual_control) {
3669                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3670                            "\r\n ===========[Under Manual Control]===========");
3671                 CL_PRINTF(cli_buf);
3672                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3673                            "\r\n ==========================================");
3674                 CL_PRINTF(cli_buf);
3675         }
3676
3677         if (!board_info->bt_exist) {
3678                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
3679                 CL_PRINTF(cli_buf);
3680                 return;
3681         }
3682
3683         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3684                    "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:",
3685                    board_info->pg_ant_num, board_info->btdm_ant_num);
3686         CL_PRINTF(cli_buf);
3687
3688         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
3689                    "BT stack/ hci ext ver",
3690                    ((stack_info->profile_notified) ? "Yes" : "No"),
3691                    stack_info->hci_version);
3692         CL_PRINTF(cli_buf);
3693
3694         btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3695         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3696         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3697                    "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3698                    "CoexVer/ FwVer/ PatchVer",
3699                    glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3700                    fw_ver, bt_patch_ver, bt_patch_ver);
3701         CL_PRINTF(cli_buf);
3702
3703         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
3704         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
3705                            &wifi_dot11_chnl);
3706         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
3707         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)",
3708                    "Dot11 channel / HsMode(HsChnl)",
3709                    wifi_dot11_chnl, bt_hson, wifi_hs_chnl);
3710         CL_PRINTF(cli_buf);
3711
3712         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3713                    "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info[0],
3714                    coex_dm->wifi_chnl_info[1], coex_dm->wifi_chnl_info[2]);
3715         CL_PRINTF(cli_buf);
3716
3717         btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
3718         btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
3719         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3720                    "Wifi rssi/ HS rssi", wifirssi, bt_hs_rssi);
3721         CL_PRINTF(cli_buf);
3722
3723         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3724         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3725         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3726         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3727                    "Wifi link/ roam/ scan", link, roam, scan);
3728         CL_PRINTF(cli_buf);
3729
3730         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3731         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3732         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3733         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
3734                            &wifi_traffic_dir);
3735         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ",
3736                    "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
3737                    ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
3738                         (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
3739                    ((!wifi_busy) ? "idle" :
3740                         ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
3741                                 "uplink" : "downlink")));
3742         CL_PRINTF(cli_buf);
3743
3744         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3745                    "BT [status/ rssi/ retryCnt]",
3746                    ((btcoexist->bt_info.bt_disabled) ? ("disabled") :
3747                     ((coex_sta->c2h_bt_inquiry_page) ?
3748                      ("inquiry/page scan") :
3749                       ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3750                         coex_dm->bt_status) ? "non-connected idle" :
3751                          ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
3752                            coex_dm->bt_status) ? "connected-idle" : "busy")))),
3753                    coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3754         CL_PRINTF(cli_buf);
3755
3756         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3757                    "SCO/HID/PAN/A2DP", stack_info->sco_exist,
3758                    stack_info->hid_exist, stack_info->pan_exist,
3759                    stack_info->a2dp_exist);
3760         CL_PRINTF(cli_buf);
3761         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3762
3763         bt_info_ext = coex_sta->bt_info_ext;
3764         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3765                    "BT Info A2DP rate",
3766                    (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
3767         CL_PRINTF(cli_buf);
3768
3769         for (i=0; i<BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3770                 if (coex_sta->bt_info_c2h_cnt[i]) {
3771                         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3772                                    "\r\n %-35s = %02x %02x %02x %02x ",
3773                                    GLBtInfoSrc8192e2Ant[i],
3774                                    coex_sta->bt_info_c2h[i][0],
3775                                    coex_sta->bt_info_c2h[i][1],
3776                                    coex_sta->bt_info_c2h[i][2],
3777                                    coex_sta->bt_info_c2h[i][3]);
3778                         CL_PRINTF(cli_buf);
3779                         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3780                                    "%02x %02x %02x(%d)",
3781                                    coex_sta->bt_info_c2h[i][4],
3782                                    coex_sta->bt_info_c2h[i][5],
3783                                    coex_sta->bt_info_c2h[i][6],
3784                                    coex_sta->bt_info_c2h_cnt[i]);
3785                         CL_PRINTF(cli_buf);
3786                 }
3787         }
3788
3789         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s",
3790                    "PS state, IPS/LPS",
3791                    ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
3792                    ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
3793         CL_PRINTF(cli_buf);
3794         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3795
3796         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
3797                    coex_dm->cur_sstype);
3798         CL_PRINTF(cli_buf);
3799
3800         /* Sw mechanism */
3801         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3802                    "============[Sw mechanism]============");
3803         CL_PRINTF(cli_buf);
3804         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3805                    "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
3806                    coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
3807         CL_PRINTF(cli_buf);
3808         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3809                    "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3810                    coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3811                    coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3812         CL_PRINTF(cli_buf);
3813
3814         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask",
3815                    btcoexist->bt_info.ra_mask);
3816         CL_PRINTF(cli_buf);
3817
3818         /* Fw mechanism */
3819         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3820                    "============[Fw mechanism]============");
3821         CL_PRINTF(cli_buf);
3822
3823         ps_tdma_case = coex_dm->cur_ps_tdma;
3824         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3825                    "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3826                    "PS TDMA", coex_dm->ps_tdma_para[0],
3827                    coex_dm->ps_tdma_para[1], coex_dm->ps_tdma_para[2],
3828                    coex_dm->ps_tdma_para[3], coex_dm->ps_tdma_para[4],
3829                    ps_tdma_case, coex_dm->auto_tdma_adjust);
3830         CL_PRINTF(cli_buf);
3831
3832         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3833                    "DecBtPwr/ IgnWlanAct",
3834                    coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
3835         CL_PRINTF(cli_buf);
3836
3837         /* Hw setting */
3838         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3839                    "============[Hw setting]============");
3840         CL_PRINTF(cli_buf);
3841
3842         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3843                    "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
3844         CL_PRINTF(cli_buf);
3845
3846         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3847                    "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
3848                    coex_dm->backup_arfr_cnt2, coex_dm->backup_retrylimit,
3849                    coex_dm->backup_ampdu_maxtime);
3850         CL_PRINTF(cli_buf);
3851
3852         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3853         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3854         u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3855         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3856         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3857                    "0x430/0x434/0x42a/0x456",
3858                    u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3859         CL_PRINTF(cli_buf);
3860
3861         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3862         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3863         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3864         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3865                    "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]);
3866         CL_PRINTF(cli_buf);
3867
3868         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3869         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778",
3870                    u8tmp[0]);
3871         CL_PRINTF(cli_buf);
3872
3873         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3874         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3875         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3876                    "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]);
3877         CL_PRINTF(cli_buf);
3878
3879         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3880         u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3881         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3882                    "0x40/ 0x4f", u8tmp[0], u8tmp[1]);
3883         CL_PRINTF(cli_buf);
3884
3885         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3886         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3887         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3888                    "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
3889         CL_PRINTF(cli_buf);
3890
3891         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3892         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
3893                    u32tmp[0]);
3894         CL_PRINTF(cli_buf);
3895
3896         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3897         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3898         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3899         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3900         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3901                    "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3902                    "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3903                    u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3904         CL_PRINTF(cli_buf);
3905
3906         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3907                    "0x770(hp rx[31:16]/tx[15:0])",
3908                    coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3909         CL_PRINTF(cli_buf);
3910         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3911                    "0x774(lp rx[31:16]/tx[15:0])",
3912                    coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3913         CL_PRINTF(cli_buf);
3914 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3915         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3916 #endif
3917         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3918 }
3919
3920
3921 void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
3922 {
3923         if (BTC_IPS_ENTER == type) {
3924                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3925                           "[BTCoex], IPS ENTER notify\n");
3926                 coex_sta->under_ips = true;
3927                 halbtc8192e2ant_coex_alloff(btcoexist);
3928         } else if (BTC_IPS_LEAVE == type) {
3929                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3930                           "[BTCoex], IPS LEAVE notify\n");
3931                 coex_sta->under_ips = false;
3932         }
3933 }
3934
3935 void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
3936 {
3937         if (BTC_LPS_ENABLE == type) {
3938                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3939                           "[BTCoex], LPS ENABLE notify\n");
3940                 coex_sta->under_lps = true;
3941         } else if (BTC_LPS_DISABLE == type) {
3942                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3943                           "[BTCoex], LPS DISABLE notify\n");
3944                 coex_sta->under_lps = false;
3945         }
3946 }
3947
3948 void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
3949 {
3950         if (BTC_SCAN_START == type)
3951                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3952                           "[BTCoex], SCAN START notify\n");
3953         else if(BTC_SCAN_FINISH == type)
3954                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3955                           "[BTCoex], SCAN FINISH notify\n");
3956 }
3957
3958 void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
3959 {
3960         if (BTC_ASSOCIATE_START == type)
3961                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3962                           "[BTCoex], CONNECT START notify\n");
3963         else if(BTC_ASSOCIATE_FINISH == type)
3964                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3965                           "[BTCoex], CONNECT FINISH notify\n");
3966 }
3967
3968 void ex_halbtc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
3969                                             u8 type)
3970 {
3971         u8 h2c_parameter[3] ={0};
3972         u32 wifi_bw;
3973         u8 wifi_center_chnl;
3974
3975         if (btcoexist->manual_control ||
3976             btcoexist->stop_coex_dm ||
3977             btcoexist->bt_info.bt_disabled)
3978                 return;
3979
3980         if (BTC_MEDIA_CONNECT == type)
3981                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3982                           "[BTCoex], MEDIA connect notify\n");
3983         else
3984                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3985                           "[BTCoex], MEDIA disconnect notify\n");
3986
3987         /* only 2.4G we need to inform bt the chnl mask */
3988         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3989                            &wifi_center_chnl);
3990         if ((BTC_MEDIA_CONNECT == type) &&
3991             (wifi_center_chnl <= 14)) {
3992                 h2c_parameter[0] = 0x1;
3993                 h2c_parameter[1] = wifi_center_chnl;
3994                 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3995                 if (BTC_WIFI_BW_HT40 == wifi_bw)
3996                         h2c_parameter[2] = 0x30;
3997                 else
3998                         h2c_parameter[2] = 0x20;
3999         }
4000
4001         coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
4002         coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
4003         coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
4004
4005         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
4006                   "[BTCoex], FW write 0x66=0x%x\n",
4007                   h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
4008                   h2c_parameter[2]);
4009
4010         btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
4011 }
4012
4013 void ex_halbtc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
4014                                               u8 type)
4015 {
4016         if (type == BTC_PACKET_DHCP)
4017                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4018                           "[BTCoex], DHCP Packet notify\n");
4019  }
4020
4021 void ex_halbtc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
4022                                        u8 *tmp_buf, u8 length )
4023 {
4024         u8 bt_info = 0;
4025         u8 i, rspSource = 0;
4026         bool bt_busy = false, limited_dig = false;
4027         bool wifi_connected = false;
4028
4029         coex_sta->c2h_bt_info_req_sent = false;
4030
4031         rspSource = tmp_buf[0] & 0xf;
4032         if (rspSource >= BT_INFO_SRC_8192E_2ANT_MAX)
4033                 rspSource = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
4034         coex_sta->bt_info_c2h_cnt[rspSource]++;
4035
4036         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4037                   "[BTCoex], Bt info[%d], length=%d, hex data=[",
4038                   rspSource, length);
4039         for (i = 0; i < length; i++) {
4040                 coex_sta->bt_info_c2h[rspSource][i] = tmp_buf[i];
4041                 if (i == 1)
4042                         bt_info = tmp_buf[i];
4043                 if (i == length-1)
4044                         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4045                                   "0x%02x]\n", tmp_buf[i]);
4046                 else
4047                         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4048                                   "0x%02x, ", tmp_buf[i]);
4049         }
4050
4051         if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rspSource) {
4052                 coex_sta->bt_retry_cnt =        /* [3:0] */
4053                         coex_sta->bt_info_c2h[rspSource][2] & 0xf;
4054
4055                 coex_sta->bt_rssi =
4056                         coex_sta->bt_info_c2h[rspSource][3] * 2 + 10;
4057
4058                 coex_sta->bt_info_ext =
4059                         coex_sta->bt_info_c2h[rspSource][4];
4060
4061                 /* Here we need to resend some wifi info to BT
4062                  * because bt is reset and loss of the info. */
4063                 if ((coex_sta->bt_info_ext & BIT1)) {
4064                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4065                                   "bit1, send wifi BW&Chnl to BT!!\n");
4066                         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
4067                                            &wifi_connected);
4068                         if (wifi_connected)
4069                                 ex_halbtc8192e2ant_media_status_notify(
4070                                                         btcoexist,
4071                                                         BTC_MEDIA_CONNECT);
4072                         else
4073                                 ex_halbtc8192e2ant_media_status_notify(
4074                                                         btcoexist,
4075                                                         BTC_MEDIA_DISCONNECT);
4076                 }
4077
4078                 if ((coex_sta->bt_info_ext & BIT3)) {
4079                         if (!btcoexist->manual_control &&
4080                             !btcoexist->stop_coex_dm) {
4081                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4082                                           "bit3, BT NOT ignore Wlan active!\n");
4083                                 halbtc8192e2ant_IgnoreWlanAct(btcoexist,
4084                                                               FORCE_EXEC,
4085                                                               false);
4086                         }
4087                 } else {
4088                         /* BT already NOT ignore Wlan active,
4089                          * do nothing here. */
4090                 }
4091
4092 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4093                 if ((coex_sta->bt_info_ext & BIT4)) {
4094                         /* BT auto report already enabled, do nothing */
4095                 } else {
4096                         halbtc8192e2ant_bt_autoreport(btcoexist, FORCE_EXEC,
4097                                                       true);
4098                 }
4099 #endif
4100         }
4101
4102         /* check BIT2 first ==> check if bt is under inquiry or page scan */
4103         if(bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
4104                 coex_sta->c2h_bt_inquiry_page = true;
4105         else
4106                 coex_sta->c2h_bt_inquiry_page = false;
4107
4108         /* set link exist status */
4109         if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
4110                 coex_sta->bt_link_exist = false;
4111                 coex_sta->pan_exist = false;
4112                 coex_sta->a2dp_exist = false;
4113                 coex_sta->hid_exist = false;
4114                 coex_sta->sco_exist = false;
4115         } else {/* connection exists */
4116                 coex_sta->bt_link_exist = true;
4117                 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
4118                         coex_sta->pan_exist = true;
4119                 else
4120                         coex_sta->pan_exist = false;
4121                 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
4122                         coex_sta->a2dp_exist = true;
4123                 else
4124                         coex_sta->a2dp_exist = false;
4125                 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
4126                         coex_sta->hid_exist = true;
4127                 else
4128                         coex_sta->hid_exist = false;
4129                 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
4130                         coex_sta->sco_exist = true;
4131                 else
4132                         coex_sta->sco_exist = false;
4133         }
4134
4135         halbtc8192e2ant_update_btlink_info(btcoexist);
4136
4137         if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
4138                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4139                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4140                           "[BTCoex], BT Non-Connected idle!!!\n");
4141         } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) {
4142                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
4143                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4144                           "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
4145         } else if ((bt_info&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
4146                    (bt_info&BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
4147                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
4148                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4149                           "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
4150         } else if (bt_info&BT_INFO_8192E_2ANT_B_ACL_BUSY) {
4151                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
4152                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4153                           "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
4154         } else {
4155                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
4156                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4157                           "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n");
4158         }
4159
4160         if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
4161             (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
4162             (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
4163                 bt_busy = true;
4164                 limited_dig = true;
4165         } else {
4166                 bt_busy = false;
4167                 limited_dig = false;
4168         }
4169
4170         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
4171
4172         coex_dm->limited_dig = limited_dig;
4173         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
4174
4175         halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4176 }
4177
4178 void ex_halbtc8192e2ant_stack_operation_notify(struct btc_coexist *btcoexist,
4179                                                u8 type)
4180 {
4181         if (BTC_STACK_OP_INQ_PAGE_PAIR_START == type)
4182                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4183                           "[BTCoex] StackOP Inquiry/page/pair start notify\n");
4184         else if(BTC_STACK_OP_INQ_PAGE_PAIR_FINISH == type)
4185                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4186                           "[BTCoex] StackOP Inquiry/page/pair finish notify\n");
4187 }
4188
4189 void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
4190 {
4191         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, "[BTCoex], Halt notify\n");
4192
4193         halbtc8192e2ant_IgnoreWlanAct(btcoexist, FORCE_EXEC, true);
4194         ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
4195 }
4196
4197 void ex_halbtc8192e2ant_periodical(struct btc_coexist *btcoexist)
4198 {
4199         static u8 dis_ver_info_cnt = 0;
4200         u32 fw_ver = 0, bt_patch_ver = 0;
4201         struct btc_board_info *board_info=&btcoexist->board_info;
4202         struct btc_stack_info *stack_info=&btcoexist->stack_info;
4203
4204         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4205                   "=======================Periodical=======================\n");
4206         if (dis_ver_info_cnt <= 5) {
4207                 dis_ver_info_cnt += 1;
4208                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4209                           "************************************************\n");
4210                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4211                           "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
4212                           board_info->pg_ant_num, board_info->btdm_ant_num,
4213                           board_info->btdm_ant_pos);
4214                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4215                           "BT stack/ hci ext ver = %s / %d\n",
4216                           ((stack_info->profile_notified) ? "Yes" : "No"),
4217                           stack_info->hci_version);
4218                 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
4219                                    &bt_patch_ver);
4220                 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4221                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4222                           "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
4223                           glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
4224                           fw_ver, bt_patch_ver, bt_patch_ver);
4225                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4226                           "************************************************\n");
4227         }
4228
4229 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4230         halbtc8192e2ant_querybt_info(btcoexist);
4231         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
4232         halbtc8192e2ant_monitor_bt_enable_disable(btcoexist);
4233 #else
4234         if (halbtc8192e2ant_iswifi_status_changed(btcoexist) ||
4235             coex_dm->auto_tdma_adjust)
4236                 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4237 #endif
4238 }
4239
4240
4241 #endif
4242