drivers/staging/rtl8192e/rtl8192e/rtl_core.h

   1 /******************************************************************************
   2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3  *
   4  * Based on the r8180 driver, which is:
   5  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of version 2 of the GNU General Public License as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  18  *
  19  * The full GNU General Public License is included in this distribution in the
  20  * file called LICENSE.
  21  *
  22  * Contact Information:
  23  * wlanfae <wlanfae@realtek.com>
  24 ******************************************************************************/
  25
  26 #ifndef _RTL_CORE_H
  27 #define _RTL_CORE_H
  28
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/init.h>
  32 #include <linux/ioport.h>
  33 #include <linux/sched.h>
  34 #include <linux/types.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/slab.h>
  37 #include <linux/netdevice.h>
  38 #include <linux/pci.h>
  39 #include <linux/etherdevice.h>
  40 #include <linux/delay.h>
  41 #include <linux/rtnetlink.h>
  42 #include <linux/wireless.h>
  43 #include <linux/timer.h>
  44 #include <linux/proc_fs.h>
  45 #include <linux/if_arp.h>
  46 #include <linux/random.h>
  47 #include <linux/version.h>
  48 #include <linux/io.h>
  49
  50 /* Need this defined before including local include files */
  51 #define DRV_NAME "rtl819xE"
  52
  53 #include "../rtllib.h"
  54
  55 #include "../dot11d.h"
  56
  57 #include "r8192E_firmware.h"
  58 #include "r8192E_hw.h"
  59
  60 #include "r8190P_def.h"
  61 #include "r8192E_dev.h"
  62
  63 #include "rtl_eeprom.h"
  64 #include "rtl_ps.h"
  65 #include "rtl_pci.h"
  66 #include "rtl_cam.h"
  67
  68 #define DRV_COPYRIGHT           \
  69         "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
  70 #define DRV_AUTHOR  "<wlanfae@realtek.com>"
  71 #define DRV_VERSION  "0014.0401.2010"
  72
  73 #define IS_HARDWARE_TYPE_819xP(_priv)           \
  74         ((((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8190P) || \
  75         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192E))
  76 #define IS_HARDWARE_TYPE_8192SE(_priv)          \
  77         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192SE)
  78 #define IS_HARDWARE_TYPE_8192CE(_priv)          \
  79         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CE)
  80 #define IS_HARDWARE_TYPE_8192CU(_priv)          \
  81         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CU)
  82 #define IS_HARDWARE_TYPE_8192DE(_priv)          \
  83         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DE)
  84 #define IS_HARDWARE_TYPE_8192DU(_priv)          \
  85         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DU)
  86
  87 #define RTL_PCI_DEVICE(vend, dev, cfg) \
  88         .vendor = (vend), .device = (dev), \
  89         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID , \
  90         .driver_data = (kernel_ulong_t)&(cfg)
  91
  92 #define irqreturn_type irqreturn_t
  93
  94 #define rtl8192_interrupt(x, y, z) rtl8192_interrupt_rsl(x, y)
  95
  96 #define RTL_MAX_SCAN_SIZE 128
  97
  98 #define RTL_RATE_MAX            30
  99
 100 #define TOTAL_CAM_ENTRY         32
 101 #define CAM_CONTENT_COUNT       8
 102
 103 #ifndef BIT
 104 #define BIT(_i)                         (1<<(_i))
 105 #endif
 106
 107 #define IS_NIC_DOWN(priv)       (!(priv)->up)
 108
 109 #define IS_ADAPTER_SENDS_BEACON(dev) 0
 110
 111 #define IS_UNDER_11N_AES_MODE(_rtllib)          \
 112         ((_rtllib->pHTInfo->bCurrentHTSupport == true) && \
 113         (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
 114
 115 #define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI      0x1000
 116 #define HAL_HW_PCI_REVISION_ID_8190PCI                  0x00
 117 #define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE     0x4000
 118 #define HAL_HW_PCI_REVISION_ID_8192PCIE         0x01
 119 #define HAL_MEMORY_MAPPED_IO_RANGE_8192SE       0x4000
 120 #define HAL_HW_PCI_REVISION_ID_8192SE   0x10
 121 #define HAL_HW_PCI_REVISION_ID_8192CE                   0x1
 122 #define HAL_MEMORY_MAPPED_IO_RANGE_8192CE       0x4000
 123 #define HAL_HW_PCI_REVISION_ID_8192DE                   0x0
 124 #define HAL_MEMORY_MAPPED_IO_RANGE_8192DE       0x4000
 125
 126 #define HAL_HW_PCI_8180_DEVICE_ID                       0x8180
 127 #define HAL_HW_PCI_8185_DEVICE_ID                       0x8185
 128 #define HAL_HW_PCI_8188_DEVICE_ID                       0x8188
 129 #define HAL_HW_PCI_8198_DEVICE_ID                       0x8198
 130 #define HAL_HW_PCI_8190_DEVICE_ID                       0x8190
 131 #define HAL_HW_PCI_8192_DEVICE_ID                       0x8192
 132 #define HAL_HW_PCI_8192SE_DEVICE_ID                     0x8192
 133 #define HAL_HW_PCI_8174_DEVICE_ID                       0x8174
 134 #define HAL_HW_PCI_8173_DEVICE_ID                       0x8173
 135 #define HAL_HW_PCI_8172_DEVICE_ID                       0x8172
 136 #define HAL_HW_PCI_8171_DEVICE_ID                       0x8171
 137 #define HAL_HW_PCI_0045_DEVICE_ID                       0x0045
 138 #define HAL_HW_PCI_0046_DEVICE_ID                       0x0046
 139 #define HAL_HW_PCI_0044_DEVICE_ID                       0x0044
 140 #define HAL_HW_PCI_0047_DEVICE_ID                       0x0047
 141 #define HAL_HW_PCI_700F_DEVICE_ID                       0x700F
 142 #define HAL_HW_PCI_701F_DEVICE_ID                       0x701F
 143 #define HAL_HW_PCI_DLINK_DEVICE_ID                      0x3304
 144 #define HAL_HW_PCI_8192CET_DEVICE_ID                    0x8191
 145 #define HAL_HW_PCI_8192CE_DEVICE_ID                     0x8178
 146 #define HAL_HW_PCI_8191CE_DEVICE_ID                     0x8177
 147 #define HAL_HW_PCI_8188CE_DEVICE_ID                     0x8176
 148 #define HAL_HW_PCI_8192CU_DEVICE_ID                     0x8191
 149 #define HAL_HW_PCI_8192DE_DEVICE_ID                     0x092D
 150 #define HAL_HW_PCI_8192DU_DEVICE_ID                     0x092D
 151
 152 #define RTL819X_DEFAULT_RF_TYPE         RF_1T2R
 153
 154 #define RTLLIB_WATCH_DOG_TIME           2000
 155
 156 #define MAX_DEV_ADDR_SIZE               8  /*support till 64 bit bus width OS*/
 157 #define MAX_FIRMWARE_INFORMATION_SIZE   32
 158 #define MAX_802_11_HEADER_LENGTH        (40 + MAX_FIRMWARE_INFORMATION_SIZE)
 159 #define ENCRYPTION_MAX_OVERHEAD         128
 160 #define MAX_FRAGMENT_COUNT              8
 161 #define MAX_TRANSMIT_BUFFER_SIZE        \
 162         (1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) *  \
 163          MAX_FRAGMENT_COUNT)
 164
 165 #define scrclng                         4
 166
 167 #define DEFAULT_FRAG_THRESHOLD  2342U
 168 #define MIN_FRAG_THRESHOLD      256U
 169 #define DEFAULT_BEACONINTERVAL  0x64U
 170
 171 #define DEFAULT_SSID            ""
 172 #define DEFAULT_RETRY_RTS       7
 173 #define DEFAULT_RETRY_DATA      7
 174 #define PRISM_HDR_SIZE          64
 175
 176 #define PHY_RSSI_SLID_WIN_MAX                   100
 177
 178 #define RTL_IOCTL_WPA_SUPPLICANT                (SIOCIWFIRSTPRIV + 30)
 179
 180 #define TxBBGainTableLength                     37
 181 #define CCKTxBBGainTableLength                  23
 182
 183 #define CHANNEL_PLAN_LEN                        10
 184 #define sCrcLng                                 4
 185
 186 #define NIC_SEND_HANG_THRESHOLD_NORMAL          4
 187 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE       8
 188
 189 #define MAX_TX_QUEUE                            9
 190
 191 #define MAX_RX_QUEUE                            1
 192
 193 #define MAX_RX_COUNT                            64
 194 #define MAX_TX_QUEUE_COUNT                      9
 195
 196 enum RTL819x_PHY_PARAM {
 197         RTL819X_PHY_MACPHY_REG                  = 0,
 198         RTL819X_PHY_MACPHY_REG_PG               = 1,
 199         RTL8188C_PHY_MACREG                     = 2,
 200         RTL8192C_PHY_MACREG                     = 3,
 201         RTL819X_PHY_REG                         = 4,
 202         RTL819X_PHY_REG_1T2R                    = 5,
 203         RTL819X_PHY_REG_to1T1R                  = 6,
 204         RTL819X_PHY_REG_to1T2R                  = 7,
 205         RTL819X_PHY_REG_to2T2R                  = 8,
 206         RTL819X_PHY_REG_PG                      = 9,
 207         RTL819X_AGC_TAB                         = 10,
 208         RTL819X_PHY_RADIO_A                     = 11,
 209         RTL819X_PHY_RADIO_A_1T                  = 12,
 210         RTL819X_PHY_RADIO_A_2T                  = 13,
 211         RTL819X_PHY_RADIO_B                     = 14,
 212         RTL819X_PHY_RADIO_B_GM                  = 15,
 213         RTL819X_PHY_RADIO_C                     = 16,
 214         RTL819X_PHY_RADIO_D                     = 17,
 215         RTL819X_EEPROM_MAP                      = 18,
 216         RTL819X_EFUSE_MAP                       = 19,
 217 };
 218
 219 enum nic_t {
 220         NIC_UNKNOWN     = 0,
 221         NIC_8192E       = 1,
 222         NIC_8190P       = 2,
 223         NIC_8192SE      = 4,
 224         NIC_8192CE      = 5,
 225         NIC_8192CU      = 6,
 226         NIC_8192DE      = 7,
 227         NIC_8192DU      = 8,
 228 };
 229
 230 enum rt_eeprom_type {
 231         EEPROM_93C46,
 232         EEPROM_93C56,
 233         EEPROM_BOOT_EFUSE,
 234 };
 235
 236 enum dcmg_txcmd_op {
 237         TXCMD_TXRA_HISTORY_CTRL         = 0xFF900000,
 238         TXCMD_RESET_TX_PKT_BUFF         = 0xFF900001,
 239         TXCMD_RESET_RX_PKT_BUFF         = 0xFF900002,
 240         TXCMD_SET_TX_DURATION           = 0xFF900003,
 241         TXCMD_SET_RX_RSSI               = 0xFF900004,
 242         TXCMD_SET_TX_PWR_TRACKING       = 0xFF900005,
 243         TXCMD_XXXX_CTRL,
 244 };
 245
 246 enum rt_rf_type_819xu {
 247         RF_TYPE_MIN = 0,
 248         RF_8225,
 249         RF_8256,
 250         RF_8258,
 251         RF_6052 = 4,
 252         RF_PSEUDO_11N = 5,
 253 };
 254
 255 enum rf_step {
 256         RF_STEP_INIT = 0,
 257         RF_STEP_NORMAL,
 258         RF_STEP_MAX
 259 };
 260
 261 enum rt_status {
 262         RT_STATUS_SUCCESS,
 263         RT_STATUS_FAILURE,
 264         RT_STATUS_PENDING,
 265         RT_STATUS_RESOURCE
 266 };
 267
 268 enum rt_customer_id {
 269         RT_CID_DEFAULT    = 0,
 270         RT_CID_8187_ALPHA0      = 1,
 271         RT_CID_8187_SERCOMM_PS  = 2,
 272         RT_CID_8187_HW_LED      = 3,
 273         RT_CID_8187_NETGEAR     = 4,
 274         RT_CID_WHQL          = 5,
 275         RT_CID_819x_CAMEO       = 6,
 276         RT_CID_819x_RUNTOP      = 7,
 277         RT_CID_819x_Senao       = 8,
 278         RT_CID_TOSHIBA    = 9,
 279         RT_CID_819x_Netcore     = 10,
 280         RT_CID_Nettronix        = 11,
 281         RT_CID_DLINK        = 12,
 282         RT_CID_PRONET      = 13,
 283         RT_CID_COREGA      = 14,
 284         RT_CID_819x_ALPHA       = 15,
 285         RT_CID_819x_Sitecom     = 16,
 286         RT_CID_CCX            = 17,
 287         RT_CID_819x_Lenovo      = 18,
 288         RT_CID_819x_QMI  = 19,
 289         RT_CID_819x_Edimax_Belkin = 20,
 290         RT_CID_819x_Sercomm_Belkin = 21,
 291         RT_CID_819x_CAMEO1 = 22,
 292         RT_CID_819x_MSI = 23,
 293         RT_CID_819x_Acer = 24,
 294         RT_CID_819x_HP  = 27,
 295         RT_CID_819x_CLEVO = 28,
 296         RT_CID_819x_Arcadyan_Belkin = 29,
 297         RT_CID_819x_SAMSUNG = 30,
 298         RT_CID_819x_WNC_COREGA = 31,
 299 };
 300
 301 enum reset_type {
 302         RESET_TYPE_NORESET = 0x00,
 303         RESET_TYPE_NORMAL = 0x01,
 304         RESET_TYPE_SILENT = 0x02
 305 };
 306
 307 enum ic_inferiority_8192s {
 308         IC_INFERIORITY_A            = 0,
 309         IC_INFERIORITY_B            = 1,
 310 };
 311
 312 enum pci_bridge_vendor {
 313         PCI_BRIDGE_VENDOR_INTEL = 0x0,
 314         PCI_BRIDGE_VENDOR_ATI,
 315         PCI_BRIDGE_VENDOR_AMD,
 316         PCI_BRIDGE_VENDOR_SIS ,
 317         PCI_BRIDGE_VENDOR_UNKNOWN,
 318         PCI_BRIDGE_VENDOR_MAX ,
 319 };
 320
 321 struct buffer {
 322         struct buffer *next;
 323         u32 *buf;
 324         dma_addr_t dma;
 325
 326 };
 327
 328 struct rtl_reg_debug {
 329         unsigned int  cmd;
 330         struct {
 331                 unsigned char type;
 332                 unsigned char addr;
 333                 unsigned char page;
 334                 unsigned char length;
 335         } head;
 336         unsigned char buf[0xff];
 337 };
 338
 339 struct rt_tx_rahis {
 340         u32          cck[4];
 341         u32          ofdm[8];
 342         u32          ht_mcs[4][16];
 343 };
 344
 345 struct rt_smooth_data_4rf {
 346         char    elements[4][100];
 347         u32     index;
 348         u32     TotalNum;
 349         u32     TotalVal[4];
 350 };
 351
 352 struct rt_stats {
 353         unsigned long txrdu;
 354         unsigned long rxrdu;
 355         unsigned long rxok;
 356         unsigned long rxframgment;
 357         unsigned long rxcmdpkt[8];
 358         unsigned long rxurberr;
 359         unsigned long rxstaterr;
 360         unsigned long rxdatacrcerr;
 361         unsigned long rxmgmtcrcerr;
 362         unsigned long rxcrcerrmin;
 363         unsigned long rxcrcerrmid;
 364         unsigned long rxcrcerrmax;
 365         unsigned long received_rate_histogram[4][32];
 366         unsigned long received_preamble_GI[2][32];
 367         unsigned long   rx_AMPDUsize_histogram[5];
 368         unsigned long rx_AMPDUnum_histogram[5];
 369         unsigned long numpacket_matchbssid;
 370         unsigned long numpacket_toself;
 371         unsigned long num_process_phyinfo;
 372         unsigned long numqry_phystatus;
 373         unsigned long numqry_phystatusCCK;
 374         unsigned long numqry_phystatusHT;
 375         unsigned long received_bwtype[5];
 376         unsigned long txnperr;
 377         unsigned long txnpdrop;
 378         unsigned long txresumed;
 379         unsigned long rxoverflow;
 380         unsigned long rxint;
 381         unsigned long txnpokint;
 382         unsigned long ints;
 383         unsigned long shints;
 384         unsigned long txoverflow;
 385         unsigned long txlpokint;
 386         unsigned long txlpdrop;
 387         unsigned long txlperr;
 388         unsigned long txbeokint;
 389         unsigned long txbedrop;
 390         unsigned long txbeerr;
 391         unsigned long txbkokint;
 392         unsigned long txbkdrop;
 393         unsigned long txbkerr;
 394         unsigned long txviokint;
 395         unsigned long txvidrop;
 396         unsigned long txvierr;
 397         unsigned long txvookint;
 398         unsigned long txvodrop;
 399         unsigned long txvoerr;
 400         unsigned long txbeaconokint;
 401         unsigned long txbeacondrop;
 402         unsigned long txbeaconerr;
 403         unsigned long txmanageokint;
 404         unsigned long txmanagedrop;
 405         unsigned long txmanageerr;
 406         unsigned long txcmdpktokint;
 407         unsigned long txdatapkt;
 408         unsigned long txfeedback;
 409         unsigned long txfeedbackok;
 410         unsigned long txoktotal;
 411         unsigned long txokbytestotal;
 412         unsigned long txokinperiod;
 413         unsigned long txmulticast;
 414         unsigned long txbytesmulticast;
 415         unsigned long txbroadcast;
 416         unsigned long txbytesbroadcast;
 417         unsigned long txunicast;
 418         unsigned long txbytesunicast;
 419         unsigned long rxbytesunicast;
 420         unsigned long txfeedbackfail;
 421         unsigned long txerrtotal;
 422         unsigned long txerrbytestotal;
 423         unsigned long txerrmulticast;
 424         unsigned long txerrbroadcast;
 425         unsigned long txerrunicast;
 426         unsigned long txretrycount;
 427         unsigned long txfeedbackretry;
 428         u8      last_packet_rate;
 429         unsigned long slide_signal_strength[100];
 430         unsigned long slide_evm[100];
 431         unsigned long   slide_rssi_total;
 432         unsigned long slide_evm_total;
 433         long signal_strength;
 434         long signal_quality;
 435         long last_signal_strength_inpercent;
 436         long    recv_signal_power;
 437         u8 rx_rssi_percentage[4];
 438         u8 rx_evm_percentage[2];
 439         long rxSNRdB[4];
 440         struct rt_tx_rahis txrate;
 441         u32 Slide_Beacon_pwdb[100];
 442         u32 Slide_Beacon_Total;
 443         struct rt_smooth_data_4rf cck_adc_pwdb;
 444         u32     CurrentShowTxate;
 445 };
 446
 447 struct channel_access_setting {
 448         u16 SIFS_Timer;
 449         u16 DIFS_Timer;
 450         u16 SlotTimeTimer;
 451         u16 EIFS_Timer;
 452         u16 CWminIndex;
 453         u16 CWmaxIndex;
 454 };
 455
 456 enum two_port_status {
 457         TWO_PORT_STATUS__DEFAULT_ONLY,
 458         TWO_PORT_STATUS__EXTENSION_ONLY,
 459         TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
 460         TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
 461         TWO_PORT_STATUS__ADHOC,
 462         TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
 463 };
 464
 465 struct txbbgain_struct {
 466         long    txbb_iq_amplifygain;
 467         u32     txbbgain_value;
 468 };
 469
 470 struct ccktxbbgain {
 471         u8      ccktxbb_valuearray[8];
 472 };
 473
 474 struct init_gain {
 475         u8      xaagccore1;
 476         u8      xbagccore1;
 477         u8      xcagccore1;
 478         u8      xdagccore1;
 479         u8      cca;
 480
 481 };
 482
 483 struct tx_ring {
 484         u32 *desc;
 485         u8 nStuckCount;
 486         struct tx_ring *next;
 487 } __packed;
 488
 489 struct rtl8192_tx_ring {
 490         struct tx_desc *desc;
 491         dma_addr_t dma;
 492         unsigned int idx;
 493         unsigned int entries;
 494         struct sk_buff_head queue;
 495 };
 496
 497
 498
 499 struct rtl819x_ops {
 500         enum nic_t nic_type;
 501         void (*get_eeprom_size)(struct net_device *dev);
 502         void (*init_adapter_variable)(struct net_device *dev);
 503         void (*init_before_adapter_start)(struct net_device *dev);
 504         bool (*initialize_adapter)(struct net_device *dev);
 505         void (*link_change)(struct net_device *dev);
 506         void (*tx_fill_descriptor)(struct net_device *dev,
 507                                    struct tx_desc *tx_desc,
 508                                    struct cb_desc *cb_desc,
 509                                    struct sk_buff *skb);
 510         void (*tx_fill_cmd_descriptor)(struct net_device *dev,
 511                                        struct tx_desc_cmd *entry,
 512                                        struct cb_desc *cb_desc,
 513                                        struct sk_buff *skb);
 514         bool (*rx_query_status_descriptor)(struct net_device *dev,
 515                                            struct rtllib_rx_stats *stats,
 516                                            struct rx_desc *pdesc,
 517                                            struct sk_buff *skb);
 518         bool (*rx_command_packet_handler)(struct net_device *dev,
 519                                           struct sk_buff *skb,
 520                                           struct rx_desc *pdesc);
 521         void (*stop_adapter)(struct net_device *dev, bool reset);
 522         void (*update_ratr_table)(struct net_device *dev);
 523         void (*irq_enable)(struct net_device *dev);
 524         void (*irq_disable)(struct net_device *dev);
 525         void (*irq_clear)(struct net_device *dev);
 526         void (*rx_enable)(struct net_device *dev);
 527         void (*tx_enable)(struct net_device *dev);
 528         void (*interrupt_recognized)(struct net_device *dev,
 529                                      u32 *p_inta, u32 *p_intb);
 530         bool (*TxCheckStuckHandler)(struct net_device *dev);
 531         bool (*RxCheckStuckHandler)(struct net_device *dev);
 532 };
 533
 534 struct r8192_priv {
 535         struct pci_dev *pdev;
 536         struct pci_dev *bridge_pdev;
 537
 538         bool            bfirst_init;
 539         bool            bfirst_after_down;
 540         bool            initialized_at_probe;
 541         bool            being_init_adapter;
 542         bool            bDriverIsGoingToUnload;
 543
 544         int             irq;
 545         short   irq_enabled;
 546
 547         short   up;
 548         short   up_first_time;
 549         struct delayed_work             update_beacon_wq;
 550         struct delayed_work             watch_dog_wq;
 551         struct delayed_work             txpower_tracking_wq;
 552         struct delayed_work             rfpath_check_wq;
 553         struct delayed_work             gpio_change_rf_wq;
 554         struct delayed_work             initialgain_operate_wq;
 555         struct delayed_work             check_hw_scan_wq;
 556         struct delayed_work             hw_scan_simu_wq;
 557         struct delayed_work             start_hw_scan_wq;
 558
 559         struct workqueue_struct         *priv_wq;
 560
 561         struct channel_access_setting ChannelAccessSetting;
 562
 563         struct mp_adapter NdisAdapter;
 564
 565         struct rtl819x_ops                      *ops;
 566         struct rtllib_device                    *rtllib;
 567
 568         struct work_struct                              reset_wq;
 569
 570         struct log_int_8190 InterruptLog;
 571
 572         enum rt_customer_id CustomerID;
 573
 574
 575         enum rt_rf_type_819xu rf_chip;
 576         enum ic_inferiority_8192s IC_Class;
 577         enum ht_channel_width CurrentChannelBW;
 578         struct bb_reg_definition PHYRegDef[4];
 579         struct rate_adaptive rate_adaptive;
 580
 581         struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength];
 582         struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
 583
 584         struct txbbgain_struct txbbgain_table[TxBBGainTableLength];
 585
 586         enum acm_method AcmMethod;
 587
 588         struct rt_firmware                      *pFirmware;
 589         enum rtl819x_loopback LoopbackMode;
 590         enum firmware_source firmware_source;
 591
 592         struct timer_list                       watch_dog_timer;
 593         struct timer_list                       fsync_timer;
 594         struct timer_list                       gpio_polling_timer;
 595
 596         spinlock_t                              fw_scan_lock;
 597         spinlock_t                              irq_lock;
 598         spinlock_t                              irq_th_lock;
 599         spinlock_t                              tx_lock;
 600         spinlock_t                              rf_ps_lock;
 601         spinlock_t                              rw_lock;
 602         spinlock_t                              rt_h2c_lock;
 603         spinlock_t                              rf_lock;
 604         spinlock_t                              ps_lock;
 605
 606         struct sk_buff_head             rx_queue;
 607         struct sk_buff_head             skb_queue;
 608
 609         struct tasklet_struct           irq_rx_tasklet;
 610         struct tasklet_struct           irq_tx_tasklet;
 611         struct tasklet_struct           irq_prepare_beacon_tasklet;
 612
 613         struct semaphore                        wx_sem;
 614         struct semaphore                        rf_sem;
 615         struct mutex                            mutex;
 616
 617         struct rt_stats stats;
 618         struct iw_statistics                    wstats;
 619         struct proc_dir_entry           *dir_dev;
 620
 621         short (*rf_set_sens)(struct net_device *dev, short sens);
 622         u8 (*rf_set_chan)(struct net_device *dev, u8 ch);
 623         void (*rf_close)(struct net_device *dev);
 624         void (*rf_init)(struct net_device *dev);
 625
 626         struct rx_desc *rx_ring[MAX_RX_QUEUE];
 627         struct sk_buff  *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
 628         dma_addr_t      rx_ring_dma[MAX_RX_QUEUE];
 629         unsigned int    rx_idx[MAX_RX_QUEUE];
 630         int             rxringcount;
 631         u16             rxbuffersize;
 632
 633         u64             LastRxDescTSF;
 634
 635         u16             EarlyRxThreshold;
 636         u32             ReceiveConfig;
 637         u8              AcmControl;
 638         u8              RFProgType;
 639         u8              retry_data;
 640         u8              retry_rts;
 641         u16             rts;
 642
 643         struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
 644         int              txringcount;
 645         int             txbuffsize;
 646         int             txfwbuffersize;
 647         atomic_t        tx_pending[0x10];
 648
 649         u16             ShortRetryLimit;
 650         u16             LongRetryLimit;
 651         u32             TransmitConfig;
 652         u8              RegCWinMin;
 653         u8              keepAliveLevel;
 654
 655         bool            sw_radio_on;
 656         bool            bHwRadioOff;
 657         bool            pwrdown;
 658         bool            blinked_ingpio;
 659         u8              polling_timer_on;
 660
 661         /**********************************************************/
 662
 663         enum card_type {
 664                 PCI, MINIPCI,
 665                 CARDBUS, USB
 666         } card_type;
 667
 668         struct work_struct qos_activate;
 669
 670         u8 bIbssCoordinator;
 671
 672         short   promisc;
 673         short   crcmon;
 674
 675         int txbeaconcount;
 676
 677         short   chan;
 678         short   sens;
 679         short   max_sens;
 680         u32 rx_prevlen;
 681
 682         u8 ScanDelay;
 683         bool ps_force;
 684
 685         u32 irq_mask[2];
 686
 687         u8 Rf_Mode;
 688         enum nic_t card_8192;
 689         u8 card_8192_version;
 690
 691         short   enable_gpio0;
 692
 693         u8 rf_type;
 694         u8 IC_Cut;
 695         char nick[IW_ESSID_MAX_SIZE + 1];
 696
 697         u8 RegBcnCtrlVal;
 698         bool bHwAntDiv;
 699
 700         bool bTKIPinNmodeFromReg;
 701         bool bWEPinNmodeFromReg;
 702
 703         bool bLedOpenDrain;
 704
 705         u8 check_roaming_cnt;
 706
 707         bool bIgnoreSilentReset;
 708         u32 SilentResetRxSoltNum;
 709         u32 SilentResetRxSlotIndex;
 710         u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
 711
 712         void *scan_cmd;
 713         u8 hwscan_bw_40;
 714
 715         u16 nrxAMPDU_size;
 716         u8 nrxAMPDU_aggr_num;
 717
 718         u32 last_rxdesc_tsf_high;
 719         u32 last_rxdesc_tsf_low;
 720
 721         u16 basic_rate;
 722         u8 short_preamble;
 723         u8 dot11CurrentPreambleMode;
 724         u8 slot_time;
 725         u16 SifsTime;
 726
 727         u8 RegWirelessMode;
 728
 729         u8 firmware_version;
 730         u16 FirmwareSubVersion;
 731         u16 rf_pathmap;
 732         bool AutoloadFailFlag;
 733
 734         u8 RegPciASPM;
 735         u8 RegAMDPciASPM;
 736         u8 RegHwSwRfOffD3;
 737         u8 RegSupportPciASPM;
 738         bool bSupportASPM;
 739
 740         u32 RfRegChnlVal[2];
 741
 742         u8 ShowRateMode;
 743         u8 RATRTableBitmap;
 744
 745         u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
 746         u16 EfuseUsedBytes;
 747         u8 EfuseUsedPercentage;
 748
 749         short   epromtype;
 750         u16 eeprom_vid;
 751         u16 eeprom_did;
 752         u16 eeprom_svid;
 753         u16 eeprom_smid;
 754         u8 eeprom_CustomerID;
 755         u16 eeprom_ChannelPlan;
 756         u8 eeprom_version;
 757
 758         u8 EEPROMRegulatory;
 759         u8 EEPROMPwrGroup[2][3];
 760         u8 EEPROMOptional;
 761
 762         u8 EEPROMTxPowerLevelCCK[14];
 763         u8 EEPROMTxPowerLevelOFDM24G[14];
 764         u8 EEPROMTxPowerLevelOFDM5G[24];
 765         u8 EEPROMRfACCKChnl1TxPwLevel[3];
 766         u8 EEPROMRfAOfdmChnlTxPwLevel[3];
 767         u8 EEPROMRfCCCKChnl1TxPwLevel[3];
 768         u8 EEPROMRfCOfdmChnlTxPwLevel[3];
 769         u16 EEPROMTxPowerDiff;
 770         u16 EEPROMAntPwDiff;
 771         u8 EEPROMThermalMeter;
 772         u8 EEPROMPwDiff;
 773         u8 EEPROMCrystalCap;
 774
 775         u8 EEPROMBluetoothCoexist;
 776         u8 EEPROMBluetoothType;
 777         u8 EEPROMBluetoothAntNum;
 778         u8 EEPROMBluetoothAntIsolation;
 779         u8 EEPROMBluetoothRadioShared;
 780
 781
 782         u8 EEPROMSupportWoWLAN;
 783         u8 EEPROMBoardType;
 784         u8 EEPROM_Def_Ver;
 785         u8 EEPROMHT2T_TxPwr[6];
 786         u8 EEPROMTSSI_A;
 787         u8 EEPROMTSSI_B;
 788         u8 EEPROMTxPowerLevelCCK_V1[3];
 789         u8 EEPROMLegacyHTTxPowerDiff;
 790
 791         u8 BluetoothCoexist;
 792
 793         u8 CrystalCap;
 794         u8 ThermalMeter[2];
 795
 796         u16 FwCmdIOMap;
 797         u32 FwCmdIOParam;
 798
 799         u8 SwChnlInProgress;
 800         u8 SwChnlStage;
 801         u8 SwChnlStep;
 802         u8 SetBWModeInProgress;
 803
 804         u8 nCur40MhzPrimeSC;
 805
 806         u32 RfReg0Value[4];
 807         u8 NumTotalRFPath;
 808         bool brfpath_rxenable[4];
 809
 810         bool bTXPowerDataReadFromEEPORM;
 811
 812         u16 RegChannelPlan;
 813         u16 ChannelPlan;
 814         bool bChnlPlanFromHW;
 815
 816         bool RegRfOff;
 817         bool isRFOff;
 818         bool bInPowerSaveMode;
 819         u8 bHwRfOffAction;
 820
 821         bool aspm_clkreq_enable;
 822         u32 pci_bridge_vendor;
 823         u8 RegHostPciASPMSetting;
 824         u8 RegDevicePciASPMSetting;
 825
 826         bool RFChangeInProgress;
 827         bool SetRFPowerStateInProgress;
 828         bool bdisable_nic;
 829
 830         u8 pwrGroupCnt;
 831
 832         u8 ThermalValue_LCK;
 833         u8 ThermalValue_IQK;
 834         bool bRfPiEnable;
 835
 836         u32 APKoutput[2][2];
 837         bool bAPKdone;
 838
 839         long RegE94;
 840         long RegE9C;
 841         long RegEB4;
 842         long RegEBC;
 843
 844         u32 RegC04;
 845         u32 Reg874;
 846         u32 RegC08;
 847         u32 ADDA_backup[16];
 848         u32 IQK_MAC_backup[3];
 849
 850         bool SetFwCmdInProgress;
 851         u8 CurrentFwCmdIO;
 852
 853         u8 rssi_level;
 854
 855         bool bInformFWDriverControlDM;
 856         u8 PwrGroupHT20[2][14];
 857         u8 PwrGroupHT40[2][14];
 858
 859         u8 ThermalValue;
 860         long EntryMinUndecoratedSmoothedPWDB;
 861         long EntryMaxUndecoratedSmoothedPWDB;
 862         u8 DynamicTxHighPowerLvl;
 863         u8 LastDTPLvl;
 864         u32 CurrentRATR0;
 865         struct false_alarm_stats FalseAlmCnt;
 866
 867         u8 DMFlag;
 868         u8 DM_Type;
 869
 870         u8 CckPwEnl;
 871         u16 TSSI_13dBm;
 872         u32 Pwr_Track;
 873         u8 CCKPresentAttentuation_20Mdefault;
 874         u8 CCKPresentAttentuation_40Mdefault;
 875         char CCKPresentAttentuation_difference;
 876         char CCKPresentAttentuation;
 877         u8 bCckHighPower;
 878         long undecorated_smoothed_pwdb;
 879         long undecorated_smoothed_cck_adc_pwdb[4];
 880
 881         u32 MCSTxPowerLevelOriginalOffset[6];
 882         u32 CCKTxPowerLevelOriginalOffset;
 883         u8 TxPowerLevelCCK[14];
 884         u8 TxPowerLevelCCK_A[14];
 885         u8 TxPowerLevelCCK_C[14];
 886         u8              TxPowerLevelOFDM24G[14];
 887         u8              TxPowerLevelOFDM5G[14];
 888         u8              TxPowerLevelOFDM24G_A[14];
 889         u8              TxPowerLevelOFDM24G_C[14];
 890         u8              LegacyHTTxPowerDiff;
 891         u8              TxPowerDiff;
 892         s8              RF_C_TxPwDiff;
 893         s8              RF_B_TxPwDiff;
 894         u8              RfTxPwrLevelCck[2][14];
 895         u8              RfTxPwrLevelOfdm1T[2][14];
 896         u8              RfTxPwrLevelOfdm2T[2][14];
 897         u8              AntennaTxPwDiff[3];
 898         u8              TxPwrHt20Diff[2][14];
 899         u8              TxPwrLegacyHtDiff[2][14];
 900         u8              TxPwrSafetyFlag;
 901         u8              HT2T_TxPwr_A[14];
 902         u8              HT2T_TxPwr_B[14];
 903         u8              CurrentCckTxPwrIdx;
 904         u8              CurrentOfdm24GTxPwrIdx;
 905
 906         bool            bdynamic_txpower;
 907         bool            bDynamicTxHighPower;
 908         bool            bDynamicTxLowPower;
 909         bool            bLastDTPFlag_High;
 910         bool            bLastDTPFlag_Low;
 911
 912         bool            bstore_last_dtpflag;
 913         bool            bstart_txctrl_bydtp;
 914
 915         u8              rfa_txpowertrackingindex;
 916         u8              rfa_txpowertrackingindex_real;
 917         u8              rfa_txpowertracking_default;
 918         u8              rfc_txpowertrackingindex;
 919         u8              rfc_txpowertrackingindex_real;
 920         u8              rfc_txpowertracking_default;
 921         bool            btxpower_tracking;
 922         bool            bcck_in_ch14;
 923
 924         u8              TxPowerTrackControl;
 925         u8              txpower_count;
 926         bool            btxpower_trackingInit;
 927
 928         u8              OFDM_index[2];
 929         u8              CCK_index;
 930
 931         u8              Record_CCK_20Mindex;
 932         u8              Record_CCK_40Mindex;
 933
 934         struct init_gain initgain_backup;
 935         u8              DefaultInitialGain[4];
 936         bool            bis_any_nonbepkts;
 937         bool            bcurrent_turbo_EDCA;
 938         bool            bis_cur_rdlstate;
 939
 940         bool            bCCKinCH14;
 941
 942         u8              MidHighPwrTHR_L1;
 943         u8              MidHighPwrTHR_L2;
 944
 945         bool            bfsync_processing;
 946         u32             rate_record;
 947         u32             rateCountDiffRecord;
 948         u32             ContiuneDiffCount;
 949         bool            bswitch_fsync;
 950         u8              framesync;
 951         u32             framesyncC34;
 952         u8              framesyncMonitor;
 953
 954         bool            bDMInitialGainEnable;
 955         bool            MutualAuthenticationFail;
 956
 957         bool            bDisableFrameBursting;
 958
 959         u32             reset_count;
 960         bool            bpbc_pressed;
 961
 962         u32             txpower_checkcnt;
 963         u32             txpower_tracking_callback_cnt;
 964         u8              thermal_read_val[40];
 965         u8              thermal_readback_index;
 966         u32             ccktxpower_adjustcnt_not_ch14;
 967         u32             ccktxpower_adjustcnt_ch14;
 968
 969         enum reset_type ResetProgress;
 970         bool            bForcedSilentReset;
 971         bool            bDisableNormalResetCheck;
 972         u16             TxCounter;
 973         u16             RxCounter;
 974         int             IrpPendingCount;
 975         bool            bResetInProgress;
 976         bool            force_reset;
 977         bool            force_lps;
 978         u8              InitialGainOperateType;
 979
 980         bool            chan_forced;
 981         bool            bSingleCarrier;
 982         bool            RegBoard;
 983         bool            bCckContTx;
 984         bool            bOfdmContTx;
 985         bool            bStartContTx;
 986         u8              RegPaModel;
 987         u8              btMpCckTxPower;
 988         u8              btMpOfdmTxPower;
 989
 990         u32             MptActType;
 991         u32             MptIoOffset;
 992         u32             MptIoValue;
 993         u32             MptRfPath;
 994
 995         u32             MptBandWidth;
 996         u32             MptRateIndex;
 997         u8              MptChannelToSw;
 998         u32     MptRCR;
 999
1000         u8              PwrDomainProtect;
1001         u8              H2CTxCmdSeq;
1002
1003
1004 };
1005
1006 extern const struct ethtool_ops rtl819x_ethtool_ops;
1007
1008 void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1009 short rtl8192_tx(struct net_device *dev, struct sk_buff *skb);
1010
1011 u8 read_nic_io_byte(struct net_device *dev, int x);
1012 u32 read_nic_io_dword(struct net_device *dev, int x);
1013 u16 read_nic_io_word(struct net_device *dev, int x) ;
1014 void write_nic_io_byte(struct net_device *dev, int x, u8 y);
1015 void write_nic_io_word(struct net_device *dev, int x, u16 y);
1016 void write_nic_io_dword(struct net_device *dev, int x, u32 y);
1017
1018 u8 read_nic_byte(struct net_device *dev, int x);
1019 u32 read_nic_dword(struct net_device *dev, int x);
1020 u16 read_nic_word(struct net_device *dev, int x) ;
1021 void write_nic_byte(struct net_device *dev, int x, u8 y);
1022 void write_nic_word(struct net_device *dev, int x, u16 y);
1023 void write_nic_dword(struct net_device *dev, int x, u32 y);
1024
1025 void force_pci_posting(struct net_device *dev);
1026
1027 void rtl8192_rx_enable(struct net_device *);
1028 void rtl8192_tx_enable(struct net_device *);
1029
1030 int rtl8192_hard_start_xmit(struct sk_buff *skb, struct net_device *dev);
1031 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev,
1032                             int rate);
1033 void rtl8192_data_hard_stop(struct net_device *dev);
1034 void rtl8192_data_hard_resume(struct net_device *dev);
1035 void rtl8192_restart(void *data);
1036 void rtl819x_watchdog_wqcallback(void *data);
1037 void rtl8192_hw_sleep_wq(void *data);
1038 void watch_dog_timer_callback(unsigned long data);
1039 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1040 void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1041 int rtl8192_down(struct net_device *dev, bool shutdownrf);
1042 int rtl8192_up(struct net_device *dev);
1043 void rtl8192_commit(struct net_device *dev);
1044 void rtl8192_set_chan(struct net_device *dev, short ch);
1045
1046 void check_rfctrl_gpio_timer(unsigned long data);
1047
1048 void rtl8192_hw_wakeup_wq(void *data);
1049 irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
1050
1051 short rtl8192_pci_initdescring(struct net_device *dev);
1052
1053 void rtl8192_cancel_deferred_work(struct r8192_priv *priv);
1054
1055 int _rtl8192_up(struct net_device *dev, bool is_silent_reset);
1056
1057 short rtl8192_is_tx_queue_empty(struct net_device *dev);
1058 void rtl8192_irq_disable(struct net_device *dev);
1059
1060 void rtl8192_tx_timeout(struct net_device *dev);
1061 void rtl8192_pci_resetdescring(struct net_device *dev);
1062 void rtl8192_SetWirelessMode(struct net_device *dev, u8 wireless_mode);
1063 void rtl8192_irq_enable(struct net_device *dev);
1064 void rtl8192_config_rate(struct net_device *dev, u16 *rate_config);
1065 void rtl8192_update_cap(struct net_device *dev, u16 cap);
1066 void rtl8192_irq_disable(struct net_device *dev);
1067
1068 void rtl819x_UpdateRxPktTimeStamp(struct net_device *dev,
1069                                   struct rtllib_rx_stats *stats);
1070 long rtl819x_translate_todbm(struct r8192_priv *priv, u8 signal_strength_index);
1071 void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv *priv,
1072                                       struct rtllib_rx_stats *pprevious_stats);
1073 u8 rtl819x_evm_dbtopercentage(char value);
1074 void rtl819x_process_cck_rxpathsel(struct r8192_priv *priv,
1075                                    struct rtllib_rx_stats *pprevious_stats);
1076 u8 rtl819x_query_rxpwrpercentage(char antpower);
1077 void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats *psrc_stats,
1078                                        struct rtllib_rx_stats *ptarget_stats);
1079 bool NicIFEnableNIC(struct net_device *dev);
1080 bool NicIFDisableNIC(struct net_device *dev);
1081
1082 bool MgntActSet_RF_State(struct net_device *dev,
1083                          enum rt_rf_power_state StateToSet,
1084                          RT_RF_CHANGE_SOURCE ChangeSource,
1085                          bool   ProtectOrNot);
1086 void ActUpdateChannelAccessSetting(struct net_device *dev,
1087                            enum wireless_mode WirelessMode,
1088                            struct channel_access_setting *ChnlAccessSetting);
1089
1090 /* proc stuff from rtl_debug.c */
1091 void rtl8192_proc_init_one(struct net_device *dev);
1092 void rtl8192_proc_remove_one(struct net_device *dev);
1093 void rtl8192_proc_module_init(void);
1094 void rtl8192_proc_module_remove(void);
1095
1096 #endif