1 // SPDX-License-Identifier: GPL-2.0
3 * Support for Medifield PNW Camera Imaging ISP subsystem.
5 * Copyright (c) 2010-2017 Intel Corporation. All Rights Reserved.
7 * Copyright (c) 2010 Silicon Hive www.siliconhive.com.
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License version
11 * 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/pm_qos.h>
24 #include <linux/timer.h>
25 #include <linux/delay.h>
26 #include <linux/dmi.h>
27 #include <linux/interrupt.h>
28 #include <linux/bits.h>
30 #include <asm/iosf_mbi.h>
32 #include "../../include/linux/atomisp_gmin_platform.h"
34 #include "atomisp_cmd.h"
35 #include "atomisp_common.h"
36 #include "atomisp_fops.h"
37 #include "atomisp_ioctl.h"
38 #include "atomisp_internal.h"
39 #include "atomisp-regs.h"
40 #include "atomisp_dfs_tables.h"
41 #include "atomisp_drvfs.h"
43 #include "atomisp_trace_event.h"
45 #include "sh_css_firmware.h"
47 #include "device_access.h"
49 /* Timeouts to wait for all subdevs to be registered */
50 #define SUBDEV_WAIT_TIMEOUT 50 /* ms */
51 #define SUBDEV_WAIT_TIMEOUT_MAX_COUNT 40 /* up to 2 seconds */
53 /* G-Min addition: pull this in from intel_mid_pm.h */
54 #define CSTATE_EXIT_LATENCY_C1 1
56 static uint skip_fwload;
57 module_param(skip_fwload, uint, 0644);
58 MODULE_PARM_DESC(skip_fwload, "Skip atomisp firmware load");
60 /* memory optimization: deferred firmware loading */
62 module_param(defer_fw_load, bool, 0644);
63 MODULE_PARM_DESC(defer_fw_load,
64 "Defer FW loading until device is opened (default:disable)");
66 /* cross componnet debug message flag */
68 module_param(dbg_level, int, 0644);
69 MODULE_PARM_DESC(dbg_level, "debug message level (default:0)");
71 /* log function switch */
73 module_param(dbg_func, int, 0644);
74 MODULE_PARM_DESC(dbg_func,
75 "log function switch non/trace_printk/printk (default:printk)");
78 module_param(mipicsi_flag, int, 0644);
79 MODULE_PARM_DESC(mipicsi_flag, "mipi csi compression predictor algorithm");
81 static char firmware_name[256];
82 module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0);
83 MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the default firmware name.");
85 /*set to 16x16 since this is the amount of lines and pixels the sensor
86 exports extra. If these are kept at the 10x8 that they were on, in yuv
87 downscaling modes incorrect resolutions where requested to the sensor
88 driver with strange outcomes as a result. The proper way tot do this
89 would be to have a list of tables the specify the sensor res, mipi rec,
90 output res, and isp output res. however since we do not have this yet,
91 the chosen solution is the next best thing. */
93 module_param(pad_w, int, 0644);
94 MODULE_PARM_DESC(pad_w, "extra data for ISP processing");
97 module_param(pad_h, int, 0644);
98 MODULE_PARM_DESC(pad_h, "extra data for ISP processing");
101 * FIXME: this is a hack to make easier to support ISP2401 variant.
102 * As a given system will either be ISP2401 or not, we can just use
103 * a boolean, in order to replace existing #ifdef ISP2401 everywhere.
105 * Once this driver gets into a better shape, however, the best would
106 * be to replace this to something stored inside atomisp allocated
110 struct device *atomisp_dev;
112 static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = {
114 .width = ISP_FREQ_RULE_ANY,
115 .height = ISP_FREQ_RULE_ANY,
116 .fps = ISP_FREQ_RULE_ANY,
117 .isp_freq = ISP_FREQ_400MHZ,
118 .run_mode = ATOMISP_RUN_MODE_VIDEO,
121 .width = ISP_FREQ_RULE_ANY,
122 .height = ISP_FREQ_RULE_ANY,
123 .fps = ISP_FREQ_RULE_ANY,
124 .isp_freq = ISP_FREQ_400MHZ,
125 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
128 .width = ISP_FREQ_RULE_ANY,
129 .height = ISP_FREQ_RULE_ANY,
130 .fps = ISP_FREQ_RULE_ANY,
131 .isp_freq = ISP_FREQ_400MHZ,
132 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
135 .width = ISP_FREQ_RULE_ANY,
136 .height = ISP_FREQ_RULE_ANY,
137 .fps = ISP_FREQ_RULE_ANY,
138 .isp_freq = ISP_FREQ_400MHZ,
139 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
142 .width = ISP_FREQ_RULE_ANY,
143 .height = ISP_FREQ_RULE_ANY,
144 .fps = ISP_FREQ_RULE_ANY,
145 .isp_freq = ISP_FREQ_457MHZ,
146 .run_mode = ATOMISP_RUN_MODE_SDV,
150 /* Merrifield and Moorefield DFS rules */
151 static const struct atomisp_dfs_config dfs_config_merr = {
152 .lowest_freq = ISP_FREQ_200MHZ,
153 .max_freq_at_vmin = ISP_FREQ_400MHZ,
154 .highest_freq = ISP_FREQ_457MHZ,
155 .dfs_table = dfs_rules_merr,
156 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr),
159 static const struct atomisp_freq_scaling_rule dfs_rules_merr_1179[] = {
161 .width = ISP_FREQ_RULE_ANY,
162 .height = ISP_FREQ_RULE_ANY,
163 .fps = ISP_FREQ_RULE_ANY,
164 .isp_freq = ISP_FREQ_400MHZ,
165 .run_mode = ATOMISP_RUN_MODE_VIDEO,
168 .width = ISP_FREQ_RULE_ANY,
169 .height = ISP_FREQ_RULE_ANY,
170 .fps = ISP_FREQ_RULE_ANY,
171 .isp_freq = ISP_FREQ_400MHZ,
172 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
175 .width = ISP_FREQ_RULE_ANY,
176 .height = ISP_FREQ_RULE_ANY,
177 .fps = ISP_FREQ_RULE_ANY,
178 .isp_freq = ISP_FREQ_400MHZ,
179 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
182 .width = ISP_FREQ_RULE_ANY,
183 .height = ISP_FREQ_RULE_ANY,
184 .fps = ISP_FREQ_RULE_ANY,
185 .isp_freq = ISP_FREQ_400MHZ,
186 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
189 .width = ISP_FREQ_RULE_ANY,
190 .height = ISP_FREQ_RULE_ANY,
191 .fps = ISP_FREQ_RULE_ANY,
192 .isp_freq = ISP_FREQ_400MHZ,
193 .run_mode = ATOMISP_RUN_MODE_SDV,
197 static const struct atomisp_dfs_config dfs_config_merr_1179 = {
198 .lowest_freq = ISP_FREQ_200MHZ,
199 .max_freq_at_vmin = ISP_FREQ_400MHZ,
200 .highest_freq = ISP_FREQ_400MHZ,
201 .dfs_table = dfs_rules_merr_1179,
202 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_1179),
205 static const struct atomisp_freq_scaling_rule dfs_rules_merr_117a[] = {
210 .isp_freq = ISP_FREQ_266MHZ,
211 .run_mode = ATOMISP_RUN_MODE_VIDEO,
217 .isp_freq = ISP_FREQ_266MHZ,
218 .run_mode = ATOMISP_RUN_MODE_VIDEO,
224 .isp_freq = ISP_FREQ_320MHZ,
225 .run_mode = ATOMISP_RUN_MODE_VIDEO,
231 .isp_freq = ISP_FREQ_320MHZ,
232 .run_mode = ATOMISP_RUN_MODE_VIDEO,
235 .width = ISP_FREQ_RULE_ANY,
236 .height = ISP_FREQ_RULE_ANY,
238 .isp_freq = ISP_FREQ_356MHZ,
239 .run_mode = ATOMISP_RUN_MODE_VIDEO,
242 .width = ISP_FREQ_RULE_ANY,
243 .height = ISP_FREQ_RULE_ANY,
244 .fps = ISP_FREQ_RULE_ANY,
245 .isp_freq = ISP_FREQ_200MHZ,
246 .run_mode = ATOMISP_RUN_MODE_VIDEO,
249 .width = ISP_FREQ_RULE_ANY,
250 .height = ISP_FREQ_RULE_ANY,
251 .fps = ISP_FREQ_RULE_ANY,
252 .isp_freq = ISP_FREQ_400MHZ,
253 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
256 .width = ISP_FREQ_RULE_ANY,
257 .height = ISP_FREQ_RULE_ANY,
258 .fps = ISP_FREQ_RULE_ANY,
259 .isp_freq = ISP_FREQ_400MHZ,
260 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
263 .width = ISP_FREQ_RULE_ANY,
264 .height = ISP_FREQ_RULE_ANY,
265 .fps = ISP_FREQ_RULE_ANY,
266 .isp_freq = ISP_FREQ_200MHZ,
267 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
270 .width = ISP_FREQ_RULE_ANY,
271 .height = ISP_FREQ_RULE_ANY,
272 .fps = ISP_FREQ_RULE_ANY,
273 .isp_freq = ISP_FREQ_400MHZ,
274 .run_mode = ATOMISP_RUN_MODE_SDV,
278 static struct atomisp_dfs_config dfs_config_merr_117a = {
279 .lowest_freq = ISP_FREQ_200MHZ,
280 .max_freq_at_vmin = ISP_FREQ_200MHZ,
281 .highest_freq = ISP_FREQ_400MHZ,
282 .dfs_table = dfs_rules_merr_117a,
283 .dfs_table_size = ARRAY_SIZE(dfs_rules_merr_117a),
286 static const struct atomisp_freq_scaling_rule dfs_rules_byt[] = {
288 .width = ISP_FREQ_RULE_ANY,
289 .height = ISP_FREQ_RULE_ANY,
290 .fps = ISP_FREQ_RULE_ANY,
291 .isp_freq = ISP_FREQ_400MHZ,
292 .run_mode = ATOMISP_RUN_MODE_VIDEO,
295 .width = ISP_FREQ_RULE_ANY,
296 .height = ISP_FREQ_RULE_ANY,
297 .fps = ISP_FREQ_RULE_ANY,
298 .isp_freq = ISP_FREQ_400MHZ,
299 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
302 .width = ISP_FREQ_RULE_ANY,
303 .height = ISP_FREQ_RULE_ANY,
304 .fps = ISP_FREQ_RULE_ANY,
305 .isp_freq = ISP_FREQ_400MHZ,
306 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
309 .width = ISP_FREQ_RULE_ANY,
310 .height = ISP_FREQ_RULE_ANY,
311 .fps = ISP_FREQ_RULE_ANY,
312 .isp_freq = ISP_FREQ_400MHZ,
313 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
316 .width = ISP_FREQ_RULE_ANY,
317 .height = ISP_FREQ_RULE_ANY,
318 .fps = ISP_FREQ_RULE_ANY,
319 .isp_freq = ISP_FREQ_400MHZ,
320 .run_mode = ATOMISP_RUN_MODE_SDV,
324 static const struct atomisp_dfs_config dfs_config_byt = {
325 .lowest_freq = ISP_FREQ_200MHZ,
326 .max_freq_at_vmin = ISP_FREQ_400MHZ,
327 .highest_freq = ISP_FREQ_400MHZ,
328 .dfs_table = dfs_rules_byt,
329 .dfs_table_size = ARRAY_SIZE(dfs_rules_byt),
332 static const struct atomisp_freq_scaling_rule dfs_rules_cht[] = {
334 .width = ISP_FREQ_RULE_ANY,
335 .height = ISP_FREQ_RULE_ANY,
336 .fps = ISP_FREQ_RULE_ANY,
337 .isp_freq = ISP_FREQ_320MHZ,
338 .run_mode = ATOMISP_RUN_MODE_VIDEO,
341 .width = ISP_FREQ_RULE_ANY,
342 .height = ISP_FREQ_RULE_ANY,
343 .fps = ISP_FREQ_RULE_ANY,
344 .isp_freq = ISP_FREQ_356MHZ,
345 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
348 .width = ISP_FREQ_RULE_ANY,
349 .height = ISP_FREQ_RULE_ANY,
350 .fps = ISP_FREQ_RULE_ANY,
351 .isp_freq = ISP_FREQ_320MHZ,
352 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
355 .width = ISP_FREQ_RULE_ANY,
356 .height = ISP_FREQ_RULE_ANY,
357 .fps = ISP_FREQ_RULE_ANY,
358 .isp_freq = ISP_FREQ_320MHZ,
359 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
364 .fps = ISP_FREQ_RULE_ANY,
365 .isp_freq = ISP_FREQ_320MHZ,
366 .run_mode = ATOMISP_RUN_MODE_SDV,
369 .width = ISP_FREQ_RULE_ANY,
370 .height = ISP_FREQ_RULE_ANY,
371 .fps = ISP_FREQ_RULE_ANY,
372 .isp_freq = ISP_FREQ_356MHZ,
373 .run_mode = ATOMISP_RUN_MODE_SDV,
377 static const struct atomisp_freq_scaling_rule dfs_rules_cht_soc[] = {
379 .width = ISP_FREQ_RULE_ANY,
380 .height = ISP_FREQ_RULE_ANY,
381 .fps = ISP_FREQ_RULE_ANY,
382 .isp_freq = ISP_FREQ_356MHZ,
383 .run_mode = ATOMISP_RUN_MODE_VIDEO,
386 .width = ISP_FREQ_RULE_ANY,
387 .height = ISP_FREQ_RULE_ANY,
388 .fps = ISP_FREQ_RULE_ANY,
389 .isp_freq = ISP_FREQ_356MHZ,
390 .run_mode = ATOMISP_RUN_MODE_STILL_CAPTURE,
393 .width = ISP_FREQ_RULE_ANY,
394 .height = ISP_FREQ_RULE_ANY,
395 .fps = ISP_FREQ_RULE_ANY,
396 .isp_freq = ISP_FREQ_320MHZ,
397 .run_mode = ATOMISP_RUN_MODE_CONTINUOUS_CAPTURE,
400 .width = ISP_FREQ_RULE_ANY,
401 .height = ISP_FREQ_RULE_ANY,
402 .fps = ISP_FREQ_RULE_ANY,
403 .isp_freq = ISP_FREQ_320MHZ,
404 .run_mode = ATOMISP_RUN_MODE_PREVIEW,
407 .width = ISP_FREQ_RULE_ANY,
408 .height = ISP_FREQ_RULE_ANY,
409 .fps = ISP_FREQ_RULE_ANY,
410 .isp_freq = ISP_FREQ_356MHZ,
411 .run_mode = ATOMISP_RUN_MODE_SDV,
415 static const struct atomisp_dfs_config dfs_config_cht = {
416 .lowest_freq = ISP_FREQ_100MHZ,
417 .max_freq_at_vmin = ISP_FREQ_356MHZ,
418 .highest_freq = ISP_FREQ_356MHZ,
419 .dfs_table = dfs_rules_cht,
420 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht),
423 /* This one should be visible also by atomisp_cmd.c */
424 const struct atomisp_dfs_config dfs_config_cht_soc = {
425 .lowest_freq = ISP_FREQ_100MHZ,
426 .max_freq_at_vmin = ISP_FREQ_356MHZ,
427 .highest_freq = ISP_FREQ_356MHZ,
428 .dfs_table = dfs_rules_cht_soc,
429 .dfs_table_size = ARRAY_SIZE(dfs_rules_cht_soc),
432 int atomisp_video_init(struct atomisp_video_pipe *video, const char *name,
433 unsigned int run_mode)
436 const char *direction;
438 switch (video->type) {
439 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
440 direction = "output";
441 video->pad.flags = MEDIA_PAD_FL_SINK;
442 video->vdev.fops = &atomisp_fops;
443 video->vdev.ioctl_ops = &atomisp_ioctl_ops;
444 video->vdev.lock = &video->isp->mutex;
450 ret = media_entity_pads_init(&video->vdev.entity, 1, &video->pad);
454 /* Initialize the video device. */
455 snprintf(video->vdev.name, sizeof(video->vdev.name),
456 "ATOMISP ISP %s %s", name, direction);
457 video->vdev.release = video_device_release_empty;
458 video_set_drvdata(&video->vdev, video->isp);
459 video->default_run_mode = run_mode;
464 void atomisp_video_unregister(struct atomisp_video_pipe *video)
466 if (video_is_registered(&video->vdev)) {
467 media_entity_cleanup(&video->vdev.entity);
468 video_unregister_device(&video->vdev);
472 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
474 struct pci_dev *pdev = to_pci_dev(isp->dev);
476 dev_dbg(isp->dev, "%s\n", __func__);
478 pci_read_config_word(pdev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
479 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
480 pci_read_config_dword(pdev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
481 pci_read_config_dword(pdev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
482 pci_read_config_word(pdev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
483 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
484 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &isp->saved_regs.interrupt_control);
486 pci_read_config_dword(pdev, MRFLD_PCI_PMCS, &isp->saved_regs.pmcs);
487 /* Ensure read/write combining is enabled. */
488 pci_read_config_dword(pdev, PCI_I_CONTROL, &isp->saved_regs.i_control);
489 isp->saved_regs.i_control |=
490 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
491 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
492 pci_read_config_dword(pdev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
493 &isp->saved_regs.csi_access_viol);
494 pci_read_config_dword(pdev, MRFLD_PCI_CSI_RCOMP_CONTROL,
495 &isp->saved_regs.csi_rcomp_config);
497 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
498 * ANN/CHV: RCOMP updates do not happen when using CSI2+ path
499 * and sensor sending "continuous clock".
500 * TNG/ANN/CHV: MIPI packets are lost if the HS entry sequence
501 * is missed, and IUNIT can hang.
502 * For both issues, setting this bit is a workaround.
504 isp->saved_regs.csi_rcomp_config |= MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
505 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
506 &isp->saved_regs.csi_afe_dly);
507 pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL,
508 &isp->saved_regs.csi_control);
509 if (isp->media_dev.hw_revision >=
510 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
511 isp->saved_regs.csi_control |= MRFLD_PCI_CSI_CONTROL_PARPATHEN;
513 * On CHT CSI_READY bit should be enabled before stream on
515 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
516 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
517 isp->saved_regs.csi_control |= MRFLD_PCI_CSI_CONTROL_CSI_READY;
518 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
519 &isp->saved_regs.csi_afe_rcomp_config);
520 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
521 &isp->saved_regs.csi_afe_hs_control);
522 pci_read_config_dword(pdev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
523 &isp->saved_regs.csi_deadline_control);
527 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
529 struct pci_dev *pdev = to_pci_dev(isp->dev);
531 dev_dbg(isp->dev, "%s\n", __func__);
533 pci_write_config_word(pdev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
534 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, isp->saved_regs.ispmmadr);
535 pci_write_config_dword(pdev, PCI_MSI_CAPID, isp->saved_regs.msicap);
536 pci_write_config_dword(pdev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
537 pci_write_config_word(pdev, PCI_MSI_DATA, isp->saved_regs.msi_data);
538 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
539 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, isp->saved_regs.interrupt_control);
540 pci_write_config_dword(pdev, PCI_I_CONTROL, isp->saved_regs.i_control);
542 pci_write_config_dword(pdev, MRFLD_PCI_PMCS, isp->saved_regs.pmcs);
543 pci_write_config_dword(pdev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
544 isp->saved_regs.csi_access_viol);
545 pci_write_config_dword(pdev, MRFLD_PCI_CSI_RCOMP_CONTROL,
546 isp->saved_regs.csi_rcomp_config);
547 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
548 isp->saved_regs.csi_afe_dly);
549 pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL,
550 isp->saved_regs.csi_control);
551 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
552 isp->saved_regs.csi_afe_rcomp_config);
553 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
554 isp->saved_regs.csi_afe_hs_control);
555 pci_write_config_dword(pdev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
556 isp->saved_regs.csi_deadline_control);
559 * for MRFLD, Software/firmware needs to write a 1 to bit0
560 * of the register at CSI_RECEIVER_SELECTION_REG to enable
561 * SH CSI backend write 0 will enable Arasan CSI backend,
562 * which has bugs(like sighting:4567697 and 4567699) and
563 * will be removed in B0
565 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
569 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
571 struct pci_dev *pdev = to_pci_dev(isp->dev);
575 spin_lock_irqsave(&isp->lock, flags);
576 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
577 spin_unlock_irqrestore(&isp->lock, flags);
578 dev_dbg(isp->dev, "<%s %d.\n", __func__, __LINE__);
582 * MRFLD HAS requirement: cannot power off i-unit if
583 * ISP has IRQ not serviced.
584 * So, here we need to check if there is any pending
585 * IRQ, if so, waiting for it to be served
587 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
588 irq &= BIT(INTR_IIR);
589 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
591 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
592 if (!(irq & BIT(INTR_IIR)))
595 atomisp_css2_hw_store_32(MRFLD_INTR_CLEAR_REG, 0xFFFFFFFF);
596 atomisp_load_uint32(MRFLD_INTR_STATUS_REG, &irq);
599 "%s: fail to clear isp interrupt status reg=0x%x\n",
601 spin_unlock_irqrestore(&isp->lock, flags);
604 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
605 irq &= BIT(INTR_IIR);
606 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
608 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
609 if (!(irq & BIT(INTR_IIR))) {
610 atomisp_css2_hw_store_32(MRFLD_INTR_ENABLE_REG, 0x0);
614 "%s: error in iunit interrupt. status reg=0x%x\n",
616 spin_unlock_irqrestore(&isp->lock, flags);
622 * before powering off IUNIT, clear the pending interrupts
623 * and disable the interrupt. driver should avoid writing 0
624 * to IIR. It could block subsequent interrupt messages.
625 * HW sighting:4568410.
627 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
628 irq &= ~BIT(INTR_IER);
629 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
631 atomisp_msi_irq_uninit(isp);
632 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
633 spin_unlock_irqrestore(&isp->lock, flags);
639 * WA for DDR DVFS enable/disable
640 * By default, ISP will force DDR DVFS 1600MHz before disable DVFS
642 static void punit_ddr_dvfs_enable(bool enable)
644 int door_bell = 1 << 8;
648 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
650 reg &= ~(MRFLD_BIT0 | MRFLD_BIT1);
652 reg |= (MRFLD_BIT1 | door_bell);
653 reg &= ~(MRFLD_BIT0);
655 iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, MRFLD_ISPSSDVFS, reg);
657 /* Check Req_ACK to see freq status, wait until door_bell is cleared */
658 while ((reg & door_bell) && max_wait--) {
659 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSDVFS, ®);
660 usleep_range(100, 500);
664 pr_info("DDR DVFS, door bell is not cleared within 3ms\n");
667 static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable)
669 unsigned long timeout;
670 u32 val = enable ? MRFLD_ISPSSPM0_IUNIT_POWER_ON :
671 MRFLD_ISPSSPM0_IUNIT_POWER_OFF;
673 dev_dbg(isp->dev, "IUNIT power-%s.\n", enable ? "on" : "off");
675 /* WA for P-Unit, if DVFS enabled, ISP timeout observed */
676 if (IS_CHT && enable)
677 punit_ddr_dvfs_enable(false);
680 * FIXME:WA for ECS28A, with this sleep, CTS
681 * android.hardware.camera2.cts.CameraDeviceTest#testCameraDeviceAbort
682 * PASS, no impact on other platforms
684 if (IS_BYT && enable)
687 /* Write to ISPSSPM0 bit[1:0] to power on/off the IUNIT */
688 iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0,
689 val, MRFLD_ISPSSPM0_ISPSSC_MASK);
692 if (IS_CHT && !enable)
693 punit_ddr_dvfs_enable(true);
696 * There should be no IUNIT access while power-down is
697 * in progress. HW sighting: 4567865.
698 * Wait up to 50 ms for the IUNIT to shut down.
699 * And we do the same for power on.
701 timeout = jiffies + msecs_to_jiffies(50);
705 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
706 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &tmp);
707 tmp = (tmp >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) & MRFLD_ISPSSPM0_ISPSSC_MASK;
709 trace_ipu_cstate(enable);
713 if (time_after(jiffies, timeout))
716 /* FIXME: experienced value for delay */
717 usleep_range(100, 150);
723 dev_err(isp->dev, "IUNIT power-%s timeout.\n", enable ? "on" : "off");
727 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
728 int atomisp_mrfld_power_down(struct atomisp_device *isp)
730 return atomisp_mrfld_power(isp, false);
733 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
734 int atomisp_mrfld_power_up(struct atomisp_device *isp)
736 return atomisp_mrfld_power(isp, true);
739 int atomisp_runtime_suspend(struct device *dev)
741 struct atomisp_device *isp = (struct atomisp_device *)
742 dev_get_drvdata(dev);
745 ret = atomisp_mrfld_pre_power_down(isp);
749 /*Turn off the ISP d-phy*/
750 ret = atomisp_ospm_dphy_down(isp);
753 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
754 return atomisp_mrfld_power_down(isp);
757 int atomisp_runtime_resume(struct device *dev)
759 struct atomisp_device *isp = (struct atomisp_device *)
760 dev_get_drvdata(dev);
763 ret = atomisp_mrfld_power_up(isp);
767 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
768 if (isp->sw_contex.power_state == ATOM_ISP_POWER_DOWN) {
769 /*Turn on ISP d-phy */
770 ret = atomisp_ospm_dphy_up(isp);
772 dev_err(isp->dev, "Failed to power up ISP!.\n");
777 /*restore register values for iUnit and iUnitPHY registers*/
778 if (isp->saved_regs.pcicmdsts)
779 atomisp_restore_iunit_reg(isp);
781 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
785 static int __maybe_unused atomisp_suspend(struct device *dev)
787 struct atomisp_device *isp = (struct atomisp_device *)
788 dev_get_drvdata(dev);
789 /* FIXME: only has one isp_subdev at present */
790 struct atomisp_sub_device *asd = &isp->asd[0];
795 * FIXME: Suspend is not supported by sensors. Abort if any video
798 if (atomisp_dev_users(isp))
801 spin_lock_irqsave(&isp->lock, flags);
802 if (asd->streaming != ATOMISP_DEVICE_STREAMING_DISABLED) {
803 spin_unlock_irqrestore(&isp->lock, flags);
804 dev_err(isp->dev, "atomisp cannot suspend at this time.\n");
807 spin_unlock_irqrestore(&isp->lock, flags);
809 ret = atomisp_mrfld_pre_power_down(isp);
813 /*Turn off the ISP d-phy */
814 ret = atomisp_ospm_dphy_down(isp);
816 dev_err(isp->dev, "fail to power off ISP\n");
819 cpu_latency_qos_update_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
820 return atomisp_mrfld_power_down(isp);
823 static int __maybe_unused atomisp_resume(struct device *dev)
825 struct atomisp_device *isp = (struct atomisp_device *)
826 dev_get_drvdata(dev);
829 ret = atomisp_mrfld_power_up(isp);
833 cpu_latency_qos_update_request(&isp->pm_qos, isp->max_isr_latency);
835 /*Turn on ISP d-phy */
836 ret = atomisp_ospm_dphy_up(isp);
838 dev_err(isp->dev, "Failed to power up ISP!.\n");
842 /*restore register values for iUnit and iUnitPHY registers*/
843 if (isp->saved_regs.pcicmdsts)
844 atomisp_restore_iunit_reg(isp);
846 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
850 int atomisp_csi_lane_config(struct atomisp_device *isp)
852 struct pci_dev *pdev = to_pci_dev(isp->dev);
853 static const struct {
855 u8 lanes[MRFLD_PORT_NUM];
857 /* Tangier/Merrifield available lane configurations */
858 { 0x00, { 4, 1, 0 } }, /* 00000 */
859 { 0x01, { 3, 1, 0 } }, /* 00001 */
860 { 0x02, { 2, 1, 0 } }, /* 00010 */
861 { 0x03, { 1, 1, 0 } }, /* 00011 */
862 { 0x04, { 2, 1, 2 } }, /* 00100 */
863 { 0x08, { 3, 1, 1 } }, /* 01000 */
864 { 0x09, { 2, 1, 1 } }, /* 01001 */
865 { 0x0a, { 1, 1, 1 } }, /* 01010 */
867 /* Anniedale/Moorefield only configurations */
868 { 0x10, { 4, 2, 0 } }, /* 10000 */
869 { 0x11, { 3, 2, 0 } }, /* 10001 */
870 { 0x12, { 2, 2, 0 } }, /* 10010 */
871 { 0x13, { 1, 2, 0 } }, /* 10011 */
872 { 0x14, { 2, 2, 2 } }, /* 10100 */
873 { 0x18, { 3, 2, 1 } }, /* 11000 */
874 { 0x19, { 2, 2, 1 } }, /* 11001 */
875 { 0x1a, { 1, 2, 1 } }, /* 11010 */
879 u8 sensor_lanes[MRFLD_PORT_NUM] = { 0 };
882 u32 port_config_mask;
883 int port3_lanes_shift;
885 if (isp->media_dev.hw_revision <
886 ATOMISP_HW_REVISION_ISP2401_LEGACY <<
887 ATOMISP_HW_REVISION_SHIFT) {
889 port_config_mask = MRFLD_PORT_CONFIG_MASK;
890 port3_lanes_shift = MRFLD_PORT3_LANES_SHIFT;
892 /* Moorefield / Cherryview */
893 port_config_mask = CHV_PORT_CONFIG_MASK;
894 port3_lanes_shift = CHV_PORT3_LANES_SHIFT;
897 if (isp->media_dev.hw_revision <
898 ATOMISP_HW_REVISION_ISP2401 <<
899 ATOMISP_HW_REVISION_SHIFT) {
900 /* Merrifield / Moorefield legacy input system */
901 nportconfigs = MRFLD_PORT_CONFIG_NUM;
903 /* Moorefield / Cherryview new input system */
904 nportconfigs = ARRAY_SIZE(portconfigs);
907 for (i = 0; i < isp->input_cnt; i++) {
908 struct camera_mipi_info *mipi_info;
910 if (isp->inputs[i].type != RAW_CAMERA &&
911 isp->inputs[i].type != SOC_CAMERA)
914 mipi_info = atomisp_to_sensor_mipi_info(isp->inputs[i].camera);
918 switch (mipi_info->port) {
919 case ATOMISP_CAMERA_PORT_PRIMARY:
920 sensor_lanes[0] = mipi_info->num_lanes;
922 case ATOMISP_CAMERA_PORT_SECONDARY:
923 sensor_lanes[1] = mipi_info->num_lanes;
925 case ATOMISP_CAMERA_PORT_TERTIARY:
926 sensor_lanes[2] = mipi_info->num_lanes;
930 "%s: invalid port: %d for the %dth sensor\n",
931 __func__, mipi_info->port, i);
936 for (i = 0; i < nportconfigs; i++) {
937 for (j = 0; j < MRFLD_PORT_NUM; j++)
938 if (sensor_lanes[j] &&
939 sensor_lanes[j] != portconfigs[i].lanes[j])
942 if (j == MRFLD_PORT_NUM)
943 break; /* Found matching setting */
946 if (i >= nportconfigs) {
948 "%s: could not find the CSI port setting for %d-%d-%d\n",
950 sensor_lanes[0], sensor_lanes[1], sensor_lanes[2]);
954 pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
955 csi_control &= ~port_config_mask;
956 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
957 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
958 | (portconfigs[i].lanes[1] ? 0 : (1 << MRFLD_PORT2_ENABLE_SHIFT))
959 | (portconfigs[i].lanes[2] ? 0 : (1 << MRFLD_PORT3_ENABLE_SHIFT))
960 | (((1 << portconfigs[i].lanes[0]) - 1) << MRFLD_PORT1_LANES_SHIFT)
961 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
962 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
964 pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
967 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
968 __func__, portconfigs[i].lanes[0], portconfigs[i].lanes[1],
969 portconfigs[i].lanes[2], csi_control);
974 static int atomisp_subdev_probe(struct atomisp_device *isp)
976 const struct atomisp_platform_data *pdata;
977 struct intel_v4l2_subdev_table *subdevs;
978 int ret, raw_index = -1, count;
980 pdata = atomisp_get_platform_data();
982 dev_err(isp->dev, "no platform data available\n");
986 /* FIXME: should return -EPROBE_DEFER if not all subdevs were probed */
987 for (count = 0; count < SUBDEV_WAIT_TIMEOUT_MAX_COUNT; count++) {
988 int camera_count = 0;
990 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
991 if (subdevs->type == RAW_CAMERA ||
992 subdevs->type == SOC_CAMERA)
997 msleep(SUBDEV_WAIT_TIMEOUT);
999 /* Wait more time to give more time for subdev init code to finish */
1000 msleep(5 * SUBDEV_WAIT_TIMEOUT);
1002 /* FIXME: should, instead, use I2C probe */
1004 for (subdevs = pdata->subdevs; subdevs->type; ++subdevs) {
1005 struct v4l2_subdev *subdev;
1006 struct i2c_board_info *board_info =
1007 &subdevs->v4l2_subdev.board_info;
1008 struct i2c_adapter *adapter =
1009 i2c_get_adapter(subdevs->v4l2_subdev.i2c_adapter_id);
1012 dev_info(isp->dev, "Probing Subdev %s\n", board_info->type);
1016 "Failed to find i2c adapter for subdev %s\n",
1021 /* In G-Min, the sensor devices will already be probed
1022 * (via ACPI) and registered, do not create new
1024 subdev = atomisp_gmin_find_subdev(adapter, board_info);
1026 dev_warn(isp->dev, "Subdev %s not found\n",
1030 ret = v4l2_device_register_subdev(&isp->v4l2_dev, subdev);
1032 dev_warn(isp->dev, "Subdev %s detection fail\n",
1038 dev_warn(isp->dev, "Subdev %s detection fail\n",
1043 dev_info(isp->dev, "Subdev %s successfully register\n",
1046 switch (subdevs->type) {
1048 dev_dbg(isp->dev, "raw_index: %d\n", raw_index);
1049 raw_index = isp->input_cnt;
1052 dev_dbg(isp->dev, "SOC_INDEX: %d\n", isp->input_cnt);
1053 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1055 "too many atomisp inputs, ignored\n");
1059 isp->inputs[isp->input_cnt].type = subdevs->type;
1060 isp->inputs[isp->input_cnt].port = subdevs->port;
1061 isp->inputs[isp->input_cnt].camera = subdev;
1062 isp->inputs[isp->input_cnt].sensor_index = 0;
1064 * initialize the subdev frame size, then next we can
1065 * judge whether frame_size store effective value via
1068 isp->inputs[isp->input_cnt].frame_size.pixel_format = 0;
1069 isp->inputs[isp->input_cnt].camera_caps =
1070 atomisp_get_default_camera_caps();
1071 sensor_num = isp->inputs[isp->input_cnt]
1072 .camera_caps->sensor_num;
1074 for (i = 1; i < sensor_num; i++) {
1075 if (isp->input_cnt >= ATOM_ISP_MAX_INPUTS) {
1077 "atomisp inputs out of range\n");
1080 isp->inputs[isp->input_cnt] =
1081 isp->inputs[isp->input_cnt - 1];
1082 isp->inputs[isp->input_cnt].sensor_index = i;
1089 "too many atomisp motors, ignored %s\n",
1093 isp->motor = subdev;
1099 "too many atomisp flash devices, ignored %s\n",
1103 isp->flash = subdev;
1106 dev_dbg(isp->dev, "unknown subdev probed\n");
1112 * HACK: Currently VCM belongs to primary sensor only, but correct
1113 * approach must be to acquire from platform code which sensor
1116 if (isp->motor && raw_index >= 0)
1117 isp->inputs[raw_index].motor = isp->motor;
1119 /* Proceed even if no modules detected. For COS mode and no modules. */
1120 if (!isp->input_cnt)
1121 dev_warn(isp->dev, "no camera attached or fail to detect\n");
1123 dev_info(isp->dev, "detected %d camera sensors\n",
1126 return atomisp_csi_lane_config(isp);
1129 static void atomisp_unregister_entities(struct atomisp_device *isp)
1132 struct v4l2_subdev *sd, *next;
1134 for (i = 0; i < isp->num_of_streams; i++)
1135 atomisp_subdev_unregister_entities(&isp->asd[i]);
1136 atomisp_tpg_unregister_entities(&isp->tpg);
1137 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1138 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1140 list_for_each_entry_safe(sd, next, &isp->v4l2_dev.subdevs, list)
1141 v4l2_device_unregister_subdev(sd);
1143 v4l2_device_unregister(&isp->v4l2_dev);
1144 media_device_unregister(&isp->media_dev);
1145 media_device_cleanup(&isp->media_dev);
1148 static int atomisp_register_entities(struct atomisp_device *isp)
1153 isp->media_dev.dev = isp->dev;
1155 strscpy(isp->media_dev.model, "Intel Atom ISP",
1156 sizeof(isp->media_dev.model));
1158 media_device_init(&isp->media_dev);
1159 isp->v4l2_dev.mdev = &isp->media_dev;
1160 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1162 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1164 goto v4l2_device_failed;
1167 ret = atomisp_subdev_probe(isp);
1169 goto csi_and_subdev_probe_failed;
1171 /* Register internal entities */
1172 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++) {
1173 ret = atomisp_mipi_csi2_register_entities(&isp->csi2_port[i],
1179 dev_err(isp->dev, "failed to register the CSI port: %d\n", i);
1180 /* deregister all registered CSI ports */
1182 atomisp_mipi_csi2_unregister_entities(
1183 &isp->csi2_port[i]);
1185 goto csi_and_subdev_probe_failed;
1188 ret = atomisp_tpg_register_entities(&isp->tpg, &isp->v4l2_dev);
1190 dev_err(isp->dev, "atomisp_tpg_register_entities\n");
1191 goto tpg_register_failed;
1194 for (i = 0; i < isp->num_of_streams; i++) {
1195 struct atomisp_sub_device *asd = &isp->asd[i];
1197 ret = atomisp_subdev_register_subdev(asd, &isp->v4l2_dev);
1199 dev_err(isp->dev, "atomisp_subdev_register_subdev fail\n");
1201 atomisp_subdev_unregister_entities(
1203 goto subdev_register_failed;
1207 for (i = 0; i < isp->num_of_streams; i++) {
1208 struct atomisp_sub_device *asd = &isp->asd[i];
1210 init_completion(&asd->init_done);
1212 asd->delayed_init_workq =
1213 alloc_workqueue(isp->v4l2_dev.name, WQ_CPU_INTENSIVE,
1215 if (!asd->delayed_init_workq) {
1217 "Failed to initialize delayed init workq\n");
1221 destroy_workqueue(isp->asd[i - 1].
1222 delayed_init_workq);
1223 goto wq_alloc_failed;
1225 INIT_WORK(&asd->delayed_init_work, atomisp_delayed_init_work);
1228 for (i = 0; i < isp->input_cnt; i++) {
1229 if (isp->inputs[i].port >= ATOMISP_CAMERA_NR_PORTS) {
1230 dev_err(isp->dev, "isp->inputs port %d not supported\n",
1231 isp->inputs[i].port);
1237 if (isp->input_cnt < ATOM_ISP_MAX_INPUTS) {
1239 "TPG detected, camera_cnt: %d\n", isp->input_cnt);
1240 isp->inputs[isp->input_cnt].type = TEST_PATTERN;
1241 isp->inputs[isp->input_cnt].port = -1;
1242 isp->inputs[isp->input_cnt].camera_caps =
1243 atomisp_get_default_camera_caps();
1244 isp->inputs[isp->input_cnt++].camera = &isp->tpg.sd;
1246 dev_warn(isp->dev, "too many atomisp inputs, TPG ignored.\n");
1252 for (i = 0; i < isp->num_of_streams; i++)
1253 destroy_workqueue(isp->asd[i].
1254 delayed_init_workq);
1256 for (i = 0; i < isp->num_of_streams; i++)
1257 atomisp_subdev_unregister_entities(
1259 subdev_register_failed:
1260 atomisp_tpg_unregister_entities(&isp->tpg);
1261 tpg_register_failed:
1262 for (i = 0; i < ATOMISP_CAMERA_NR_PORTS; i++)
1263 atomisp_mipi_csi2_unregister_entities(&isp->csi2_port[i]);
1264 csi_and_subdev_probe_failed:
1265 v4l2_device_unregister(&isp->v4l2_dev);
1267 media_device_unregister(&isp->media_dev);
1268 media_device_cleanup(&isp->media_dev);
1272 static int atomisp_register_device_nodes(struct atomisp_device *isp)
1276 for (i = 0; i < isp->num_of_streams; i++) {
1277 err = atomisp_subdev_register_video_nodes(&isp->asd[i], &isp->v4l2_dev);
1282 err = atomisp_create_pads_links(isp);
1286 err = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1290 return media_device_register(&isp->media_dev);
1293 static int atomisp_initialize_modules(struct atomisp_device *isp)
1297 ret = atomisp_mipi_csi2_init(isp);
1299 dev_err(isp->dev, "mipi csi2 initialization failed\n");
1300 goto error_mipi_csi2;
1303 ret = atomisp_tpg_init(isp);
1305 dev_err(isp->dev, "tpg initialization failed\n");
1309 ret = atomisp_subdev_init(isp);
1311 dev_err(isp->dev, "ISP subdev initialization failed\n");
1312 goto error_isp_subdev;
1319 atomisp_tpg_cleanup(isp);
1321 atomisp_mipi_csi2_cleanup(isp);
1325 static void atomisp_uninitialize_modules(struct atomisp_device *isp)
1327 atomisp_tpg_cleanup(isp);
1328 atomisp_mipi_csi2_cleanup(isp);
1331 const struct firmware *
1332 atomisp_load_firmware(struct atomisp_device *isp)
1334 const struct firmware *fw;
1336 char *fw_path = NULL;
1341 if (firmware_name[0] != '\0') {
1342 fw_path = firmware_name;
1344 if ((isp->media_dev.hw_revision >> ATOMISP_HW_REVISION_SHIFT)
1345 == ATOMISP_HW_REVISION_ISP2401)
1346 fw_path = "shisp_2401a0_v21.bin";
1348 if (isp->media_dev.hw_revision ==
1349 ((ATOMISP_HW_REVISION_ISP2401_LEGACY << ATOMISP_HW_REVISION_SHIFT)
1350 | ATOMISP_HW_STEPPING_A0))
1351 fw_path = "shisp_2401a0_legacy_v21.bin";
1353 if (isp->media_dev.hw_revision ==
1354 ((ATOMISP_HW_REVISION_ISP2400 << ATOMISP_HW_REVISION_SHIFT)
1355 | ATOMISP_HW_STEPPING_B0))
1356 fw_path = "shisp_2400b0_v21.bin";
1360 dev_err(isp->dev, "Unsupported hw_revision 0x%x\n",
1361 isp->media_dev.hw_revision);
1365 rc = request_firmware(&fw, fw_path, isp->dev);
1368 "atomisp: Error %d while requesting firmware %s\n",
1377 * Check for flags the driver was compiled with against the PCI
1378 * device. Always returns true on other than ISP 2400.
1380 static bool is_valid_device(struct pci_dev *pdev, const struct pci_device_id *id)
1383 const char *product;
1385 product = dmi_get_system_info(DMI_PRODUCT_NAME);
1387 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1388 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1389 name = "Merrifield";
1391 case ATOMISP_PCI_DEVICE_SOC_BYT:
1394 case ATOMISP_PCI_DEVICE_SOC_ANN:
1397 case ATOMISP_PCI_DEVICE_SOC_CHT:
1398 name = "Cherrytrail";
1401 dev_err(&pdev->dev, "%s: unknown device ID %x04:%x04\n",
1402 product, id->vendor, id->device);
1406 if (pdev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {
1407 dev_err(&pdev->dev, "%s revision %d is not unsupported\n",
1408 name, pdev->revision);
1414 * remove the if once the driver become generic
1419 dev_err(&pdev->dev, "Support for %s (ISP2401) was disabled at compile time\n",
1425 dev_err(&pdev->dev, "Support for %s (ISP2400) was disabled at compile time\n",
1431 dev_info(&pdev->dev, "Detected %s version %d (ISP240%c) on %s\n",
1432 name, pdev->revision, IS_ISP2401 ? '1' : '0', product);
1437 #define ATOM_ISP_PCI_BAR 0
1439 static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1441 const struct atomisp_platform_data *pdata;
1442 struct atomisp_device *isp;
1447 if (!is_valid_device(pdev, id))
1450 /* Pointer to struct device. */
1451 atomisp_dev = &pdev->dev;
1453 pdata = atomisp_get_platform_data();
1455 dev_warn(&pdev->dev, "no platform data available\n");
1457 err = pcim_enable_device(pdev);
1459 dev_err(&pdev->dev, "Failed to enable CI ISP device (%d)\n", err);
1463 start = pci_resource_start(pdev, ATOM_ISP_PCI_BAR);
1464 dev_dbg(&pdev->dev, "start: 0x%x\n", start);
1466 err = pcim_iomap_regions(pdev, BIT(ATOM_ISP_PCI_BAR), pci_name(pdev));
1468 dev_err(&pdev->dev, "Failed to I/O memory remapping (%d)\n", err);
1472 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
1475 goto atomisp_dev_alloc_fail;
1478 isp->dev = &pdev->dev;
1479 isp->base = pcim_iomap_table(pdev)[ATOM_ISP_PCI_BAR];
1480 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1481 isp->saved_regs.ispmmadr = start;
1483 dev_dbg(&pdev->dev, "atomisp mmio base: %p\n", isp->base);
1485 mutex_init(&isp->mutex);
1486 spin_lock_init(&isp->lock);
1488 /* This is not a true PCI device on SoC, so the delay is not needed. */
1489 pdev->d3hot_delay = 0;
1491 pci_set_drvdata(pdev, isp);
1493 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1494 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
1495 isp->media_dev.hw_revision =
1496 (ATOMISP_HW_REVISION_ISP2400
1497 << ATOMISP_HW_REVISION_SHIFT) |
1498 ATOMISP_HW_STEPPING_B0;
1500 switch (id->device) {
1501 case ATOMISP_PCI_DEVICE_SOC_MRFLD_1179:
1502 isp->dfs = &dfs_config_merr_1179;
1504 case ATOMISP_PCI_DEVICE_SOC_MRFLD_117A:
1505 isp->dfs = &dfs_config_merr_117a;
1509 isp->dfs = &dfs_config_merr;
1512 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1514 case ATOMISP_PCI_DEVICE_SOC_BYT:
1515 isp->media_dev.hw_revision =
1516 (ATOMISP_HW_REVISION_ISP2400
1517 << ATOMISP_HW_REVISION_SHIFT) |
1518 ATOMISP_HW_STEPPING_B0;
1521 * Note: some Intel-based tablets with Android use a different
1522 * DFS table. Based on the comments at the Yocto Aero meta
1523 * version of this driver (at the ssid.h header), they're
1524 * identified via a "spid" var:
1526 * androidboot.spid=vend:cust:manu:plat:prod:hard
1528 * As we don't have this upstream, nor we know enough details
1529 * to use a DMI or PCI match table, the old code was just
1530 * removed, but let's keep a note here as a reminder that,
1531 * for certain devices, we may need to limit the max DFS
1532 * frequency to be below certain values, adjusting the
1533 * resolution accordingly.
1535 isp->dfs = &dfs_config_byt;
1538 * HPLL frequency is known to be device-specific, but we don't
1539 * have specs yet for exactly how it varies. Default to
1540 * BYT-CR but let provisioning set it via EFI variable
1542 isp->hpll_freq = gmin_get_var_int(&pdev->dev, false, "HpllFreq", HPLL_FREQ_2000MHZ);
1545 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1546 * in power off. Set d3cold_delay to 0 since default 100ms is not
1549 pdev->d3cold_delay = 0;
1551 case ATOMISP_PCI_DEVICE_SOC_ANN:
1552 isp->media_dev.hw_revision = ( ATOMISP_HW_REVISION_ISP2401
1553 << ATOMISP_HW_REVISION_SHIFT);
1554 isp->media_dev.hw_revision |= pdev->revision < 2 ?
1555 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1556 isp->dfs = &dfs_config_merr;
1557 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1559 case ATOMISP_PCI_DEVICE_SOC_CHT:
1560 isp->media_dev.hw_revision = ( ATOMISP_HW_REVISION_ISP2401
1561 << ATOMISP_HW_REVISION_SHIFT);
1562 isp->media_dev.hw_revision |= pdev->revision < 2 ?
1563 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1565 isp->dfs = &dfs_config_cht;
1566 pdev->d3cold_delay = 0;
1568 iosf_mbi_read(BT_MBI_UNIT_CCK, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1569 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1571 isp->hpll_freq = HPLL_FREQ_800MHZ;
1574 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1577 isp->hpll_freq = HPLL_FREQ_2000MHZ;
1580 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1581 dev_warn(&pdev->dev, "read HPLL from cck failed. Default to 1600 MHz.\n");
1585 dev_err(&pdev->dev, "un-supported IUNIT device\n");
1587 goto atomisp_dev_alloc_fail;
1590 dev_info(&pdev->dev, "ISP HPLL frequency base = %d MHz\n", isp->hpll_freq);
1592 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1594 /* Load isp firmware from user space */
1595 if (!defer_fw_load) {
1596 isp->firmware = atomisp_load_firmware(isp);
1597 if (!isp->firmware) {
1599 dev_dbg(&pdev->dev, "Firmware load failed\n");
1603 err = sh_css_check_firmware_version(isp->dev, isp->firmware->data);
1605 dev_dbg(&pdev->dev, "Firmware version check failed\n");
1606 goto fw_validation_fail;
1609 dev_info(&pdev->dev, "Firmware load will be deferred\n");
1612 pci_set_master(pdev);
1614 err = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
1616 dev_err(&pdev->dev, "Failed to enable msi (%d)\n", err);
1617 goto enable_msi_fail;
1620 atomisp_msi_irq_init(isp);
1622 cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
1625 * for MRFLD, Software/firmware needs to write a 1 to bit 0 of
1626 * the register at CSI_RECEIVER_SELECTION_REG to enable SH CSI
1627 * backend write 0 will enable Arasan CSI backend, which has
1628 * bugs(like sighting:4567697 and 4567699) and will be removed
1631 atomisp_css2_hw_store_32(MRFLD_CSI_RECEIVER_SELECTION_REG, 1);
1633 if ((id->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
1634 ATOMISP_PCI_DEVICE_SOC_MRFLD) {
1638 * Workaround for imbalance data eye issue which is observed
1641 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, &csi_afe_trim);
1642 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1643 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1644 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1645 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1646 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1647 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT));
1648 csi_afe_trim |= (MRFLD_PCI_CSI1_HSRXCLKTRIM <<
1649 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1650 (MRFLD_PCI_CSI2_HSRXCLKTRIM <<
1651 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1652 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1653 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1654 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, csi_afe_trim);
1657 err = atomisp_initialize_modules(isp);
1659 dev_err(&pdev->dev, "atomisp_initialize_modules (%d)\n", err);
1660 goto initialize_modules_fail;
1663 err = atomisp_register_entities(isp);
1665 dev_err(&pdev->dev, "atomisp_register_entities failed (%d)\n", err);
1666 goto register_entities_fail;
1669 INIT_WORK(&isp->assert_recovery_work, atomisp_assert_recovery_work);
1671 /* save the iunit context only once after all the values are init'ed. */
1672 atomisp_save_iunit_reg(isp);
1674 pm_runtime_put_noidle(&pdev->dev);
1675 pm_runtime_allow(&pdev->dev);
1677 /* Init ISP memory management */
1680 err = devm_request_threaded_irq(&pdev->dev, pdev->irq,
1681 atomisp_isr, atomisp_isr_thread,
1682 IRQF_SHARED, "isp_irq", isp);
1684 dev_err(&pdev->dev, "Failed to request irq (%d)\n", err);
1685 goto request_irq_fail;
1688 /* Load firmware into ISP memory */
1689 if (!defer_fw_load) {
1690 err = atomisp_css_load_firmware(isp);
1692 dev_err(&pdev->dev, "Failed to init css.\n");
1696 dev_dbg(&pdev->dev, "Skip css init.\n");
1698 /* Clear FW image from memory */
1699 release_firmware(isp->firmware);
1700 isp->firmware = NULL;
1701 isp->css_env.isp_css_fw.data = NULL;
1703 err = atomisp_register_device_nodes(isp);
1707 atomisp_drvfs_init(isp);
1712 devm_free_irq(&pdev->dev, pdev->irq, isp);
1715 pm_runtime_get_noresume(&pdev->dev);
1716 atomisp_unregister_entities(isp);
1717 register_entities_fail:
1718 atomisp_uninitialize_modules(isp);
1719 initialize_modules_fail:
1720 cpu_latency_qos_remove_request(&isp->pm_qos);
1721 atomisp_msi_irq_uninit(isp);
1722 pci_free_irq_vectors(pdev);
1725 release_firmware(isp->firmware);
1728 * Switch off ISP, as keeping it powered on would prevent
1729 * reaching S0ix states.
1731 * The following lines have been copied from atomisp suspend path
1734 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
1735 irq &= BIT(INTR_IIR);
1736 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
1738 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
1739 irq &= ~BIT(INTR_IER);
1740 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
1742 atomisp_msi_irq_uninit(isp);
1744 atomisp_ospm_dphy_down(isp);
1746 /* Address later when we worry about the ...field chips */
1747 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1748 dev_err(&pdev->dev, "Failed to switch off ISP\n");
1750 atomisp_dev_alloc_fail:
1751 pcim_iounmap_regions(pdev, BIT(ATOM_ISP_PCI_BAR));
1757 static void atomisp_pci_remove(struct pci_dev *pdev)
1759 struct atomisp_device *isp = pci_get_drvdata(pdev);
1761 dev_info(&pdev->dev, "Removing atomisp driver\n");
1763 atomisp_drvfs_exit();
1765 ia_css_unload_firmware();
1768 pm_runtime_forbid(&pdev->dev);
1769 pm_runtime_get_noresume(&pdev->dev);
1770 cpu_latency_qos_remove_request(&isp->pm_qos);
1772 atomisp_msi_irq_uninit(isp);
1773 atomisp_unregister_entities(isp);
1775 release_firmware(isp->firmware);
1778 static const struct pci_device_id atomisp_pci_tbl[] = {
1780 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD)},
1781 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_1179)},
1782 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_MRFLD_117A)},
1784 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_BYT)},
1785 /* Anniedale (Merrifield+ / Moorefield) */
1786 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_ANN)},
1788 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ATOMISP_PCI_DEVICE_SOC_CHT)},
1792 MODULE_DEVICE_TABLE(pci, atomisp_pci_tbl);
1794 static const struct dev_pm_ops atomisp_pm_ops = {
1795 .runtime_suspend = atomisp_runtime_suspend,
1796 .runtime_resume = atomisp_runtime_resume,
1797 .suspend = atomisp_suspend,
1798 .resume = atomisp_resume,
1801 static struct pci_driver atomisp_pci_driver = {
1803 .pm = &atomisp_pm_ops,
1805 .name = "atomisp-isp2",
1806 .id_table = atomisp_pci_tbl,
1807 .probe = atomisp_pci_probe,
1808 .remove = atomisp_pci_remove,
1811 module_pci_driver(atomisp_pci_driver);
1813 MODULE_AUTHOR("Wen Wang <wen.w.wang@intel.com>");
1814 MODULE_AUTHOR("Xiaolin Zhang <xiaolin.zhang@intel.com>");
1815 MODULE_LICENSE("GPL");
1816 MODULE_DESCRIPTION("Intel ATOM Platform ISP Driver");