drivers/staging/media/atomisp/i2c/ov2680.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Support for OmniVision OV2680 5M camera sensor.
   4  *
   5  * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License version
   9  * 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  *
  17  */
  18
  19 #ifndef __OV2680_H__
  20 #define __OV2680_H__
  21 #include <linux/kernel.h>
  22 #include <linux/types.h>
  23 #include <linux/i2c.h>
  24 #include <linux/delay.h>
  25 #include <linux/videodev2.h>
  26 #include <linux/spinlock.h>
  27 #include <media/v4l2-subdev.h>
  28 #include <media/v4l2-device.h>
  29 #include <media/v4l2-ctrls.h>
  30 #include <linux/v4l2-mediabus.h>
  31 #include <media/media-entity.h>
  32
  33 #include "../include/linux/atomisp_platform.h"
  34
  35 #define OV2680_NATIVE_WIDTH                     1616
  36 #define OV2680_NATIVE_HEIGHT                    1216
  37
  38 /* 1704 * 1294 * 30fps = 66MHz pixel clock */
  39 #define OV2680_PIXELS_PER_LINE                  1704
  40 #define OV2680_LINES_PER_FRAME                  1294
  41 #define OV2680_FPS                              30
  42 #define OV2680_SKIP_FRAMES                      3
  43
  44 /* If possible send 16 extra rows / lines to the ISP as padding */
  45 #define OV2680_END_MARGIN                       16
  46
  47 #define OV2680_FOCAL_LENGTH_NUM                 334     /*3.34mm*/
  48
  49 #define OV2680_INTEGRATION_TIME_MARGIN          8
  50 #define OV2680_ID                               0x2680
  51
  52 /*
  53  * OV2680 System control registers
  54  */
  55 #define OV2680_SW_SLEEP                         0x0100
  56 #define OV2680_SW_RESET                         0x0103
  57 #define OV2680_SW_STREAM                        0x0100
  58
  59 #define OV2680_SC_CMMN_CHIP_ID_H                0x300A
  60 #define OV2680_SC_CMMN_CHIP_ID_L                0x300B
  61 #define OV2680_SC_CMMN_SCCB_ID                  0x302B /* 0x300C*/
  62 #define OV2680_SC_CMMN_SUB_ID                   0x302A /* process, version*/
  63
  64 #define OV2680_GROUP_ACCESS                     0x3208 /*Bit[7:4] Group control, Bit[3:0] Group ID*/
  65
  66 #define OV2680_REG_EXPOSURE_PK_HIGH             0x3500
  67 #define OV2680_REG_GAIN_PK                      0x350a
  68
  69 #define OV2680_HORIZONTAL_START_H               0x3800 /* Bit[11:8] */
  70 #define OV2680_HORIZONTAL_START_L               0x3801 /* Bit[7:0]  */
  71 #define OV2680_VERTICAL_START_H                 0x3802 /* Bit[11:8] */
  72 #define OV2680_VERTICAL_START_L                 0x3803 /* Bit[7:0]  */
  73 #define OV2680_HORIZONTAL_END_H                 0x3804 /* Bit[11:8] */
  74 #define OV2680_HORIZONTAL_END_L                 0x3805 /* Bit[7:0]  */
  75 #define OV2680_VERTICAL_END_H                   0x3806 /* Bit[11:8] */
  76 #define OV2680_VERTICAL_END_L                   0x3807 /* Bit[7:0]  */
  77 #define OV2680_HORIZONTAL_OUTPUT_SIZE_H         0x3808 /* Bit[11:8] */
  78 #define OV2680_HORIZONTAL_OUTPUT_SIZE_L         0x3809 /* Bit[7:0]  */
  79 #define OV2680_VERTICAL_OUTPUT_SIZE_H           0x380a /* Bit[11:8] */
  80 #define OV2680_VERTICAL_OUTPUT_SIZE_L           0x380b /* Bit[7:0]  */
  81 #define OV2680_HTS                              0x380c
  82 #define OV2680_VTS                              0x380e
  83 #define OV2680_ISP_X_WIN                        0x3810
  84 #define OV2680_ISP_Y_WIN                        0x3812
  85 #define OV2680_X_INC                            0x3814
  86 #define OV2680_Y_INC                            0x3815
  87
  88 #define OV2680_FRAME_OFF_NUM                    0x4202
  89
  90 /*Flip/Mirror*/
  91 #define OV2680_REG_FORMAT1                      0x3820
  92 #define OV2680_REG_FORMAT2                      0x3821
  93
  94 #define OV2680_MWB_RED_GAIN_H                   0x5004/*0x3400*/
  95 #define OV2680_MWB_GREEN_GAIN_H                 0x5006/*0x3402*/
  96 #define OV2680_MWB_BLUE_GAIN_H                  0x5008/*0x3404*/
  97 #define OV2680_MWB_GAIN_MAX                     0x0fff
  98
  99 #define OV2680_REG_ISP_CTRL00                   0x5080
 100
 101 #define OV2680_X_WIN                            0x5704
 102 #define OV2680_Y_WIN                            0x5706
 103 #define OV2680_WIN_CONTROL                      0x5708
 104
 105 #define OV2680_START_STREAMING                  0x01
 106 #define OV2680_STOP_STREAMING                   0x00
 107
 108 /*
 109  * ov2680 device structure.
 110  */
 111 struct ov2680_device {
 112         struct v4l2_subdev sd;
 113         struct media_pad pad;
 114         struct mutex input_lock;
 115         struct i2c_client *client;
 116         struct gpio_desc *powerdown;
 117         bool is_streaming;
 118
 119         struct ov2680_mode {
 120                 struct v4l2_mbus_framefmt fmt;
 121                 bool binning;
 122                 u16 h_start;
 123                 u16 v_start;
 124                 u16 h_end;
 125                 u16 v_end;
 126                 u16 h_output_size;
 127                 u16 v_output_size;
 128                 u16 hts;
 129                 u16 vts;
 130         } mode;
 131
 132         struct ov2680_ctrls {
 133                 struct v4l2_ctrl_handler handler;
 134                 struct v4l2_ctrl *hflip;
 135                 struct v4l2_ctrl *vflip;
 136                 struct v4l2_ctrl *exposure;
 137                 struct v4l2_ctrl *gain;
 138                 struct v4l2_ctrl *test_pattern;
 139         } ctrls;
 140 };
 141
 142 /**
 143  * struct ov2680_reg - MI sensor  register format
 144  * @type: type of the register
 145  * @reg: 16-bit offset to register
 146  * @val: 8/16/32-bit register value
 147  *
 148  * Define a structure for sensor register initialization values
 149  */
 150 struct ov2680_reg {
 151         u16 reg;
 152         u32 val;        /* @set value for read/mod/write, @mask */
 153 };
 154
 155 #define to_ov2680_sensor(x) container_of(x, struct ov2680_device, sd)
 156
 157 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
 158 {
 159         struct ov2680_device *sensor =
 160                 container_of(ctrl->handler, struct ov2680_device, ctrls.handler);
 161
 162         return &sensor->sd;
 163 }
 164
 165 static struct ov2680_reg const ov2680_global_setting[] = {
 166         {0x0103, 0x01},
 167         {0x3002, 0x00},
 168         {0x3016, 0x1c},
 169         {0x3018, 0x44},
 170         {0x3020, 0x00},
 171         {0x3080, 0x02},
 172         {0x3082, 0x45},
 173         {0x3084, 0x09},
 174         {0x3085, 0x04},
 175         {0x3503, 0x03},
 176         {0x350b, 0x36},
 177         {0x3600, 0xb4},
 178         {0x3603, 0x39},
 179         {0x3604, 0x24},
 180         {0x3605, 0x00},
 181         {0x3620, 0x26},
 182         {0x3621, 0x37},
 183         {0x3622, 0x04},
 184         {0x3628, 0x00},
 185         {0x3705, 0x3c},
 186         {0x370c, 0x50},
 187         {0x370d, 0xc0},
 188         {0x3718, 0x88},
 189         {0x3720, 0x00},
 190         {0x3721, 0x00},
 191         {0x3722, 0x00},
 192         {0x3723, 0x00},
 193         {0x3738, 0x00},
 194         {0x3717, 0x58},
 195         {0x3781, 0x80},
 196         {0x3789, 0x60},
 197         {0x3800, 0x00},
 198         {0x3819, 0x04},
 199         {0x4000, 0x81},
 200         {0x4001, 0x40},
 201         {0x4008, 0x00},
 202         {0x4009, 0x03},
 203         {0x4602, 0x02},
 204         {0x481f, 0x36},
 205         {0x4825, 0x36},
 206         {0x4837, 0x18},
 207         {0x5002, 0x30},
 208         {0x5004, 0x04},//manual awb 1x
 209         {0x5005, 0x00},
 210         {0x5006, 0x04},
 211         {0x5007, 0x00},
 212         {0x5008, 0x04},
 213         {0x5009, 0x00},
 214         {0x5080, 0x00},
 215         {0x5081, 0x41},
 216         {0x5708, 0x01},  /* add for full size flip off and mirror off 2014/09/11 */
 217         {0x3701, 0x64},  //add on 14/05/13
 218         {0x3784, 0x0c},  //based OV2680_R1A_AM10.ovt add on 14/06/13
 219         {0x5780, 0x3e},  //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13
 220         {0x5781, 0x0f},
 221         {0x5782, 0x04},
 222         {0x5783, 0x02},
 223         {0x5784, 0x01},
 224         {0x5785, 0x01},
 225         {0x5786, 0x00},
 226         {0x5787, 0x04},
 227         {0x5788, 0x02},
 228         {0x5789, 0x00},
 229         {0x578a, 0x01},
 230         {0x578b, 0x02},
 231         {0x578c, 0x03},
 232         {0x578d, 0x03},
 233         {0x578e, 0x08},
 234         {0x578f, 0x0c},
 235         {0x5790, 0x08},
 236         {0x5791, 0x04},
 237         {0x5792, 0x00},
 238         {0x5793, 0x00},
 239         {0x5794, 0x03}, //based OV2680_R1A_AM10.ovt,Adjust DPC setting (57xx) on 14/06/13
 240         {0x0100, 0x00}, //stream off
 241         {}
 242 };
 243
 244 #endif