drivers/staging/kpc2000/kpc2000_i2c.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * KPC2000 i2c driver
   4  *
   5  * Adapted i2c-i801.c for use with Kadoka hardware.
   6  *
   7  * Copyright (C) 1998 - 2002
   8  *      Frodo Looijaard <frodol@dds.nl>,
   9  *      Philip Edelbrock <phil@netroedge.com>,
  10  *      Mark D. Studebaker <mdsxyz123@yahoo.com>
  11  * Copyright (C) 2007 - 2012
  12  *      Jean Delvare <khali@linux-fr.org>
  13  * Copyright (C) 2010 Intel Corporation
  14  *      David Woodhouse <dwmw2@infradead.org>
  15  * Copyright (C) 2014-2018 Daktronics
  16  *      Matt Sickler <matt.sickler@daktronics.com>,
  17  *      Jordon Hofer <jordon.hofer@daktronics.com>
  18  */
  19 #include <linux/init.h>
  20 #include <linux/module.h>
  21 #include <linux/types.h>
  22 #include <linux/io.h>
  23 #include <linux/io-64-nonatomic-lo-hi.h>
  24 #include <linux/export.h>
  25 #include <linux/slab.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/fs.h>
  28 #include <linux/delay.h>
  29 #include <linux/i2c.h>
  30 #include "kpc.h"
  31
  32 MODULE_LICENSE("GPL");
  33 MODULE_AUTHOR("Matt.Sickler@Daktronics.com");
  34 MODULE_SOFTDEP("pre: i2c-dev");
  35
  36 struct i2c_device {
  37         unsigned long           smba;
  38         struct i2c_adapter      adapter;
  39         unsigned int            features;
  40 };
  41
  42 /*****************************
  43  *** Part 1 - i2c Handlers ***
  44  *****************************/
  45
  46 #define REG_SIZE 8
  47
  48 /* I801 SMBus address offsets */
  49 #define SMBHSTSTS(p)    ((0  * REG_SIZE) + (p)->smba)
  50 #define SMBHSTCNT(p)    ((2  * REG_SIZE) + (p)->smba)
  51 #define SMBHSTCMD(p)    ((3  * REG_SIZE) + (p)->smba)
  52 #define SMBHSTADD(p)    ((4  * REG_SIZE) + (p)->smba)
  53 #define SMBHSTDAT0(p)   ((5  * REG_SIZE) + (p)->smba)
  54 #define SMBHSTDAT1(p)   ((6  * REG_SIZE) + (p)->smba)
  55 #define SMBBLKDAT(p)    ((7  * REG_SIZE) + (p)->smba)
  56 #define SMBPEC(p)       ((8  * REG_SIZE) + (p)->smba)   /* ICH3 and later */
  57 #define SMBAUXSTS(p)    ((12 * REG_SIZE) + (p)->smba)   /* ICH4 and later */
  58 #define SMBAUXCTL(p)    ((13 * REG_SIZE) + (p)->smba)   /* ICH4 and later */
  59
  60 /* PCI Address Constants */
  61 #define SMBBAR      4
  62 #define SMBHSTCFG   0x040
  63
  64 /* Host configuration bits for SMBHSTCFG */
  65 #define SMBHSTCFG_HST_EN        1
  66 #define SMBHSTCFG_SMB_SMI_EN    2
  67 #define SMBHSTCFG_I2C_EN        4
  68
  69 /* Auxiliary control register bits, ICH4+ only */
  70 #define SMBAUXCTL_CRC       1
  71 #define SMBAUXCTL_E32B      2
  72
  73 /* kill bit for SMBHSTCNT */
  74 #define SMBHSTCNT_KILL      2
  75
  76 /* Other settings */
  77 #define MAX_RETRIES         400
  78 #define ENABLE_INT9         0       /* set to 0x01 to enable - untested */
  79
  80 /* I801 command constants */
  81 #define I801_QUICK              0x00
  82 #define I801_BYTE               0x04
  83 #define I801_BYTE_DATA          0x08
  84 #define I801_WORD_DATA          0x0C
  85 #define I801_PROC_CALL          0x10    /* unimplemented */
  86 #define I801_BLOCK_DATA         0x14
  87 #define I801_I2C_BLOCK_DATA     0x18    /* ICH5 and later */
  88 #define I801_BLOCK_LAST         0x34
  89 #define I801_I2C_BLOCK_LAST     0x38    /* ICH5 and later */
  90 #define I801_START              0x40
  91 #define I801_PEC_EN             0x80    /* ICH3 and later */
  92
  93 /* I801 Hosts Status register bits */
  94 #define SMBHSTSTS_BYTE_DONE     0x80
  95 #define SMBHSTSTS_INUSE_STS     0x40
  96 #define SMBHSTSTS_SMBALERT_STS  0x20
  97 #define SMBHSTSTS_FAILED        0x10
  98 #define SMBHSTSTS_BUS_ERR       0x08
  99 #define SMBHSTSTS_DEV_ERR       0x04
 100 #define SMBHSTSTS_INTR          0x02
 101 #define SMBHSTSTS_HOST_BUSY     0x01
 102
 103 #define STATUS_FLAGS        (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | SMBHSTSTS_INTR)
 104
 105 /* Older devices have their ID defined in <linux/pci_ids.h> */
 106 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS       0x1c22
 107 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS          0x1d22
 108 /* Patsburg also has three 'Integrated Device Function' SMBus controllers */
 109 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0     0x1d70
 110 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1     0x1d71
 111 #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2     0x1d72
 112 #define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS      0x1e22
 113 #define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS          0x2330
 114 #define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS     0x3b30
 115 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS         0x8c22
 116 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS      0x9c22
 117
 118 #define FEATURE_SMBUS_PEC       BIT(0)
 119 #define FEATURE_BLOCK_BUFFER    BIT(1)
 120 #define FEATURE_BLOCK_PROC      BIT(2)
 121 #define FEATURE_I2C_BLOCK_READ  BIT(3)
 122 /* Not really a feature, but it's convenient to handle it as such */
 123 #define FEATURE_IDF             BIT(15)
 124
 125 // FIXME!
 126 #undef inb_p
 127 #define inb_p(a) readq((void*)a)
 128 #undef outb_p
 129 #define outb_p(d,a) writeq(d,(void*)a)
 130
 131 /* Make sure the SMBus host is ready to start transmitting.
 132  * Return 0 if it is, -EBUSY if it is not.
 133  */
 134 static int i801_check_pre(struct i2c_device *priv)
 135 {
 136         int status;
 137
 138         status = inb_p(SMBHSTSTS(priv));
 139         if (status & SMBHSTSTS_HOST_BUSY) {
 140                 dev_err(&priv->adapter.dev, "SMBus is busy, can't use it! (status=%x)\n", status);
 141                 return -EBUSY;
 142         }
 143
 144         status &= STATUS_FLAGS;
 145         if (status) {
 146                 //dev_dbg(&priv->adapter.dev, "Clearing status flags (%02x)\n", status);
 147                 outb_p(status, SMBHSTSTS(priv));
 148                 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
 149                 if (status) {
 150                         dev_err(&priv->adapter.dev, "Failed clearing status flags (%02x)\n", status);
 151                         return -EBUSY;
 152                 }
 153         }
 154         return 0;
 155 }
 156
 157 /* Convert the status register to an error code, and clear it. */
 158 static int i801_check_post(struct i2c_device *priv, int status, int timeout)
 159 {
 160         int result = 0;
 161
 162         /* If the SMBus is still busy, we give up */
 163         if (timeout) {
 164                 dev_err(&priv->adapter.dev, "Transaction timeout\n");
 165                 /* try to stop the current command */
 166                 dev_dbg(&priv->adapter.dev, "Terminating the current operation\n");
 167                 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL, SMBHSTCNT(priv));
 168                 usleep_range(1000, 2000);
 169                 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL), SMBHSTCNT(priv));
 170
 171                 /* Check if it worked */
 172                 status = inb_p(SMBHSTSTS(priv));
 173                 if ((status & SMBHSTSTS_HOST_BUSY) || !(status & SMBHSTSTS_FAILED))
 174                         dev_err(&priv->adapter.dev, "Failed terminating the transaction\n");
 175                 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
 176                 return -ETIMEDOUT;
 177         }
 178
 179         if (status & SMBHSTSTS_FAILED) {
 180                 result = -EIO;
 181                 dev_err(&priv->adapter.dev, "Transaction failed\n");
 182         }
 183         if (status & SMBHSTSTS_DEV_ERR) {
 184                 result = -ENXIO;
 185                 dev_dbg(&priv->adapter.dev, "No response\n");
 186         }
 187         if (status & SMBHSTSTS_BUS_ERR) {
 188                 result = -EAGAIN;
 189                 dev_dbg(&priv->adapter.dev, "Lost arbitration\n");
 190         }
 191
 192         if (result) {
 193                 /* Clear error flags */
 194                 outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv));
 195                 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
 196                 if (status)
 197                         dev_warn(&priv->adapter.dev, "Failed clearing status flags at end of transaction (%02x)\n", status);
 198         }
 199
 200         return result;
 201 }
 202
 203 static int i801_transaction(struct i2c_device *priv, int xact)
 204 {
 205         int status;
 206         int result;
 207         int timeout = 0;
 208
 209         result = i801_check_pre(priv);
 210         if (result < 0)
 211                 return result;
 212         /* the current contents of SMBHSTCNT can be overwritten, since PEC,
 213          * INTREN, SMBSCMD are passed in xact
 214          */
 215         outb_p(xact | I801_START, SMBHSTCNT(priv));
 216
 217         /* We will always wait for a fraction of a second! */
 218         do {
 219                 usleep_range(250, 500);
 220                 status = inb_p(SMBHSTSTS(priv));
 221         } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_RETRIES));
 222
 223         result = i801_check_post(priv, status, timeout > MAX_RETRIES);
 224         if (result < 0)
 225                 return result;
 226
 227         outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
 228         return 0;
 229 }
 230
 231 /* wait for INTR bit as advised by Intel */
 232 static void i801_wait_hwpec(struct i2c_device *priv)
 233 {
 234         int timeout = 0;
 235         int status;
 236
 237         do {
 238                 usleep_range(250, 500);
 239                 status = inb_p(SMBHSTSTS(priv));
 240         } while ((!(status & SMBHSTSTS_INTR)) && (timeout++ < MAX_RETRIES));
 241
 242         if (timeout > MAX_RETRIES)
 243                 dev_dbg(&priv->adapter.dev, "PEC Timeout!\n");
 244
 245         outb_p(status, SMBHSTSTS(priv));
 246 }
 247
 248 static int i801_block_transaction_by_block(struct i2c_device *priv, union i2c_smbus_data *data, char read_write, int hwpec)
 249 {
 250         int i, len;
 251         int status;
 252
 253         inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
 254
 255         /* Use 32-byte buffer to process this transaction */
 256         if (read_write == I2C_SMBUS_WRITE) {
 257                 len = data->block[0];
 258                 outb_p(len, SMBHSTDAT0(priv));
 259                 for (i = 0; i < len; i++)
 260                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 261         }
 262
 263         status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 | I801_PEC_EN * hwpec);
 264         if (status)
 265                 return status;
 266
 267         if (read_write == I2C_SMBUS_READ) {
 268                 len = inb_p(SMBHSTDAT0(priv));
 269                 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
 270                         return -EPROTO;
 271
 272                 data->block[0] = len;
 273                 for (i = 0; i < len; i++)
 274                         data->block[i + 1] = inb_p(SMBBLKDAT(priv));
 275         }
 276         return 0;
 277 }
 278
 279 static int i801_block_transaction_byte_by_byte(struct i2c_device *priv, union i2c_smbus_data *data, char read_write, int command, int hwpec)
 280 {
 281         int i, len;
 282         int smbcmd;
 283         int status;
 284         int result;
 285         int timeout;
 286
 287         result = i801_check_pre(priv);
 288         if (result < 0)
 289                 return result;
 290
 291         len = data->block[0];
 292
 293         if (read_write == I2C_SMBUS_WRITE) {
 294                 outb_p(len, SMBHSTDAT0(priv));
 295                 outb_p(data->block[1], SMBBLKDAT(priv));
 296         }
 297
 298         for (i = 1; i <= len; i++) {
 299                 if (i == len && read_write == I2C_SMBUS_READ) {
 300                         if (command == I2C_SMBUS_I2C_BLOCK_DATA)
 301                                 smbcmd = I801_I2C_BLOCK_LAST;
 302                         else
 303                                 smbcmd = I801_BLOCK_LAST;
 304                 } else {
 305                         if (command == I2C_SMBUS_I2C_BLOCK_DATA && read_write == I2C_SMBUS_READ)
 306                                 smbcmd = I801_I2C_BLOCK_DATA;
 307                         else
 308                                 smbcmd = I801_BLOCK_DATA;
 309                 }
 310                 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
 311
 312                 if (i == 1)
 313                         outb_p(inb(SMBHSTCNT(priv)) | I801_START, SMBHSTCNT(priv));
 314                 /* We will always wait for a fraction of a second! */
 315                 timeout = 0;
 316                 do {
 317                         usleep_range(250, 500);
 318                         status = inb_p(SMBHSTSTS(priv));
 319                 } while ((!(status & SMBHSTSTS_BYTE_DONE)) && (timeout++ < MAX_RETRIES));
 320
 321                 result = i801_check_post(priv, status, timeout > MAX_RETRIES);
 322                 if (result < 0)
 323                         return result;
 324                 if (i == 1 && read_write == I2C_SMBUS_READ && command != I2C_SMBUS_I2C_BLOCK_DATA) {
 325                         len = inb_p(SMBHSTDAT0(priv));
 326                         if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
 327                                 dev_err(&priv->adapter.dev, "Illegal SMBus block read size %d\n", len);
 328                                 /* Recover */
 329                                 while (inb_p(SMBHSTSTS(priv)) & SMBHSTSTS_HOST_BUSY)
 330                                         outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
 331                                 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
 332                                 return -EPROTO;
 333                         }
 334                         data->block[0] = len;
 335                 }
 336
 337                 /* Retrieve/store value in SMBBLKDAT */
 338                 if (read_write == I2C_SMBUS_READ)
 339                         data->block[i] = inb_p(SMBBLKDAT(priv));
 340                 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
 341                         outb_p(data->block[i+1], SMBBLKDAT(priv));
 342                 /* signals SMBBLKDAT ready */
 343                 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS(priv));
 344         }
 345
 346         return 0;
 347 }
 348
 349 static int i801_set_block_buffer_mode(struct i2c_device *priv)
 350 {
 351         outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
 352         if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
 353                 return -EIO;
 354         return 0;
 355 }
 356
 357 /* Block transaction function */
 358 static int i801_block_transaction(struct i2c_device *priv, union i2c_smbus_data *data, char read_write, int command, int hwpec)
 359 {
 360         int result = 0;
 361         //unsigned char hostc;
 362
 363         if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
 364                 if (read_write == I2C_SMBUS_WRITE) {
 365                         /* set I2C_EN bit in configuration register */
 366                         //TODO: Figure out the right thing to do here...
 367                         //pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
 368                         //pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc | SMBHSTCFG_I2C_EN);
 369                 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
 370                         dev_err(&priv->adapter.dev, "I2C block read is unsupported!\n");
 371                         return -EOPNOTSUPP;
 372                 }
 373         }
 374
 375         if (read_write == I2C_SMBUS_WRITE || command == I2C_SMBUS_I2C_BLOCK_DATA) {
 376                 if (data->block[0] < 1)
 377                         data->block[0] = 1;
 378                 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
 379                         data->block[0] = I2C_SMBUS_BLOCK_MAX;
 380         } else {
 381                 data->block[0] = 32;    /* max for SMBus block reads */
 382         }
 383
 384         /* Experience has shown that the block buffer can only be used for
 385          * SMBus (not I2C) block transactions, even though the datasheet
 386          * doesn't mention this limitation.
 387          */
 388         if ((priv->features & FEATURE_BLOCK_BUFFER) && command != I2C_SMBUS_I2C_BLOCK_DATA && i801_set_block_buffer_mode(priv) == 0)
 389                 result = i801_block_transaction_by_block(priv, data, read_write, hwpec);
 390         else
 391                 result = i801_block_transaction_byte_by_byte(priv, data, read_write, command, hwpec);
 392         if (result == 0 && hwpec)
 393                 i801_wait_hwpec(priv);
 394         if (command == I2C_SMBUS_I2C_BLOCK_DATA && read_write == I2C_SMBUS_WRITE) {
 395                 /* restore saved configuration register value */
 396                 //TODO: Figure out the right thing to do here...
 397                 //pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
 398         }
 399         return result;
 400 }
 401
 402 /* Return negative errno on error. */
 403 static s32 i801_access(struct i2c_adapter *adap, u16 addr, unsigned short flags, char read_write, u8 command, int size, union i2c_smbus_data *data)
 404 {
 405         int hwpec;
 406         int block = 0;
 407         int ret, xact = 0;
 408         struct i2c_device *priv = i2c_get_adapdata(adap);
 409
 410         hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) && size != I2C_SMBUS_QUICK && size != I2C_SMBUS_I2C_BLOCK_DATA;
 411
 412         switch (size) {
 413         case I2C_SMBUS_QUICK:
 414                 dev_dbg(&priv->adapter.dev, "  [acc] SMBUS_QUICK\n");
 415                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
 416                 xact = I801_QUICK;
 417                 break;
 418         case I2C_SMBUS_BYTE:
 419                 dev_dbg(&priv->adapter.dev, "  [acc] SMBUS_BYTE\n");
 420
 421                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
 422                 if (read_write == I2C_SMBUS_WRITE)
 423                         outb_p(command, SMBHSTCMD(priv));
 424                 xact = I801_BYTE;
 425                 break;
 426         case I2C_SMBUS_BYTE_DATA:
 427                 dev_dbg(&priv->adapter.dev, "  [acc] SMBUS_BYTE_DATA\n");
 428                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
 429                 outb_p(command, SMBHSTCMD(priv));
 430                 if (read_write == I2C_SMBUS_WRITE)
 431                         outb_p(data->byte, SMBHSTDAT0(priv));
 432                 xact = I801_BYTE_DATA;
 433                 break;
 434         case I2C_SMBUS_WORD_DATA:
 435                 dev_dbg(&priv->adapter.dev, "  [acc] SMBUS_WORD_DATA\n");
 436                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
 437                 outb_p(command, SMBHSTCMD(priv));
 438                 if (read_write == I2C_SMBUS_WRITE) {
 439                         outb_p(data->word & 0xff, SMBHSTDAT0(priv));
 440                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
 441                 }
 442                 xact = I801_WORD_DATA;
 443                 break;
 444         case I2C_SMBUS_BLOCK_DATA:
 445                 dev_dbg(&priv->adapter.dev, "  [acc] SMBUS_BLOCK_DATA\n");
 446                 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD(priv));
 447                 outb_p(command, SMBHSTCMD(priv));
 448                 block = 1;
 449                 break;
 450         case I2C_SMBUS_I2C_BLOCK_DATA:
 451                 dev_dbg(&priv->adapter.dev, "  [acc] SMBUS_I2C_BLOCK_DATA\n");
 452                 /* NB: page 240 of ICH5 datasheet shows that the R/#W
 453                  * bit should be cleared here, even when reading
 454                  */
 455                 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
 456                 if (read_write == I2C_SMBUS_READ) {
 457                         /* NB: page 240 of ICH5 datasheet also shows
 458                          * that DATA1 is the cmd field when reading
 459                          */
 460                         outb_p(command, SMBHSTDAT1(priv));
 461                 } else {
 462                         outb_p(command, SMBHSTCMD(priv));
 463                 }
 464                 block = 1;
 465                 break;
 466         default:
 467                 dev_dbg(&priv->adapter.dev, "  [acc] Unsupported transaction %d\n", size);
 468                 return -EOPNOTSUPP;
 469         }
 470
 471         if (hwpec) { /* enable/disable hardware PEC */
 472                 dev_dbg(&priv->adapter.dev, "  [acc] hwpec: yes\n");
 473                 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
 474         } else {
 475                 dev_dbg(&priv->adapter.dev, "  [acc] hwpec: no\n");
 476                 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC), SMBAUXCTL(priv));
 477         }
 478
 479         if (block) {
 480                 //ret = 0;
 481                 dev_dbg(&priv->adapter.dev, "  [acc] block: yes\n");
 482                 ret = i801_block_transaction(priv, data, read_write, size, hwpec);
 483         } else {
 484                 dev_dbg(&priv->adapter.dev, "  [acc] block: no\n");
 485                 ret = i801_transaction(priv, xact | ENABLE_INT9);
 486         }
 487
 488         /* Some BIOSes don't like it when PEC is enabled at reboot or resume
 489          * time, so we forcibly disable it after every transaction. Turn off
 490          * E32B for the same reason.
 491          */
 492         if (hwpec || block) {
 493                 dev_dbg(&priv->adapter.dev, "  [acc] hwpec || block\n");
 494                 outb_p(inb_p(SMBAUXCTL(priv)) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
 495         }
 496         if (block) {
 497                 dev_dbg(&priv->adapter.dev, "  [acc] block\n");
 498                 return ret;
 499         }
 500         if (ret) {
 501                 dev_dbg(&priv->adapter.dev, "  [acc] ret %d\n", ret);
 502                 return ret;
 503         }
 504         if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) {
 505                 dev_dbg(&priv->adapter.dev, "  [acc] I2C_SMBUS_WRITE || I801_QUICK  -> ret 0\n");
 506                 return 0;
 507         }
 508
 509         switch (xact & 0x7f) {
 510         case I801_BYTE:  /* Result put in SMBHSTDAT0 */
 511         case I801_BYTE_DATA:
 512                 dev_dbg(&priv->adapter.dev, "  [acc] I801_BYTE or I801_BYTE_DATA\n");
 513                 data->byte = inb_p(SMBHSTDAT0(priv));
 514                 break;
 515         case I801_WORD_DATA:
 516                 dev_dbg(&priv->adapter.dev, "  [acc] I801_WORD_DATA\n");
 517                 data->word = inb_p(SMBHSTDAT0(priv)) + (inb_p(SMBHSTDAT1(priv)) << 8);
 518                 break;
 519         }
 520         return 0;
 521 }
 522
 523 static u32 i801_func(struct i2c_adapter *adapter)
 524 {
 525         struct i2c_device *priv = i2c_get_adapdata(adapter);
 526
 527         /* original settings
 528          * u32 f = I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 529          * I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 530          * I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
 531          * ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
 532          * ((priv->features & FEATURE_I2C_BLOCK_READ) ?
 533          * I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
 534          */
 535
 536         // http://lxr.free-electrons.com/source/include/uapi/linux/i2c.h#L85
 537
 538         u32 f =
 539                 I2C_FUNC_I2C                     | /* 0x00000001 (I enabled this one) */
 540                 !I2C_FUNC_10BIT_ADDR             | /* 0x00000002 */
 541                 !I2C_FUNC_PROTOCOL_MANGLING      | /* 0x00000004 */
 542                 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | /* 0x00000008 */
 543                 !I2C_FUNC_SMBUS_BLOCK_PROC_CALL  | /* 0x00008000 */
 544                 I2C_FUNC_SMBUS_QUICK             | /* 0x00010000 */
 545                 !I2C_FUNC_SMBUS_READ_BYTE        | /* 0x00020000 */
 546                 !I2C_FUNC_SMBUS_WRITE_BYTE       | /* 0x00040000 */
 547                 !I2C_FUNC_SMBUS_READ_BYTE_DATA   | /* 0x00080000 */
 548                 !I2C_FUNC_SMBUS_WRITE_BYTE_DATA  | /* 0x00100000 */
 549                 !I2C_FUNC_SMBUS_READ_WORD_DATA   | /* 0x00200000 */
 550                 !I2C_FUNC_SMBUS_WRITE_WORD_DATA  | /* 0x00400000 */
 551                 !I2C_FUNC_SMBUS_PROC_CALL        | /* 0x00800000 */
 552                 !I2C_FUNC_SMBUS_READ_BLOCK_DATA  | /* 0x01000000 */
 553                 !I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | /* 0x02000000 */
 554                 ((priv->features & FEATURE_I2C_BLOCK_READ) ? I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) | /* 0x04000000 */
 555                 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK   | /* 0x08000000 */
 556
 557                 I2C_FUNC_SMBUS_BYTE              | /* _READ_BYTE  _WRITE_BYTE */
 558                 I2C_FUNC_SMBUS_BYTE_DATA         | /* _READ_BYTE_DATA  _WRITE_BYTE_DATA */
 559                 I2C_FUNC_SMBUS_WORD_DATA         | /* _READ_WORD_DATA  _WRITE_WORD_DATA */
 560                 I2C_FUNC_SMBUS_BLOCK_DATA        | /* _READ_BLOCK_DATA  _WRITE_BLOCK_DATA */
 561                 !I2C_FUNC_SMBUS_I2C_BLOCK        | /* _READ_I2C_BLOCK  _WRITE_I2C_BLOCK */
 562                 !I2C_FUNC_SMBUS_EMUL;              /* _QUICK  _BYTE  _BYTE_DATA  _WORD_DATA  _PROC_CALL  _WRITE_BLOCK_DATA  _I2C_BLOCK _PEC */
 563         return f;
 564 }
 565
 566 static const struct i2c_algorithm smbus_algorithm = {
 567         .smbus_xfer     = i801_access,
 568         .functionality  = i801_func,
 569 };
 570
 571 /********************************
 572  *** Part 2 - Driver Handlers ***
 573  ********************************/
 574 static int pi2c_probe(struct platform_device *pldev)
 575 {
 576         int err;
 577         struct i2c_device *priv;
 578         struct resource *res;
 579
 580         priv = devm_kzalloc(&pldev->dev, sizeof(*priv), GFP_KERNEL);
 581         if (!priv)
 582                 return -ENOMEM;
 583
 584         i2c_set_adapdata(&priv->adapter, priv);
 585         priv->adapter.owner = THIS_MODULE;
 586         priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 587         priv->adapter.algo = &smbus_algorithm;
 588
 589         res = platform_get_resource(pldev, IORESOURCE_MEM, 0);
 590         if (!res)
 591                 return -ENXIO;
 592
 593         priv->smba = (unsigned long)devm_ioremap_nocache(&pldev->dev,
 594                                                          res->start,
 595                                                          resource_size(res));
 596         if (!priv->smba)
 597                 return -ENOMEM;
 598
 599         platform_set_drvdata(pldev, priv);
 600
 601         priv->features |= FEATURE_IDF;
 602         priv->features |= FEATURE_I2C_BLOCK_READ;
 603         priv->features |= FEATURE_SMBUS_PEC;
 604         priv->features |= FEATURE_BLOCK_BUFFER;
 605
 606         //init_MUTEX(&lddata->sem);
 607
 608         /* set up the sysfs linkage to our parent device */
 609         priv->adapter.dev.parent = &pldev->dev;
 610
 611         /* Retry up to 3 times on lost arbitration */
 612         priv->adapter.retries = 3;
 613
 614         //snprintf(priv->adapter.name, sizeof(priv->adapter.name), "Fake SMBus I801 adapter at %04lx", priv->smba);
 615         snprintf(priv->adapter.name, sizeof(priv->adapter.name), "Fake SMBus I801 adapter");
 616
 617         err = i2c_add_adapter(&priv->adapter);
 618         if (err) {
 619                 dev_err(&priv->adapter.dev, "Failed to add SMBus adapter\n");
 620                 return err;
 621         }
 622
 623         return 0;
 624 }
 625
 626 static int pi2c_remove(struct platform_device *pldev)
 627 {
 628         struct i2c_device *lddev;
 629
 630         lddev = (struct i2c_device *)platform_get_drvdata(pldev);
 631
 632         i2c_del_adapter(&lddev->adapter);
 633
 634         //TODO: Figure out the right thing to do here...
 635         //pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
 636         //pci_release_region(dev, SMBBAR);
 637         //pci_set_drvdata(dev, NULL);
 638
 639         //cdev_del(&lddev->cdev);
 640
 641         return 0;
 642 }
 643
 644 static struct platform_driver i2c_plat_driver_i = {
 645         .probe      = pi2c_probe,
 646         .remove     = pi2c_remove,
 647         .driver     = {
 648                 .name   = KP_DRIVER_NAME_I2C,
 649         },
 650 };
 651
 652 module_platform_driver(i2c_plat_driver_i);