drivers/staging/iio/adc/ad7280a.c

   1 /*
   2  * AD7280A Lithium Ion Battery Monitoring System
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/kernel.h>
  11 #include <linux/slab.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/spi/spi.h>
  14 #include <linux/err.h>
  15 #include <linux/delay.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/module.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21 #include <linux/iio/events.h>
  22
  23 #include "ad7280a.h"
  24
  25 /* Registers */
  26 #define AD7280A_CELL_VOLTAGE_1          0x0  /* D11 to D0, Read only */
  27 #define AD7280A_CELL_VOLTAGE_2          0x1  /* D11 to D0, Read only */
  28 #define AD7280A_CELL_VOLTAGE_3          0x2  /* D11 to D0, Read only */
  29 #define AD7280A_CELL_VOLTAGE_4          0x3  /* D11 to D0, Read only */
  30 #define AD7280A_CELL_VOLTAGE_5          0x4  /* D11 to D0, Read only */
  31 #define AD7280A_CELL_VOLTAGE_6          0x5  /* D11 to D0, Read only */
  32 #define AD7280A_AUX_ADC_1               0x6  /* D11 to D0, Read only */
  33 #define AD7280A_AUX_ADC_2               0x7  /* D11 to D0, Read only */
  34 #define AD7280A_AUX_ADC_3               0x8  /* D11 to D0, Read only */
  35 #define AD7280A_AUX_ADC_4               0x9  /* D11 to D0, Read only */
  36 #define AD7280A_AUX_ADC_5               0xA  /* D11 to D0, Read only */
  37 #define AD7280A_AUX_ADC_6               0xB  /* D11 to D0, Read only */
  38 #define AD7280A_SELF_TEST               0xC  /* D11 to D0, Read only */
  39 #define AD7280A_CONTROL_HB              0xD  /* D15 to D8, Read/write */
  40 #define AD7280A_CONTROL_LB              0xE  /* D7 to D0, Read/write */
  41 #define AD7280A_CELL_OVERVOLTAGE        0xF  /* D7 to D0, Read/write */
  42 #define AD7280A_CELL_UNDERVOLTAGE       0x10 /* D7 to D0, Read/write */
  43 #define AD7280A_AUX_ADC_OVERVOLTAGE     0x11 /* D7 to D0, Read/write */
  44 #define AD7280A_AUX_ADC_UNDERVOLTAGE    0x12 /* D7 to D0, Read/write */
  45 #define AD7280A_ALERT                   0x13 /* D7 to D0, Read/write */
  46 #define AD7280A_CELL_BALANCE            0x14 /* D7 to D0, Read/write */
  47 #define AD7280A_CB1_TIMER               0x15 /* D7 to D0, Read/write */
  48 #define AD7280A_CB2_TIMER               0x16 /* D7 to D0, Read/write */
  49 #define AD7280A_CB3_TIMER               0x17 /* D7 to D0, Read/write */
  50 #define AD7280A_CB4_TIMER               0x18 /* D7 to D0, Read/write */
  51 #define AD7280A_CB5_TIMER               0x19 /* D7 to D0, Read/write */
  52 #define AD7280A_CB6_TIMER               0x1A /* D7 to D0, Read/write */
  53 #define AD7280A_PD_TIMER                0x1B /* D7 to D0, Read/write */
  54 #define AD7280A_READ                    0x1C /* D7 to D0, Read/write */
  55 #define AD7280A_CNVST_CONTROL           0x1D /* D7 to D0, Read/write */
  56
  57 /* Bits and Masks */
  58 #define AD7280A_CTRL_HB_CONV_INPUT_ALL                  (0 << 6)
  59 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4       (1 << 6)
  60 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL                (2 << 6)
  61 #define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST            (3 << 6)
  62 #define AD7280A_CTRL_HB_CONV_RES_READ_ALL               (0 << 4)
  63 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4    (1 << 4)
  64 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL             (2 << 4)
  65 #define AD7280A_CTRL_HB_CONV_RES_READ_NO                (3 << 4)
  66 #define AD7280A_CTRL_HB_CONV_START_CNVST                (0 << 3)
  67 #define AD7280A_CTRL_HB_CONV_START_CS                   (1 << 3)
  68 #define AD7280A_CTRL_HB_CONV_AVG_DIS                    (0 << 1)
  69 #define AD7280A_CTRL_HB_CONV_AVG_2                      (1 << 1)
  70 #define AD7280A_CTRL_HB_CONV_AVG_4                      (2 << 1)
  71 #define AD7280A_CTRL_HB_CONV_AVG_8                      (3 << 1)
  72 #define AD7280A_CTRL_HB_CONV_AVG(x)                     ((x) << 1)
  73 #define AD7280A_CTRL_HB_PWRDN_SW                        (1 << 0)
  74
  75 #define AD7280A_CTRL_LB_SWRST                           (1 << 7)
  76 #define AD7280A_CTRL_LB_ACQ_TIME_400ns                  (0 << 5)
  77 #define AD7280A_CTRL_LB_ACQ_TIME_800ns                  (1 << 5)
  78 #define AD7280A_CTRL_LB_ACQ_TIME_1200ns                 (2 << 5)
  79 #define AD7280A_CTRL_LB_ACQ_TIME_1600ns                 (3 << 5)
  80 #define AD7280A_CTRL_LB_ACQ_TIME(x)                     ((x) << 5)
  81 #define AD7280A_CTRL_LB_MUST_SET                        (1 << 4)
  82 #define AD7280A_CTRL_LB_THERMISTOR_EN                   (1 << 3)
  83 #define AD7280A_CTRL_LB_LOCK_DEV_ADDR                   (1 << 2)
  84 #define AD7280A_CTRL_LB_INC_DEV_ADDR                    (1 << 1)
  85 #define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN               (1 << 0)
  86
  87 #define AD7280A_ALERT_GEN_STATIC_HIGH                   (1 << 6)
  88 #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN              (3 << 6)
  89
  90 #define AD7280A_ALL_CELLS                               (0xAD << 16)
  91
  92 #define AD7280A_MAX_SPI_CLK_Hz          700000 /* < 1MHz */
  93 #define AD7280A_MAX_CHAIN               8
  94 #define AD7280A_CELLS_PER_DEV           6
  95 #define AD7280A_BITS                    12
  96 #define AD7280A_NUM_CH                  (AD7280A_AUX_ADC_6 - \
  97                                         AD7280A_CELL_VOLTAGE_1 + 1)
  98
  99 #define AD7280A_DEVADDR_MASTER          0
 100 #define AD7280A_DEVADDR_ALL             0x1F
 101 /* 5-bit device address is sent LSB first */
 102 #define AD7280A_DEVADDR(addr)   (((addr & 0x1) << 4) | ((addr & 0x2) << 3) | \
 103                                 (addr & 0x4) | ((addr & 0x8) >> 3) | \
 104                                 ((addr & 0x10) >> 4))
 105
 106 /* During a read a valid write is mandatory.
 107  * So writing to the highest available address (Address 0x1F)
 108  * and setting the address all parts bit to 0 is recommended
 109  * So the TXVAL is AD7280A_DEVADDR_ALL + CRC
 110  */
 111 #define AD7280A_READ_TXVAL      0xF800030A
 112
 113 /*
 114  * AD7280 CRC
 115  *
 116  * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F
 117  */
 118 #define POLYNOM         0x2F
 119 #define POLYNOM_ORDER   8
 120 #define HIGHBIT         (1 << (POLYNOM_ORDER - 1))
 121
 122 struct ad7280_state {
 123         struct spi_device               *spi;
 124         struct iio_chan_spec            *channels;
 125         struct iio_dev_attr             *iio_attr;
 126         int                             slave_num;
 127         int                             scan_cnt;
 128         int                             readback_delay_us;
 129         unsigned char                   crc_tab[256];
 130         unsigned char                   ctrl_hb;
 131         unsigned char                   ctrl_lb;
 132         unsigned char                   cell_threshhigh;
 133         unsigned char                   cell_threshlow;
 134         unsigned char                   aux_threshhigh;
 135         unsigned char                   aux_threshlow;
 136         unsigned char                   cb_mask[AD7280A_MAX_CHAIN];
 137 };
 138
 139 static void ad7280_crc8_build_table(unsigned char *crc_tab)
 140 {
 141         unsigned char bit, crc;
 142         int cnt, i;
 143
 144         for (cnt = 0; cnt < 256; cnt++) {
 145                 crc = cnt;
 146                 for (i = 0; i < 8; i++) {
 147                         bit = crc & HIGHBIT;
 148                         crc <<= 1;
 149                         if (bit)
 150                                 crc ^= POLYNOM;
 151                 }
 152                 crc_tab[cnt] = crc;
 153         }
 154 }
 155
 156 static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned val)
 157 {
 158         unsigned char crc;
 159
 160         crc = crc_tab[val >> 16 & 0xFF];
 161         crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
 162
 163         return  crc ^ (val & 0xFF);
 164 }
 165
 166 static int ad7280_check_crc(struct ad7280_state *st, unsigned val)
 167 {
 168         unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
 169
 170         if (crc != ((val >> 2) & 0xFF))
 171                 return -EIO;
 172
 173         return 0;
 174 }
 175
 176 /* After initiating a conversion sequence we need to wait until the
 177  * conversion is done. The delay is typically in the range of 15..30 us
 178  * however depending an the number of devices in the daisy chain and the
 179  * number of averages taken, conversion delays and acquisition time options
 180  * it may take up to 250us, in this case we better sleep instead of busy
 181  * wait.
 182  */
 183
 184 static void ad7280_delay(struct ad7280_state *st)
 185 {
 186         if (st->readback_delay_us < 50)
 187                 udelay(st->readback_delay_us);
 188         else
 189                 msleep(1);
 190 }
 191
 192 static int __ad7280_read32(struct spi_device *spi, unsigned *val)
 193 {
 194         unsigned rx_buf, tx_buf = cpu_to_be32(AD7280A_READ_TXVAL);
 195         int ret;
 196
 197         struct spi_transfer t = {
 198                 .tx_buf = &tx_buf,
 199                 .rx_buf = &rx_buf,
 200                 .len = 4,
 201         };
 202         struct spi_message m;
 203
 204         spi_message_init(&m);
 205         spi_message_add_tail(&t, &m);
 206
 207         ret = spi_sync(spi, &m);
 208         if (ret)
 209                 return ret;
 210
 211         *val = be32_to_cpu(rx_buf);
 212
 213         return 0;
 214 }
 215
 216 static int ad7280_write(struct ad7280_state *st, unsigned devaddr,
 217                         unsigned addr, bool all, unsigned val)
 218 {
 219         unsigned reg = (devaddr << 27 | addr << 21 |
 220                         (val & 0xFF) << 13 | all << 12);
 221
 222         reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2;
 223         reg = cpu_to_be32(reg);
 224
 225         return spi_write(st->spi, &reg, 4);
 226 }
 227
 228 static int ad7280_read(struct ad7280_state *st, unsigned devaddr,
 229                         unsigned addr)
 230 {
 231         int ret;
 232         unsigned tmp;
 233
 234         /* turns off the read operation on all parts */
 235         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 236                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 237                         AD7280A_CTRL_HB_CONV_RES_READ_NO |
 238                         st->ctrl_hb);
 239         if (ret)
 240                 return ret;
 241
 242         /* turns on the read operation on the addressed part */
 243         ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
 244                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 245                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 246                         st->ctrl_hb);
 247         if (ret)
 248                 return ret;
 249
 250         /* Set register address on the part to be read from */
 251         ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
 252         if (ret)
 253                 return ret;
 254
 255         __ad7280_read32(st->spi, &tmp);
 256
 257         if (ad7280_check_crc(st, tmp))
 258                 return -EIO;
 259
 260         if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr))
 261                 return -EFAULT;
 262
 263         return (tmp >> 13) & 0xFF;
 264 }
 265
 266 static int ad7280_read_channel(struct ad7280_state *st, unsigned devaddr,
 267                                unsigned addr)
 268 {
 269         int ret;
 270         unsigned tmp;
 271
 272         ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
 273         if (ret)
 274                 return ret;
 275
 276         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 277                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 278                         AD7280A_CTRL_HB_CONV_RES_READ_NO |
 279                         st->ctrl_hb);
 280         if (ret)
 281                 return ret;
 282
 283         ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
 284                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 285                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 286                         AD7280A_CTRL_HB_CONV_START_CS |
 287                         st->ctrl_hb);
 288         if (ret)
 289                 return ret;
 290
 291         ad7280_delay(st);
 292
 293         __ad7280_read32(st->spi, &tmp);
 294
 295         if (ad7280_check_crc(st, tmp))
 296                 return -EIO;
 297
 298         if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr))
 299                 return -EFAULT;
 300
 301         return (tmp >> 11) & 0xFFF;
 302 }
 303
 304 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned cnt,
 305                              unsigned *array)
 306 {
 307         int i, ret;
 308         unsigned tmp, sum = 0;
 309
 310         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
 311                            AD7280A_CELL_VOLTAGE_1 << 2);
 312         if (ret)
 313                 return ret;
 314
 315         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 316                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 317                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 318                         AD7280A_CTRL_HB_CONV_START_CS |
 319                         st->ctrl_hb);
 320         if (ret)
 321                 return ret;
 322
 323         ad7280_delay(st);
 324
 325         for (i = 0; i < cnt; i++) {
 326                 __ad7280_read32(st->spi, &tmp);
 327
 328                 if (ad7280_check_crc(st, tmp))
 329                         return -EIO;
 330
 331                 if (array)
 332                         array[i] = tmp;
 333                 /* only sum cell voltages */
 334                 if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6)
 335                         sum += ((tmp >> 11) & 0xFFF);
 336         }
 337
 338         return sum;
 339 }
 340
 341 static int ad7280_chain_setup(struct ad7280_state *st)
 342 {
 343         unsigned val, n;
 344         int ret;
 345
 346         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
 347                         AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
 348                         AD7280A_CTRL_LB_LOCK_DEV_ADDR |
 349                         AD7280A_CTRL_LB_MUST_SET |
 350                         AD7280A_CTRL_LB_SWRST |
 351                         st->ctrl_lb);
 352         if (ret)
 353                 return ret;
 354
 355         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
 356                         AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
 357                         AD7280A_CTRL_LB_LOCK_DEV_ADDR |
 358                         AD7280A_CTRL_LB_MUST_SET |
 359                         st->ctrl_lb);
 360         if (ret)
 361                 return ret;
 362
 363         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
 364                         AD7280A_CONTROL_LB << 2);
 365         if (ret)
 366                 return ret;
 367
 368         for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
 369                 __ad7280_read32(st->spi, &val);
 370                 if (val == 0)
 371                         return n - 1;
 372
 373                 if (ad7280_check_crc(st, val))
 374                         return -EIO;
 375
 376                 if (n != AD7280A_DEVADDR(val >> 27))
 377                         return -EIO;
 378         }
 379
 380         return -EFAULT;
 381 }
 382
 383 static ssize_t ad7280_show_balance_sw(struct device *dev,
 384                                         struct device_attribute *attr,
 385                                         char *buf)
 386 {
 387         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 388         struct ad7280_state *st = iio_priv(indio_dev);
 389         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 390
 391         return sprintf(buf, "%d\n",
 392                        !!(st->cb_mask[this_attr->address >> 8] &
 393                        (1 << ((this_attr->address & 0xFF) + 2))));
 394 }
 395
 396 static ssize_t ad7280_store_balance_sw(struct device *dev,
 397                                          struct device_attribute *attr,
 398                                          const char *buf,
 399                                          size_t len)
 400 {
 401         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 402         struct ad7280_state *st = iio_priv(indio_dev);
 403         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 404         bool readin;
 405         int ret;
 406         unsigned devaddr, ch;
 407
 408         ret = strtobool(buf, &readin);
 409         if (ret)
 410                 return ret;
 411
 412         devaddr = this_attr->address >> 8;
 413         ch = this_attr->address & 0xFF;
 414
 415         mutex_lock(&indio_dev->mlock);
 416         if (readin)
 417                 st->cb_mask[devaddr] |= 1 << (ch + 2);
 418         else
 419                 st->cb_mask[devaddr] &= ~(1 << (ch + 2));
 420
 421         ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE,
 422                            0, st->cb_mask[devaddr]);
 423         mutex_unlock(&indio_dev->mlock);
 424
 425         return ret ? ret : len;
 426 }
 427
 428 static ssize_t ad7280_show_balance_timer(struct device *dev,
 429                                         struct device_attribute *attr,
 430                                         char *buf)
 431 {
 432         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 433         struct ad7280_state *st = iio_priv(indio_dev);
 434         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 435         int ret;
 436         unsigned msecs;
 437
 438         mutex_lock(&indio_dev->mlock);
 439         ret = ad7280_read(st, this_attr->address >> 8,
 440                         this_attr->address & 0xFF);
 441         mutex_unlock(&indio_dev->mlock);
 442
 443         if (ret < 0)
 444                 return ret;
 445
 446         msecs = (ret >> 3) * 71500;
 447
 448         return sprintf(buf, "%d\n", msecs);
 449 }
 450
 451 static ssize_t ad7280_store_balance_timer(struct device *dev,
 452                                          struct device_attribute *attr,
 453                                          const char *buf,
 454                                          size_t len)
 455 {
 456         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 457         struct ad7280_state *st = iio_priv(indio_dev);
 458         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 459         unsigned long val;
 460         int ret;
 461
 462         ret = kstrtoul(buf, 10, &val);
 463         if (ret)
 464                 return ret;
 465
 466         val /= 71500;
 467
 468         if (val > 31)
 469                 return -EINVAL;
 470
 471         mutex_lock(&indio_dev->mlock);
 472         ret = ad7280_write(st, this_attr->address >> 8,
 473                            this_attr->address & 0xFF,
 474                            0, (val & 0x1F) << 3);
 475         mutex_unlock(&indio_dev->mlock);
 476
 477         return ret ? ret : len;
 478 }
 479
 480 static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN *
 481                                            AD7280A_CELLS_PER_DEV * 2 + 1];
 482
 483 static struct attribute_group ad7280_attrs_group = {
 484         .attrs = ad7280_attributes,
 485 };
 486
 487 static int ad7280_channel_init(struct ad7280_state *st)
 488 {
 489         int dev, ch, cnt;
 490
 491         st->channels = kcalloc((st->slave_num + 1) * 12 + 2,
 492                                sizeof(*st->channels), GFP_KERNEL);
 493         if (st->channels == NULL)
 494                 return -ENOMEM;
 495
 496         for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
 497                 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; ch++,
 498                         cnt++) {
 499                         if (ch < AD7280A_AUX_ADC_1) {
 500                                 st->channels[cnt].type = IIO_VOLTAGE;
 501                                 st->channels[cnt].differential = 1;
 502                                 st->channels[cnt].channel = (dev * 6) + ch;
 503                                 st->channels[cnt].channel2 =
 504                                         st->channels[cnt].channel + 1;
 505                         } else {
 506                                 st->channels[cnt].type = IIO_TEMP;
 507                                 st->channels[cnt].channel = (dev * 6) + ch - 6;
 508                         }
 509                         st->channels[cnt].indexed = 1;
 510                         st->channels[cnt].info_mask =
 511                                 IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 512                                 IIO_CHAN_INFO_SCALE_SHARED_BIT;
 513                         st->channels[cnt].address =
 514                                 AD7280A_DEVADDR(dev) << 8 | ch;
 515                         st->channels[cnt].scan_index = cnt;
 516                         st->channels[cnt].scan_type.sign = 'u';
 517                         st->channels[cnt].scan_type.realbits = 12;
 518                         st->channels[cnt].scan_type.storagebits = 32;
 519                         st->channels[cnt].scan_type.shift = 0;
 520                 }
 521
 522         st->channels[cnt].type = IIO_VOLTAGE;
 523         st->channels[cnt].differential = 1;
 524         st->channels[cnt].channel = 0;
 525         st->channels[cnt].channel2 = dev * 6;
 526         st->channels[cnt].address = AD7280A_ALL_CELLS;
 527         st->channels[cnt].indexed = 1;
 528         st->channels[cnt].info_mask =
 529                 IIO_CHAN_INFO_RAW_SEPARATE_BIT |
 530                 IIO_CHAN_INFO_SCALE_SHARED_BIT;
 531         st->channels[cnt].scan_index = cnt;
 532         st->channels[cnt].scan_type.sign = 'u';
 533         st->channels[cnt].scan_type.realbits = 32;
 534         st->channels[cnt].scan_type.storagebits = 32;
 535         st->channels[cnt].scan_type.shift = 0;
 536         cnt++;
 537         st->channels[cnt].type = IIO_TIMESTAMP;
 538         st->channels[cnt].channel = -1;
 539         st->channels[cnt].scan_index = cnt;
 540         st->channels[cnt].scan_type.sign = 's';
 541         st->channels[cnt].scan_type.realbits = 64;
 542         st->channels[cnt].scan_type.storagebits = 64;
 543         st->channels[cnt].scan_type.shift = 0;
 544
 545         return cnt + 1;
 546 }
 547
 548 static int ad7280_attr_init(struct ad7280_state *st)
 549 {
 550         int dev, ch, cnt;
 551
 552         st->iio_attr = kzalloc(sizeof(*st->iio_attr) * (st->slave_num + 1) *
 553                                 AD7280A_CELLS_PER_DEV * 2, GFP_KERNEL);
 554         if (st->iio_attr == NULL)
 555                 return -ENOMEM;
 556
 557         for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
 558                 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6;
 559                         ch++, cnt++) {
 560                         st->iio_attr[cnt].address =
 561                                 AD7280A_DEVADDR(dev) << 8 | ch;
 562                         st->iio_attr[cnt].dev_attr.attr.mode =
 563                                 S_IWUSR | S_IRUGO;
 564                         st->iio_attr[cnt].dev_attr.show =
 565                                 ad7280_show_balance_sw;
 566                         st->iio_attr[cnt].dev_attr.store =
 567                                 ad7280_store_balance_sw;
 568                         st->iio_attr[cnt].dev_attr.attr.name =
 569                                 kasprintf(GFP_KERNEL,
 570                                         "in%d-in%d_balance_switch_en",
 571                                         (dev * AD7280A_CELLS_PER_DEV) + ch,
 572                                         (dev * AD7280A_CELLS_PER_DEV) + ch + 1);
 573                         ad7280_attributes[cnt] =
 574                                 &st->iio_attr[cnt].dev_attr.attr;
 575                         cnt++;
 576                         st->iio_attr[cnt].address =
 577                                 AD7280A_DEVADDR(dev) << 8 |
 578                                 (AD7280A_CB1_TIMER + ch);
 579                         st->iio_attr[cnt].dev_attr.attr.mode =
 580                                 S_IWUSR | S_IRUGO;
 581                         st->iio_attr[cnt].dev_attr.show =
 582                                 ad7280_show_balance_timer;
 583                         st->iio_attr[cnt].dev_attr.store =
 584                                 ad7280_store_balance_timer;
 585                         st->iio_attr[cnt].dev_attr.attr.name =
 586                                 kasprintf(GFP_KERNEL, "in%d-in%d_balance_timer",
 587                                         (dev * AD7280A_CELLS_PER_DEV) + ch,
 588                                         (dev * AD7280A_CELLS_PER_DEV) + ch + 1);
 589                         ad7280_attributes[cnt] =
 590                                 &st->iio_attr[cnt].dev_attr.attr;
 591                 }
 592
 593         ad7280_attributes[cnt] = NULL;
 594
 595         return 0;
 596 }
 597
 598 static ssize_t ad7280_read_channel_config(struct device *dev,
 599                                         struct device_attribute *attr,
 600                                         char *buf)
 601 {
 602         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 603         struct ad7280_state *st = iio_priv(indio_dev);
 604         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 605         unsigned val;
 606
 607         switch ((u32) this_attr->address) {
 608         case AD7280A_CELL_OVERVOLTAGE:
 609                 val = 1000 + (st->cell_threshhigh * 1568) / 100;
 610                 break;
 611         case AD7280A_CELL_UNDERVOLTAGE:
 612                 val = 1000 + (st->cell_threshlow * 1568) / 100;
 613                 break;
 614         case AD7280A_AUX_ADC_OVERVOLTAGE:
 615                 val = (st->aux_threshhigh * 196) / 10;
 616                 break;
 617         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 618                 val = (st->aux_threshlow * 196) / 10;
 619                 break;
 620         default:
 621                 return -EINVAL;
 622         }
 623
 624         return sprintf(buf, "%d\n", val);
 625 }
 626
 627 static ssize_t ad7280_write_channel_config(struct device *dev,
 628                                          struct device_attribute *attr,
 629                                          const char *buf,
 630                                          size_t len)
 631 {
 632         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 633         struct ad7280_state *st = iio_priv(indio_dev);
 634         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 635
 636         long val;
 637         int ret;
 638
 639         ret = strict_strtol(buf, 10, &val);
 640         if (ret)
 641                 return ret;
 642
 643         switch ((u32) this_attr->address) {
 644         case AD7280A_CELL_OVERVOLTAGE:
 645         case AD7280A_CELL_UNDERVOLTAGE:
 646                 val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */
 647                 break;
 648         case AD7280A_AUX_ADC_OVERVOLTAGE:
 649         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 650                 val = (val * 10) / 196; /* LSB 19.6mV */
 651                 break;
 652         default:
 653                 return -EFAULT;
 654         }
 655
 656         val = clamp(val, 0L, 0xFFL);
 657
 658         mutex_lock(&indio_dev->mlock);
 659         switch ((u32) this_attr->address) {
 660         case AD7280A_CELL_OVERVOLTAGE:
 661                 st->cell_threshhigh = val;
 662                 break;
 663         case AD7280A_CELL_UNDERVOLTAGE:
 664                 st->cell_threshlow = val;
 665                 break;
 666         case AD7280A_AUX_ADC_OVERVOLTAGE:
 667                 st->aux_threshhigh = val;
 668                 break;
 669         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 670                 st->aux_threshlow = val;
 671                 break;
 672         }
 673
 674         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
 675                            this_attr->address, 1, val);
 676
 677         mutex_unlock(&indio_dev->mlock);
 678
 679         return ret ? ret : len;
 680 }
 681
 682 static irqreturn_t ad7280_event_handler(int irq, void *private)
 683 {
 684         struct iio_dev *indio_dev = private;
 685         struct ad7280_state *st = iio_priv(indio_dev);
 686         unsigned *channels;
 687         int i, ret;
 688
 689         channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
 690         if (channels == NULL)
 691                 return IRQ_HANDLED;
 692
 693         ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
 694         if (ret < 0)
 695                 goto out;
 696
 697         for (i = 0; i < st->scan_cnt; i++) {
 698                 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) {
 699                         if (((channels[i] >> 11) & 0xFFF) >=
 700                                 st->cell_threshhigh)
 701                                 iio_push_event(indio_dev,
 702                                         IIO_EVENT_CODE(IIO_VOLTAGE,
 703                                                        1,
 704                                                        0,
 705                                                        IIO_EV_DIR_RISING,
 706                                                        IIO_EV_TYPE_THRESH,
 707                                                        0, 0, 0),
 708                                         iio_get_time_ns());
 709                         else if (((channels[i] >> 11) & 0xFFF) <=
 710                                 st->cell_threshlow)
 711                                 iio_push_event(indio_dev,
 712                                         IIO_EVENT_CODE(IIO_VOLTAGE,
 713                                                        1,
 714                                                        0,
 715                                                        IIO_EV_DIR_FALLING,
 716                                                        IIO_EV_TYPE_THRESH,
 717                                                        0, 0, 0),
 718                                         iio_get_time_ns());
 719                 } else {
 720                         if (((channels[i] >> 11) & 0xFFF) >= st->aux_threshhigh)
 721                                 iio_push_event(indio_dev,
 722                                         IIO_UNMOD_EVENT_CODE(IIO_TEMP,
 723                                         0,
 724                                         IIO_EV_TYPE_THRESH,
 725                                         IIO_EV_DIR_RISING),
 726                                         iio_get_time_ns());
 727                         else if (((channels[i] >> 11) & 0xFFF) <=
 728                                 st->aux_threshlow)
 729                                 iio_push_event(indio_dev,
 730                                         IIO_UNMOD_EVENT_CODE(IIO_TEMP,
 731                                         0,
 732                                         IIO_EV_TYPE_THRESH,
 733                                         IIO_EV_DIR_FALLING),
 734                                         iio_get_time_ns());
 735                 }
 736         }
 737
 738 out:
 739         kfree(channels);
 740
 741         return IRQ_HANDLED;
 742 }
 743
 744 static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value,
 745                 in_voltage-voltage_thresh_low_value,
 746                 S_IRUGO | S_IWUSR,
 747                 ad7280_read_channel_config,
 748                 ad7280_write_channel_config,
 749                 AD7280A_CELL_UNDERVOLTAGE);
 750
 751 static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value,
 752                 in_voltage-voltage_thresh_high_value,
 753                 S_IRUGO | S_IWUSR,
 754                 ad7280_read_channel_config,
 755                 ad7280_write_channel_config,
 756                 AD7280A_CELL_OVERVOLTAGE);
 757
 758 static IIO_DEVICE_ATTR(in_temp_thresh_low_value,
 759                 S_IRUGO | S_IWUSR,
 760                 ad7280_read_channel_config,
 761                 ad7280_write_channel_config,
 762                 AD7280A_AUX_ADC_UNDERVOLTAGE);
 763
 764 static IIO_DEVICE_ATTR(in_temp_thresh_high_value,
 765                 S_IRUGO | S_IWUSR,
 766                 ad7280_read_channel_config,
 767                 ad7280_write_channel_config,
 768                 AD7280A_AUX_ADC_OVERVOLTAGE);
 769
 770
 771 static struct attribute *ad7280_event_attributes[] = {
 772         &iio_dev_attr_in_thresh_low_value.dev_attr.attr,
 773         &iio_dev_attr_in_thresh_high_value.dev_attr.attr,
 774         &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr,
 775         &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr,
 776         NULL,
 777 };
 778
 779 static struct attribute_group ad7280_event_attrs_group = {
 780         .attrs = ad7280_event_attributes,
 781 };
 782
 783 static int ad7280_read_raw(struct iio_dev *indio_dev,
 784                            struct iio_chan_spec const *chan,
 785                            int *val,
 786                            int *val2,
 787                            long m)
 788 {
 789         struct ad7280_state *st = iio_priv(indio_dev);
 790         unsigned int scale_uv;
 791         int ret;
 792
 793         switch (m) {
 794         case IIO_CHAN_INFO_RAW:
 795                 mutex_lock(&indio_dev->mlock);
 796                 if (chan->address == AD7280A_ALL_CELLS)
 797                         ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
 798                 else
 799                         ret = ad7280_read_channel(st, chan->address >> 8,
 800                                                   chan->address & 0xFF);
 801                 mutex_unlock(&indio_dev->mlock);
 802
 803                 if (ret < 0)
 804                         return ret;
 805
 806                 *val = ret;
 807
 808                 return IIO_VAL_INT;
 809         case IIO_CHAN_INFO_SCALE:
 810                 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6)
 811                         scale_uv = (4000 * 1000) >> AD7280A_BITS;
 812                 else
 813                         scale_uv = (5000 * 1000) >> AD7280A_BITS;
 814
 815                 *val =  scale_uv / 1000;
 816                 *val2 = (scale_uv % 1000) * 1000;
 817                 return IIO_VAL_INT_PLUS_MICRO;
 818         }
 819         return -EINVAL;
 820 }
 821
 822 static const struct iio_info ad7280_info = {
 823         .read_raw = &ad7280_read_raw,
 824         .event_attrs = &ad7280_event_attrs_group,
 825         .attrs = &ad7280_attrs_group,
 826         .driver_module = THIS_MODULE,
 827 };
 828
 829 static const struct ad7280_platform_data ad7793_default_pdata = {
 830         .acquisition_time = AD7280A_ACQ_TIME_400ns,
 831         .conversion_averaging = AD7280A_CONV_AVG_DIS,
 832         .thermistor_term_en = true,
 833 };
 834
 835 static int ad7280_probe(struct spi_device *spi)
 836 {
 837         const struct ad7280_platform_data *pdata = spi->dev.platform_data;
 838         struct ad7280_state *st;
 839         int ret;
 840         const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890};
 841         const unsigned short nAVG[4] = {1, 2, 4, 8};
 842         struct iio_dev *indio_dev = iio_device_alloc(sizeof(*st));
 843
 844         if (indio_dev == NULL)
 845                 return -ENOMEM;
 846
 847         st = iio_priv(indio_dev);
 848         spi_set_drvdata(spi, indio_dev);
 849         st->spi = spi;
 850
 851         if (!pdata)
 852                 pdata = &ad7793_default_pdata;
 853
 854         ad7280_crc8_build_table(st->crc_tab);
 855
 856         st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_Hz;
 857         st->spi->mode = SPI_MODE_1;
 858         spi_setup(st->spi);
 859
 860         st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3);
 861         st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging
 862                         & 0x3) | (pdata->thermistor_term_en ?
 863                         AD7280A_CTRL_LB_THERMISTOR_EN : 0);
 864
 865         ret = ad7280_chain_setup(st);
 866         if (ret < 0)
 867                 goto error_free_device;
 868
 869         st->slave_num = ret;
 870         st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
 871         st->cell_threshhigh = 0xFF;
 872         st->aux_threshhigh = 0xFF;
 873
 874         /*
 875          * Total Conversion Time = ((tACQ + tCONV) *
 876          *                         (Number of Conversions per Part)) −
 877          *                         tACQ + ((N - 1) * tDELAY)
 878          *
 879          * Readback Delay = Total Conversion Time + tWAIT
 880          */
 881
 882         st->readback_delay_us =
 883                 ((tACQ_ns[pdata->acquisition_time & 0x3] + 695) *
 884                 (AD7280A_NUM_CH * nAVG[pdata->conversion_averaging & 0x3]))
 885                 - tACQ_ns[pdata->acquisition_time & 0x3] +
 886                 st->slave_num * 250;
 887
 888         /* Convert to usecs */
 889         st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
 890         st->readback_delay_us += 5; /* Add tWAIT */
 891
 892         indio_dev->name = spi_get_device_id(spi)->name;
 893         indio_dev->dev.parent = &spi->dev;
 894         indio_dev->modes = INDIO_DIRECT_MODE;
 895
 896         ret = ad7280_channel_init(st);
 897         if (ret < 0)
 898                 goto error_free_device;
 899
 900         indio_dev->num_channels = ret;
 901         indio_dev->channels = st->channels;
 902         indio_dev->info = &ad7280_info;
 903
 904         ret = ad7280_attr_init(st);
 905         if (ret < 0)
 906                 goto error_free_channels;
 907
 908         ret = iio_device_register(indio_dev);
 909         if (ret)
 910                 goto error_free_attr;
 911
 912         if (spi->irq > 0) {
 913                 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
 914                                    AD7280A_ALERT, 1,
 915                                    AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
 916                 if (ret)
 917                         goto error_unregister;
 918
 919                 ret = ad7280_write(st, AD7280A_DEVADDR(st->slave_num),
 920                                    AD7280A_ALERT, 0,
 921                                    AD7280A_ALERT_GEN_STATIC_HIGH |
 922                                    (pdata->chain_last_alert_ignore & 0xF));
 923                 if (ret)
 924                         goto error_unregister;
 925
 926                 ret = request_threaded_irq(spi->irq,
 927                                            NULL,
 928                                            ad7280_event_handler,
 929                                            IRQF_TRIGGER_FALLING |
 930                                            IRQF_ONESHOT,
 931                                            indio_dev->name,
 932                                            indio_dev);
 933                 if (ret)
 934                         goto error_unregister;
 935         }
 936
 937         return 0;
 938 error_unregister:
 939         iio_device_unregister(indio_dev);
 940
 941 error_free_attr:
 942         kfree(st->iio_attr);
 943
 944 error_free_channels:
 945         kfree(st->channels);
 946
 947 error_free_device:
 948         iio_device_free(indio_dev);
 949
 950         return ret;
 951 }
 952
 953 static int ad7280_remove(struct spi_device *spi)
 954 {
 955         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 956         struct ad7280_state *st = iio_priv(indio_dev);
 957
 958         if (spi->irq > 0)
 959                 free_irq(spi->irq, indio_dev);
 960         iio_device_unregister(indio_dev);
 961
 962         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 963                         AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
 964
 965         kfree(st->channels);
 966         kfree(st->iio_attr);
 967         iio_device_free(indio_dev);
 968
 969         return 0;
 970 }
 971
 972 static const struct spi_device_id ad7280_id[] = {
 973         {"ad7280a", 0},
 974         {}
 975 };
 976 MODULE_DEVICE_TABLE(spi, ad7280_id);
 977
 978 static struct spi_driver ad7280_driver = {
 979         .driver = {
 980                 .name   = "ad7280",
 981                 .owner  = THIS_MODULE,
 982         },
 983         .probe          = ad7280_probe,
 984         .remove         = ad7280_remove,
 985         .id_table       = ad7280_id,
 986 };
 987 module_spi_driver(ad7280_driver);
 988
 989 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 990 MODULE_DESCRIPTION("Analog Devices AD7280A");
 991 MODULE_LICENSE("GPL v2");