2 * comedi/drivers/ni_labpc.c
3 * Driver for National Instruments Lab-PC series boards and compatibles
4 * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * Description: National Instruments Lab-PC (& compatibles)
24 * Devices: (National Instruments) Lab-PC-1200 [lab-pc-1200]
25 * (National Instruments) Lab-PC-1200AI [lab-pc-1200ai]
26 * (National Instruments) Lab-PC+ [lab-pc+]
27 * Author: Frank Mori Hess <fmhess@users.sourceforge.net>
30 * Configuration options - ISA boards:
31 * [0] - I/O port base address
32 * [1] - IRQ (optional, required for timed or externally triggered
34 * [2] - DMA channel (optional)
36 * Tested with lab-pc-1200. For the older Lab-PC+, not all input
37 * ranges and analog references will work, the available ranges/arefs
38 * will depend on how you have configured the jumpers on your board
39 * (see your owner's manual).
41 * Kernel-level ISA plug-and-play support for the lab-pc-1200 boards
42 * has not yet been added to the driver, mainly due to the fact that
43 * I don't know the device id numbers. If you have one of these boards,
44 * please file a bug report at http://comedi.org/ so I can get the
45 * necessary information from you.
47 * The 1200 series boards have onboard calibration dacs for correcting
48 * analog input/output offsets and gains. The proper settings for these
49 * caldacs are stored on the board's eeprom. To read the caldac values
50 * from the eeprom and store them into a file that can be then be used
51 * by comedilib, use the comedi_calibrate program.
53 * The Lab-pc+ has quirky chanlist requirements when scanning multiple
54 * channels. Multiple channel scan sequence must start at highest channel,
55 * then decrement down to channel 0. The rest of the cards can scan down
56 * like lab-pc+ or scan up from channel zero. Chanlists consisting of all
57 * one channel are also legal, and allow you to pace conversions in bursts.
60 * 341309a (labpc-1200 register manual)
64 #include <linux/interrupt.h>
65 #include <linux/slab.h>
67 #include <linux/delay.h>
69 #include "../comedidev.h"
75 #include "comedi_fc.h"
79 * Register map (all registers are 8-bit)
81 #define STAT1_REG 0x00 /* R: Status 1 reg */
82 #define STAT1_DAVAIL (1 << 0)
83 #define STAT1_OVERRUN (1 << 1)
84 #define STAT1_OVERFLOW (1 << 2)
85 #define STAT1_CNTINT (1 << 3)
86 #define STAT1_GATA0 (1 << 5)
87 #define STAT1_EXTGATA0 (1 << 6)
88 #define CMD1_REG 0x00 /* W: Command 1 reg */
89 #define CMD1_MA(x) (((x) & 0x7) << 0)
90 #define CMD1_TWOSCMP (1 << 3)
91 #define CMD1_GAIN_MASK (7 << 4)
92 #define CMD1_SCANEN (1 << 7)
93 #define CMD2_REG 0x01 /* W: Command 2 reg */
94 #define CMD2_PRETRIG (1 << 0)
95 #define CMD2_HWTRIG (1 << 1)
96 #define CMD2_SWTRIG (1 << 2)
97 #define CMD2_TBSEL (1 << 3)
98 #define CMD2_2SDAC0 (1 << 4)
99 #define CMD2_2SDAC1 (1 << 5)
100 #define CMD2_LDAC(x) (1 << (6 + (x)))
101 #define CMD3_REG 0x02 /* W: Command 3 reg */
102 #define CMD3_DMAEN (1 << 0)
103 #define CMD3_DIOINTEN (1 << 1)
104 #define CMD3_DMATCINTEN (1 << 2)
105 #define CMD3_CNTINTEN (1 << 3)
106 #define CMD3_ERRINTEN (1 << 4)
107 #define CMD3_FIFOINTEN (1 << 5)
108 #define ADC_START_CONVERT_REG 0x03 /* W: Start Convert reg */
109 #define DAC_LSB_REG(x) (0x04 + 2 * (x)) /* W: DAC0/1 LSB reg */
110 #define DAC_MSB_REG(x) (0x05 + 2 * (x)) /* W: DAC0/1 MSB reg */
111 #define ADC_FIFO_CLEAR_REG 0x08 /* W: A/D FIFO Clear reg */
112 #define ADC_FIFO_REG 0x0a /* R: A/D FIFO reg */
113 #define DMATC_CLEAR_REG 0x0a /* W: DMA Interrupt Clear reg */
114 #define TIMER_CLEAR_REG 0x0c /* W: Timer Interrupt Clear reg */
115 #define CMD6_REG 0x0e /* W: Command 6 reg */
116 #define CMD6_NRSE (1 << 0)
117 #define CMD6_ADCUNI (1 << 1)
118 #define CMD6_DACUNI(x) (1 << (2 + (x)))
119 #define CMD6_HFINTEN (1 << 5)
120 #define CMD6_DQINTEN (1 << 6)
121 #define CMD6_SCANUP (1 << 7)
122 #define CMD4_REG 0x0f /* W: Command 3 reg */
123 #define CMD4_INTSCAN (1 << 0)
124 #define CMD4_EOIRCV (1 << 1)
125 #define CMD4_ECLKDRV (1 << 2)
126 #define CMD4_SEDIFF (1 << 3)
127 #define CMD4_ECLKRCV (1 << 4)
128 #define DIO_BASE_REG 0x10 /* R/W: 8255 DIO base reg */
129 #define COUNTER_A_BASE_REG 0x14 /* R/W: 8253 Counter A base reg */
130 #define COUNTER_B_BASE_REG 0x18 /* R/W: 8253 Counter B base reg */
131 #define CMD5_REG 0x1c /* W: Command 5 reg */
132 #define CMD5_WRTPRT (1 << 2)
133 #define CMD5_DITHEREN (1 << 3)
134 #define CMD5_CALDACLD (1 << 4)
135 #define CMD5_SCLK (1 << 5)
136 #define CMD5_SDATA (1 << 6)
137 #define CMD5_EEPROMCS (1 << 7)
138 #define STAT2_REG 0x1d /* R: Status 2 reg */
139 #define STAT2_PROMOUT (1 << 0)
140 #define STAT2_OUTA1 (1 << 1)
141 #define STAT2_FIFONHF (1 << 2)
142 #define INTERVAL_COUNT_REG 0x1e /* W: Interval Counter Data reg */
143 #define INTERVAL_STROBE_REG 0x1f /* W: Interval Counter Strobe reg */
145 #define LABPC_SIZE 0x20 /* size of ISA io region */
146 #define LABPC_TIMER_BASE 500 /* 2 MHz master clock */
147 #define LABPC_ADC_TIMEOUT 1000
151 MODE_SINGLE_CHAN_INTERVAL,
156 static const int labpc_plus_ai_gain_bits[] = {
157 0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
158 0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
161 static const struct comedi_lrange range_labpc_plus_ai = {
182 const int labpc_1200_ai_gain_bits[] = {
183 0x00, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
184 0x00, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
186 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
188 const struct comedi_lrange range_labpc_1200_ai = {
206 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
208 static const struct comedi_lrange range_labpc_ao = {
215 /* functions that do inb/outb and readb/writeb so we can use
216 * function pointers to decide which to use */
217 static inline unsigned int labpc_inb(unsigned long address)
222 static inline void labpc_outb(unsigned int byte, unsigned long address)
227 static inline unsigned int labpc_readb(unsigned long address)
229 return readb((void __iomem *)address);
232 static inline void labpc_writeb(unsigned int byte, unsigned long address)
234 writeb(byte, (void __iomem *)address);
237 #if IS_ENABLED(CONFIG_COMEDI_NI_LABPC_ISA)
238 static const struct labpc_boardinfo labpc_boards[] = {
240 .name = "lab-pc-1200",
242 .register_layout = labpc_1200_layout,
244 .ai_range_table = &range_labpc_1200_ai,
245 .ai_range_code = labpc_1200_ai_gain_bits,
248 .name = "lab-pc-1200ai",
250 .register_layout = labpc_1200_layout,
251 .ai_range_table = &range_labpc_1200_ai,
252 .ai_range_code = labpc_1200_ai_gain_bits,
257 .register_layout = labpc_plus_layout,
259 .ai_range_table = &range_labpc_plus_ai,
260 .ai_range_code = labpc_plus_ai_gain_bits,
265 /* size in bytes of dma buffer */
266 static const int dma_buffer_size = 0xff00;
267 /* 2 bytes per sample */
268 static const int sample_size = 2;
270 static int labpc_counter_load(struct comedi_device *dev,
271 unsigned long base_address,
272 unsigned int counter_number,
273 unsigned int count, unsigned int mode)
275 const struct labpc_boardinfo *board = comedi_board(dev);
278 return i8254_mm_load((void __iomem *)base_address, 0,
279 counter_number, count, mode);
281 return i8254_load(base_address, 0, counter_number, count, mode);
284 static int labpc_counter_set_mode(struct comedi_device *dev,
285 unsigned long base_address,
286 unsigned int counter_number,
289 const struct labpc_boardinfo *board = comedi_board(dev);
292 return i8254_mm_set_mode((void __iomem *)base_address, 0,
293 counter_number, mode);
295 return i8254_set_mode(base_address, 0, counter_number, mode);
298 static bool labpc_range_is_unipolar(struct comedi_subdevice *s,
301 return s->range_table->range[range].min >= 0;
304 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
306 struct labpc_private *devpriv = dev->private;
309 spin_lock_irqsave(&dev->spinlock, flags);
310 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
311 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
312 spin_unlock_irqrestore(&dev->spinlock, flags);
315 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
320 static void labpc_ai_set_chan_and_gain(struct comedi_device *dev,
326 const struct labpc_boardinfo *board = comedi_board(dev);
327 struct labpc_private *devpriv = dev->private;
329 /* munge channel bits for differential/scan disabled mode */
330 if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
333 devpriv->cmd1 = CMD1_MA(chan);
334 devpriv->cmd1 |= board->ai_range_code[range];
336 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
339 static void labpc_setup_cmd6_reg(struct comedi_device *dev,
340 struct comedi_subdevice *s,
342 enum transfer_type xfer,
347 const struct labpc_boardinfo *board = comedi_board(dev);
348 struct labpc_private *devpriv = dev->private;
350 if (board->register_layout != labpc_1200_layout)
353 /* reference inputs to ground or common? */
354 if (aref != AREF_GROUND)
355 devpriv->cmd6 |= CMD6_NRSE;
357 devpriv->cmd6 &= ~CMD6_NRSE;
359 /* bipolar or unipolar range? */
360 if (labpc_range_is_unipolar(s, range))
361 devpriv->cmd6 |= CMD6_ADCUNI;
363 devpriv->cmd6 &= ~CMD6_ADCUNI;
365 /* interrupt on fifo half full? */
366 if (xfer == fifo_half_full_transfer)
367 devpriv->cmd6 |= CMD6_HFINTEN;
369 devpriv->cmd6 &= ~CMD6_HFINTEN;
371 /* enable interrupt on counter a1 terminal count? */
373 devpriv->cmd6 |= CMD6_DQINTEN;
375 devpriv->cmd6 &= ~CMD6_DQINTEN;
377 /* are we scanning up or down through channels? */
378 if (mode == MODE_MULT_CHAN_UP)
379 devpriv->cmd6 |= CMD6_SCANUP;
381 devpriv->cmd6 &= ~CMD6_SCANUP;
383 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
386 static unsigned int labpc_read_adc_fifo(struct comedi_device *dev)
388 struct labpc_private *devpriv = dev->private;
389 unsigned int lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
390 unsigned int msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
392 return (msb << 8) | lsb;
395 static void labpc_clear_adc_fifo(struct comedi_device *dev)
397 struct labpc_private *devpriv = dev->private;
399 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
400 labpc_read_adc_fifo(dev);
403 static int labpc_ai_wait_for_data(struct comedi_device *dev,
406 struct labpc_private *devpriv = dev->private;
409 for (i = 0; i < timeout; i++) {
410 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
411 if (devpriv->stat1 & STAT1_DAVAIL)
418 static int labpc_ai_insn_read(struct comedi_device *dev,
419 struct comedi_subdevice *s,
420 struct comedi_insn *insn,
423 struct labpc_private *devpriv = dev->private;
424 unsigned int chan = CR_CHAN(insn->chanspec);
425 unsigned int range = CR_RANGE(insn->chanspec);
426 unsigned int aref = CR_AREF(insn->chanspec);
430 /* disable timed conversions, interrupt generation and dma */
431 labpc_cancel(dev, s);
433 labpc_ai_set_chan_and_gain(dev, MODE_SINGLE_CHAN, chan, range, aref);
435 labpc_setup_cmd6_reg(dev, s, MODE_SINGLE_CHAN, fifo_not_empty_transfer,
438 /* setup cmd4 register */
440 devpriv->cmd4 |= CMD4_ECLKRCV;
441 /* single-ended/differential */
442 if (aref == AREF_DIFF)
443 devpriv->cmd4 |= CMD4_SEDIFF;
444 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
446 /* initialize pacer counter to prevent any problems */
447 ret = labpc_counter_set_mode(dev, dev->iobase + COUNTER_A_BASE_REG,
452 labpc_clear_adc_fifo(dev);
454 for (i = 0; i < insn->n; i++) {
455 /* trigger conversion */
456 devpriv->write_byte(0x1, dev->iobase + ADC_START_CONVERT_REG);
458 ret = labpc_ai_wait_for_data(dev, LABPC_ADC_TIMEOUT);
462 data[i] = labpc_read_adc_fifo(dev);
468 #ifdef CONFIG_ISA_DMA_API
469 /* utility function that suggests a dma transfer size in bytes */
470 static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
475 if (cmd->convert_src == TRIG_TIMER)
476 freq = 1000000000 / cmd->convert_arg;
477 /* return some default value */
481 /* make buffer fill in no more than 1/3 second */
482 size = (freq / 3) * sample_size;
484 /* set a minimum and maximum size allowed */
485 if (size > dma_buffer_size)
486 size = dma_buffer_size - dma_buffer_size % sample_size;
487 else if (size < sample_size)
494 static bool labpc_use_continuous_mode(const struct comedi_cmd *cmd,
497 if (mode == MODE_SINGLE_CHAN || cmd->scan_begin_src == TRIG_FOLLOW)
503 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
506 if (cmd->convert_src != TRIG_TIMER)
509 if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
510 return cmd->scan_begin_arg;
512 return cmd->convert_arg;
515 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
516 enum scan_mode mode, unsigned int ns)
518 if (cmd->convert_src != TRIG_TIMER)
521 if (mode == MODE_SINGLE_CHAN &&
522 cmd->scan_begin_src == TRIG_TIMER) {
523 cmd->scan_begin_arg = ns;
524 if (cmd->convert_arg > cmd->scan_begin_arg)
525 cmd->convert_arg = cmd->scan_begin_arg;
527 cmd->convert_arg = ns;
530 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
533 if (cmd->scan_begin_src != TRIG_TIMER)
536 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
539 return cmd->scan_begin_arg;
542 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
543 enum scan_mode mode, unsigned int ns)
545 if (cmd->scan_begin_src != TRIG_TIMER)
548 if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
551 cmd->scan_begin_arg = ns;
554 /* figures out what counter values to use based on command */
555 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
558 struct labpc_private *devpriv = dev->private;
559 /* max value for 16 bit counter in mode 2 */
560 const int max_counter_value = 0x10000;
561 /* min value for 16 bit counter in mode 2 */
562 const int min_counter_value = 2;
563 unsigned int base_period;
564 unsigned int scan_period;
565 unsigned int convert_period;
568 * if both convert and scan triggers are TRIG_TIMER, then they
569 * both rely on counter b0
571 convert_period = labpc_ai_convert_period(cmd, mode);
572 scan_period = labpc_ai_scan_period(cmd, mode);
573 if (convert_period && scan_period) {
575 * pick the lowest b0 divisor value we can (for maximum input
576 * clock speed on convert and scan counters)
578 devpriv->divisor_b0 = (scan_period - 1) /
579 (LABPC_TIMER_BASE * max_counter_value) + 1;
580 if (devpriv->divisor_b0 < min_counter_value)
581 devpriv->divisor_b0 = min_counter_value;
582 if (devpriv->divisor_b0 > max_counter_value)
583 devpriv->divisor_b0 = max_counter_value;
585 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
587 /* set a0 for conversion frequency and b1 for scan frequency */
588 switch (cmd->flags & TRIG_ROUND_MASK) {
590 case TRIG_ROUND_NEAREST:
591 devpriv->divisor_a0 =
592 (convert_period + (base_period / 2)) / base_period;
593 devpriv->divisor_b1 =
594 (scan_period + (base_period / 2)) / base_period;
597 devpriv->divisor_a0 =
598 (convert_period + (base_period - 1)) / base_period;
599 devpriv->divisor_b1 =
600 (scan_period + (base_period - 1)) / base_period;
602 case TRIG_ROUND_DOWN:
603 devpriv->divisor_a0 = convert_period / base_period;
604 devpriv->divisor_b1 = scan_period / base_period;
607 /* make sure a0 and b1 values are acceptable */
608 if (devpriv->divisor_a0 < min_counter_value)
609 devpriv->divisor_a0 = min_counter_value;
610 if (devpriv->divisor_a0 > max_counter_value)
611 devpriv->divisor_a0 = max_counter_value;
612 if (devpriv->divisor_b1 < min_counter_value)
613 devpriv->divisor_b1 = min_counter_value;
614 if (devpriv->divisor_b1 > max_counter_value)
615 devpriv->divisor_b1 = max_counter_value;
616 /* write corrected timings to command */
617 labpc_set_ai_convert_period(cmd, mode,
618 base_period * devpriv->divisor_a0);
619 labpc_set_ai_scan_period(cmd, mode,
620 base_period * devpriv->divisor_b1);
622 * if only one TRIG_TIMER is used, we can employ the generic
623 * cascaded timing functions
625 } else if (scan_period) {
627 * calculate cascaded counter values
628 * that give desired scan timing
630 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
631 &(devpriv->divisor_b1),
632 &(devpriv->divisor_b0),
634 cmd->flags & TRIG_ROUND_MASK);
635 labpc_set_ai_scan_period(cmd, mode, scan_period);
636 } else if (convert_period) {
638 * calculate cascaded counter values
639 * that give desired conversion timing
641 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
642 &(devpriv->divisor_a0),
643 &(devpriv->divisor_b0),
645 cmd->flags & TRIG_ROUND_MASK);
646 labpc_set_ai_convert_period(cmd, mode, convert_period);
650 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
652 if (cmd->chanlist_len == 1)
653 return MODE_SINGLE_CHAN;
655 /* chanlist may be NULL during cmdtest. */
656 if (cmd->chanlist == NULL)
657 return MODE_MULT_CHAN_UP;
659 if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
660 return MODE_SINGLE_CHAN_INTERVAL;
662 if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
663 return MODE_MULT_CHAN_UP;
665 if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
666 return MODE_MULT_CHAN_DOWN;
668 pr_err("ni_labpc: bug! cannot determine AI scan mode\n");
672 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
673 const struct comedi_cmd *cmd,
676 int channel, range, aref, i;
678 if (cmd->chanlist == NULL)
681 if (mode == MODE_SINGLE_CHAN)
684 if (mode == MODE_SINGLE_CHAN_INTERVAL) {
685 if (cmd->chanlist_len > 0xff) {
687 "ni_labpc: chanlist too long for single channel interval mode\n");
692 channel = CR_CHAN(cmd->chanlist[0]);
693 range = CR_RANGE(cmd->chanlist[0]);
694 aref = CR_AREF(cmd->chanlist[0]);
696 for (i = 0; i < cmd->chanlist_len; i++) {
699 case MODE_SINGLE_CHAN_INTERVAL:
700 if (CR_CHAN(cmd->chanlist[i]) != channel) {
702 "channel scanning order specified in chanlist is not supported by hardware.\n");
706 case MODE_MULT_CHAN_UP:
707 if (CR_CHAN(cmd->chanlist[i]) != i) {
709 "channel scanning order specified in chanlist is not supported by hardware.\n");
713 case MODE_MULT_CHAN_DOWN:
714 if (CR_CHAN(cmd->chanlist[i]) !=
715 cmd->chanlist_len - i - 1) {
717 "channel scanning order specified in chanlist is not supported by hardware.\n");
722 dev_err(dev->class_dev,
723 "ni_labpc: bug! in chanlist check\n");
728 if (CR_RANGE(cmd->chanlist[i]) != range) {
730 "entries in chanlist must all have the same range\n");
734 if (CR_AREF(cmd->chanlist[i]) != aref) {
736 "entries in chanlist must all have the same reference\n");
744 static int labpc_ai_cmdtest(struct comedi_device *dev,
745 struct comedi_subdevice *s, struct comedi_cmd *cmd)
747 const struct labpc_boardinfo *board = comedi_board(dev);
750 unsigned int stop_mask;
753 /* Step 1 : check if triggers are trivially valid */
755 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
756 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
757 TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
758 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
759 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
761 stop_mask = TRIG_COUNT | TRIG_NONE;
762 if (board->register_layout == labpc_1200_layout)
763 stop_mask |= TRIG_EXT;
764 err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
769 /* Step 2a : make sure trigger sources are unique */
771 err |= cfc_check_trigger_is_unique(cmd->start_src);
772 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
773 err |= cfc_check_trigger_is_unique(cmd->convert_src);
774 err |= cfc_check_trigger_is_unique(cmd->stop_src);
776 /* Step 2b : and mutually compatible */
778 /* can't have external stop and start triggers at once */
779 if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
785 /* Step 3: check if arguments are trivially valid */
787 if (cmd->start_arg == TRIG_NOW)
788 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
790 if (!cmd->chanlist_len)
792 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
794 if (cmd->convert_src == TRIG_TIMER)
795 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
798 /* make sure scan timing is not too fast */
799 if (cmd->scan_begin_src == TRIG_TIMER) {
800 if (cmd->convert_src == TRIG_TIMER)
801 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
802 cmd->convert_arg * cmd->chanlist_len);
803 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
804 board->ai_speed * cmd->chanlist_len);
807 switch (cmd->stop_src) {
809 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
812 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
815 * TRIG_EXT doesn't care since it doesn't
816 * trigger off a numbered channel
825 /* step 4: fix up any arguments */
827 tmp = cmd->convert_arg;
828 tmp2 = cmd->scan_begin_arg;
829 mode = labpc_ai_scan_mode(cmd);
830 labpc_adc_timing(dev, cmd, mode);
831 if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
837 if (labpc_ai_chanlist_invalid(dev, cmd, mode))
843 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
845 const struct labpc_boardinfo *board = comedi_board(dev);
846 struct labpc_private *devpriv = dev->private;
847 struct comedi_async *async = s->async;
848 struct comedi_cmd *cmd = &async->cmd;
849 enum scan_mode mode = labpc_ai_scan_mode(cmd);
850 unsigned int chanspec = (mode == MODE_MULT_CHAN_UP)
851 ? cmd->chanlist[cmd->chanlist_len - 1]
853 unsigned int chan = CR_CHAN(chanspec);
854 unsigned int range = CR_RANGE(chanspec);
855 unsigned int aref = CR_AREF(chanspec);
856 enum transfer_type xfer;
860 /* make sure board is disabled before setting up acquisition */
861 labpc_cancel(dev, s);
863 /* initialize software conversion count */
864 if (cmd->stop_src == TRIG_COUNT)
865 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
867 /* setup hardware conversion counter */
868 if (cmd->stop_src == TRIG_EXT) {
870 * load counter a1 with count of 3
871 * (pc+ manual says this is minimum allowed) using mode 0
873 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
876 /* just put counter a1 in mode 0 to set its output low */
877 ret = labpc_counter_set_mode(dev,
878 dev->iobase + COUNTER_A_BASE_REG,
882 comedi_error(dev, "error loading counter a1");
886 #ifdef CONFIG_ISA_DMA_API
887 /* figure out what method we will use to transfer data */
888 if (devpriv->dma_chan && /* need a dma channel allocated */
890 * dma unsafe at RT priority,
891 * and too much setup time for TRIG_WAKE_EOS for
893 (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0) {
894 xfer = isa_dma_transfer;
895 /* pc-plus has no fifo-half full interrupt */
898 if (board->register_layout == labpc_1200_layout &&
899 /* wake-end-of-scan should interrupt on fifo not empty */
900 (cmd->flags & TRIG_WAKE_EOS) == 0 &&
901 /* make sure we are taking more than just a few points */
902 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
903 xfer = fifo_half_full_transfer;
905 xfer = fifo_not_empty_transfer;
906 devpriv->current_transfer = xfer;
908 labpc_ai_set_chan_and_gain(dev, mode, chan, range, aref);
910 labpc_setup_cmd6_reg(dev, s, mode, xfer, range, aref,
911 (cmd->stop_src == TRIG_EXT));
913 /* manual says to set scan enable bit on second pass */
914 if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
915 devpriv->cmd1 |= CMD1_SCANEN;
916 /* need a brief delay before enabling scan, or scan
917 * list will get screwed when you switch
918 * between scan up to scan down mode - dunno why */
920 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
923 devpriv->write_byte(cmd->chanlist_len,
924 dev->iobase + INTERVAL_COUNT_REG);
926 devpriv->write_byte(0x1, dev->iobase + INTERVAL_STROBE_REG);
928 if (cmd->convert_src == TRIG_TIMER ||
929 cmd->scan_begin_src == TRIG_TIMER) {
931 labpc_adc_timing(dev, cmd, mode);
932 /* load counter b0 in mode 3 */
933 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
934 0, devpriv->divisor_b0, I8254_MODE3);
936 comedi_error(dev, "error loading counter b0");
940 /* set up conversion pacing */
941 if (labpc_ai_convert_period(cmd, mode)) {
942 /* load counter a0 in mode 2 */
943 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
944 0, devpriv->divisor_a0, I8254_MODE2);
946 /* initialize pacer counter to prevent any problems */
947 ret = labpc_counter_set_mode(dev,
948 dev->iobase + COUNTER_A_BASE_REG,
952 comedi_error(dev, "error loading counter a0");
956 /* set up scan pacing */
957 if (labpc_ai_scan_period(cmd, mode)) {
958 /* load counter b1 in mode 2 */
959 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
960 1, devpriv->divisor_b1, I8254_MODE2);
962 comedi_error(dev, "error loading counter b1");
967 labpc_clear_adc_fifo(dev);
969 #ifdef CONFIG_ISA_DMA_API
970 /* set up dma transfer */
971 if (xfer == isa_dma_transfer) {
972 unsigned long irq_flags;
974 irq_flags = claim_dma_lock();
975 disable_dma(devpriv->dma_chan);
976 /* clear flip-flop to make sure 2-byte registers for
977 * count and address get set correctly */
978 clear_dma_ff(devpriv->dma_chan);
979 set_dma_addr(devpriv->dma_chan, devpriv->dma_addr);
980 /* set appropriate size of transfer */
981 devpriv->dma_transfer_size = labpc_suggest_transfer_size(cmd);
982 if (cmd->stop_src == TRIG_COUNT &&
983 devpriv->count * sample_size < devpriv->dma_transfer_size) {
984 devpriv->dma_transfer_size =
985 devpriv->count * sample_size;
987 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
988 enable_dma(devpriv->dma_chan);
989 release_dma_lock(irq_flags);
990 /* enable board's dma */
991 devpriv->cmd3 |= (CMD3_DMAEN | CMD3_DMATCINTEN);
993 devpriv->cmd3 &= ~(CMD3_DMAEN | CMD3_DMATCINTEN);
996 /* enable error interrupts */
997 devpriv->cmd3 |= CMD3_ERRINTEN;
998 /* enable fifo not empty interrupt? */
999 if (xfer == fifo_not_empty_transfer)
1000 devpriv->cmd3 |= CMD3_FIFOINTEN;
1002 devpriv->cmd3 &= ~CMD3_FIFOINTEN;
1003 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
1005 /* setup any external triggering/pacing (cmd4 register) */
1007 if (cmd->convert_src != TRIG_EXT)
1008 devpriv->cmd4 |= CMD4_ECLKRCV;
1009 /* XXX should discard first scan when using interval scanning
1010 * since manual says it is not synced with scan clock */
1011 if (!labpc_use_continuous_mode(cmd, mode)) {
1012 devpriv->cmd4 |= CMD4_INTSCAN;
1013 if (cmd->scan_begin_src == TRIG_EXT)
1014 devpriv->cmd4 |= CMD4_EOIRCV;
1016 /* single-ended/differential */
1017 if (aref == AREF_DIFF)
1018 devpriv->cmd4 |= CMD4_SEDIFF;
1019 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
1021 /* startup acquisition */
1023 spin_lock_irqsave(&dev->spinlock, flags);
1025 /* use 2 cascaded counters for pacing */
1026 devpriv->cmd2 |= CMD2_TBSEL;
1028 devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
1029 if (cmd->start_src == TRIG_EXT)
1030 devpriv->cmd2 |= CMD2_HWTRIG;
1032 devpriv->cmd2 |= CMD2_SWTRIG;
1033 if (cmd->stop_src == TRIG_EXT)
1034 devpriv->cmd2 |= (CMD2_HWTRIG | CMD2_PRETRIG);
1036 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1038 spin_unlock_irqrestore(&dev->spinlock, flags);
1043 #ifdef CONFIG_ISA_DMA_API
1044 static void labpc_drain_dma(struct comedi_device *dev)
1046 struct labpc_private *devpriv = dev->private;
1047 struct comedi_subdevice *s = dev->read_subdev;
1048 struct comedi_async *async = s->async;
1050 unsigned long flags;
1051 unsigned int max_points, num_points, residue, leftover;
1054 status = devpriv->stat1;
1056 flags = claim_dma_lock();
1057 disable_dma(devpriv->dma_chan);
1058 /* clear flip-flop to make sure 2-byte registers for
1059 * count and address get set correctly */
1060 clear_dma_ff(devpriv->dma_chan);
1062 /* figure out how many points to read */
1063 max_points = devpriv->dma_transfer_size / sample_size;
1064 /* residue is the number of points left to be done on the dma
1065 * transfer. It should always be zero at this point unless
1066 * the stop_src is set to external triggering.
1068 residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1069 num_points = max_points - residue;
1070 if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1071 num_points = devpriv->count;
1073 /* figure out how many points will be stored next time */
1075 if (async->cmd.stop_src != TRIG_COUNT) {
1076 leftover = devpriv->dma_transfer_size / sample_size;
1077 } else if (devpriv->count > num_points) {
1078 leftover = devpriv->count - num_points;
1079 if (leftover > max_points)
1080 leftover = max_points;
1083 /* write data to comedi buffer */
1084 for (i = 0; i < num_points; i++)
1085 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1087 if (async->cmd.stop_src == TRIG_COUNT)
1088 devpriv->count -= num_points;
1090 /* set address and count for next transfer */
1091 set_dma_addr(devpriv->dma_chan, devpriv->dma_addr);
1092 set_dma_count(devpriv->dma_chan, leftover * sample_size);
1093 release_dma_lock(flags);
1095 async->events |= COMEDI_CB_BLOCK;
1098 static void handle_isa_dma(struct comedi_device *dev)
1100 struct labpc_private *devpriv = dev->private;
1102 labpc_drain_dma(dev);
1104 enable_dma(devpriv->dma_chan);
1106 /* clear dma tc interrupt */
1107 devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1111 /* read all available samples from ai fifo */
1112 static int labpc_drain_fifo(struct comedi_device *dev)
1114 struct labpc_private *devpriv = dev->private;
1116 struct comedi_async *async = dev->read_subdev->async;
1117 const int timeout = 10000;
1120 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
1122 for (i = 0; (devpriv->stat1 & STAT1_DAVAIL) && i < timeout;
1124 /* quit if we have all the data we want */
1125 if (async->cmd.stop_src == TRIG_COUNT) {
1126 if (devpriv->count == 0)
1130 data = labpc_read_adc_fifo(dev);
1131 cfc_write_to_buffer(dev->read_subdev, data);
1132 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
1135 comedi_error(dev, "ai timeout, fifo never empties");
1136 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1143 /* makes sure all data acquired by board is transferred to comedi (used
1144 * when acquisition is terminated by stop_src == TRIG_EXT). */
1145 static void labpc_drain_dregs(struct comedi_device *dev)
1147 #ifdef CONFIG_ISA_DMA_API
1148 struct labpc_private *devpriv = dev->private;
1150 if (devpriv->current_transfer == isa_dma_transfer)
1151 labpc_drain_dma(dev);
1154 labpc_drain_fifo(dev);
1157 /* interrupt service routine */
1158 static irqreturn_t labpc_interrupt(int irq, void *d)
1160 struct comedi_device *dev = d;
1161 const struct labpc_boardinfo *board = comedi_board(dev);
1162 struct labpc_private *devpriv = dev->private;
1163 struct comedi_subdevice *s = dev->read_subdev;
1164 struct comedi_async *async;
1165 struct comedi_cmd *cmd;
1167 if (!dev->attached) {
1168 comedi_error(dev, "premature interrupt");
1176 /* read board status */
1177 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
1178 if (board->register_layout == labpc_1200_layout)
1179 devpriv->stat2 = devpriv->read_byte(dev->iobase + STAT2_REG);
1181 if ((devpriv->stat1 & (STAT1_GATA0 | STAT1_CNTINT | STAT1_OVERFLOW |
1182 STAT1_OVERRUN | STAT1_DAVAIL)) == 0
1183 && (devpriv->stat2 & STAT2_OUTA1) == 0
1184 && (devpriv->stat2 & STAT2_FIFONHF)) {
1188 if (devpriv->stat1 & STAT1_OVERRUN) {
1189 /* clear error interrupt */
1190 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
1191 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1192 comedi_event(dev, s);
1193 comedi_error(dev, "overrun");
1197 #ifdef CONFIG_ISA_DMA_API
1198 if (devpriv->current_transfer == isa_dma_transfer) {
1200 * if a dma terminal count of external stop trigger
1203 if (devpriv->stat1 & STAT1_GATA0 ||
1204 (board->register_layout == labpc_1200_layout
1205 && devpriv->stat2 & STAT2_OUTA1)) {
1206 handle_isa_dma(dev);
1210 labpc_drain_fifo(dev);
1212 if (devpriv->stat1 & STAT1_CNTINT) {
1213 comedi_error(dev, "handled timer interrupt?");
1215 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1218 if (devpriv->stat1 & STAT1_OVERFLOW) {
1219 /* clear error interrupt */
1220 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
1221 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1222 comedi_event(dev, s);
1223 comedi_error(dev, "overflow");
1226 /* handle external stop trigger */
1227 if (cmd->stop_src == TRIG_EXT) {
1228 if (devpriv->stat2 & STAT2_OUTA1) {
1229 labpc_drain_dregs(dev);
1230 labpc_cancel(dev, s);
1231 async->events |= COMEDI_CB_EOA;
1235 /* TRIG_COUNT end of acquisition */
1236 if (cmd->stop_src == TRIG_COUNT) {
1237 if (devpriv->count == 0) {
1238 labpc_cancel(dev, s);
1239 async->events |= COMEDI_CB_EOA;
1243 comedi_event(dev, s);
1247 static int labpc_ao_insn_write(struct comedi_device *dev,
1248 struct comedi_subdevice *s,
1249 struct comedi_insn *insn,
1252 const struct labpc_boardinfo *board = comedi_board(dev);
1253 struct labpc_private *devpriv = dev->private;
1255 unsigned long flags;
1258 channel = CR_CHAN(insn->chanspec);
1260 /* turn off pacing of analog output channel */
1261 /* note: hardware bug in daqcard-1200 means pacing cannot
1262 * be independently enabled/disabled for its the two channels */
1263 spin_lock_irqsave(&dev->spinlock, flags);
1264 devpriv->cmd2 &= ~CMD2_LDAC(channel);
1265 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1266 spin_unlock_irqrestore(&dev->spinlock, flags);
1269 if (board->register_layout == labpc_1200_layout) {
1270 range = CR_RANGE(insn->chanspec);
1271 if (labpc_range_is_unipolar(s, range))
1272 devpriv->cmd6 |= CMD6_DACUNI(channel);
1274 devpriv->cmd6 &= ~CMD6_DACUNI(channel);
1275 /* write to register */
1276 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
1279 lsb = data[0] & 0xff;
1280 msb = (data[0] >> 8) & 0xff;
1281 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1282 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1284 /* remember value for readback */
1285 devpriv->ao_value[channel] = data[0];
1290 static int labpc_ao_insn_read(struct comedi_device *dev,
1291 struct comedi_subdevice *s,
1292 struct comedi_insn *insn,
1295 struct labpc_private *devpriv = dev->private;
1297 data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1302 static int labpc_8255_mmio(int dir, int port, int data, unsigned long iobase)
1305 writeb(data, (void __iomem *)(iobase + port));
1308 return readb((void __iomem *)(iobase + port));
1312 /* lowlevel write to eeprom/dac */
1313 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1314 unsigned int value_width)
1316 struct labpc_private *devpriv = dev->private;
1319 for (i = 1; i <= value_width; i++) {
1320 /* clear serial clock */
1321 devpriv->cmd5 &= ~CMD5_SCLK;
1322 /* send bits most significant bit first */
1323 if (value & (1 << (value_width - i)))
1324 devpriv->cmd5 |= CMD5_SDATA;
1326 devpriv->cmd5 &= ~CMD5_SDATA;
1328 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1329 /* set clock to load bit */
1330 devpriv->cmd5 |= CMD5_SCLK;
1332 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1336 /* lowlevel read from eeprom */
1337 static unsigned int labpc_serial_in(struct comedi_device *dev)
1339 struct labpc_private *devpriv = dev->private;
1340 unsigned int value = 0;
1342 const int value_width = 8; /* number of bits wide values are */
1344 for (i = 1; i <= value_width; i++) {
1345 /* set serial clock */
1346 devpriv->cmd5 |= CMD5_SCLK;
1348 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1349 /* clear clock bit */
1350 devpriv->cmd5 &= ~CMD5_SCLK;
1352 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1353 /* read bits most significant bit first */
1355 devpriv->stat2 = devpriv->read_byte(dev->iobase + STAT2_REG);
1356 if (devpriv->stat2 & STAT2_PROMOUT)
1357 value |= 1 << (value_width - i);
1363 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1364 unsigned int address)
1366 struct labpc_private *devpriv = dev->private;
1368 /* bits to tell eeprom to expect a read */
1369 const int read_instruction = 0x3;
1370 /* 8 bit write lengths to eeprom */
1371 const int write_length = 8;
1373 /* enable read/write to eeprom */
1374 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1376 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1377 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1379 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1381 /* send read instruction */
1382 labpc_serial_out(dev, read_instruction, write_length);
1383 /* send 8 bit address to read from */
1384 labpc_serial_out(dev, address, write_length);
1386 value = labpc_serial_in(dev);
1388 /* disable read/write to eeprom */
1389 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1391 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1396 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1398 struct labpc_private *devpriv = dev->private;
1400 const int read_status_instruction = 0x5;
1401 const int write_length = 8; /* 8 bit write lengths to eeprom */
1403 /* enable read/write to eeprom */
1404 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1406 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1407 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1409 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1411 /* send read status instruction */
1412 labpc_serial_out(dev, read_status_instruction, write_length);
1414 value = labpc_serial_in(dev);
1416 /* disable read/write to eeprom */
1417 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1419 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1424 static int labpc_eeprom_write(struct comedi_device *dev,
1425 unsigned int address, unsigned int value)
1427 struct labpc_private *devpriv = dev->private;
1428 const int write_enable_instruction = 0x6;
1429 const int write_instruction = 0x2;
1430 const int write_length = 8; /* 8 bit write lengths to eeprom */
1431 const int write_in_progress_bit = 0x1;
1432 const int timeout = 10000;
1435 /* make sure there isn't already a write in progress */
1436 for (i = 0; i < timeout; i++) {
1437 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1442 comedi_error(dev, "eeprom write timed out");
1445 /* update software copy of eeprom */
1446 devpriv->eeprom_data[address] = value;
1448 /* enable read/write to eeprom */
1449 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1451 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1452 devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1454 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1456 /* send write_enable instruction */
1457 labpc_serial_out(dev, write_enable_instruction, write_length);
1458 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1460 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1462 /* send write instruction */
1463 devpriv->cmd5 |= CMD5_EEPROMCS;
1465 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1466 labpc_serial_out(dev, write_instruction, write_length);
1467 /* send 8 bit address to write to */
1468 labpc_serial_out(dev, address, write_length);
1470 labpc_serial_out(dev, value, write_length);
1471 devpriv->cmd5 &= ~CMD5_EEPROMCS;
1473 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1475 /* disable read/write to eeprom */
1476 devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1478 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1483 /* writes to 8 bit calibration dacs */
1484 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1487 struct labpc_private *devpriv = dev->private;
1489 if (value == devpriv->caldac[channel])
1491 devpriv->caldac[channel] = value;
1493 /* clear caldac load bit and make sure we don't write to eeprom */
1494 devpriv->cmd5 &= ~(CMD5_CALDACLD | CMD5_EEPROMCS | CMD5_WRTPRT);
1496 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1498 /* write 4 bit channel */
1499 labpc_serial_out(dev, channel, 4);
1500 /* write 8 bit caldac value */
1501 labpc_serial_out(dev, value, 8);
1503 /* set and clear caldac bit to load caldac value */
1504 devpriv->cmd5 |= CMD5_CALDACLD;
1506 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1507 devpriv->cmd5 &= ~CMD5_CALDACLD;
1509 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1512 static int labpc_calib_insn_write(struct comedi_device *dev,
1513 struct comedi_subdevice *s,
1514 struct comedi_insn *insn,
1517 unsigned int chan = CR_CHAN(insn->chanspec);
1520 * Only write the last data value to the caldac. Preceding
1521 * data would be overwritten anyway.
1524 write_caldac(dev, chan, data[insn->n - 1]);
1529 static int labpc_calib_insn_read(struct comedi_device *dev,
1530 struct comedi_subdevice *s,
1531 struct comedi_insn *insn,
1534 struct labpc_private *devpriv = dev->private;
1535 unsigned int chan = CR_CHAN(insn->chanspec);
1538 for (i = 0; i < insn->n; i++)
1539 data[i] = devpriv->caldac[chan];
1544 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1545 struct comedi_subdevice *s,
1546 struct comedi_insn *insn,
1549 unsigned int chan = CR_CHAN(insn->chanspec);
1552 /* only allow writes to user area of eeprom */
1553 if (chan < 16 || chan > 127)
1557 * Only write the last data value to the eeprom. Preceding
1558 * data would be overwritten anyway.
1561 ret = labpc_eeprom_write(dev, chan, data[insn->n - 1]);
1569 static int labpc_eeprom_insn_read(struct comedi_device *dev,
1570 struct comedi_subdevice *s,
1571 struct comedi_insn *insn,
1574 struct labpc_private *devpriv = dev->private;
1575 unsigned int chan = CR_CHAN(insn->chanspec);
1578 for (i = 0; i < insn->n; i++)
1579 data[i] = devpriv->eeprom_data[chan];
1584 int labpc_common_attach(struct comedi_device *dev,
1585 unsigned int irq, unsigned long isr_flags)
1587 const struct labpc_boardinfo *board = comedi_board(dev);
1588 struct labpc_private *devpriv = dev->private;
1589 struct comedi_subdevice *s;
1593 if (board->has_mmio) {
1594 devpriv->read_byte = labpc_readb;
1595 devpriv->write_byte = labpc_writeb;
1597 devpriv->read_byte = labpc_inb;
1598 devpriv->write_byte = labpc_outb;
1601 /* initialize board's command registers */
1602 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
1603 devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1604 devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
1605 devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
1606 if (board->register_layout == labpc_1200_layout) {
1607 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1608 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
1612 ret = request_irq(irq, labpc_interrupt, isr_flags,
1613 dev->board_name, dev);
1618 ret = comedi_alloc_subdevices(dev, 5);
1622 /* analog input subdevice */
1623 s = &dev->subdevices[0];
1624 s->type = COMEDI_SUBD_AI;
1625 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1627 s->len_chanlist = 8;
1628 s->maxdata = 0x0fff;
1629 s->range_table = board->ai_range_table;
1630 s->insn_read = labpc_ai_insn_read;
1632 dev->read_subdev = s;
1633 s->subdev_flags |= SDF_CMD_READ;
1634 s->do_cmd = labpc_ai_cmd;
1635 s->do_cmdtest = labpc_ai_cmdtest;
1636 s->cancel = labpc_cancel;
1640 s = &dev->subdevices[1];
1641 if (board->has_ao) {
1642 s->type = COMEDI_SUBD_AO;
1643 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1644 s->n_chan = NUM_AO_CHAN;
1645 s->maxdata = 0x0fff;
1646 s->range_table = &range_labpc_ao;
1647 s->insn_read = labpc_ao_insn_read;
1648 s->insn_write = labpc_ao_insn_write;
1650 /* initialize analog outputs to a known value */
1651 for (i = 0; i < s->n_chan; i++) {
1654 devpriv->ao_value[i] = s->maxdata / 2;
1655 lsb = devpriv->ao_value[i] & 0xff;
1656 msb = (devpriv->ao_value[i] >> 8) & 0xff;
1657 devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
1658 devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
1661 s->type = COMEDI_SUBD_UNUSED;
1665 s = &dev->subdevices[2];
1666 ret = subdev_8255_init(dev, s,
1667 (board->has_mmio) ? labpc_8255_mmio : NULL,
1668 dev->iobase + DIO_BASE_REG);
1672 /* calibration subdevices for boards that have one */
1673 s = &dev->subdevices[3];
1674 if (board->register_layout == labpc_1200_layout) {
1675 s->type = COMEDI_SUBD_CALIB;
1676 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1679 s->insn_read = labpc_calib_insn_read;
1680 s->insn_write = labpc_calib_insn_write;
1682 for (i = 0; i < s->n_chan; i++)
1683 write_caldac(dev, i, s->maxdata / 2);
1685 s->type = COMEDI_SUBD_UNUSED;
1688 s = &dev->subdevices[4];
1689 if (board->register_layout == labpc_1200_layout) {
1690 s->type = COMEDI_SUBD_MEMORY;
1691 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1692 s->n_chan = EEPROM_SIZE;
1694 s->insn_read = labpc_eeprom_insn_read;
1695 s->insn_write = labpc_eeprom_insn_write;
1697 for (i = 0; i < s->n_chan; i++)
1698 devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
1700 s->type = COMEDI_SUBD_UNUSED;
1704 EXPORT_SYMBOL_GPL(labpc_common_attach);
1706 void labpc_common_detach(struct comedi_device *dev)
1708 comedi_spriv_free(dev, 2);
1710 EXPORT_SYMBOL_GPL(labpc_common_detach);
1712 #if IS_ENABLED(CONFIG_COMEDI_NI_LABPC_ISA)
1713 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1715 struct labpc_private *devpriv;
1716 unsigned int irq = it->options[1];
1717 unsigned int dma_chan = it->options[2];
1720 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1723 dev->private = devpriv;
1725 ret = comedi_request_region(dev, it->options[0], LABPC_SIZE);
1729 ret = labpc_common_attach(dev, irq, 0);
1733 #ifdef CONFIG_ISA_DMA_API
1734 if (dev->irq && (dma_chan == 1 || dma_chan == 3)) {
1735 devpriv->dma_buffer = kmalloc(dma_buffer_size,
1736 GFP_KERNEL | GFP_DMA);
1737 if (devpriv->dma_buffer) {
1738 ret = request_dma(dma_chan, dev->board_name);
1740 unsigned long dma_flags;
1742 devpriv->dma_chan = dma_chan;
1744 virt_to_bus(devpriv->dma_buffer);
1746 dma_flags = claim_dma_lock();
1747 disable_dma(devpriv->dma_chan);
1748 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
1749 release_dma_lock(dma_flags);
1751 kfree(devpriv->dma_buffer);
1760 static void labpc_detach(struct comedi_device *dev)
1762 struct labpc_private *devpriv = dev->private;
1764 labpc_common_detach(dev);
1767 kfree(devpriv->dma_buffer);
1768 if (devpriv->dma_chan)
1769 free_dma(devpriv->dma_chan);
1771 comedi_legacy_detach(dev);
1774 static struct comedi_driver labpc_driver = {
1775 .driver_name = "ni_labpc",
1776 .module = THIS_MODULE,
1777 .attach = labpc_attach,
1778 .detach = labpc_detach,
1779 .num_names = ARRAY_SIZE(labpc_boards),
1780 .board_name = &labpc_boards[0].name,
1781 .offset = sizeof(struct labpc_boardinfo),
1783 module_comedi_driver(labpc_driver);
1785 static int __init labpc_common_init(void)
1789 module_init(labpc_common_init);
1791 static void __exit labpc_common_exit(void)
1794 module_exit(labpc_common_exit);
1797 MODULE_AUTHOR("Comedi http://www.comedi.org");
1798 MODULE_DESCRIPTION("Comedi low-level driver");
1799 MODULE_LICENSE("GPL");