drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at https://bugs.comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 /* #define LABPC_DEBUG    enable debugging messages */
  78
  79 #include <linux/interrupt.h>
  80 #include <linux/slab.h>
  81 #include "../comedidev.h"
  82
  83 #include <linux/delay.h>
  84 #include <asm/dma.h>
  85
  86 #include "8253.h"
  87 #include "8255.h"
  88 #include "mite.h"
  89 #include "comedi_fc.h"
  90 #include "ni_labpc.h"
  91
  92 #define DRV_NAME "ni_labpc"
  93
  94 /* size of io region used by board */
  95 #define LABPC_SIZE           32
  96 /* 2 MHz master clock */
  97 #define LABPC_TIMER_BASE            500
  98
  99 /* Registers for the lab-pc+ */
 100
 101 /* write-only registers */
 102 #define COMMAND1_REG    0x0
 103 #define   ADC_GAIN_MASK (0x7 << 4)
 104 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 105 /* enables multi channel scans */
 106 #define   ADC_SCAN_EN_BIT       0x80
 107 #define COMMAND2_REG    0x1
 108 /* enable pretriggering (used in conjunction with SWTRIG) */
 109 #define   PRETRIG_BIT   0x1
 110 /* enable paced conversions on external trigger */
 111 #define   HWTRIG_BIT    0x2
 112 /* enable paced conversions */
 113 #define   SWTRIG_BIT    0x4
 114 /* use two cascaded counters for pacing */
 115 #define   CASCADE_BIT   0x8
 116 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 117 #define COMMAND3_REG    0x2
 118 /* enable dma transfers */
 119 #define   DMA_EN_BIT    0x1
 120 /* enable interrupts for 8255 */
 121 #define   DIO_INTR_EN_BIT       0x2
 122 /* enable dma terminal count interrupt */
 123 #define   DMATC_INTR_EN_BIT     0x4
 124 /* enable timer interrupt */
 125 #define   TIMER_INTR_EN_BIT     0x8
 126 /* enable error interrupt */
 127 #define   ERR_INTR_EN_BIT       0x10
 128 /* enable fifo not empty interrupt */
 129 #define   ADC_FNE_INTR_EN_BIT   0x20
 130 #define ADC_CONVERT_REG 0x3
 131 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 132 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 133 #define ADC_CLEAR_REG   0x8
 134 #define DMATC_CLEAR_REG 0xa
 135 #define TIMER_CLEAR_REG 0xc
 136 /* 1200 boards only */
 137 #define COMMAND6_REG    0xe
 138 /* select ground or common-mode reference */
 139 #define   ADC_COMMON_BIT        0x1
 140 /*  adc unipolar */
 141 #define   ADC_UNIP_BIT  0x2
 142 /*  dac unipolar */
 143 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 144 /* enable fifo half full interrupt */
 145 #define   ADC_FHF_INTR_EN_BIT   0x20
 146 /* enable interrupt on end of hardware count */
 147 #define   A1_INTR_EN_BIT        0x40
 148 /* scan up from channel zero instead of down to zero */
 149 #define   ADC_SCAN_UP_BIT 0x80
 150 #define COMMAND4_REG    0xf
 151 /* enables 'interval' scanning */
 152 #define   INTERVAL_SCAN_EN_BIT  0x1
 153 /* enables external signal on counter b1 output to trigger scan */
 154 #define   EXT_SCAN_EN_BIT       0x2
 155 /* chooses direction (output or input) for EXTCONV* line */
 156 #define   EXT_CONVERT_OUT_BIT   0x4
 157 /* chooses differential inputs for adc (in conjunction with board jumper) */
 158 #define   ADC_DIFF_BIT  0x8
 159 #define   EXT_CONVERT_DISABLE_BIT       0x10
 160 /* 1200 boards only, calibration stuff */
 161 #define COMMAND5_REG    0x1c
 162 /* enable eeprom for write */
 163 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 164 /* enable dithering */
 165 #define   DITHER_EN_BIT 0x8
 166 /* load calibration dac */
 167 #define   CALDAC_LOAD_BIT       0x10
 168 /* serial clock - rising edge writes, falling edge reads */
 169 #define   SCLOCK_BIT    0x20
 170 /* serial data bit for writing to eeprom or calibration dacs */
 171 #define   SDATA_BIT     0x40
 172 /* enable eeprom for read/write */
 173 #define   EEPROM_EN_BIT 0x80
 174 #define INTERVAL_COUNT_REG      0x1e
 175 #define INTERVAL_LOAD_REG       0x1f
 176 #define   INTERVAL_LOAD_BITS    0x1
 177
 178 /* read-only registers */
 179 #define STATUS1_REG     0x0
 180 /* data is available in fifo */
 181 #define   DATA_AVAIL_BIT        0x1
 182 /* overrun has occurred */
 183 #define   OVERRUN_BIT   0x2
 184 /* fifo overflow */
 185 #define   OVERFLOW_BIT  0x4
 186 /* timer interrupt has occured */
 187 #define   TIMER_BIT     0x8
 188 /* dma terminal count has occured */
 189 #define   DMATC_BIT     0x10
 190 /* external trigger has occured */
 191 #define   EXT_TRIG_BIT  0x40
 192 /* 1200 boards only */
 193 #define STATUS2_REG     0x1d
 194 /* programmable eeprom serial output */
 195 #define   EEPROM_OUT_BIT        0x1
 196 /* counter A1 terminal count */
 197 #define   A1_TC_BIT     0x2
 198 /* fifo not half full */
 199 #define   FNHF_BIT      0x4
 200 #define ADC_FIFO_REG    0xa
 201
 202 #define DIO_BASE_REG    0x10
 203 #define COUNTER_A_BASE_REG      0x14
 204 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 205 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 206 #define   INIT_A0_BITS  0x14
 207 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 208 #define   INIT_A1_BITS  0x70
 209 #define COUNTER_B_BASE_REG      0x18
 210
 211 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it);
 212 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
 213 static irqreturn_t labpc_interrupt(int irq, void *d);
 214 static int labpc_drain_fifo(struct comedi_device *dev);
 215 static void labpc_drain_dma(struct comedi_device *dev);
 216 static void handle_isa_dma(struct comedi_device *dev);
 217 static void labpc_drain_dregs(struct comedi_device *dev);
 218 static int labpc_ai_cmdtest(struct comedi_device *dev,
 219                             struct comedi_subdevice *s, struct comedi_cmd *cmd);
 220 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
 221 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 222                           struct comedi_insn *insn, unsigned int *data);
 223 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
 224                           struct comedi_insn *insn, unsigned int *data);
 225 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
 226                           struct comedi_insn *insn, unsigned int *data);
 227 static int labpc_calib_read_insn(struct comedi_device *dev,
 228                                  struct comedi_subdevice *s,
 229                                  struct comedi_insn *insn, unsigned int *data);
 230 static int labpc_calib_write_insn(struct comedi_device *dev,
 231                                   struct comedi_subdevice *s,
 232                                   struct comedi_insn *insn, unsigned int *data);
 233 static int labpc_eeprom_read_insn(struct comedi_device *dev,
 234                                   struct comedi_subdevice *s,
 235                                   struct comedi_insn *insn, unsigned int *data);
 236 static int labpc_eeprom_write_insn(struct comedi_device *dev,
 237                                    struct comedi_subdevice *s,
 238                                    struct comedi_insn *insn,
 239                                    unsigned int *data);
 240 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd);
 241 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd);
 242 #ifdef CONFIG_COMEDI_PCI
 243 static int labpc_find_device(struct comedi_device *dev, int bus, int slot);
 244 #endif
 245 static int labpc_dio_mem_callback(int dir, int port, int data,
 246                                   unsigned long arg);
 247 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
 248                              unsigned int num_bits);
 249 static unsigned int labpc_serial_in(struct comedi_device *dev);
 250 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
 251                                       unsigned int address);
 252 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev);
 253 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
 254                                        unsigned int address,
 255                                        unsigned int value);
 256 static void write_caldac(struct comedi_device *dev, unsigned int channel,
 257                          unsigned int value);
 258
 259 enum scan_mode {
 260         MODE_SINGLE_CHAN,
 261         MODE_SINGLE_CHAN_INTERVAL,
 262         MODE_MULT_CHAN_UP,
 263         MODE_MULT_CHAN_DOWN,
 264 };
 265
 266 /* analog input ranges */
 267 #define NUM_LABPC_PLUS_AI_RANGES 16
 268 /* indicates unipolar ranges */
 269 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 270         0,
 271         0,
 272         0,
 273         0,
 274         0,
 275         0,
 276         0,
 277         0,
 278         1,
 279         1,
 280         1,
 281         1,
 282         1,
 283         1,
 284         1,
 285         1,
 286 };
 287
 288 /* map range index to gain bits */
 289 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 290         0x00,
 291         0x10,
 292         0x20,
 293         0x30,
 294         0x40,
 295         0x50,
 296         0x60,
 297         0x70,
 298         0x00,
 299         0x10,
 300         0x20,
 301         0x30,
 302         0x40,
 303         0x50,
 304         0x60,
 305         0x70,
 306 };
 307
 308 static const struct comedi_lrange range_labpc_plus_ai = {
 309         NUM_LABPC_PLUS_AI_RANGES,
 310         {
 311          BIP_RANGE(5),
 312          BIP_RANGE(4),
 313          BIP_RANGE(2.5),
 314          BIP_RANGE(1),
 315          BIP_RANGE(0.5),
 316          BIP_RANGE(0.25),
 317          BIP_RANGE(0.1),
 318          BIP_RANGE(0.05),
 319          UNI_RANGE(10),
 320          UNI_RANGE(8),
 321          UNI_RANGE(5),
 322          UNI_RANGE(2),
 323          UNI_RANGE(1),
 324          UNI_RANGE(0.5),
 325          UNI_RANGE(0.2),
 326          UNI_RANGE(0.1),
 327          }
 328 };
 329
 330 #define NUM_LABPC_1200_AI_RANGES 14
 331 /* indicates unipolar ranges */
 332 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 333         0,
 334         0,
 335         0,
 336         0,
 337         0,
 338         0,
 339         0,
 340         1,
 341         1,
 342         1,
 343         1,
 344         1,
 345         1,
 346         1,
 347 };
 348
 349 /* map range index to gain bits */
 350 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 351         0x00,
 352         0x20,
 353         0x30,
 354         0x40,
 355         0x50,
 356         0x60,
 357         0x70,
 358         0x00,
 359         0x20,
 360         0x30,
 361         0x40,
 362         0x50,
 363         0x60,
 364         0x70,
 365 };
 366
 367 const struct comedi_lrange range_labpc_1200_ai = {
 368         NUM_LABPC_1200_AI_RANGES,
 369         {
 370          BIP_RANGE(5),
 371          BIP_RANGE(2.5),
 372          BIP_RANGE(1),
 373          BIP_RANGE(0.5),
 374          BIP_RANGE(0.25),
 375          BIP_RANGE(0.1),
 376          BIP_RANGE(0.05),
 377          UNI_RANGE(10),
 378          UNI_RANGE(5),
 379          UNI_RANGE(2),
 380          UNI_RANGE(1),
 381          UNI_RANGE(0.5),
 382          UNI_RANGE(0.2),
 383          UNI_RANGE(0.1),
 384          }
 385 };
 386
 387 /* analog output ranges */
 388 #define AO_RANGE_IS_UNIPOLAR 0x1
 389 static const struct comedi_lrange range_labpc_ao = {
 390         2,
 391         {
 392          BIP_RANGE(5),
 393          UNI_RANGE(10),
 394          }
 395 };
 396
 397 /* functions that do inb/outb and readb/writeb so we can use
 398  * function pointers to decide which to use */
 399 static inline unsigned int labpc_inb(unsigned long address)
 400 {
 401         return inb(address);
 402 }
 403
 404 static inline void labpc_outb(unsigned int byte, unsigned long address)
 405 {
 406         outb(byte, address);
 407 }
 408
 409 static inline unsigned int labpc_readb(unsigned long address)
 410 {
 411         return readb((void *)address);
 412 }
 413
 414 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 415 {
 416         writeb(byte, (void *)address);
 417 }
 418
 419 static const struct labpc_board_struct labpc_boards[] = {
 420         {
 421          .name = "lab-pc-1200",
 422          .ai_speed = 10000,
 423          .bustype = isa_bustype,
 424          .register_layout = labpc_1200_layout,
 425          .has_ao = 1,
 426          .ai_range_table = &range_labpc_1200_ai,
 427          .ai_range_code = labpc_1200_ai_gain_bits,
 428          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 429          .ai_scan_up = 1,
 430          .memory_mapped_io = 0,
 431          },
 432         {
 433          .name = "lab-pc-1200ai",
 434          .ai_speed = 10000,
 435          .bustype = isa_bustype,
 436          .register_layout = labpc_1200_layout,
 437          .has_ao = 0,
 438          .ai_range_table = &range_labpc_1200_ai,
 439          .ai_range_code = labpc_1200_ai_gain_bits,
 440          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 441          .ai_scan_up = 1,
 442          .memory_mapped_io = 0,
 443          },
 444         {
 445          .name = "lab-pc+",
 446          .ai_speed = 12000,
 447          .bustype = isa_bustype,
 448          .register_layout = labpc_plus_layout,
 449          .has_ao = 1,
 450          .ai_range_table = &range_labpc_plus_ai,
 451          .ai_range_code = labpc_plus_ai_gain_bits,
 452          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 453          .ai_scan_up = 0,
 454          .memory_mapped_io = 0,
 455          },
 456 #ifdef CONFIG_COMEDI_PCI
 457         {
 458          .name = "pci-1200",
 459          .device_id = 0x161,
 460          .ai_speed = 10000,
 461          .bustype = pci_bustype,
 462          .register_layout = labpc_1200_layout,
 463          .has_ao = 1,
 464          .ai_range_table = &range_labpc_1200_ai,
 465          .ai_range_code = labpc_1200_ai_gain_bits,
 466          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 467          .ai_scan_up = 1,
 468          .memory_mapped_io = 1,
 469          },
 470 /* dummy entry so pci board works when comedi_config is passed driver name */
 471         {
 472          .name = DRV_NAME,
 473          .bustype = pci_bustype,
 474          },
 475 #endif
 476 };
 477
 478 /*
 479  * Useful for shorthand access to the particular board structure
 480  */
 481 #define thisboard ((struct labpc_board_struct *)dev->board_ptr)
 482
 483 /* size in bytes of dma buffer */
 484 static const int dma_buffer_size = 0xff00;
 485 /* 2 bytes per sample */
 486 static const int sample_size = 2;
 487
 488 #define devpriv ((struct labpc_private *)dev->private)
 489
 490 static struct comedi_driver driver_labpc = {
 491         .driver_name = DRV_NAME,
 492         .module = THIS_MODULE,
 493         .attach = labpc_attach,
 494         .detach = labpc_common_detach,
 495         .num_names = ARRAY_SIZE(labpc_boards),
 496         .board_name = &labpc_boards[0].name,
 497         .offset = sizeof(struct labpc_board_struct),
 498 };
 499
 500 #ifdef CONFIG_COMEDI_PCI
 501 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 502         {PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161)},
 503         {0}
 504 };
 505
 506 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 507 #endif /* CONFIG_COMEDI_PCI */
 508
 509 static inline int labpc_counter_load(struct comedi_device *dev,
 510                                      unsigned long base_address,
 511                                      unsigned int counter_number,
 512                                      unsigned int count, unsigned int mode)
 513 {
 514         if (thisboard->memory_mapped_io)
 515                 return i8254_mm_load((void *)base_address, 0, counter_number,
 516                                      count, mode);
 517         else
 518                 return i8254_load(base_address, 0, counter_number, count, mode);
 519 }
 520
 521 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
 522                         unsigned int irq, unsigned int dma_chan)
 523 {
 524         struct comedi_subdevice *s;
 525         int i;
 526         unsigned long dma_flags, isr_flags;
 527         short lsb, msb;
 528
 529         printk(KERN_ERR "comedi%d: ni_labpc: %s, io 0x%lx", dev->minor,
 530                                                                 thisboard->name,
 531                iobase);
 532         if (irq)
 533                 printk(", irq %u", irq);
 534         if (dma_chan)
 535                 printk(", dma %u", dma_chan);
 536         printk("\n");
 537
 538         if (iobase == 0) {
 539                 printk(KERN_ERR "io base address is zero!\n");
 540                 return -EINVAL;
 541         }
 542         /*  request io regions for isa boards */
 543         if (thisboard->bustype == isa_bustype) {
 544                 /* check if io addresses are available */
 545                 if (!request_region(iobase, LABPC_SIZE,
 546                                     driver_labpc.driver_name)) {
 547                         printk(KERN_ERR "I/O port conflict\n");
 548                         return -EIO;
 549                 }
 550         }
 551         dev->iobase = iobase;
 552
 553         if (thisboard->memory_mapped_io) {
 554                 devpriv->read_byte = labpc_readb;
 555                 devpriv->write_byte = labpc_writeb;
 556         } else {
 557                 devpriv->read_byte = labpc_inb;
 558                 devpriv->write_byte = labpc_outb;
 559         }
 560         /* initialize board's command registers */
 561         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 562         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 563         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 564         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 565         if (thisboard->register_layout == labpc_1200_layout) {
 566                 devpriv->write_byte(devpriv->command5_bits,
 567                                     dev->iobase + COMMAND5_REG);
 568                 devpriv->write_byte(devpriv->command6_bits,
 569                                     dev->iobase + COMMAND6_REG);
 570         }
 571
 572         /* grab our IRQ */
 573         if (irq) {
 574                 isr_flags = 0;
 575                 if (thisboard->bustype == pci_bustype
 576                     || thisboard->bustype == pcmcia_bustype)
 577                         isr_flags |= IRQF_SHARED;
 578                 if (request_irq(irq, labpc_interrupt, isr_flags,
 579                                 driver_labpc.driver_name, dev)) {
 580                         printk(KERN_ERR "unable to allocate irq %u\n", irq);
 581                         return -EINVAL;
 582                 }
 583         }
 584         dev->irq = irq;
 585
 586         /* grab dma channel */
 587         if (dma_chan > 3) {
 588                 printk(KERN_ERR " invalid dma channel %u\n", dma_chan);
 589                 return -EINVAL;
 590         } else if (dma_chan) {
 591                 /* allocate dma buffer */
 592                 devpriv->dma_buffer =
 593                     kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 594                 if (devpriv->dma_buffer == NULL) {
 595                         printk(KERN_ERR " failed to allocate dma buffer\n");
 596                         return -ENOMEM;
 597                 }
 598                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 599                         printk(KERN_ERR " failed to allocate dma channel %u\n",
 600                                dma_chan);
 601                         return -EINVAL;
 602                 }
 603                 devpriv->dma_chan = dma_chan;
 604                 dma_flags = claim_dma_lock();
 605                 disable_dma(devpriv->dma_chan);
 606                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 607                 release_dma_lock(dma_flags);
 608         }
 609
 610         dev->board_name = thisboard->name;
 611
 612         if (alloc_subdevices(dev, 5) < 0)
 613                 return -ENOMEM;
 614
 615         /* analog input subdevice */
 616         s = dev->subdevices + 0;
 617         dev->read_subdev = s;
 618         s->type = COMEDI_SUBD_AI;
 619         s->subdev_flags =
 620             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
 621         s->n_chan = 8;
 622         s->len_chanlist = 8;
 623         s->maxdata = (1 << 12) - 1;     /* 12 bit resolution */
 624         s->range_table = thisboard->ai_range_table;
 625         s->do_cmd = labpc_ai_cmd;
 626         s->do_cmdtest = labpc_ai_cmdtest;
 627         s->insn_read = labpc_ai_rinsn;
 628         s->cancel = labpc_cancel;
 629
 630         /* analog output */
 631         s = dev->subdevices + 1;
 632         if (thisboard->has_ao) {
 633                 /*
 634                  * Could provide command support, except it only has a
 635                  * one sample hardware buffer for analog output and no
 636                  * underrun flag.
 637                  */
 638                 s->type = COMEDI_SUBD_AO;
 639                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 640                 s->n_chan = NUM_AO_CHAN;
 641                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
 642                 s->range_table = &range_labpc_ao;
 643                 s->insn_read = labpc_ao_rinsn;
 644                 s->insn_write = labpc_ao_winsn;
 645                 /* initialize analog outputs to a known value */
 646                 for (i = 0; i < s->n_chan; i++) {
 647                         devpriv->ao_value[i] = s->maxdata / 2;
 648                         lsb = devpriv->ao_value[i] & 0xff;
 649                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 650                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 651                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 652                 }
 653         } else {
 654                 s->type = COMEDI_SUBD_UNUSED;
 655         }
 656
 657         /* 8255 dio */
 658         s = dev->subdevices + 2;
 659         /*  if board uses io memory we have to give a custom callback
 660          * function to the 8255 driver */
 661         if (thisboard->memory_mapped_io)
 662                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 663                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
 664         else
 665                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 666
 667         /*  calibration subdevices for boards that have one */
 668         s = dev->subdevices + 3;
 669         if (thisboard->register_layout == labpc_1200_layout) {
 670                 s->type = COMEDI_SUBD_CALIB;
 671                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 672                 s->n_chan = 16;
 673                 s->maxdata = 0xff;
 674                 s->insn_read = labpc_calib_read_insn;
 675                 s->insn_write = labpc_calib_write_insn;
 676
 677                 for (i = 0; i < s->n_chan; i++)
 678                         write_caldac(dev, i, s->maxdata / 2);
 679         } else
 680                 s->type = COMEDI_SUBD_UNUSED;
 681
 682         /* EEPROM */
 683         s = dev->subdevices + 4;
 684         if (thisboard->register_layout == labpc_1200_layout) {
 685                 s->type = COMEDI_SUBD_MEMORY;
 686                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 687                 s->n_chan = EEPROM_SIZE;
 688                 s->maxdata = 0xff;
 689                 s->insn_read = labpc_eeprom_read_insn;
 690                 s->insn_write = labpc_eeprom_write_insn;
 691
 692                 for (i = 0; i < EEPROM_SIZE; i++)
 693                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 694 #ifdef LABPC_DEBUG
 695                 printk(KERN_ERR " eeprom:");
 696                 for (i = 0; i < EEPROM_SIZE; i++)
 697                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 698                 printk("\n");
 699 #endif
 700         } else
 701                 s->type = COMEDI_SUBD_UNUSED;
 702
 703         return 0;
 704 }
 705
 706 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
 707 {
 708         unsigned long iobase = 0;
 709         unsigned int irq = 0;
 710         unsigned int dma_chan = 0;
 711 #ifdef CONFIG_COMEDI_PCI
 712         int retval;
 713 #endif
 714
 715         /* allocate and initialize dev->private */
 716         if (alloc_private(dev, sizeof(struct labpc_private)) < 0)
 717                 return -ENOMEM;
 718
 719         /* get base address, irq etc. based on bustype */
 720         switch (thisboard->bustype) {
 721         case isa_bustype:
 722                 iobase = it->options[0];
 723                 irq = it->options[1];
 724                 dma_chan = it->options[2];
 725                 break;
 726         case pci_bustype:
 727 #ifdef CONFIG_COMEDI_PCI
 728                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 729                 if (retval < 0)
 730                         return retval;
 731                 retval = mite_setup(devpriv->mite);
 732                 if (retval < 0)
 733                         return retval;
 734                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 735                 irq = mite_irq(devpriv->mite);
 736 #else
 737                 printk(KERN_ERR " this driver has not been built with PCI "
 738                                                                 "support.\n");
 739                 return -EINVAL;
 740 #endif
 741                 break;
 742         case pcmcia_bustype:
 743                 printk
 744                     (" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 745                 return -EINVAL;
 746                 break;
 747         default:
 748                 printk(KERN_ERR "bug! couldn't determine board type\n");
 749                 return -EINVAL;
 750                 break;
 751         }
 752
 753         return labpc_common_attach(dev, iobase, irq, dma_chan);
 754 }
 755
 756 /* adapted from ni_pcimio for finding mite based boards (pc-1200) */
 757 #ifdef CONFIG_COMEDI_PCI
 758 static int labpc_find_device(struct comedi_device *dev, int bus, int slot)
 759 {
 760         struct mite_struct *mite;
 761         int i;
 762         for (mite = mite_devices; mite; mite = mite->next) {
 763                 if (mite->used)
 764                         continue;
 765 /* if bus/slot are specified then make sure we have the right bus/slot */
 766                 if (bus || slot) {
 767                         if (bus != mite->pcidev->bus->number
 768                             || slot != PCI_SLOT(mite->pcidev->devfn))
 769                                 continue;
 770                 }
 771                 for (i = 0; i < driver_labpc.num_names; i++) {
 772                         if (labpc_boards[i].bustype != pci_bustype)
 773                                 continue;
 774                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 775                                 devpriv->mite = mite;
 776 /* fixup board pointer, in case we were using the dummy "ni_labpc" entry */
 777                                 dev->board_ptr = &labpc_boards[i];
 778                                 return 0;
 779                         }
 780                 }
 781         }
 782         printk(KERN_ERR "no device found\n");
 783         mite_list_devices();
 784         return -EIO;
 785 }
 786 #endif
 787
 788 int labpc_common_detach(struct comedi_device *dev)
 789 {
 790         printk(KERN_ERR "comedi%d: ni_labpc: detach\n", dev->minor);
 791
 792         if (dev->subdevices)
 793                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 794
 795         /* only free stuff if it has been allocated by _attach */
 796         if (devpriv->dma_buffer)
 797                 kfree(devpriv->dma_buffer);
 798         if (devpriv->dma_chan)
 799                 free_dma(devpriv->dma_chan);
 800         if (dev->irq)
 801                 free_irq(dev->irq, dev);
 802         if (thisboard->bustype == isa_bustype && dev->iobase)
 803                 release_region(dev->iobase, LABPC_SIZE);
 804 #ifdef CONFIG_COMEDI_PCI
 805         if (devpriv->mite)
 806                 mite_unsetup(devpriv->mite);
 807 #endif
 808
 809         return 0;
 810 };
 811
 812 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 813 {
 814         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 815         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 816         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 817 }
 818
 819 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 820 {
 821         unsigned long flags;
 822
 823         spin_lock_irqsave(&dev->spinlock, flags);
 824         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 825         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 826         spin_unlock_irqrestore(&dev->spinlock, flags);
 827
 828         devpriv->command3_bits = 0;
 829         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 830
 831         return 0;
 832 }
 833
 834 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 835 {
 836         if (cmd->chanlist_len == 1)
 837                 return MODE_SINGLE_CHAN;
 838
 839         /* chanlist may be NULL during cmdtest. */
 840         if (cmd->chanlist == NULL)
 841                 return MODE_MULT_CHAN_UP;
 842
 843         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 844                 return MODE_SINGLE_CHAN_INTERVAL;
 845
 846         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 847                 return MODE_MULT_CHAN_UP;
 848
 849         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 850                 return MODE_MULT_CHAN_DOWN;
 851
 852         printk(KERN_ERR "ni_labpc: bug! this should never happen\n");
 853
 854         return 0;
 855 }
 856
 857 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 858                                      const struct comedi_cmd *cmd)
 859 {
 860         int mode, channel, range, aref, i;
 861
 862         if (cmd->chanlist == NULL)
 863                 return 0;
 864
 865         mode = labpc_ai_scan_mode(cmd);
 866
 867         if (mode == MODE_SINGLE_CHAN)
 868                 return 0;
 869
 870         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 871                 if (cmd->chanlist_len > 0xff) {
 872                         comedi_error(dev,
 873                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 874                         return 1;
 875                 }
 876         }
 877
 878         channel = CR_CHAN(cmd->chanlist[0]);
 879         range = CR_RANGE(cmd->chanlist[0]);
 880         aref = CR_AREF(cmd->chanlist[0]);
 881
 882         for (i = 0; i < cmd->chanlist_len; i++) {
 883
 884                 switch (mode) {
 885                 case MODE_SINGLE_CHAN_INTERVAL:
 886                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 887                                 comedi_error(dev,
 888                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 889                                 return 1;
 890                         }
 891                         break;
 892                 case MODE_MULT_CHAN_UP:
 893                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 894                                 comedi_error(dev,
 895                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 896                                 return 1;
 897                         }
 898                         break;
 899                 case MODE_MULT_CHAN_DOWN:
 900                         if (CR_CHAN(cmd->chanlist[i]) !=
 901                             cmd->chanlist_len - i - 1) {
 902                                 comedi_error(dev,
 903                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 904                                 return 1;
 905                         }
 906                         break;
 907                 default:
 908                         printk(KERN_ERR "ni_labpc: bug! in chanlist check\n");
 909                         return 1;
 910                         break;
 911                 }
 912
 913                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 914                         comedi_error(dev,
 915                                      "entries in chanlist must all have the same range\n");
 916                         return 1;
 917                 }
 918
 919                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 920                         comedi_error(dev,
 921                                      "entries in chanlist must all have the same reference\n");
 922                         return 1;
 923                 }
 924         }
 925
 926         return 0;
 927 }
 928
 929 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd)
 930 {
 931         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 932                 return 1;
 933
 934         if (cmd->scan_begin_src == TRIG_FOLLOW)
 935                 return 1;
 936
 937         return 0;
 938 }
 939
 940 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd)
 941 {
 942         if (cmd->convert_src != TRIG_TIMER)
 943                 return 0;
 944
 945         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 946             cmd->scan_begin_src == TRIG_TIMER)
 947                 return cmd->scan_begin_arg;
 948
 949         return cmd->convert_arg;
 950 }
 951
 952 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd, unsigned int ns)
 953 {
 954         if (cmd->convert_src != TRIG_TIMER)
 955                 return;
 956
 957         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 958             cmd->scan_begin_src == TRIG_TIMER) {
 959                 cmd->scan_begin_arg = ns;
 960                 if (cmd->convert_arg > cmd->scan_begin_arg)
 961                         cmd->convert_arg = cmd->scan_begin_arg;
 962         } else
 963                 cmd->convert_arg = ns;
 964 }
 965
 966 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd)
 967 {
 968         if (cmd->scan_begin_src != TRIG_TIMER)
 969                 return 0;
 970
 971         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 972             cmd->convert_src == TRIG_TIMER)
 973                 return 0;
 974
 975         return cmd->scan_begin_arg;
 976 }
 977
 978 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd, unsigned int ns)
 979 {
 980         if (cmd->scan_begin_src != TRIG_TIMER)
 981                 return;
 982
 983         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 984             cmd->convert_src == TRIG_TIMER)
 985                 return;
 986
 987         cmd->scan_begin_arg = ns;
 988 }
 989
 990 static int labpc_ai_cmdtest(struct comedi_device *dev,
 991                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 992 {
 993         int err = 0;
 994         int tmp, tmp2;
 995         int stop_mask;
 996
 997         /* step 1: make sure trigger sources are trivially valid */
 998
 999         tmp = cmd->start_src;
1000         cmd->start_src &= TRIG_NOW | TRIG_EXT;
1001         if (!cmd->start_src || tmp != cmd->start_src)
1002                 err++;
1003
1004         tmp = cmd->scan_begin_src;
1005         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
1006         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
1007                 err++;
1008
1009         tmp = cmd->convert_src;
1010         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
1011         if (!cmd->convert_src || tmp != cmd->convert_src)
1012                 err++;
1013
1014         tmp = cmd->scan_end_src;
1015         cmd->scan_end_src &= TRIG_COUNT;
1016         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
1017                 err++;
1018
1019         tmp = cmd->stop_src;
1020         stop_mask = TRIG_COUNT | TRIG_NONE;
1021         if (thisboard->register_layout == labpc_1200_layout)
1022                 stop_mask |= TRIG_EXT;
1023         cmd->stop_src &= stop_mask;
1024         if (!cmd->stop_src || tmp != cmd->stop_src)
1025                 err++;
1026
1027         if (err)
1028                 return 1;
1029
1030         /* step 2: make sure trigger sources are unique and mutually compatible */
1031
1032         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
1033                 err++;
1034         if (cmd->scan_begin_src != TRIG_TIMER &&
1035             cmd->scan_begin_src != TRIG_FOLLOW &&
1036             cmd->scan_begin_src != TRIG_EXT)
1037                 err++;
1038         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
1039                 err++;
1040         if (cmd->stop_src != TRIG_COUNT &&
1041             cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
1042                 err++;
1043
1044         /* can't have external stop and start triggers at once */
1045         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
1046                 err++;
1047
1048         if (err)
1049                 return 2;
1050
1051         /* step 3: make sure arguments are trivially compatible */
1052
1053         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
1054                 cmd->start_arg = 0;
1055                 err++;
1056         }
1057
1058         if (!cmd->chanlist_len)
1059                 err++;
1060
1061         if (cmd->scan_end_arg != cmd->chanlist_len) {
1062                 cmd->scan_end_arg = cmd->chanlist_len;
1063                 err++;
1064         }
1065
1066         if (cmd->convert_src == TRIG_TIMER) {
1067                 if (cmd->convert_arg < thisboard->ai_speed) {
1068                         cmd->convert_arg = thisboard->ai_speed;
1069                         err++;
1070                 }
1071         }
1072         /* make sure scan timing is not too fast */
1073         if (cmd->scan_begin_src == TRIG_TIMER) {
1074                 if (cmd->convert_src == TRIG_TIMER &&
1075                     cmd->scan_begin_arg <
1076                     cmd->convert_arg * cmd->chanlist_len) {
1077                         cmd->scan_begin_arg =
1078                             cmd->convert_arg * cmd->chanlist_len;
1079                         err++;
1080                 }
1081                 if (cmd->scan_begin_arg <
1082                     thisboard->ai_speed * cmd->chanlist_len) {
1083                         cmd->scan_begin_arg =
1084                             thisboard->ai_speed * cmd->chanlist_len;
1085                         err++;
1086                 }
1087         }
1088         /* stop source */
1089         switch (cmd->stop_src) {
1090         case TRIG_COUNT:
1091                 if (!cmd->stop_arg) {
1092                         cmd->stop_arg = 1;
1093                         err++;
1094                 }
1095                 break;
1096         case TRIG_NONE:
1097                 if (cmd->stop_arg != 0) {
1098                         cmd->stop_arg = 0;
1099                         err++;
1100                 }
1101                 break;
1102                 /*
1103                  * TRIG_EXT doesn't care since it doesn't
1104                  * trigger off a numbered channel
1105                  */
1106         default:
1107                 break;
1108         }
1109
1110         if (err)
1111                 return 3;
1112
1113         /* step 4: fix up any arguments */
1114
1115         tmp = cmd->convert_arg;
1116         tmp2 = cmd->scan_begin_arg;
1117         labpc_adc_timing(dev, cmd);
1118         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1119                 err++;
1120
1121         if (err)
1122                 return 4;
1123
1124         if (labpc_ai_chanlist_invalid(dev, cmd))
1125                 return 5;
1126
1127         return 0;
1128 }
1129
1130 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1131 {
1132         int channel, range, aref;
1133         unsigned long irq_flags;
1134         int ret;
1135         struct comedi_async *async = s->async;
1136         struct comedi_cmd *cmd = &async->cmd;
1137         enum transfer_type xfer;
1138         unsigned long flags;
1139
1140         if (!dev->irq) {
1141                 comedi_error(dev, "no irq assigned, cannot perform command");
1142                 return -1;
1143         }
1144
1145         range = CR_RANGE(cmd->chanlist[0]);
1146         aref = CR_AREF(cmd->chanlist[0]);
1147
1148         /* make sure board is disabled before setting up aquisition */
1149         spin_lock_irqsave(&dev->spinlock, flags);
1150         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1151         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1152         spin_unlock_irqrestore(&dev->spinlock, flags);
1153
1154         devpriv->command3_bits = 0;
1155         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1156
1157         /*  initialize software conversion count */
1158         if (cmd->stop_src == TRIG_COUNT)
1159                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1160
1161         /*  setup hardware conversion counter */
1162         if (cmd->stop_src == TRIG_EXT) {
1163                 /*
1164                  * load counter a1 with count of 3
1165                  * (pc+ manual says this is minimum allowed) using mode 0
1166                  */
1167                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1168                                          1, 3, 0);
1169                 if (ret < 0) {
1170                         comedi_error(dev, "error loading counter a1");
1171                         return -1;
1172                 }
1173         } else                  /*
1174                                  * otherwise, just put a1 in mode 0
1175                                  * with no count to set its output low
1176                                  */
1177                 devpriv->write_byte(INIT_A1_BITS,
1178                                     dev->iobase + COUNTER_A_CONTROL_REG);
1179
1180         /*  figure out what method we will use to transfer data */
1181         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
1182                 /*
1183                  * dma unsafe at RT priority,
1184                  * and too much setup time for TRIG_WAKE_EOS for
1185                  */
1186             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1187             /*  only available on the isa boards */
1188             thisboard->bustype == isa_bustype) {
1189                 xfer = isa_dma_transfer;
1190                 /* pc-plus has no fifo-half full interrupt */
1191         } else if (thisboard->register_layout == labpc_1200_layout &&
1192                    /*  wake-end-of-scan should interrupt on fifo not empty */
1193                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1194                    /*  make sure we are taking more than just a few points */
1195                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1196                 xfer = fifo_half_full_transfer;
1197         } else
1198                 xfer = fifo_not_empty_transfer;
1199         devpriv->current_transfer = xfer;
1200
1201         /*  setup command6 register for 1200 boards */
1202         if (thisboard->register_layout == labpc_1200_layout) {
1203                 /*  reference inputs to ground or common? */
1204                 if (aref != AREF_GROUND)
1205                         devpriv->command6_bits |= ADC_COMMON_BIT;
1206                 else
1207                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1208                 /*  bipolar or unipolar range? */
1209                 if (thisboard->ai_range_is_unipolar[range])
1210                         devpriv->command6_bits |= ADC_UNIP_BIT;
1211                 else
1212                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1213                 /*  interrupt on fifo half full? */
1214                 if (xfer == fifo_half_full_transfer)
1215                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1216                 else
1217                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1218                 /*  enable interrupt on counter a1 terminal count? */
1219                 if (cmd->stop_src == TRIG_EXT)
1220                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1221                 else
1222                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1223                 /*  are we scanning up or down through channels? */
1224                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1225                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1226                 else
1227                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1228                 /*  write to register */
1229                 devpriv->write_byte(devpriv->command6_bits,
1230                                     dev->iobase + COMMAND6_REG);
1231         }
1232
1233         /* setup channel list, etc (command1 register) */
1234         devpriv->command1_bits = 0;
1235         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1236                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1237         else
1238                 channel = CR_CHAN(cmd->chanlist[0]);
1239         /* munge channel bits for differential / scan disabled mode */
1240         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1241                 channel *= 2;
1242         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1243         devpriv->command1_bits |= thisboard->ai_range_code[range];
1244         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1245         /* manual says to set scan enable bit on second pass */
1246         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1247             labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1248                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1249                 /* need a brief delay before enabling scan, or scan
1250                  * list will get screwed when you switch
1251                  * between scan up to scan down mode - dunno why */
1252                 udelay(1);
1253                 devpriv->write_byte(devpriv->command1_bits,
1254                                     dev->iobase + COMMAND1_REG);
1255         }
1256         /*  setup any external triggering/pacing (command4 register) */
1257         devpriv->command4_bits = 0;
1258         if (cmd->convert_src != TRIG_EXT)
1259                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1260         /* XXX should discard first scan when using interval scanning
1261          * since manual says it is not synced with scan clock */
1262         if (labpc_use_continuous_mode(cmd) == 0) {
1263                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1264                 if (cmd->scan_begin_src == TRIG_EXT)
1265                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1266         }
1267         /*  single-ended/differential */
1268         if (aref == AREF_DIFF)
1269                 devpriv->command4_bits |= ADC_DIFF_BIT;
1270         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1271
1272         devpriv->write_byte(cmd->chanlist_len,
1273                             dev->iobase + INTERVAL_COUNT_REG);
1274         /*  load count */
1275         devpriv->write_byte(INTERVAL_LOAD_BITS,
1276                             dev->iobase + INTERVAL_LOAD_REG);
1277
1278         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1279                 /*  set up pacing */
1280                 labpc_adc_timing(dev, cmd);
1281                 /*  load counter b0 in mode 3 */
1282                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1283                                          0, devpriv->divisor_b0, 3);
1284                 if (ret < 0) {
1285                         comedi_error(dev, "error loading counter b0");
1286                         return -1;
1287                 }
1288         }
1289         /*  set up conversion pacing */
1290         if (labpc_ai_convert_period(cmd)) {
1291                 /*  load counter a0 in mode 2 */
1292                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1293                                          0, devpriv->divisor_a0, 2);
1294                 if (ret < 0) {
1295                         comedi_error(dev, "error loading counter a0");
1296                         return -1;
1297                 }
1298         } else
1299                 devpriv->write_byte(INIT_A0_BITS,
1300                                     dev->iobase + COUNTER_A_CONTROL_REG);
1301
1302         /*  set up scan pacing */
1303         if (labpc_ai_scan_period(cmd)) {
1304                 /*  load counter b1 in mode 2 */
1305                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1306                                          1, devpriv->divisor_b1, 2);
1307                 if (ret < 0) {
1308                         comedi_error(dev, "error loading counter b1");
1309                         return -1;
1310                 }
1311         }
1312
1313         labpc_clear_adc_fifo(dev);
1314
1315         /*  set up dma transfer */
1316         if (xfer == isa_dma_transfer) {
1317                 irq_flags = claim_dma_lock();
1318                 disable_dma(devpriv->dma_chan);
1319                 /* clear flip-flop to make sure 2-byte registers for
1320                  * count and address get set correctly */
1321                 clear_dma_ff(devpriv->dma_chan);
1322                 set_dma_addr(devpriv->dma_chan,
1323                              virt_to_bus(devpriv->dma_buffer));
1324                 /*  set appropriate size of transfer */
1325                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1326                 if (cmd->stop_src == TRIG_COUNT &&
1327                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1328                         devpriv->dma_transfer_size =
1329                             devpriv->count * sample_size;
1330                 }
1331                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1332                 enable_dma(devpriv->dma_chan);
1333                 release_dma_lock(irq_flags);
1334                 /*  enable board's dma */
1335                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1336         } else
1337                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1338
1339         /*  enable error interrupts */
1340         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1341         /*  enable fifo not empty interrupt? */
1342         if (xfer == fifo_not_empty_transfer)
1343                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1344         else
1345                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1346         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1347
1348         /*  startup aquisition */
1349
1350         /*  command2 reg */
1351         /*  use 2 cascaded counters for pacing */
1352         spin_lock_irqsave(&dev->spinlock, flags);
1353         devpriv->command2_bits |= CASCADE_BIT;
1354         switch (cmd->start_src) {
1355         case TRIG_EXT:
1356                 devpriv->command2_bits |= HWTRIG_BIT;
1357                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1358                 break;
1359         case TRIG_NOW:
1360                 devpriv->command2_bits |= SWTRIG_BIT;
1361                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1362                 break;
1363         default:
1364                 comedi_error(dev, "bug with start_src");
1365                 return -1;
1366                 break;
1367         }
1368         switch (cmd->stop_src) {
1369         case TRIG_EXT:
1370                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1371                 break;
1372         case TRIG_COUNT:
1373         case TRIG_NONE:
1374                 break;
1375         default:
1376                 comedi_error(dev, "bug with stop_src");
1377                 return -1;
1378         }
1379         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1380         spin_unlock_irqrestore(&dev->spinlock, flags);
1381
1382         return 0;
1383 }
1384
1385 /* interrupt service routine */
1386 static irqreturn_t labpc_interrupt(int irq, void *d)
1387 {
1388         struct comedi_device *dev = d;
1389         struct comedi_subdevice *s = dev->read_subdev;
1390         struct comedi_async *async;
1391         struct comedi_cmd *cmd;
1392
1393         if (dev->attached == 0) {
1394                 comedi_error(dev, "premature interrupt");
1395                 return IRQ_HANDLED;
1396         }
1397
1398         async = s->async;
1399         cmd = &async->cmd;
1400         async->events = 0;
1401
1402         /* read board status */
1403         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1404         if (thisboard->register_layout == labpc_1200_layout)
1405                 devpriv->status2_bits =
1406                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1407
1408         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1409                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1410             && (devpriv->status2_bits & A1_TC_BIT) == 0
1411             && (devpriv->status2_bits & FNHF_BIT)) {
1412                 return IRQ_NONE;
1413         }
1414
1415         if (devpriv->status1_bits & OVERRUN_BIT) {
1416                 /* clear error interrupt */
1417                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1418                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1419                 comedi_event(dev, s);
1420                 comedi_error(dev, "overrun");
1421                 return IRQ_HANDLED;
1422         }
1423
1424         if (devpriv->current_transfer == isa_dma_transfer) {
1425                 /*
1426                  * if a dma terminal count of external stop trigger
1427                  * has occurred
1428                  */
1429                 if (devpriv->status1_bits & DMATC_BIT ||
1430                     (thisboard->register_layout == labpc_1200_layout
1431                      && devpriv->status2_bits & A1_TC_BIT)) {
1432                         handle_isa_dma(dev);
1433                 }
1434         } else
1435                 labpc_drain_fifo(dev);
1436
1437         if (devpriv->status1_bits & TIMER_BIT) {
1438                 comedi_error(dev, "handled timer interrupt?");
1439                 /*  clear it */
1440                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1441         }
1442
1443         if (devpriv->status1_bits & OVERFLOW_BIT) {
1444                 /*  clear error interrupt */
1445                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1446                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1447                 comedi_event(dev, s);
1448                 comedi_error(dev, "overflow");
1449                 return IRQ_HANDLED;
1450         }
1451         /*  handle external stop trigger */
1452         if (cmd->stop_src == TRIG_EXT) {
1453                 if (devpriv->status2_bits & A1_TC_BIT) {
1454                         labpc_drain_dregs(dev);
1455                         labpc_cancel(dev, s);
1456                         async->events |= COMEDI_CB_EOA;
1457                 }
1458         }
1459
1460         /* TRIG_COUNT end of acquisition */
1461         if (cmd->stop_src == TRIG_COUNT) {
1462                 if (devpriv->count == 0) {
1463                         labpc_cancel(dev, s);
1464                         async->events |= COMEDI_CB_EOA;
1465                 }
1466         }
1467
1468         comedi_event(dev, s);
1469         return IRQ_HANDLED;
1470 }
1471
1472 /* read all available samples from ai fifo */
1473 static int labpc_drain_fifo(struct comedi_device *dev)
1474 {
1475         unsigned int lsb, msb;
1476         short data;
1477         struct comedi_async *async = dev->read_subdev->async;
1478         const int timeout = 10000;
1479         unsigned int i;
1480
1481         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1482
1483         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1484              i++) {
1485                 /*  quit if we have all the data we want */
1486                 if (async->cmd.stop_src == TRIG_COUNT) {
1487                         if (devpriv->count == 0)
1488                                 break;
1489                         devpriv->count--;
1490                 }
1491                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1492                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1493                 data = (msb << 8) | lsb;
1494                 cfc_write_to_buffer(dev->read_subdev, data);
1495                 devpriv->status1_bits =
1496                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1497         }
1498         if (i == timeout) {
1499                 comedi_error(dev, "ai timeout, fifo never empties");
1500                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1501                 return -1;
1502         }
1503
1504         return 0;
1505 }
1506
1507 static void labpc_drain_dma(struct comedi_device *dev)
1508 {
1509         struct comedi_subdevice *s = dev->read_subdev;
1510         struct comedi_async *async = s->async;
1511         int status;
1512         unsigned long flags;
1513         unsigned int max_points, num_points, residue, leftover;
1514         int i;
1515
1516         status = devpriv->status1_bits;
1517
1518         flags = claim_dma_lock();
1519         disable_dma(devpriv->dma_chan);
1520         /* clear flip-flop to make sure 2-byte registers for
1521          * count and address get set correctly */
1522         clear_dma_ff(devpriv->dma_chan);
1523
1524         /*  figure out how many points to read */
1525         max_points = devpriv->dma_transfer_size / sample_size;
1526         /* residue is the number of points left to be done on the dma
1527          * transfer.  It should always be zero at this point unless
1528          * the stop_src is set to external triggering.
1529          */
1530         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1531         num_points = max_points - residue;
1532         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1533                 num_points = devpriv->count;
1534
1535         /*  figure out how many points will be stored next time */
1536         leftover = 0;
1537         if (async->cmd.stop_src != TRIG_COUNT) {
1538                 leftover = devpriv->dma_transfer_size / sample_size;
1539         } else if (devpriv->count > num_points) {
1540                 leftover = devpriv->count - num_points;
1541                 if (leftover > max_points)
1542                         leftover = max_points;
1543         }
1544
1545         /* write data to comedi buffer */
1546         for (i = 0; i < num_points; i++)
1547                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1548
1549         if (async->cmd.stop_src == TRIG_COUNT)
1550                 devpriv->count -= num_points;
1551
1552         /*  set address and count for next transfer */
1553         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1554         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1555         release_dma_lock(flags);
1556
1557         async->events |= COMEDI_CB_BLOCK;
1558 }
1559
1560 static void handle_isa_dma(struct comedi_device *dev)
1561 {
1562         labpc_drain_dma(dev);
1563
1564         enable_dma(devpriv->dma_chan);
1565
1566         /*  clear dma tc interrupt */
1567         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1568 }
1569
1570 /* makes sure all data acquired by board is transfered to comedi (used
1571  * when aquisition is terminated by stop_src == TRIG_EXT). */
1572 static void labpc_drain_dregs(struct comedi_device *dev)
1573 {
1574         if (devpriv->current_transfer == isa_dma_transfer)
1575                 labpc_drain_dma(dev);
1576
1577         labpc_drain_fifo(dev);
1578 }
1579
1580 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1581                           struct comedi_insn *insn, unsigned int *data)
1582 {
1583         int i, n;
1584         int chan, range;
1585         int lsb, msb;
1586         int timeout = 1000;
1587         unsigned long flags;
1588
1589         /*  disable timed conversions */
1590         spin_lock_irqsave(&dev->spinlock, flags);
1591         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1592         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1593         spin_unlock_irqrestore(&dev->spinlock, flags);
1594
1595         /*  disable interrupt generation and dma */
1596         devpriv->command3_bits = 0;
1597         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1598
1599         /* set gain and channel */
1600         devpriv->command1_bits = 0;
1601         chan = CR_CHAN(insn->chanspec);
1602         range = CR_RANGE(insn->chanspec);
1603         devpriv->command1_bits |= thisboard->ai_range_code[range];
1604         /* munge channel bits for differential/scan disabled mode */
1605         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1606                 chan *= 2;
1607         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1608         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1609
1610         /* setup command6 register for 1200 boards */
1611         if (thisboard->register_layout == labpc_1200_layout) {
1612                 /*  reference inputs to ground or common? */
1613                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1614                         devpriv->command6_bits |= ADC_COMMON_BIT;
1615                 else
1616                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1617                 /* bipolar or unipolar range? */
1618                 if (thisboard->ai_range_is_unipolar[range])
1619                         devpriv->command6_bits |= ADC_UNIP_BIT;
1620                 else
1621                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1622                 /* don't interrupt on fifo half full */
1623                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1624                 /* don't enable interrupt on counter a1 terminal count? */
1625                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1626                 /* write to register */
1627                 devpriv->write_byte(devpriv->command6_bits,
1628                                     dev->iobase + COMMAND6_REG);
1629         }
1630         /* setup command4 register */
1631         devpriv->command4_bits = 0;
1632         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1633         /* single-ended/differential */
1634         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1635                 devpriv->command4_bits |= ADC_DIFF_BIT;
1636         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1637
1638         /*
1639          * initialize pacer counter output to make sure it doesn't
1640          * cause any problems
1641          */
1642         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1643
1644         labpc_clear_adc_fifo(dev);
1645
1646         for (n = 0; n < insn->n; n++) {
1647                 /* trigger conversion */
1648                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1649
1650                 for (i = 0; i < timeout; i++) {
1651                         if (devpriv->read_byte(dev->iobase +
1652                                                STATUS1_REG) & DATA_AVAIL_BIT)
1653                                 break;
1654                         udelay(1);
1655                 }
1656                 if (i == timeout) {
1657                         comedi_error(dev, "timeout");
1658                         return -ETIME;
1659                 }
1660                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1661                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1662                 data[n] = (msb << 8) | lsb;
1663         }
1664
1665         return n;
1666 }
1667
1668 /* analog output insn */
1669 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1670                           struct comedi_insn *insn, unsigned int *data)
1671 {
1672         int channel, range;
1673         unsigned long flags;
1674         int lsb, msb;
1675
1676         channel = CR_CHAN(insn->chanspec);
1677
1678         /* turn off pacing of analog output channel */
1679         /* note: hardware bug in daqcard-1200 means pacing cannot
1680          * be independently enabled/disabled for its the two channels */
1681         spin_lock_irqsave(&dev->spinlock, flags);
1682         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1683         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1684         spin_unlock_irqrestore(&dev->spinlock, flags);
1685
1686         /* set range */
1687         if (thisboard->register_layout == labpc_1200_layout) {
1688                 range = CR_RANGE(insn->chanspec);
1689                 if (range & AO_RANGE_IS_UNIPOLAR)
1690                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1691                 else
1692                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1693                 /*  write to register */
1694                 devpriv->write_byte(devpriv->command6_bits,
1695                                     dev->iobase + COMMAND6_REG);
1696         }
1697         /* send data */
1698         lsb = data[0] & 0xff;
1699         msb = (data[0] >> 8) & 0xff;
1700         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1701         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1702
1703         /* remember value for readback */
1704         devpriv->ao_value[channel] = data[0];
1705
1706         return 1;
1707 }
1708
1709 /* analog output readback insn */
1710 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1711                           struct comedi_insn *insn, unsigned int *data)
1712 {
1713         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1714
1715         return 1;
1716 }
1717
1718 static int labpc_calib_read_insn(struct comedi_device *dev,
1719                                  struct comedi_subdevice *s,
1720                                  struct comedi_insn *insn, unsigned int *data)
1721 {
1722         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1723
1724         return 1;
1725 }
1726
1727 static int labpc_calib_write_insn(struct comedi_device *dev,
1728                                   struct comedi_subdevice *s,
1729                                   struct comedi_insn *insn, unsigned int *data)
1730 {
1731         int channel = CR_CHAN(insn->chanspec);
1732
1733         write_caldac(dev, channel, data[0]);
1734         return 1;
1735 }
1736
1737 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1738                                   struct comedi_subdevice *s,
1739                                   struct comedi_insn *insn, unsigned int *data)
1740 {
1741         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1742
1743         return 1;
1744 }
1745
1746 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1747                                    struct comedi_subdevice *s,
1748                                    struct comedi_insn *insn, unsigned int *data)
1749 {
1750         int channel = CR_CHAN(insn->chanspec);
1751         int ret;
1752
1753         /*  only allow writes to user area of eeprom */
1754         if (channel < 16 || channel > 127) {
1755                 printk
1756                     ("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1757                 return -EINVAL;
1758         }
1759
1760         ret = labpc_eeprom_write(dev, channel, data[0]);
1761         if (ret < 0)
1762                 return ret;
1763
1764         return 1;
1765 }
1766
1767 /* utility function that suggests a dma transfer size in bytes */
1768 static unsigned int labpc_suggest_transfer_size(struct comedi_cmd cmd)
1769 {
1770         unsigned int size;
1771         unsigned int freq;
1772
1773         if (cmd.convert_src == TRIG_TIMER)
1774                 freq = 1000000000 / cmd.convert_arg;
1775         /* return some default value */
1776         else
1777                 freq = 0xffffffff;
1778
1779         /* make buffer fill in no more than 1/3 second */
1780         size = (freq / 3) * sample_size;
1781
1782         /* set a minimum and maximum size allowed */
1783         if (size > dma_buffer_size)
1784                 size = dma_buffer_size - dma_buffer_size % sample_size;
1785         else if (size < sample_size)
1786                 size = sample_size;
1787
1788         return size;
1789 }
1790
1791 /* figures out what counter values to use based on command */
1792 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
1793 {
1794         /* max value for 16 bit counter in mode 2 */
1795         const int max_counter_value = 0x10000;
1796         /* min value for 16 bit counter in mode 2 */
1797         const int min_counter_value = 2;
1798         unsigned int base_period;
1799
1800         /*
1801          * if both convert and scan triggers are TRIG_TIMER, then they
1802          * both rely on counter b0
1803          */
1804         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1805                 /*
1806                  * pick the lowest b0 divisor value we can (for maximum input
1807                  * clock speed on convert and scan counters)
1808                  */
1809                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1810                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1811                 if (devpriv->divisor_b0 < min_counter_value)
1812                         devpriv->divisor_b0 = min_counter_value;
1813                 if (devpriv->divisor_b0 > max_counter_value)
1814                         devpriv->divisor_b0 = max_counter_value;
1815
1816                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1817
1818                 /*  set a0 for conversion frequency and b1 for scan frequency */
1819                 switch (cmd->flags & TRIG_ROUND_MASK) {
1820                 default:
1821                 case TRIG_ROUND_NEAREST:
1822                         devpriv->divisor_a0 =
1823                             (labpc_ai_convert_period(cmd) +
1824                              (base_period / 2)) / base_period;
1825                         devpriv->divisor_b1 =
1826                             (labpc_ai_scan_period(cmd) +
1827                              (base_period / 2)) / base_period;
1828                         break;
1829                 case TRIG_ROUND_UP:
1830                         devpriv->divisor_a0 =
1831                             (labpc_ai_convert_period(cmd) + (base_period -
1832                                                              1)) / base_period;
1833                         devpriv->divisor_b1 =
1834                             (labpc_ai_scan_period(cmd) + (base_period -
1835                                                           1)) / base_period;
1836                         break;
1837                 case TRIG_ROUND_DOWN:
1838                         devpriv->divisor_a0 =
1839                             labpc_ai_convert_period(cmd) / base_period;
1840                         devpriv->divisor_b1 =
1841                             labpc_ai_scan_period(cmd) / base_period;
1842                         break;
1843                 }
1844                 /*  make sure a0 and b1 values are acceptable */
1845                 if (devpriv->divisor_a0 < min_counter_value)
1846                         devpriv->divisor_a0 = min_counter_value;
1847                 if (devpriv->divisor_a0 > max_counter_value)
1848                         devpriv->divisor_a0 = max_counter_value;
1849                 if (devpriv->divisor_b1 < min_counter_value)
1850                         devpriv->divisor_b1 = min_counter_value;
1851                 if (devpriv->divisor_b1 > max_counter_value)
1852                         devpriv->divisor_b1 = max_counter_value;
1853                 /*  write corrected timings to command */
1854                 labpc_set_ai_convert_period(cmd,
1855                                             base_period * devpriv->divisor_a0);
1856                 labpc_set_ai_scan_period(cmd,
1857                                          base_period * devpriv->divisor_b1);
1858                 /*
1859                  * if only one TRIG_TIMER is used, we can employ the generic
1860                  * cascaded timing functions
1861                  */
1862         } else if (labpc_ai_scan_period(cmd)) {
1863                 unsigned int scan_period;
1864
1865                 scan_period = labpc_ai_scan_period(cmd);
1866                 /*
1867                  * calculate cascaded counter values
1868                  * that give desired scan timing
1869                  */
1870                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1871                                                &(devpriv->divisor_b1),
1872                                                &(devpriv->divisor_b0),
1873                                                &scan_period,
1874                                                cmd->flags & TRIG_ROUND_MASK);
1875                 labpc_set_ai_scan_period(cmd, scan_period);
1876         } else if (labpc_ai_convert_period(cmd)) {
1877                 unsigned int convert_period;
1878
1879                 convert_period = labpc_ai_convert_period(cmd);
1880                 /*
1881                  * calculate cascaded counter values
1882                  * that give desired conversion timing
1883                  */
1884                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1885                                                &(devpriv->divisor_a0),
1886                                                &(devpriv->divisor_b0),
1887                                                &convert_period,
1888                                                cmd->flags & TRIG_ROUND_MASK);
1889                 labpc_set_ai_convert_period(cmd, convert_period);
1890         }
1891 }
1892
1893 static int labpc_dio_mem_callback(int dir, int port, int data,
1894                                   unsigned long iobase)
1895 {
1896         if (dir) {
1897                 writeb(data, (void *)(iobase + port));
1898                 return 0;
1899         } else {
1900                 return readb((void *)(iobase + port));
1901         }
1902 }
1903
1904 /* lowlevel write to eeprom/dac */
1905 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1906                              unsigned int value_width)
1907 {
1908         int i;
1909
1910         for (i = 1; i <= value_width; i++) {
1911                 /*  clear serial clock */
1912                 devpriv->command5_bits &= ~SCLOCK_BIT;
1913                 /*  send bits most significant bit first */
1914                 if (value & (1 << (value_width - i)))
1915                         devpriv->command5_bits |= SDATA_BIT;
1916                 else
1917                         devpriv->command5_bits &= ~SDATA_BIT;
1918                 udelay(1);
1919                 devpriv->write_byte(devpriv->command5_bits,
1920                                     dev->iobase + COMMAND5_REG);
1921                 /*  set clock to load bit */
1922                 devpriv->command5_bits |= SCLOCK_BIT;
1923                 udelay(1);
1924                 devpriv->write_byte(devpriv->command5_bits,
1925                                     dev->iobase + COMMAND5_REG);
1926         }
1927 }
1928
1929 /* lowlevel read from eeprom */
1930 static unsigned int labpc_serial_in(struct comedi_device *dev)
1931 {
1932         unsigned int value = 0;
1933         int i;
1934         const int value_width = 8;      /*  number of bits wide values are */
1935
1936         for (i = 1; i <= value_width; i++) {
1937                 /*  set serial clock */
1938                 devpriv->command5_bits |= SCLOCK_BIT;
1939                 udelay(1);
1940                 devpriv->write_byte(devpriv->command5_bits,
1941                                     dev->iobase + COMMAND5_REG);
1942                 /*  clear clock bit */
1943                 devpriv->command5_bits &= ~SCLOCK_BIT;
1944                 udelay(1);
1945                 devpriv->write_byte(devpriv->command5_bits,
1946                                     dev->iobase + COMMAND5_REG);
1947                 /*  read bits most significant bit first */
1948                 udelay(1);
1949                 devpriv->status2_bits =
1950                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1951                 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1952                         value |= 1 << (value_width - i);
1953         }
1954
1955         return value;
1956 }
1957
1958 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1959                                       unsigned int address)
1960 {
1961         unsigned int value;
1962         /*  bits to tell eeprom to expect a read */
1963         const int read_instruction = 0x3;
1964         /*  8 bit write lengths to eeprom */
1965         const int write_length = 8;
1966
1967         /*  enable read/write to eeprom */
1968         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1969         udelay(1);
1970         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1971         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1972         udelay(1);
1973         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1974
1975         /*  send read instruction */
1976         labpc_serial_out(dev, read_instruction, write_length);
1977         /*  send 8 bit address to read from */
1978         labpc_serial_out(dev, address, write_length);
1979         /*  read result */
1980         value = labpc_serial_in(dev);
1981
1982         /*  disable read/write to eeprom */
1983         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1984         udelay(1);
1985         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1986
1987         return value;
1988 }
1989
1990 static unsigned int labpc_eeprom_write(struct comedi_device *dev,
1991                                        unsigned int address, unsigned int value)
1992 {
1993         const int write_enable_instruction = 0x6;
1994         const int write_instruction = 0x2;
1995         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1996         const int write_in_progress_bit = 0x1;
1997         const int timeout = 10000;
1998         int i;
1999
2000         /*  make sure there isn't already a write in progress */
2001         for (i = 0; i < timeout; i++) {
2002                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
2003                     0)
2004                         break;
2005         }
2006         if (i == timeout) {
2007                 comedi_error(dev, "eeprom write timed out");
2008                 return -ETIME;
2009         }
2010         /*  update software copy of eeprom */
2011         devpriv->eeprom_data[address] = value;
2012
2013         /*  enable read/write to eeprom */
2014         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2015         udelay(1);
2016         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2017         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2018         udelay(1);
2019         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2020
2021         /*  send write_enable instruction */
2022         labpc_serial_out(dev, write_enable_instruction, write_length);
2023         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2024         udelay(1);
2025         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2026
2027         /*  send write instruction */
2028         devpriv->command5_bits |= EEPROM_EN_BIT;
2029         udelay(1);
2030         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2031         labpc_serial_out(dev, write_instruction, write_length);
2032         /*  send 8 bit address to write to */
2033         labpc_serial_out(dev, address, write_length);
2034         /*  write value */
2035         labpc_serial_out(dev, value, write_length);
2036         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2037         udelay(1);
2038         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2039
2040         /*  disable read/write to eeprom */
2041         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2042         udelay(1);
2043         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2044
2045         return 0;
2046 }
2047
2048 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
2049 {
2050         unsigned int value;
2051         const int read_status_instruction = 0x5;
2052         const int write_length = 8;     /*  8 bit write lengths to eeprom */
2053
2054         /*  enable read/write to eeprom */
2055         devpriv->command5_bits &= ~EEPROM_EN_BIT;
2056         udelay(1);
2057         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2058         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
2059         udelay(1);
2060         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2061
2062         /*  send read status instruction */
2063         labpc_serial_out(dev, read_status_instruction, write_length);
2064         /*  read result */
2065         value = labpc_serial_in(dev);
2066
2067         /*  disable read/write to eeprom */
2068         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2069         udelay(1);
2070         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2071
2072         return value;
2073 }
2074
2075 /* writes to 8 bit calibration dacs */
2076 static void write_caldac(struct comedi_device *dev, unsigned int channel,
2077                          unsigned int value)
2078 {
2079         if (value == devpriv->caldac[channel])
2080                 return;
2081         devpriv->caldac[channel] = value;
2082
2083         /*  clear caldac load bit and make sure we don't write to eeprom */
2084         devpriv->command5_bits &=
2085             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2086         udelay(1);
2087         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2088
2089         /*  write 4 bit channel */
2090         labpc_serial_out(dev, channel, 4);
2091         /*  write 8 bit caldac value */
2092         labpc_serial_out(dev, value, 8);
2093
2094         /*  set and clear caldac bit to load caldac value */
2095         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2096         udelay(1);
2097         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2098         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2099         udelay(1);
2100         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2101 }
2102
2103 #ifdef CONFIG_COMEDI_PCI
2104 static int __devinit driver_labpc_pci_probe(struct pci_dev *dev,
2105                                             const struct pci_device_id *ent)
2106 {
2107         return comedi_pci_auto_config(dev, driver_labpc.driver_name);
2108 }
2109
2110 static void __devexit driver_labpc_pci_remove(struct pci_dev *dev)
2111 {
2112         comedi_pci_auto_unconfig(dev);
2113 }
2114
2115 static struct pci_driver driver_labpc_pci_driver = {
2116         .id_table = labpc_pci_table,
2117         .probe = &driver_labpc_pci_probe,
2118         .remove = __devexit_p(&driver_labpc_pci_remove)
2119 };
2120
2121 static int __init driver_labpc_init_module(void)
2122 {
2123         int retval;
2124
2125         retval = comedi_driver_register(&driver_labpc);
2126         if (retval < 0)
2127                 return retval;
2128
2129         driver_labpc_pci_driver.name = (char *)driver_labpc.driver_name;
2130         return pci_register_driver(&driver_labpc_pci_driver);
2131 }
2132
2133 static void __exit driver_labpc_cleanup_module(void)
2134 {
2135         pci_unregister_driver(&driver_labpc_pci_driver);
2136         comedi_driver_unregister(&driver_labpc);
2137 }
2138
2139 module_init(driver_labpc_init_module);
2140 module_exit(driver_labpc_cleanup_module);
2141 #else
2142 static int __init driver_labpc_init_module(void)
2143 {
2144         return comedi_driver_register(&driver_labpc);
2145 }
2146
2147 static void __exit driver_labpc_cleanup_module(void)
2148 {
2149         comedi_driver_unregister(&driver_labpc);
2150 }
2151
2152 module_init(driver_labpc_init_module);
2153 module_exit(driver_labpc_cleanup_module);
2154 #endif
2155
2156 EXPORT_SYMBOL_GPL(labpc_common_attach);
2157 EXPORT_SYMBOL_GPL(labpc_common_detach);
2158 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
2159 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
2160 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
2161
2162 MODULE_AUTHOR("Comedi http://www.comedi.org");
2163 MODULE_DESCRIPTION("Comedi low-level driver");
2164 MODULE_LICENSE("GPL");