drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2  * comedi/drivers/ni_labpc.c
   3  * Driver for National Instruments Lab-PC series boards and compatibles
   4  * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 /*
  22  * Driver: ni_labpc
  23  * Description: National Instruments Lab-PC (& compatibles)
  24  * Devices: (National Instruments) Lab-PC-1200 [lab-pc-1200]
  25  *          (National Instruments) Lab-PC-1200AI [lab-pc-1200ai]
  26  *          (National Instruments) Lab-PC+ [lab-pc+]
  27  * Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  28  * Status: works
  29  *
  30  * Configuration options - ISA boards:
  31  *   [0] - I/O port base address
  32  *   [1] - IRQ (optional, required for timed or externally triggered
  33  *              conversions)
  34  *   [2] - DMA channel (optional)
  35  *
  36  * Tested with lab-pc-1200.  For the older Lab-PC+, not all input
  37  * ranges and analog references will work, the available ranges/arefs
  38  * will depend on how you have configured the jumpers on your board
  39  * (see your owner's manual).
  40  *
  41  * Kernel-level ISA plug-and-play support for the lab-pc-1200 boards
  42  * has not yet been added to the driver, mainly due to the fact that
  43  * I don't know the device id numbers. If you have one of these boards,
  44  * please file a bug report at http://comedi.org/ so I can get the
  45  * necessary information from you.
  46  *
  47  * The 1200 series boards have onboard calibration dacs for correcting
  48  * analog input/output offsets and gains. The proper settings for these
  49  * caldacs are stored on the board's eeprom. To read the caldac values
  50  * from the eeprom and store them into a file that can be then be used
  51  * by comedilib, use the comedi_calibrate program.
  52  *
  53  * The Lab-pc+ has quirky chanlist requirements when scanning multiple
  54  * channels. Multiple channel scan sequence must start at highest channel,
  55  * then decrement down to channel 0. The rest of the cards can scan down
  56  * like lab-pc+ or scan up from channel zero. Chanlists consisting of all
  57  * one channel are also legal, and allow you to pace conversions in bursts.
  58  *
  59  * NI manuals:
  60  * 341309a (labpc-1200 register manual)
  61  * 320502b (lab-pc+)
  62  */
  63
  64 #include <linux/interrupt.h>
  65 #include <linux/slab.h>
  66 #include <linux/io.h>
  67 #include <linux/delay.h>
  68
  69 #include "../comedidev.h"
  70
  71 #include <asm/dma.h>
  72
  73 #include "8253.h"
  74 #include "8255.h"
  75 #include "comedi_fc.h"
  76 #include "ni_labpc.h"
  77
  78 /*
  79  * Register map (all registers are 8-bit)
  80  */
  81 #define STAT1_REG               0x00    /* R: Status 1 reg */
  82 #define STAT1_DAVAIL            (1 << 0)
  83 #define STAT1_OVERRUN           (1 << 1)
  84 #define STAT1_OVERFLOW          (1 << 2)
  85 #define STAT1_CNTINT            (1 << 3)
  86 #define STAT1_GATA0             (1 << 5)
  87 #define STAT1_EXTGATA0          (1 << 6)
  88 #define CMD1_REG                0x00    /* W: Command 1 reg */
  89 #define CMD1_MA(x)              (((x) & 0x7) << 0)
  90 #define CMD1_TWOSCMP            (1 << 3)
  91 #define CMD1_GAIN_MASK          (7 << 4)
  92 #define CMD1_SCANEN             (1 << 7)
  93 #define CMD2_REG                0x01    /* W: Command 2 reg */
  94 #define CMD2_PRETRIG            (1 << 0)
  95 #define CMD2_HWTRIG             (1 << 1)
  96 #define CMD2_SWTRIG             (1 << 2)
  97 #define CMD2_TBSEL              (1 << 3)
  98 #define CMD2_2SDAC0             (1 << 4)
  99 #define CMD2_2SDAC1             (1 << 5)
 100 #define CMD2_LDAC(x)            (1 << (6 + (x)))
 101 #define CMD3_REG                0x02    /* W: Command 3 reg */
 102 #define CMD3_DMAEN              (1 << 0)
 103 #define CMD3_DIOINTEN           (1 << 1)
 104 #define CMD3_DMATCINTEN         (1 << 2)
 105 #define CMD3_CNTINTEN           (1 << 3)
 106 #define CMD3_ERRINTEN           (1 << 4)
 107 #define CMD3_FIFOINTEN          (1 << 5)
 108 #define ADC_START_CONVERT_REG   0x03    /* W: Start Convert reg */
 109 #define DAC_LSB_REG(x)          (0x04 + 2 * (x)) /* W: DAC0/1 LSB reg */
 110 #define DAC_MSB_REG(x)          (0x05 + 2 * (x)) /* W: DAC0/1 MSB reg */
 111 #define ADC_FIFO_CLEAR_REG      0x08    /* W: A/D FIFO Clear reg */
 112 #define ADC_FIFO_REG            0x0a    /* R: A/D FIFO reg */
 113 #define DMATC_CLEAR_REG         0x0a    /* W: DMA Interrupt Clear reg */
 114 #define TIMER_CLEAR_REG         0x0c    /* W: Timer Interrupt Clear reg */
 115 #define CMD6_REG                0x0e    /* W: Command 6 reg */
 116 #define CMD6_NRSE               (1 << 0)
 117 #define CMD6_ADCUNI             (1 << 1)
 118 #define CMD6_DACUNI(x)          (1 << (2 + (x)))
 119 #define CMD6_HFINTEN            (1 << 5)
 120 #define CMD6_DQINTEN            (1 << 6)
 121 #define CMD6_SCANUP             (1 << 7)
 122 #define CMD4_REG                0x0f    /* W: Command 3 reg */
 123 #define CMD4_INTSCAN            (1 << 0)
 124 #define CMD4_EOIRCV             (1 << 1)
 125 #define CMD4_ECLKDRV            (1 << 2)
 126 #define CMD4_SEDIFF             (1 << 3)
 127 #define CMD4_ECLKRCV            (1 << 4)
 128 #define DIO_BASE_REG            0x10    /* R/W: 8255 DIO base reg */
 129 #define COUNTER_A_BASE_REG      0x14    /* R/W: 8253 Counter A base reg */
 130 #define COUNTER_B_BASE_REG      0x18    /* R/W: 8253 Counter B base reg */
 131 #define CMD5_REG                0x1c    /* W: Command 5 reg */
 132 #define CMD5_WRTPRT             (1 << 2)
 133 #define CMD5_DITHEREN           (1 << 3)
 134 #define CMD5_CALDACLD           (1 << 4)
 135 #define CMD5_SCLK               (1 << 5)
 136 #define CMD5_SDATA              (1 << 6)
 137 #define CMD5_EEPROMCS           (1 << 7)
 138 #define STAT2_REG               0x1d    /* R: Status 2 reg */
 139 #define STAT2_PROMOUT           (1 << 0)
 140 #define STAT2_OUTA1             (1 << 1)
 141 #define STAT2_FIFONHF           (1 << 2)
 142 #define INTERVAL_COUNT_REG      0x1e    /* W: Interval Counter Data reg */
 143 #define INTERVAL_STROBE_REG     0x1f    /* W: Interval Counter Strobe reg */
 144
 145 #define LABPC_SIZE              0x20    /* size of ISA io region */
 146 #define LABPC_TIMER_BASE        500     /* 2 MHz master clock */
 147 #define LABPC_ADC_TIMEOUT       1000
 148
 149 enum scan_mode {
 150         MODE_SINGLE_CHAN,
 151         MODE_SINGLE_CHAN_INTERVAL,
 152         MODE_MULT_CHAN_UP,
 153         MODE_MULT_CHAN_DOWN,
 154 };
 155
 156 static const int labpc_plus_ai_gain_bits[] = {
 157         0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 158         0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 159 };
 160
 161 static const struct comedi_lrange range_labpc_plus_ai = {
 162         16, {
 163                 BIP_RANGE(5),
 164                 BIP_RANGE(4),
 165                 BIP_RANGE(2.5),
 166                 BIP_RANGE(1),
 167                 BIP_RANGE(0.5),
 168                 BIP_RANGE(0.25),
 169                 BIP_RANGE(0.1),
 170                 BIP_RANGE(0.05),
 171                 UNI_RANGE(10),
 172                 UNI_RANGE(8),
 173                 UNI_RANGE(5),
 174                 UNI_RANGE(2),
 175                 UNI_RANGE(1),
 176                 UNI_RANGE(0.5),
 177                 UNI_RANGE(0.2),
 178                 UNI_RANGE(0.1)
 179         }
 180 };
 181
 182 const int labpc_1200_ai_gain_bits[] = {
 183         0x00, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 184         0x00, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 185 };
 186 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
 187
 188 const struct comedi_lrange range_labpc_1200_ai = {
 189         14, {
 190                 BIP_RANGE(5),
 191                 BIP_RANGE(2.5),
 192                 BIP_RANGE(1),
 193                 BIP_RANGE(0.5),
 194                 BIP_RANGE(0.25),
 195                 BIP_RANGE(0.1),
 196                 BIP_RANGE(0.05),
 197                 UNI_RANGE(10),
 198                 UNI_RANGE(5),
 199                 UNI_RANGE(2),
 200                 UNI_RANGE(1),
 201                 UNI_RANGE(0.5),
 202                 UNI_RANGE(0.2),
 203                 UNI_RANGE(0.1)
 204         }
 205 };
 206 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
 207
 208 static const struct comedi_lrange range_labpc_ao = {
 209         2, {
 210                 BIP_RANGE(5),
 211                 UNI_RANGE(10)
 212         }
 213 };
 214
 215 /* functions that do inb/outb and readb/writeb so we can use
 216  * function pointers to decide which to use */
 217 static inline unsigned int labpc_inb(unsigned long address)
 218 {
 219         return inb(address);
 220 }
 221
 222 static inline void labpc_outb(unsigned int byte, unsigned long address)
 223 {
 224         outb(byte, address);
 225 }
 226
 227 static inline unsigned int labpc_readb(unsigned long address)
 228 {
 229         return readb((void __iomem *)address);
 230 }
 231
 232 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 233 {
 234         writeb(byte, (void __iomem *)address);
 235 }
 236
 237 #ifdef CONFIG_COMEDI_NI_LABPC_ISA
 238 static const struct labpc_boardinfo labpc_boards[] = {
 239         {
 240                 .name                   = "lab-pc-1200",
 241                 .ai_speed               = 10000,
 242                 .bustype                = isa_bustype,
 243                 .register_layout        = labpc_1200_layout,
 244                 .has_ao                 = 1,
 245                 .ai_range_table         = &range_labpc_1200_ai,
 246                 .ai_range_code          = labpc_1200_ai_gain_bits,
 247                 .ai_scan_up             = 1,
 248         }, {
 249                 .name                   = "lab-pc-1200ai",
 250                 .ai_speed               = 10000,
 251                 .bustype                = isa_bustype,
 252                 .register_layout        = labpc_1200_layout,
 253                 .ai_range_table         = &range_labpc_1200_ai,
 254                 .ai_range_code          = labpc_1200_ai_gain_bits,
 255                 .ai_scan_up             = 1,
 256         }, {
 257                 .name                   = "lab-pc+",
 258                 .ai_speed               = 12000,
 259                 .bustype                = isa_bustype,
 260                 .register_layout        = labpc_plus_layout,
 261                 .has_ao                 = 1,
 262                 .ai_range_table         = &range_labpc_plus_ai,
 263                 .ai_range_code          = labpc_plus_ai_gain_bits,
 264         },
 265 };
 266 #endif
 267
 268 /* size in bytes of dma buffer */
 269 static const int dma_buffer_size = 0xff00;
 270 /* 2 bytes per sample */
 271 static const int sample_size = 2;
 272
 273 static int labpc_counter_load(struct comedi_device *dev,
 274                               unsigned long base_address,
 275                               unsigned int counter_number,
 276                               unsigned int count, unsigned int mode)
 277 {
 278         const struct labpc_boardinfo *board = comedi_board(dev);
 279
 280         if (board->has_mmio)
 281                 return i8254_mm_load((void __iomem *)base_address, 0,
 282                                      counter_number, count, mode);
 283         else
 284                 return i8254_load(base_address, 0, counter_number, count, mode);
 285 }
 286
 287 static int labpc_counter_set_mode(struct comedi_device *dev,
 288                                   unsigned long base_address,
 289                                   unsigned int counter_number,
 290                                   unsigned int mode)
 291 {
 292         const struct labpc_boardinfo *board = comedi_board(dev);
 293
 294         if (board->has_mmio)
 295                 return i8254_mm_set_mode((void __iomem *)base_address, 0,
 296                                          counter_number, mode);
 297         else
 298                 return i8254_set_mode(base_address, 0, counter_number, mode);
 299 }
 300
 301 static bool labpc_range_is_unipolar(struct comedi_subdevice *s,
 302                                     unsigned int range)
 303 {
 304         return s->range_table->range[range].min >= 0;
 305 }
 306
 307 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 308 {
 309         struct labpc_private *devpriv = dev->private;
 310         unsigned long flags;
 311
 312         spin_lock_irqsave(&dev->spinlock, flags);
 313         devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
 314         devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
 315         spin_unlock_irqrestore(&dev->spinlock, flags);
 316
 317         devpriv->cmd3 = 0;
 318         devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
 319
 320         return 0;
 321 }
 322
 323 static void labpc_ai_set_chan_and_gain(struct comedi_device *dev,
 324                                        enum scan_mode mode,
 325                                        unsigned int chan,
 326                                        unsigned int range,
 327                                        unsigned int aref)
 328 {
 329         const struct labpc_boardinfo *board = comedi_board(dev);
 330         struct labpc_private *devpriv = dev->private;
 331
 332         /* munge channel bits for differential/scan disabled mode */
 333         if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
 334             aref == AREF_DIFF)
 335                 chan *= 2;
 336         devpriv->cmd1 = CMD1_MA(chan);
 337         devpriv->cmd1 |= board->ai_range_code[range];
 338
 339         devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
 340 }
 341
 342 static void labpc_setup_cmd6_reg(struct comedi_device *dev,
 343                                  struct comedi_subdevice *s,
 344                                  enum scan_mode mode,
 345                                  enum transfer_type xfer,
 346                                  unsigned int range,
 347                                  unsigned int aref,
 348                                  bool ena_intr)
 349 {
 350         const struct labpc_boardinfo *board = comedi_board(dev);
 351         struct labpc_private *devpriv = dev->private;
 352
 353         if (board->register_layout != labpc_1200_layout)
 354                 return;
 355
 356         /* reference inputs to ground or common? */
 357         if (aref != AREF_GROUND)
 358                 devpriv->cmd6 |= CMD6_NRSE;
 359         else
 360                 devpriv->cmd6 &= ~CMD6_NRSE;
 361
 362         /* bipolar or unipolar range? */
 363         if (labpc_range_is_unipolar(s, range))
 364                 devpriv->cmd6 |= CMD6_ADCUNI;
 365         else
 366                 devpriv->cmd6 &= ~CMD6_ADCUNI;
 367
 368         /*  interrupt on fifo half full? */
 369         if (xfer == fifo_half_full_transfer)
 370                 devpriv->cmd6 |= CMD6_HFINTEN;
 371         else
 372                 devpriv->cmd6 &= ~CMD6_HFINTEN;
 373
 374         /* enable interrupt on counter a1 terminal count? */
 375         if (ena_intr)
 376                 devpriv->cmd6 |= CMD6_DQINTEN;
 377         else
 378                 devpriv->cmd6 &= ~CMD6_DQINTEN;
 379
 380         /* are we scanning up or down through channels? */
 381         if (mode == MODE_MULT_CHAN_UP)
 382                 devpriv->cmd6 |= CMD6_SCANUP;
 383         else
 384                 devpriv->cmd6 &= ~CMD6_SCANUP;
 385
 386         devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
 387 }
 388
 389 static unsigned int labpc_read_adc_fifo(struct comedi_device *dev)
 390 {
 391         struct labpc_private *devpriv = dev->private;
 392         unsigned int lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 393         unsigned int msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 394
 395         return (msb << 8) | lsb;
 396 }
 397
 398 static void labpc_clear_adc_fifo(struct comedi_device *dev)
 399 {
 400         struct labpc_private *devpriv = dev->private;
 401
 402         devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
 403         labpc_read_adc_fifo(dev);
 404 }
 405
 406 static int labpc_ai_wait_for_data(struct comedi_device *dev,
 407                                   int timeout)
 408 {
 409         struct labpc_private *devpriv = dev->private;
 410         int i;
 411
 412         for (i = 0; i < timeout; i++) {
 413                 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
 414                 if (devpriv->stat1 & STAT1_DAVAIL)
 415                         return 0;
 416                 udelay(1);
 417         }
 418         return -ETIME;
 419 }
 420
 421 static int labpc_ai_insn_read(struct comedi_device *dev,
 422                               struct comedi_subdevice *s,
 423                               struct comedi_insn *insn,
 424                               unsigned int *data)
 425 {
 426         struct labpc_private *devpriv = dev->private;
 427         unsigned int chan = CR_CHAN(insn->chanspec);
 428         unsigned int range = CR_RANGE(insn->chanspec);
 429         unsigned int aref = CR_AREF(insn->chanspec);
 430         int ret;
 431         int i;
 432
 433         /* disable timed conversions, interrupt generation and dma */
 434         labpc_cancel(dev, s);
 435
 436         labpc_ai_set_chan_and_gain(dev, MODE_SINGLE_CHAN, chan, range, aref);
 437
 438         labpc_setup_cmd6_reg(dev, s, MODE_SINGLE_CHAN, fifo_not_empty_transfer,
 439                              range, aref, false);
 440
 441         /* setup cmd4 register */
 442         devpriv->cmd4 = 0;
 443         devpriv->cmd4 |= CMD4_ECLKRCV;
 444         /* single-ended/differential */
 445         if (aref == AREF_DIFF)
 446                 devpriv->cmd4 |= CMD4_SEDIFF;
 447         devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
 448
 449         /* initialize pacer counter to prevent any problems */
 450         ret = labpc_counter_set_mode(dev, dev->iobase + COUNTER_A_BASE_REG,
 451                                      0, I8254_MODE2);
 452         if (ret)
 453                 return ret;
 454
 455         labpc_clear_adc_fifo(dev);
 456
 457         for (i = 0; i < insn->n; i++) {
 458                 /* trigger conversion */
 459                 devpriv->write_byte(0x1, dev->iobase + ADC_START_CONVERT_REG);
 460
 461                 ret = labpc_ai_wait_for_data(dev, LABPC_ADC_TIMEOUT);
 462                 if (ret)
 463                         return ret;
 464
 465                 data[i] = labpc_read_adc_fifo(dev);
 466         }
 467
 468         return insn->n;
 469 }
 470
 471 #ifdef CONFIG_ISA_DMA_API
 472 /* utility function that suggests a dma transfer size in bytes */
 473 static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
 474 {
 475         unsigned int size;
 476         unsigned int freq;
 477
 478         if (cmd->convert_src == TRIG_TIMER)
 479                 freq = 1000000000 / cmd->convert_arg;
 480         /* return some default value */
 481         else
 482                 freq = 0xffffffff;
 483
 484         /* make buffer fill in no more than 1/3 second */
 485         size = (freq / 3) * sample_size;
 486
 487         /* set a minimum and maximum size allowed */
 488         if (size > dma_buffer_size)
 489                 size = dma_buffer_size - dma_buffer_size % sample_size;
 490         else if (size < sample_size)
 491                 size = sample_size;
 492
 493         return size;
 494 }
 495 #endif
 496
 497 static bool labpc_use_continuous_mode(const struct comedi_cmd *cmd,
 498                                       enum scan_mode mode)
 499 {
 500         if (mode == MODE_SINGLE_CHAN || cmd->scan_begin_src == TRIG_FOLLOW)
 501                 return true;
 502
 503         return false;
 504 }
 505
 506 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
 507                                             enum scan_mode mode)
 508 {
 509         if (cmd->convert_src != TRIG_TIMER)
 510                 return 0;
 511
 512         if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
 513                 return cmd->scan_begin_arg;
 514
 515         return cmd->convert_arg;
 516 }
 517
 518 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
 519                                         enum scan_mode mode, unsigned int ns)
 520 {
 521         if (cmd->convert_src != TRIG_TIMER)
 522                 return;
 523
 524         if (mode == MODE_SINGLE_CHAN &&
 525             cmd->scan_begin_src == TRIG_TIMER) {
 526                 cmd->scan_begin_arg = ns;
 527                 if (cmd->convert_arg > cmd->scan_begin_arg)
 528                         cmd->convert_arg = cmd->scan_begin_arg;
 529         } else
 530                 cmd->convert_arg = ns;
 531 }
 532
 533 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
 534                                         enum scan_mode mode)
 535 {
 536         if (cmd->scan_begin_src != TRIG_TIMER)
 537                 return 0;
 538
 539         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 540                 return 0;
 541
 542         return cmd->scan_begin_arg;
 543 }
 544
 545 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
 546                                      enum scan_mode mode, unsigned int ns)
 547 {
 548         if (cmd->scan_begin_src != TRIG_TIMER)
 549                 return;
 550
 551         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 552                 return;
 553
 554         cmd->scan_begin_arg = ns;
 555 }
 556
 557 /* figures out what counter values to use based on command */
 558 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
 559                              enum scan_mode mode)
 560 {
 561         struct labpc_private *devpriv = dev->private;
 562         /* max value for 16 bit counter in mode 2 */
 563         const int max_counter_value = 0x10000;
 564         /* min value for 16 bit counter in mode 2 */
 565         const int min_counter_value = 2;
 566         unsigned int base_period;
 567         unsigned int scan_period;
 568         unsigned int convert_period;
 569
 570         /*
 571          * if both convert and scan triggers are TRIG_TIMER, then they
 572          * both rely on counter b0
 573          */
 574         convert_period = labpc_ai_convert_period(cmd, mode);
 575         scan_period = labpc_ai_scan_period(cmd, mode);
 576         if (convert_period && scan_period) {
 577                 /*
 578                  * pick the lowest b0 divisor value we can (for maximum input
 579                  * clock speed on convert and scan counters)
 580                  */
 581                 devpriv->divisor_b0 = (scan_period - 1) /
 582                     (LABPC_TIMER_BASE * max_counter_value) + 1;
 583                 if (devpriv->divisor_b0 < min_counter_value)
 584                         devpriv->divisor_b0 = min_counter_value;
 585                 if (devpriv->divisor_b0 > max_counter_value)
 586                         devpriv->divisor_b0 = max_counter_value;
 587
 588                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
 589
 590                 /*  set a0 for conversion frequency and b1 for scan frequency */
 591                 switch (cmd->flags & TRIG_ROUND_MASK) {
 592                 default:
 593                 case TRIG_ROUND_NEAREST:
 594                         devpriv->divisor_a0 =
 595                             (convert_period + (base_period / 2)) / base_period;
 596                         devpriv->divisor_b1 =
 597                             (scan_period + (base_period / 2)) / base_period;
 598                         break;
 599                 case TRIG_ROUND_UP:
 600                         devpriv->divisor_a0 =
 601                             (convert_period + (base_period - 1)) / base_period;
 602                         devpriv->divisor_b1 =
 603                             (scan_period + (base_period - 1)) / base_period;
 604                         break;
 605                 case TRIG_ROUND_DOWN:
 606                         devpriv->divisor_a0 = convert_period / base_period;
 607                         devpriv->divisor_b1 = scan_period / base_period;
 608                         break;
 609                 }
 610                 /*  make sure a0 and b1 values are acceptable */
 611                 if (devpriv->divisor_a0 < min_counter_value)
 612                         devpriv->divisor_a0 = min_counter_value;
 613                 if (devpriv->divisor_a0 > max_counter_value)
 614                         devpriv->divisor_a0 = max_counter_value;
 615                 if (devpriv->divisor_b1 < min_counter_value)
 616                         devpriv->divisor_b1 = min_counter_value;
 617                 if (devpriv->divisor_b1 > max_counter_value)
 618                         devpriv->divisor_b1 = max_counter_value;
 619                 /*  write corrected timings to command */
 620                 labpc_set_ai_convert_period(cmd, mode,
 621                                             base_period * devpriv->divisor_a0);
 622                 labpc_set_ai_scan_period(cmd, mode,
 623                                          base_period * devpriv->divisor_b1);
 624                 /*
 625                  * if only one TRIG_TIMER is used, we can employ the generic
 626                  * cascaded timing functions
 627                  */
 628         } else if (scan_period) {
 629                 /*
 630                  * calculate cascaded counter values
 631                  * that give desired scan timing
 632                  */
 633                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
 634                                                &(devpriv->divisor_b1),
 635                                                &(devpriv->divisor_b0),
 636                                                &scan_period,
 637                                                cmd->flags & TRIG_ROUND_MASK);
 638                 labpc_set_ai_scan_period(cmd, mode, scan_period);
 639         } else if (convert_period) {
 640                 /*
 641                  * calculate cascaded counter values
 642                  * that give desired conversion timing
 643                  */
 644                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
 645                                                &(devpriv->divisor_a0),
 646                                                &(devpriv->divisor_b0),
 647                                                &convert_period,
 648                                                cmd->flags & TRIG_ROUND_MASK);
 649                 labpc_set_ai_convert_period(cmd, mode, convert_period);
 650         }
 651 }
 652
 653 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 654 {
 655         if (cmd->chanlist_len == 1)
 656                 return MODE_SINGLE_CHAN;
 657
 658         /* chanlist may be NULL during cmdtest. */
 659         if (cmd->chanlist == NULL)
 660                 return MODE_MULT_CHAN_UP;
 661
 662         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 663                 return MODE_SINGLE_CHAN_INTERVAL;
 664
 665         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 666                 return MODE_MULT_CHAN_UP;
 667
 668         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 669                 return MODE_MULT_CHAN_DOWN;
 670
 671         pr_err("ni_labpc: bug! cannot determine AI scan mode\n");
 672         return 0;
 673 }
 674
 675 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 676                                      const struct comedi_cmd *cmd,
 677                                      enum scan_mode mode)
 678 {
 679         int channel, range, aref, i;
 680
 681         if (cmd->chanlist == NULL)
 682                 return 0;
 683
 684         if (mode == MODE_SINGLE_CHAN)
 685                 return 0;
 686
 687         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 688                 if (cmd->chanlist_len > 0xff) {
 689                         comedi_error(dev,
 690                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 691                         return 1;
 692                 }
 693         }
 694
 695         channel = CR_CHAN(cmd->chanlist[0]);
 696         range = CR_RANGE(cmd->chanlist[0]);
 697         aref = CR_AREF(cmd->chanlist[0]);
 698
 699         for (i = 0; i < cmd->chanlist_len; i++) {
 700
 701                 switch (mode) {
 702                 case MODE_SINGLE_CHAN_INTERVAL:
 703                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 704                                 comedi_error(dev,
 705                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 706                                 return 1;
 707                         }
 708                         break;
 709                 case MODE_MULT_CHAN_UP:
 710                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 711                                 comedi_error(dev,
 712                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 713                                 return 1;
 714                         }
 715                         break;
 716                 case MODE_MULT_CHAN_DOWN:
 717                         if (CR_CHAN(cmd->chanlist[i]) !=
 718                             cmd->chanlist_len - i - 1) {
 719                                 comedi_error(dev,
 720                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 721                                 return 1;
 722                         }
 723                         break;
 724                 default:
 725                         dev_err(dev->class_dev,
 726                                 "ni_labpc: bug! in chanlist check\n");
 727                         return 1;
 728                         break;
 729                 }
 730
 731                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 732                         comedi_error(dev,
 733                                      "entries in chanlist must all have the same range\n");
 734                         return 1;
 735                 }
 736
 737                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 738                         comedi_error(dev,
 739                                      "entries in chanlist must all have the same reference\n");
 740                         return 1;
 741                 }
 742         }
 743
 744         return 0;
 745 }
 746
 747 static int labpc_ai_cmdtest(struct comedi_device *dev,
 748                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 749 {
 750         const struct labpc_boardinfo *board = comedi_board(dev);
 751         int err = 0;
 752         int tmp, tmp2;
 753         unsigned int stop_mask;
 754         enum scan_mode mode;
 755
 756         /* Step 1 : check if triggers are trivially valid */
 757
 758         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
 759         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
 760                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 761         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
 762         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 763
 764         stop_mask = TRIG_COUNT | TRIG_NONE;
 765         if (board->register_layout == labpc_1200_layout)
 766                 stop_mask |= TRIG_EXT;
 767         err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
 768
 769         if (err)
 770                 return 1;
 771
 772         /* Step 2a : make sure trigger sources are unique */
 773
 774         err |= cfc_check_trigger_is_unique(cmd->start_src);
 775         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
 776         err |= cfc_check_trigger_is_unique(cmd->convert_src);
 777         err |= cfc_check_trigger_is_unique(cmd->stop_src);
 778
 779         /* Step 2b : and mutually compatible */
 780
 781         /* can't have external stop and start triggers at once */
 782         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 783                 err++;
 784
 785         if (err)
 786                 return 2;
 787
 788         /* Step 3: check if arguments are trivially valid */
 789
 790         if (cmd->start_arg == TRIG_NOW)
 791                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
 792
 793         if (!cmd->chanlist_len)
 794                 err |= -EINVAL;
 795         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
 796
 797         if (cmd->convert_src == TRIG_TIMER)
 798                 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
 799                                                  board->ai_speed);
 800
 801         /* make sure scan timing is not too fast */
 802         if (cmd->scan_begin_src == TRIG_TIMER) {
 803                 if (cmd->convert_src == TRIG_TIMER)
 804                         err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 805                                         cmd->convert_arg * cmd->chanlist_len);
 806                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 807                                 board->ai_speed * cmd->chanlist_len);
 808         }
 809
 810         switch (cmd->stop_src) {
 811         case TRIG_COUNT:
 812                 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
 813                 break;
 814         case TRIG_NONE:
 815                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
 816                 break;
 817                 /*
 818                  * TRIG_EXT doesn't care since it doesn't
 819                  * trigger off a numbered channel
 820                  */
 821         default:
 822                 break;
 823         }
 824
 825         if (err)
 826                 return 3;
 827
 828         /* step 4: fix up any arguments */
 829
 830         tmp = cmd->convert_arg;
 831         tmp2 = cmd->scan_begin_arg;
 832         mode = labpc_ai_scan_mode(cmd);
 833         labpc_adc_timing(dev, cmd, mode);
 834         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
 835                 err++;
 836
 837         if (err)
 838                 return 4;
 839
 840         if (labpc_ai_chanlist_invalid(dev, cmd, mode))
 841                 return 5;
 842
 843         return 0;
 844 }
 845
 846 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 847 {
 848         const struct labpc_boardinfo *board = comedi_board(dev);
 849         struct labpc_private *devpriv = dev->private;
 850         struct comedi_async *async = s->async;
 851         struct comedi_cmd *cmd = &async->cmd;
 852         enum scan_mode mode = labpc_ai_scan_mode(cmd);
 853         unsigned int chanspec = (mode == MODE_MULT_CHAN_UP)
 854                                 ? cmd->chanlist[cmd->chanlist_len - 1]
 855                                 : cmd->chanlist[0];
 856         unsigned int chan = CR_CHAN(chanspec);
 857         unsigned int range = CR_RANGE(chanspec);
 858         unsigned int aref = CR_AREF(chanspec);
 859         enum transfer_type xfer;
 860         unsigned long flags;
 861         int ret;
 862
 863         /* make sure board is disabled before setting up acquisition */
 864         labpc_cancel(dev, s);
 865
 866         /*  initialize software conversion count */
 867         if (cmd->stop_src == TRIG_COUNT)
 868                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
 869
 870         /*  setup hardware conversion counter */
 871         if (cmd->stop_src == TRIG_EXT) {
 872                 /*
 873                  * load counter a1 with count of 3
 874                  * (pc+ manual says this is minimum allowed) using mode 0
 875                  */
 876                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
 877                                          1, 3, I8254_MODE0);
 878         } else  {
 879                 /* just put counter a1 in mode 0 to set its output low */
 880                 ret = labpc_counter_set_mode(dev,
 881                                              dev->iobase + COUNTER_A_BASE_REG,
 882                                              1, I8254_MODE0);
 883         }
 884         if (ret) {
 885                 comedi_error(dev, "error loading counter a1");
 886                 return ret;
 887         }
 888
 889 #ifdef CONFIG_ISA_DMA_API
 890         /*  figure out what method we will use to transfer data */
 891         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
 892                 /*
 893                  * dma unsafe at RT priority,
 894                  * and too much setup time for TRIG_WAKE_EOS for
 895                  */
 896             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0) {
 897                 xfer = isa_dma_transfer;
 898                 /* pc-plus has no fifo-half full interrupt */
 899         } else
 900 #endif
 901         if (board->register_layout == labpc_1200_layout &&
 902                    /*  wake-end-of-scan should interrupt on fifo not empty */
 903                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
 904                    /*  make sure we are taking more than just a few points */
 905                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
 906                 xfer = fifo_half_full_transfer;
 907         } else
 908                 xfer = fifo_not_empty_transfer;
 909         devpriv->current_transfer = xfer;
 910
 911         labpc_ai_set_chan_and_gain(dev, mode, chan, range, aref);
 912
 913         labpc_setup_cmd6_reg(dev, s, mode, xfer, range, aref,
 914                              (cmd->stop_src == TRIG_EXT));
 915
 916         /* manual says to set scan enable bit on second pass */
 917         if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
 918                 devpriv->cmd1 |= CMD1_SCANEN;
 919                 /* need a brief delay before enabling scan, or scan
 920                  * list will get screwed when you switch
 921                  * between scan up to scan down mode - dunno why */
 922                 udelay(1);
 923                 devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
 924         }
 925
 926         devpriv->write_byte(cmd->chanlist_len,
 927                             dev->iobase + INTERVAL_COUNT_REG);
 928         /*  load count */
 929         devpriv->write_byte(0x1, dev->iobase + INTERVAL_STROBE_REG);
 930
 931         if (cmd->convert_src == TRIG_TIMER ||
 932             cmd->scan_begin_src == TRIG_TIMER) {
 933                 /*  set up pacing */
 934                 labpc_adc_timing(dev, cmd, mode);
 935                 /*  load counter b0 in mode 3 */
 936                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
 937                                          0, devpriv->divisor_b0, I8254_MODE3);
 938                 if (ret < 0) {
 939                         comedi_error(dev, "error loading counter b0");
 940                         return -1;
 941                 }
 942         }
 943         /*  set up conversion pacing */
 944         if (labpc_ai_convert_period(cmd, mode)) {
 945                 /*  load counter a0 in mode 2 */
 946                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
 947                                          0, devpriv->divisor_a0, I8254_MODE2);
 948         } else {
 949                 /* initialize pacer counter to prevent any problems */
 950                 ret = labpc_counter_set_mode(dev,
 951                                              dev->iobase + COUNTER_A_BASE_REG,
 952                                              0, I8254_MODE2);
 953         }
 954         if (ret) {
 955                 comedi_error(dev, "error loading counter a0");
 956                 return ret;
 957         }
 958
 959         /*  set up scan pacing */
 960         if (labpc_ai_scan_period(cmd, mode)) {
 961                 /*  load counter b1 in mode 2 */
 962                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
 963                                          1, devpriv->divisor_b1, I8254_MODE2);
 964                 if (ret < 0) {
 965                         comedi_error(dev, "error loading counter b1");
 966                         return -1;
 967                 }
 968         }
 969
 970         labpc_clear_adc_fifo(dev);
 971
 972 #ifdef CONFIG_ISA_DMA_API
 973         /*  set up dma transfer */
 974         if (xfer == isa_dma_transfer) {
 975                 unsigned long irq_flags;
 976
 977                 irq_flags = claim_dma_lock();
 978                 disable_dma(devpriv->dma_chan);
 979                 /* clear flip-flop to make sure 2-byte registers for
 980                  * count and address get set correctly */
 981                 clear_dma_ff(devpriv->dma_chan);
 982                 set_dma_addr(devpriv->dma_chan,
 983                              virt_to_bus(devpriv->dma_buffer));
 984                 /*  set appropriate size of transfer */
 985                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(cmd);
 986                 if (cmd->stop_src == TRIG_COUNT &&
 987                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
 988                         devpriv->dma_transfer_size =
 989                             devpriv->count * sample_size;
 990                 }
 991                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
 992                 enable_dma(devpriv->dma_chan);
 993                 release_dma_lock(irq_flags);
 994                 /*  enable board's dma */
 995                 devpriv->cmd3 |= (CMD3_DMAEN | CMD3_DMATCINTEN);
 996         } else
 997                 devpriv->cmd3 &= ~(CMD3_DMAEN | CMD3_DMATCINTEN);
 998 #endif
 999
1000         /*  enable error interrupts */
1001         devpriv->cmd3 |= CMD3_ERRINTEN;
1002         /*  enable fifo not empty interrupt? */
1003         if (xfer == fifo_not_empty_transfer)
1004                 devpriv->cmd3 |= CMD3_FIFOINTEN;
1005         else
1006                 devpriv->cmd3 &= ~CMD3_FIFOINTEN;
1007         devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
1008
1009         /*  setup any external triggering/pacing (cmd4 register) */
1010         devpriv->cmd4 = 0;
1011         if (cmd->convert_src != TRIG_EXT)
1012                 devpriv->cmd4 |= CMD4_ECLKRCV;
1013         /* XXX should discard first scan when using interval scanning
1014          * since manual says it is not synced with scan clock */
1015         if (!labpc_use_continuous_mode(cmd, mode)) {
1016                 devpriv->cmd4 |= CMD4_INTSCAN;
1017                 if (cmd->scan_begin_src == TRIG_EXT)
1018                         devpriv->cmd4 |= CMD4_EOIRCV;
1019         }
1020         /*  single-ended/differential */
1021         if (aref == AREF_DIFF)
1022                 devpriv->cmd4 |= CMD4_SEDIFF;
1023         devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
1024
1025         /*  startup acquisition */
1026
1027         spin_lock_irqsave(&dev->spinlock, flags);
1028
1029         /* use 2 cascaded counters for pacing */
1030         devpriv->cmd2 |= CMD2_TBSEL;
1031
1032         devpriv->cmd2 &= ~(CMD2_SWTRIG | CMD2_HWTRIG | CMD2_PRETRIG);
1033         if (cmd->start_src == TRIG_EXT)
1034                 devpriv->cmd2 |= CMD2_HWTRIG;
1035         else
1036                 devpriv->cmd2 |= CMD2_SWTRIG;
1037         if (cmd->stop_src == TRIG_EXT)
1038                 devpriv->cmd2 |= (CMD2_HWTRIG | CMD2_PRETRIG);
1039
1040         devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1041
1042         spin_unlock_irqrestore(&dev->spinlock, flags);
1043
1044         return 0;
1045 }
1046
1047 #ifdef CONFIG_ISA_DMA_API
1048 static void labpc_drain_dma(struct comedi_device *dev)
1049 {
1050         struct labpc_private *devpriv = dev->private;
1051         struct comedi_subdevice *s = dev->read_subdev;
1052         struct comedi_async *async = s->async;
1053         int status;
1054         unsigned long flags;
1055         unsigned int max_points, num_points, residue, leftover;
1056         int i;
1057
1058         status = devpriv->stat1;
1059
1060         flags = claim_dma_lock();
1061         disable_dma(devpriv->dma_chan);
1062         /* clear flip-flop to make sure 2-byte registers for
1063          * count and address get set correctly */
1064         clear_dma_ff(devpriv->dma_chan);
1065
1066         /*  figure out how many points to read */
1067         max_points = devpriv->dma_transfer_size / sample_size;
1068         /* residue is the number of points left to be done on the dma
1069          * transfer.  It should always be zero at this point unless
1070          * the stop_src is set to external triggering.
1071          */
1072         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1073         num_points = max_points - residue;
1074         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1075                 num_points = devpriv->count;
1076
1077         /*  figure out how many points will be stored next time */
1078         leftover = 0;
1079         if (async->cmd.stop_src != TRIG_COUNT) {
1080                 leftover = devpriv->dma_transfer_size / sample_size;
1081         } else if (devpriv->count > num_points) {
1082                 leftover = devpriv->count - num_points;
1083                 if (leftover > max_points)
1084                         leftover = max_points;
1085         }
1086
1087         /* write data to comedi buffer */
1088         for (i = 0; i < num_points; i++)
1089                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1090
1091         if (async->cmd.stop_src == TRIG_COUNT)
1092                 devpriv->count -= num_points;
1093
1094         /*  set address and count for next transfer */
1095         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1096         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1097         release_dma_lock(flags);
1098
1099         async->events |= COMEDI_CB_BLOCK;
1100 }
1101
1102 static void handle_isa_dma(struct comedi_device *dev)
1103 {
1104         struct labpc_private *devpriv = dev->private;
1105
1106         labpc_drain_dma(dev);
1107
1108         enable_dma(devpriv->dma_chan);
1109
1110         /*  clear dma tc interrupt */
1111         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1112 }
1113 #endif
1114
1115 /* read all available samples from ai fifo */
1116 static int labpc_drain_fifo(struct comedi_device *dev)
1117 {
1118         struct labpc_private *devpriv = dev->private;
1119         short data;
1120         struct comedi_async *async = dev->read_subdev->async;
1121         const int timeout = 10000;
1122         unsigned int i;
1123
1124         devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
1125
1126         for (i = 0; (devpriv->stat1 & STAT1_DAVAIL) && i < timeout;
1127              i++) {
1128                 /*  quit if we have all the data we want */
1129                 if (async->cmd.stop_src == TRIG_COUNT) {
1130                         if (devpriv->count == 0)
1131                                 break;
1132                         devpriv->count--;
1133                 }
1134                 data = labpc_read_adc_fifo(dev);
1135                 cfc_write_to_buffer(dev->read_subdev, data);
1136                 devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
1137         }
1138         if (i == timeout) {
1139                 comedi_error(dev, "ai timeout, fifo never empties");
1140                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1141                 return -1;
1142         }
1143
1144         return 0;
1145 }
1146
1147 /* makes sure all data acquired by board is transferred to comedi (used
1148  * when acquisition is terminated by stop_src == TRIG_EXT). */
1149 static void labpc_drain_dregs(struct comedi_device *dev)
1150 {
1151 #ifdef CONFIG_ISA_DMA_API
1152         struct labpc_private *devpriv = dev->private;
1153
1154         if (devpriv->current_transfer == isa_dma_transfer)
1155                 labpc_drain_dma(dev);
1156 #endif
1157
1158         labpc_drain_fifo(dev);
1159 }
1160
1161 /* interrupt service routine */
1162 static irqreturn_t labpc_interrupt(int irq, void *d)
1163 {
1164         struct comedi_device *dev = d;
1165         const struct labpc_boardinfo *board = comedi_board(dev);
1166         struct labpc_private *devpriv = dev->private;
1167         struct comedi_subdevice *s = dev->read_subdev;
1168         struct comedi_async *async;
1169         struct comedi_cmd *cmd;
1170
1171         if (!dev->attached) {
1172                 comedi_error(dev, "premature interrupt");
1173                 return IRQ_HANDLED;
1174         }
1175
1176         async = s->async;
1177         cmd = &async->cmd;
1178         async->events = 0;
1179
1180         /* read board status */
1181         devpriv->stat1 = devpriv->read_byte(dev->iobase + STAT1_REG);
1182         if (board->register_layout == labpc_1200_layout)
1183                 devpriv->stat2 = devpriv->read_byte(dev->iobase + STAT2_REG);
1184
1185         if ((devpriv->stat1 & (STAT1_GATA0 | STAT1_CNTINT | STAT1_OVERFLOW |
1186                                STAT1_OVERRUN | STAT1_DAVAIL)) == 0
1187             && (devpriv->stat2 & STAT2_OUTA1) == 0
1188             && (devpriv->stat2 & STAT2_FIFONHF)) {
1189                 return IRQ_NONE;
1190         }
1191
1192         if (devpriv->stat1 & STAT1_OVERRUN) {
1193                 /* clear error interrupt */
1194                 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
1195                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1196                 comedi_event(dev, s);
1197                 comedi_error(dev, "overrun");
1198                 return IRQ_HANDLED;
1199         }
1200
1201 #ifdef CONFIG_ISA_DMA_API
1202         if (devpriv->current_transfer == isa_dma_transfer) {
1203                 /*
1204                  * if a dma terminal count of external stop trigger
1205                  * has occurred
1206                  */
1207                 if (devpriv->stat1 & STAT1_GATA0 ||
1208                     (board->register_layout == labpc_1200_layout
1209                      && devpriv->stat2 & STAT2_OUTA1)) {
1210                         handle_isa_dma(dev);
1211                 }
1212         } else
1213 #endif
1214                 labpc_drain_fifo(dev);
1215
1216         if (devpriv->stat1 & STAT1_CNTINT) {
1217                 comedi_error(dev, "handled timer interrupt?");
1218                 /*  clear it */
1219                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1220         }
1221
1222         if (devpriv->stat1 & STAT1_OVERFLOW) {
1223                 /*  clear error interrupt */
1224                 devpriv->write_byte(0x1, dev->iobase + ADC_FIFO_CLEAR_REG);
1225                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1226                 comedi_event(dev, s);
1227                 comedi_error(dev, "overflow");
1228                 return IRQ_HANDLED;
1229         }
1230         /*  handle external stop trigger */
1231         if (cmd->stop_src == TRIG_EXT) {
1232                 if (devpriv->stat2 & STAT2_OUTA1) {
1233                         labpc_drain_dregs(dev);
1234                         labpc_cancel(dev, s);
1235                         async->events |= COMEDI_CB_EOA;
1236                 }
1237         }
1238
1239         /* TRIG_COUNT end of acquisition */
1240         if (cmd->stop_src == TRIG_COUNT) {
1241                 if (devpriv->count == 0) {
1242                         labpc_cancel(dev, s);
1243                         async->events |= COMEDI_CB_EOA;
1244                 }
1245         }
1246
1247         comedi_event(dev, s);
1248         return IRQ_HANDLED;
1249 }
1250
1251 static int labpc_ao_insn_write(struct comedi_device *dev,
1252                                struct comedi_subdevice *s,
1253                                struct comedi_insn *insn,
1254                                unsigned int *data)
1255 {
1256         const struct labpc_boardinfo *board = comedi_board(dev);
1257         struct labpc_private *devpriv = dev->private;
1258         int channel, range;
1259         unsigned long flags;
1260         int lsb, msb;
1261
1262         channel = CR_CHAN(insn->chanspec);
1263
1264         /* turn off pacing of analog output channel */
1265         /* note: hardware bug in daqcard-1200 means pacing cannot
1266          * be independently enabled/disabled for its the two channels */
1267         spin_lock_irqsave(&dev->spinlock, flags);
1268         devpriv->cmd2 &= ~CMD2_LDAC(channel);
1269         devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1270         spin_unlock_irqrestore(&dev->spinlock, flags);
1271
1272         /* set range */
1273         if (board->register_layout == labpc_1200_layout) {
1274                 range = CR_RANGE(insn->chanspec);
1275                 if (labpc_range_is_unipolar(s, range))
1276                         devpriv->cmd6 |= CMD6_DACUNI(channel);
1277                 else
1278                         devpriv->cmd6 &= ~CMD6_DACUNI(channel);
1279                 /*  write to register */
1280                 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
1281         }
1282         /* send data */
1283         lsb = data[0] & 0xff;
1284         msb = (data[0] >> 8) & 0xff;
1285         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1286         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1287
1288         /* remember value for readback */
1289         devpriv->ao_value[channel] = data[0];
1290
1291         return 1;
1292 }
1293
1294 static int labpc_ao_insn_read(struct comedi_device *dev,
1295                               struct comedi_subdevice *s,
1296                               struct comedi_insn *insn,
1297                               unsigned int *data)
1298 {
1299         struct labpc_private *devpriv = dev->private;
1300
1301         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1302
1303         return 1;
1304 }
1305
1306 static int labpc_8255_mmio(int dir, int port, int data, unsigned long iobase)
1307 {
1308         if (dir) {
1309                 writeb(data, (void __iomem *)(iobase + port));
1310                 return 0;
1311         } else {
1312                 return readb((void __iomem *)(iobase + port));
1313         }
1314 }
1315
1316 /* lowlevel write to eeprom/dac */
1317 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1318                              unsigned int value_width)
1319 {
1320         struct labpc_private *devpriv = dev->private;
1321         int i;
1322
1323         for (i = 1; i <= value_width; i++) {
1324                 /*  clear serial clock */
1325                 devpriv->cmd5 &= ~CMD5_SCLK;
1326                 /*  send bits most significant bit first */
1327                 if (value & (1 << (value_width - i)))
1328                         devpriv->cmd5 |= CMD5_SDATA;
1329                 else
1330                         devpriv->cmd5 &= ~CMD5_SDATA;
1331                 udelay(1);
1332                 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1333                 /*  set clock to load bit */
1334                 devpriv->cmd5 |= CMD5_SCLK;
1335                 udelay(1);
1336                 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1337         }
1338 }
1339
1340 /* lowlevel read from eeprom */
1341 static unsigned int labpc_serial_in(struct comedi_device *dev)
1342 {
1343         struct labpc_private *devpriv = dev->private;
1344         unsigned int value = 0;
1345         int i;
1346         const int value_width = 8;      /*  number of bits wide values are */
1347
1348         for (i = 1; i <= value_width; i++) {
1349                 /*  set serial clock */
1350                 devpriv->cmd5 |= CMD5_SCLK;
1351                 udelay(1);
1352                 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1353                 /*  clear clock bit */
1354                 devpriv->cmd5 &= ~CMD5_SCLK;
1355                 udelay(1);
1356                 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1357                 /*  read bits most significant bit first */
1358                 udelay(1);
1359                 devpriv->stat2 = devpriv->read_byte(dev->iobase + STAT2_REG);
1360                 if (devpriv->stat2 & STAT2_PROMOUT)
1361                         value |= 1 << (value_width - i);
1362         }
1363
1364         return value;
1365 }
1366
1367 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1368                                       unsigned int address)
1369 {
1370         struct labpc_private *devpriv = dev->private;
1371         unsigned int value;
1372         /*  bits to tell eeprom to expect a read */
1373         const int read_instruction = 0x3;
1374         /*  8 bit write lengths to eeprom */
1375         const int write_length = 8;
1376
1377         /*  enable read/write to eeprom */
1378         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1379         udelay(1);
1380         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1381         devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1382         udelay(1);
1383         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1384
1385         /*  send read instruction */
1386         labpc_serial_out(dev, read_instruction, write_length);
1387         /*  send 8 bit address to read from */
1388         labpc_serial_out(dev, address, write_length);
1389         /*  read result */
1390         value = labpc_serial_in(dev);
1391
1392         /*  disable read/write to eeprom */
1393         devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1394         udelay(1);
1395         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1396
1397         return value;
1398 }
1399
1400 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1401 {
1402         struct labpc_private *devpriv = dev->private;
1403         unsigned int value;
1404         const int read_status_instruction = 0x5;
1405         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1406
1407         /*  enable read/write to eeprom */
1408         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1409         udelay(1);
1410         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1411         devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1412         udelay(1);
1413         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1414
1415         /*  send read status instruction */
1416         labpc_serial_out(dev, read_status_instruction, write_length);
1417         /*  read result */
1418         value = labpc_serial_in(dev);
1419
1420         /*  disable read/write to eeprom */
1421         devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1422         udelay(1);
1423         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1424
1425         return value;
1426 }
1427
1428 static int labpc_eeprom_write(struct comedi_device *dev,
1429                                 unsigned int address, unsigned int value)
1430 {
1431         struct labpc_private *devpriv = dev->private;
1432         const int write_enable_instruction = 0x6;
1433         const int write_instruction = 0x2;
1434         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1435         const int write_in_progress_bit = 0x1;
1436         const int timeout = 10000;
1437         int i;
1438
1439         /*  make sure there isn't already a write in progress */
1440         for (i = 0; i < timeout; i++) {
1441                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1442                     0)
1443                         break;
1444         }
1445         if (i == timeout) {
1446                 comedi_error(dev, "eeprom write timed out");
1447                 return -ETIME;
1448         }
1449         /*  update software copy of eeprom */
1450         devpriv->eeprom_data[address] = value;
1451
1452         /*  enable read/write to eeprom */
1453         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1454         udelay(1);
1455         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1456         devpriv->cmd5 |= (CMD5_EEPROMCS | CMD5_WRTPRT);
1457         udelay(1);
1458         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1459
1460         /*  send write_enable instruction */
1461         labpc_serial_out(dev, write_enable_instruction, write_length);
1462         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1463         udelay(1);
1464         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1465
1466         /*  send write instruction */
1467         devpriv->cmd5 |= CMD5_EEPROMCS;
1468         udelay(1);
1469         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1470         labpc_serial_out(dev, write_instruction, write_length);
1471         /*  send 8 bit address to write to */
1472         labpc_serial_out(dev, address, write_length);
1473         /*  write value */
1474         labpc_serial_out(dev, value, write_length);
1475         devpriv->cmd5 &= ~CMD5_EEPROMCS;
1476         udelay(1);
1477         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1478
1479         /*  disable read/write to eeprom */
1480         devpriv->cmd5 &= ~(CMD5_EEPROMCS | CMD5_WRTPRT);
1481         udelay(1);
1482         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1483
1484         return 0;
1485 }
1486
1487 /* writes to 8 bit calibration dacs */
1488 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1489                          unsigned int value)
1490 {
1491         struct labpc_private *devpriv = dev->private;
1492
1493         if (value == devpriv->caldac[channel])
1494                 return;
1495         devpriv->caldac[channel] = value;
1496
1497         /*  clear caldac load bit and make sure we don't write to eeprom */
1498         devpriv->cmd5 &= ~(CMD5_CALDACLD | CMD5_EEPROMCS | CMD5_WRTPRT);
1499         udelay(1);
1500         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1501
1502         /*  write 4 bit channel */
1503         labpc_serial_out(dev, channel, 4);
1504         /*  write 8 bit caldac value */
1505         labpc_serial_out(dev, value, 8);
1506
1507         /*  set and clear caldac bit to load caldac value */
1508         devpriv->cmd5 |= CMD5_CALDACLD;
1509         udelay(1);
1510         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1511         devpriv->cmd5 &= ~CMD5_CALDACLD;
1512         udelay(1);
1513         devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1514 }
1515
1516 static int labpc_calib_insn_write(struct comedi_device *dev,
1517                                   struct comedi_subdevice *s,
1518                                   struct comedi_insn *insn,
1519                                   unsigned int *data)
1520 {
1521         unsigned int chan = CR_CHAN(insn->chanspec);
1522
1523         /*
1524          * Only write the last data value to the caldac. Preceding
1525          * data would be overwritten anyway.
1526          */
1527         if (insn->n > 0)
1528                 write_caldac(dev, chan, data[insn->n - 1]);
1529
1530         return insn->n;
1531 }
1532
1533 static int labpc_calib_insn_read(struct comedi_device *dev,
1534                                  struct comedi_subdevice *s,
1535                                  struct comedi_insn *insn,
1536                                  unsigned int *data)
1537 {
1538         struct labpc_private *devpriv = dev->private;
1539         unsigned int chan = CR_CHAN(insn->chanspec);
1540         int i;
1541
1542         for (i = 0; i < insn->n; i++)
1543                 data[i] = devpriv->caldac[chan];
1544
1545         return insn->n;
1546 }
1547
1548 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1549                                    struct comedi_subdevice *s,
1550                                    struct comedi_insn *insn,
1551                                    unsigned int *data)
1552 {
1553         unsigned int chan = CR_CHAN(insn->chanspec);
1554         int ret;
1555
1556         /* only allow writes to user area of eeprom */
1557         if (chan < 16 || chan > 127)
1558                 return -EINVAL;
1559
1560         /*
1561          * Only write the last data value to the eeprom. Preceding
1562          * data would be overwritten anyway.
1563          */
1564         if (insn->n > 0) {
1565                 ret = labpc_eeprom_write(dev, chan, data[insn->n - 1]);
1566                 if (ret)
1567                         return ret;
1568         }
1569
1570         return insn->n;
1571 }
1572
1573 static int labpc_eeprom_insn_read(struct comedi_device *dev,
1574                                   struct comedi_subdevice *s,
1575                                   struct comedi_insn *insn,
1576                                   unsigned int *data)
1577 {
1578         struct labpc_private *devpriv = dev->private;
1579         unsigned int chan = CR_CHAN(insn->chanspec);
1580         int i;
1581
1582         for (i = 0; i < insn->n; i++)
1583                 data[i] = devpriv->eeprom_data[chan];
1584
1585         return insn->n;
1586 }
1587
1588 int labpc_common_attach(struct comedi_device *dev,
1589                         unsigned int irq, unsigned long isr_flags)
1590 {
1591         const struct labpc_boardinfo *board = comedi_board(dev);
1592         struct labpc_private *devpriv = dev->private;
1593         struct comedi_subdevice *s;
1594         int ret;
1595         int i;
1596
1597         if (board->has_mmio) {
1598                 devpriv->read_byte = labpc_readb;
1599                 devpriv->write_byte = labpc_writeb;
1600         } else {
1601                 devpriv->read_byte = labpc_inb;
1602                 devpriv->write_byte = labpc_outb;
1603         }
1604
1605         /* initialize board's command registers */
1606         devpriv->write_byte(devpriv->cmd1, dev->iobase + CMD1_REG);
1607         devpriv->write_byte(devpriv->cmd2, dev->iobase + CMD2_REG);
1608         devpriv->write_byte(devpriv->cmd3, dev->iobase + CMD3_REG);
1609         devpriv->write_byte(devpriv->cmd4, dev->iobase + CMD4_REG);
1610         if (board->register_layout == labpc_1200_layout) {
1611                 devpriv->write_byte(devpriv->cmd5, dev->iobase + CMD5_REG);
1612                 devpriv->write_byte(devpriv->cmd6, dev->iobase + CMD6_REG);
1613         }
1614
1615         if (irq) {
1616                 ret = request_irq(irq, labpc_interrupt, isr_flags,
1617                                   dev->board_name, dev);
1618                 if (ret == 0)
1619                         dev->irq = irq;
1620         }
1621
1622         ret = comedi_alloc_subdevices(dev, 5);
1623         if (ret)
1624                 return ret;
1625
1626         /* analog input subdevice */
1627         s = &dev->subdevices[0];
1628         s->type         = COMEDI_SUBD_AI;
1629         s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1630         s->n_chan       = 8;
1631         s->len_chanlist = 8;
1632         s->maxdata      = 0x0fff;
1633         s->range_table  = board->ai_range_table;
1634         s->insn_read    = labpc_ai_insn_read;
1635         if (dev->irq) {
1636                 dev->read_subdev = s;
1637                 s->subdev_flags |= SDF_CMD_READ;
1638                 s->do_cmd       = labpc_ai_cmd;
1639                 s->do_cmdtest   = labpc_ai_cmdtest;
1640                 s->cancel       = labpc_cancel;
1641         }
1642
1643         /* analog output */
1644         s = &dev->subdevices[1];
1645         if (board->has_ao) {
1646                 s->type         = COMEDI_SUBD_AO;
1647                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1648                 s->n_chan       = NUM_AO_CHAN;
1649                 s->maxdata      = 0x0fff;
1650                 s->range_table  = &range_labpc_ao;
1651                 s->insn_read    = labpc_ao_insn_read;
1652                 s->insn_write   = labpc_ao_insn_write;
1653
1654                 /* initialize analog outputs to a known value */
1655                 for (i = 0; i < s->n_chan; i++) {
1656                         short lsb, msb;
1657
1658                         devpriv->ao_value[i] = s->maxdata / 2;
1659                         lsb = devpriv->ao_value[i] & 0xff;
1660                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
1661                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
1662                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
1663                 }
1664         } else {
1665                 s->type         = COMEDI_SUBD_UNUSED;
1666         }
1667
1668         /* 8255 dio */
1669         s = &dev->subdevices[2];
1670         ret = subdev_8255_init(dev, s,
1671                                (board->has_mmio) ? labpc_8255_mmio : NULL,
1672                                dev->iobase + DIO_BASE_REG);
1673         if (ret)
1674                 return ret;
1675
1676         /*  calibration subdevices for boards that have one */
1677         s = &dev->subdevices[3];
1678         if (board->register_layout == labpc_1200_layout) {
1679                 s->type         = COMEDI_SUBD_CALIB;
1680                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1681                 s->n_chan       = 16;
1682                 s->maxdata      = 0xff;
1683                 s->insn_read    = labpc_calib_insn_read;
1684                 s->insn_write   = labpc_calib_insn_write;
1685
1686                 for (i = 0; i < s->n_chan; i++)
1687                         write_caldac(dev, i, s->maxdata / 2);
1688         } else
1689                 s->type         = COMEDI_SUBD_UNUSED;
1690
1691         /* EEPROM */
1692         s = &dev->subdevices[4];
1693         if (board->register_layout == labpc_1200_layout) {
1694                 s->type         = COMEDI_SUBD_MEMORY;
1695                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1696                 s->n_chan       = EEPROM_SIZE;
1697                 s->maxdata      = 0xff;
1698                 s->insn_read    = labpc_eeprom_insn_read;
1699                 s->insn_write   = labpc_eeprom_insn_write;
1700
1701                 for (i = 0; i < s->n_chan; i++)
1702                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
1703         } else
1704                 s->type         = COMEDI_SUBD_UNUSED;
1705
1706         return 0;
1707 }
1708 EXPORT_SYMBOL_GPL(labpc_common_attach);
1709
1710 void labpc_common_detach(struct comedi_device *dev)
1711 {
1712         comedi_spriv_free(dev, 2);
1713 }
1714 EXPORT_SYMBOL_GPL(labpc_common_detach);
1715
1716 #ifdef CONFIG_COMEDI_NI_LABPC_ISA
1717 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1718 {
1719         const struct labpc_boardinfo *board = comedi_board(dev);
1720         struct labpc_private *devpriv;
1721         unsigned int irq = it->options[1];
1722         unsigned int dma_chan = it->options[2];
1723         int ret;
1724
1725         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1726         if (!devpriv)
1727                 return -ENOMEM;
1728         dev->private = devpriv;
1729
1730         ret = comedi_request_region(dev, it->options[0], LABPC_SIZE);
1731         if (ret)
1732                 return ret;
1733
1734         ret = labpc_common_attach(dev, irq, 0);
1735         if (ret)
1736                 return ret;
1737
1738 #ifdef CONFIG_ISA_DMA_API
1739         if (dev->irq && (dma_chan == 1 || dma_chan == 3)) {
1740                 devpriv->dma_buffer = kmalloc(dma_buffer_size,
1741                                               GFP_KERNEL | GFP_DMA);
1742                 if (devpriv->dma_buffer) {
1743                         ret = request_dma(dma_chan, dev->board_name);
1744                         if (ret == 0) {
1745                                 unsigned long dma_flags;
1746
1747                                 devpriv->dma_chan = dma_chan;
1748                                 dma_flags = claim_dma_lock();
1749                                 disable_dma(devpriv->dma_chan);
1750                                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
1751                                 release_dma_lock(dma_flags);
1752                         } else {
1753                                 kfree(devpriv->dma_buffer);
1754                         }
1755                 }
1756         }
1757 #endif
1758
1759         return 0;
1760 }
1761
1762 void labpc_detach(struct comedi_device *dev)
1763 {
1764         struct labpc_private *devpriv = dev->private;
1765
1766         labpc_common_detach(dev);
1767
1768         if (devpriv) {
1769                 kfree(devpriv->dma_buffer);
1770                 if (devpriv->dma_chan)
1771                         free_dma(devpriv->dma_chan);
1772         }
1773         comedi_legacy_detach(dev);
1774 }
1775
1776 static struct comedi_driver labpc_driver = {
1777         .driver_name    = "ni_labpc",
1778         .module         = THIS_MODULE,
1779         .attach         = labpc_attach,
1780         .detach         = labpc_detach,
1781         .num_names      = ARRAY_SIZE(labpc_boards),
1782         .board_name     = &labpc_boards[0].name,
1783         .offset         = sizeof(struct labpc_boardinfo),
1784 };
1785 module_comedi_driver(labpc_driver);
1786 #else
1787 static int __init labpc_common_init(void)
1788 {
1789         return 0;
1790 }
1791 module_init(labpc_common_init);
1792
1793 static void __exit labpc_common_exit(void)
1794 {
1795 }
1796 module_exit(labpc_common_exit);
1797 #endif
1798
1799 MODULE_AUTHOR("Comedi http://www.comedi.org");
1800 MODULE_DESCRIPTION("Comedi low-level driver");
1801 MODULE_LICENSE("GPL");