3 * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
4 * Project manager: Eric Stolz
9 * Tel: +19(0)7223/9493-0
10 * Fax: +49(0)7223/9493-92
11 * http://www.addi-data.com
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
19 * This program is distributed in the hope that it will be useful, but WITHOUT
20 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
24 * You should have received a copy of the GNU General Public License along with
25 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
26 * Place, Suite 330, Boston, MA 02111-1307 USA
28 * You should also find the complete GPL in the COPYING file accompanying this
32 #include "../comedidev.h"
33 #include "comedi_fc.h"
34 #include "amcc_s5933.h"
39 #define APCI1032_DI_REG 0x00
40 #define APCI1032_MODE1_REG 0x04
41 #define APCI1032_MODE2_REG 0x08
42 #define APCI1032_STATUS_REG 0x0c
43 #define APCI1032_CTRL_REG 0x10
44 #define APCI1032_CTRL_INT_OR (0 << 1)
45 #define APCI1032_CTRL_INT_AND (1 << 1)
46 #define APCI1032_CTRL_INT_ENA (1 << 2)
48 struct apci1032_private {
49 unsigned long amcc_iobase; /* base of AMCC I/O registers */
50 unsigned int mode1; /* rising-edge/high level channels */
51 unsigned int mode2; /* falling-edge/low level channels */
52 unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
55 static int apci1032_reset(struct comedi_device *dev)
57 /* disable the interrupts */
58 outl(0x0, dev->iobase + APCI1032_CTRL_REG);
59 /* Reset the interrupt status register */
60 inl(dev->iobase + APCI1032_STATUS_REG);
61 /* Disable the and/or interrupt */
62 outl(0x0, dev->iobase + APCI1032_MODE1_REG);
63 outl(0x0, dev->iobase + APCI1032_MODE2_REG);
69 * Change-Of-State (COS) interrupt configuration
71 * Channels 0 to 15 are interruptible. These channels can be configured
72 * to generate interrupts based on AND/OR logic for the desired channels.
75 * - reacts to rising or falling edges
76 * - interrupt is generated when any enabled channel
77 * meet the desired interrupt condition
80 * - reacts to changes in level of the selected inputs
81 * - interrupt is generated when all enabled channels
82 * meet the desired interrupt condition
83 * - after an interrupt, a change in level must occur on
84 * the selected inputs to release the IRQ logic
86 * The COS interrupt must be configured before it can be enabled.
88 * data[0] : INSN_CONFIG_DIGITAL_TRIG
89 * data[1] : trigger number (= 0)
90 * data[2] : configuration operation:
91 * COMEDI_DIGITAL_TRIG_DISABLE = no interrupts
92 * COMEDI_DIGITAL_TRIG_ENABLE_EDGES = OR (edge) interrupts
93 * COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = AND (level) interrupts
94 * data[3] : left-shift for data[4] and data[5]
95 * data[4] : rising-edge/high level channels
96 * data[5] : falling-edge/low level channels
98 static int apci1032_cos_insn_config(struct comedi_device *dev,
99 struct comedi_subdevice *s,
100 struct comedi_insn *insn,
103 struct apci1032_private *devpriv = dev->private;
104 unsigned int shift, oldmask;
107 case INSN_CONFIG_DIGITAL_TRIG:
111 oldmask = (1U << shift) - 1;
113 case COMEDI_DIGITAL_TRIG_DISABLE:
119 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
120 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
121 APCI1032_CTRL_INT_OR)) {
122 /* switching to 'OR' mode */
123 devpriv->ctrl = APCI1032_CTRL_INT_ENA |
124 APCI1032_CTRL_INT_OR;
125 /* wipe old channels */
129 /* preserve unspecified channels */
130 devpriv->mode1 &= oldmask;
131 devpriv->mode2 &= oldmask;
133 /* configure specified channels */
134 devpriv->mode1 |= data[4] << shift;
135 devpriv->mode2 |= data[5] << shift;
137 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
138 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
139 APCI1032_CTRL_INT_AND)) {
140 /* switching to 'AND' mode */
141 devpriv->ctrl = APCI1032_CTRL_INT_ENA |
142 APCI1032_CTRL_INT_AND;
143 /* wipe old channels */
147 /* preserve unspecified channels */
148 devpriv->mode1 &= oldmask;
149 devpriv->mode2 &= oldmask;
151 /* configure specified channels */
152 devpriv->mode1 |= data[4] << shift;
153 devpriv->mode2 |= data[5] << shift;
166 static int apci1032_cos_insn_bits(struct comedi_device *dev,
167 struct comedi_subdevice *s,
168 struct comedi_insn *insn,
176 static int apci1032_cos_cmdtest(struct comedi_device *dev,
177 struct comedi_subdevice *s,
178 struct comedi_cmd *cmd)
182 /* Step 1 : check if triggers are trivially valid */
184 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
185 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT);
186 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
187 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
188 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
193 /* Step 2a : make sure trigger sources are unique */
194 /* Step 2b : and mutually compatible */
199 /* Step 3: check if arguments are trivially valid */
201 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
202 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
203 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
204 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
205 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
210 /* step 4: ignored */
219 * Change-Of-State (COS) 'do_cmd' operation
221 * Enable the COS interrupt as configured by apci1032_cos_insn_config().
223 static int apci1032_cos_cmd(struct comedi_device *dev,
224 struct comedi_subdevice *s)
226 struct apci1032_private *devpriv = dev->private;
228 if (!devpriv->ctrl) {
229 dev_warn(dev->class_dev,
230 "Interrupts disabled due to mode configuration!\n");
234 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG);
235 outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG);
236 outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG);
241 static int apci1032_cos_cancel(struct comedi_device *dev,
242 struct comedi_subdevice *s)
244 return apci1032_reset(dev);
247 static irqreturn_t apci1032_interrupt(int irq, void *d)
249 struct comedi_device *dev = d;
250 struct apci1032_private *devpriv = dev->private;
251 struct comedi_subdevice *s = dev->read_subdev;
254 /* check interrupt is from this device */
255 if ((inl(devpriv->amcc_iobase + AMCC_OP_REG_INTCSR) &
256 INTCSR_INTR_ASSERTED) == 0)
259 /* check interrupt is enabled */
260 ctrl = inl(dev->iobase + APCI1032_CTRL_REG);
261 if ((ctrl & APCI1032_CTRL_INT_ENA) == 0)
264 /* disable the interrupt */
265 outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG);
267 s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff;
268 comedi_buf_put(s->async, s->state);
269 s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOS;
270 comedi_event(dev, s);
272 /* enable the interrupt */
273 outl(ctrl, dev->iobase + APCI1032_CTRL_REG);
278 static int apci1032_di_insn_bits(struct comedi_device *dev,
279 struct comedi_subdevice *s,
280 struct comedi_insn *insn,
283 data[1] = inl(dev->iobase + APCI1032_DI_REG);
288 static int apci1032_auto_attach(struct comedi_device *dev,
289 unsigned long context_unused)
291 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
292 struct apci1032_private *devpriv;
293 struct comedi_subdevice *s;
296 dev->board_name = dev->driver->driver_name;
298 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
301 dev->private = devpriv;
303 ret = comedi_pci_enable(pcidev, dev->board_name);
307 devpriv->amcc_iobase = pci_resource_start(pcidev, 0);
308 dev->iobase = pci_resource_start(pcidev, 1);
310 if (pcidev->irq > 0) {
311 ret = request_irq(pcidev->irq, apci1032_interrupt, IRQF_SHARED,
312 dev->board_name, dev);
314 dev->irq = pcidev->irq;
317 ret = comedi_alloc_subdevices(dev, 2);
321 /* Allocate and Initialise DI Subdevice Structures */
322 s = &dev->subdevices[0];
323 s->type = COMEDI_SUBD_DI;
324 s->subdev_flags = SDF_READABLE;
327 s->range_table = &range_digital;
328 s->insn_bits = apci1032_di_insn_bits;
330 /* Change-Of-State (COS) interrupt subdevice */
331 s = &dev->subdevices[1];
333 dev->read_subdev = s;
334 s->type = COMEDI_SUBD_DI | SDF_CMD_READ;
335 s->subdev_flags = SDF_READABLE;
338 s->range_table = &range_digital;
339 s->insn_config = apci1032_cos_insn_config;
340 s->insn_bits = apci1032_cos_insn_bits;
341 s->do_cmdtest = apci1032_cos_cmdtest;
342 s->do_cmd = apci1032_cos_cmd;
343 s->cancel = apci1032_cos_cancel;
345 s->type = COMEDI_SUBD_UNUSED;
351 static void apci1032_detach(struct comedi_device *dev)
353 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
358 free_irq(dev->irq, dev);
361 comedi_pci_disable(pcidev);
365 static struct comedi_driver apci1032_driver = {
366 .driver_name = "addi_apci_1032",
367 .module = THIS_MODULE,
368 .auto_attach = apci1032_auto_attach,
369 .detach = apci1032_detach,
372 static int apci1032_pci_probe(struct pci_dev *dev,
373 const struct pci_device_id *ent)
375 return comedi_pci_auto_config(dev, &apci1032_driver);
378 static void apci1032_pci_remove(struct pci_dev *dev)
380 comedi_pci_auto_unconfig(dev);
383 static DEFINE_PCI_DEVICE_TABLE(apci1032_pci_table) = {
384 { PCI_DEVICE(PCI_VENDOR_ID_ADDIDATA, 0x1003) },
387 MODULE_DEVICE_TABLE(pci, apci1032_pci_table);
389 static struct pci_driver apci1032_pci_driver = {
390 .name = "addi_apci_1032",
391 .id_table = apci1032_pci_table,
392 .probe = apci1032_pci_probe,
393 .remove = apci1032_pci_remove,
395 module_comedi_pci_driver(apci1032_driver, apci1032_pci_driver);
397 MODULE_AUTHOR("Comedi http://www.comedi.org");
398 MODULE_DESCRIPTION("Comedi low-level driver");
399 MODULE_LICENSE("GPL");