drivers/staging/comedi/drivers/addi-data/hwdrv_apci1500.c

   1 /**
   2 @verbatim
   3
   4 Copyright (C) 2004,2005  ADDI-DATA GmbH for the source code of this module.
   5
   6         ADDI-DATA GmbH
   7         Dieselstrasse 3
   8         D-77833 Ottersweier
   9         Tel: +19(0)7223/9493-0
  10         Fax: +49(0)7223/9493-92
  11         http://www.addi-data.com
  12         info@addi-data.com
  13
  14 This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
  15
  16 This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19
  20 You should also find the complete GPL in the COPYING file accompanying this source code.
  21
  22 @endverbatim
  23 */
  24 /*
  25
  26   +-----------------------------------------------------------------------+
  27   | (C) ADDI-DATA GmbH          Dieselstraße 3       D-77833 Ottersweier  |
  28   +-----------------------------------------------------------------------+
  29   | Tel : +49 (0) 7223/9493-0     | email    : info@addi-data.com         |
  30   | Fax : +49 (0) 7223/9493-92    | Internet : http://www.addi-data.com   |
  31   +-------------------------------+---------------------------------------+
  32   | Project     : APCI-1500       | Compiler   : GCC                      |
  33   | Module name : hwdrv_apci1500.c| Version    : 2.96                     |
  34   +-------------------------------+---------------------------------------+
  35   | Project manager: Eric Stolz   | Date       :  02/12/2002              |
  36   +-------------------------------+---------------------------------------+
  37   | Description :   Hardware Layer Access For APCI-1500                   |
  38   +-----------------------------------------------------------------------+
  39   |                             UPDATES                                   |
  40   +----------+-----------+------------------------------------------------+
  41   |   Date   |   Author  |          Description of updates                |
  42   +----------+-----------+------------------------------------------------+
  43   |          |           |                                                |
  44   |          |           |                                                |
  45   |          |           |                                                |
  46   +----------+-----------+------------------------------------------------+
  47 */
  48
  49 /*********      Definitions for APCI-1500 card  *****/
  50
  51 /* Card Specific information */
  52 #define APCI1500_ADDRESS_RANGE          4
  53
  54 /* DIGITAL INPUT-OUTPUT DEFINE */
  55
  56 #define APCI1500_DIGITAL_OP             2
  57 #define APCI1500_DIGITAL_IP             0
  58 #define APCI1500_AND                    2
  59 #define APCI1500_OR                     4
  60 #define APCI1500_OR_PRIORITY            6
  61 #define APCI1500_CLK_SELECT             0
  62 #define COUNTER1                        0
  63 #define COUNTER2                        1
  64 #define COUNTER3                        2
  65 #define APCI1500_COUNTER                0x20
  66 #define APCI1500_TIMER                  0
  67 #define APCI1500_WATCHDOG               0
  68 #define APCI1500_SINGLE                 0
  69 #define APCI1500_CONTINUOUS             0x80
  70 #define APCI1500_DISABLE                0
  71 #define APCI1500_ENABLE                 1
  72 #define APCI1500_SOFTWARE_TRIGGER       0x4
  73 #define APCI1500_HARDWARE_TRIGGER       0x10
  74 #define APCI1500_SOFTWARE_GATE          0
  75 #define APCI1500_HARDWARE_GATE          0x8
  76 #define START                           0
  77 #define STOP                            1
  78 #define TRIGGER                         2
  79
  80 /*
  81  * Zillog I/O enumeration
  82  */
  83 enum {
  84         APCI1500_Z8536_PORT_C,
  85         APCI1500_Z8536_PORT_B,
  86         APCI1500_Z8536_PORT_A,
  87         APCI1500_Z8536_CONTROL_REGISTER
  88 };
  89
  90 /*
  91  * Z8536 CIO Internal Address
  92  */
  93 enum {
  94         APCI1500_RW_MASTER_INTERRUPT_CONTROL,
  95         APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
  96         APCI1500_RW_PORT_A_INTERRUPT_CONTROL,
  97         APCI1500_RW_PORT_B_INTERRUPT_CONTROL,
  98         APCI1500_RW_TIMER_COUNTER_INTERRUPT_VECTOR,
  99         APCI1500_RW_PORT_C_DATA_PCITCH_POLARITY,
 100         APCI1500_RW_PORT_C_DATA_DIRECTION,
 101         APCI1500_RW_PORT_C_SPECIAL_IO_CONTROL,
 102
 103         APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
 104         APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
 105         APCI1500_RW_CPT_TMR1_CMD_STATUS,
 106         APCI1500_RW_CPT_TMR2_CMD_STATUS,
 107         APCI1500_RW_CPT_TMR3_CMD_STATUS,
 108         APCI1500_RW_PORT_A_DATA,
 109         APCI1500_RW_PORT_B_DATA,
 110         APCI1500_RW_PORT_C_DATA,
 111
 112         APCI1500_R_CPT_TMR1_VALUE_HIGH,
 113         APCI1500_R_CPT_TMR1_VALUE_LOW,
 114         APCI1500_R_CPT_TMR2_VALUE_HIGH,
 115         APCI1500_R_CPT_TMR2_VALUE_LOW,
 116         APCI1500_R_CPT_TMR3_VALUE_HIGH,
 117         APCI1500_R_CPT_TMR3_VALUE_LOW,
 118         APCI1500_RW_CPT_TMR1_TIME_CST_HIGH,
 119         APCI1500_RW_CPT_TMR1_TIME_CST_LOW,
 120         APCI1500_RW_CPT_TMR2_TIME_CST_HIGH,
 121         APCI1500_RW_CPT_TMR2_TIME_CST_LOW,
 122         APCI1500_RW_CPT_TMR3_TIME_CST_HIGH,
 123         APCI1500_RW_CPT_TMR3_TIME_CST_LOW,
 124         APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION,
 125         APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION,
 126         APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION,
 127         APCI1500_R_CURRENT_VECTOR,
 128
 129         APCI1500_RW_PORT_A_SPECIFICATION,
 130         APCI1500_RW_PORT_A_HANDSHAKE_SPECIFICATION,
 131         APCI1500_RW_PORT_A_DATA_PCITCH_POLARITY,
 132         APCI1500_RW_PORT_A_DATA_DIRECTION,
 133         APCI1500_RW_PORT_A_SPECIAL_IO_CONTROL,
 134         APCI1500_RW_PORT_A_PATTERN_POLARITY,
 135         APCI1500_RW_PORT_A_PATTERN_TRANSITION,
 136         APCI1500_RW_PORT_A_PATTERN_MASK,
 137
 138         APCI1500_RW_PORT_B_SPECIFICATION,
 139         APCI1500_RW_PORT_B_HANDSHAKE_SPECIFICATION,
 140         APCI1500_RW_PORT_B_DATA_PCITCH_POLARITY,
 141         APCI1500_RW_PORT_B_DATA_DIRECTION,
 142         APCI1500_RW_PORT_B_SPECIAL_IO_CONTROL,
 143         APCI1500_RW_PORT_B_PATTERN_POLARITY,
 144         APCI1500_RW_PORT_B_PATTERN_TRANSITION,
 145         APCI1500_RW_PORT_B_PATTERN_MASK
 146 };
 147
 148 static int i_TimerCounter1Init = 0;
 149 static int i_TimerCounter2Init = 0;
 150 static int i_WatchdogCounter3Init = 0;
 151 static int i_Event1Status = 0, i_Event2Status = 0;
 152 static int i_TimerCounterWatchdogInterrupt = 0;
 153 static int i_Logic = 0, i_CounterLogic = 0;
 154 static int i_InterruptMask = 0;
 155 static int i_InputChannel = 0;
 156 static int i_TimerCounter1Enabled = 0, i_TimerCounter2Enabled = 0,
 157            i_WatchdogCounter3Enabled = 0;
 158
 159 /*
 160   +----------------------------------------------------------------------------+
 161 | Function   Name   : int i_APCI1500_ConfigDigitalInputEvent                 |
 162 |                         (struct comedi_device *dev,struct comedi_subdevice *s,               |
 163 |                      struct comedi_insn *insn,unsigned int *data)                     |
 164 +----------------------------------------------------------------------------+
 165 | Task              : An event can be generated for each port.               |
 166 |                     The first event is related to the first 8 channels     |
 167 |                     (port 1) and the second to the following 6 channels    |
 168 |                     (port 2). An interrupt is generated when one or both   |
 169 |                     events have occurred                                   |
 170 +----------------------------------------------------------------------------+
 171 | Input Parameters  : struct comedi_device *dev : Driver handle                     |
 172 |                     unsigned int *data     : Data Pointer contains             |
 173 |                                          configuration parameters as below |
 174 |                                                                            |
 175 |                         data[0]            :Number of the input port on        |
 176 |                                         which the event will take place    |
 177 |                                         (1 or 2)
 178 |                      data[1]            : The event logic for port 1 has    |
 179 |                                            three possibilities             |
 180 |                                        :0  APCI1500_AND       :This logic  |
 181 |                                                                links       |
 182 |                                                                the inputs  |
 183 |                                                                with an AND |
 184 |                                                                logic.      |
 185 |                                          1 APCI1500_OR        :This logic  |
 186 |                                                                links       |
 187 |                                                                the inputs  |
 188 |                                                                with a      |
 189 |                                                                OR logic.   |
 190 |                                          2    APCI1500_OR_PRIORITY        |
 191 |                                                               :This logic                          |
 192 |                                                                links       |
 193 |                                                                the inputs  |
 194 |                                                                with a      |
 195 |                                                                priority    |
 196 |                                                                OR logic.   |
 197 |                                                                Input 1     |
 198 |                                                                has the     |
 199 |                                                                highest     |
 200 |                                                                priority    |
 201 |                                                                level and   |
 202 |                                                                input   8   |
 203 |                                                                the smallest|
 204 |                                            For the second port the user has|
 205 |                                            1 possibility:                  |
 206 |                                            APCI1500_OR        :This logic  |
 207 |                                                                links       |
 208 |                                                                the inputs  |
 209 |                                                                with a      |
 210 |                                                                polarity    |
 211 |                                                                OR logic    |
 212 |                     data[2]              : These 8-character word for port1|
 213 |                                            and 6-character word for port 2 |
 214 |                                            give the mask of the event.     |
 215 |                                            Each place gives the state      |
 216 |                                            of the input channels and can   |
 217 |                                            have one of these six characters|
 218 |                                                     |
 219 |                                       0  : This input must be on 0         |
 220 |                                       1  : This input must be on 1         |
 221 |                                       2  : This input reacts to            |
 222 |                                            a falling edge                  |
 223 |                                       3  : This input reacts to a          |
 224 |                                            rising edge                     |
 225 |                                       4  : This input reacts to both edges |
 226 |
 227 |                                                               5  : This input is not               |
 228 |                                            used for event                              |
 229 +----------------------------------------------------------------------------+
 230 | Output Parameters :   --                                                                                                       |
 231 +----------------------------------------------------------------------------+
 232 | Return Value      : TRUE  : No error occur                                 |
 233 |                           : FALSE : Error occur. Return the error          |
 234 |                                                                                |
 235 +----------------------------------------------------------------------------+
 236 */
 237 static int i_APCI1500_ConfigDigitalInputEvent(struct comedi_device *dev,
 238                                               struct comedi_subdevice *s,
 239                                               struct comedi_insn *insn,
 240                                               unsigned int *data)
 241 {
 242         struct addi_private *devpriv = dev->private;
 243         int i_PatternPolarity = 0, i_PatternTransition = 0, i_PatternMask = 0;
 244         int i_MaxChannel = 0, i_Count = 0, i_EventMask = 0;
 245         int i_PatternTransitionCount = 0, i_RegValue;
 246         int i;
 247
 248       /*************************************************/
 249         /* Selects the master interrupt control register */
 250       /*************************************************/
 251         outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
 252                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 253       /**********************************************/
 254         /* Disables  the main interrupt on the board */
 255       /**********************************************/
 256         outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 257
 258         if (data[0] == 1) {
 259                 i_MaxChannel = 8;
 260         }                       /*  if (data[0] == 1) */
 261         else {
 262                 if (data[0] == 2) {
 263                         i_MaxChannel = 6;
 264                 }               /*  if(data[0]==2) */
 265                 else {
 266                         printk("\nThe specified port event  does not exist\n");
 267                         return -EINVAL;
 268                 }               /* else if(data[0]==2) */
 269         }                       /* else  if (data[0] == 1) */
 270         switch (data[1]) {
 271         case 0:
 272                 data[1] = APCI1500_AND;
 273                 break;
 274         case 1:
 275                 data[1] = APCI1500_OR;
 276                 break;
 277         case 2:
 278                 data[1] = APCI1500_OR_PRIORITY;
 279                 break;
 280         default:
 281                 printk("\nThe specified interrupt logic does not exist\n");
 282                 return -EINVAL;
 283         }                       /* switch(data[1]); */
 284
 285         i_Logic = data[1];
 286         for (i_Count = i_MaxChannel, i = 0; i_Count > 0; i_Count--, i++) {
 287                 i_EventMask = data[2 + i];
 288                 switch (i_EventMask) {
 289                 case 0:
 290                         i_PatternMask =
 291                                 i_PatternMask | (1 << (i_MaxChannel - i_Count));
 292                         break;
 293                 case 1:
 294                         i_PatternMask =
 295                                 i_PatternMask | (1 << (i_MaxChannel - i_Count));
 296                         i_PatternPolarity =
 297                                 i_PatternPolarity | (1 << (i_MaxChannel -
 298                                         i_Count));
 299                         break;
 300                 case 2:
 301                         i_PatternMask =
 302                                 i_PatternMask | (1 << (i_MaxChannel - i_Count));
 303                         i_PatternTransition =
 304                                 i_PatternTransition | (1 << (i_MaxChannel -
 305                                         i_Count));
 306                         break;
 307                 case 3:
 308                         i_PatternMask =
 309                                 i_PatternMask | (1 << (i_MaxChannel - i_Count));
 310                         i_PatternPolarity =
 311                                 i_PatternPolarity | (1 << (i_MaxChannel -
 312                                         i_Count));
 313                         i_PatternTransition =
 314                                 i_PatternTransition | (1 << (i_MaxChannel -
 315                                         i_Count));
 316                         break;
 317                 case 4:
 318                         i_PatternTransition =
 319                                 i_PatternTransition | (1 << (i_MaxChannel -
 320                                         i_Count));
 321                         break;
 322                 case 5:
 323                         break;
 324                 default:
 325                         printk("\nThe option indicated in the event mask does not exist\n");
 326                         return -EINVAL;
 327                 }               /*  switch(i_EventMask) */
 328         }                       /* for (i_Count = i_MaxChannel; i_Count >0;i_Count --) */
 329
 330         if (data[0] == 1) {
 331                     /****************************/
 332                 /* Test the interrupt logic */
 333                     /****************************/
 334
 335                 if (data[1] == APCI1500_AND ||
 336                         data[1] == APCI1500_OR ||
 337                         data[1] == APCI1500_OR_PRIORITY) {
 338                        /**************************************/
 339                         /* Tests if a transition was declared */
 340                         /* for a OR PRIORITY logic            */
 341                        /**************************************/
 342
 343                         if (data[1] == APCI1500_OR_PRIORITY
 344                                 && i_PatternTransition != 0) {
 345                               /********************************************/
 346                                 /* Transition error on an OR PRIORITY logic */
 347                               /********************************************/
 348                                 printk("\nTransition error on an OR PRIORITY logic\n");
 349                                 return -EINVAL;
 350                         }       /*  if (data[1]== APCI1500_OR_PRIORITY && i_PatternTransition != 0) */
 351
 352                        /*************************************/
 353                         /* Tests if more than one transition */
 354                         /* was declared for an AND logic     */
 355                        /*************************************/
 356
 357                         if (data[1] == APCI1500_AND) {
 358                                 for (i_Count = 0; i_Count < 8; i_Count++) {
 359                                         i_PatternTransitionCount =
 360                                                 i_PatternTransitionCount +
 361                                                 ((i_PatternTransition >>
 362                                                         i_Count) & 0x1);
 363
 364                                 }       /* for (i_Count = 0; i_Count < 8; i_Count++) */
 365
 366                                 if (i_PatternTransitionCount > 1) {
 367                                   /****************************************/
 368                                         /* Transition error on an AND logic     */
 369                                   /****************************************/
 370                                         printk("\n Transition error on an AND logic\n");
 371                                         return -EINVAL;
 372                                 }       /*  if (i_PatternTransitionCount > 1) */
 373                         }       /*  if (data[1]== APCI1500_AND) */
 374
 375                             /*****************************************************************/
 376                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 377                             /*****************************************************************/
 378                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
 379                                 devpriv->iobase +
 380                                 APCI1500_Z8536_CONTROL_REGISTER);
 381                         /******************/
 382                         /* Disable Port A */
 383                             /******************/
 384                         outb(0xF0,
 385                                 devpriv->iobase +
 386                                 APCI1500_Z8536_CONTROL_REGISTER);
 387                         /**********************************************/
 388                         /* Selects the polarity register of port 1    */
 389                             /**********************************************/
 390                         outb(APCI1500_RW_PORT_A_PATTERN_POLARITY,
 391                                 devpriv->iobase +
 392                                 APCI1500_Z8536_CONTROL_REGISTER);
 393                         outb(i_PatternPolarity,
 394                                 devpriv->iobase +
 395                                 APCI1500_Z8536_CONTROL_REGISTER);
 396
 397                         /*********************************************/
 398                         /* Selects the pattern mask register of      */
 399                         /* port 1                                    */
 400                             /*********************************************/
 401                         outb(APCI1500_RW_PORT_A_PATTERN_MASK,
 402                                 devpriv->iobase +
 403                                 APCI1500_Z8536_CONTROL_REGISTER);
 404                         outb(i_PatternMask,
 405                                 devpriv->iobase +
 406                                 APCI1500_Z8536_CONTROL_REGISTER);
 407                         /********************************************/
 408                         /* Selects the pattern transition register  */
 409                         /* of port 1                                */
 410                             /********************************************/
 411                         outb(APCI1500_RW_PORT_A_PATTERN_TRANSITION,
 412                                 devpriv->iobase +
 413                                 APCI1500_Z8536_CONTROL_REGISTER);
 414                         outb(i_PatternTransition,
 415                                 devpriv->iobase +
 416                                 APCI1500_Z8536_CONTROL_REGISTER);
 417
 418                       /******************************************/
 419                         /* Selects the mode specification mask    */
 420                         /* register of port 1                     */
 421                           /******************************************/
 422                         outb(APCI1500_RW_PORT_A_SPECIFICATION,
 423                                 devpriv->iobase +
 424                                 APCI1500_Z8536_CONTROL_REGISTER);
 425                         i_RegValue =
 426                                 inb(devpriv->iobase +
 427                                 APCI1500_Z8536_CONTROL_REGISTER);
 428
 429                       /******************************************/
 430                         /* Selects the mode specification mask    */
 431                         /* register of port 1                     */
 432                           /******************************************/
 433                         outb(APCI1500_RW_PORT_A_SPECIFICATION,
 434                                 devpriv->iobase +
 435                                 APCI1500_Z8536_CONTROL_REGISTER);
 436
 437                       /**********************/
 438                         /* Port A new mode    */
 439                           /**********************/
 440
 441                         i_RegValue = (i_RegValue & 0xF9) | data[1] | 0x9;
 442                         outb(i_RegValue,
 443                                 devpriv->iobase +
 444                                 APCI1500_Z8536_CONTROL_REGISTER);
 445
 446                         i_Event1Status = 1;
 447
 448                       /*****************************************************************/
 449                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 450                           /*****************************************************************/
 451
 452                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
 453                                 devpriv->iobase +
 454                                 APCI1500_Z8536_CONTROL_REGISTER);
 455                       /*****************/
 456                         /* Enable Port A */
 457                           /*****************/
 458                         outb(0xF4,
 459                                 devpriv->iobase +
 460                                 APCI1500_Z8536_CONTROL_REGISTER);
 461
 462                 }               /*  if(data[1]==APCI1500_AND||data[1]==APCI1500_OR||data[1]==APCI1500_OR_PRIORITY) */
 463                 else {
 464                         printk("\nThe choice for interrupt logic does not exist\n");
 465                         return -EINVAL;
 466                 }               /*  else }// if(data[1]==APCI1500_AND||data[1]==APCI1500_OR||data[1]==APCI1500_OR_PRIORITY) */
 467         }                       /*    if (data[0]== 1) */
 468
 469                  /************************************/
 470         /* Test if event setting for port 2 */
 471                  /************************************/
 472
 473         if (data[0] == 2) {
 474                     /************************/
 475                 /* Test the event logic */
 476                     /************************/
 477
 478                 if (data[1] == APCI1500_OR) {
 479                        /*****************************************************************/
 480                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 481                        /*****************************************************************/
 482                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
 483                                 devpriv->iobase +
 484                                 APCI1500_Z8536_CONTROL_REGISTER);
 485                        /******************/
 486                         /* Disable Port B */
 487                        /******************/
 488                         outb(0x74,
 489                                 devpriv->iobase +
 490                                 APCI1500_Z8536_CONTROL_REGISTER);
 491                        /****************************************/
 492                         /* Selects the mode specification mask  */
 493                         /* register of port B                   */
 494                        /****************************************/
 495                         outb(APCI1500_RW_PORT_B_SPECIFICATION,
 496                                 devpriv->iobase +
 497                                 APCI1500_Z8536_CONTROL_REGISTER);
 498                         i_RegValue =
 499                                 inb(devpriv->iobase +
 500                                 APCI1500_Z8536_CONTROL_REGISTER);
 501
 502                        /******************************************/
 503                         /* Selects the mode specification mask    */
 504                         /* register of port B                     */
 505                        /******************************************/
 506                         outb(APCI1500_RW_PORT_B_SPECIFICATION,
 507                                 devpriv->iobase +
 508                                 APCI1500_Z8536_CONTROL_REGISTER);
 509                         i_RegValue = i_RegValue & 0xF9;
 510                         outb(i_RegValue,
 511                                 devpriv->iobase +
 512                                 APCI1500_Z8536_CONTROL_REGISTER);
 513
 514                        /**********************************/
 515                         /* Selects error channels 1 and 2 */
 516                        /**********************************/
 517
 518                         i_PatternMask = (i_PatternMask | 0xC0);
 519                         i_PatternPolarity = (i_PatternPolarity | 0xC0);
 520                         i_PatternTransition = (i_PatternTransition | 0xC0);
 521
 522                        /**********************************************/
 523                         /* Selects the polarity register of port 2    */
 524                        /**********************************************/
 525                         outb(APCI1500_RW_PORT_B_PATTERN_POLARITY,
 526                                 devpriv->iobase +
 527                                 APCI1500_Z8536_CONTROL_REGISTER);
 528                         outb(i_PatternPolarity,
 529                                 devpriv->iobase +
 530                                 APCI1500_Z8536_CONTROL_REGISTER);
 531                        /**********************************************/
 532                         /* Selects the pattern transition register    */
 533                         /* of port 2                                  */
 534                        /**********************************************/
 535                         outb(APCI1500_RW_PORT_B_PATTERN_TRANSITION,
 536                                 devpriv->iobase +
 537                                 APCI1500_Z8536_CONTROL_REGISTER);
 538                         outb(i_PatternTransition,
 539                                 devpriv->iobase +
 540                                 APCI1500_Z8536_CONTROL_REGISTER);
 541                        /**********************************************/
 542                         /* Selects the pattern Mask register    */
 543                         /* of port 2                                  */
 544                        /**********************************************/
 545
 546                         outb(APCI1500_RW_PORT_B_PATTERN_MASK,
 547                                 devpriv->iobase +
 548                                 APCI1500_Z8536_CONTROL_REGISTER);
 549                         outb(i_PatternMask,
 550                                 devpriv->iobase +
 551                                 APCI1500_Z8536_CONTROL_REGISTER);
 552
 553                        /******************************************/
 554                         /* Selects the mode specification mask    */
 555                         /* register of port 2                     */
 556                        /******************************************/
 557                         outb(APCI1500_RW_PORT_B_SPECIFICATION,
 558                                 devpriv->iobase +
 559                                 APCI1500_Z8536_CONTROL_REGISTER);
 560                         i_RegValue =
 561                                 inb(devpriv->iobase +
 562                                 APCI1500_Z8536_CONTROL_REGISTER);
 563                        /******************************************/
 564                         /* Selects the mode specification mask    */
 565                         /* register of port 2                     */
 566                        /******************************************/
 567                         outb(APCI1500_RW_PORT_B_SPECIFICATION,
 568                                 devpriv->iobase +
 569                                 APCI1500_Z8536_CONTROL_REGISTER);
 570                         i_RegValue = (i_RegValue & 0xF9) | 4;
 571                         outb(i_RegValue,
 572                                 devpriv->iobase +
 573                                 APCI1500_Z8536_CONTROL_REGISTER);
 574
 575                         i_Event2Status = 1;
 576                        /*****************************************************************/
 577                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 578                        /*****************************************************************/
 579
 580                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
 581                                 devpriv->iobase +
 582                                 APCI1500_Z8536_CONTROL_REGISTER);
 583                        /*****************/
 584                         /* Enable Port B */
 585                        /*****************/
 586
 587                         outb(0xF4,
 588                                 devpriv->iobase +
 589                                 APCI1500_Z8536_CONTROL_REGISTER);
 590                 }               /*   if (data[1] == APCI1500_OR) */
 591                 else {
 592                         printk("\nThe choice for interrupt logic does not exist\n");
 593                         return -EINVAL;
 594                 }               /* elseif (data[1] == APCI1500_OR) */
 595         }                       /* if(data[0]==2) */
 596
 597         return insn->n;
 598 }
 599
 600 /*
 601 +----------------------------------------------------------------------------+
 602 | Function   Name   : int i_APCI1500_StartStopInputEvent                     |
 603 |                         (struct comedi_device *dev,struct comedi_subdevice *s,               |
 604 |                      struct comedi_insn *insn,unsigned int *data)                     |
 605 +----------------------------------------------------------------------------+
 606 | Task              :  Allows or disallows a port event                      |
 607 +----------------------------------------------------------------------------+
 608 | Input Parameters  : struct comedi_device *dev      : Driver handle                |
 609 |                             unsigned int ui_Channel : Channel number to read       |
 610 |                     unsigned int *data          : Data Pointer to read status  |
 611 |                      data[0]                 :0 Start input event
 612 |                                               1 Stop input event
 613 |                      data[1]                 :No of port (1 or 2)
 614 +----------------------------------------------------------------------------+
 615 | Output Parameters :   --                                                                                                       |
 616 +----------------------------------------------------------------------------+
 617 | Return Value      : TRUE  : No error occur                                 |
 618 |                           : FALSE : Error occur. Return the error          |
 619 |                                                                                |
 620 +----------------------------------------------------------------------------+
 621 */
 622 static int i_APCI1500_StartStopInputEvent(struct comedi_device *dev,
 623                                           struct comedi_subdevice *s,
 624                                           struct comedi_insn *insn,
 625                                           unsigned int *data)
 626 {
 627         struct addi_private *devpriv = dev->private;
 628         int i_Event1InterruptStatus = 0, i_Event2InterruptStatus =
 629                 0, i_RegValue;
 630
 631         switch (data[0]) {
 632         case START:
 633               /*************************/
 634                 /* Tests the port number */
 635               /*************************/
 636
 637                 if (data[1] == 1 || data[1] == 2) {
 638                   /***************************/
 639                         /* Test if port 1 selected */
 640                   /***************************/
 641
 642                         if (data[1] == 1) {
 643                     /*****************************/
 644                                 /* Test if event initialised */
 645                     /*****************************/
 646                                 if (i_Event1Status == 1) {
 647                        /*****************************************************************/
 648                                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 649                        /*****************************************************************/
 650                                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 651                        /******************/
 652                                         /* Disable Port A */
 653                        /******************/
 654                                         outb(0xF0,
 655                                                 devpriv->iobase +
 656                                                 APCI1500_Z8536_CONTROL_REGISTER);
 657                        /***************************************************/
 658                                         /* Selects the command and status register of      */
 659                                         /* port 1                                          */
 660                        /***************************************************/
 661                                         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 662                        /*************************************/
 663                                         /* Allows the pattern interrupt      */
 664                        /*************************************/
 665                                         outb(0xC0,
 666                                                 devpriv->iobase +
 667                                                 APCI1500_Z8536_CONTROL_REGISTER);
 668                        /*****************************************************************/
 669                                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 670                        /*****************************************************************/
 671                                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 672                        /*****************/
 673                                         /* Enable Port A */
 674                        /*****************/
 675                                         outb(0xF4,
 676                                                 devpriv->iobase +
 677                                                 APCI1500_Z8536_CONTROL_REGISTER);
 678                                         i_Event1InterruptStatus = 1;
 679                                         outb(APCI1500_RW_PORT_A_SPECIFICATION,
 680                                                 devpriv->iobase +
 681                                                 APCI1500_Z8536_CONTROL_REGISTER);
 682                                         i_RegValue =
 683                                                 inb(devpriv->iobase +
 684                                                 APCI1500_Z8536_CONTROL_REGISTER);
 685
 686                                         /* Selects the master interrupt control register */
 687                        /*************************************************/
 688                                         outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 689                        /**********************************************/
 690                                         /* Authorizes the main interrupt on the board */
 691                        /**********************************************/
 692                                         outb(0xD0,
 693                                                 devpriv->iobase +
 694                                                 APCI1500_Z8536_CONTROL_REGISTER);
 695
 696                                 }       /*  if(i_Event1Status==1) */
 697                                 else {
 698                                         printk("\nEvent 1 not initialised\n");
 699                                         return -EINVAL;
 700                                 }       /* else if(i_Event1Status==1) */
 701                         }       /* if (data[1]==1) */
 702                         if (data[1] == 2) {
 703
 704                                 if (i_Event2Status == 1) {
 705                             /*****************************************************************/
 706                                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 707                             /*****************************************************************/
 708                                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 709                        /******************/
 710                                         /* Disable Port B */
 711                        /******************/
 712                                         outb(0x74,
 713                                                 devpriv->iobase +
 714                                                 APCI1500_Z8536_CONTROL_REGISTER);
 715                        /***************************************************/
 716                                         /* Selects the command and status register of      */
 717                                         /* port 2                                          */
 718                        /***************************************************/
 719                                         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 720                        /*************************************/
 721                                         /* Allows the pattern interrupt      */
 722                        /*************************************/
 723                                         outb(0xC0,
 724                                                 devpriv->iobase +
 725                                                 APCI1500_Z8536_CONTROL_REGISTER);
 726                        /*****************************************************************/
 727                                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 728                        /*****************************************************************/
 729                                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 730                        /*****************/
 731                                         /* Enable Port B */
 732                        /*****************/
 733                                         outb(0xF4,
 734                                                 devpriv->iobase +
 735                                                 APCI1500_Z8536_CONTROL_REGISTER);
 736
 737                                         /* Selects the master interrupt control register */
 738                        /*************************************************/
 739                                         outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 740                        /**********************************************/
 741                                         /* Authorizes the main interrupt on the board */
 742                        /**********************************************/
 743                                         outb(0xD0,
 744                                                 devpriv->iobase +
 745                                                 APCI1500_Z8536_CONTROL_REGISTER);
 746                                         i_Event2InterruptStatus = 1;
 747                                 }       /*  if(i_Event2Status==1) */
 748                                 else {
 749                                         printk("\nEvent 2 not initialised\n");
 750                                         return -EINVAL;
 751                                 }       /* else if(i_Event2Status==1) */
 752                         }       /*  if(data[1]==2) */
 753                 }               /*  if (data[1] == 1 || data[0] == 2) */
 754                 else {
 755                         printk("\nThe port parameter is in error\n");
 756                         return -EINVAL;
 757                 }               /* else if (data[1] == 1 || data[0] == 2) */
 758
 759                 break;
 760
 761         case STOP:
 762                   /*************************/
 763                 /* Tests the port number */
 764                   /*************************/
 765
 766                 if (data[1] == 1 || data[1] == 2) {
 767                   /***************************/
 768                         /* Test if port 1 selected */
 769                   /***************************/
 770
 771                         if (data[1] == 1) {
 772                     /*****************************/
 773                                 /* Test if event initialised */
 774                     /*****************************/
 775                                 if (i_Event1Status == 1) {
 776                        /*****************************************************************/
 777                                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 778                        /*****************************************************************/
 779                                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 780                        /******************/
 781                                         /* Disable Port A */
 782                        /******************/
 783                                         outb(0xF0,
 784                                                 devpriv->iobase +
 785                                                 APCI1500_Z8536_CONTROL_REGISTER);
 786                        /***************************************************/
 787                                         /* Selects the command and status register of      */
 788                                         /* port 1                                          */
 789                        /***************************************************/
 790                                         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 791                        /*************************************/
 792                                         /* Inhibits the pattern interrupt      */
 793                        /*************************************/
 794                                         outb(0xE0,
 795                                                 devpriv->iobase +
 796                                                 APCI1500_Z8536_CONTROL_REGISTER);
 797                        /*****************************************************************/
 798                                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 799                        /*****************************************************************/
 800                                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 801                        /*****************/
 802                                         /* Enable Port A */
 803                        /*****************/
 804                                         outb(0xF4,
 805                                                 devpriv->iobase +
 806                                                 APCI1500_Z8536_CONTROL_REGISTER);
 807                                         i_Event1InterruptStatus = 0;
 808                                 }       /*  if(i_Event1Status==1) */
 809                                 else {
 810                                         printk("\nEvent 1 not initialised\n");
 811                                         return -EINVAL;
 812                                 }       /* else if(i_Event1Status==1) */
 813                         }       /* if (data[1]==1) */
 814                         if (data[1] == 2) {
 815                          /*****************************/
 816                                 /* Test if event initialised */
 817                          /*****************************/
 818                                 if (i_Event2Status == 1) {
 819                           /*****************************************************************/
 820                                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 821                           /*****************************************************************/
 822                                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 823                           /******************/
 824                                         /* Disable Port B */
 825                           /******************/
 826                                         outb(0x74,
 827                                                 devpriv->iobase +
 828                                                 APCI1500_Z8536_CONTROL_REGISTER);
 829                           /***************************************************/
 830                                         /* Selects the command and status register of      */
 831                                         /* port 2                                         */
 832                           /***************************************************/
 833                                         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 834                        /*************************************/
 835                                         /* Inhibits the pattern interrupt      */
 836                        /*************************************/
 837                                         outb(0xE0,
 838                                                 devpriv->iobase +
 839                                                 APCI1500_Z8536_CONTROL_REGISTER);
 840                        /*****************************************************************/
 841                                         /* Selects the APCI1500_RW_MASTER_CONFIGURATION_CONTROL register */
 842                        /*****************************************************************/
 843                                         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 844                        /*****************/
 845                                         /* Enable Port B */
 846                        /*****************/
 847                                         outb(0xF4,
 848                                                 devpriv->iobase +
 849                                                 APCI1500_Z8536_CONTROL_REGISTER);
 850                                         i_Event2InterruptStatus = 0;
 851                                 }       /*  if(i_Event2Status==1) */
 852                                 else {
 853                                         printk("\nEvent 2 not initialised\n");
 854                                         return -EINVAL;
 855                                 }       /* else if(i_Event2Status==1) */
 856                         }       /* if(data[1]==2) */
 857
 858                 }               /*  if (data[1] == 1 || data[1] == 2) */
 859                 else {
 860                         printk("\nThe port parameter is in error\n");
 861                         return -EINVAL;
 862                 }               /* else if (data[1] == 1 || data[1] == 2) */
 863                 break;
 864         default:
 865                 printk("\nThe option of START/STOP logic does not exist\n");
 866                 return -EINVAL;
 867         }                       /* switch(data[0]) */
 868
 869         return insn->n;
 870 }
 871
 872 /*
 873 +----------------------------------------------------------------------------+
 874 | Function   Name   : int i_APCI1500_Initialisation                          |
 875 |                         (struct comedi_device *dev,struct comedi_subdevice *s,               |
 876 |                      struct comedi_insn *insn,unsigned int *data)                     |
 877 +----------------------------------------------------------------------------+
 878 | Task              : Return the status of the digital input                 |
 879 +----------------------------------------------------------------------------+
 880 | Input Parameters  : struct comedi_device *dev      : Driver handle                |
 881 |                             unsigned int ui_Channel : Channel number to read       |
 882 |                     unsigned int *data          : Data Pointer to read status  |
 883 +----------------------------------------------------------------------------+
 884 | Output Parameters :   --                                                                                                       |
 885 +----------------------------------------------------------------------------+
 886 | Return Value      : TRUE  : No error occur                                 |
 887 |                           : FALSE : Error occur. Return the error          |
 888 |                                                                                |
 889 +----------------------------------------------------------------------------+
 890 */
 891 static int i_APCI1500_Initialisation(struct comedi_device *dev,
 892                                      struct comedi_subdevice *s,
 893                                      struct comedi_insn *insn,
 894                                      unsigned int *data)
 895 {
 896         struct addi_private *devpriv = dev->private;
 897         int i_DummyRead = 0;
 898
 899     /******************/
 900         /* Software reset */
 901     /******************/
 902         i_DummyRead = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 903         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 904         i_DummyRead = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 905         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 906         outb(1, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 907         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 908
 909  /*****************************************************/
 910         /* Selects the master configuration control register */
 911  /*****************************************************/
 912         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
 913                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 914         outb(0xF4, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 915
 916         /*****************************************************/
 917         /* Selects the mode specification register of port A */
 918         /*****************************************************/
 919         outb(APCI1500_RW_PORT_A_SPECIFICATION,
 920                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 921         outb(0x10, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 922
 923         /* Selects the data path polarity register of port A */
 924         outb(APCI1500_RW_PORT_A_DATA_PCITCH_POLARITY,
 925                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 926         /* High level of port A means 1 */
 927         outb(0xFF, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 928
 929         /* Selects the data direction register of port A */
 930         outb(APCI1500_RW_PORT_A_DATA_DIRECTION,
 931                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 932         /* All bits used as inputs */
 933         outb(0xFF, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 934         /* Selects the command and status register of port A */
 935         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
 936                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 937         /* Deletes IP and IUS */
 938         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 939         /*  Selects the command and status register of port A */
 940         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
 941                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 942         /* Deactivates the interrupt management of port A:  */
 943         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 944         /* Selects the handshake specification register of port A */
 945         outb(APCI1500_RW_PORT_A_HANDSHAKE_SPECIFICATION,
 946                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 947         /* Deletes the register */
 948         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 949
 950          /*****************************************************/
 951         /* Selects the mode specification register of port B */
 952          /*****************************************************/
 953         outb(APCI1500_RW_PORT_B_SPECIFICATION,
 954                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 955         outb(0x10, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 956         /* Selects the data path polarity register of port B */
 957         outb(APCI1500_RW_PORT_B_DATA_PCITCH_POLARITY,
 958                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 959         /* A high level of port B means 1 */
 960         outb(0x7F, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 961         /* Selects the data direction register of port B */
 962         outb(APCI1500_RW_PORT_B_DATA_DIRECTION,
 963                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 964         /* All bits used as inputs */
 965         outb(0xFF, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 966         /* Selects the command and status register of port B */
 967         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
 968                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 969         /* Deletes IP and IUS */
 970         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 971         /* Selects the command and status register of port B */
 972         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
 973                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 974         /* Deactivates the interrupt management of port B:         */
 975         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 976         /* Selects the handshake specification register of port B */
 977         outb(APCI1500_RW_PORT_B_HANDSHAKE_SPECIFICATION,
 978                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 979         /* Deletes the register */
 980         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 981
 982            /*****************************************************/
 983         /* Selects the data path polarity register of port C */
 984            /*****************************************************/
 985         outb(APCI1500_RW_PORT_C_DATA_PCITCH_POLARITY,
 986                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 987         /* High level of port C means 1 */
 988         outb(0x9, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 989         /* Selects the data direction register of port C */
 990         outb(APCI1500_RW_PORT_C_DATA_DIRECTION,
 991                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 992         /* All bits used as inputs except channel 1 */
 993         outb(0x0E, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 994         /* Selects the special IO register of port C */
 995         outb(APCI1500_RW_PORT_C_SPECIAL_IO_CONTROL,
 996                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 997         /* Deletes it */
 998         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
 999            /******************************************************/
1000         /* Selects the command and status register of timer 1 */
1001            /******************************************************/
1002         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
1003                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1004         /* Deletes IP and IUS */
1005         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1006         /* Selects the command and status register of timer 1 */
1007         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
1008                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1009         /* Deactivates the interrupt management of timer 1         */
1010         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1011            /******************************************************/
1012         /* Selects the command and status register of timer 2 */
1013            /******************************************************/
1014         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
1015                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1016         /* Deletes IP and IUS */
1017         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1018         /* Selects the command and status register of timer 2 */
1019         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
1020                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1021         /* Deactivates Timer 2 interrupt management:               */
1022         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1023           /******************************************************/
1024         /* Selects the command and status register of timer 3 */
1025           /******************************************************/
1026         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
1027                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1028         /* Deletes IP and IUS */
1029         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1030         /* Selects the command and status register of Timer 3 */
1031         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
1032                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1033         /* Deactivates interrupt management of timer 3:            */
1034         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1035          /*************************************************/
1036         /* Selects the master interrupt control register */
1037          /*************************************************/
1038         outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
1039                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1040         /* Deletes all interrupts */
1041         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
1042         return insn->n;
1043 }
1044
1045 static int apci1500_di_insn_bits(struct comedi_device *dev,
1046                                  struct comedi_subdevice *s,
1047                                  struct comedi_insn *insn,
1048                                  unsigned int *data)
1049 {
1050         struct addi_private *devpriv = dev->private;
1051
1052         data[1] = inw(devpriv->i_IobaseAddon + APCI1500_DIGITAL_IP);
1053
1054         return insn->n;
1055 }
1056
1057 /*
1058 +----------------------------------------------------------------------------+
1059 | Function   Name   : int i_APCI1500_ConfigDigitalOutputErrorInterrupt
1060 |                      (struct comedi_device *dev,struct comedi_subdevice *s struct comedi_insn
1061 |                      *insn,unsigned int *data)                                  |
1062 |                                                                                    |
1063 +----------------------------------------------------------------------------+
1064 | Task              : Configures the digital output memory and the digital
1065 |                      output error interrupt                                 |
1066 +----------------------------------------------------------------------------+
1067 | Input Parameters  : struct comedi_device *dev : Driver handle                     |
1068 |                     unsigned int *data         : Data Pointer contains         |
1069 |                                          configuration parameters as below |
1070 |                      struct comedi_subdevice *s,   :pointer to subdevice structure
1071 |                       struct comedi_insn *insn      :pointer to insn structure                                                                                                                |
1072 |                                         data[0]  :1:Memory on                          |
1073 |                                                   0:Memory off                         |
1074 |                              data[1]  :1 Enable the voltage error interrupt
1075 |                                                          :0 Disable the voltage error interrupt                                                                                                                   |
1076 |                                                                                                                                        |
1077 +----------------------------------------------------------------------------+
1078 | Output Parameters :   --                                                                                                       |
1079 +----------------------------------------------------------------------------+
1080 | Return Value      : TRUE  : No error occur                                 |
1081 |                           : FALSE : Error occur. Return the error          |
1082 |                                                                                |
1083 +----------------------------------------------------------------------------+
1084 */
1085 static int i_APCI1500_ConfigDigitalOutputErrorInterrupt(struct comedi_device *dev,
1086                                                         struct comedi_subdevice *s,
1087                                                         struct comedi_insn *insn,
1088                                                         unsigned int *data)
1089 {
1090         struct addi_private *devpriv = dev->private;
1091
1092         devpriv->b_OutputMemoryStatus = data[0];
1093         return insn->n;
1094 }
1095
1096 /*
1097 +----------------------------------------------------------------------------+
1098 | Function   Name   : int i_APCI1500_WriteDigitalOutput                      |
1099 |                         (struct comedi_device *dev,struct comedi_subdevice *s,               |
1100 |                      struct comedi_insn *insn,unsigned int *data)                     |
1101 +----------------------------------------------------------------------------+
1102 | Task              : Writes port value  To the selected port                |
1103 +----------------------------------------------------------------------------+
1104 | Input Parameters  : struct comedi_device *dev      : Driver handle                |
1105 |                     unsigned int ui_NoOfChannels    : No Of Channels To Write      |
1106 |                     unsigned int *data              : Data Pointer to read status  |
1107 +----------------------------------------------------------------------------+
1108 | Output Parameters :   --                                                                                                       |
1109 +----------------------------------------------------------------------------+
1110 | Return Value      : TRUE  : No error occur                                 |
1111 |                           : FALSE : Error occur. Return the error          |
1112 |                                                                                |
1113 +----------------------------------------------------------------------------+
1114 */
1115 static int i_APCI1500_WriteDigitalOutput(struct comedi_device *dev,
1116                                          struct comedi_subdevice *s,
1117                                          struct comedi_insn *insn,
1118                                          unsigned int *data)
1119 {
1120         struct addi_private *devpriv = dev->private;
1121         static unsigned int ui_Temp = 0;
1122         unsigned int ui_Temp1;
1123         unsigned int ui_NoOfChannel = CR_CHAN(insn->chanspec);  /*  get the channel */
1124
1125         if (!devpriv->b_OutputMemoryStatus) {
1126                 ui_Temp = 0;
1127
1128         }                       /* if(!devpriv->b_OutputMemoryStatus ) */
1129         if (data[3] == 0) {
1130                 if (data[1] == 0) {
1131                         data[0] = (data[0] << ui_NoOfChannel) | ui_Temp;
1132                         outw(data[0],
1133                                 devpriv->i_IobaseAddon + APCI1500_DIGITAL_OP);
1134                 }               /* if(data[1]==0) */
1135                 else {
1136                         if (data[1] == 1) {
1137                                 switch (ui_NoOfChannel) {
1138
1139                                 case 2:
1140                                         data[0] =
1141                                                 (data[0] << (2 *
1142                                                         data[2])) | ui_Temp;
1143                                         break;
1144
1145                                 case 4:
1146                                         data[0] =
1147                                                 (data[0] << (4 *
1148                                                         data[2])) | ui_Temp;
1149                                         break;
1150
1151                                 case 8:
1152                                         data[0] =
1153                                                 (data[0] << (8 *
1154                                                         data[2])) | ui_Temp;
1155                                         break;
1156
1157                                 case 15:
1158                                         data[0] = data[0] | ui_Temp;
1159                                         break;
1160
1161                                 default:
1162                                         comedi_error(dev, " chan spec wrong");
1163                                         return -EINVAL; /*  "sorry channel spec wrong " */
1164
1165                                 }       /* switch(ui_NoOfChannels) */
1166
1167                                 outw(data[0],
1168                                         devpriv->i_IobaseAddon +
1169                                         APCI1500_DIGITAL_OP);
1170                         }       /*  if(data[1]==1) */
1171                         else {
1172                                 printk("\nSpecified channel not supported\n");
1173                         }       /* else if(data[1]==1) */
1174                 }               /* elseif(data[1]==0) */
1175         }                       /* if(data[3]==0) */
1176         else {
1177                 if (data[3] == 1) {
1178                         if (data[1] == 0) {
1179                                 data[0] = ~data[0] & 0x1;
1180                                 ui_Temp1 = 1;
1181                                 ui_Temp1 = ui_Temp1 << ui_NoOfChannel;
1182                                 ui_Temp = ui_Temp | ui_Temp1;
1183                                 data[0] =
1184                                         (data[0] << ui_NoOfChannel) ^
1185                                         0xffffffff;
1186                                 data[0] = data[0] & ui_Temp;
1187                                 outw(data[0],
1188                                         devpriv->i_IobaseAddon +
1189                                         APCI1500_DIGITAL_OP);
1190                         }       /* if(data[1]==0) */
1191                         else {
1192                                 if (data[1] == 1) {
1193                                         switch (ui_NoOfChannel) {
1194
1195                                         case 2:
1196                                                 data[0] = ~data[0] & 0x3;
1197                                                 ui_Temp1 = 3;
1198                                                 ui_Temp1 =
1199                                                         ui_Temp1 << 2 * data[2];
1200                                                 ui_Temp = ui_Temp | ui_Temp1;
1201                                                 data[0] =
1202                                                         ((data[0] << (2 *
1203                                                                         data
1204                                                                         [2])) ^
1205                                                         0xffffffff) & ui_Temp;
1206                                                 break;
1207
1208                                         case 4:
1209                                                 data[0] = ~data[0] & 0xf;
1210                                                 ui_Temp1 = 15;
1211                                                 ui_Temp1 =
1212                                                         ui_Temp1 << 4 * data[2];
1213                                                 ui_Temp = ui_Temp | ui_Temp1;
1214                                                 data[0] =
1215                                                         ((data[0] << (4 *
1216                                                                         data
1217                                                                         [2])) ^
1218                                                         0xffffffff) & ui_Temp;
1219                                                 break;
1220
1221                                         case 8:
1222                                                 data[0] = ~data[0] & 0xff;
1223                                                 ui_Temp1 = 255;
1224                                                 ui_Temp1 =
1225                                                         ui_Temp1 << 8 * data[2];
1226                                                 ui_Temp = ui_Temp | ui_Temp1;
1227                                                 data[0] =
1228                                                         ((data[0] << (8 *
1229                                                                         data
1230                                                                         [2])) ^
1231                                                         0xffffffff) & ui_Temp;
1232                                                 break;
1233
1234                                         case 15:
1235                                                 break;
1236
1237                                         default:
1238                                                 comedi_error(dev,
1239                                                         " chan spec wrong");
1240                                                 return -EINVAL; /*  "sorry channel spec wrong " */
1241
1242                                         }       /* switch(ui_NoOfChannels) */
1243
1244                                         outw(data[0],
1245                                                 devpriv->i_IobaseAddon +
1246                                                 APCI1500_DIGITAL_OP);
1247                                 }       /*  if(data[1]==1) */
1248                                 else {
1249                                         printk("\nSpecified channel not supported\n");
1250                                 }       /* else if(data[1]==1) */
1251                         }       /* elseif(data[1]==0) */
1252                 }               /* if(data[3]==1); */
1253                 else {
1254                         printk("\nSpecified functionality does not exist\n");
1255                         return -EINVAL;
1256                 }               /* if else data[3]==1) */
1257         }                       /* if else data[3]==0) */
1258         ui_Temp = data[0];
1259         return insn->n;
1260 }
1261
1262 /*
1263 +----------------------------------------------------------------------------+
1264 | Function   Name   : int i_APCI1500_ConfigCounterTimerWatchdog(comedi_device
1265 |                   *dev,struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data)|
1266 |                                                                                    |
1267 +----------------------------------------------------------------------------+
1268 | Task              : Configures The Watchdog                                |
1269 +----------------------------------------------------------------------------+
1270 | Input Parameters  : struct comedi_device *dev      : Driver handle                |
1271 |                     struct comedi_subdevice *s,   :pointer to subdevice structure
1272 |                      struct comedi_insn *insn      :pointer to insn structure      |
1273 |                     unsigned int *data         : Data Pointer to read status                                                       data[0]                : 2     APCI1500_1_8_KHZ
1274 |                                              1     APCI1500_3_6_KHZ        |
1275 |                                              0     APCI1500_115_KHZ
1276 |                      data[1]                : 0     Counter1/Timer1
1277 |                                               1     Counter2/Timer2
1278 |                                               2     Counter3/Watchdog
1279 |                      data[2]                : 0     Counter
1280 |                                               1     Timer/Watchdog
1281 |                      data[3]                :         This parameter has    |
1282 |                                                      two meanings.         |
1283 |                                                    - If the counter/timer  |
1284 |                                                      is used as a counter  |
1285 |                                                      the limit value of    |
1286 |                                                      the counter is given  |
1287 |                                                                            |
1288 |                                                    - If the counter/timer  |
1289 |                                                      is used as a timer,   |
1290 |                                                      the divider factor    |
1291 |                                                      for the output is     |
1292 |                                                      given.
1293 |                       data[4]                 : 0    APCI1500_CONTINUOUS
1294 |                                                 1    APCI1500_SINGLE
1295 |                       data[5]                 : 0    Software Trigger
1296 |                                                 1    Hardware Trigger
1297 |
1298 |                       data[6]                  :0    Software gate
1299 |                                                 1    Hardware gate
1300 |                       data[7]                  :0    Interrupt Disable
1301 |                                                 1    Interrupt Enable
1302 +----------------------------------------------------------------------------+
1303 | Output Parameters :   --                                                                                                       |
1304 +----------------------------------------------------------------------------+
1305 | Return Value      : TRUE  : No error occur                                 |
1306 |                           : FALSE : Error occur. Return the error          |
1307 |                                                                                |
1308 +----------------------------------------------------------------------------+
1309 */
1310 static int i_APCI1500_ConfigCounterTimerWatchdog(struct comedi_device *dev,
1311                                                  struct comedi_subdevice *s,
1312                                                  struct comedi_insn *insn,
1313                                                  unsigned int *data)
1314 {
1315         struct addi_private *devpriv = dev->private;
1316         int i_TimerCounterMode, i_MasterConfiguration;
1317
1318         devpriv->tsk_Current = current;
1319
1320 /* Selection of the input clock */
1321         if (data[0] == 0 || data[0] == 1 || data[0] == 2) {
1322                 outw(data[0], devpriv->i_IobaseAddon + APCI1500_CLK_SELECT);
1323         }                       /*  if(data[0]==0||data[0]==1||data[0]==2) */
1324         else {
1325                 if (data[0] != 3) {
1326                         printk("\nThe option for input clock selection does not exist\n");
1327                         return -EINVAL;
1328                 }               /*  if(data[0]!=3) */
1329         }                       /* elseif(data[0]==0||data[0]==1||data[0]==2) */
1330         /* Select the counter/timer */
1331         switch (data[1]) {
1332         case COUNTER1:
1333                 /* selecting counter or timer */
1334                 switch (data[2]) {
1335                 case 0:
1336                         data[2] = APCI1500_COUNTER;
1337                         break;
1338                 case 1:
1339                         data[2] = APCI1500_TIMER;
1340                         break;
1341                 default:
1342                         printk("\nThis choice is not a timer nor a counter\n");
1343                         return -EINVAL;
1344                 }               /*  switch(data[2]) */
1345
1346                 /* Selecting  single or continuous mode */
1347                 switch (data[4]) {
1348                 case 0:
1349                         data[4] = APCI1500_CONTINUOUS;
1350                         break;
1351                 case 1:
1352                         data[4] = APCI1500_SINGLE;
1353                         break;
1354                 default:
1355                         printk("\nThis option for single/continuous mode does not exist\n");
1356                         return -EINVAL;
1357                 }               /*  switch(data[4]) */
1358
1359                 i_TimerCounterMode = data[2] | data[4] | 7;
1360                          /*************************/
1361                 /* Test the reload value */
1362                          /*************************/
1363
1364                 if ((data[3] >= 0) && (data[3] <= 65535)) {
1365                         if (data[7] == APCI1500_ENABLE
1366                                 || data[7] == APCI1500_DISABLE) {
1367
1368                                 /************************************************/
1369                                 /* Selects the mode register of timer/counter 1 */
1370                                 /************************************************/
1371                                 outb(APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION,
1372                                         devpriv->iobase +
1373                                         APCI1500_Z8536_CONTROL_REGISTER);
1374                                 /***********************/
1375                                 /* Writes the new mode */
1376                                 /***********************/
1377                                 outb(i_TimerCounterMode,
1378                                         devpriv->iobase +
1379                                         APCI1500_Z8536_CONTROL_REGISTER);
1380
1381                                 /****************************************************/
1382                                 /* Selects the constant register of timer/counter 1 */
1383                                 /****************************************************/
1384
1385                                 outb(APCI1500_RW_CPT_TMR1_TIME_CST_LOW,
1386                                         devpriv->iobase +
1387                                         APCI1500_Z8536_CONTROL_REGISTER);
1388
1389                                   /*************************/
1390                                 /* Writes the low value  */
1391                                   /*************************/
1392
1393                                 outb(data[3],
1394                                         devpriv->iobase +
1395                                         APCI1500_Z8536_CONTROL_REGISTER);
1396
1397                                    /****************************************************/
1398                                 /* Selects the constant register of timer/counter 1 */
1399                                    /****************************************************/
1400
1401                                 outb(APCI1500_RW_CPT_TMR1_TIME_CST_HIGH,
1402                                         devpriv->iobase +
1403                                         APCI1500_Z8536_CONTROL_REGISTER);
1404
1405                                   /**************************/
1406                                 /* Writes the high value  */
1407                                   /**************************/
1408
1409                                 data[3] = data[3] >> 8;
1410                                 outb(data[3],
1411                                         devpriv->iobase +
1412                                         APCI1500_Z8536_CONTROL_REGISTER);
1413
1414                                      /*********************************************/
1415                                 /* Selects the master configuration register */
1416                                      /*********************************************/
1417
1418                                 outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
1419                                         devpriv->iobase +
1420                                         APCI1500_Z8536_CONTROL_REGISTER);
1421
1422                                      /**********************/
1423                                 /* Reads the register */
1424                                      /**********************/
1425
1426                                 i_MasterConfiguration =
1427                                         inb(devpriv->iobase +
1428                                         APCI1500_Z8536_CONTROL_REGISTER);
1429
1430                                        /********************************************************/
1431                                 /* Enables timer/counter 1 and triggers timer/counter 1 */
1432                                        /********************************************************/
1433
1434                                 i_MasterConfiguration =
1435                                         i_MasterConfiguration | 0x40;
1436
1437                                     /*********************************************/
1438                                 /* Selects the master configuration register */
1439                                     /*********************************************/
1440                                 outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
1441                                         devpriv->iobase +
1442                                         APCI1500_Z8536_CONTROL_REGISTER);
1443
1444                                       /********************************/
1445                                 /* Writes the new configuration */
1446                                       /********************************/
1447                                 outb(i_MasterConfiguration,
1448                                         devpriv->iobase +
1449                                         APCI1500_Z8536_CONTROL_REGISTER);
1450                                          /****************************************/
1451                                 /* Selects the commands register of     */
1452                                 /* timer/counter 1                      */
1453                                          /****************************************/
1454
1455                                 outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
1456                                         devpriv->iobase +
1457                                         APCI1500_Z8536_CONTROL_REGISTER);
1458
1459                                        /***************************/
1460                                 /* Disable timer/counter 1 */
1461                                        /***************************/
1462
1463                                 outb(0x0,
1464                                         devpriv->iobase +
1465                                         APCI1500_Z8536_CONTROL_REGISTER);
1466                                           /****************************************/
1467                                 /* Selects the commands register of     */
1468                                 /* timer/counter 1                      */
1469                                           /****************************************/
1470                                 outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
1471                                         devpriv->iobase +
1472                                         APCI1500_Z8536_CONTROL_REGISTER);
1473
1474                                       /***************************/
1475                                 /* Trigger timer/counter 1 */
1476                                       /***************************/
1477                                 outb(0x2,
1478                                         devpriv->iobase +
1479                                         APCI1500_Z8536_CONTROL_REGISTER);
1480                         }       /* if(data[7]== APCI1500_ENABLE ||data[7]== APCI1500_DISABLE) */
1481                         else {
1482                                 printk("\nError in selection of interrupt enable or disable\n");
1483                                 return -EINVAL;
1484                         }       /* elseif(data[7]== APCI1500_ENABLE ||data[7]== APCI1500_DISABLE) */
1485                 }               /*  if ((data[3]>= 0) && (data[3] <= 65535)) */
1486                 else {
1487                         printk("\nError in selection of reload value\n");
1488                         return -EINVAL;
1489                 }               /* else if ((data[3]>= 0) && (data[3] <= 65535)) */
1490                 i_TimerCounterWatchdogInterrupt = data[7];
1491                 i_TimerCounter1Init = 1;
1492                 break;
1493
1494         case COUNTER2:          /* selecting counter or timer */
1495                 switch (data[2]) {
1496                 case 0:
1497                         data[2] = APCI1500_COUNTER;
1498                         break;
1499                 case 1:
1500                         data[2] = APCI1500_TIMER;
1501                         break;
1502                 default:
1503                         printk("\nThis choice is not a timer nor a counter\n");
1504                         return -EINVAL;
1505                 }               /*  switch(data[2]) */
1506
1507                 /* Selecting  single or continuous mode */
1508                 switch (data[4]) {
1509                 case 0:
1510                         data[4] = APCI1500_CONTINUOUS;
1511                         break;
1512                 case 1:
1513                         data[4] = APCI1500_SINGLE;
1514                         break;
1515                 default:
1516                         printk("\nThis option for single/continuous mode does not exist\n");
1517                         return -EINVAL;
1518                 }               /*  switch(data[4]) */
1519
1520                 /* Selecting  software or hardware trigger */
1521                 switch (data[5]) {
1522                 case 0:
1523                         data[5] = APCI1500_SOFTWARE_TRIGGER;
1524                         break;
1525                 case 1:
1526                         data[5] = APCI1500_HARDWARE_TRIGGER;
1527                         break;
1528                 default:
1529                         printk("\nThis choice for software or hardware trigger does not exist\n");
1530                         return -EINVAL;
1531                 }               /*  switch(data[5]) */
1532
1533                 /* Selecting  software or hardware gate */
1534                 switch (data[6]) {
1535                 case 0:
1536                         data[6] = APCI1500_SOFTWARE_GATE;
1537                         break;
1538                 case 1:
1539                         data[6] = APCI1500_HARDWARE_GATE;
1540                         break;
1541                 default:
1542                         printk("\nThis choice for software or hardware gate does not exist\n");
1543                         return -EINVAL;
1544                 }               /*  switch(data[6]) */
1545
1546                 i_TimerCounterMode = data[2] | data[4] | data[5] | data[6] | 7;
1547
1548                              /*************************/
1549                 /* Test the reload value */
1550                              /*************************/
1551
1552                 if ((data[3] >= 0) && (data[3] <= 65535)) {
1553                         if (data[7] == APCI1500_ENABLE
1554                                 || data[7] == APCI1500_DISABLE) {
1555
1556                                 /************************************************/
1557                                 /* Selects the mode register of timer/counter 2 */
1558                                 /************************************************/
1559                                 outb(APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION,
1560                                         devpriv->iobase +
1561                                         APCI1500_Z8536_CONTROL_REGISTER);
1562                                 /***********************/
1563                                 /* Writes the new mode */
1564                                 /***********************/
1565                                 outb(i_TimerCounterMode,
1566                                         devpriv->iobase +
1567                                         APCI1500_Z8536_CONTROL_REGISTER);
1568
1569                                 /****************************************************/
1570                                 /* Selects the constant register of timer/counter 2 */
1571                                 /****************************************************/
1572
1573                                 outb(APCI1500_RW_CPT_TMR2_TIME_CST_LOW,
1574                                         devpriv->iobase +
1575                                         APCI1500_Z8536_CONTROL_REGISTER);
1576
1577                                   /*************************/
1578                                 /* Writes the low value  */
1579                                   /*************************/
1580
1581                                 outb(data[3],
1582                                         devpriv->iobase +
1583                                         APCI1500_Z8536_CONTROL_REGISTER);
1584
1585                                    /****************************************************/
1586                                 /* Selects the constant register of timer/counter 2 */
1587                                    /****************************************************/
1588
1589                                 outb(APCI1500_RW_CPT_TMR2_TIME_CST_HIGH,
1590                                         devpriv->iobase +
1591                                         APCI1500_Z8536_CONTROL_REGISTER);
1592
1593                                   /**************************/
1594                                 /* Writes the high value  */
1595                                   /**************************/
1596
1597                                 data[3] = data[3] >> 8;
1598                                 outb(data[3],
1599                                         devpriv->iobase +
1600                                         APCI1500_Z8536_CONTROL_REGISTER);
1601
1602                                      /*********************************************/
1603                                 /* Selects the master configuration register */
1604                                      /*********************************************/
1605
1606                                 outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
1607                                         devpriv->iobase +
1608                                         APCI1500_Z8536_CONTROL_REGISTER);
1609
1610                                      /**********************/
1611                                 /* Reads the register */
1612                                      /**********************/
1613
1614                                 i_MasterConfiguration =
1615                                         inb(devpriv->iobase +
1616                                         APCI1500_Z8536_CONTROL_REGISTER);
1617
1618                                        /********************************************************/
1619                                 /* Enables timer/counter 2 and triggers timer/counter 2 */
1620                                        /********************************************************/
1621
1622                                 i_MasterConfiguration =
1623                                         i_MasterConfiguration | 0x20;
1624
1625                                     /*********************************************/
1626                                 /* Selects the master configuration register */
1627                                     /*********************************************/
1628                                 outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
1629                                         devpriv->iobase +
1630                                         APCI1500_Z8536_CONTROL_REGISTER);
1631
1632                                       /********************************/
1633                                 /* Writes the new configuration */
1634                                       /********************************/
1635                                 outb(i_MasterConfiguration,
1636                                         devpriv->iobase +
1637                                         APCI1500_Z8536_CONTROL_REGISTER);
1638                                          /****************************************/
1639                                 /* Selects the commands register of     */
1640                                 /* timer/counter 2                      */
1641                                          /****************************************/
1642
1643                                 outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
1644                                         devpriv->iobase +
1645                                         APCI1500_Z8536_CONTROL_REGISTER);
1646
1647                                        /***************************/
1648                                 /* Disable timer/counter 2 */
1649                                        /***************************/
1650
1651                                 outb(0x0,
1652                                         devpriv->iobase +
1653                                         APCI1500_Z8536_CONTROL_REGISTER);
1654                                           /****************************************/
1655                                 /* Selects the commands register of     */
1656                                 /* timer/counter 2                      */
1657                                           /****************************************/
1658                                 outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
1659                                         devpriv->iobase +
1660                                         APCI1500_Z8536_CONTROL_REGISTER);
1661
1662                                       /***************************/
1663                                 /* Trigger timer/counter 1 */
1664                                       /***************************/
1665                                 outb(0x2,
1666                                         devpriv->iobase +
1667                                         APCI1500_Z8536_CONTROL_REGISTER);
1668                         }       /* if(data[7]== APCI1500_ENABLE ||data[7]== APCI1500_DISABLE) */
1669                         else {
1670                                 printk("\nError in selection of interrupt enable or disable\n");
1671                                 return -EINVAL;
1672                         }       /* elseif(data[7]== APCI1500_ENABLE ||data[7]== APCI1500_DISABLE) */
1673                 }               /*  if ((data[3]>= 0) && (data[3] <= 65535)) */
1674                 else {
1675                         printk("\nError in selection of reload value\n");
1676                         return -EINVAL;
1677                 }               /* else if ((data[3]>= 0) && (data[3] <= 65535)) */
1678                 i_TimerCounterWatchdogInterrupt = data[7];
1679                 i_TimerCounter2Init = 1;
1680                 break;
1681
1682         case COUNTER3:          /* selecting counter or watchdog */
1683                 switch (data[2]) {
1684                 case 0:
1685                         data[2] = APCI1500_COUNTER;
1686                         break;
1687                 case 1:
1688                         data[2] = APCI1500_WATCHDOG;
1689                         break;
1690                 default:
1691                         printk("\nThis choice is not a watchdog nor a counter\n");
1692                         return -EINVAL;
1693                 }               /*  switch(data[2]) */
1694
1695                 /* Selecting  single or continuous mode */
1696                 switch (data[4]) {
1697                 case 0:
1698                         data[4] = APCI1500_CONTINUOUS;
1699                         break;
1700                 case 1:
1701                         data[4] = APCI1500_SINGLE;
1702                         break;
1703                 default:
1704                         printk("\nThis option for single/continuous mode does not exist\n");
1705                         return -EINVAL;
1706                 }               /*  switch(data[4]) */
1707
1708                 /* Selecting  software or hardware gate */
1709                 switch (data[6]) {
1710                 case 0:
1711                         data[6] = APCI1500_SOFTWARE_GATE;
1712                         break;
1713                 case 1:
1714                         data[6] = APCI1500_HARDWARE_GATE;
1715                         break;
1716                 default:
1717                         printk("\nThis choice for software or hardware gate does not exist\n");
1718                         return -EINVAL;
1719                 }               /*  switch(data[6]) */
1720
1721                       /*****************************/
1722                 /* Test if used for watchdog */
1723                           /*****************************/
1724
1725                 if (data[2] == APCI1500_WATCHDOG) {
1726                              /*****************************/
1727                         /* - Enables the output line */
1728                         /* - Enables retrigger       */
1729                         /* - Pulses output           */
1730                              /*****************************/
1731                         i_TimerCounterMode = data[2] | data[4] | 0x54;
1732                 }               /* if (data[2] == APCI1500_WATCHDOG) */
1733                 else {
1734                         i_TimerCounterMode = data[2] | data[4] | data[6] | 7;
1735                 }               /* elseif (data[2] == APCI1500_WATCHDOG) */
1736                                  /*************************/
1737                 /* Test the reload value */
1738                              /*************************/
1739
1740                 if ((data[3] >= 0) && (data[3] <= 65535)) {
1741                         if (data[7] == APCI1500_ENABLE
1742                                 || data[7] == APCI1500_DISABLE) {
1743
1744                                 /************************************************/
1745                                 /* Selects the mode register of watchdog/counter 3 */
1746                                 /************************************************/
1747                                 outb(APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION,
1748                                         devpriv->iobase +
1749                                         APCI1500_Z8536_CONTROL_REGISTER);
1750                                 /***********************/
1751                                 /* Writes the new mode */
1752                                 /***********************/
1753                                 outb(i_TimerCounterMode,
1754                                         devpriv->iobase +
1755                                         APCI1500_Z8536_CONTROL_REGISTER);
1756
1757                                 /****************************************************/
1758                                 /* Selects the constant register of watchdog/counter 3 */
1759                                 /****************************************************/
1760
1761                                 outb(APCI1500_RW_CPT_TMR3_TIME_CST_LOW,
1762                                         devpriv->iobase +
1763                                         APCI1500_Z8536_CONTROL_REGISTER);
1764
1765                                   /*************************/
1766                                 /* Writes the low value  */
1767                                   /*************************/
1768
1769                                 outb(data[3],
1770                                         devpriv->iobase +
1771                                         APCI1500_Z8536_CONTROL_REGISTER);
1772
1773                                    /****************************************************/
1774                                 /* Selects the constant register of watchdog/counter 3 */
1775                                    /****************************************************/
1776
1777                                 outb(APCI1500_RW_CPT_TMR3_TIME_CST_HIGH,
1778                                         devpriv->iobase +
1779                                         APCI1500_Z8536_CONTROL_REGISTER);
1780
1781                                   /**************************/
1782                                 /* Writes the high value  */
1783                                   /**************************/
1784
1785                                 data[3] = data[3] >> 8;
1786                                 outb(data[3],
1787                                         devpriv->iobase +
1788                                         APCI1500_Z8536_CONTROL_REGISTER);
1789
1790                                      /*********************************************/
1791                                 /* Selects the master configuration register */
1792                                      /*********************************************/
1793
1794                                 outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
1795                                         devpriv->iobase +
1796                                         APCI1500_Z8536_CONTROL_REGISTER);
1797
1798                                      /**********************/
1799                                 /* Reads the register */
1800                                      /**********************/
1801
1802                                 i_MasterConfiguration =
1803                                         inb(devpriv->iobase +
1804                                         APCI1500_Z8536_CONTROL_REGISTER);
1805
1806                                        /********************************************************/
1807                                 /* Enables watchdog/counter 3 and triggers watchdog/counter 3 */
1808                                        /********************************************************/
1809
1810                                 i_MasterConfiguration =
1811                                         i_MasterConfiguration | 0x10;
1812
1813                                     /*********************************************/
1814                                 /* Selects the master configuration register */
1815                                     /*********************************************/
1816                                 outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
1817                                         devpriv->iobase +
1818                                         APCI1500_Z8536_CONTROL_REGISTER);
1819
1820                                       /********************************/
1821                                 /* Writes the new configuration */
1822                                       /********************************/
1823                                 outb(i_MasterConfiguration,
1824                                         devpriv->iobase +
1825                                         APCI1500_Z8536_CONTROL_REGISTER);
1826
1827                                       /********************/
1828                                 /* Test if COUNTER */
1829                                           /********************/
1830                                 if (data[2] == APCI1500_COUNTER) {
1831
1832                                             /*************************************/
1833                                         /* Selects the command register of   */
1834                                         /* watchdog/counter 3                */
1835                                                  /*************************************/
1836                                         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
1837                                                 devpriv->iobase +
1838                                                 APCI1500_Z8536_CONTROL_REGISTER);
1839                                               /*************************************************/
1840                                         /* Disable the  watchdog/counter 3 and starts it */
1841                                                   /*************************************************/
1842                                         outb(0x0,
1843                                                 devpriv->iobase +
1844                                                 APCI1500_Z8536_CONTROL_REGISTER);
1845
1846                                               /*************************************/
1847                                         /* Selects the command register of   */
1848                                         /* watchdog/counter 3                */
1849                                                   /*************************************/
1850
1851                                         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
1852                                                 devpriv->iobase +
1853                                                 APCI1500_Z8536_CONTROL_REGISTER);
1854                                              /*************************************************/
1855                                         /* Trigger the  watchdog/counter 3 and starts it */
1856                                                  /*************************************************/
1857                                         outb(0x2,
1858                                                 devpriv->iobase +
1859                                                 APCI1500_Z8536_CONTROL_REGISTER);
1860
1861                                 }       /* elseif(data[2]==APCI1500_COUNTER) */
1862
1863                         }       /* if(data[7]== APCI1500_ENABLE ||data[7]== APCI1500_DISABLE) */
1864                         else {
1865                                 printk("\nError in selection of interrupt enable or disable\n");
1866                                 return -EINVAL;
1867                         }       /* elseif(data[7]== APCI1500_ENABLE ||data[7]== APCI1500_DISABLE) */
1868                 }               /*  if ((data[3]>= 0) && (data[3] <= 65535)) */
1869                 else {
1870                         printk("\nError in selection of reload value\n");
1871                         return -EINVAL;
1872                 }               /* else if ((data[3]>= 0) && (data[3] <= 65535)) */
1873                 i_TimerCounterWatchdogInterrupt = data[7];
1874                 i_WatchdogCounter3Init = 1;
1875                 break;
1876
1877         default:
1878                 printk("\nThe specified counter\timer option does not exist\n");
1879         }                       /* switch(data[1]) */
1880         i_CounterLogic = data[2];
1881         return insn->n;
1882 }
1883
1884 /*
1885 +----------------------------------------------------------------------------+
1886 | Function   Name   : int i_APCI1500_StartStopTriggerTimerCounterWatchdog      |
1887 |                               (struct comedi_device *dev,struct comedi_subdevice *s,
1888 |                         struct comedi_insn *insn,unsigned int *data);                  |
1889 +----------------------------------------------------------------------------+
1890 | Task              : Start / Stop or trigger the timer counter or Watchdog  |
1891 +----------------------------------------------------------------------------+
1892 | Input Parameters  : struct comedi_device *dev     : Driver handle                 |
1893 |                     struct comedi_subdevice *s,   :pointer to subdevice structure
1894 |                      struct comedi_insn *insn      :pointer to insn structure      |
1895 |                     unsigned int *data         : Data Pointer to read status   |
1896 |                      data[0]                : 0     Counter1/Timer1
1897 |                                               1     Counter2/Timer2
1898 |                                               2     Counter3/Watchdog
1899 |                      data[1]                : 0     start
1900 |                                               1     stop
1901 |                                               2     Trigger
1902 |                      data[2]                : 0     Counter
1903 |                                               1     Timer/Watchdog
1904 +----------------------------------------------------------------------------+
1905 | Output Parameters :   --                                                                                                       |
1906 +----------------------------------------------------------------------------+
1907 | Return Value      : TRUE  : No error occur                                 |
1908 |                           : FALSE : Error occur. Return the error          |
1909 |                                                                                |
1910 +----------------------------------------------------------------------------+
1911 */
1912 static int i_APCI1500_StartStopTriggerTimerCounterWatchdog(struct comedi_device *dev,
1913                                                            struct comedi_subdevice *s,
1914                                                            struct comedi_insn *insn,
1915                                                            unsigned int *data)
1916 {
1917         struct addi_private *devpriv = dev->private;
1918         int i_CommandAndStatusValue;
1919
1920         switch (data[0]) {
1921         case COUNTER1:
1922                 switch (data[1]) {
1923                 case START:
1924                         if (i_TimerCounter1Init == 1) {
1925                                 if (i_TimerCounterWatchdogInterrupt == 1) {
1926                                         i_CommandAndStatusValue = 0xC4; /* Enable the interrupt */
1927                                 }       /*  if(i_TimerCounterWatchdogInterrupt==1) */
1928                                 else {
1929                                         i_CommandAndStatusValue = 0xE4; /* disable the interrupt */
1930                                 }       /* elseif(i_TimerCounterWatchdogInterrupt==1) */
1931                                               /**************************/
1932                                 /* Starts timer/counter 1 */
1933                                               /**************************/
1934                                 i_TimerCounter1Enabled = 1;
1935                                                 /********************************************/
1936                                 /* Selects the commands and status register */
1937                                                 /********************************************/
1938                                 outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
1939                                         devpriv->iobase +
1940                                         APCI1500_Z8536_CONTROL_REGISTER);
1941                                 outb(i_CommandAndStatusValue,
1942                                         devpriv->iobase +
1943                                         APCI1500_Z8536_CONTROL_REGISTER);
1944                         }       /* if( i_TimerCounter1Init==1) */
1945                         else {
1946                                 printk("\nCounter/Timer1 not configured\n");
1947                                 return -EINVAL;
1948                         }
1949                         break;
1950
1951                 case STOP:
1952
1953                                               /**************************/
1954                         /* Stop timer/counter 1 */
1955                                               /**************************/
1956
1957                                                 /********************************************/
1958                         /* Selects the commands and status register */
1959                                                 /********************************************/
1960                         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
1961                                 devpriv->iobase +
1962                                 APCI1500_Z8536_CONTROL_REGISTER);
1963                         outb(0x00,
1964                                 devpriv->iobase +
1965                                 APCI1500_Z8536_CONTROL_REGISTER);
1966                         i_TimerCounter1Enabled = 0;
1967                         break;
1968
1969                 case TRIGGER:
1970                         if (i_TimerCounter1Init == 1) {
1971                                 if (i_TimerCounter1Enabled == 1) {
1972                                                  /************************/
1973                                         /* Set Trigger and gate */
1974                                                  /************************/
1975
1976                                         i_CommandAndStatusValue = 0x6;
1977                                 }       /* if( i_TimerCounter1Enabled==1) */
1978                                 else {
1979                                                    /***************/
1980                                         /* Set Trigger */
1981                                                    /***************/
1982
1983                                         i_CommandAndStatusValue = 0x2;
1984                                 }       /* elseif(i_TimerCounter1Enabled==1) */
1985
1986                                                 /********************************************/
1987                                 /* Selects the commands and status register */
1988                                                 /********************************************/
1989                                 outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
1990                                         devpriv->iobase +
1991                                         APCI1500_Z8536_CONTROL_REGISTER);
1992                                 outb(i_CommandAndStatusValue,
1993                                         devpriv->iobase +
1994                                         APCI1500_Z8536_CONTROL_REGISTER);
1995                         }       /* if( i_TimerCounter1Init==1) */
1996                         else {
1997                                 printk("\nCounter/Timer1 not configured\n");
1998                                 return -EINVAL;
1999                         }
2000                         break;
2001
2002                 default:
2003                         printk("\nThe specified option for start/stop/trigger does not exist\n");
2004                         return -EINVAL;
2005                 }               /* switch(data[1]) */
2006                 break;
2007
2008         case COUNTER2:
2009                 switch (data[1]) {
2010                 case START:
2011                         if (i_TimerCounter2Init == 1) {
2012                                 if (i_TimerCounterWatchdogInterrupt == 1) {
2013                                         i_CommandAndStatusValue = 0xC4; /* Enable the interrupt */
2014                                 }       /*  if(i_TimerCounterWatchdogInterrupt==1) */
2015                                 else {
2016                                         i_CommandAndStatusValue = 0xE4; /* disable the interrupt */
2017                                 }       /* elseif(i_TimerCounterWatchdogInterrupt==1) */
2018                                               /**************************/
2019                                 /* Starts timer/counter 2 */
2020                                               /**************************/
2021                                 i_TimerCounter2Enabled = 1;
2022                                                 /********************************************/
2023                                 /* Selects the commands and status register */
2024                                                 /********************************************/
2025                                 outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
2026                                         devpriv->iobase +
2027                                         APCI1500_Z8536_CONTROL_REGISTER);
2028                                 outb(i_CommandAndStatusValue,
2029                                         devpriv->iobase +
2030                                         APCI1500_Z8536_CONTROL_REGISTER);
2031                         }       /* if( i_TimerCounter2Init==1) */
2032                         else {
2033                                 printk("\nCounter/Timer2 not configured\n");
2034                                 return -EINVAL;
2035                         }
2036                         break;
2037
2038                 case STOP:
2039
2040                                               /**************************/
2041                         /* Stop timer/counter 2 */
2042                                               /**************************/
2043
2044                                                 /********************************************/
2045                         /* Selects the commands and status register */
2046                                                 /********************************************/
2047                         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
2048                                 devpriv->iobase +
2049                                 APCI1500_Z8536_CONTROL_REGISTER);
2050                         outb(0x00,
2051                                 devpriv->iobase +
2052                                 APCI1500_Z8536_CONTROL_REGISTER);
2053                         i_TimerCounter2Enabled = 0;
2054                         break;
2055                 case TRIGGER:
2056                         if (i_TimerCounter2Init == 1) {
2057                                 if (i_TimerCounter2Enabled == 1) {
2058                                                  /************************/
2059                                         /* Set Trigger and gate */
2060                                                  /************************/
2061
2062                                         i_CommandAndStatusValue = 0x6;
2063                                 }       /* if( i_TimerCounter2Enabled==1) */
2064                                 else {
2065                                                    /***************/
2066                                         /* Set Trigger */
2067                                                    /***************/
2068
2069                                         i_CommandAndStatusValue = 0x2;
2070                                 }       /* elseif(i_TimerCounter2Enabled==1) */
2071
2072                                                 /********************************************/
2073                                 /* Selects the commands and status register */
2074                                                 /********************************************/
2075                                 outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
2076                                         devpriv->iobase +
2077                                         APCI1500_Z8536_CONTROL_REGISTER);
2078                                 outb(i_CommandAndStatusValue,
2079                                         devpriv->iobase +
2080                                         APCI1500_Z8536_CONTROL_REGISTER);
2081                         }       /* if( i_TimerCounter2Init==1) */
2082                         else {
2083                                 printk("\nCounter/Timer2 not configured\n");
2084                                 return -EINVAL;
2085                         }
2086                         break;
2087                 default:
2088                         printk("\nThe specified option for start/stop/trigger does not exist\n");
2089                         return -EINVAL;
2090                 }               /* switch(data[1]) */
2091                 break;
2092         case COUNTER3:
2093                 switch (data[1]) {
2094                 case START:
2095                         if (i_WatchdogCounter3Init == 1) {
2096
2097                                 if (i_TimerCounterWatchdogInterrupt == 1) {
2098                                         i_CommandAndStatusValue = 0xC4; /* Enable the interrupt */
2099                                 }       /*  if(i_TimerCounterWatchdogInterrupt==1) */
2100                                 else {
2101                                         i_CommandAndStatusValue = 0xE4; /* disable the interrupt */
2102                                 }       /* elseif(i_TimerCounterWatchdogInterrupt==1) */
2103                                               /**************************/
2104                                 /* Starts Watchdog/counter 3 */
2105                                               /**************************/
2106                                 i_WatchdogCounter3Enabled = 1;
2107                                                 /********************************************/
2108                                 /* Selects the commands and status register */
2109                                                 /********************************************/
2110                                 outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2111                                         devpriv->iobase +
2112                                         APCI1500_Z8536_CONTROL_REGISTER);
2113                                 outb(i_CommandAndStatusValue,
2114                                         devpriv->iobase +
2115                                         APCI1500_Z8536_CONTROL_REGISTER);
2116
2117                         }       /*  if( i_WatchdogCounter3init==1) */
2118                         else {
2119                                 printk("\nWatchdog/Counter3 not configured\n");
2120                                 return -EINVAL;
2121                         }
2122                         break;
2123
2124                 case STOP:
2125
2126                                               /**************************/
2127                         /* Stop Watchdog/counter 3 */
2128                                               /**************************/
2129
2130                                                 /********************************************/
2131                         /* Selects the commands and status register */
2132                                                 /********************************************/
2133                         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2134                                 devpriv->iobase +
2135                                 APCI1500_Z8536_CONTROL_REGISTER);
2136                         outb(0x00,
2137                                 devpriv->iobase +
2138                                 APCI1500_Z8536_CONTROL_REGISTER);
2139                         i_WatchdogCounter3Enabled = 0;
2140                         break;
2141
2142                 case TRIGGER:
2143                         switch (data[2]) {
2144                         case 0: /* triggering counter 3 */
2145                                 if (i_WatchdogCounter3Init == 1) {
2146                                         if (i_WatchdogCounter3Enabled == 1) {
2147                                                                /************************/
2148                                                 /* Set Trigger and gate */
2149                                                                /************************/
2150
2151                                                 i_CommandAndStatusValue = 0x6;
2152                                         }       /* if( i_WatchdogCounter3Enabled==1) */
2153                                         else {
2154                                                            /***************/
2155                                                 /* Set Trigger */
2156                                                            /***************/
2157
2158                                                 i_CommandAndStatusValue = 0x2;
2159                                         }       /* elseif(i_WatchdogCounter3Enabled==1) */
2160
2161                                                 /********************************************/
2162                                         /* Selects the commands and status register */
2163                                                 /********************************************/
2164                                         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2165                                                 devpriv->iobase +
2166                                                 APCI1500_Z8536_CONTROL_REGISTER);
2167                                         outb(i_CommandAndStatusValue,
2168                                                 devpriv->iobase +
2169                                                 APCI1500_Z8536_CONTROL_REGISTER);
2170                                 }       /* if( i_WatchdogCounter3Init==1) */
2171                                 else {
2172                                         printk("\nCounter3 not configured\n");
2173                                         return -EINVAL;
2174                                 }
2175                                 break;
2176                         case 1:
2177                                 /* triggering Watchdog 3 */
2178                                 if (i_WatchdogCounter3Init == 1) {
2179
2180                                                 /********************************************/
2181                                         /* Selects the commands and status register */
2182                                                 /********************************************/
2183                                         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2184                                                 devpriv->iobase +
2185                                                 APCI1500_Z8536_CONTROL_REGISTER);
2186                                         outb(0x6,
2187                                                 devpriv->iobase +
2188                                                 APCI1500_Z8536_CONTROL_REGISTER);
2189                                 }       /* if( i_WatchdogCounter3Init==1) */
2190                                 else {
2191                                         printk("\nWatchdog 3 not configured\n");
2192                                         return -EINVAL;
2193                                 }
2194                                 break;
2195                         default:
2196                                 printk("\nWrong choice of watchdog/counter3\n");
2197                                 return -EINVAL;
2198                         }       /* switch(data[2]) */
2199                         break;
2200                 default:
2201                         printk("\nThe specified option for start/stop/trigger does not exist\n");
2202                         return -EINVAL;
2203                 }               /* switch(data[1]) */
2204                 break;
2205         default:
2206                 printk("\nThe specified choice for counter/watchdog/timer does not exist\n");
2207                 return -EINVAL;
2208         }                       /* switch(data[0]) */
2209         return insn->n;
2210 }
2211
2212 /*
2213 +----------------------------------------------------------------------------+
2214 | Function   Name   : int i_APCI1500_ReadCounterTimerWatchdog                |
2215 |                       (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
2216 |                    unsigned int *data);                                            |
2217 +----------------------------------------------------------------------------+
2218 | Task              : Read The Watchdog                                      |
2219 +----------------------------------------------------------------------------+
2220 | Input Parameters  :   struct comedi_device *dev      : Driver handle              |
2221 |                     struct comedi_subdevice *s,   :pointer to subdevice structure
2222 |                      struct comedi_insn *insn      :pointer to insn structure      |
2223 |                     unsigned int *data          : Data Pointer to read status  |
2224 |                      data[0]                : 0     Counter1/Timer1
2225 |                                               1     Counter2/Timer2
2226 |                                               2     Counter3/Watchdog
2227 |
2228 +----------------------------------------------------------------------------+
2229 | Output Parameters :   --                                                                                                       |
2230 +----------------------------------------------------------------------------+
2231 | Return Value      : TRUE  : No error occur                                 |
2232 |                           : FALSE : Error occur. Return the error          |
2233 |                                                                                |
2234 +----------------------------------------------------------------------------+
2235 */
2236 static int i_APCI1500_ReadCounterTimerWatchdog(struct comedi_device *dev,
2237                                                struct comedi_subdevice *s,
2238                                                struct comedi_insn *insn,
2239                                                unsigned int *data)
2240 {
2241         struct addi_private *devpriv = dev->private;
2242         int i_CommandAndStatusValue;
2243
2244         switch (data[0]) {
2245         case COUNTER1:
2246                 /* Read counter/timer1 */
2247                 if (i_TimerCounter1Init == 1) {
2248                         if (i_TimerCounter1Enabled == 1) {
2249                   /************************/
2250                                 /* Set RCC and gate */
2251                   /************************/
2252
2253                                 i_CommandAndStatusValue = 0xC;
2254                         }       /* if( i_TimerCounter1Init==1) */
2255                         else {
2256                     /***************/
2257                                 /* Set RCC */
2258                     /***************/
2259
2260                                 i_CommandAndStatusValue = 0x8;
2261                         }       /* elseif(i_TimerCounter1Init==1) */
2262
2263                 /********************************************/
2264                         /* Selects the commands and status register */
2265                 /********************************************/
2266                         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
2267                                 devpriv->iobase +
2268                                 APCI1500_Z8536_CONTROL_REGISTER);
2269                         outb(i_CommandAndStatusValue,
2270                                 devpriv->iobase +
2271                                 APCI1500_Z8536_CONTROL_REGISTER);
2272
2273                  /***************************************/
2274                         /* Selects the counter register (high) */
2275                  /***************************************/
2276                         outb(APCI1500_R_CPT_TMR1_VALUE_HIGH,
2277                                 devpriv->iobase +
2278                                 APCI1500_Z8536_CONTROL_REGISTER);
2279                         data[0] =
2280                                 inb(devpriv->iobase +
2281                                 APCI1500_Z8536_CONTROL_REGISTER);
2282                         data[0] = data[0] << 8;
2283                         data[0] = data[0] & 0xff00;
2284                         outb(APCI1500_R_CPT_TMR1_VALUE_LOW,
2285                                 devpriv->iobase +
2286                                 APCI1500_Z8536_CONTROL_REGISTER);
2287                         data[0] =
2288                                 data[0] | inb(devpriv->iobase +
2289                                 APCI1500_Z8536_CONTROL_REGISTER);
2290                 }               /* if( i_TimerCounter1Init==1) */
2291                 else {
2292                         printk("\nTimer/Counter1 not configured\n");
2293                         return -EINVAL;
2294                 }               /* elseif( i_TimerCounter1Init==1) */
2295                 break;
2296         case COUNTER2:
2297                 /* Read counter/timer2 */
2298                 if (i_TimerCounter2Init == 1) {
2299                         if (i_TimerCounter2Enabled == 1) {
2300                   /************************/
2301                                 /* Set RCC and gate */
2302                   /************************/
2303
2304                                 i_CommandAndStatusValue = 0xC;
2305                         }       /* if( i_TimerCounter2Init==1) */
2306                         else {
2307                     /***************/
2308                                 /* Set RCC */
2309                     /***************/
2310
2311                                 i_CommandAndStatusValue = 0x8;
2312                         }       /* elseif(i_TimerCounter2Init==1) */
2313
2314                 /********************************************/
2315                         /* Selects the commands and status register */
2316                 /********************************************/
2317                         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
2318                                 devpriv->iobase +
2319                                 APCI1500_Z8536_CONTROL_REGISTER);
2320                         outb(i_CommandAndStatusValue,
2321                                 devpriv->iobase +
2322                                 APCI1500_Z8536_CONTROL_REGISTER);
2323
2324                  /***************************************/
2325                         /* Selects the counter register (high) */
2326                  /***************************************/
2327                         outb(APCI1500_R_CPT_TMR2_VALUE_HIGH,
2328                                 devpriv->iobase +
2329                                 APCI1500_Z8536_CONTROL_REGISTER);
2330                         data[0] =
2331                                 inb(devpriv->iobase +
2332                                 APCI1500_Z8536_CONTROL_REGISTER);
2333                         data[0] = data[0] << 8;
2334                         data[0] = data[0] & 0xff00;
2335                         outb(APCI1500_R_CPT_TMR2_VALUE_LOW,
2336                                 devpriv->iobase +
2337                                 APCI1500_Z8536_CONTROL_REGISTER);
2338                         data[0] =
2339                                 data[0] | inb(devpriv->iobase +
2340                                 APCI1500_Z8536_CONTROL_REGISTER);
2341                 }               /* if( i_TimerCounter2Init==1) */
2342                 else {
2343                         printk("\nTimer/Counter2 not configured\n");
2344                         return -EINVAL;
2345                 }               /* elseif( i_TimerCounter2Init==1) */
2346                 break;
2347         case COUNTER3:
2348                 /* Read counter/watchdog2 */
2349                 if (i_WatchdogCounter3Init == 1) {
2350                         if (i_WatchdogCounter3Enabled == 1) {
2351                   /************************/
2352                                 /* Set RCC and gate */
2353                   /************************/
2354
2355                                 i_CommandAndStatusValue = 0xC;
2356                         }       /* if( i_TimerCounter2Init==1) */
2357                         else {
2358                     /***************/
2359                                 /* Set RCC */
2360                     /***************/
2361
2362                                 i_CommandAndStatusValue = 0x8;
2363                         }       /* elseif(i_WatchdogCounter3Init==1) */
2364
2365                 /********************************************/
2366                         /* Selects the commands and status register */
2367                 /********************************************/
2368                         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2369                                 devpriv->iobase +
2370                                 APCI1500_Z8536_CONTROL_REGISTER);
2371                         outb(i_CommandAndStatusValue,
2372                                 devpriv->iobase +
2373                                 APCI1500_Z8536_CONTROL_REGISTER);
2374
2375                  /***************************************/
2376                         /* Selects the counter register (high) */
2377                  /***************************************/
2378                         outb(APCI1500_R_CPT_TMR3_VALUE_HIGH,
2379                                 devpriv->iobase +
2380                                 APCI1500_Z8536_CONTROL_REGISTER);
2381                         data[0] =
2382                                 inb(devpriv->iobase +
2383                                 APCI1500_Z8536_CONTROL_REGISTER);
2384                         data[0] = data[0] << 8;
2385                         data[0] = data[0] & 0xff00;
2386                         outb(APCI1500_R_CPT_TMR3_VALUE_LOW,
2387                                 devpriv->iobase +
2388                                 APCI1500_Z8536_CONTROL_REGISTER);
2389                         data[0] =
2390                                 data[0] | inb(devpriv->iobase +
2391                                 APCI1500_Z8536_CONTROL_REGISTER);
2392                 }               /* if( i_WatchdogCounter3Init==1) */
2393                 else {
2394                         printk("\nWatchdogCounter3 not configured\n");
2395                         return -EINVAL;
2396                 }               /* elseif( i_WatchdogCounter3Init==1) */
2397                 break;
2398         default:
2399                 printk("\nThe choice of timer/counter/watchdog does not exist\n");
2400                 return -EINVAL;
2401         }                       /* switch(data[0]) */
2402
2403         return insn->n;
2404 }
2405
2406 /*
2407 +----------------------------------------------------------------------------+
2408 | Function   Name   : int  i_APCI1500_ReadInterruptMask                      |
2409 |                       (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
2410 |                    unsigned int *data);                                            |
2411 +----------------------------------------------------------------------------+
2412 | Task              : Read the interrupt mask                                |
2413 +----------------------------------------------------------------------------+
2414 | Input Parameters  :   struct comedi_device *dev      : Driver handle              |
2415 |                     struct comedi_subdevice *s,   :pointer to subdevice structure
2416 |                      struct comedi_insn *insn      :pointer to insn structure      |
2417 |                     unsigned int *data          : Data Pointer to read status  |
2418
2419
2420 +----------------------------------------------------------------------------+
2421 | Output Parameters :   --      data[0]:The interrupt mask value                                                                                                                           data[1]:Channel no
2422 +----------------------------------------------------------------------------+
2423 | Return Value      : TRUE  : No error occur                                 |
2424 |                           : FALSE : Error occur. Return the error          |
2425 |                                                                                |
2426 +----------------------------------------------------------------------------+
2427 */
2428 static int i_APCI1500_ReadInterruptMask(struct comedi_device *dev,
2429                                         struct comedi_subdevice *s,
2430                                         struct comedi_insn *insn,
2431                                         unsigned int *data)
2432 {
2433         data[0] = i_InterruptMask;
2434         data[1] = i_InputChannel;
2435         i_InterruptMask = 0;
2436         return insn->n;
2437 }
2438
2439 /*
2440 +----------------------------------------------------------------------------+
2441 | Function   Name   : int  i_APCI1500_ConfigureInterrupt                     |
2442 |                       (struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,
2443 |                    unsigned int *data);                                            |
2444 +----------------------------------------------------------------------------+
2445 | Task              : Configures the interrupt registers                     |
2446 +----------------------------------------------------------------------------+
2447 | Input Parameters  :   struct comedi_device *dev      : Driver handle              |
2448 |                     struct comedi_subdevice *s,   :pointer to subdevice structure
2449 |                      struct comedi_insn *insn      :pointer to insn structure      |
2450 |                     unsigned int *data          : Data Pointer                 |
2451 |
2452
2453 +----------------------------------------------------------------------------+
2454 | Output Parameters :   --
2455 +----------------------------------------------------------------------------+
2456 | Return Value      : TRUE  : No error occur                                 |
2457 |                           : FALSE : Error occur. Return the error          |
2458 |                                                                                |
2459 +----------------------------------------------------------------------------+
2460 */
2461 static int i_APCI1500_ConfigureInterrupt(struct comedi_device *dev,
2462                                          struct comedi_subdevice *s,
2463                                          struct comedi_insn *insn,
2464                                          unsigned int *data)
2465 {
2466         struct addi_private *devpriv = dev->private;
2467         unsigned int ui_Status;
2468         int i_RegValue;
2469         int i_Constant;
2470
2471         devpriv->tsk_Current = current;
2472         outl(0x0, devpriv->i_IobaseAmcc + 0x38);
2473         if (data[0] == 1) {
2474                 i_Constant = 0xC0;
2475         }                       /* if(data[0]==1) */
2476         else {
2477                 if (data[0] == 0) {
2478                         i_Constant = 0x00;
2479                 }               /* if{data[0]==0) */
2480                 else {
2481                         printk("\nThe parameter passed to driver is in error for enabling the voltage interrupt\n");
2482                         return -EINVAL;
2483                 }               /* else if(data[0]==0) */
2484         }                       /* elseif(data[0]==1) */
2485
2486          /*****************************************************/
2487         /* Selects the mode specification register of port B */
2488          /*****************************************************/
2489         outb(APCI1500_RW_PORT_B_SPECIFICATION,
2490                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2491         i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2492         outb(APCI1500_RW_PORT_B_SPECIFICATION,
2493                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2494       /*********************************************/
2495         /* Writes the new configuration (APCI1500_OR) */
2496       /*********************************************/
2497         i_RegValue = (i_RegValue & 0xF9) | APCI1500_OR;
2498
2499         outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2500        /*****************************************************/
2501         /* Selects the command and status register of port B */
2502        /*****************************************************/
2503         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
2504                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2505         /*****************************************/
2506         /* Authorises the interrupt on the board */
2507         /*****************************************/
2508         outb(0xC0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2509         /***************************************************/
2510         /* Selects the pattern polarity register of port B */
2511         /***************************************************/
2512         outb(APCI1500_RW_PORT_B_PATTERN_POLARITY,
2513                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2514         outb(i_Constant, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2515         /*****************************************************/
2516         /* Selects the pattern transition register of port B */
2517         /*****************************************************/
2518         outb(APCI1500_RW_PORT_B_PATTERN_TRANSITION,
2519                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2520         outb(i_Constant, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2521         /***********************************************/
2522         /* Selects the pattern mask register of port B */
2523         /***********************************************/
2524         outb(APCI1500_RW_PORT_B_PATTERN_MASK,
2525                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2526         outb(i_Constant, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2527
2528         /*****************************************************/
2529         /* Selects the command and status register of port A */
2530         /*****************************************************/
2531         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
2532                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2533         i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2534         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
2535                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2536          /***********************************/
2537         /* Deletes the interrupt of port A */
2538          /***********************************/
2539
2540         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2541         outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2542         /*****************************************************/
2543         /* Selects the command and status register of port  B */
2544         /*****************************************************/
2545         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
2546                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2547         i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2548         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
2549                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2550          /***********************************/
2551         /* Deletes the interrupt of port B */
2552          /***********************************/
2553
2554         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2555         outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2556
2557         /*****************************************************/
2558         /* Selects the command and status register of timer 1 */
2559         /*****************************************************/
2560         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
2561                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2562         i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2563         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
2564                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2565          /***********************************/
2566         /* Deletes the interrupt of timer 1 */
2567          /***********************************/
2568
2569         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2570         outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2571
2572          /*****************************************************/
2573         /* Selects the command and status register of timer 2 */
2574         /*****************************************************/
2575         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
2576                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2577         i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2578         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
2579                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2580          /***********************************/
2581         /* Deletes the interrupt of timer 2 */
2582          /***********************************/
2583
2584         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2585         outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2586
2587         /*****************************************************/
2588         /* Selects the command and status register of timer 3 */
2589         /*****************************************************/
2590         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2591                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2592         i_RegValue = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2593         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2594                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2595          /***********************************/
2596         /* Deletes the interrupt of timer 3 */
2597          /***********************************/
2598
2599         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2600         outb(i_RegValue, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2601
2602          /*************************************************/
2603         /* Selects the master interrupt control register */
2604          /*************************************************/
2605         outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
2606                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2607         /**********************************************/
2608         /* Authorizes the main interrupt on the board */
2609         /**********************************************/
2610         outb(0xD0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2611
2612       /***************************/
2613         /* Enables the PCI interrupt */
2614       /*****************************/
2615         outl(0x3000, devpriv->i_IobaseAmcc + 0x38);
2616         ui_Status = inl(devpriv->i_IobaseAmcc + 0x10);
2617         ui_Status = inl(devpriv->i_IobaseAmcc + 0x38);
2618         outl(0x23000, devpriv->i_IobaseAmcc + 0x38);
2619
2620         return insn->n;
2621 }
2622
2623 /*
2624 +----------------------------------------------------------------------------+
2625 | Function   Name   : static void v_APCI1500_Interrupt                                       |
2626 |                                         (int irq , void *d)      |
2627 +----------------------------------------------------------------------------+
2628 | Task              : Interrupt handler                                      |
2629 +----------------------------------------------------------------------------+
2630 | Input Parameters  : int irq                 : irq number                   |
2631 |                     void *d                 : void pointer                 |
2632 +----------------------------------------------------------------------------+
2633 | Output Parameters :   --                                                                                                       |
2634 +----------------------------------------------------------------------------+
2635 | Return Value      : TRUE  : No error occur                                 |
2636 |                           : FALSE : Error occur. Return the error          |
2637 |                                                                                |
2638 +----------------------------------------------------------------------------+
2639 */
2640 static void v_APCI1500_Interrupt(int irq, void *d)
2641 {
2642
2643         struct comedi_device *dev = d;
2644         struct addi_private *devpriv = dev->private;
2645         unsigned int ui_InterruptStatus = 0;
2646         int i_RegValue = 0;
2647         i_InterruptMask = 0;
2648
2649  /***********************************/
2650         /* Read the board interrupt status */
2651  /***********************************/
2652         ui_InterruptStatus = inl(devpriv->i_IobaseAmcc + 0x38);
2653
2654   /***************************************/
2655         /* Test if board generated a interrupt */
2656   /***************************************/
2657         if ((ui_InterruptStatus & 0x800000) == 0x800000) {
2658       /************************/
2659                 /* Disable all Interrupt */
2660       /************************/
2661       /*************************************************/
2662                 /* Selects the master interrupt control register */
2663       /*************************************************/
2664                 /* outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER); */
2665         /**********************************************/
2666                 /* Disables  the main interrupt on the board */
2667         /**********************************************/
2668                 /* outb(0x00,devpriv->iobase+APCI1500_Z8536_CONTROL_REGISTER); */
2669
2670    /*****************************************************/
2671                 /* Selects the command and status register of port A */
2672    /*****************************************************/
2673                 outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
2674                         devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2675                 i_RegValue =
2676                         inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2677                 if ((i_RegValue & 0x60) == 0x60) {
2678            /*****************************************************/
2679                         /* Selects the command and status register of port A */
2680            /*****************************************************/
2681                         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
2682                                 devpriv->iobase +
2683                                 APCI1500_Z8536_CONTROL_REGISTER);
2684             /***********************************/
2685                         /* Deletes the interrupt of port A */
2686             /***********************************/
2687                         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2688                         outb(i_RegValue,
2689                                 devpriv->iobase +
2690                                 APCI1500_Z8536_CONTROL_REGISTER);
2691                         i_InterruptMask = i_InterruptMask | 1;
2692                         if (i_Logic == APCI1500_OR_PRIORITY) {
2693                                 outb(APCI1500_RW_PORT_A_SPECIFICATION,
2694                                         devpriv->iobase +
2695                                         APCI1500_Z8536_CONTROL_REGISTER);
2696                                 i_RegValue =
2697                                         inb(devpriv->iobase +
2698                                         APCI1500_Z8536_CONTROL_REGISTER);
2699
2700               /***************************************************/
2701                                 /* Selects the interrupt vector register of port A */
2702               /***************************************************/
2703                                 outb(APCI1500_RW_PORT_A_INTERRUPT_CONTROL,
2704                                         devpriv->iobase +
2705                                         APCI1500_Z8536_CONTROL_REGISTER);
2706                                 i_RegValue =
2707                                         inb(devpriv->iobase +
2708                                         APCI1500_Z8536_CONTROL_REGISTER);
2709
2710                                 i_InputChannel = 1 + (i_RegValue >> 1);
2711
2712                         }       /*  if(i_Logic==APCI1500_OR_PRIORITY) */
2713                         else {
2714                                 i_InputChannel = 0;
2715                         }       /* elseif(i_Logic==APCI1500_OR_PRIORITY) */
2716                 }               /*  if ((i_RegValue & 0x60) == 0x60) */
2717
2718            /*****************************************************/
2719                 /* Selects the command and status register of port B */
2720            /*****************************************************/
2721                 outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
2722                         devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2723                 i_RegValue =
2724                         inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2725                 if ((i_RegValue & 0x60) == 0x60) {
2726              /*****************************************************/
2727                         /* Selects the command and status register of port B */
2728              /*****************************************************/
2729                         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
2730                                 devpriv->iobase +
2731                                 APCI1500_Z8536_CONTROL_REGISTER);
2732              /***********************************/
2733                         /* Deletes the interrupt of port B */
2734              /***********************************/
2735                         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2736                         outb(i_RegValue,
2737                                 devpriv->iobase +
2738                                 APCI1500_Z8536_CONTROL_REGISTER);
2739                         printk("\n\n\n");
2740              /****************/
2741                         /* Reads port B */
2742              /****************/
2743                         i_RegValue =
2744                                 inb((unsigned int) devpriv->iobase +
2745                                 APCI1500_Z8536_PORT_B);
2746
2747                         i_RegValue = i_RegValue & 0xC0;
2748               /**************************************/
2749                         /* Tests if this is an external error */
2750               /**************************************/
2751
2752                         if (i_RegValue) {
2753                                 /* Disable the interrupt */
2754                      /*****************************************************/
2755                                 /* Selects the command and status register of port B */
2756                      /*****************************************************/
2757                                 outl(0x0, devpriv->i_IobaseAmcc + 0x38);
2758
2759                                 if (i_RegValue & 0x80) {
2760                                         i_InterruptMask =
2761                                                 i_InterruptMask | 0x40;
2762                                 }       /* if (i_RegValue & 0x80) */
2763
2764                                 if (i_RegValue & 0x40) {
2765                                         i_InterruptMask =
2766                                                 i_InterruptMask | 0x80;
2767                                 }       /* if (i_RegValue & 0x40) */
2768                         }       /*  if (i_RegValue) */
2769                         else {
2770                                 i_InterruptMask = i_InterruptMask | 2;
2771                         }       /*  if (i_RegValue) */
2772                 }               /* if ((i_RegValue & 0x60) == 0x60) */
2773
2774                 /*****************************************************/
2775                 /* Selects the command and status register of timer 1 */
2776                 /*****************************************************/
2777                 outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
2778                         devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2779                 i_RegValue =
2780                         inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2781                 if ((i_RegValue & 0x60) == 0x60) {
2782                    /*****************************************************/
2783                         /* Selects the command and status register of timer 1 */
2784                    /*****************************************************/
2785                         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
2786                                 devpriv->iobase +
2787                                 APCI1500_Z8536_CONTROL_REGISTER);
2788                    /***********************************/
2789                         /* Deletes the interrupt of timer 1 */
2790                    /***********************************/
2791                         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2792                         outb(i_RegValue,
2793                                 devpriv->iobase +
2794                                 APCI1500_Z8536_CONTROL_REGISTER);
2795                         i_InterruptMask = i_InterruptMask | 4;
2796                 }               /*  if ((i_RegValue & 0x60) == 0x60) */
2797                 /*****************************************************/
2798                 /* Selects the command and status register of timer 2 */
2799                 /*****************************************************/
2800                 outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
2801                         devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2802                 i_RegValue =
2803                         inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2804                 if ((i_RegValue & 0x60) == 0x60) {
2805                    /*****************************************************/
2806                         /* Selects the command and status register of timer 2 */
2807                    /*****************************************************/
2808                         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
2809                                 devpriv->iobase +
2810                                 APCI1500_Z8536_CONTROL_REGISTER);
2811                    /***********************************/
2812                         /* Deletes the interrupt of timer 2 */
2813                    /***********************************/
2814                         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2815                         outb(i_RegValue,
2816                                 devpriv->iobase +
2817                                 APCI1500_Z8536_CONTROL_REGISTER);
2818                         i_InterruptMask = i_InterruptMask | 8;
2819                 }               /*  if ((i_RegValue & 0x60) == 0x60) */
2820
2821                 /*****************************************************/
2822                 /* Selects the command and status register of timer 3 */
2823                 /*****************************************************/
2824                 outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2825                         devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2826                 i_RegValue =
2827                         inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2828                 if ((i_RegValue & 0x60) == 0x60) {
2829                    /*****************************************************/
2830                         /* Selects the command and status register of timer 3 */
2831                    /*****************************************************/
2832                         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
2833                                 devpriv->iobase +
2834                                 APCI1500_Z8536_CONTROL_REGISTER);
2835                    /***********************************/
2836                         /* Deletes the interrupt of timer 3 */
2837                    /***********************************/
2838                         i_RegValue = (i_RegValue & 0x0F) | 0x20;
2839                         outb(i_RegValue,
2840                                 devpriv->iobase +
2841                                 APCI1500_Z8536_CONTROL_REGISTER);
2842                         if (i_CounterLogic == APCI1500_COUNTER) {
2843                                 i_InterruptMask = i_InterruptMask | 0x10;
2844                         }       /* if(i_CounterLogic==APCI1500_COUNTER) */
2845                         else {
2846                                 i_InterruptMask = i_InterruptMask | 0x20;
2847                         }
2848                 }               /*  if ((i_RegValue & 0x60) == 0x60) */
2849
2850                 send_sig(SIGIO, devpriv->tsk_Current, 0);       /*  send signal to the sample */
2851                /***********************/
2852                 /* Enable all Interrupts */
2853                /***********************/
2854
2855                /*************************************************/
2856                 /* Selects the master interrupt control register */
2857                /*************************************************/
2858                 outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
2859                         devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2860                /**********************************************/
2861                 /* Authorizes the main interrupt on the board */
2862                /**********************************************/
2863                 outb(0xD0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2864         }                       /*   if ((ui_InterruptStatus & 0x800000) == 0x800000) */
2865         else {
2866                 printk("\nInterrupt from unknown source\n");
2867
2868         }                       /* else if ((ui_InterruptStatus & 0x800000) == 0x800000) */
2869         return;
2870 }
2871
2872 /*
2873 +----------------------------------------------------------------------------+
2874 | Function   Name   : int i_APCI1500_Reset(struct comedi_device *dev)               |                                                       |
2875 +----------------------------------------------------------------------------+
2876 | Task              :resets all the registers                                |
2877 +----------------------------------------------------------------------------+
2878 | Input Parameters  : struct comedi_device *dev
2879 +----------------------------------------------------------------------------+
2880 | Output Parameters :   --                                                                                                       |
2881 +----------------------------------------------------------------------------+
2882 | Return Value      :                                                        |
2883 |                                                                                |
2884 +----------------------------------------------------------------------------+
2885 */
2886 static int i_APCI1500_Reset(struct comedi_device *dev)
2887 {
2888         struct addi_private *devpriv = dev->private;
2889         int i_DummyRead = 0;
2890
2891         i_TimerCounter1Init = 0;
2892         i_TimerCounter2Init = 0;
2893         i_WatchdogCounter3Init = 0;
2894         i_Event1Status = 0;
2895         i_Event2Status = 0;
2896         i_TimerCounterWatchdogInterrupt = 0;
2897         i_Logic = 0;
2898         i_CounterLogic = 0;
2899         i_InterruptMask = 0;
2900         i_InputChannel = 0;
2901         i_TimerCounter1Enabled = 0;
2902         i_TimerCounter2Enabled = 0;
2903         i_WatchdogCounter3Enabled = 0;
2904
2905     /******************/
2906         /* Software reset */
2907     /******************/
2908         i_DummyRead = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2909         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2910         i_DummyRead = inb(devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2911         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2912         outb(1, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2913         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2914
2915  /*****************************************************/
2916         /* Selects the master configuration control register */
2917  /*****************************************************/
2918         outb(APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
2919                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2920         outb(0xF4, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2921
2922         /*****************************************************/
2923         /* Selects the mode specification register of port A */
2924         /*****************************************************/
2925         outb(APCI1500_RW_PORT_A_SPECIFICATION,
2926                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2927         outb(0x10, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2928
2929         /* Selects the data path polarity register of port A */
2930         outb(APCI1500_RW_PORT_A_DATA_PCITCH_POLARITY,
2931                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2932         /* High level of port A means 1 */
2933         outb(0xFF, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2934
2935         /* Selects the data direction register of port A */
2936         outb(APCI1500_RW_PORT_A_DATA_DIRECTION,
2937                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2938         /* All bits used as inputs */
2939         outb(0xFF, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2940         /* Selects the command and status register of port A */
2941         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
2942                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2943         /* Deletes IP and IUS */
2944         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2945         /*  Selects the command and status register of port A */
2946         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
2947                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2948         /* Deactivates the interrupt management of port A:  */
2949         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2950         /* Selects the handshake specification register of port A */
2951         outb(APCI1500_RW_PORT_A_HANDSHAKE_SPECIFICATION,
2952                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2953         /* Deletes the register */
2954         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2955
2956          /*****************************************************/
2957         /* Selects the mode specification register of port B */
2958          /*****************************************************/
2959         outb(APCI1500_RW_PORT_B_SPECIFICATION,
2960                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2961         outb(0x10, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2962         /* Selects the data path polarity register of port B */
2963         outb(APCI1500_RW_PORT_B_DATA_PCITCH_POLARITY,
2964                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2965         /* A high level of port B means 1 */
2966         outb(0x7F, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2967         /* Selects the data direction register of port B */
2968         outb(APCI1500_RW_PORT_B_DATA_DIRECTION,
2969                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2970         /* All bits used as inputs */
2971         outb(0xFF, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2972         /* Selects the command and status register of port B */
2973         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
2974                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2975         /* Deletes IP and IUS */
2976         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2977         /* Selects the command and status register of port B */
2978         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
2979                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2980         /* Deactivates the interrupt management of port B:         */
2981         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2982         /* Selects the handshake specification register of port B */
2983         outb(APCI1500_RW_PORT_B_HANDSHAKE_SPECIFICATION,
2984                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2985         /* Deletes the register */
2986         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2987
2988            /*****************************************************/
2989         /* Selects the data path polarity register of port C */
2990            /*****************************************************/
2991         outb(APCI1500_RW_PORT_C_DATA_PCITCH_POLARITY,
2992                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2993         /* High level of port C means 1 */
2994         outb(0x9, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2995         /* Selects the data direction register of port C */
2996         outb(APCI1500_RW_PORT_C_DATA_DIRECTION,
2997                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
2998         /* All bits used as inputs except channel 1 */
2999         outb(0x0E, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3000         /* Selects the special IO register of port C */
3001         outb(APCI1500_RW_PORT_C_SPECIAL_IO_CONTROL,
3002                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3003         /* Deletes it */
3004         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3005            /******************************************************/
3006         /* Selects the command and status register of timer 1 */
3007            /******************************************************/
3008         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
3009                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3010         /* Deletes IP and IUS */
3011         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3012         /* Selects the command and status register of timer 1 */
3013         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
3014                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3015         /* Deactivates the interrupt management of timer 1         */
3016         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3017            /******************************************************/
3018         /* Selects the command and status register of timer 2 */
3019            /******************************************************/
3020         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
3021                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3022         /* Deletes IP and IUS */
3023         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3024         /* Selects the command and status register of timer 2 */
3025         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
3026                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3027         /* Deactivates Timer 2 interrupt management:               */
3028         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3029           /******************************************************/
3030         /* Selects the command and status register of timer 3 */
3031           /******************************************************/
3032         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
3033                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3034         /* Deletes IP and IUS */
3035         outb(0x20, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3036         /* Selects the command and status register of Timer 3 */
3037         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
3038                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3039         /* Deactivates interrupt management of timer 3:            */
3040         outb(0xE0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3041          /*************************************************/
3042         /* Selects the master interrupt control register */
3043          /*************************************************/
3044         outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
3045                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3046         /* Deletes all interrupts */
3047         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3048         /* reset all the digital outputs */
3049         outw(0x0, devpriv->i_IobaseAddon + APCI1500_DIGITAL_OP);
3050 /*******************************/
3051 /* Disable the board interrupt */
3052 /*******************************/
3053  /*************************************************/
3054         /* Selects the master interrupt control register */
3055  /*************************************************/
3056         outb(APCI1500_RW_MASTER_INTERRUPT_CONTROL,
3057                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3058 /****************************/
3059 /* Deactivates all interrupts */
3060 /******************************/
3061         outb(0, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3062  /*****************************************************/
3063         /* Selects the command and status register of port A */
3064  /*****************************************************/
3065         outb(APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
3066                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3067 /****************************/
3068 /* Deactivates all interrupts */
3069 /******************************/
3070         outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3071 /*****************************************************/
3072         /* Selects the command and status register of port B */
3073  /*****************************************************/
3074         outb(APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
3075                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3076 /****************************/
3077 /* Deactivates all interrupts */
3078 /******************************/
3079         outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3080 /*****************************************************/
3081         /* Selects the command and status register of timer 1 */
3082  /*****************************************************/
3083         outb(APCI1500_RW_CPT_TMR1_CMD_STATUS,
3084                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3085 /****************************/
3086 /* Deactivates all interrupts */
3087 /******************************/
3088         outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3089 /*****************************************************/
3090         /* Selects the command and status register of timer 2 */
3091  /*****************************************************/
3092         outb(APCI1500_RW_CPT_TMR2_CMD_STATUS,
3093                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3094 /****************************/
3095 /* Deactivates all interrupts */
3096 /******************************/
3097         outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3098 /*****************************************************/
3099 /* Selects the command and status register of timer 3*/
3100 /*****************************************************/
3101         outb(APCI1500_RW_CPT_TMR3_CMD_STATUS,
3102                 devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3103 /****************************/
3104 /* Deactivates all interrupts */
3105 /******************************/
3106         outb(0x00, devpriv->iobase + APCI1500_Z8536_CONTROL_REGISTER);
3107         return 0;
3108 }