2 * Sonics Silicon Backplane
3 * Embedded systems support code
5 * Copyright 2005-2008, Broadcom Corporation
6 * Copyright 2006-2008, Michael Buesch <m@bues.ch>
7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
9 * Licensed under the GNU/GPL. See COPYING for details.
12 #include <linux/export.h>
13 #include <linux/platform_device.h>
14 #include <linux/ssb/ssb.h>
15 #include <linux/ssb/ssb_embedded.h>
16 #include <linux/ssb/ssb_driver_pci.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/pci.h>
20 #include "ssb_private.h"
23 int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
25 if (ssb_chipco_available(&bus->chipco)) {
26 ssb_chipco_watchdog_timer_set(&bus->chipco, ticks);
29 if (ssb_extif_available(&bus->extif)) {
30 ssb_extif_watchdog_timer_set(&bus->extif, ticks);
35 EXPORT_SYMBOL(ssb_watchdog_timer_set);
37 int ssb_watchdog_register(struct ssb_bus *bus)
39 struct bcm47xx_wdt wdt = {};
40 struct platform_device *pdev;
42 if (ssb_chipco_available(&bus->chipco)) {
43 wdt.driver_data = &bus->chipco;
44 wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt;
45 wdt.timer_set_ms = ssb_chipco_watchdog_timer_set_ms;
46 wdt.max_timer_ms = bus->chipco.max_timer_ms;
47 } else if (ssb_extif_available(&bus->extif)) {
48 wdt.driver_data = &bus->extif;
49 wdt.timer_set = ssb_extif_watchdog_timer_set_wdt;
50 wdt.timer_set_ms = ssb_extif_watchdog_timer_set_ms;
51 wdt.max_timer_ms = SSB_EXTIF_WATCHDOG_MAX_TIMER_MS;
56 pdev = platform_device_register_data(NULL, "bcm47xx-wdt",
60 ssb_dprintk(KERN_INFO PFX
61 "can not register watchdog device, err: %li\n",
70 u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask)
75 spin_lock_irqsave(&bus->gpio_lock, flags);
76 if (ssb_chipco_available(&bus->chipco))
77 res = ssb_chipco_gpio_in(&bus->chipco, mask);
78 else if (ssb_extif_available(&bus->extif))
79 res = ssb_extif_gpio_in(&bus->extif, mask);
82 spin_unlock_irqrestore(&bus->gpio_lock, flags);
86 EXPORT_SYMBOL(ssb_gpio_in);
88 u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value)
93 spin_lock_irqsave(&bus->gpio_lock, flags);
94 if (ssb_chipco_available(&bus->chipco))
95 res = ssb_chipco_gpio_out(&bus->chipco, mask, value);
96 else if (ssb_extif_available(&bus->extif))
97 res = ssb_extif_gpio_out(&bus->extif, mask, value);
100 spin_unlock_irqrestore(&bus->gpio_lock, flags);
104 EXPORT_SYMBOL(ssb_gpio_out);
106 u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value)
111 spin_lock_irqsave(&bus->gpio_lock, flags);
112 if (ssb_chipco_available(&bus->chipco))
113 res = ssb_chipco_gpio_outen(&bus->chipco, mask, value);
114 else if (ssb_extif_available(&bus->extif))
115 res = ssb_extif_gpio_outen(&bus->extif, mask, value);
118 spin_unlock_irqrestore(&bus->gpio_lock, flags);
122 EXPORT_SYMBOL(ssb_gpio_outen);
124 u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value)
129 spin_lock_irqsave(&bus->gpio_lock, flags);
130 if (ssb_chipco_available(&bus->chipco))
131 res = ssb_chipco_gpio_control(&bus->chipco, mask, value);
132 spin_unlock_irqrestore(&bus->gpio_lock, flags);
136 EXPORT_SYMBOL(ssb_gpio_control);
138 u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value)
143 spin_lock_irqsave(&bus->gpio_lock, flags);
144 if (ssb_chipco_available(&bus->chipco))
145 res = ssb_chipco_gpio_intmask(&bus->chipco, mask, value);
146 else if (ssb_extif_available(&bus->extif))
147 res = ssb_extif_gpio_intmask(&bus->extif, mask, value);
150 spin_unlock_irqrestore(&bus->gpio_lock, flags);
154 EXPORT_SYMBOL(ssb_gpio_intmask);
156 u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value)
161 spin_lock_irqsave(&bus->gpio_lock, flags);
162 if (ssb_chipco_available(&bus->chipco))
163 res = ssb_chipco_gpio_polarity(&bus->chipco, mask, value);
164 else if (ssb_extif_available(&bus->extif))
165 res = ssb_extif_gpio_polarity(&bus->extif, mask, value);
168 spin_unlock_irqrestore(&bus->gpio_lock, flags);
172 EXPORT_SYMBOL(ssb_gpio_polarity);
174 #ifdef CONFIG_SSB_DRIVER_GIGE
175 static int gige_pci_init_callback(struct ssb_bus *bus, unsigned long data)
177 struct pci_dev *pdev = (struct pci_dev *)data;
178 struct ssb_device *dev;
182 for (i = 0; i < bus->nr_devices; i++) {
183 dev = &(bus->devices[i]);
184 if (dev->id.coreid != SSB_DEV_ETHERNET_GBIT)
188 !device_is_registered(dev->dev))
190 res = ssb_gige_pcibios_plat_dev_init(dev, pdev);
197 #endif /* CONFIG_SSB_DRIVER_GIGE */
199 int ssb_pcibios_plat_dev_init(struct pci_dev *dev)
203 err = ssb_pcicore_plat_dev_init(dev);
206 #ifdef CONFIG_SSB_DRIVER_GIGE
207 err = ssb_for_each_bus_call((unsigned long)dev, gige_pci_init_callback);
211 /* This is not a PCI device on any SSB device. */
216 #ifdef CONFIG_SSB_DRIVER_GIGE
217 static int gige_map_irq_callback(struct ssb_bus *bus, unsigned long data)
219 const struct pci_dev *pdev = (const struct pci_dev *)data;
220 struct ssb_device *dev;
224 for (i = 0; i < bus->nr_devices; i++) {
225 dev = &(bus->devices[i]);
226 if (dev->id.coreid != SSB_DEV_ETHERNET_GBIT)
230 !device_is_registered(dev->dev))
232 res = ssb_gige_map_irq(dev, pdev);
239 #endif /* CONFIG_SSB_DRIVER_GIGE */
241 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
245 /* Check if this PCI device is a device on a SSB bus or device
246 * and return the IRQ number for it. */
248 res = ssb_pcicore_pcibios_map_irq(dev, slot, pin);
251 #ifdef CONFIG_SSB_DRIVER_GIGE
252 res = ssb_for_each_bus_call((unsigned long)dev, gige_map_irq_callback);
256 /* This is not a PCI device on any SSB device. */