1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
4 * Copyright (C) 2013, 2021 Intel Corporation
10 #include <linux/interrupt.h>
12 #include <linux/types.h>
13 #include <linux/sizes.h>
15 #include <linux/pxa2xx_ssp.h>
18 struct pxa2xx_spi_controller;
19 struct spi_controller;
25 struct ssp_device *ssp;
27 /* SPI framework hookup */
28 enum pxa_ssp_type ssp_type;
29 struct spi_controller *controller;
32 struct pxa2xx_spi_controller *controller_info;
40 /* DMA engine support */
43 /* Current transfer state info */
49 int (*write)(struct driver_data *drv_data);
50 int (*read)(struct driver_data *drv_data);
51 irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
52 void (*cs_control)(u32 command);
54 void __iomem *lpss_base;
56 /* Optional slave FIFO ready signal */
57 struct gpio_desc *gpiod_ready;
69 u16 lpss_rx_threshold;
70 u16 lpss_tx_threshold;
72 int (*write)(struct driver_data *drv_data);
73 int (*read)(struct driver_data *drv_data);
75 void (*cs_control)(u32 command);
78 static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg)
80 return pxa_ssp_read_reg(drv_data->ssp, reg);
83 static inline void pxa2xx_spi_write(const struct driver_data *drv_data, u32 reg, u32 val)
85 pxa_ssp_write_reg(drv_data->ssp, reg, val);
88 #define DMA_ALIGNMENT 8
90 static inline int pxa25x_ssp_comp(const struct driver_data *drv_data)
92 switch (drv_data->ssp_type) {
102 static inline void clear_SSCR1_bits(const struct driver_data *drv_data, u32 bits)
104 pxa2xx_spi_write(drv_data, SSCR1, pxa2xx_spi_read(drv_data, SSCR1) & ~bits);
107 static inline u32 read_SSSR_bits(const struct driver_data *drv_data, u32 bits)
109 return pxa2xx_spi_read(drv_data, SSSR) & bits;
112 static inline void write_SSSR_CS(const struct driver_data *drv_data, u32 val)
114 if (drv_data->ssp_type == CE4100_SSP ||
115 drv_data->ssp_type == QUARK_X1000_SSP)
116 val |= read_SSSR_bits(drv_data, SSSR_ALT_FRM_MASK);
118 pxa2xx_spi_write(drv_data, SSSR, val);
121 extern int pxa2xx_spi_flush(struct driver_data *drv_data);
123 #define MAX_DMA_LEN SZ_64K
124 #define DEFAULT_DMA_CR1 (SSCR1_TSRE | SSCR1_RSRE | SSCR1_TRAIL)
126 extern irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data);
127 extern int pxa2xx_spi_dma_prepare(struct driver_data *drv_data,
128 struct spi_transfer *xfer);
129 extern void pxa2xx_spi_dma_start(struct driver_data *drv_data);
130 extern void pxa2xx_spi_dma_stop(struct driver_data *drv_data);
131 extern int pxa2xx_spi_dma_setup(struct driver_data *drv_data);
132 extern void pxa2xx_spi_dma_release(struct driver_data *drv_data);
133 extern int pxa2xx_spi_set_dma_burst_and_threshold(struct chip_data *chip,
134 struct spi_device *spi,
139 #endif /* SPI_PXA2XX_H */