1 // SPDX-License-Identifier: GPL-2.0-only
3 * MPC52xx SPI bus driver.
5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
7 * This is the driver for the MPC5200's dedicated SPI controller.
9 * Note: this driver does not support the MPC5200 PSC in SPI mode. For
10 * that driver see drivers/spi/mpc52xx_psc_spi.c
13 #include <linux/module.h>
14 #include <linux/errno.h>
15 #include <linux/of_platform.h>
16 #include <linux/interrupt.h>
17 #include <linux/delay.h>
18 #include <linux/spi/spi.h>
20 #include <linux/of_gpio.h>
21 #include <linux/slab.h>
23 #include <asm/mpc52xx.h>
25 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
26 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
27 MODULE_LICENSE("GPL");
29 /* Register offsets */
30 #define SPI_CTRL1 0x00
31 #define SPI_CTRL1_SPIE (1 << 7)
32 #define SPI_CTRL1_SPE (1 << 6)
33 #define SPI_CTRL1_MSTR (1 << 4)
34 #define SPI_CTRL1_CPOL (1 << 3)
35 #define SPI_CTRL1_CPHA (1 << 2)
36 #define SPI_CTRL1_SSOE (1 << 1)
37 #define SPI_CTRL1_LSBFE (1 << 0)
39 #define SPI_CTRL2 0x01
42 #define SPI_STATUS 0x05
43 #define SPI_STATUS_SPIF (1 << 7)
44 #define SPI_STATUS_WCOL (1 << 6)
45 #define SPI_STATUS_MODF (1 << 4)
48 #define SPI_PORTDATA 0x0d
49 #define SPI_DATADIR 0x10
51 /* FSM state return values */
52 #define FSM_STOP 0 /* Nothing more for the state machine to */
53 /* do. If something interesting happens */
54 /* then an IRQ will be received */
55 #define FSM_POLL 1 /* need to poll for completion, an IRQ is */
57 #define FSM_CONTINUE 2 /* Keep iterating the state machine */
59 /* Driver internal data */
61 struct spi_master *master;
63 int irq0; /* MODF irq */
64 int irq1; /* SPIF irq */
65 unsigned int ipb_freq;
67 /* Statistics; not used now, but will be reintroduced for debugfs */
71 u32 wcol_tx_timestamp;
75 struct list_head queue; /* queue of pending messages */
77 struct work_struct work;
79 /* Details of current transfer (length, and buffer pointers) */
80 struct spi_message *message; /* current message */
81 struct spi_transfer *transfer; /* current transfer */
82 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
89 unsigned int *gpio_cs;
95 static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
99 if (ms->gpio_cs_count > 0) {
100 cs = ms->message->spi->chip_select;
101 gpio_set_value(ms->gpio_cs[cs], value ? 0 : 1);
103 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
107 * Start a new transfer. This is called both by the idle state
108 * for the first transfer in a message, and by the wait state when the
109 * previous transfer in a message is complete.
111 static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
113 ms->rx_buf = ms->transfer->rx_buf;
114 ms->tx_buf = ms->transfer->tx_buf;
115 ms->len = ms->transfer->len;
117 /* Activate the chip select */
119 mpc52xx_spi_chipsel(ms, 1);
120 ms->cs_change = ms->transfer->cs_change;
122 /* Write out the first byte */
123 ms->wcol_tx_timestamp = get_tbl();
125 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
127 out_8(ms->regs + SPI_DATA, 0);
130 /* Forward declaration of state handlers */
131 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
133 static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
139 * No transfers are in progress; if another transfer is pending then retrieve
140 * it and kick it off. Otherwise, stop processing the state machine
143 mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
145 struct spi_device *spi;
149 if (status && (irq != NO_IRQ))
150 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
153 /* Check if there is another transfer waiting. */
154 if (list_empty(&ms->queue))
157 /* get the head of the queue */
158 ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
159 list_del_init(&ms->message->queue);
161 /* Setup the controller parameters */
162 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
163 spi = ms->message->spi;
164 if (spi->mode & SPI_CPHA)
165 ctrl1 |= SPI_CTRL1_CPHA;
166 if (spi->mode & SPI_CPOL)
167 ctrl1 |= SPI_CTRL1_CPOL;
168 if (spi->mode & SPI_LSB_FIRST)
169 ctrl1 |= SPI_CTRL1_LSBFE;
170 out_8(ms->regs + SPI_CTRL1, ctrl1);
172 /* Setup the controller speed */
173 /* minimum divider is '2'. Also, add '1' to force rounding the
175 sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
179 while (((sppr - 1) & ~0x7) != 0) {
180 sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
183 sppr--; /* sppr quantity in register is offset by 1 */
185 /* Don't overrun limits of SPI baudrate register */
189 out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
192 ms->transfer = container_of(ms->message->transfers.next,
193 struct spi_transfer, transfer_list);
195 mpc52xx_spi_start_transfer(ms);
196 ms->state = mpc52xx_spi_fsmstate_transfer;
204 * In the middle of a transfer. If the SPI core has completed processing
205 * a byte, then read out the received data and write out the next byte
206 * (unless this transfer is finished; in which case go on to the wait
209 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
213 return ms->irq0 ? FSM_STOP : FSM_POLL;
215 if (status & SPI_STATUS_WCOL) {
216 /* The SPI controller is stoopid. At slower speeds, it may
217 * raise the SPIF flag before the state machine is actually
218 * finished, which causes a collision (internal to the state
219 * machine only). The manual recommends inserting a delay
220 * between receiving the interrupt and sending the next byte,
221 * but it can also be worked around simply by retrying the
222 * transfer which is what we do here. */
224 ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
225 ms->wcol_tx_timestamp = get_tbl();
228 data = *(ms->tx_buf - 1);
229 out_8(ms->regs + SPI_DATA, data); /* try again */
231 } else if (status & SPI_STATUS_MODF) {
233 dev_err(&ms->master->dev, "mode fault\n");
234 mpc52xx_spi_chipsel(ms, 0);
235 ms->message->status = -EIO;
236 if (ms->message->complete)
237 ms->message->complete(ms->message->context);
238 ms->state = mpc52xx_spi_fsmstate_idle;
242 /* Read data out of the spi device */
245 *ms->rx_buf++ = data;
247 /* Is the transfer complete? */
250 ms->timestamp = get_tbl();
251 ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
252 ms->state = mpc52xx_spi_fsmstate_wait;
256 /* Write out the next byte */
257 ms->wcol_tx_timestamp = get_tbl();
259 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
261 out_8(ms->regs + SPI_DATA, 0);
269 * A transfer has completed; need to wait for the delay period to complete
270 * before starting the next transfer
273 mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
276 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
279 if (((int)get_tbl()) - ms->timestamp < 0)
282 ms->message->actual_length += ms->transfer->len;
284 /* Check if there is another transfer in this message. If there
285 * aren't then deactivate CS, notify sender, and drop back to idle
286 * to start the next message. */
287 if (ms->transfer->transfer_list.next == &ms->message->transfers) {
289 mpc52xx_spi_chipsel(ms, 0);
290 ms->message->status = 0;
291 if (ms->message->complete)
292 ms->message->complete(ms->message->context);
293 ms->state = mpc52xx_spi_fsmstate_idle;
297 /* There is another transfer; kick it off */
300 mpc52xx_spi_chipsel(ms, 0);
302 ms->transfer = container_of(ms->transfer->transfer_list.next,
303 struct spi_transfer, transfer_list);
304 mpc52xx_spi_start_transfer(ms);
305 ms->state = mpc52xx_spi_fsmstate_transfer;
310 * mpc52xx_spi_fsm_process - Finite State Machine iteration function
311 * @irq: irq number that triggered the FSM or 0 for polling
312 * @ms: pointer to mpc52xx_spi driver data
314 static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
316 int rc = FSM_CONTINUE;
319 while (rc == FSM_CONTINUE) {
320 /* Interrupt cleared by read of STATUS followed by
321 * read of DATA registers */
322 status = in_8(ms->regs + SPI_STATUS);
323 data = in_8(ms->regs + SPI_DATA);
324 rc = ms->state(irq, ms, status, data);
328 schedule_work(&ms->work);
332 * mpc52xx_spi_irq - IRQ handler
334 static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
336 struct mpc52xx_spi *ms = _ms;
337 spin_lock(&ms->lock);
338 mpc52xx_spi_fsm_process(irq, ms);
339 spin_unlock(&ms->lock);
344 * mpc52xx_spi_wq - Workqueue function for polling the state machine
346 static void mpc52xx_spi_wq(struct work_struct *work)
348 struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
351 spin_lock_irqsave(&ms->lock, flags);
352 mpc52xx_spi_fsm_process(0, ms);
353 spin_unlock_irqrestore(&ms->lock, flags);
360 static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
362 struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
365 m->actual_length = 0;
366 m->status = -EINPROGRESS;
368 spin_lock_irqsave(&ms->lock, flags);
369 list_add_tail(&m->queue, &ms->queue);
370 spin_unlock_irqrestore(&ms->lock, flags);
371 schedule_work(&ms->work);
377 * OF Platform Bus Binding
379 static int mpc52xx_spi_probe(struct platform_device *op)
381 struct spi_master *master;
382 struct mpc52xx_spi *ms;
389 dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
390 regs = of_iomap(op->dev.of_node, 0);
394 /* initialize the device */
395 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
396 out_8(regs + SPI_CTRL1, ctrl1);
397 out_8(regs + SPI_CTRL2, 0x0);
398 out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
399 out_8(regs + SPI_PORTDATA, 0x8); /* Deassert /SS signal */
401 /* Clear the status register and re-read it to check for a MODF
402 * failure. This driver cannot currently handle multiple masters
403 * on the SPI bus. This fault will also occur if the SPI signals
404 * are not connected to any pins (port_config setting) */
405 in_8(regs + SPI_STATUS);
406 out_8(regs + SPI_CTRL1, ctrl1);
408 in_8(regs + SPI_DATA);
409 if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
410 dev_err(&op->dev, "mode fault; is port_config correct?\n");
415 dev_dbg(&op->dev, "allocating spi_master struct\n");
416 master = spi_alloc_master(&op->dev, sizeof *ms);
422 master->transfer = mpc52xx_spi_transfer;
423 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
424 master->bits_per_word_mask = SPI_BPW_MASK(8);
425 master->dev.of_node = op->dev.of_node;
427 platform_set_drvdata(op, master);
429 ms = spi_master_get_devdata(master);
432 ms->irq0 = irq_of_parse_and_map(op->dev.of_node, 0);
433 ms->irq1 = irq_of_parse_and_map(op->dev.of_node, 1);
434 ms->state = mpc52xx_spi_fsmstate_idle;
435 ms->ipb_freq = mpc5xxx_get_bus_frequency(op->dev.of_node);
436 ms->gpio_cs_count = of_gpio_count(op->dev.of_node);
437 if (ms->gpio_cs_count > 0) {
438 master->num_chipselect = ms->gpio_cs_count;
439 ms->gpio_cs = kmalloc_array(ms->gpio_cs_count,
440 sizeof(*ms->gpio_cs),
447 for (i = 0; i < ms->gpio_cs_count; i++) {
448 gpio_cs = of_get_gpio(op->dev.of_node, i);
449 if (!gpio_is_valid(gpio_cs)) {
451 "could not parse the gpio field in oftree\n");
456 rc = gpio_request(gpio_cs, dev_name(&op->dev));
459 "can't request spi cs gpio #%d on gpio line %d\n",
464 gpio_direction_output(gpio_cs, 1);
465 ms->gpio_cs[i] = gpio_cs;
469 spin_lock_init(&ms->lock);
470 INIT_LIST_HEAD(&ms->queue);
471 INIT_WORK(&ms->work, mpc52xx_spi_wq);
473 /* Decide if interrupts can be used */
474 if (ms->irq0 && ms->irq1) {
475 rc = request_irq(ms->irq0, mpc52xx_spi_irq, 0,
476 "mpc5200-spi-modf", ms);
477 rc |= request_irq(ms->irq1, mpc52xx_spi_irq, 0,
478 "mpc5200-spi-spif", ms);
480 free_irq(ms->irq0, ms);
481 free_irq(ms->irq1, ms);
482 ms->irq0 = ms->irq1 = 0;
485 /* operate in polled mode */
486 ms->irq0 = ms->irq1 = 0;
490 dev_info(&op->dev, "using polled mode\n");
492 dev_dbg(&op->dev, "registering spi_master struct\n");
493 rc = spi_register_master(master);
497 dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
502 dev_err(&ms->master->dev, "initialization failed\n");
505 gpio_free(ms->gpio_cs[i]);
509 spi_master_put(master);
516 static int mpc52xx_spi_remove(struct platform_device *op)
518 struct spi_master *master = spi_master_get(platform_get_drvdata(op));
519 struct mpc52xx_spi *ms = spi_master_get_devdata(master);
522 free_irq(ms->irq0, ms);
523 free_irq(ms->irq1, ms);
525 for (i = 0; i < ms->gpio_cs_count; i++)
526 gpio_free(ms->gpio_cs[i]);
529 spi_unregister_master(master);
531 spi_master_put(master);
536 static const struct of_device_id mpc52xx_spi_match[] = {
537 { .compatible = "fsl,mpc5200-spi", },
540 MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
542 static struct platform_driver mpc52xx_spi_of_driver = {
544 .name = "mpc52xx-spi",
545 .of_match_table = mpc52xx_spi_match,
547 .probe = mpc52xx_spi_probe,
548 .remove = mpc52xx_spi_remove,
550 module_platform_driver(mpc52xx_spi_of_driver);