1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Exceet Electronics GmbH
4 * Copyright (C) 2018 Bootlin
6 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
10 #include <linux/dmaengine.h>
11 #include <linux/pm_runtime.h>
12 #include "internals.h"
20 * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
22 * @ctlr: the SPI controller requesting this dma_map()
23 * @op: the memory operation containing the buffer to map
24 * @sgt: a pointer to a non-initialized sg_table that will be filled by this
27 * Some controllers might want to do DMA on the data buffer embedded in @op.
28 * This helper prepares everything for you and provides a ready-to-use
29 * sg_table. This function is not intended to be called from spi drivers.
30 * Only SPI controller drivers should use it.
31 * Note that the caller must ensure the memory region pointed by
32 * op->data.buf.{in,out} is DMA-able before calling this function.
34 * Return: 0 in case of success, a negative error code otherwise.
36 int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
37 const struct spi_mem_op *op,
40 struct device *dmadev;
45 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
46 dmadev = ctlr->dma_tx->device->dev;
47 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
48 dmadev = ctlr->dma_rx->device->dev;
50 dmadev = ctlr->dev.parent;
55 return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
56 op->data.dir == SPI_MEM_DATA_IN ?
57 DMA_FROM_DEVICE : DMA_TO_DEVICE);
59 EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
62 * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
64 * @ctlr: the SPI controller requesting this dma_unmap()
65 * @op: the memory operation containing the buffer to unmap
66 * @sgt: a pointer to an sg_table previously initialized by
67 * spi_controller_dma_map_mem_op_data()
69 * Some controllers might want to do DMA on the data buffer embedded in @op.
70 * This helper prepares things so that the CPU can access the
71 * op->data.buf.{in,out} buffer again.
73 * This function is not intended to be called from SPI drivers. Only SPI
74 * controller drivers should use it.
76 * This function should be called after the DMA operation has finished and is
77 * only valid if the previous spi_controller_dma_map_mem_op_data() call
80 * Return: 0 in case of success, a negative error code otherwise.
82 void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
83 const struct spi_mem_op *op,
86 struct device *dmadev;
91 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
92 dmadev = ctlr->dma_tx->device->dev;
93 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
94 dmadev = ctlr->dma_rx->device->dev;
96 dmadev = ctlr->dev.parent;
98 spi_unmap_buf(ctlr, dmadev, sgt,
99 op->data.dir == SPI_MEM_DATA_IN ?
100 DMA_FROM_DEVICE : DMA_TO_DEVICE);
102 EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
103 #endif /* __UBOOT__ */
105 static int spi_check_buswidth_req(struct spi_slave *slave, u8 buswidth, bool tx)
107 u32 mode = slave->mode;
114 if ((tx && (mode & (SPI_TX_DUAL | SPI_TX_QUAD))) ||
115 (!tx && (mode & (SPI_RX_DUAL | SPI_RX_QUAD))))
121 if ((tx && (mode & SPI_TX_QUAD)) ||
122 (!tx && (mode & SPI_RX_QUAD)))
134 bool spi_mem_default_supports_op(struct spi_slave *slave,
135 const struct spi_mem_op *op)
137 if (spi_check_buswidth_req(slave, op->cmd.buswidth, true))
140 if (op->addr.nbytes &&
141 spi_check_buswidth_req(slave, op->addr.buswidth, true))
144 if (op->dummy.nbytes &&
145 spi_check_buswidth_req(slave, op->dummy.buswidth, true))
148 if (op->data.nbytes &&
149 spi_check_buswidth_req(slave, op->data.buswidth,
150 op->data.dir == SPI_MEM_DATA_OUT))
155 EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
158 * spi_mem_supports_op() - Check if a memory device and the controller it is
159 * connected to support a specific memory operation
160 * @slave: the SPI device
161 * @op: the memory operation to check
163 * Some controllers are only supporting Single or Dual IOs, others might only
164 * support specific opcodes, or it can even be that the controller and device
165 * both support Quad IOs but the hardware prevents you from using it because
166 * only 2 IO lines are connected.
168 * This function checks whether a specific operation is supported.
170 * Return: true if @op is supported, false otherwise.
172 bool spi_mem_supports_op(struct spi_slave *slave,
173 const struct spi_mem_op *op)
175 struct udevice *bus = slave->dev->parent;
176 struct dm_spi_ops *ops = spi_get_ops(bus);
178 if (ops->mem_ops && ops->mem_ops->supports_op)
179 return ops->mem_ops->supports_op(slave, op);
181 return spi_mem_default_supports_op(slave, op);
183 EXPORT_SYMBOL_GPL(spi_mem_supports_op);
186 * spi_mem_exec_op() - Execute a memory operation
187 * @slave: the SPI device
188 * @op: the memory operation to execute
190 * Executes a memory operation.
192 * This function first checks that @op is supported and then tries to execute
195 * Return: 0 in case of success, a negative error code otherwise.
197 int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
199 struct udevice *bus = slave->dev->parent;
200 struct dm_spi_ops *ops = spi_get_ops(bus);
201 unsigned int pos = 0;
202 const u8 *tx_buf = NULL;
210 if (!spi_mem_supports_op(slave, op))
216 * Flush the message queue before executing our SPI memory
217 * operation to prevent preemption of regular SPI transfers.
219 spi_flush_queue(ctlr);
221 if (ctlr->auto_runtime_pm) {
222 ret = pm_runtime_get_sync(ctlr->dev.parent);
225 "Failed to power device: %d\n",
231 mutex_lock(&ctlr->bus_lock_mutex);
232 mutex_lock(&ctlr->io_mutex);
234 ret = ops->mem_ops->exec_op(slave, op);
236 mutex_unlock(&ctlr->io_mutex);
237 mutex_unlock(&ctlr->bus_lock_mutex);
239 if (ctlr->auto_runtime_pm)
240 pm_runtime_put(ctlr->dev.parent);
244 * Some controllers only optimize specific paths (typically the
245 * read path) and expect the core to use the regular SPI
246 * interface in other cases.
248 if (!ret || ret != -ENOTSUPP)
253 tmpbufsize = sizeof(op->cmd.opcode) + op->addr.nbytes +
257 * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
258 * we're guaranteed that this buffer is DMA-able, as required by the
261 tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
265 spi_message_init(&msg);
267 tmpbuf[0] = op->cmd.opcode;
268 xfers[xferpos].tx_buf = tmpbuf;
269 xfers[xferpos].len = sizeof(op->cmd.opcode);
270 xfers[xferpos].tx_nbits = op->cmd.buswidth;
271 spi_message_add_tail(&xfers[xferpos], &msg);
275 if (op->addr.nbytes) {
278 for (i = 0; i < op->addr.nbytes; i++)
279 tmpbuf[i + 1] = op->addr.val >>
280 (8 * (op->addr.nbytes - i - 1));
282 xfers[xferpos].tx_buf = tmpbuf + 1;
283 xfers[xferpos].len = op->addr.nbytes;
284 xfers[xferpos].tx_nbits = op->addr.buswidth;
285 spi_message_add_tail(&xfers[xferpos], &msg);
287 totalxferlen += op->addr.nbytes;
290 if (op->dummy.nbytes) {
291 memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
292 xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
293 xfers[xferpos].len = op->dummy.nbytes;
294 xfers[xferpos].tx_nbits = op->dummy.buswidth;
295 spi_message_add_tail(&xfers[xferpos], &msg);
297 totalxferlen += op->dummy.nbytes;
300 if (op->data.nbytes) {
301 if (op->data.dir == SPI_MEM_DATA_IN) {
302 xfers[xferpos].rx_buf = op->data.buf.in;
303 xfers[xferpos].rx_nbits = op->data.buswidth;
305 xfers[xferpos].tx_buf = op->data.buf.out;
306 xfers[xferpos].tx_nbits = op->data.buswidth;
309 xfers[xferpos].len = op->data.nbytes;
310 spi_message_add_tail(&xfers[xferpos], &msg);
312 totalxferlen += op->data.nbytes;
315 ret = spi_sync(slave, &msg);
322 if (msg.actual_length != totalxferlen)
326 /* U-Boot does not support parallel SPI data lanes */
327 if ((op->cmd.buswidth != 1) ||
328 (op->addr.nbytes && op->addr.buswidth != 1) ||
329 (op->dummy.nbytes && op->dummy.buswidth != 1) ||
330 (op->data.nbytes && op->data.buswidth != 1)) {
331 printf("Dual/Quad raw SPI transfers not supported\n");
335 if (op->data.nbytes) {
336 if (op->data.dir == SPI_MEM_DATA_IN)
337 rx_buf = op->data.buf.in;
339 tx_buf = op->data.buf.out;
342 op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes;
343 op_buf = calloc(1, op_len);
345 ret = spi_claim_bus(slave);
349 op_buf[pos++] = op->cmd.opcode;
351 if (op->addr.nbytes) {
352 for (i = 0; i < op->addr.nbytes; i++)
353 op_buf[pos + i] = op->addr.val >>
354 (8 * (op->addr.nbytes - i - 1));
356 pos += op->addr.nbytes;
359 if (op->dummy.nbytes)
360 memset(op_buf + pos, 0xff, op->dummy.nbytes);
362 /* 1st transfer: opcode + address + dummy cycles */
363 flag = SPI_XFER_BEGIN;
364 /* Make sure to set END bit if no tx or rx data messages follow */
365 if (!tx_buf && !rx_buf)
366 flag |= SPI_XFER_END;
368 ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
372 /* 2nd transfer: rx or tx data path */
373 if (tx_buf || rx_buf) {
374 ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
375 rx_buf, SPI_XFER_END);
380 spi_release_bus(slave);
382 for (i = 0; i < pos; i++)
383 debug("%02x ", op_buf[i]);
385 tx_buf || rx_buf ? op->data.nbytes : 0,
386 tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
387 for (i = 0; i < op->data.nbytes; i++)
388 debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
389 debug("[ret %d]\n", ret);
395 #endif /* __UBOOT__ */
399 EXPORT_SYMBOL_GPL(spi_mem_exec_op);
402 * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
403 * match controller limitations
404 * @slave: the SPI device
405 * @op: the operation to adjust
407 * Some controllers have FIFO limitations and must split a data transfer
408 * operation into multiple ones, others require a specific alignment for
409 * optimized accesses. This function allows SPI mem drivers to split a single
410 * operation into multiple sub-operations when required.
412 * Return: a negative error code if the controller can't properly adjust @op,
413 * 0 otherwise. Note that @op->data.nbytes will be updated if @op
414 * can't be handled in a single step.
416 int spi_mem_adjust_op_size(struct spi_slave *slave, struct spi_mem_op *op)
418 struct udevice *bus = slave->dev->parent;
419 struct dm_spi_ops *ops = spi_get_ops(bus);
421 if (ops->mem_ops && ops->mem_ops->adjust_op_size)
422 return ops->mem_ops->adjust_op_size(slave, op);
426 EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
429 static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
431 return container_of(drv, struct spi_mem_driver, spidrv.driver);
434 static int spi_mem_probe(struct spi_device *spi)
436 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
439 mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
444 spi_set_drvdata(spi, mem);
446 return memdrv->probe(mem);
449 static int spi_mem_remove(struct spi_device *spi)
451 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
452 struct spi_mem *mem = spi_get_drvdata(spi);
455 return memdrv->remove(mem);
460 static void spi_mem_shutdown(struct spi_device *spi)
462 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
463 struct spi_mem *mem = spi_get_drvdata(spi);
465 if (memdrv->shutdown)
466 memdrv->shutdown(mem);
470 * spi_mem_driver_register_with_owner() - Register a SPI memory driver
471 * @memdrv: the SPI memory driver to register
472 * @owner: the owner of this driver
474 * Registers a SPI memory driver.
476 * Return: 0 in case of success, a negative error core otherwise.
479 int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
480 struct module *owner)
482 memdrv->spidrv.probe = spi_mem_probe;
483 memdrv->spidrv.remove = spi_mem_remove;
484 memdrv->spidrv.shutdown = spi_mem_shutdown;
486 return __spi_register_driver(owner, &memdrv->spidrv);
488 EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
491 * spi_mem_driver_unregister_with_owner() - Unregister a SPI memory driver
492 * @memdrv: the SPI memory driver to unregister
494 * Unregisters a SPI memory driver.
496 void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
498 spi_unregister_driver(&memdrv->spidrv);
500 EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
501 #endif /* __UBOOT__ */