2 * CLPS711X SPI bus driver
4 * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/clk.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/platform_data/spi-clps711x.h>
22 #include <mach/hardware.h>
24 #define DRIVER_NAME "spi-clps711x"
26 struct spi_clps711x_data {
27 struct completion done;
40 static int spi_clps711x_setup(struct spi_device *spi)
42 struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
44 /* We are expect that SPI-device is not selected */
45 gpio_direction_output(hw->chipselect[spi->chip_select],
46 !(spi->mode & SPI_CS_HIGH));
51 static void spi_clps711x_setup_mode(struct spi_device *spi)
53 /* Setup edge for transfer */
54 if (spi->mode & SPI_CPHA)
55 clps_writew(clps_readw(SYSCON3) | SYSCON3_ADCCKNSEN, SYSCON3);
57 clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCKNSEN, SYSCON3);
60 static int spi_clps711x_setup_xfer(struct spi_device *spi,
61 struct spi_transfer *xfer)
63 u32 speed = xfer->speed_hz ? : spi->max_speed_hz;
64 u8 bpw = xfer->bits_per_word;
65 struct spi_clps711x_data *hw = spi_master_get_devdata(spi->master);
68 dev_err(&spi->dev, "Unsupported master bus width %i\n", bpw);
72 /* Setup SPI frequency divider */
73 if (!speed || (speed >= hw->max_speed_hz))
74 clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
75 SYSCON1_ADCKSEL(3), SYSCON1);
76 else if (speed >= (hw->max_speed_hz / 2))
77 clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
78 SYSCON1_ADCKSEL(2), SYSCON1);
79 else if (speed >= (hw->max_speed_hz / 8))
80 clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
81 SYSCON1_ADCKSEL(1), SYSCON1);
83 clps_writel((clps_readl(SYSCON1) & ~SYSCON1_ADCKSEL_MASK) |
84 SYSCON1_ADCKSEL(0), SYSCON1);
89 static int spi_clps711x_transfer_one_message(struct spi_master *master,
90 struct spi_message *msg)
92 struct spi_clps711x_data *hw = spi_master_get_devdata(master);
93 struct spi_transfer *xfer;
94 int status = 0, cs = hw->chipselect[msg->spi->chip_select];
97 spi_clps711x_setup_mode(msg->spi);
99 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
100 if (spi_clps711x_setup_xfer(msg->spi, xfer)) {
105 gpio_set_value(cs, !!(msg->spi->mode & SPI_CS_HIGH));
107 reinit_completion(&hw->done);
111 hw->tx_buf = (u8 *)xfer->tx_buf;
112 hw->rx_buf = (u8 *)xfer->rx_buf;
114 /* Initiate transfer */
115 data = hw->tx_buf ? hw->tx_buf[hw->count] : 0;
116 clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO);
118 wait_for_completion(&hw->done);
120 if (xfer->delay_usecs)
121 udelay(xfer->delay_usecs);
123 if (xfer->cs_change ||
124 list_is_last(&xfer->transfer_list, &msg->transfers))
125 gpio_set_value(cs, !(msg->spi->mode & SPI_CS_HIGH));
127 msg->actual_length += xfer->len;
131 msg->status = status;
132 spi_finalize_current_message(master);
137 static irqreturn_t spi_clps711x_isr(int irq, void *dev_id)
139 struct spi_clps711x_data *hw = (struct spi_clps711x_data *)dev_id;
143 data = clps_readb(SYNCIO);
145 hw->rx_buf[hw->count] = (u8)data;
150 if (hw->count < hw->len) {
151 data = hw->tx_buf ? hw->tx_buf[hw->count] : 0;
152 clps_writel(data | SYNCIO_FRMLEN(8) | SYNCIO_TXFRMEN, SYNCIO);
159 static int spi_clps711x_probe(struct platform_device *pdev)
162 struct spi_master *master;
163 struct spi_clps711x_data *hw;
164 struct spi_clps711x_pdata *pdata = dev_get_platdata(&pdev->dev);
167 dev_err(&pdev->dev, "No platform data supplied\n");
171 if (pdata->num_chipselect < 1) {
172 dev_err(&pdev->dev, "At least one CS must be defined\n");
176 master = spi_alloc_master(&pdev->dev,
177 sizeof(struct spi_clps711x_data) +
178 sizeof(int) * pdata->num_chipselect);
180 dev_err(&pdev->dev, "SPI allocating memory error\n");
184 master->bus_num = pdev->id;
185 master->mode_bits = SPI_CPHA | SPI_CS_HIGH;
186 master->bits_per_word_mask = SPI_BPW_MASK(8);
187 master->num_chipselect = pdata->num_chipselect;
188 master->setup = spi_clps711x_setup;
189 master->transfer_one_message = spi_clps711x_transfer_one_message;
191 hw = spi_master_get_devdata(master);
193 for (i = 0; i < master->num_chipselect; i++) {
194 hw->chipselect[i] = pdata->chipselect[i];
195 if (!gpio_is_valid(hw->chipselect[i])) {
196 dev_err(&pdev->dev, "Invalid CS GPIO %i\n", i);
200 if (devm_gpio_request(&pdev->dev, hw->chipselect[i], NULL)) {
201 dev_err(&pdev->dev, "Can't get CS GPIO %i\n", i);
207 hw->spi_clk = devm_clk_get(&pdev->dev, "spi");
208 if (IS_ERR(hw->spi_clk)) {
209 dev_err(&pdev->dev, "Can't get clocks\n");
210 ret = PTR_ERR(hw->spi_clk);
213 hw->max_speed_hz = clk_get_rate(hw->spi_clk);
215 init_completion(&hw->done);
216 platform_set_drvdata(pdev, master);
218 /* Disable extended mode due hardware problems */
219 clps_writew(clps_readw(SYSCON3) & ~SYSCON3_ADCCON, SYSCON3);
221 /* Clear possible pending interrupt */
224 ret = devm_request_irq(&pdev->dev, IRQ_SSEOTI, spi_clps711x_isr, 0,
225 dev_name(&pdev->dev), hw);
227 dev_err(&pdev->dev, "Can't request IRQ\n");
231 ret = devm_spi_register_master(&pdev->dev, master);
234 "SPI bus driver initialized. Master clock %u Hz\n",
239 dev_err(&pdev->dev, "Failed to register master\n");
242 spi_master_put(master);
247 static struct platform_driver clps711x_spi_driver = {
250 .owner = THIS_MODULE,
252 .probe = spi_clps711x_probe,
254 module_platform_driver(clps711x_spi_driver);
256 MODULE_LICENSE("GPL");
257 MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>");
258 MODULE_DESCRIPTION("CLPS711X SPI bus driver");
259 MODULE_ALIAS("platform:" DRIVER_NAME);