2 * polling/bitbanging SPI master controller driver utilities
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/spinlock.h>
16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/spi_bitbang.h>
27 #define SPI_BITBANG_CS_DELAY 100
30 /*----------------------------------------------------------------------*/
33 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
34 * Use this for GPIO or shift-register level hardware APIs.
36 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
37 * to glue code. These bitbang setup() and cleanup() routines are always
38 * used, though maybe they're called from controller-aware code.
40 * chipselect() and friends may use spi_device->controller_data and
41 * controller registers as appropriate.
44 * NOTE: SPI controller pins can often be used as GPIO pins instead,
45 * which means you could use a bitbang driver either to get hardware
46 * working quickly, or testing for differences that aren't speed related.
49 struct spi_bitbang_cs {
50 unsigned nsecs; /* (clock cycle time)/2 */
51 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
52 u32 word, u8 bits, unsigned flags);
53 unsigned (*txrx_bufs)(struct spi_device *,
55 struct spi_device *spi,
59 unsigned, struct spi_transfer *,
63 static unsigned bitbang_txrx_8(
64 struct spi_device *spi,
65 u32 (*txrx_word)(struct spi_device *spi,
70 struct spi_transfer *t,
73 unsigned bits = t->bits_per_word;
74 unsigned count = t->len;
75 const u8 *tx = t->tx_buf;
78 while (likely(count > 0)) {
83 word = txrx_word(spi, ns, word, bits, flags);
88 return t->len - count;
91 static unsigned bitbang_txrx_16(
92 struct spi_device *spi,
93 u32 (*txrx_word)(struct spi_device *spi,
98 struct spi_transfer *t,
101 unsigned bits = t->bits_per_word;
102 unsigned count = t->len;
103 const u16 *tx = t->tx_buf;
106 while (likely(count > 1)) {
111 word = txrx_word(spi, ns, word, bits, flags);
116 return t->len - count;
119 static unsigned bitbang_txrx_32(
120 struct spi_device *spi,
121 u32 (*txrx_word)(struct spi_device *spi,
126 struct spi_transfer *t,
129 unsigned bits = t->bits_per_word;
130 unsigned count = t->len;
131 const u32 *tx = t->tx_buf;
134 while (likely(count > 3)) {
139 word = txrx_word(spi, ns, word, bits, flags);
144 return t->len - count;
147 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
149 struct spi_bitbang_cs *cs = spi->controller_state;
154 bits_per_word = t->bits_per_word;
161 /* spi_transfer level calls that work per-word */
163 bits_per_word = spi->bits_per_word;
164 if (bits_per_word <= 8)
165 cs->txrx_bufs = bitbang_txrx_8;
166 else if (bits_per_word <= 16)
167 cs->txrx_bufs = bitbang_txrx_16;
168 else if (bits_per_word <= 32)
169 cs->txrx_bufs = bitbang_txrx_32;
173 /* nsecs = (clock period)/2 */
175 hz = spi->max_speed_hz;
177 cs->nsecs = (1000000000/2) / hz;
178 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
184 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
187 * spi_bitbang_setup - default setup for per-word I/O loops
189 int spi_bitbang_setup(struct spi_device *spi)
191 struct spi_bitbang_cs *cs = spi->controller_state;
192 struct spi_bitbang *bitbang;
194 bitbang = spi_master_get_devdata(spi->master);
197 cs = kzalloc(sizeof(*cs), GFP_KERNEL);
200 spi->controller_state = cs;
203 /* per-word shift register access, in hardware or bitbanging */
204 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
208 if (bitbang->setup_transfer) {
209 int retval = bitbang->setup_transfer(spi, NULL);
214 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs);
218 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
221 * spi_bitbang_cleanup - default cleanup for per-word I/O loops
223 void spi_bitbang_cleanup(struct spi_device *spi)
225 kfree(spi->controller_state);
227 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
229 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
231 struct spi_bitbang_cs *cs = spi->controller_state;
232 unsigned nsecs = cs->nsecs;
233 struct spi_bitbang *bitbang;
235 bitbang = spi_master_get_devdata(spi->master);
236 if (bitbang->set_line_direction) {
239 err = bitbang->set_line_direction(spi, !!(t->tx_buf));
244 if (spi->mode & SPI_3WIRE) {
247 flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX;
248 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags);
250 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
253 /*----------------------------------------------------------------------*/
256 * SECOND PART ... simple transfer queue runner.
258 * This costs a task context per controller, running the queue by
259 * performing each transfer in sequence. Smarter hardware can queue
260 * several DMA transfers at once, and process several controller queues
261 * in parallel; this driver doesn't match such hardware very well.
263 * Drivers can provide word-at-a-time i/o primitives, or provide
264 * transfer-at-a-time ones to leverage dma or fifo hardware.
267 static int spi_bitbang_prepare_hardware(struct spi_master *spi)
269 struct spi_bitbang *bitbang;
271 bitbang = spi_master_get_devdata(spi);
273 mutex_lock(&bitbang->lock);
275 mutex_unlock(&bitbang->lock);
280 static int spi_bitbang_transfer_one(struct spi_master *master,
281 struct spi_device *spi,
282 struct spi_transfer *transfer)
284 struct spi_bitbang *bitbang = spi_master_get_devdata(master);
287 if (bitbang->setup_transfer) {
288 status = bitbang->setup_transfer(spi, transfer);
294 status = bitbang->txrx_bufs(spi, transfer);
296 if (status == transfer->len)
298 else if (status >= 0)
302 spi_finalize_current_transfer(master);
307 static int spi_bitbang_unprepare_hardware(struct spi_master *spi)
309 struct spi_bitbang *bitbang;
311 bitbang = spi_master_get_devdata(spi);
313 mutex_lock(&bitbang->lock);
315 mutex_unlock(&bitbang->lock);
320 static void spi_bitbang_set_cs(struct spi_device *spi, bool enable)
322 struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master);
324 /* SPI core provides CS high / low, but bitbang driver
326 * spi device driver takes care of handling SPI_CS_HIGH
328 enable = (!!(spi->mode & SPI_CS_HIGH) == enable);
330 ndelay(SPI_BITBANG_CS_DELAY);
331 bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE :
332 BITBANG_CS_INACTIVE);
333 ndelay(SPI_BITBANG_CS_DELAY);
336 /*----------------------------------------------------------------------*/
338 int spi_bitbang_init(struct spi_bitbang *bitbang)
340 struct spi_master *master = bitbang->master;
342 if (!master || !bitbang->chipselect)
345 mutex_init(&bitbang->lock);
347 if (!master->mode_bits)
348 master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags;
350 if (master->transfer || master->transfer_one_message)
353 master->prepare_transfer_hardware = spi_bitbang_prepare_hardware;
354 master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware;
355 master->transfer_one = spi_bitbang_transfer_one;
356 master->set_cs = spi_bitbang_set_cs;
358 if (!bitbang->txrx_bufs) {
359 bitbang->use_dma = 0;
360 bitbang->txrx_bufs = spi_bitbang_bufs;
361 if (!master->setup) {
362 if (!bitbang->setup_transfer)
363 bitbang->setup_transfer =
364 spi_bitbang_setup_transfer;
365 master->setup = spi_bitbang_setup;
366 master->cleanup = spi_bitbang_cleanup;
372 EXPORT_SYMBOL_GPL(spi_bitbang_init);
375 * spi_bitbang_start - start up a polled/bitbanging SPI master driver
376 * @bitbang: driver handle
378 * Caller should have zero-initialized all parts of the structure, and then
379 * provided callbacks for chip selection and I/O loops. If the master has
380 * a transfer method, its final step should call spi_bitbang_transfer; or,
381 * that's the default if the transfer routine is not initialized. It should
382 * also set up the bus number and number of chipselects.
384 * For i/o loops, provide callbacks either per-word (for bitbanging, or for
385 * hardware that basically exposes a shift register) or per-spi_transfer
386 * (which takes better advantage of hardware like fifos or DMA engines).
388 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup,
389 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi
390 * master methods. Those methods are the defaults if the bitbang->txrx_bufs
391 * routine isn't initialized.
393 * This routine registers the spi_master, which will process requests in a
394 * dedicated task, keeping IRQs unblocked most of the time. To stop
395 * processing those requests, call spi_bitbang_stop().
397 * On success, this routine will take a reference to master. The caller is
398 * responsible for calling spi_bitbang_stop() to decrement the reference and
399 * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory
402 int spi_bitbang_start(struct spi_bitbang *bitbang)
404 struct spi_master *master = bitbang->master;
407 ret = spi_bitbang_init(bitbang);
411 /* driver may get busy before register() returns, especially
412 * if someone registered boardinfo for devices
414 ret = spi_register_master(spi_master_get(master));
416 spi_master_put(master);
420 EXPORT_SYMBOL_GPL(spi_bitbang_start);
423 * spi_bitbang_stop - stops the task providing spi communication
425 void spi_bitbang_stop(struct spi_bitbang *bitbang)
427 spi_unregister_master(bitbang->master);
429 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
431 MODULE_LICENSE("GPL");