1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
4 * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
13 #include <asm/mpc8xxx_spi.h>
14 #include <asm-generic/gpio.h>
17 SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */
18 SPI_EV_NF = BIT(31 - 23), /* Transmitter Not Full */
22 SPI_MODE_LOOP = BIT(31 - 1), /* Loopback mode */
23 SPI_MODE_CI = BIT(31 - 2), /* Clock invert */
24 SPI_MODE_CP = BIT(31 - 3), /* Clock phase */
25 SPI_MODE_DIV16 = BIT(31 - 4), /* Divide clock source by 16 */
26 SPI_MODE_REV = BIT(31 - 5), /* Reverse mode - MSB first */
27 SPI_MODE_MS = BIT(31 - 6), /* Always master */
28 SPI_MODE_EN = BIT(31 - 7), /* Enable interface */
30 SPI_MODE_LEN_MASK = 0xf00000,
31 SPI_MODE_LEN_SHIFT = 20,
32 SPI_MODE_PM_SHIFT = 16,
33 SPI_MODE_PM_MASK = 0xf0000,
35 SPI_COM_LST = BIT(31 - 9),
40 struct gpio_desc gpios[16];
45 #define SPI_TIMEOUT 1000
47 static int mpc8xxx_spi_ofdata_to_platdata(struct udevice *dev)
49 struct mpc8xxx_priv *priv = dev_get_priv(dev);
53 priv->spi = (spi8xxx_t *)dev_read_addr(dev);
55 ret = gpio_request_list_by_name(dev, "gpios", priv->gpios,
56 ARRAY_SIZE(priv->gpios), GPIOD_IS_OUT | GPIOD_ACTIVE_LOW);
62 ret = clk_get_by_index(dev, 0, &clk);
64 dev_err(dev, "%s: clock not defined\n", __func__);
68 priv->clk_rate = clk_get_rate(&clk);
69 if (!priv->clk_rate) {
70 dev_err(dev, "%s: failed to get clock rate\n", __func__);
77 static int mpc8xxx_spi_probe(struct udevice *dev)
79 struct mpc8xxx_priv *priv = dev_get_priv(dev);
80 spi8xxx_t *spi = priv->spi;
83 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
86 out_be32(&priv->spi->mode, SPI_MODE_REV | SPI_MODE_MS);
88 /* set len to 8 bits */
89 setbits_be32(&spi->mode, (8 - 1) << SPI_MODE_LEN_SHIFT);
91 setbits_be32(&spi->mode, SPI_MODE_EN);
93 /* Clear all SPI events */
94 setbits_be32(&priv->spi->event, 0xffffffff);
95 /* Mask all SPI interrupts */
96 clrbits_be32(&priv->spi->mask, 0xffffffff);
97 /* LST bit doesn't do anything, so disregard */
98 out_be32(&priv->spi->com, 0);
103 static void mpc8xxx_spi_cs_activate(struct udevice *dev)
105 struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
106 struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
108 dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT);
109 dm_gpio_set_value(&priv->gpios[platdata->cs], 0);
112 static void mpc8xxx_spi_cs_deactivate(struct udevice *dev)
114 struct mpc8xxx_priv *priv = dev_get_priv(dev->parent);
115 struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
117 dm_gpio_set_dir_flags(&priv->gpios[platdata->cs], GPIOD_IS_OUT);
118 dm_gpio_set_value(&priv->gpios[platdata->cs], 1);
121 static int mpc8xxx_spi_xfer(struct udevice *dev, uint bitlen,
122 const void *dout, void *din, ulong flags)
124 struct udevice *bus = dev->parent;
125 struct mpc8xxx_priv *priv = dev_get_priv(bus);
126 spi8xxx_t *spi = priv->spi;
127 struct dm_spi_slave_platdata *platdata = dev_get_parent_platdata(dev);
128 u32 tmpdin = 0, tmpdout = 0, n;
129 const u8 *cout = dout;
132 debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__,
133 bus->name, platdata->cs, (uint)dout, (uint)din, bitlen);
134 if (platdata->cs >= priv->cs_count) {
135 dev_err(dev, "chip select index %d too large (cs_count=%d)\n",
136 platdata->cs, priv->cs_count);
140 printf("*** spi_xfer: bitlen must be multiple of 8\n");
144 if (flags & SPI_XFER_BEGIN)
145 mpc8xxx_spi_cs_activate(dev);
147 /* Clear all SPI events */
148 setbits_be32(&spi->event, 0xffffffff);
151 /* Handle data in 8-bit chunks */
158 /* Write the data out */
159 out_be32(&spi->tx, tmpdout);
161 debug("*** %s: ... %08x written\n", __func__, tmpdout);
164 * Wait for SPI transmit to get out
165 * or time out (1 second = 1000 ms)
166 * The NE event must be read and cleared first
168 start = get_timer(0);
170 u32 event = in_be32(&spi->event);
171 bool have_ne = event & SPI_EV_NE;
172 bool have_nf = event & SPI_EV_NF;
177 tmpdin = in_be32(&spi->rx);
178 setbits_be32(&spi->event, SPI_EV_NE);
184 * Only bail when we've had both NE and NF events.
185 * This will cause timeouts on RO devices, so maybe
186 * in the future put an arbitrary delay after writing
187 * the device. Arbitrary delays suck, though...
193 } while (get_timer(start) < SPI_TIMEOUT);
195 if (get_timer(start) >= SPI_TIMEOUT) {
196 debug("*** %s: Time out during SPI transfer\n",
201 debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin);
204 if (flags & SPI_XFER_END)
205 mpc8xxx_spi_cs_deactivate(dev);
210 static int mpc8xxx_spi_set_speed(struct udevice *dev, uint speed)
212 struct mpc8xxx_priv *priv = dev_get_priv(dev);
213 spi8xxx_t *spi = priv->spi;
214 u32 bits, mask, div16, pm;
218 clk = priv->clk_rate;
219 if (clk / 64 > speed) {
220 div16 = SPI_MODE_DIV16;
225 pm = (clk - 1)/(4*speed) + 1;
227 dev_err(dev, "requested speed %u too small\n", speed);
232 bits = div16 | (pm << SPI_MODE_PM_SHIFT);
233 mask = SPI_MODE_DIV16 | SPI_MODE_PM_MASK;
234 mode = in_be32(&spi->mode);
235 if ((mode & mask) != bits) {
236 /* Must clear mode[EN] while changing speed. */
237 mode &= ~(mask | SPI_MODE_EN);
238 out_be32(&spi->mode, mode);
240 out_be32(&spi->mode, mode);
242 out_be32(&spi->mode, mode);
245 debug("requested speed %u, set speed to %lu/(%s4*%u) == %lu\n",
246 speed, priv->clk_rate, div16 ? "16*" : "", pm + 1,
252 static int mpc8xxx_spi_set_mode(struct udevice *dev, uint mode)
254 /* TODO(mario.six@gdsys.cc): Using SPI_CPHA (for clock phase) and
255 * SPI_CPOL (for clock polarity) should work
260 static const struct dm_spi_ops mpc8xxx_spi_ops = {
261 .xfer = mpc8xxx_spi_xfer,
262 .set_speed = mpc8xxx_spi_set_speed,
263 .set_mode = mpc8xxx_spi_set_mode,
265 * cs_info is not needed, since we require all chip selects to be
266 * in the device tree explicitly
270 static const struct udevice_id mpc8xxx_spi_ids[] = {
271 { .compatible = "fsl,spi" },
275 U_BOOT_DRIVER(mpc8xxx_spi) = {
276 .name = "mpc8xxx_spi",
278 .of_match = mpc8xxx_spi_ids,
279 .ops = &mpc8xxx_spi_ops,
280 .ofdata_to_platdata = mpc8xxx_spi_ofdata_to_platdata,
281 .probe = mpc8xxx_spi_probe,
282 .priv_auto_alloc_size = sizeof(struct mpc8xxx_priv),