1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc.
4 * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers
11 #include <asm/mpc8xxx_spi.h>
14 SPI_EV_NE = BIT(31 - 22), /* Receiver Not Empty */
15 SPI_EV_NF = BIT(31 - 23), /* Transmitter Not Full */
19 SPI_MODE_LOOP = BIT(31 - 1), /* Loopback mode */
20 SPI_MODE_CI = BIT(31 - 2), /* Clock invert */
21 SPI_MODE_CP = BIT(31 - 3), /* Clock phase */
22 SPI_MODE_DIV16 = BIT(31 - 4), /* Divide clock source by 16 */
23 SPI_MODE_REV = BIT(31 - 5), /* Reverse mode - MSB first */
24 SPI_MODE_MS = BIT(31 - 6), /* Always master */
25 SPI_MODE_EN = BIT(31 - 7), /* Enable interface */
27 SPI_MODE_LEN_MASK = 0xf00000,
28 SPI_MODE_PM_MASK = 0xf0000,
30 SPI_COM_LST = BIT(31 - 9),
33 static inline u32 to_prescale_mod(u32 val)
35 return (min(val, (u32)15) << 16);
38 static void set_char_len(spi8xxx_t *spi, u32 val)
40 clrsetbits_be32(&spi->mode, SPI_MODE_LEN_MASK, (val << 20));
43 #define SPI_TIMEOUT 1000
45 struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
47 struct spi_slave *slave;
49 if (!spi_cs_is_valid(bus, cs))
52 slave = spi_alloc_slave_base(bus, cs);
57 * TODO: Some of the code in spi_init() should probably move
58 * here, or into spi_claim_bus() below.
64 void spi_free_slave(struct spi_slave *slave)
71 spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
74 * SPI pins on the MPC83xx are not muxed, so all we do is initialize
77 out_be32(&spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN);
78 /* Use SYSCLK / 8 (16.67MHz typ.) */
79 clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1));
80 /* Clear all SPI events */
81 setbits_be32(&spi->event, 0xffffffff);
82 /* Mask all SPI interrupts */
83 clrbits_be32(&spi->mask, 0xffffffff);
84 /* LST bit doesn't do anything, so disregard */
85 out_be32(&spi->com, 0);
88 int spi_claim_bus(struct spi_slave *slave)
93 void spi_release_bus(struct spi_slave *slave)
97 int spi_xfer(struct spi_slave *slave, uint bitlen, const void *dout, void *din,
100 spi8xxx_t *spi = &((immap_t *)(CONFIG_SYS_IMMR))->spi;
102 int num_blks = DIV_ROUND_UP(bitlen, 32);
104 debug("%s: slave %u:%u dout %08X din %08X bitlen %u\n", __func__,
105 slave->bus, slave->cs, *(uint *)dout, *(uint *)din, bitlen);
107 if (flags & SPI_XFER_BEGIN)
108 spi_cs_activate(slave);
110 /* Clear all SPI events */
111 setbits_be32(&spi->event, 0xffffffff);
113 /* Handle data in 32-bit chunks */
117 uchar char_size = (bitlen >= 32 ? 32 : bitlen);
119 /* Shift data so it's msb-justified */
120 tmpdout = *(u32 *)dout >> (32 - char_size);
122 /* The LEN field of the SPMODE register is set as follows:
126 * 4 < len <= 16 len - 1
130 clrbits_be32(&spi->mode, SPI_MODE_EN);
133 set_char_len(spi, 3);
134 else if (bitlen <= 16)
135 set_char_len(spi, bitlen - 1);
137 set_char_len(spi, 0);
140 /* Set up the next iteration if sending > 32 bits */
145 setbits_be32(&spi->mode, SPI_MODE_EN);
147 /* Write the data out */
148 out_be32(&spi->tx, tmpdout);
150 debug("*** %s: ... %08x written\n", __func__, tmpdout);
153 * Wait for SPI transmit to get out
154 * or time out (1 second = 1000 ms)
155 * The NE event must be read and cleared first
157 for (tm = 0; tm < SPI_TIMEOUT; ++tm) {
158 u32 event = in_be32(&spi->event);
159 bool have_ne = event & SPI_EV_NE;
160 bool have_nf = event & SPI_EV_NF;
165 tmpdin = in_be32(&spi->rx);
166 setbits_be32(&spi->event, SPI_EV_NE);
168 *(u32 *)din = (tmpdin << (32 - char_size));
169 if (char_size == 32) {
170 /* Advance output buffer by 32 bits */
175 * Only bail when we've had both NE and NF events.
176 * This will cause timeouts on RO devices, so maybe
177 * in the future put an arbitrary delay after writing
178 * the device. Arbitrary delays suck, though...
184 if (tm >= SPI_TIMEOUT)
185 debug("*** %s: Time out during SPI transfer\n",
188 debug("*** %s: transfer ended. Value=%08x\n", __func__, tmpdin);
191 if (flags & SPI_XFER_END)
192 spi_cs_deactivate(slave);