2 * Copyright (C) 2007 Atmel Corporation
4 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/clk.h>
13 #include <asm/arch/hardware.h>
15 #include "atmel_spi.h"
17 static int spi_has_wdrbt(struct atmel_spi_slave *slave)
21 ver = spi_readl(slave, VERSION);
23 return (ATMEL_SPI_VERSION_REV(ver) >= 0x210);
31 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
32 unsigned int max_hz, unsigned int mode)
34 struct atmel_spi_slave *as;
39 if (!spi_cs_is_valid(bus, cs))
44 regs = (void *)ATMEL_BASE_SPI0;
46 #ifdef ATMEL_BASE_SPI1
48 regs = (void *)ATMEL_BASE_SPI1;
51 #ifdef ATMEL_BASE_SPI2
53 regs = (void *)ATMEL_BASE_SPI2;
56 #ifdef ATMEL_BASE_SPI3
58 regs = (void *)ATMEL_BASE_SPI3;
66 scbr = (get_spi_clk_rate(bus) + max_hz - 1) / max_hz;
67 if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
68 /* Too low max SCK rate */
73 csrx = ATMEL_SPI_CSRx_SCBR(scbr);
74 csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
75 if (!(mode & SPI_CPHA))
76 csrx |= ATMEL_SPI_CSRx_NCPHA;
78 csrx |= ATMEL_SPI_CSRx_CPOL;
80 as = spi_alloc_slave(struct atmel_spi_slave, bus, cs);
85 as->mr = ATMEL_SPI_MR_MSTR | ATMEL_SPI_MR_MODFDIS
86 | ATMEL_SPI_MR_PCS(~(1 << cs) & 0xf);
87 if (spi_has_wdrbt(as))
88 as->mr |= ATMEL_SPI_MR_WDRBT;
90 spi_writel(as, CSR(cs), csrx);
95 void spi_free_slave(struct spi_slave *slave)
97 struct atmel_spi_slave *as = to_atmel_spi(slave);
102 int spi_claim_bus(struct spi_slave *slave)
104 struct atmel_spi_slave *as = to_atmel_spi(slave);
106 /* Enable the SPI hardware */
107 spi_writel(as, CR, ATMEL_SPI_CR_SPIEN);
110 * Select the slave. This should set SCK to the correct
111 * initial state, etc.
113 spi_writel(as, MR, as->mr);
118 void spi_release_bus(struct spi_slave *slave)
120 struct atmel_spi_slave *as = to_atmel_spi(slave);
122 /* Disable the SPI hardware */
123 spi_writel(as, CR, ATMEL_SPI_CR_SPIDIS);
126 int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
127 const void *dout, void *din, unsigned long flags)
129 struct atmel_spi_slave *as = to_atmel_spi(slave);
134 const u8 *txp = dout;
139 /* Finish any previously submitted transfers */
143 * TODO: The controller can do non-multiple-of-8 bit
144 * transfers, but this driver currently doesn't support it.
146 * It's also not clear how such transfers are supposed to be
147 * represented as a stream of bytes...this is a limitation of
148 * the current SPI interface.
151 /* Errors always terminate an ongoing transfer */
152 flags |= SPI_XFER_END;
159 * The controller can do automatic CS control, but it is
160 * somewhat quirky, and it doesn't really buy us much anyway
161 * in the context of U-Boot.
163 if (flags & SPI_XFER_BEGIN) {
164 spi_cs_activate(slave);
166 * sometimes the RDR is not empty when we get here,
167 * in theory that should not happen, but it DOES happen.
168 * Read it here to be on the safe side.
169 * That also clears the OVRES flag. Required if the
170 * following loop exits due to OVRES!
175 for (len_tx = 0, len_rx = 0; len_rx < len; ) {
176 status = spi_readl(as, SR);
178 if (status & ATMEL_SPI_SR_OVRES)
181 if (len_tx < len && (status & ATMEL_SPI_SR_TDRE)) {
186 spi_writel(as, TDR, value);
189 if (status & ATMEL_SPI_SR_RDRF) {
190 value = spi_readl(as, RDR);
198 if (flags & SPI_XFER_END) {
200 * Wait until the transfer is completely done before
204 status = spi_readl(as, SR);
205 } while (!(status & ATMEL_SPI_SR_TXEMPTY));
207 spi_cs_deactivate(slave);