4 The "Serial Peripheral Interface" is a low level synchronous
5 protocol. Chips that support SPI can have data transfer rates
6 up to several tens of Mbit/sec. Chips are addressed with a
7 controller and a chipselect. Most SPI slaves don't support
8 dynamic device discovery; some are even write-only or read-only.
10 SPI is widely used by microcontrollers to talk with sensors,
11 eeprom and flash memory, codecs and various other controller
12 chips, analog to digital (and d-to-a) converters, and more.
13 MMC and SD cards can be accessed using SPI protocol; and for
14 DataFlash cards used in MMC sockets, SPI must always be used.
16 SPI is one of a family of similar protocols using a four wire
17 interface (select, clock, data in, data out) including Microwire
18 (half duplex), SSP, SSI, and PSP. This driver framework should
19 work with most such devices and controllers.
24 bool "Enable Driver Model for SPI drivers"
27 Enable driver model for SPI. The SPI slave interface
28 (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
29 the SPI uclass. Drivers provide methods to access the SPI
30 buses that they control. The uclass interface is defined in
31 include/spi.h. The existing spi_slave structure is attached
32 as 'parent data' to every slave on each bus. Slaves
33 typically use driver-private data instead of extending the
37 bool "SPI memory extension"
39 Enable this option if you want to enable the SPI memory extension.
40 This extension is meant to simplify interaction with SPI memories
41 by providing an high-level interface to send memory-like commands.
46 bool "Altera SPI driver"
48 Enable the Altera SPI driver. This driver can be used to
49 access the SPI NOR flash on platforms embedding this Altera
50 IP core. Please find details on the "Embedded Peripherals IP
51 User Guide" of Altera.
54 bool "Apple SPI driver"
55 default y if ARCH_APPLE
57 Enable the Apple SPI driver. This driver can be used to
58 access the SPI flash and keyboard on machines based on Apple SoCs.
61 bool "Andestech ATCSPI200 SPI driver"
63 Enable the Andestech ATCSPI200 SPI driver. This driver can be
64 used to access the SPI flash on AE3XX and AE250 platforms embedding
65 this Andestech IP core.
68 bool "Atheros SPI driver"
71 Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
72 to access SPI NOR flash and other SPI peripherals. This driver
73 uses driver model and requires a device tree binding to operate.
74 please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
77 bool "Atmel Quad SPI Controller"
80 Enable the Atmel Quad SPI controller in master mode. This driver
81 does not support generic SPI. The implementation supports only the
85 bool "Atmel SPI driver"
86 default y if ARCH_AT91
88 This enables driver for the Atmel SPI Controller, present on
89 many AT91 (ARM) chips. This driver can be used to access
90 the SPI Flash, such as AT25DF321.
93 bool "BCM63XX HSSPI driver"
94 depends on (ARCH_BMIPS || ARCH_BCM68360 || \
95 ARCH_BCM6858 || ARCH_BCM63158)
97 Enable the BCM6328 HSSPI driver. This driver can be used to
98 access the SPI NOR flash on platforms embedding this Broadcom
102 bool "BCM6348 SPI driver"
103 depends on ARCH_BMIPS
105 Enable the BCM6348/BCM6358 SPI driver. This driver can be used to
106 access the SPI NOR flash on platforms embedding these Broadcom
110 bool "BCMSTB SPI driver"
112 Enable the Broadcom set-top box SPI driver. This driver can
113 be used to access the SPI flash on platforms embedding this
116 config CORTINA_SFLASH
117 bool "Cortina-Access Serial Flash controller driver"
118 depends on DM_SPI && SPI_MEM
120 Enable the Cortina-Access Serial Flash controller driver. This driver
121 can be used to access the SPI NOR/NAND flash on platforms embedding this
122 Cortina-Access IP core.
125 bool "Cadence QSPI driver"
127 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
128 used to access the SPI NOR flash on platforms embedding this
131 config HAS_CQSPI_REF_CLK
132 bool "Cadence QSPI static reference clock"
133 depends on CADENCE_QSPI
136 int "Cadence QSPI reference clock value in Hz"
137 depends on HAS_CQSPI_REF_CLK
140 bool "ColdFire SPI driver"
142 Enable the ColdFire SPI driver. This driver can be used on
146 bool "Davinci & Keystone SPI driver"
147 depends on ARCH_DAVINCI || ARCH_KEYSTONE
149 Enable the Davinci SPI driver
151 config DESIGNWARE_SPI
152 bool "Designware SPI driver"
154 Enable the Designware SPI driver. This driver can be used to
155 access the SPI NOR flash on platforms embedding this Designware
159 bool "Samsung Exynos SPI driver"
161 Enable the Samsung Exynos SPI driver. This driver can be used to
162 access the SPI NOR flash on platforms embedding this Samsung
166 bool "Freescale DSPI driver"
168 Enable the Freescale DSPI driver. This driver can be used to
169 access the SPI NOR flash and SPI Data flash on platforms embedding
170 this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
174 bool "Freescale QSPI driver"
177 Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
178 used to access the SPI NOR flash on platforms embedding this
181 config FSL_QSPI_AHB_FULL_MAP
182 bool "Use full AHB memory map space"
184 default y if ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_IMX8M
186 Enable the Freescale QSPI driver to use full AHB memory map space for
190 bool "Intel ICH SPI driver"
192 Enable the Intel ICH SPI driver. This driver can be used to
193 access the SPI NOR flash on platforms embedding this Intel
197 bool "Broadcom iProc QSPI Flash Controller driver"
199 Enable Broadcom iProc QSPI Flash Controller driver.
200 This driver can be used to access the SPI NOR flash.
203 bool "Marvell Kirkwood SPI Driver"
205 Enable support for SPI on various Marvell SoCs, such as
206 Kirkwood and Armada 375.
209 bool "Amlogic Meson SPI Flash Controller driver"
210 depends on ARCH_MESON
212 Enable the Amlogic Meson SPI Flash Controller SPIFC) driver.
213 This driver can be used to access the SPI NOR flash chips on
217 bool "MPC8XX SPI Driver"
220 Enable support for SPI on MPC8XX
223 bool "MPC8XXX SPI Driver"
225 Enable support for SPI on the MPC8XXX PowerPC SoCs.
228 bool "MSCC bitbang SPI driver"
229 depends on SOC_VCOREIII
231 Enable MSCC bitbang SPI driver. This driver can be used on
235 bool "MediaTek MT7620 SPI driver"
236 depends on SOC_MT7620
238 Enable the MT7620 SPI driver. This driver can be used to access
239 generic SPI devices on MediaTek MT7620 SoC.
242 bool "MediaTek MT7621 SPI driver"
243 depends on SOC_MT7628
245 Enable the MT7621 SPI driver. This driver can be used to access
246 the SPI NOR flash on platforms embedding this Ralink / MediaTek
247 SPI core, like MT7621/7628/7688.
250 bool "Mediatek SPI-NOR controller driver"
253 Enable the Mediatek SPINOR controller driver. This driver has
254 better read/write performance with NOR.
257 bool "Mediatek SPI memory controller driver"
260 Enable the Mediatek SPI memory controller driver. This driver is
261 originally based on the MediaTek SNFI IP core. It can only be
262 used to access SPI memory devices like SPI-NOR or SPI-NAND on
263 platforms embedding this IP core, like MT7622/M7629.
265 config MVEBU_A3700_SPI
266 bool "Marvell Armada 3700 SPI driver"
267 select CLK_ARMADA_3720
269 Enable the Marvell Armada 3700 SPI driver. This driver can be
270 used to access the SPI NOR flash on platforms embedding this
274 bool "MXS SPI Driver"
276 Enable the MXS SPI controller driver. This driver can be used
277 on the i.MX23 and i.MX28 SoCs.
280 bool "Macronix MX25F0A SPI controller"
282 Enable the Macronix MX25F0A SPI controller driver. This driver
283 can be used to access the SPI flash on platforms embedding
284 this Macronix IP core.
287 bool "NXP FlexSPI driver"
290 Enable the NXP FlexSPI (FSPI) driver. This driver can be used to
291 access the SPI NOR flash on platforms embedding this NXP IP core.
294 bool "Octeon SPI driver"
295 depends on ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2
297 Enable the Octeon SPI driver. This driver can be used to
298 access the SPI NOR flash on Octeon II/III and OcteonTX/TX2
302 bool "McSPI driver for OMAP"
304 SPI master controller for OMAP24XX and later Multichannel SPI
305 (McSPI). This driver be used to access SPI chips on platforms
306 embedding this OMAP3 McSPI IP core.
309 bool "Microchip PIC32 SPI driver"
310 depends on MACH_PIC32
312 Enable the Microchip PIC32 SPI driver. This driver can be used
313 to access the SPI NOR flash, MMC-over-SPI on platforms based on
314 Microchip PIC32 family devices.
317 bool "ARM AMBA PL022 SSP controller driver"
320 This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
321 controller. If you have an embedded system with an AMBA(R)
322 bus and a PL022 controller, say Y or M here.
325 bool "Qualcomm SPI controller with QUP interface"
326 depends on ARCH_IPQ40XX
328 Qualcomm Universal Peripheral (QUP) core is an AHB slave that
329 provides a common data path (an output FIFO and an input FIFO)
330 for serial peripheral interface (SPI) mini-core. SPI in master
331 mode supports up to 50MHz, up to four chip selects, programmable
332 data path from 4 bits to 32 bits and numerous protocol variants.
334 config RENESAS_RPC_SPI
335 bool "Renesas RPC SPI driver"
336 depends on RCAR_GEN3 || RZA1
339 Enable the Renesas RPC SPI driver, used to access SPI NOR flash
340 on Renesas RCar Gen3 SoCs. This uses driver model and requires a
341 device tree binding to operate.
344 bool "Rockchip SFC Driver"
346 Enable the Rockchip SFC Driver for SPI NOR flash. This device is
347 a limited purpose SPI controller for driving NOR flash on certain
348 Rockchip SoCs. This uses driver model and requires a device tree
352 bool "Rockchip SPI driver"
354 Enable the Rockchip SPI driver, used to access SPI NOR flash and
355 other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
356 This uses driver model and requires a device tree binding to
360 bool "Sandbox SPI driver"
361 depends on SANDBOX && DM
363 Enable SPI support for sandbox. This is an emulation of a real SPI
364 bus. Devices can be attached to the bus using the device tree
365 which specifies the driver to use. As an example, see this device
366 tree fragment from sandbox.dts. It shows that the SPI bus has a
367 single flash device on chip select 0 which is emulated by the driver
368 for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
371 #address-cells = <1>;
374 compatible = "sandbox,spi";
375 cs-gpios = <0>, <&gpio_a 0>;
378 compatible = "spansion,m25p16", "jedec,spi-nor";
379 spi-max-frequency = <40000000>;
380 sandbox,filename = "spi.bin";
385 bool "SiFive SPI driver"
387 This driver supports the SiFive SPI IP. If unsure say N.
388 Enable the SiFive SPI controller driver.
390 The SiFive SPI controller driver is found on various SiFive SoCs.
393 bool "Soft SPI driver"
395 Enable Soft SPI driver. This driver is to use GPIO simulate
399 bool "Allwinner SoC SPI controllers"
402 Enable the Allwinner SoC SPi controller driver.
404 Same controller driver can reuse in all Allwinner SoC variants.
407 bool "STM32F7 QSPI driver"
408 depends on STM32F4 || STM32F7 || ARCH_STM32MP
410 Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be
411 used to access the SPI NOR flash chips on platforms embedding
415 bool "STM32 SPI driver"
416 depends on ARCH_STM32MP
418 Enable the STM32 Serial Peripheral Interface (SPI) driver for STM32MP
419 SoCs. This uses driver model and requires a device tree binding to
423 bool "nVidia Tegra114 SPI driver"
425 Enable the nVidia Tegra114 SPI driver. This driver can be used to
426 access the SPI NOR flash on platforms embedding this nVidia Tegra114
429 This controller is different than the older SoCs SPI controller and
430 also register interface get changed with this controller.
432 config TEGRA20_SFLASH
433 bool "nVidia Tegra20 Serial Flash controller driver"
435 Enable the nVidia Tegra20 Serial Flash controller driver. This driver
436 can be used to access the SPI NOR flash on platforms embedding this
437 nVidia Tegra20 IP core.
440 bool "nVidia Tegra20/Tegra30 SLINK driver"
442 Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
443 be used to access the SPI NOR flash on platforms embedding this
444 nVidia Tegra20/Tegra30 IP cores.
447 bool "nVidia Tegra210 QSPI driver"
449 Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
450 be used to access SPI chips on platforms embedding this
451 NVIDIA Tegra210 IP core.
454 bool "TI QSPI driver"
457 Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
458 This driver support spi flash single, quad and memory reads.
461 bool "Socionext UniPhier SPI driver"
462 depends on ARCH_UNIPHIER
464 Enable the Socionext UniPhier SPI driver. This driver can
465 be used to access SPI chips on platforms embedding this
469 bool "Xilinx SPI driver"
471 Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
472 controller support 8 bit SPI transfers only, with or w/o FIFO.
473 For more info on Xilinx SPI Register Definitions and Overview
474 see driver file - drivers/spi/xilinx_spi.c
477 bool "Zynq SPI driver"
479 Enable the Zynq SPI driver. This driver can be used to
480 access the SPI NOR flash on platforms embedding this Zynq
484 bool "Zynq QSPI driver"
487 Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
488 used to access the SPI NOR flash on platforms embedding this
489 Zynq QSPI IP core. This IP is used to connect the flash in
490 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
493 bool "Configure ZynqMP Generic QSPI"
495 This option is used to enable ZynqMP QSPI controller driver which
496 is used to communicate with qspi flash devices.
501 bool "Freescale eSPI driver"
504 Enable the Freescale eSPI driver. This driver can be used to
505 access the SPI interface and SPI NOR flash on platforms embedding
506 this Freescale eSPI IP core.
509 bool "Renesas Quad SPI driver"
511 Enable the Renesas Quad SPI controller driver. This driver can be
512 used on Renesas SoCs.
515 bool "MXC SPI Driver"
517 Enable the MXC SPI controller driver. This driver can be used
518 on various i.MX SoCs such as i.MX31/35/51/6/7.
521 bool "Socionext SynQuacer HS-SPI driver"
522 depends on ARCH_SYNQUACER
524 Enable the Socionext HS-SPI driver for SynQuacer. This driver can
525 be used to access the SPI interface and SPI NOR flash on platforms
526 embedding this HS-SPI IP core.
528 endif # menu "SPI Support"