1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 // Copyright(c) 2023 Intel Corporation. All rights reserved.
5 * Soundwire Intel ops for LunarLake
8 #include <linux/acpi.h>
9 #include <linux/device.h>
10 #include <linux/soundwire/sdw_registers.h>
11 #include <linux/soundwire/sdw.h>
12 #include <linux/soundwire/sdw_intel.h>
13 #include <sound/pcm_params.h>
14 #include <sound/hda-mlink.h>
15 #include "cadence_master.h"
20 * shim vendor-specific (vs) ops
23 static void intel_shim_vs_init(struct sdw_intel *sdw)
25 void __iomem *shim_vs = sdw->link_res->shim_vs;
28 act = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_ACTMCTL);
29 u16p_replace_bits(&act, 0x1, SDW_SHIM2_INTEL_VS_ACTMCTL_DOAIS);
30 act |= SDW_SHIM2_INTEL_VS_ACTMCTL_DACTQE;
31 act |= SDW_SHIM2_INTEL_VS_ACTMCTL_DODS;
32 intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_ACTMCTL, act);
36 static int intel_shim_check_wake(struct sdw_intel *sdw)
38 void __iomem *shim_vs;
41 shim_vs = sdw->link_res->shim_vs;
42 wake_sts = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS);
44 return wake_sts & SDW_SHIM2_INTEL_VS_WAKEEN_PWS;
47 static void intel_shim_wake(struct sdw_intel *sdw, bool wake_enable)
49 void __iomem *shim_vs = sdw->link_res->shim_vs;
53 wake_en = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN);
56 /* Enable the wakeup */
57 wake_en |= SDW_SHIM2_INTEL_VS_WAKEEN_PWE;
58 intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN, wake_en);
60 /* Disable the wake up interrupt */
61 wake_en &= ~SDW_SHIM2_INTEL_VS_WAKEEN_PWE;
62 intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKEEN, wake_en);
64 /* Clear wake status (W1C) */
65 wake_sts = intel_readw(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS);
66 wake_sts |= SDW_SHIM2_INTEL_VS_WAKEEN_PWS;
67 intel_writew(shim_vs, SDW_SHIM2_INTEL_VS_WAKESTS, wake_sts);
71 static int intel_link_power_up(struct sdw_intel *sdw)
73 struct sdw_bus *bus = &sdw->cdns.bus;
74 struct sdw_master_prop *prop = &bus->prop;
75 u32 *shim_mask = sdw->link_res->shim_mask;
76 unsigned int link_id = sdw->instance;
80 mutex_lock(sdw->link_res->shim_lock);
83 /* we first need to program the SyncPRD/CPU registers */
84 dev_dbg(sdw->cdns.dev, "first link up, programming SYNCPRD\n");
86 if (prop->mclk_freq % 6000000)
87 syncprd = SDW_SHIM_SYNC_SYNCPRD_VAL_38_4;
89 syncprd = SDW_SHIM_SYNC_SYNCPRD_VAL_24;
91 ret = hdac_bus_eml_sdw_set_syncprd_unlocked(sdw->link_res->hbus, syncprd);
93 dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_set_syncprd failed: %d\n",
99 ret = hdac_bus_eml_sdw_power_up_unlocked(sdw->link_res->hbus, link_id);
101 dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_power_up failed: %d\n",
107 /* SYNCPU will change once link is active */
108 ret = hdac_bus_eml_sdw_wait_syncpu_unlocked(sdw->link_res->hbus);
110 dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_wait_syncpu failed: %d\n",
116 *shim_mask |= BIT(link_id);
118 sdw->cdns.link_up = true;
120 intel_shim_vs_init(sdw);
123 mutex_unlock(sdw->link_res->shim_lock);
128 static int intel_link_power_down(struct sdw_intel *sdw)
130 u32 *shim_mask = sdw->link_res->shim_mask;
131 unsigned int link_id = sdw->instance;
134 mutex_lock(sdw->link_res->shim_lock);
136 sdw->cdns.link_up = false;
138 *shim_mask &= ~BIT(link_id);
140 ret = hdac_bus_eml_sdw_power_down_unlocked(sdw->link_res->hbus, link_id);
142 dev_err(sdw->cdns.dev, "%s: hdac_bus_eml_sdw_power_down failed: %d\n",
146 * we leave the sdw->cdns.link_up flag as false since we've disabled
147 * the link at this point and cannot handle interrupts any longer.
151 mutex_unlock(sdw->link_res->shim_lock);
156 static void intel_sync_arm(struct sdw_intel *sdw)
158 unsigned int link_id = sdw->instance;
160 mutex_lock(sdw->link_res->shim_lock);
162 hdac_bus_eml_sdw_sync_arm_unlocked(sdw->link_res->hbus, link_id);
164 mutex_unlock(sdw->link_res->shim_lock);
167 static int intel_sync_go_unlocked(struct sdw_intel *sdw)
171 ret = hdac_bus_eml_sdw_sync_go_unlocked(sdw->link_res->hbus);
173 dev_err(sdw->cdns.dev, "%s: SyncGO clear failed: %d\n", __func__, ret);
178 static int intel_sync_go(struct sdw_intel *sdw)
182 mutex_lock(sdw->link_res->shim_lock);
184 ret = intel_sync_go_unlocked(sdw);
186 mutex_unlock(sdw->link_res->shim_lock);
191 static bool intel_check_cmdsync_unlocked(struct sdw_intel *sdw)
193 return hdac_bus_eml_sdw_check_cmdsync_unlocked(sdw->link_res->hbus);
197 static int intel_params_stream(struct sdw_intel *sdw,
198 struct snd_pcm_substream *substream,
199 struct snd_soc_dai *dai,
200 struct snd_pcm_hw_params *hw_params,
201 int link_id, int alh_stream_id)
203 struct sdw_intel_link_res *res = sdw->link_res;
204 struct sdw_intel_stream_params_data params_data;
206 params_data.substream = substream;
207 params_data.dai = dai;
208 params_data.hw_params = hw_params;
209 params_data.link_id = link_id;
210 params_data.alh_stream_id = alh_stream_id;
212 if (res->ops && res->ops->params_stream && res->dev)
213 return res->ops->params_stream(res->dev,
218 static int intel_free_stream(struct sdw_intel *sdw,
219 struct snd_pcm_substream *substream,
220 struct snd_soc_dai *dai,
224 struct sdw_intel_link_res *res = sdw->link_res;
225 struct sdw_intel_stream_free_data free_data;
227 free_data.substream = substream;
229 free_data.link_id = link_id;
231 if (res->ops && res->ops->free_stream && res->dev)
232 return res->ops->free_stream(res->dev,
241 static int intel_hw_params(struct snd_pcm_substream *substream,
242 struct snd_pcm_hw_params *params,
243 struct snd_soc_dai *dai)
245 struct sdw_cdns *cdns = snd_soc_dai_get_drvdata(dai);
246 struct sdw_intel *sdw = cdns_to_intel(cdns);
247 struct sdw_cdns_dai_runtime *dai_runtime;
248 struct sdw_cdns_pdi *pdi;
249 struct sdw_stream_config sconfig;
250 struct sdw_port_config *pconfig;
254 dai_runtime = cdns->dai_runtime_array[dai->id];
258 ch = params_channels(params);
259 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
260 dir = SDW_DATA_DIR_RX;
262 dir = SDW_DATA_DIR_TX;
264 pdi = sdw_cdns_alloc_pdi(cdns, &cdns->pcm, ch, dir, dai->id);
271 /* the SHIM will be configured in the callback functions */
273 sdw_cdns_config_stream(cdns, ch, dir, pdi);
275 /* store pdi and state, may be needed in prepare step */
276 dai_runtime->paused = false;
277 dai_runtime->suspended = false;
278 dai_runtime->pdi = pdi;
280 /* Inform DSP about PDI stream number */
281 ret = intel_params_stream(sdw, substream, dai, params,
287 sconfig.direction = dir;
288 sconfig.ch_count = ch;
289 sconfig.frame_rate = params_rate(params);
290 sconfig.type = dai_runtime->stream_type;
292 sconfig.bps = snd_pcm_format_width(params_format(params));
294 /* Port configuration */
295 pconfig = kzalloc(sizeof(*pconfig), GFP_KERNEL);
301 pconfig->num = pdi->num;
302 pconfig->ch_mask = (1 << ch) - 1;
304 ret = sdw_stream_add_master(&cdns->bus, &sconfig,
305 pconfig, 1, dai_runtime->stream);
307 dev_err(cdns->dev, "add master to stream failed:%d\n", ret);
314 static int intel_prepare(struct snd_pcm_substream *substream,
315 struct snd_soc_dai *dai)
317 struct sdw_cdns *cdns = snd_soc_dai_get_drvdata(dai);
318 struct sdw_intel *sdw = cdns_to_intel(cdns);
319 struct sdw_cdns_dai_runtime *dai_runtime;
323 dai_runtime = cdns->dai_runtime_array[dai->id];
325 dev_err(dai->dev, "failed to get dai runtime in %s\n",
330 if (dai_runtime->suspended) {
331 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
332 struct snd_pcm_hw_params *hw_params;
334 hw_params = &rtd->dpcm[substream->stream].hw_params;
336 dai_runtime->suspended = false;
339 * .prepare() is called after system resume, where we
340 * need to reinitialize the SHIM/ALH/Cadence IP.
341 * .prepare() is also called to deal with underflows,
342 * but in those cases we cannot touch ALH/SHIM
346 /* configure stream */
347 ch = params_channels(hw_params);
348 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
349 dir = SDW_DATA_DIR_RX;
351 dir = SDW_DATA_DIR_TX;
353 /* the SHIM will be configured in the callback functions */
355 sdw_cdns_config_stream(cdns, ch, dir, dai_runtime->pdi);
357 /* Inform DSP about PDI stream number */
358 ret = intel_params_stream(sdw, substream, dai,
361 dai_runtime->pdi->intel_alh_id);
368 intel_hw_free(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
370 struct sdw_cdns *cdns = snd_soc_dai_get_drvdata(dai);
371 struct sdw_intel *sdw = cdns_to_intel(cdns);
372 struct sdw_cdns_dai_runtime *dai_runtime;
375 dai_runtime = cdns->dai_runtime_array[dai->id];
380 * The sdw stream state will transition to RELEASED when stream->
381 * master_list is empty. So the stream state will transition to
382 * DEPREPARED for the first cpu-dai and to RELEASED for the last
385 ret = sdw_stream_remove_master(&cdns->bus, dai_runtime->stream);
387 dev_err(dai->dev, "remove master from stream %s failed: %d\n",
388 dai_runtime->stream->name, ret);
392 ret = intel_free_stream(sdw, substream, dai, sdw->instance);
394 dev_err(dai->dev, "intel_free_stream: failed %d\n", ret);
398 dai_runtime->pdi = NULL;
403 static int intel_pcm_set_sdw_stream(struct snd_soc_dai *dai,
404 void *stream, int direction)
406 return cdns_set_sdw_stream(dai, stream, direction);
409 static void *intel_get_sdw_stream(struct snd_soc_dai *dai,
412 struct sdw_cdns *cdns = snd_soc_dai_get_drvdata(dai);
413 struct sdw_cdns_dai_runtime *dai_runtime;
415 dai_runtime = cdns->dai_runtime_array[dai->id];
417 return ERR_PTR(-EINVAL);
419 return dai_runtime->stream;
422 static int intel_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai)
424 struct sdw_cdns *cdns = snd_soc_dai_get_drvdata(dai);
425 struct sdw_intel *sdw = cdns_to_intel(cdns);
426 struct sdw_intel_link_res *res = sdw->link_res;
427 struct sdw_cdns_dai_runtime *dai_runtime;
431 * The .trigger callback is used to program HDaudio DMA and send required IPC to audio
434 if (res->ops && res->ops->trigger) {
435 ret = res->ops->trigger(substream, cmd, dai);
440 dai_runtime = cdns->dai_runtime_array[dai->id];
442 dev_err(dai->dev, "failed to get dai runtime in %s\n",
448 case SNDRV_PCM_TRIGGER_SUSPEND:
451 * The .prepare callback is used to deal with xruns and resume operations.
452 * In the case of xruns, the DMAs and SHIM registers cannot be touched,
453 * but for resume operations the DMAs and SHIM registers need to be initialized.
454 * the .trigger callback is used to track the suspend case only.
457 dai_runtime->suspended = true;
461 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
462 dai_runtime->paused = true;
464 case SNDRV_PCM_TRIGGER_STOP:
465 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
466 dai_runtime->paused = false;
475 static const struct snd_soc_dai_ops intel_pcm_dai_ops = {
476 .hw_params = intel_hw_params,
477 .prepare = intel_prepare,
478 .hw_free = intel_hw_free,
479 .trigger = intel_trigger,
480 .set_stream = intel_pcm_set_sdw_stream,
481 .get_stream = intel_get_sdw_stream,
484 static const struct snd_soc_component_driver dai_component = {
491 static void intel_pdi_init(struct sdw_intel *sdw,
492 struct sdw_cdns_stream_config *config)
494 void __iomem *shim = sdw->link_res->shim;
497 /* PCM Stream Capability */
498 pcm_cap = intel_readw(shim, SDW_SHIM2_PCMSCAP);
500 config->pcm_bd = FIELD_GET(SDW_SHIM2_PCMSCAP_BSS, pcm_cap);
501 config->pcm_in = FIELD_GET(SDW_SHIM2_PCMSCAP_ISS, pcm_cap);
502 config->pcm_out = FIELD_GET(SDW_SHIM2_PCMSCAP_ISS, pcm_cap);
504 dev_dbg(sdw->cdns.dev, "PCM cap bd:%d in:%d out:%d\n",
505 config->pcm_bd, config->pcm_in, config->pcm_out);
509 intel_pdi_get_ch_cap(struct sdw_intel *sdw, unsigned int pdi_num)
511 void __iomem *shim = sdw->link_res->shim;
513 /* zero based values for channel count in register */
514 return intel_readw(shim, SDW_SHIM2_PCMSYCHC(pdi_num)) + 1;
517 static void intel_pdi_get_ch_update(struct sdw_intel *sdw,
518 struct sdw_cdns_pdi *pdi,
519 unsigned int num_pdi,
520 unsigned int *num_ch)
525 for (i = 0; i < num_pdi; i++) {
526 pdi->ch_count = intel_pdi_get_ch_cap(sdw, pdi->num);
527 ch_count += pdi->ch_count;
534 static void intel_pdi_stream_ch_update(struct sdw_intel *sdw,
535 struct sdw_cdns_streams *stream)
537 intel_pdi_get_ch_update(sdw, stream->bd, stream->num_bd,
540 intel_pdi_get_ch_update(sdw, stream->in, stream->num_in,
543 intel_pdi_get_ch_update(sdw, stream->out, stream->num_out,
544 &stream->num_ch_out);
547 static int intel_create_dai(struct sdw_cdns *cdns,
548 struct snd_soc_dai_driver *dais,
549 enum intel_pdi_type type,
550 u32 num, u32 off, u32 max_ch)
557 for (i = off; i < (off + num); i++) {
558 dais[i].name = devm_kasprintf(cdns->dev, GFP_KERNEL,
564 if (type == INTEL_PDI_BD || type == INTEL_PDI_OUT) {
565 dais[i].playback.channels_min = 1;
566 dais[i].playback.channels_max = max_ch;
569 if (type == INTEL_PDI_BD || type == INTEL_PDI_IN) {
570 dais[i].capture.channels_min = 1;
571 dais[i].capture.channels_max = max_ch;
574 dais[i].ops = &intel_pcm_dai_ops;
580 static int intel_register_dai(struct sdw_intel *sdw)
582 struct sdw_cdns_dai_runtime **dai_runtime_array;
583 struct sdw_cdns_stream_config config;
584 struct sdw_cdns *cdns = &sdw->cdns;
585 struct sdw_cdns_streams *stream;
586 struct snd_soc_dai_driver *dais;
591 /* Read the PDI config and initialize cadence PDI */
592 intel_pdi_init(sdw, &config);
593 ret = sdw_cdns_pdi_init(cdns, config);
597 intel_pdi_stream_ch_update(sdw, &sdw->cdns.pcm);
599 /* DAIs are created based on total number of PDIs supported */
600 num_dai = cdns->pcm.num_pdi;
602 dai_runtime_array = devm_kcalloc(cdns->dev, num_dai,
603 sizeof(struct sdw_cdns_dai_runtime *),
605 if (!dai_runtime_array)
607 cdns->dai_runtime_array = dai_runtime_array;
609 dais = devm_kcalloc(cdns->dev, num_dai, sizeof(*dais), GFP_KERNEL);
613 /* Create PCM DAIs */
616 ret = intel_create_dai(cdns, dais, INTEL_PDI_IN, cdns->pcm.num_in,
617 off, stream->num_ch_in);
621 off += cdns->pcm.num_in;
622 ret = intel_create_dai(cdns, dais, INTEL_PDI_OUT, cdns->pcm.num_out,
623 off, stream->num_ch_out);
627 off += cdns->pcm.num_out;
628 ret = intel_create_dai(cdns, dais, INTEL_PDI_BD, cdns->pcm.num_bd,
629 off, stream->num_ch_bd);
633 return devm_snd_soc_register_component(cdns->dev, &dai_component,
637 static void intel_program_sdi(struct sdw_intel *sdw, int dev_num)
641 ret = hdac_bus_eml_sdw_set_lsdiid(sdw->link_res->hbus, sdw->instance, dev_num);
643 dev_err(sdw->cdns.dev, "%s: could not set lsdiid for link %d %d\n",
644 __func__, sdw->instance, dev_num);
647 const struct sdw_intel_hw_ops sdw_intel_lnl_hw_ops = {
648 .debugfs_init = intel_ace2x_debugfs_init,
649 .debugfs_exit = intel_ace2x_debugfs_exit,
651 .register_dai = intel_register_dai,
653 .check_clock_stop = intel_check_clock_stop,
654 .start_bus = intel_start_bus,
655 .start_bus_after_reset = intel_start_bus_after_reset,
656 .start_bus_after_clock_stop = intel_start_bus_after_clock_stop,
657 .stop_bus = intel_stop_bus,
659 .link_power_up = intel_link_power_up,
660 .link_power_down = intel_link_power_down,
662 .shim_check_wake = intel_shim_check_wake,
663 .shim_wake = intel_shim_wake,
665 .pre_bank_switch = intel_pre_bank_switch,
666 .post_bank_switch = intel_post_bank_switch,
668 .sync_arm = intel_sync_arm,
669 .sync_go_unlocked = intel_sync_go_unlocked,
670 .sync_go = intel_sync_go,
671 .sync_check_cmdsync_unlocked = intel_check_cmdsync_unlocked,
673 .program_sdi = intel_program_sdi,
675 EXPORT_SYMBOL_NS(sdw_intel_lnl_hw_ops, SOUNDWIRE_INTEL);
677 MODULE_IMPORT_NS(SND_SOC_SOF_HDA_MLINK);