1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * JH7110 Power Domain Controller Driver
5 * Copyright (C) 2022 StarFive Technology Co., Ltd.
8 #include <dt-bindings/power/jh7110-power.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/pm_domain.h>
15 #include <linux/of_device.h>
18 #define HW_EVENT_TURN_ON_MASK 0x04
19 #define HW_EVENT_TURN_OFF_MASK 0x08
20 #define SW_TURN_ON_POWER_MODE 0x0C
21 #define SW_TURN_OFF_POWER_MODE 0x10
22 #define SW_ENCOURAGE 0x44
23 #define PMU_INT_MASK 0x48
24 #define PCH_BYPASS 0x4C
25 #define PCH_PSTATE 0x50
26 #define PCH_TIMEOUT 0x54
27 #define LP_TIMEOUT 0x58
28 #define HW_TURN_ON_MODE 0x5C
29 #define CURR_POWER_MODE 0x80
30 #define PMU_EVENT_STATUS 0x88
31 #define PMU_INT_STATUS 0x8C
33 /* sw encourage cfg */
34 #define SW_MODE_ENCOURAGE_EN_LO 0x05
35 #define SW_MODE_ENCOURAGE_EN_HI 0x50
36 #define SW_MODE_ENCOURAGE_DIS_LO 0x0A
37 #define SW_MODE_ENCOURAGE_DIS_HI 0xA0
38 #define SW_MODE_ENCOURAGE_ON 0xFF
41 #define PMU_INT_SEQ_DONE BIT(0)
42 #define PMU_INT_HW_REQ BIT(1)
43 #define PMU_INT_SW_FAIL GENMASK(3, 2)
44 #define PMU_INT_HW_FAIL GENMASK(5, 4)
45 #define PMU_INT_PCH_FAIL GENMASK(8, 6)
46 #define PMU_INT_FAIL_MASK (PMU_INT_SW_FAIL | \
49 #define PMU_INT_ALL_MASK (PMU_INT_SEQ_DONE | \
53 struct jh7110_power_dev {
54 struct generic_pm_domain genpd;
55 struct jh7110_pmu *power;
64 struct jh7110_power_dev *dev;
65 struct genpd_onecell_data genpd_data;
66 struct generic_pm_domain **genpd;
69 struct jh7110_pmu_data {
70 const char * const name;
75 static void __iomem *pmu_base;
77 static inline void pmu_writel(u32 val, u32 offset)
79 writel(val, pmu_base + offset);
82 void starfive_pmu_hw_event_turn_off_mask(u32 mask)
84 pmu_writel(mask, HW_EVENT_TURN_OFF_MASK);
86 EXPORT_SYMBOL(starfive_pmu_hw_event_turn_off_mask);
88 static int jh7110_pmu_get_state(struct jh7110_power_dev *pmd, bool *is_on)
90 struct jh7110_pmu *pmu = pmd->power;
97 *is_on = __raw_readl(pmu->base + CURR_POWER_MODE) & pmd->mask;
102 static int jh7110_pmu_set_state(struct jh7110_power_dev *pmd, bool on)
104 struct jh7110_pmu *pmu = pmd->power;
108 uint32_t encourage_lo;
109 uint32_t encourage_hi;
115 ret = jh7110_pmu_get_state(pmd, &is_on);
117 dev_info(pmu->pdev, "unable to get current state for %s\n",
120 dev_info(pmu->pdev, "pm domain is already %sable status.\n",
125 spin_lock_irqsave(&pmu->lock, flags);
128 mode = SW_TURN_ON_POWER_MODE;
129 encourage_lo = SW_MODE_ENCOURAGE_EN_LO;
130 encourage_hi = SW_MODE_ENCOURAGE_EN_HI;
132 mode = SW_TURN_OFF_POWER_MODE;
133 encourage_lo = SW_MODE_ENCOURAGE_DIS_LO;
134 encourage_hi = SW_MODE_ENCOURAGE_DIS_HI;
137 val = __raw_readl(pmu->base + mode);
139 __raw_writel(val, pmu->base + mode);
141 /* write SW_ENCOURAGE to make the configuration take effect */
142 __raw_writel(SW_MODE_ENCOURAGE_ON, pmu->base + SW_ENCOURAGE);
143 __raw_writel(encourage_lo, pmu->base + SW_ENCOURAGE);
144 __raw_writel(encourage_hi, pmu->base + SW_ENCOURAGE);
146 spin_unlock_irqrestore(&pmu->lock, flags);
151 static int jh7110_pmu_on(struct generic_pm_domain *genpd)
153 struct jh7110_power_dev *pmd = container_of(genpd,
154 struct jh7110_power_dev, genpd);
156 return jh7110_pmu_set_state(pmd, true);
159 static int jh7110_pmu_off(struct generic_pm_domain *genpd)
161 struct jh7110_power_dev *pmd = container_of(genpd,
162 struct jh7110_power_dev, genpd);
164 return jh7110_pmu_set_state(pmd, false);
167 static void starfive_pmu_int_enable(struct jh7110_pmu *pmu, u32 mask, bool enable)
169 u32 val = __raw_readl(pmu->base + PMU_INT_MASK);
176 __raw_writel(val, pmu->base + PMU_INT_MASK);
179 static irqreturn_t starfive_pmu_interrupt(int irq, void *data)
181 struct jh7110_pmu *pmu = data;
185 spin_lock_irqsave(&pmu->lock, flags);
186 val = __raw_readl(pmu->base + PMU_INT_STATUS);
188 if (val & PMU_INT_SEQ_DONE)
189 dev_dbg(pmu->pdev, "sequence done.\n");
190 if (val & PMU_INT_HW_REQ)
191 dev_dbg(pmu->pdev, "hardware encourage requestion.\n");
192 if (val & PMU_INT_SW_FAIL)
193 dev_err(pmu->pdev, "software encourage fail.\n");
194 if (val & PMU_INT_HW_FAIL)
195 dev_err(pmu->pdev, "hardware encourage fail.\n");
196 if (val & PMU_INT_PCH_FAIL)
197 dev_err(pmu->pdev, "p-channel fail event.\n");
199 /* clear interrupts */
200 __raw_writel(val, pmu->base + PMU_INT_STATUS);
201 __raw_writel(val, pmu->base + PMU_EVENT_STATUS);
203 spin_unlock_irqrestore(&pmu->lock, flags);
208 static int jh7110_pmu_probe(struct platform_device *pdev)
210 struct device *dev = &pdev->dev;
211 struct device_node *np = dev->of_node;
212 struct resource *res;
213 const struct jh7110_pmu_data *entry, *table;
214 struct jh7110_pmu *pmu;
219 pmu = devm_kzalloc(dev, sizeof(*pmu), GFP_KERNEL);
223 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
224 pmu_base = pmu->base = devm_ioremap_resource(&pdev->dev, res);
225 if (IS_ERR(pmu->base))
226 return PTR_ERR(pmu->base);
228 /* initialize pmu interrupt */
229 pmu->irq = platform_get_irq(pdev, 0);
233 ret = devm_request_irq(dev, pmu->irq, starfive_pmu_interrupt,
236 dev_err(dev, "request irq failed.\n");
238 table = of_device_get_match_data(dev);
243 pmu->genpd_data.num_domains = 0;
245 for (entry = table; entry->name; entry++) {
246 max_bit = max(max_bit, entry->bit);
253 pmu->genpd_data.num_domains = max_bit + 1;
255 pmu->dev = devm_kcalloc(dev, pmu->genpd_data.num_domains,
256 sizeof(struct jh7110_power_dev),
261 pmu->genpd = devm_kcalloc(dev, pmu->genpd_data.num_domains,
262 sizeof(struct generic_pm_domain *),
267 pmu->genpd_data.domains = pmu->genpd;
270 for (entry = table; entry->name; entry++) {
271 struct jh7110_power_dev *pmd = &pmu->dev[i];
275 pmd->mask = BIT(entry->bit);
276 pmd->genpd.name = entry->name;
277 pmd->genpd.flags = entry->flags;
279 ret = jh7110_pmu_get_state(pmd, &is_on);
281 dev_warn(dev, "unable to get current state for %s\n",
284 pmd->genpd.power_on = jh7110_pmu_on;
285 pmd->genpd.power_off = jh7110_pmu_off;
287 pm_genpd_init(&pmd->genpd, NULL, !is_on);
288 pmu->genpd[entry->bit] = &pmd->genpd;
293 spin_lock_init(&pmu->lock);
294 starfive_pmu_int_enable(pmu, PMU_INT_ALL_MASK & ~PMU_INT_PCH_FAIL, true);
296 ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data);
298 dev_err(dev, "failed to register genpd driver: %d\n", ret);
302 dev_info(dev, "registered %u power domains\n", i);
307 static const struct jh7110_pmu_data jh7110_power_domains[] = {
310 .bit = JH7110_PD_SYSTOP,
311 .flags = GENPD_FLAG_ALWAYS_ON,
314 .bit = JH7110_PD_CPU,
315 .flags = GENPD_FLAG_ALWAYS_ON,
318 .bit = JH7110_PD_GPUA,
321 .bit = JH7110_PD_VDEC,
324 .bit = JH7110_PD_VOUT,
327 .bit = JH7110_PD_ISP,
330 .bit = JH7110_PD_VENC,
333 .bit = JH7110_PD_GPUB,
339 static const struct of_device_id jh7110_pmu_of_match[] = {
341 .compatible = "starfive,jh7110-pmu",
342 .data = &jh7110_power_domains,
348 static struct platform_driver jh7110_pmu_driver = {
350 .name = "jh7110-pmu",
351 .of_match_table = jh7110_pmu_of_match,
353 .probe = jh7110_pmu_probe,
355 builtin_platform_driver(jh7110_pmu_driver);
357 MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
358 MODULE_DESCRIPTION("Starfive JH7110 Power Domain Driver");
359 MODULE_LICENSE("GPL");