1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx Versal SOC driver
5 * Copyright (C) 2021 Xilinx, Inc.
11 #include <zynqmp_firmware.h>
13 #include <asm/arch/hardware.h>
17 * v2 -> 0x20 - Production
19 static const char versal_family[] = "Versal";
21 struct soc_xilinx_versal_priv {
26 static int soc_xilinx_versal_get_family(struct udevice *dev, char *buf, int size)
28 struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
30 return snprintf(buf, size, "%s", priv->family);
33 static int soc_xilinx_versal_get_revision(struct udevice *dev, char *buf, int size)
35 struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
37 return snprintf(buf, size, "v%d", priv->revision);
40 static const struct soc_ops soc_xilinx_versal_ops = {
41 .get_family = soc_xilinx_versal_get_family,
42 .get_revision = soc_xilinx_versal_get_revision,
45 static int soc_xilinx_versal_probe(struct udevice *dev)
47 struct soc_xilinx_versal_priv *priv = dev_get_priv(dev);
48 u32 ret_payload[PAYLOAD_ARG_CNT];
51 priv->family = versal_family;
53 if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {
54 ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,
59 ret_payload[2] = readl(VERSAL_PS_PMC_VERSION);
64 priv->revision = ret_payload[2] >> VERSAL_PS_VER_SHIFT;
69 U_BOOT_DRIVER(soc_xilinx_versal) = {
70 .name = "soc_xilinx_versal",
72 .ops = &soc_xilinx_versal_ops,
73 .probe = soc_xilinx_versal_probe,
74 .priv_auto = sizeof(struct soc_xilinx_versal_priv),
75 .flags = DM_FLAG_PRE_RELOC,