1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * EXYNOS - CHIP ID support
9 #define EXYNOS_CHIPID_REG_PRO_ID 0x00
10 #define EXYNOS_SUBREV_MASK (0xf << 4)
11 #define EXYNOS_MAINREV_MASK (0xf << 0)
12 #define EXYNOS_REV_MASK (EXYNOS_SUBREV_MASK | \
14 #define EXYNOS_MASK 0xfffff000
16 #define EXYNOS_CHIPID_REG_PKG_ID 0x04
17 #define EXYNOS5422_IDS_OFFSET 24
18 #define EXYNOS5422_IDS_MASK 0xff
19 #define EXYNOS5422_USESG_OFFSET 3
20 #define EXYNOS5422_USESG_MASK 0x01
21 #define EXYNOS5422_SG_OFFSET 0
22 #define EXYNOS5422_SG_MASK 0x07
23 #define EXYNOS5422_TABLE_OFFSET 8
24 #define EXYNOS5422_TABLE_MASK 0x03
25 #define EXYNOS5422_SG_A_OFFSET 17
26 #define EXYNOS5422_SG_A_MASK 0x0f
27 #define EXYNOS5422_SG_B_OFFSET 21
28 #define EXYNOS5422_SG_B_MASK 0x03
29 #define EXYNOS5422_SG_BSIGN_OFFSET 23
30 #define EXYNOS5422_SG_BSIGN_MASK 0x01
31 #define EXYNOS5422_BIN2_OFFSET 12
32 #define EXYNOS5422_BIN2_MASK 0x01
34 #define EXYNOS_CHIPID_REG_LOT_ID 0x14
36 #define EXYNOS_CHIPID_AUX_INFO 0x1c
37 #define EXYNOS5422_TMCB_OFFSET 0
38 #define EXYNOS5422_TMCB_MASK 0x7f
39 #define EXYNOS5422_ARM_UP_OFFSET 8
40 #define EXYNOS5422_ARM_UP_MASK 0x03
41 #define EXYNOS5422_ARM_DN_OFFSET 10
42 #define EXYNOS5422_ARM_DN_MASK 0x03
43 #define EXYNOS5422_KFC_UP_OFFSET 12
44 #define EXYNOS5422_KFC_UP_MASK 0x03
45 #define EXYNOS5422_KFC_DN_OFFSET 14
46 #define EXYNOS5422_KFC_DN_MASK 0x03
48 unsigned int exynos_chipid_read(unsigned int offset);
49 unsigned int exynos_chipid_read_bits(unsigned int offset, unsigned int shift,
51 unsigned int exynos_chipid_abb_read(unsigned int offset);