1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
15 #include <asm/arch/stm32.h>
16 #include <linux/bitops.h>
17 #include <linux/delay.h>
18 #include "serial_stm32.h"
19 #include <dm/device_compat.h>
21 static void _stm32_serial_setbrg(fdt_addr_t base,
22 struct stm32_uart_info *uart_info,
26 bool stm32f4 = uart_info->stm32f4;
27 u32 int_div, mantissa, fraction, oversampling;
29 int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate);
33 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
36 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
39 mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
40 fraction = int_div % oversampling;
42 writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
45 static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
47 struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
49 _stm32_serial_setbrg(plat->base, plat->uart_info,
50 plat->clock_rate, baudrate);
55 static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
57 struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
58 bool stm32f4 = plat->uart_info->stm32f4;
59 u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
60 u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
62 uint parity = SERIAL_GET_PARITY(serial_config);
63 uint bits = SERIAL_GET_BITS(serial_config);
64 uint stop = SERIAL_GET_STOP(serial_config);
67 * only parity config is implemented, check if other serial settings
68 * are the default one.
69 * (STM32F4 serial IP didn't support parity setting)
71 if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || stm32f4)
72 return -ENOTSUPP; /* not supported in driver*/
74 clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
75 /* update usart configuration (uart need to be disable)
76 * PCE: parity check enable
77 * PS : '0' : Even / '1' : Odd
78 * M[1:0] = '00' : 8 Data bits
79 * M[1:0] = '01' : 9 Data bits with parity
87 config = USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0;
90 config = USART_CR1_PCE | USART_CR1_M0;
95 USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
98 setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
103 static int stm32_serial_getc(struct udevice *dev)
105 struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
106 bool stm32f4 = plat->uart_info->stm32f4;
107 fdt_addr_t base = plat->base;
108 u32 isr = readl(base + ISR_OFFSET(stm32f4));
110 if ((isr & USART_ISR_RXNE) == 0)
113 if (isr & (USART_ISR_PE | USART_ISR_ORE | USART_ISR_FE)) {
115 setbits_le32(base + ICR_OFFSET,
116 USART_ICR_PCECF | USART_ICR_ORECF |
119 readl(base + RDR_OFFSET(stm32f4));
123 return readl(base + RDR_OFFSET(stm32f4));
126 static int _stm32_serial_putc(fdt_addr_t base,
127 struct stm32_uart_info *uart_info,
130 bool stm32f4 = uart_info->stm32f4;
132 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0)
135 writel(c, base + TDR_OFFSET(stm32f4));
140 static int stm32_serial_putc(struct udevice *dev, const char c)
142 struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
144 return _stm32_serial_putc(plat->base, plat->uart_info, c);
147 static int stm32_serial_pending(struct udevice *dev, bool input)
149 struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
150 bool stm32f4 = plat->uart_info->stm32f4;
151 fdt_addr_t base = plat->base;
154 return readl(base + ISR_OFFSET(stm32f4)) &
155 USART_ISR_RXNE ? 1 : 0;
157 return readl(base + ISR_OFFSET(stm32f4)) &
158 USART_ISR_TXE ? 0 : 1;
161 static void _stm32_serial_init(fdt_addr_t base,
162 struct stm32_uart_info *uart_info)
164 bool stm32f4 = uart_info->stm32f4;
165 u8 uart_enable_bit = uart_info->uart_enable_bit;
167 /* Disable uart-> enable fifo -> enable uart */
168 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
169 BIT(uart_enable_bit));
170 if (uart_info->has_fifo)
171 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
172 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
173 BIT(uart_enable_bit));
176 static int stm32_serial_probe(struct udevice *dev)
178 struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
180 struct reset_ctl reset;
183 plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
185 ret = clk_get_by_index(dev, 0, &clk);
189 ret = clk_enable(&clk);
191 dev_err(dev, "failed to enable clock\n");
195 ret = reset_get_by_index(dev, 0, &reset);
197 reset_assert(&reset);
199 reset_deassert(&reset);
202 plat->clock_rate = clk_get_rate(&clk);
203 if (!plat->clock_rate) {
208 _stm32_serial_init(plat->base, plat->uart_info);
213 static const struct udevice_id stm32_serial_id[] = {
214 { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
215 { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
216 { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
220 static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
222 struct stm32x7_serial_platdata *plat = dev_get_plat(dev);
224 plat->base = dev_read_addr(dev);
225 if (plat->base == FDT_ADDR_T_NONE)
231 static const struct dm_serial_ops stm32_serial_ops = {
232 .putc = stm32_serial_putc,
233 .pending = stm32_serial_pending,
234 .getc = stm32_serial_getc,
235 .setbrg = stm32_serial_setbrg,
236 .setconfig = stm32_serial_setconfig
239 U_BOOT_DRIVER(serial_stm32) = {
240 .name = "serial_stm32",
242 .of_match = of_match_ptr(stm32_serial_id),
243 .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
244 .plat_auto = sizeof(struct stm32x7_serial_platdata),
245 .ops = &stm32_serial_ops,
246 .probe = stm32_serial_probe,
247 #if !CONFIG_IS_ENABLED(OF_CONTROL)
248 .flags = DM_FLAG_PRE_RELOC,
252 #ifdef CONFIG_DEBUG_UART_STM32
253 #include <debug_uart.h>
254 static inline struct stm32_uart_info *_debug_uart_info(void)
256 struct stm32_uart_info *uart_info;
258 #if defined(CONFIG_STM32F4)
259 uart_info = &stm32f4_info;
260 #elif defined(CONFIG_STM32F7)
261 uart_info = &stm32f7_info;
263 uart_info = &stm32h7_info;
268 static inline void _debug_uart_init(void)
270 fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
271 struct stm32_uart_info *uart_info = _debug_uart_info();
273 _stm32_serial_init(base, uart_info);
274 _stm32_serial_setbrg(base, uart_info,
275 CONFIG_DEBUG_UART_CLOCK,
279 static inline void _debug_uart_putc(int c)
281 fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
282 struct stm32_uart_info *uart_info = _debug_uart_info();
284 while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)