1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Serial I/O using STMicroelectronics' on-chip ASC.
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
6 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
14 #include <linux/bitops.h>
16 DECLARE_GLOBAL_DATA_PTR;
18 #define BAUDMODE 0x00001000
19 #define RXENABLE 0x00000100
20 #define RUN 0x00000080
21 #define MODE 0x00000001
22 #define MODE_8BIT 0x0001
23 #define STOP_1BIT 0x0008
24 #define PARITYODD 0x0020
27 #define STA_RBF BIT(0)
42 struct sti_asc_serial {
43 /* address of registers in physical memory */
44 struct sti_asc_uart *regs;
47 /* Values for the BAUDRATE Register */
48 #define PCLK (200ul * 1000000ul)
49 #define BAUDRATE_VAL_M0(bps) (PCLK / (16 * (bps)))
50 #define BAUDRATE_VAL_M1(bps) ((bps * (1 << 14)) + (1<<13)) / (PCLK/(1 << 6))
55 * ASCBaudRate = ----------------
59 * baudrate * 16 * 2^16
60 * ASCBaudRate = ------------------------
64 * Mode 1 should be used for baudrates of 19200, and above, as it
65 * has a lower deviation error than Mode 0 for higher frequencies.
66 * Mode 0 should be used for all baudrates below 19200.
69 static int sti_asc_pending(struct udevice *dev, bool input)
71 struct sti_asc_serial *priv = dev_get_priv(dev);
72 struct sti_asc_uart *const uart = priv->regs;
75 status = readl(&uart->status);
77 return status & STA_RBF;
79 return status & STA_TF;
82 static int _sti_asc_serial_setbrg(struct sti_asc_uart *uart, int baudrate)
89 t = BAUDRATE_VAL_M0(9600);
93 t = BAUDRATE_VAL_M1(19200);
96 t = BAUDRATE_VAL_M1(38400);
99 t = BAUDRATE_VAL_M1(57600);
102 debug("ASC: unsupported baud rate: %d, using 115200 instead.\n",
105 t = BAUDRATE_VAL_M1(115200);
109 /* disable the baudrate generator */
110 val = readl(&uart->control);
111 writel(val & ~RUN, &uart->control);
113 /* set baud generator reload value */
114 writel(t, &uart->baudrate);
115 /* reset the RX & TX buffers */
116 writel(1, &uart->txreset);
117 writel(1, &uart->rxreset);
119 /* set baud generator mode */
123 /* finally, write value and enable ASC */
124 writel(val, &uart->control);
129 /* called to adjust baud-rate */
130 static int sti_asc_serial_setbrg(struct udevice *dev, int baudrate)
132 struct sti_asc_serial *priv = dev_get_priv(dev);
133 struct sti_asc_uart *const uart = priv->regs;
135 return _sti_asc_serial_setbrg(uart, baudrate);
138 /* blocking function, that returns next char */
139 static int sti_asc_serial_getc(struct udevice *dev)
141 struct sti_asc_serial *priv = dev_get_priv(dev);
142 struct sti_asc_uart *const uart = priv->regs;
144 /* polling wait: for a char to be read */
145 if (!sti_asc_pending(dev, true))
148 return readl(&uart->rxbuf);
151 /* write write out a single char */
152 static int sti_asc_serial_putc(struct udevice *dev, const char c)
154 struct sti_asc_serial *priv = dev_get_priv(dev);
155 struct sti_asc_uart *const uart = priv->regs;
157 /* wait till safe to write next char */
158 if (sti_asc_pending(dev, false))
161 /* finally, write next char */
162 writel(c, &uart->txbuf);
167 /* initialize the ASC */
168 static int sti_asc_serial_probe(struct udevice *dev)
170 struct sti_asc_serial *priv = dev_get_priv(dev);
174 base = dev_read_addr(dev);
175 if (base == FDT_ADDR_T_NONE)
178 priv->regs = (struct sti_asc_uart *)base;
179 sti_asc_serial_setbrg(dev, gd->baudrate);
182 * build up the value to be written to CONTROL
183 * set character length, bit stop number, odd parity
185 val = RXENABLE | RUN | MODE_8BIT | STOP_1BIT | PARITYODD;
186 writel(val, &priv->regs->control);
191 static const struct dm_serial_ops sti_asc_serial_ops = {
192 .putc = sti_asc_serial_putc,
193 .pending = sti_asc_pending,
194 .getc = sti_asc_serial_getc,
195 .setbrg = sti_asc_serial_setbrg,
198 static const struct udevice_id sti_serial_of_match[] = {
199 { .compatible = "st,asc" },
203 U_BOOT_DRIVER(serial_sti_asc) = {
204 .name = "serial_sti_asc",
206 .of_match = sti_serial_of_match,
207 .ops = &sti_asc_serial_ops,
208 .probe = sti_asc_serial_probe,
209 .priv_auto_alloc_size = sizeof(struct sti_asc_serial),