1 // SPDX-License-Identifier: GPL-2.0
3 * MediaTek High-speed UART driver
5 * Copyright (C) 2018 MediaTek Inc.
6 * Author: Weijie Gao <weijie.gao@mediatek.com>
18 #include <asm/types.h>
19 #include <linux/err.h>
21 struct mtk_serial_regs {
46 #define UART_LCR_WLS_8 0x03 /* 8 bit character length */
47 #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
49 #define UART_LSR_DR 0x01 /* Data ready */
50 #define UART_LSR_THRE 0x20 /* Xmit holding register empty */
51 #define UART_LSR_TEMT 0x40 /* Xmitter empty */
53 #define UART_MCR_DTR 0x01 /* DTR */
54 #define UART_MCR_RTS 0x02 /* RTS */
56 #define UART_FCR_FIFO_EN 0x01 /* Fifo enable */
57 #define UART_FCR_RXSR 0x02 /* Receiver soft reset */
58 #define UART_FCR_TXSR 0x04 /* Transmitter soft reset */
60 #define UART_MCRVAL (UART_MCR_DTR | \
63 /* Clear & enable FIFOs */
64 #define UART_FCRVAL (UART_FCR_FIFO_EN | \
68 /* the data is correct if the real baud is within 3%. */
69 #define BAUD_ALLOW_MAX(baud) ((baud) + (baud) * 3 / 100)
70 #define BAUD_ALLOW_MIX(baud) ((baud) - (baud) * 3 / 100)
72 struct mtk_serial_priv {
73 struct mtk_serial_regs __iomem *regs;
77 static void _mtk_serial_setbrg(struct mtk_serial_priv *priv, int baud)
79 bool support_clk12m_baud115200;
80 u32 quot, samplecount, realbaud;
82 if ((baud <= 115200) && (priv->clock == 12000000))
83 support_clk12m_baud115200 = true;
85 support_clk12m_baud115200 = false;
88 writel(0, &priv->regs->highspeed);
89 quot = DIV_ROUND_CLOSEST(priv->clock, 16 * baud);
91 if (support_clk12m_baud115200) {
92 writel(3, &priv->regs->highspeed);
93 quot = DIV_ROUND_CLOSEST(priv->clock, 256 * baud);
97 samplecount = DIV_ROUND_CLOSEST(priv->clock,
99 if (samplecount != 0) {
100 realbaud = priv->clock / samplecount / quot;
101 if ((realbaud > BAUD_ALLOW_MAX(baud)) ||
102 (realbaud < BAUD_ALLOW_MIX(baud))) {
103 pr_info("baud %d can't be handled\n",
107 pr_info("samplecount is 0\n");
110 } else if (baud <= 576000) {
111 writel(2, &priv->regs->highspeed);
113 /* Set to next lower baudrate supported */
114 if ((baud == 500000) || (baud == 576000))
116 quot = DIV_ROUND_UP(priv->clock, 4 * baud);
118 writel(3, &priv->regs->highspeed);
119 quot = DIV_ROUND_UP(priv->clock, 256 * baud);
123 writel(UART_LCR_WLS_8 | UART_LCR_DLAB, &priv->regs->lcr);
124 writel(quot & 0xff, &priv->regs->dll);
125 writel((quot >> 8) & 0xff, &priv->regs->dlm);
126 writel(UART_LCR_WLS_8, &priv->regs->lcr);
131 tmp = DIV_ROUND_CLOSEST(priv->clock, quot * baud);
132 writel(tmp - 1, &priv->regs->sample_count);
133 writel((tmp - 2) >> 1, &priv->regs->sample_point);
135 writel(0, &priv->regs->sample_count);
136 writel(0xff, &priv->regs->sample_point);
139 if (support_clk12m_baud115200) {
140 writel(samplecount - 1, &priv->regs->sample_count);
141 writel((samplecount - 2) >> 1, &priv->regs->sample_point);
145 static int _mtk_serial_putc(struct mtk_serial_priv *priv, const char ch)
147 if (!(readl(&priv->regs->lsr) & UART_LSR_THRE))
150 writel(ch, &priv->regs->thr);
158 static int _mtk_serial_getc(struct mtk_serial_priv *priv)
160 if (!(readl(&priv->regs->lsr) & UART_LSR_DR))
163 return readl(&priv->regs->rbr);
166 static int _mtk_serial_pending(struct mtk_serial_priv *priv, bool input)
169 return (readl(&priv->regs->lsr) & UART_LSR_DR) ? 1 : 0;
171 return (readl(&priv->regs->lsr) & UART_LSR_THRE) ? 0 : 1;
174 #if defined(CONFIG_DM_SERIAL) && \
175 (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_DM))
176 static int mtk_serial_setbrg(struct udevice *dev, int baudrate)
178 struct mtk_serial_priv *priv = dev_get_priv(dev);
180 _mtk_serial_setbrg(priv, baudrate);
185 static int mtk_serial_putc(struct udevice *dev, const char ch)
187 struct mtk_serial_priv *priv = dev_get_priv(dev);
189 return _mtk_serial_putc(priv, ch);
192 static int mtk_serial_getc(struct udevice *dev)
194 struct mtk_serial_priv *priv = dev_get_priv(dev);
196 return _mtk_serial_getc(priv);
199 static int mtk_serial_pending(struct udevice *dev, bool input)
201 struct mtk_serial_priv *priv = dev_get_priv(dev);
203 return _mtk_serial_pending(priv, input);
206 static int mtk_serial_probe(struct udevice *dev)
208 struct mtk_serial_priv *priv = dev_get_priv(dev);
210 /* Disable interrupt */
211 writel(0, &priv->regs->ier);
213 writel(UART_MCRVAL, &priv->regs->mcr);
214 writel(UART_FCRVAL, &priv->regs->fcr);
219 static int mtk_serial_of_to_plat(struct udevice *dev)
221 struct mtk_serial_priv *priv = dev_get_priv(dev);
226 addr = dev_read_addr(dev);
227 if (addr == FDT_ADDR_T_NONE)
230 priv->regs = map_physmem(addr, 0, MAP_NOCACHE);
232 err = clk_get_by_index(dev, 0, &clk);
234 err = clk_get_rate(&clk);
235 if (!IS_ERR_VALUE(err))
237 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
238 debug("mtk_serial: failed to get clock\n");
243 priv->clock = dev_read_u32_default(dev, "clock-frequency", 0);
246 debug("mtk_serial: clock not defined\n");
253 static const struct dm_serial_ops mtk_serial_ops = {
254 .putc = mtk_serial_putc,
255 .pending = mtk_serial_pending,
256 .getc = mtk_serial_getc,
257 .setbrg = mtk_serial_setbrg,
260 static const struct udevice_id mtk_serial_ids[] = {
261 { .compatible = "mediatek,hsuart" },
262 { .compatible = "mediatek,mt6577-uart" },
266 U_BOOT_DRIVER(serial_mtk) = {
267 .name = "serial_mtk",
269 .of_match = mtk_serial_ids,
270 .of_to_plat = mtk_serial_of_to_plat,
271 .priv_auto = sizeof(struct mtk_serial_priv),
272 .probe = mtk_serial_probe,
273 .ops = &mtk_serial_ops,
274 .flags = DM_FLAG_PRE_RELOC,
278 DECLARE_GLOBAL_DATA_PTR;
280 #define DECLARE_HSUART_PRIV(port) \
281 static struct mtk_serial_priv mtk_hsuart##port = { \
282 .regs = (struct mtk_serial_regs *)CONFIG_SYS_NS16550_COM##port, \
283 .clock = CONFIG_SYS_NS16550_CLK \
286 #define DECLARE_HSUART_FUNCTIONS(port) \
287 static int mtk_serial##port##_init(void) \
289 writel(0, &mtk_hsuart##port.regs->ier); \
290 writel(UART_MCRVAL, &mtk_hsuart##port.regs->mcr); \
291 writel(UART_FCRVAL, &mtk_hsuart##port.regs->fcr); \
292 _mtk_serial_setbrg(&mtk_hsuart##port, gd->baudrate); \
295 static void mtk_serial##port##_setbrg(void) \
297 _mtk_serial_setbrg(&mtk_hsuart##port, gd->baudrate); \
299 static int mtk_serial##port##_getc(void) \
303 err = _mtk_serial_getc(&mtk_hsuart##port); \
304 if (err == -EAGAIN) \
306 } while (err == -EAGAIN); \
307 return err >= 0 ? err : 0; \
309 static int mtk_serial##port##_tstc(void) \
311 return _mtk_serial_pending(&mtk_hsuart##port, true); \
313 static void mtk_serial##port##_putc(const char c) \
317 mtk_serial##port##_putc('\r'); \
319 err = _mtk_serial_putc(&mtk_hsuart##port, c); \
320 } while (err == -EAGAIN); \
322 static void mtk_serial##port##_puts(const char *s) \
325 mtk_serial##port##_putc(*s++); \
329 /* Serial device descriptor */
330 #define INIT_HSUART_STRUCTURE(port, __name) { \
332 .start = mtk_serial##port##_init, \
334 .setbrg = mtk_serial##port##_setbrg, \
335 .getc = mtk_serial##port##_getc, \
336 .tstc = mtk_serial##port##_tstc, \
337 .putc = mtk_serial##port##_putc, \
338 .puts = mtk_serial##port##_puts, \
341 #define DECLARE_HSUART(port, __name) \
342 DECLARE_HSUART_PRIV(port); \
343 DECLARE_HSUART_FUNCTIONS(port); \
344 struct serial_device mtk_hsuart##port##_device = \
345 INIT_HSUART_STRUCTURE(port, __name);
347 #if !defined(CONFIG_CONS_INDEX)
348 #elif (CONFIG_CONS_INDEX < 1) || (CONFIG_CONS_INDEX > 6)
349 #error "Invalid console index value."
352 #if CONFIG_CONS_INDEX == 1 && !defined(CONFIG_SYS_NS16550_COM1)
353 #error "Console port 1 defined but not configured."
354 #elif CONFIG_CONS_INDEX == 2 && !defined(CONFIG_SYS_NS16550_COM2)
355 #error "Console port 2 defined but not configured."
356 #elif CONFIG_CONS_INDEX == 3 && !defined(CONFIG_SYS_NS16550_COM3)
357 #error "Console port 3 defined but not configured."
358 #elif CONFIG_CONS_INDEX == 4 && !defined(CONFIG_SYS_NS16550_COM4)
359 #error "Console port 4 defined but not configured."
360 #elif CONFIG_CONS_INDEX == 5 && !defined(CONFIG_SYS_NS16550_COM5)
361 #error "Console port 5 defined but not configured."
362 #elif CONFIG_CONS_INDEX == 6 && !defined(CONFIG_SYS_NS16550_COM6)
363 #error "Console port 6 defined but not configured."
366 #if defined(CONFIG_SYS_NS16550_COM1)
367 DECLARE_HSUART(1, "mtk-hsuart0");
369 #if defined(CONFIG_SYS_NS16550_COM2)
370 DECLARE_HSUART(2, "mtk-hsuart1");
372 #if defined(CONFIG_SYS_NS16550_COM3)
373 DECLARE_HSUART(3, "mtk-hsuart2");
375 #if defined(CONFIG_SYS_NS16550_COM4)
376 DECLARE_HSUART(4, "mtk-hsuart3");
378 #if defined(CONFIG_SYS_NS16550_COM5)
379 DECLARE_HSUART(5, "mtk-hsuart4");
381 #if defined(CONFIG_SYS_NS16550_COM6)
382 DECLARE_HSUART(6, "mtk-hsuart5");
385 __weak struct serial_device *default_serial_console(void)
387 #if CONFIG_CONS_INDEX == 1
388 return &mtk_hsuart1_device;
389 #elif CONFIG_CONS_INDEX == 2
390 return &mtk_hsuart2_device;
391 #elif CONFIG_CONS_INDEX == 3
392 return &mtk_hsuart3_device;
393 #elif CONFIG_CONS_INDEX == 4
394 return &mtk_hsuart4_device;
395 #elif CONFIG_CONS_INDEX == 5
396 return &mtk_hsuart5_device;
397 #elif CONFIG_CONS_INDEX == 6
398 return &mtk_hsuart6_device;
400 #error "Bad CONFIG_CONS_INDEX."
404 void mtk_serial_initialize(void)
406 #if defined(CONFIG_SYS_NS16550_COM1)
407 serial_register(&mtk_hsuart1_device);
409 #if defined(CONFIG_SYS_NS16550_COM2)
410 serial_register(&mtk_hsuart2_device);
412 #if defined(CONFIG_SYS_NS16550_COM3)
413 serial_register(&mtk_hsuart3_device);
415 #if defined(CONFIG_SYS_NS16550_COM4)
416 serial_register(&mtk_hsuart4_device);
418 #if defined(CONFIG_SYS_NS16550_COM5)
419 serial_register(&mtk_hsuart5_device);
421 #if defined(CONFIG_SYS_NS16550_COM6)
422 serial_register(&mtk_hsuart6_device);
428 #ifdef CONFIG_DEBUG_UART_MTK
430 #include <debug_uart.h>
432 static inline void _debug_uart_init(void)
434 struct mtk_serial_priv priv;
436 priv.regs = (void *) CONFIG_DEBUG_UART_BASE;
437 priv.clock = CONFIG_DEBUG_UART_CLOCK;
439 writel(0, &priv.regs->ier);
440 writel(UART_MCRVAL, &priv.regs->mcr);
441 writel(UART_FCRVAL, &priv.regs->fcr);
443 _mtk_serial_setbrg(&priv, CONFIG_BAUDRATE);
446 static inline void _debug_uart_putc(int ch)
448 struct mtk_serial_regs __iomem *regs =
449 (void *) CONFIG_DEBUG_UART_BASE;
451 while (!(readl(®s->lsr) & UART_LSR_THRE))
454 writel(ch, ®s->thr);