2 * (C) Copyright 2016 Stephen Warren <swarren@wwwdotorg.org>
4 * Derived from pl01x code:
7 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
11 * Philippe Robin, <philippe.robin@arm.com>
13 * SPDX-License-Identifier: GPL-2.0+
16 /* Simple U-Boot driver for the BCM283x mini UART */
24 #include <dm/platform_data/serial_bcm283x_mu.h>
25 #include <linux/compiler.h>
28 DECLARE_GLOBAL_DATA_PTR;
30 struct bcm283x_mu_regs {
44 #define BCM283X_MU_LCR_DATA_SIZE_8 3
46 #define BCM283X_MU_LSR_TX_IDLE BIT(6)
47 /* This actually means not full, but is named not empty in the docs */
48 #define BCM283X_MU_LSR_TX_EMPTY BIT(5)
49 #define BCM283X_MU_LSR_RX_READY BIT(0)
51 struct bcm283x_mu_priv {
52 struct bcm283x_mu_regs *regs;
55 static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
57 struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
58 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
59 struct bcm283x_mu_regs *regs = priv->regs;
62 if (plat->disabled || plat->skip_init)
65 divider = plat->clock / (baudrate * 8);
67 writel(BCM283X_MU_LCR_DATA_SIZE_8, ®s->lcr);
68 writel(divider - 1, ®s->baud);
73 static int bcm283x_mu_serial_probe(struct udevice *dev)
75 struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
76 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
81 priv->regs = (struct bcm283x_mu_regs *)plat->base;
86 static int bcm283x_mu_serial_getc(struct udevice *dev)
88 struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
89 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
90 struct bcm283x_mu_regs *regs = priv->regs;
96 /* Wait until there is data in the FIFO */
97 if (!(readl(®s->lsr) & BCM283X_MU_LSR_RX_READY))
100 data = readl(®s->io);
105 static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
107 struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
108 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
109 struct bcm283x_mu_regs *regs = priv->regs;
114 /* Wait until there is space in the FIFO */
115 if (!(readl(®s->lsr) & BCM283X_MU_LSR_TX_EMPTY))
118 /* Send the character */
119 writel(data, ®s->io);
124 static int bcm283x_mu_serial_pending(struct udevice *dev, bool input)
126 struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
127 struct bcm283x_mu_priv *priv = dev_get_priv(dev);
128 struct bcm283x_mu_regs *regs = priv->regs;
134 lsr = readl(®s->lsr);
138 return (lsr & BCM283X_MU_LSR_RX_READY) ? 1 : 0;
140 return (lsr & BCM283X_MU_LSR_TX_IDLE) ? 0 : 1;
144 static const struct dm_serial_ops bcm283x_mu_serial_ops = {
145 .putc = bcm283x_mu_serial_putc,
146 .pending = bcm283x_mu_serial_pending,
147 .getc = bcm283x_mu_serial_getc,
148 .setbrg = bcm283x_mu_serial_setbrg,
151 #if CONFIG_IS_ENABLED(OF_CONTROL)
152 static const struct udevice_id bcm283x_mu_serial_id[] = {
153 {.compatible = "brcm,bcm2835-aux-uart"},
157 static int bcm283x_mu_serial_ofdata_to_platdata(struct udevice *dev)
159 struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
162 addr = dev_get_addr(dev);
163 if (addr == FDT_ADDR_T_NONE)
167 plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "clock",
169 plat->skip_init = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
171 plat->disabled = false;
176 U_BOOT_DRIVER(serial_bcm283x_mu) = {
177 .name = "serial_bcm283x_mu",
179 .of_match = of_match_ptr(bcm283x_mu_serial_id),
180 .ofdata_to_platdata = of_match_ptr(bcm283x_mu_serial_ofdata_to_platdata),
181 .platdata_auto_alloc_size = sizeof(struct bcm283x_mu_serial_platdata),
182 .probe = bcm283x_mu_serial_probe,
183 .ops = &bcm283x_mu_serial_ops,
184 .flags = DM_FLAG_PRE_RELOC,
185 .priv_auto_alloc_size = sizeof(struct bcm283x_mu_priv),
188 #ifdef CONFIG_SPL_BUILD
189 #include <debug_uart.h>
191 #define IO_BASE 0x3f000000
192 #define GP_BASE (IO_BASE + 0x200000)
193 #define MU_BASE (IO_BASE + 0x215000)
195 #define AUX_ENB (*(volatile unsigned *)(MU_BASE + 0x04))
196 #define MU_IO (*(volatile unsigned *)(MU_BASE + 0x40))
197 #define MU_IIR (*(volatile unsigned *)(MU_BASE + 0x44))
198 #define MU_IER (*(volatile unsigned *)(MU_BASE + 0x48))
199 #define MU_LCR (*(volatile unsigned *)(MU_BASE + 0x4c))
200 #define MU_MCR (*(volatile unsigned *)(MU_BASE + 0x50))
201 #define MU_LSR (*(volatile unsigned *)(MU_BASE + 0x54))
202 #define MU_CNTL (*(volatile unsigned *)(MU_BASE + 0x60))
203 #define MU_STAT (*(volatile unsigned *)(MU_BASE + 0x64))
204 #define MU_BAUD (*(volatile unsigned *)(MU_BASE + 0x68))
206 #define GPFSEL1 (*(volatile unsigned *)(GP_BASE + 0x04))
207 #define GPPUD (*(volatile unsigned *)(GP_BASE + 0x94))
208 #define GPPUDCLK0 (*(volatile unsigned *)(GP_BASE + 0x98))
210 static inline void _debug_uart_init(void)
213 * uart setting is already done from bootcode.bin
214 * with enable_uart=1 in config.txt
218 static inline void _debug_uart_putc(int ch)
220 while (!(MU_LSR & 0x20))