2 * Copyright (C) 2004-2006 Atmel Corporation
4 * Modified to support C structur SoC access by
5 * Andreas Bießmann <biessmann@corscience.de>
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <debug_uart.h>
15 #include <linux/compiler.h>
18 #ifdef CONFIG_DM_SERIAL
19 #include <asm/arch/atmel_serial.h>
21 #include <asm/arch/clk.h>
22 #include <asm/arch/hardware.h>
24 #include "atmel_usart.h"
26 DECLARE_GLOBAL_DATA_PTR;
28 #ifndef CONFIG_DM_SERIAL
29 static void atmel_serial_setbrg_internal(atmel_usart3_t *usart, int id,
32 unsigned long divisor;
33 unsigned long usart_hz;
37 * Baud Rate = --------------
40 usart_hz = get_usart_clk_rate(id);
41 divisor = (usart_hz / 16 + baudrate / 2) / baudrate;
42 writel(USART3_BF(CD, divisor), &usart->brgr);
45 static void atmel_serial_init_internal(atmel_usart3_t *usart)
48 * Just in case: drain transmitter register
49 * 1000us is enough for baudrate >= 9600
51 if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
54 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
57 static void atmel_serial_activate(atmel_usart3_t *usart)
59 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
60 | USART3_BF(USCLKS, USART3_USCLKS_MCK)
61 | USART3_BF(CHRL, USART3_CHRL_8)
62 | USART3_BF(PAR, USART3_PAR_NONE)
63 | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
65 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
66 /* 100us is enough for the new settings to be settled */
70 static void atmel_serial_setbrg(void)
72 atmel_serial_setbrg_internal((atmel_usart3_t *)CONFIG_USART_BASE,
73 CONFIG_USART_ID, gd->baudrate);
76 static int atmel_serial_init(void)
78 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
80 atmel_serial_init_internal(usart);
82 atmel_serial_activate(usart);
87 static void atmel_serial_putc(char c)
89 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
94 while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
95 writel(c, &usart->thr);
98 static int atmel_serial_getc(void)
100 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
102 while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
104 return readl(&usart->rhr);
107 static int atmel_serial_tstc(void)
109 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
110 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
113 static struct serial_device atmel_serial_drv = {
114 .name = "atmel_serial",
115 .start = atmel_serial_init,
117 .setbrg = atmel_serial_setbrg,
118 .putc = atmel_serial_putc,
119 .puts = default_serial_puts,
120 .getc = atmel_serial_getc,
121 .tstc = atmel_serial_tstc,
124 void atmel_serial_initialize(void)
126 serial_register(&atmel_serial_drv);
129 __weak struct serial_device *default_serial_console(void)
131 return &atmel_serial_drv;
135 #ifdef CONFIG_DM_SERIAL
137 struct atmel_serial_priv {
138 atmel_usart3_t *usart;
141 static void _atmel_serial_set_brg(atmel_usart3_t *usart,
142 ulong usart_clk_rate, int baudrate)
144 unsigned long divisor;
146 divisor = (usart_clk_rate / 16 + baudrate / 2) / baudrate;
147 writel(USART3_BF(CD, divisor), &usart->brgr);
150 void _atmel_serial_init(atmel_usart3_t *usart,
151 ulong usart_clk_rate, int baudrate)
153 writel(USART3_BIT(RXDIS) | USART3_BIT(TXDIS), &usart->cr);
155 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL) |
156 USART3_BF(USCLKS, USART3_USCLKS_MCK) |
157 USART3_BF(CHRL, USART3_CHRL_8) |
158 USART3_BF(PAR, USART3_PAR_NONE) |
159 USART3_BF(NBSTOP, USART3_NBSTOP_1)), &usart->mr);
161 _atmel_serial_set_brg(usart, usart_clk_rate, baudrate);
163 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
164 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
167 int atmel_serial_setbrg(struct udevice *dev, int baudrate)
169 struct atmel_serial_priv *priv = dev_get_priv(dev);
171 _atmel_serial_set_brg(priv->usart, get_usart_clk_rate(0), baudrate);
176 static int atmel_serial_getc(struct udevice *dev)
178 struct atmel_serial_priv *priv = dev_get_priv(dev);
180 if (!(readl(&priv->usart->csr) & USART3_BIT(RXRDY)))
183 return readl(&priv->usart->rhr);
186 static int atmel_serial_putc(struct udevice *dev, const char ch)
188 struct atmel_serial_priv *priv = dev_get_priv(dev);
190 if (!(readl(&priv->usart->csr) & USART3_BIT(TXRDY)))
193 writel(ch, &priv->usart->thr);
198 static int atmel_serial_pending(struct udevice *dev, bool input)
200 struct atmel_serial_priv *priv = dev_get_priv(dev);
201 uint32_t csr = readl(&priv->usart->csr);
204 return csr & USART3_BIT(RXRDY) ? 1 : 0;
206 return csr & USART3_BIT(TXEMPTY) ? 0 : 1;
209 static const struct dm_serial_ops atmel_serial_ops = {
210 .putc = atmel_serial_putc,
211 .pending = atmel_serial_pending,
212 .getc = atmel_serial_getc,
213 .setbrg = atmel_serial_setbrg,
216 static int atmel_serial_probe(struct udevice *dev)
218 struct atmel_serial_platdata *plat = dev->platdata;
219 struct atmel_serial_priv *priv = dev_get_priv(dev);
220 #if CONFIG_IS_ENABLED(OF_CONTROL)
221 fdt_addr_t addr_base;
223 addr_base = dev_get_addr(dev);
224 if (addr_base == FDT_ADDR_T_NONE)
227 plat->base_addr = (uint32_t)addr_base;
229 priv->usart = (atmel_usart3_t *)plat->base_addr;
231 _atmel_serial_init(priv->usart, get_usart_clk_rate(0), gd->baudrate);
236 #if CONFIG_IS_ENABLED(OF_CONTROL)
237 static const struct udevice_id atmel_serial_ids[] = {
238 { .compatible = "atmel,at91sam9260-usart" },
243 U_BOOT_DRIVER(serial_atmel) = {
244 .name = "serial_atmel",
246 #if CONFIG_IS_ENABLED(OF_CONTROL)
247 .of_match = atmel_serial_ids,
248 .platdata_auto_alloc_size = sizeof(struct atmel_serial_platdata),
250 .probe = atmel_serial_probe,
251 .ops = &atmel_serial_ops,
252 .flags = DM_FLAG_PRE_RELOC,
253 .priv_auto_alloc_size = sizeof(struct atmel_serial_priv),
257 #ifdef CONFIG_DEBUG_UART_ATMEL
258 static inline void _debug_uart_init(void)
260 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE;
262 _atmel_serial_init(usart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
265 static inline void _debug_uart_putc(int ch)
267 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE;
269 while (!(readl(&usart->csr) & USART3_BIT(TXRDY)))
272 writel(ch, &usart->thr);