2 * linux/drivers/char/amba.c
4 * Driver for AMBA serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * This is a generic driver for ARM AMBA-type serial ports. They
26 * have a lot of 16550-like features, but are not register compatible.
27 * Note that although they do have CTS, DCD and DSR inputs, they do
28 * not have an RI input, nor do they have DTR or RTS outputs. If
29 * required, these have to be supplied via some other means (eg, GPIO)
30 * and hooked into this driver.
33 #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
37 #include <linux/module.h>
38 #include <linux/ioport.h>
39 #include <linux/init.h>
40 #include <linux/console.h>
41 #include <linux/sysrq.h>
42 #include <linux/device.h>
43 #include <linux/tty.h>
44 #include <linux/tty_flip.h>
45 #include <linux/serial_core.h>
46 #include <linux/serial.h>
47 #include <linux/amba/bus.h>
48 #include <linux/amba/serial.h>
49 #include <linux/clk.h>
50 #include <linux/slab.h>
56 #define SERIAL_AMBA_MAJOR 204
57 #define SERIAL_AMBA_MINOR 16
58 #define SERIAL_AMBA_NR UART_NR
60 #define AMBA_ISR_PASS_LIMIT 256
62 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
63 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
65 #define UART_DUMMY_RSR_RX 256
66 #define UART_PORT_SIZE 64
69 * We wrap our port structure around the generic uart_port.
71 struct uart_amba_port {
72 struct uart_port port;
74 struct amba_device *dev;
75 struct amba_pl010_data *data;
76 unsigned int old_status;
79 static void pl010_stop_tx(struct uart_port *port)
81 struct uart_amba_port *uap = (struct uart_amba_port *)port;
84 cr = readb(uap->port.membase + UART010_CR);
85 cr &= ~UART010_CR_TIE;
86 writel(cr, uap->port.membase + UART010_CR);
89 static void pl010_start_tx(struct uart_port *port)
91 struct uart_amba_port *uap = (struct uart_amba_port *)port;
94 cr = readb(uap->port.membase + UART010_CR);
96 writel(cr, uap->port.membase + UART010_CR);
99 static void pl010_stop_rx(struct uart_port *port)
101 struct uart_amba_port *uap = (struct uart_amba_port *)port;
104 cr = readb(uap->port.membase + UART010_CR);
105 cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
106 writel(cr, uap->port.membase + UART010_CR);
109 static void pl010_enable_ms(struct uart_port *port)
111 struct uart_amba_port *uap = (struct uart_amba_port *)port;
114 cr = readb(uap->port.membase + UART010_CR);
115 cr |= UART010_CR_MSIE;
116 writel(cr, uap->port.membase + UART010_CR);
119 static void pl010_rx_chars(struct uart_amba_port *uap)
121 struct tty_struct *tty = uap->port.state->port.tty;
122 unsigned int status, ch, flag, rsr, max_count = 256;
124 status = readb(uap->port.membase + UART01x_FR);
125 while (UART_RX_DATA(status) && max_count--) {
126 ch = readb(uap->port.membase + UART01x_DR);
129 uap->port.icount.rx++;
132 * Note that the error handling code is
133 * out of the main execution path
135 rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
136 if (unlikely(rsr & UART01x_RSR_ANY)) {
137 writel(0, uap->port.membase + UART01x_ECR);
139 if (rsr & UART01x_RSR_BE) {
140 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
141 uap->port.icount.brk++;
142 if (uart_handle_break(&uap->port))
144 } else if (rsr & UART01x_RSR_PE)
145 uap->port.icount.parity++;
146 else if (rsr & UART01x_RSR_FE)
147 uap->port.icount.frame++;
148 if (rsr & UART01x_RSR_OE)
149 uap->port.icount.overrun++;
151 rsr &= uap->port.read_status_mask;
153 if (rsr & UART01x_RSR_BE)
155 else if (rsr & UART01x_RSR_PE)
157 else if (rsr & UART01x_RSR_FE)
161 if (uart_handle_sysrq_char(&uap->port, ch))
164 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
167 status = readb(uap->port.membase + UART01x_FR);
169 spin_unlock(&uap->port.lock);
170 tty_flip_buffer_push(tty);
171 spin_lock(&uap->port.lock);
174 static void pl010_tx_chars(struct uart_amba_port *uap)
176 struct circ_buf *xmit = &uap->port.state->xmit;
179 if (uap->port.x_char) {
180 writel(uap->port.x_char, uap->port.membase + UART01x_DR);
181 uap->port.icount.tx++;
182 uap->port.x_char = 0;
185 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
186 pl010_stop_tx(&uap->port);
190 count = uap->port.fifosize >> 1;
192 writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
193 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
194 uap->port.icount.tx++;
195 if (uart_circ_empty(xmit))
197 } while (--count > 0);
199 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
200 uart_write_wakeup(&uap->port);
202 if (uart_circ_empty(xmit))
203 pl010_stop_tx(&uap->port);
206 static void pl010_modem_status(struct uart_amba_port *uap)
208 unsigned int status, delta;
210 writel(0, uap->port.membase + UART010_ICR);
212 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
214 delta = status ^ uap->old_status;
215 uap->old_status = status;
220 if (delta & UART01x_FR_DCD)
221 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
223 if (delta & UART01x_FR_DSR)
224 uap->port.icount.dsr++;
226 if (delta & UART01x_FR_CTS)
227 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
229 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
232 static irqreturn_t pl010_int(int irq, void *dev_id)
234 struct uart_amba_port *uap = dev_id;
235 unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
238 spin_lock(&uap->port.lock);
240 status = readb(uap->port.membase + UART010_IIR);
243 if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
245 if (status & UART010_IIR_MIS)
246 pl010_modem_status(uap);
247 if (status & UART010_IIR_TIS)
250 if (pass_counter-- == 0)
253 status = readb(uap->port.membase + UART010_IIR);
254 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
259 spin_unlock(&uap->port.lock);
261 return IRQ_RETVAL(handled);
264 static unsigned int pl010_tx_empty(struct uart_port *port)
266 struct uart_amba_port *uap = (struct uart_amba_port *)port;
267 unsigned int status = readb(uap->port.membase + UART01x_FR);
268 return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
271 static unsigned int pl010_get_mctrl(struct uart_port *port)
273 struct uart_amba_port *uap = (struct uart_amba_port *)port;
274 unsigned int result = 0;
277 status = readb(uap->port.membase + UART01x_FR);
278 if (status & UART01x_FR_DCD)
280 if (status & UART01x_FR_DSR)
282 if (status & UART01x_FR_CTS)
288 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
290 struct uart_amba_port *uap = (struct uart_amba_port *)port;
293 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
296 static void pl010_break_ctl(struct uart_port *port, int break_state)
298 struct uart_amba_port *uap = (struct uart_amba_port *)port;
302 spin_lock_irqsave(&uap->port.lock, flags);
303 lcr_h = readb(uap->port.membase + UART010_LCRH);
304 if (break_state == -1)
305 lcr_h |= UART01x_LCRH_BRK;
307 lcr_h &= ~UART01x_LCRH_BRK;
308 writel(lcr_h, uap->port.membase + UART010_LCRH);
309 spin_unlock_irqrestore(&uap->port.lock, flags);
312 static int pl010_startup(struct uart_port *port)
314 struct uart_amba_port *uap = (struct uart_amba_port *)port;
318 * Try to enable the clock producer.
320 retval = clk_enable(uap->clk);
324 uap->port.uartclk = clk_get_rate(uap->clk);
329 retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
334 * initialise the old status of the modem signals
336 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
339 * Finally, enable interrupts
341 writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
342 uap->port.membase + UART010_CR);
347 clk_disable(uap->clk);
352 static void pl010_shutdown(struct uart_port *port)
354 struct uart_amba_port *uap = (struct uart_amba_port *)port;
359 free_irq(uap->port.irq, uap);
362 * disable all interrupts, disable the port
364 writel(0, uap->port.membase + UART010_CR);
366 /* disable break condition and fifos */
367 writel(readb(uap->port.membase + UART010_LCRH) &
368 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
369 uap->port.membase + UART010_LCRH);
372 * Shut down the clock producer
374 clk_disable(uap->clk);
378 pl010_set_termios(struct uart_port *port, struct ktermios *termios,
379 struct ktermios *old)
381 struct uart_amba_port *uap = (struct uart_amba_port *)port;
382 unsigned int lcr_h, old_cr;
384 unsigned int baud, quot;
387 * Ask the core to calculate the divisor for us.
389 baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
390 quot = uart_get_divisor(port, baud);
392 switch (termios->c_cflag & CSIZE) {
394 lcr_h = UART01x_LCRH_WLEN_5;
397 lcr_h = UART01x_LCRH_WLEN_6;
400 lcr_h = UART01x_LCRH_WLEN_7;
403 lcr_h = UART01x_LCRH_WLEN_8;
406 if (termios->c_cflag & CSTOPB)
407 lcr_h |= UART01x_LCRH_STP2;
408 if (termios->c_cflag & PARENB) {
409 lcr_h |= UART01x_LCRH_PEN;
410 if (!(termios->c_cflag & PARODD))
411 lcr_h |= UART01x_LCRH_EPS;
413 if (uap->port.fifosize > 1)
414 lcr_h |= UART01x_LCRH_FEN;
416 spin_lock_irqsave(&uap->port.lock, flags);
419 * Update the per-port timeout.
421 uart_update_timeout(port, termios->c_cflag, baud);
423 uap->port.read_status_mask = UART01x_RSR_OE;
424 if (termios->c_iflag & INPCK)
425 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
426 if (termios->c_iflag & (BRKINT | PARMRK))
427 uap->port.read_status_mask |= UART01x_RSR_BE;
430 * Characters to ignore
432 uap->port.ignore_status_mask = 0;
433 if (termios->c_iflag & IGNPAR)
434 uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
435 if (termios->c_iflag & IGNBRK) {
436 uap->port.ignore_status_mask |= UART01x_RSR_BE;
438 * If we're ignoring parity and break indicators,
439 * ignore overruns too (for real raw support).
441 if (termios->c_iflag & IGNPAR)
442 uap->port.ignore_status_mask |= UART01x_RSR_OE;
446 * Ignore all characters if CREAD is not set.
448 if ((termios->c_cflag & CREAD) == 0)
449 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
451 /* first, disable everything */
452 old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
454 if (UART_ENABLE_MS(port, termios->c_cflag))
455 old_cr |= UART010_CR_MSIE;
457 writel(0, uap->port.membase + UART010_CR);
461 writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
462 writel(quot & 0xff, uap->port.membase + UART010_LCRL);
465 * ----------v----------v----------v----------v-----
466 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
467 * ----------^----------^----------^----------^-----
469 writel(lcr_h, uap->port.membase + UART010_LCRH);
470 writel(old_cr, uap->port.membase + UART010_CR);
472 spin_unlock_irqrestore(&uap->port.lock, flags);
475 static void pl010_set_ldisc(struct uart_port *port)
477 int line = port->line;
479 if (line >= port->state->port.tty->driver->num)
482 if (port->state->port.tty->ldisc->ops->num == N_PPS) {
483 port->flags |= UPF_HARDPPS_CD;
484 pl010_enable_ms(port);
486 port->flags &= ~UPF_HARDPPS_CD;
489 static const char *pl010_type(struct uart_port *port)
491 return port->type == PORT_AMBA ? "AMBA" : NULL;
495 * Release the memory region(s) being used by 'port'
497 static void pl010_release_port(struct uart_port *port)
499 release_mem_region(port->mapbase, UART_PORT_SIZE);
503 * Request the memory region(s) being used by 'port'
505 static int pl010_request_port(struct uart_port *port)
507 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
508 != NULL ? 0 : -EBUSY;
512 * Configure/autoconfigure the port.
514 static void pl010_config_port(struct uart_port *port, int flags)
516 if (flags & UART_CONFIG_TYPE) {
517 port->type = PORT_AMBA;
518 pl010_request_port(port);
523 * verify the new serial_struct (for TIOCSSERIAL).
525 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
528 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
530 if (ser->irq < 0 || ser->irq >= nr_irqs)
532 if (ser->baud_base < 9600)
537 static struct uart_ops amba_pl010_pops = {
538 .tx_empty = pl010_tx_empty,
539 .set_mctrl = pl010_set_mctrl,
540 .get_mctrl = pl010_get_mctrl,
541 .stop_tx = pl010_stop_tx,
542 .start_tx = pl010_start_tx,
543 .stop_rx = pl010_stop_rx,
544 .enable_ms = pl010_enable_ms,
545 .break_ctl = pl010_break_ctl,
546 .startup = pl010_startup,
547 .shutdown = pl010_shutdown,
548 .set_termios = pl010_set_termios,
549 .set_ldisc = pl010_set_ldisc,
551 .release_port = pl010_release_port,
552 .request_port = pl010_request_port,
553 .config_port = pl010_config_port,
554 .verify_port = pl010_verify_port,
557 static struct uart_amba_port *amba_ports[UART_NR];
559 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
561 static void pl010_console_putchar(struct uart_port *port, int ch)
563 struct uart_amba_port *uap = (struct uart_amba_port *)port;
567 status = readb(uap->port.membase + UART01x_FR);
569 } while (!UART_TX_READY(status));
570 writel(ch, uap->port.membase + UART01x_DR);
574 pl010_console_write(struct console *co, const char *s, unsigned int count)
576 struct uart_amba_port *uap = amba_ports[co->index];
577 unsigned int status, old_cr;
579 clk_enable(uap->clk);
582 * First save the CR then disable the interrupts
584 old_cr = readb(uap->port.membase + UART010_CR);
585 writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
587 uart_console_write(&uap->port, s, count, pl010_console_putchar);
590 * Finally, wait for transmitter to become empty
591 * and restore the TCR
594 status = readb(uap->port.membase + UART01x_FR);
596 } while (status & UART01x_FR_BUSY);
597 writel(old_cr, uap->port.membase + UART010_CR);
599 clk_disable(uap->clk);
603 pl010_console_get_options(struct uart_amba_port *uap, int *baud,
604 int *parity, int *bits)
606 if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
607 unsigned int lcr_h, quot;
608 lcr_h = readb(uap->port.membase + UART010_LCRH);
611 if (lcr_h & UART01x_LCRH_PEN) {
612 if (lcr_h & UART01x_LCRH_EPS)
618 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
623 quot = readb(uap->port.membase + UART010_LCRL) |
624 readb(uap->port.membase + UART010_LCRM) << 8;
625 *baud = uap->port.uartclk / (16 * (quot + 1));
629 static int __init pl010_console_setup(struct console *co, char *options)
631 struct uart_amba_port *uap;
638 * Check whether an invalid uart number has been specified, and
639 * if so, search for the first available port that does have
642 if (co->index >= UART_NR)
644 uap = amba_ports[co->index];
648 uap->port.uartclk = clk_get_rate(uap->clk);
651 uart_parse_options(options, &baud, &parity, &bits, &flow);
653 pl010_console_get_options(uap, &baud, &parity, &bits);
655 return uart_set_options(&uap->port, co, baud, parity, bits, flow);
658 static struct uart_driver amba_reg;
659 static struct console amba_console = {
661 .write = pl010_console_write,
662 .device = uart_console_device,
663 .setup = pl010_console_setup,
664 .flags = CON_PRINTBUFFER,
669 #define AMBA_CONSOLE &amba_console
671 #define AMBA_CONSOLE NULL
674 static struct uart_driver amba_reg = {
675 .owner = THIS_MODULE,
676 .driver_name = "ttyAM",
678 .major = SERIAL_AMBA_MAJOR,
679 .minor = SERIAL_AMBA_MINOR,
681 .cons = AMBA_CONSOLE,
684 static int pl010_probe(struct amba_device *dev, struct amba_id *id)
686 struct uart_amba_port *uap;
690 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
691 if (amba_ports[i] == NULL)
694 if (i == ARRAY_SIZE(amba_ports)) {
699 uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
705 base = ioremap(dev->res.start, resource_size(&dev->res));
711 uap->clk = clk_get(&dev->dev, NULL);
712 if (IS_ERR(uap->clk)) {
713 ret = PTR_ERR(uap->clk);
717 uap->port.dev = &dev->dev;
718 uap->port.mapbase = dev->res.start;
719 uap->port.membase = base;
720 uap->port.iotype = UPIO_MEM;
721 uap->port.irq = dev->irq[0];
722 uap->port.fifosize = 16;
723 uap->port.ops = &amba_pl010_pops;
724 uap->port.flags = UPF_BOOT_AUTOCONF;
727 uap->data = dev->dev.platform_data;
731 amba_set_drvdata(dev, uap);
732 ret = uart_add_one_port(&amba_reg, &uap->port);
734 amba_set_drvdata(dev, NULL);
735 amba_ports[i] = NULL;
746 static int pl010_remove(struct amba_device *dev)
748 struct uart_amba_port *uap = amba_get_drvdata(dev);
751 amba_set_drvdata(dev, NULL);
753 uart_remove_one_port(&amba_reg, &uap->port);
755 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
756 if (amba_ports[i] == uap)
757 amba_ports[i] = NULL;
759 iounmap(uap->port.membase);
765 static int pl010_suspend(struct amba_device *dev, pm_message_t state)
767 struct uart_amba_port *uap = amba_get_drvdata(dev);
770 uart_suspend_port(&amba_reg, &uap->port);
775 static int pl010_resume(struct amba_device *dev)
777 struct uart_amba_port *uap = amba_get_drvdata(dev);
780 uart_resume_port(&amba_reg, &uap->port);
785 static struct amba_id pl010_ids[] = {
793 static struct amba_driver pl010_driver = {
795 .name = "uart-pl010",
797 .id_table = pl010_ids,
798 .probe = pl010_probe,
799 .remove = pl010_remove,
800 .suspend = pl010_suspend,
801 .resume = pl010_resume,
804 static int __init pl010_init(void)
808 printk(KERN_INFO "Serial: AMBA driver\n");
810 ret = uart_register_driver(&amba_reg);
812 ret = amba_driver_register(&pl010_driver);
814 uart_unregister_driver(&amba_reg);
819 static void __exit pl010_exit(void)
821 amba_driver_unregister(&pl010_driver);
822 uart_unregister_driver(&amba_reg);
825 module_init(pl010_init);
826 module_exit(pl010_exit);
828 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
829 MODULE_DESCRIPTION("ARM AMBA serial port driver");
830 MODULE_LICENSE("GPL");