drivers/sensor/bmm050.h

   1 /*
   2  * (C) Copyright 2013 Bosch Sensortec GmbH All Rights Reserved
   3  *
   4  * This software program is licensed subject to the GNU General Public License
   5  * (GPL).Version 2,June 1991, available at http://www.fsf.org/copyleft/gpl.html
   6  *
   7  * @date        Apr 28th, 2011
   8  * @version     v1.0
   9  * @brief       BMM050 Linux Driver API
  10  */
  11
  12
  13 #ifndef __BMM050_H__
  14 #define __BMM050_H__
  15
  16
  17 #define BMM050_U16 unsigned short
  18 #define BMM050_S16 signed short
  19 #define BMM050_S32 signed int
  20
  21
  22 #define BMM050_BUS_WR_RETURN_TYPE char
  23 #define BMM050_BUS_WR_PARAM_TYPES\
  24         unsigned char, unsigned char, unsigned char *, unsigned char
  25 #define BMM050_BUS_WR_PARAM_ORDER\
  26         (device_addr, register_addr, register_data, wr_len)
  27 #define BMM050_BUS_WRITE_FUNC(\
  28                 device_addr, register_addr, register_data, wr_len)\
  29         bus_write(device_addr, register_addr, register_data, wr_len)
  30
  31 #define BMM050_BUS_RD_RETURN_TYPE char
  32
  33 #define BMM050_BUS_RD_PARAM_TYPES\
  34         unsigned char, unsigned char, unsigned char *, unsigned char
  35
  36 #define BMM050_BUS_RD_PARAM_ORDER (device_addr, register_addr, register_data)
  37
  38 #define BMM050_BUS_READ_FUNC(device_addr, register_addr, register_data, rd_len)\
  39         bus_read(device_addr, register_addr, register_data, rd_len)
  40
  41
  42 #define BMM050_DELAY_RETURN_TYPE void
  43
  44 #define BMM050_DELAY_PARAM_TYPES unsigned int
  45
  46 #define BMM050_DELAY_FUNC(delay_in_msec)\
  47         delay_func(delay_in_msec)
  48
  49 #define BMM050_DELAY_POWEROFF_SUSPEND      1
  50 #define BMM050_DELAY_SUSPEND_SLEEP         2
  51 #define BMM050_DELAY_SLEEP_ACTIVE          1
  52 #define BMM050_DELAY_ACTIVE_SLEEP          1
  53 #define BMM050_DELAY_SLEEP_SUSPEND         1
  54 #define BMM050_DELAY_ACTIVE_SUSPEND        1
  55 #define BMM050_DELAY_SLEEP_POWEROFF        1
  56 #define BMM050_DELAY_ACTIVE_POWEROFF       1
  57 #define BMM050_DELAY_SETTLING_TIME         2
  58
  59
  60 #define BMM050_RETURN_FUNCTION_TYPE        char
  61 #define BMM050_I2C_ADDRESS                 0x12
  62
  63 /*General Info datas*/
  64 #define BMM050_SOFT_RESET7_ON              1
  65 #define BMM050_SOFT_RESET1_ON              1
  66 #define BMM050_SOFT_RESET7_OFF             0
  67 #define BMM050_SOFT_RESET1_OFF             0
  68 #define BMM050_DELAY_SOFTRESET             1
  69
  70 /* Fixed Data Registers */
  71 #define BMM050_CHIP_ID                     0x40
  72
  73 /* Data Registers */
  74 #define BMM050_DATAX_LSB                   0x42
  75 #define BMM050_DATAX_MSB                   0x43
  76 #define BMM050_DATAY_LSB                   0x44
  77 #define BMM050_DATAY_MSB                   0x45
  78 #define BMM050_DATAZ_LSB                   0x46
  79 #define BMM050_DATAZ_MSB                   0x47
  80 #define BMM050_R_LSB                       0x48
  81 #define BMM050_R_MSB                       0x49
  82
  83 /* Status Registers */
  84 #define BMM050_INT_STAT                    0x4A
  85
  86 /* Control Registers */
  87 #define BMM050_POWER_CNTL                  0x4B
  88 #define BMM050_CONTROL                     0x4C
  89 #define BMM050_INT_CNTL                    0x4D
  90 #define BMM050_SENS_CNTL                   0x4E
  91 #define BMM050_LOW_THRES                   0x4F
  92 #define BMM050_HIGH_THRES                  0x50
  93 #define BMM050_NO_REPETITIONS_XY           0x51
  94 #define BMM050_NO_REPETITIONS_Z            0x52
  95
  96 /* Trim Extended Registers */
  97 #define BMM050_DIG_X1                      0x5D
  98 #define BMM050_DIG_Y1                      0x5E
  99 #define BMM050_DIG_Z4_LSB                  0x62
 100 #define BMM050_DIG_Z4_MSB                  0x63
 101 #define BMM050_DIG_X2                      0x64
 102 #define BMM050_DIG_Y2                      0x65
 103 #define BMM050_DIG_Z2_LSB                  0x68
 104 #define BMM050_DIG_Z2_MSB                  0x69
 105 #define BMM050_DIG_Z1_LSB                  0x6A
 106 #define BMM050_DIG_Z1_MSB                  0x6B
 107 #define BMM050_DIG_XYZ1_LSB                0x6C
 108 #define BMM050_DIG_XYZ1_MSB                0x6D
 109 #define BMM050_DIG_Z3_LSB                  0x6E
 110 #define BMM050_DIG_Z3_MSB                  0x6F
 111 #define BMM050_DIG_XY2                     0x70
 112 #define BMM050_DIG_XY1                     0x71
 113
 114
 115 /* Data X LSB Regsiter */
 116 #define BMM050_DATAX_LSB_VALUEX__POS        3
 117 #define BMM050_DATAX_LSB_VALUEX__LEN        5
 118 #define BMM050_DATAX_LSB_VALUEX__MSK        0xF8
 119 #define BMM050_DATAX_LSB_VALUEX__REG        BMM050_DATAX_LSB
 120
 121 #define BMM050_DATAX_LSB_TESTX__POS         0
 122 #define BMM050_DATAX_LSB_TESTX__LEN         1
 123 #define BMM050_DATAX_LSB_TESTX__MSK         0x01
 124 #define BMM050_DATAX_LSB_TESTX__REG         BMM050_DATAX_LSB
 125
 126 /* Data Y LSB Regsiter */
 127 #define BMM050_DATAY_LSB_VALUEY__POS        3
 128 #define BMM050_DATAY_LSB_VALUEY__LEN        5
 129 #define BMM050_DATAY_LSB_VALUEY__MSK        0xF8
 130 #define BMM050_DATAY_LSB_VALUEY__REG        BMM050_DATAY_LSB
 131
 132 #define BMM050_DATAY_LSB_TESTY__POS         0
 133 #define BMM050_DATAY_LSB_TESTY__LEN         1
 134 #define BMM050_DATAY_LSB_TESTY__MSK         0x01
 135 #define BMM050_DATAY_LSB_TESTY__REG         BMM050_DATAY_LSB
 136
 137 /* Data Z LSB Regsiter */
 138 #define BMM050_DATAZ_LSB_VALUEZ__POS        1
 139 #define BMM050_DATAZ_LSB_VALUEZ__LEN        7
 140 #define BMM050_DATAZ_LSB_VALUEZ__MSK        0xFE
 141 #define BMM050_DATAZ_LSB_VALUEZ__REG        BMM050_DATAZ_LSB
 142
 143 #define BMM050_DATAZ_LSB_TESTZ__POS         0
 144 #define BMM050_DATAZ_LSB_TESTZ__LEN         1
 145 #define BMM050_DATAZ_LSB_TESTZ__MSK         0x01
 146 #define BMM050_DATAZ_LSB_TESTZ__REG         BMM050_DATAZ_LSB
 147
 148 /* Hall Resistance LSB Regsiter */
 149 #define BMM050_R_LSB_VALUE__POS             2
 150 #define BMM050_R_LSB_VALUE__LEN             6
 151 #define BMM050_R_LSB_VALUE__MSK             0xFC
 152 #define BMM050_R_LSB_VALUE__REG             BMM050_R_LSB
 153
 154 #define BMM050_DATA_RDYSTAT__POS            0
 155 #define BMM050_DATA_RDYSTAT__LEN            1
 156 #define BMM050_DATA_RDYSTAT__MSK            0x01
 157 #define BMM050_DATA_RDYSTAT__REG            BMM050_R_LSB
 158
 159 /* Interupt Status Register */
 160 #define BMM050_INT_STAT_DOR__POS            7
 161 #define BMM050_INT_STAT_DOR__LEN            1
 162 #define BMM050_INT_STAT_DOR__MSK            0x80
 163 #define BMM050_INT_STAT_DOR__REG            BMM050_INT_STAT
 164
 165 #define BMM050_INT_STAT_OVRFLOW__POS        6
 166 #define BMM050_INT_STAT_OVRFLOW__LEN        1
 167 #define BMM050_INT_STAT_OVRFLOW__MSK        0x40
 168 #define BMM050_INT_STAT_OVRFLOW__REG        BMM050_INT_STAT
 169
 170 #define BMM050_INT_STAT_HIGH_THZ__POS       5
 171 #define BMM050_INT_STAT_HIGH_THZ__LEN       1
 172 #define BMM050_INT_STAT_HIGH_THZ__MSK       0x20
 173 #define BMM050_INT_STAT_HIGH_THZ__REG       BMM050_INT_STAT
 174
 175 #define BMM050_INT_STAT_HIGH_THY__POS       4
 176 #define BMM050_INT_STAT_HIGH_THY__LEN       1
 177 #define BMM050_INT_STAT_HIGH_THY__MSK       0x10
 178 #define BMM050_INT_STAT_HIGH_THY__REG       BMM050_INT_STAT
 179
 180 #define BMM050_INT_STAT_HIGH_THX__POS       3
 181 #define BMM050_INT_STAT_HIGH_THX__LEN       1
 182 #define BMM050_INT_STAT_HIGH_THX__MSK       0x08
 183 #define BMM050_INT_STAT_HIGH_THX__REG       BMM050_INT_STAT
 184
 185 #define BMM050_INT_STAT_LOW_THZ__POS        2
 186 #define BMM050_INT_STAT_LOW_THZ__LEN        1
 187 #define BMM050_INT_STAT_LOW_THZ__MSK        0x04
 188 #define BMM050_INT_STAT_LOW_THZ__REG        BMM050_INT_STAT
 189
 190 #define BMM050_INT_STAT_LOW_THY__POS        1
 191 #define BMM050_INT_STAT_LOW_THY__LEN        1
 192 #define BMM050_INT_STAT_LOW_THY__MSK        0x02
 193 #define BMM050_INT_STAT_LOW_THY__REG        BMM050_INT_STAT
 194
 195 #define BMM050_INT_STAT_LOW_THX__POS        0
 196 #define BMM050_INT_STAT_LOW_THX__LEN        1
 197 #define BMM050_INT_STAT_LOW_THX__MSK        0x01
 198 #define BMM050_INT_STAT_LOW_THX__REG        BMM050_INT_STAT
 199
 200 /* Power Control Register */
 201 #define BMM050_POWER_CNTL_SRST7__POS       7
 202 #define BMM050_POWER_CNTL_SRST7__LEN       1
 203 #define BMM050_POWER_CNTL_SRST7__MSK       0x80
 204 #define BMM050_POWER_CNTL_SRST7__REG       BMM050_POWER_CNTL
 205
 206 #define BMM050_POWER_CNTL_SPI3_EN__POS     2
 207 #define BMM050_POWER_CNTL_SPI3_EN__LEN     1
 208 #define BMM050_POWER_CNTL_SPI3_EN__MSK     0x04
 209 #define BMM050_POWER_CNTL_SPI3_EN__REG     BMM050_POWER_CNTL
 210
 211 #define BMM050_POWER_CNTL_SRST1__POS       1
 212 #define BMM050_POWER_CNTL_SRST1__LEN       1
 213 #define BMM050_POWER_CNTL_SRST1__MSK       0x02
 214 #define BMM050_POWER_CNTL_SRST1__REG       BMM050_POWER_CNTL
 215
 216 #define BMM050_POWER_CNTL_PCB__POS         0
 217 #define BMM050_POWER_CNTL_PCB__LEN         1
 218 #define BMM050_POWER_CNTL_PCB__MSK         0x01
 219 #define BMM050_POWER_CNTL_PCB__REG         BMM050_POWER_CNTL
 220
 221 /* Control Register */
 222 #define BMM050_CNTL_ADV_ST__POS            6
 223 #define BMM050_CNTL_ADV_ST__LEN            2
 224 #define BMM050_CNTL_ADV_ST__MSK            0xC0
 225 #define BMM050_CNTL_ADV_ST__REG            BMM050_CONTROL
 226
 227 #define BMM050_CNTL_DR__POS                3
 228 #define BMM050_CNTL_DR__LEN                3
 229 #define BMM050_CNTL_DR__MSK                0x38
 230 #define BMM050_CNTL_DR__REG                BMM050_CONTROL
 231
 232 #define BMM050_CNTL_OPMODE__POS            1
 233 #define BMM050_CNTL_OPMODE__LEN            2
 234 #define BMM050_CNTL_OPMODE__MSK            0x06
 235 #define BMM050_CNTL_OPMODE__REG            BMM050_CONTROL
 236
 237 #define BMM050_CNTL_S_TEST__POS            0
 238 #define BMM050_CNTL_S_TEST__LEN            1
 239 #define BMM050_CNTL_S_TEST__MSK            0x01
 240 #define BMM050_CNTL_S_TEST__REG            BMM050_CONTROL
 241
 242 /* Interupt Control Register */
 243 #define BMM050_INT_CNTL_DOR_EN__POS            7
 244 #define BMM050_INT_CNTL_DOR_EN__LEN            1
 245 #define BMM050_INT_CNTL_DOR_EN__MSK            0x80
 246 #define BMM050_INT_CNTL_DOR_EN__REG            BMM050_INT_CNTL
 247
 248 #define BMM050_INT_CNTL_OVRFLOW_EN__POS        6
 249 #define BMM050_INT_CNTL_OVRFLOW_EN__LEN        1
 250 #define BMM050_INT_CNTL_OVRFLOW_EN__MSK        0x40
 251 #define BMM050_INT_CNTL_OVRFLOW_EN__REG        BMM050_INT_CNTL
 252
 253 #define BMM050_INT_CNTL_HIGH_THZ_EN__POS       5
 254 #define BMM050_INT_CNTL_HIGH_THZ_EN__LEN       1
 255 #define BMM050_INT_CNTL_HIGH_THZ_EN__MSK       0x20
 256 #define BMM050_INT_CNTL_HIGH_THZ_EN__REG       BMM050_INT_CNTL
 257
 258 #define BMM050_INT_CNTL_HIGH_THY_EN__POS       4
 259 #define BMM050_INT_CNTL_HIGH_THY_EN__LEN       1
 260 #define BMM050_INT_CNTL_HIGH_THY_EN__MSK       0x10
 261 #define BMM050_INT_CNTL_HIGH_THY_EN__REG       BMM050_INT_CNTL
 262
 263 #define BMM050_INT_CNTL_HIGH_THX_EN__POS       3
 264 #define BMM050_INT_CNTL_HIGH_THX_EN__LEN       1
 265 #define BMM050_INT_CNTL_HIGH_THX_EN__MSK       0x08
 266 #define BMM050_INT_CNTL_HIGH_THX_EN__REG       BMM050_INT_CNTL
 267
 268 #define BMM050_INT_CNTL_LOW_THZ_EN__POS        2
 269 #define BMM050_INT_CNTL_LOW_THZ_EN__LEN        1
 270 #define BMM050_INT_CNTL_LOW_THZ_EN__MSK        0x04
 271 #define BMM050_INT_CNTL_LOW_THZ_EN__REG        BMM050_INT_CNTL
 272
 273 #define BMM050_INT_CNTL_LOW_THY_EN__POS        1
 274 #define BMM050_INT_CNTL_LOW_THY_EN__LEN        1
 275 #define BMM050_INT_CNTL_LOW_THY_EN__MSK        0x02
 276 #define BMM050_INT_CNTL_LOW_THY_EN__REG        BMM050_INT_CNTL
 277
 278 #define BMM050_INT_CNTL_LOW_THX_EN__POS        0
 279 #define BMM050_INT_CNTL_LOW_THX_EN__LEN        1
 280 #define BMM050_INT_CNTL_LOW_THX_EN__MSK        0x01
 281 #define BMM050_INT_CNTL_LOW_THX_EN__REG        BMM050_INT_CNTL
 282
 283 /* Sensor Control Register */
 284 #define BMM050_SENS_CNTL_DRDY_EN__POS          7
 285 #define BMM050_SENS_CNTL_DRDY_EN__LEN          1
 286 #define BMM050_SENS_CNTL_DRDY_EN__MSK          0x80
 287 #define BMM050_SENS_CNTL_DRDY_EN__REG          BMM050_SENS_CNTL
 288
 289 #define BMM050_SENS_CNTL_IE__POS               6
 290 #define BMM050_SENS_CNTL_IE__LEN               1
 291 #define BMM050_SENS_CNTL_IE__MSK               0x40
 292 #define BMM050_SENS_CNTL_IE__REG               BMM050_SENS_CNTL
 293
 294 #define BMM050_SENS_CNTL_CHANNELZ__POS         5
 295 #define BMM050_SENS_CNTL_CHANNELZ__LEN         1
 296 #define BMM050_SENS_CNTL_CHANNELZ__MSK         0x20
 297 #define BMM050_SENS_CNTL_CHANNELZ__REG         BMM050_SENS_CNTL
 298
 299 #define BMM050_SENS_CNTL_CHANNELY__POS         4
 300 #define BMM050_SENS_CNTL_CHANNELY__LEN         1
 301 #define BMM050_SENS_CNTL_CHANNELY__MSK         0x10
 302 #define BMM050_SENS_CNTL_CHANNELY__REG         BMM050_SENS_CNTL
 303
 304 #define BMM050_SENS_CNTL_CHANNELX__POS         3
 305 #define BMM050_SENS_CNTL_CHANNELX__LEN         1
 306 #define BMM050_SENS_CNTL_CHANNELX__MSK         0x08
 307 #define BMM050_SENS_CNTL_CHANNELX__REG         BMM050_SENS_CNTL
 308
 309 #define BMM050_SENS_CNTL_DR_POLARITY__POS      2
 310 #define BMM050_SENS_CNTL_DR_POLARITY__LEN      1
 311 #define BMM050_SENS_CNTL_DR_POLARITY__MSK      0x04
 312 #define BMM050_SENS_CNTL_DR_POLARITY__REG      BMM050_SENS_CNTL
 313
 314 #define BMM050_SENS_CNTL_INTERRUPT_LATCH__POS            1
 315 #define BMM050_SENS_CNTL_INTERRUPT_LATCH__LEN            1
 316 #define BMM050_SENS_CNTL_INTERRUPT_LATCH__MSK            0x02
 317 #define BMM050_SENS_CNTL_INTERRUPT_LATCH__REG            BMM050_SENS_CNTL
 318
 319 #define BMM050_SENS_CNTL_INTERRUPT_POLARITY__POS         0
 320 #define BMM050_SENS_CNTL_INTERRUPT_POLARITY__LEN         1
 321 #define BMM050_SENS_CNTL_INTERRUPT_POLARITY__MSK         0x01
 322 #define BMM050_SENS_CNTL_INTERRUPT_POLARITY__REG         BMM050_SENS_CNTL
 323
 324 /* Register 6D */
 325 #define BMM050_DIG_XYZ1_MSB__POS         0
 326 #define BMM050_DIG_XYZ1_MSB__LEN         7
 327 #define BMM050_DIG_XYZ1_MSB__MSK         0x7F
 328 #define BMM050_DIG_XYZ1_MSB__REG         BMM050_DIG_XYZ1_MSB
 329
 330
 331 #define BMM050_X_AXIS               0
 332 #define BMM050_Y_AXIS               1
 333 #define BMM050_Z_AXIS               2
 334 #define BMM050_RESISTANCE           3
 335 #define BMM050_X                    1
 336 #define BMM050_Y                    2
 337 #define BMM050_Z                    4
 338 #define BMM050_XYZ                  7
 339
 340 /* Constants */
 341 #define BMM050_NULL                             0
 342 #define BMM050_DISABLE                          0
 343 #define BMM050_ENABLE                           1
 344 #define BMM050_CHANNEL_DISABLE                  1
 345 #define BMM050_CHANNEL_ENABLE                   0
 346 #define BMM050_INTPIN_LATCH_ENABLE              1
 347 #define BMM050_INTPIN_LATCH_DISABLE             0
 348 #define BMM050_OFF                              0
 349 #define BMM050_ON                               1
 350
 351 #define BMM050_NORMAL_MODE                      0x00
 352 #define BMM050_FORCED_MODE                      0x01
 353 #define BMM050_SUSPEND_MODE                     0x02
 354 #define BMM050_SLEEP_MODE                       0x03
 355
 356 #define BMM050_ADVANCED_SELFTEST_OFF            0
 357 #define BMM050_ADVANCED_SELFTEST_NEGATIVE       2
 358 #define BMM050_ADVANCED_SELFTEST_POSITIVE       3
 359
 360 #define BMM050_NEGATIVE_SATURATION_Z            -32767
 361 #define BMM050_POSITIVE_SATURATION_Z            32767
 362
 363 #define BMM050_SPI_RD_MASK                      0x80
 364 #define BMM050_READ_SET                         0x01
 365
 366 #define E_BMM050_NULL_PTR                       ((char)-127)
 367 #define E_BMM050_COMM_RES                       ((char)-1)
 368 #define E_BMM050_OUT_OF_RANGE                   ((char)-2)
 369 #define E_BMM050_UNDEFINED_MODE                 0
 370
 371 #define BMM050_WR_FUNC_PTR\
 372         char (*bus_write)(unsigned char, unsigned char,\
 373                         unsigned char *, unsigned char)
 374
 375 #define BMM050_RD_FUNC_PTR\
 376         char (*bus_read)(unsigned char, unsigned char,\
 377                         unsigned char *, unsigned char)
 378 #define BMM050_MDELAY_DATA_TYPE unsigned int
 379
 380 /*Shifting Constants*/
 381 #define SHIFT_RIGHT_1_POSITION                  1
 382 #define SHIFT_RIGHT_2_POSITION                  2
 383 #define SHIFT_RIGHT_3_POSITION                  3
 384 #define SHIFT_RIGHT_4_POSITION                  4
 385 #define SHIFT_RIGHT_5_POSITION                  5
 386 #define SHIFT_RIGHT_6_POSITION                  6
 387 #define SHIFT_RIGHT_7_POSITION                  7
 388 #define SHIFT_RIGHT_8_POSITION                  8
 389
 390 #define SHIFT_LEFT_1_POSITION                   1
 391 #define SHIFT_LEFT_2_POSITION                   2
 392 #define SHIFT_LEFT_3_POSITION                   3
 393 #define SHIFT_LEFT_4_POSITION                   4
 394 #define SHIFT_LEFT_5_POSITION                   5
 395 #define SHIFT_LEFT_6_POSITION                   6
 396 #define SHIFT_LEFT_7_POSITION                   7
 397 #define SHIFT_LEFT_8_POSITION                   8
 398
 399 /* Conversion factors*/
 400 #define BMM050_CONVFACTOR_LSB_UT                6
 401
 402 /* get bit slice  */
 403 #define BMM050_GET_BITSLICE(regvar, bitname)\
 404         ((regvar & bitname##__MSK) >> bitname##__POS)
 405
 406 /* Set bit slice */
 407 #define BMM050_SET_BITSLICE(regvar, bitname, val)\
 408         ((regvar & ~bitname##__MSK) | ((val<<bitname##__POS)&bitname##__MSK))
 409
 410 /* compensated output value returned if sensor had overflow */
 411 #define BMM050_OVERFLOW_OUTPUT       -32768
 412 #define BMM050_OVERFLOW_OUTPUT_S32   ((BMM050_S32)(-2147483647-1))
 413 #define BMM050_OVERFLOW_OUTPUT_FLOAT 0.0f
 414 #define BMM050_FLIP_OVERFLOW_ADCVAL  -4096
 415 #define BMM050_HALL_OVERFLOW_ADCVAL  -16384
 416
 417
 418 #define BMM050_PRESETMODE_LOWPOWER                  1
 419 #define BMM050_PRESETMODE_REGULAR                   2
 420 #define BMM050_PRESETMODE_HIGHACCURACY              3
 421 #define BMM050_PRESETMODE_ENHANCED                  4
 422
 423 /* PRESET MODES - DATA RATES */
 424 #define BMM050_LOWPOWER_DR                       BMM050_DR_10HZ
 425 #define BMM050_REGULAR_DR                        BMM050_DR_10HZ
 426 #define BMM050_HIGHACCURACY_DR                   BMM050_DR_20HZ
 427 #define BMM050_ENHANCED_DR                       BMM050_DR_10HZ
 428
 429 /* PRESET MODES - REPETITIONS-XY RATES */
 430 #define BMM050_LOWPOWER_REPXY                     1
 431 #define BMM050_REGULAR_REPXY                      4
 432 #define BMM050_HIGHACCURACY_REPXY                23
 433 #define BMM050_ENHANCED_REPXY                     7
 434
 435 /* PRESET MODES - REPETITIONS-Z RATES */
 436 #define BMM050_LOWPOWER_REPZ                      2
 437 #define BMM050_REGULAR_REPZ                      15
 438 #define BMM050_HIGHACCURACY_REPZ                 82
 439 #define BMM050_ENHANCED_REPZ                     26
 440
 441 /* Data Rates */
 442
 443 #define BMM050_DR_10HZ                     0
 444 #define BMM050_DR_02HZ                     1
 445 #define BMM050_DR_06HZ                     2
 446 #define BMM050_DR_08HZ                     3
 447 #define BMM050_DR_15HZ                     4
 448 #define BMM050_DR_20HZ                     5
 449 #define BMM050_DR_25HZ                     6
 450 #define BMM050_DR_30HZ                     7
 451
 452 /*user defined Structures*/
 453 struct bmm050_mdata {
 454         BMM050_S16 datax;
 455         BMM050_S16 datay;
 456         BMM050_S16 dataz;
 457         BMM050_U16 resistance;
 458 };
 459 struct bmm050_mdata_s32 {
 460         BMM050_S32 datax;
 461         BMM050_S32 datay;
 462         BMM050_S32 dataz;
 463         BMM050_U16 resistance;
 464         BMM050_U16 drdy;
 465 };
 466 struct bmm050_mdata_float {
 467         float datax;
 468         float datay;
 469         float  dataz;
 470         BMM050_U16 resistance;
 471 };
 472
 473 struct bmm050 {
 474         unsigned char company_id;
 475         unsigned char dev_addr;
 476
 477         BMM050_WR_FUNC_PTR;
 478         BMM050_RD_FUNC_PTR;
 479         void(*delay_msec)(BMM050_MDELAY_DATA_TYPE);
 480
 481         signed char dig_x1;
 482         signed char dig_y1;
 483
 484         signed char dig_x2;
 485         signed char dig_y2;
 486
 487         BMM050_U16 dig_z1;
 488         BMM050_S16 dig_z2;
 489         BMM050_S16 dig_z3;
 490         BMM050_S16 dig_z4;
 491
 492         unsigned char dig_xy1;
 493         signed char dig_xy2;
 494
 495         BMM050_U16 dig_xyz1;
 496 };
 497
 498
 499 BMM050_RETURN_FUNCTION_TYPE bmm050_init(struct bmm050 *p_bmm050);
 500 BMM050_RETURN_FUNCTION_TYPE bmm050_read_mdataXYZ(
 501                 struct bmm050_mdata *mdata);
 502 BMM050_RETURN_FUNCTION_TYPE bmm050_read_mdataXYZ_s32(
 503                 struct bmm050_mdata_s32 *mdata);
 504 #ifdef ENABLE_FLOAT
 505 BMM050_RETURN_FUNCTION_TYPE bmm050_read_mdataXYZ_float(
 506                 struct bmm050_mdata_float *mdata);
 507 #endif
 508 BMM050_RETURN_FUNCTION_TYPE bmm050_read_register(
 509                 unsigned char addr, unsigned char *data, unsigned char len);
 510 BMM050_RETURN_FUNCTION_TYPE bmm050_write_register(
 511                 unsigned char addr, unsigned char *data, unsigned char len);
 512 BMM050_RETURN_FUNCTION_TYPE bmm050_get_self_test_XYZ(
 513                 unsigned char *self_testxyz);
 514 BMM050_S16 bmm050_compensate_X(
 515                 BMM050_S16 mdata_x, BMM050_U16 data_R);
 516 BMM050_S32 bmm050_compensate_X_s32(
 517                 BMM050_S16 mdata_x,  BMM050_U16 data_R);
 518 #ifdef ENABLE_FLOAT
 519 float bmm050_compensate_X_float(
 520                 BMM050_S16 mdata_x,  BMM050_U16 data_R);
 521 #endif
 522 BMM050_S16 bmm050_compensate_Y(
 523                 BMM050_S16 mdata_y, BMM050_U16 data_R);
 524 BMM050_S32 bmm050_compensate_Y_s32(
 525                 BMM050_S16 mdata_y,  BMM050_U16 data_R);
 526 #ifdef ENABLE_FLOAT
 527 float bmm050_compensate_Y_float(
 528                 BMM050_S16 mdata_y,  BMM050_U16 data_R);
 529 #endif
 530 BMM050_S16 bmm050_compensate_Z(
 531                 BMM050_S16 mdata_z,  BMM050_U16 data_R);
 532 BMM050_S32 bmm050_compensate_Z_s32(
 533                 BMM050_S16 mdata_z,  BMM050_U16 data_R);
 534 #ifdef ENABLE_FLOAT
 535 float bmm050_compensate_Z_float(
 536                 BMM050_S16 mdata_z,  BMM050_U16 data_R);
 537 #endif
 538 BMM050_RETURN_FUNCTION_TYPE bmm050_get_raw_xyz(
 539                 struct bmm050_mdata *mdata);
 540 BMM050_RETURN_FUNCTION_TYPE bmm050_init_trim_registers(void);
 541 BMM050_RETURN_FUNCTION_TYPE bmm050_set_spi3(
 542                 unsigned char value);
 543 BMM050_RETURN_FUNCTION_TYPE bmm050_get_powermode(
 544                 unsigned char *mode);
 545 BMM050_RETURN_FUNCTION_TYPE bmm050_set_powermode(
 546                 unsigned char mode);
 547 BMM050_RETURN_FUNCTION_TYPE bmm050_set_adv_selftest(
 548                 unsigned char adv_selftest);
 549 BMM050_RETURN_FUNCTION_TYPE bmm050_get_adv_selftest(
 550                 unsigned char *adv_selftest);
 551 BMM050_RETURN_FUNCTION_TYPE bmm050_set_datarate(
 552                 unsigned char data_rate);
 553 BMM050_RETURN_FUNCTION_TYPE bmm050_get_datarate(
 554                 unsigned char *data_rate);
 555 BMM050_RETURN_FUNCTION_TYPE bmm050_set_functional_state(
 556                 unsigned char functional_state);
 557 BMM050_RETURN_FUNCTION_TYPE bmm050_get_functional_state(
 558                 unsigned char *functional_state);
 559 BMM050_RETURN_FUNCTION_TYPE bmm050_set_selftest(
 560                 unsigned char selftest);
 561 BMM050_RETURN_FUNCTION_TYPE bmm050_get_selftest(
 562                 unsigned char *selftest);
 563 BMM050_RETURN_FUNCTION_TYPE bmm050_perform_advanced_selftest(
 564                 BMM050_S16 *diff_z);
 565 BMM050_RETURN_FUNCTION_TYPE bmm050_get_repetitions_XY(
 566                 unsigned char *no_repetitions_xy);
 567 BMM050_RETURN_FUNCTION_TYPE bmm050_set_repetitions_XY(
 568                 unsigned char no_repetitions_xy);
 569 BMM050_RETURN_FUNCTION_TYPE bmm050_get_repetitions_Z(
 570                 unsigned char *no_repetitions_z);
 571 BMM050_RETURN_FUNCTION_TYPE bmm050_set_repetitions_Z(
 572                 unsigned char no_repetitions_z);
 573 BMM050_RETURN_FUNCTION_TYPE bmm050_get_presetmode(unsigned char *mode);
 574 BMM050_RETURN_FUNCTION_TYPE bmm050_set_presetmode(unsigned char mode);
 575 BMM050_RETURN_FUNCTION_TYPE bmm050_set_control_measurement_x(
 576                 unsigned char enable_disable);
 577 BMM050_RETURN_FUNCTION_TYPE bmm050_set_control_measurement_y(
 578                 unsigned char enable_disable);
 579 BMM050_RETURN_FUNCTION_TYPE bmm050_soft_reset(void);
 580 #endif