drivers/scsi/ufs/ufshcd.c

   1 /*
   2  * Universal Flash Storage Host controller driver Core
   3  *
   4  * This code is based on drivers/scsi/ufs/ufshcd.c
   5  * Copyright (C) 2011-2013 Samsung India Software Operations
   6  * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
   7  *
   8  * Authors:
   9  *      Santosh Yaraganavi <santosh.sy@samsung.com>
  10  *      Vinayak Holikatti <h.vinayak@samsung.com>
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  * See the COPYING file in the top-level directory or visit
  17  * <http://www.gnu.org/licenses/gpl-2.0.html>
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * This program is provided "AS IS" and "WITH ALL FAULTS" and
  25  * without warranty of any kind. You are solely responsible for
  26  * determining the appropriateness of using and distributing
  27  * the program and assume all risks associated with your exercise
  28  * of rights with respect to the program, including but not limited
  29  * to infringement of third party rights, the risks and costs of
  30  * program errors, damage to or loss of data, programs or equipment,
  31  * and unavailability or interruption of operations. Under no
  32  * circumstances will the contributor of this Program be liable for
  33  * any damages of any kind arising from your use or distribution of
  34  * this program.
  35  *
  36  * The Linux Foundation chooses to take subject only to the GPLv2
  37  * license terms, and distributes only under these terms.
  38  */
  39
  40 #include <linux/async.h>
  41 #include <linux/devfreq.h>
  42 #include <linux/nls.h>
  43 #include <linux/of.h>
  44 #include <linux/blkdev.h>
  45 #include "ufshcd.h"
  46 #include "ufs_quirks.h"
  47 #include "unipro.h"
  48
  49 #define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
  50                                  UTP_TASK_REQ_COMPL |\
  51                                  UFSHCD_ERROR_MASK)
  52 /* UIC command timeout, unit: ms */
  53 #define UIC_CMD_TIMEOUT 500
  54
  55 /* NOP OUT retries waiting for NOP IN response */
  56 #define NOP_OUT_RETRIES    10
  57 /* Timeout after 30 msecs if NOP OUT hangs without response */
  58 #define NOP_OUT_TIMEOUT    30 /* msecs */
  59
  60 /* Query request retries */
  61 #define QUERY_REQ_RETRIES 10
  62 /* Query request timeout */
  63 #define QUERY_REQ_TIMEOUT 30 /* msec */
  64 /*
  65  * Query request timeout for fDeviceInit flag
  66  * fDeviceInit query response time for some devices is too large that default
  67  * QUERY_REQ_TIMEOUT may not be enough for such devices.
  68  */
  69 #define QUERY_FDEVICEINIT_REQ_TIMEOUT 600 /* msec */
  70
  71 /* Task management command timeout */
  72 #define TM_CMD_TIMEOUT  100 /* msecs */
  73
  74 /* maximum number of retries for a general UIC command  */
  75 #define UFS_UIC_COMMAND_RETRIES 3
  76
  77 /* maximum number of link-startup retries */
  78 #define DME_LINKSTARTUP_RETRIES 3
  79
  80 /* Maximum retries for Hibern8 enter */
  81 #define UIC_HIBERN8_ENTER_RETRIES 3
  82
  83 /* maximum number of reset retries before giving up */
  84 #define MAX_HOST_RESET_RETRIES 5
  85
  86 /* Expose the flag value from utp_upiu_query.value */
  87 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  88
  89 /* Interrupt aggregation default timeout, unit: 40us */
  90 #define INT_AGGR_DEF_TO 0x02
  91
  92 #define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
  93         ({                                                              \
  94                 int _ret;                                               \
  95                 if (_on)                                                \
  96                         _ret = ufshcd_enable_vreg(_dev, _vreg);         \
  97                 else                                                    \
  98                         _ret = ufshcd_disable_vreg(_dev, _vreg);        \
  99                 _ret;                                                   \
 100         })
 101
 102 enum {
 103         UFSHCD_MAX_CHANNEL      = 0,
 104         UFSHCD_MAX_ID           = 1,
 105         UFSHCD_CMD_PER_LUN      = 32,
 106         UFSHCD_CAN_QUEUE        = 32,
 107 };
 108
 109 /* UFSHCD states */
 110 enum {
 111         UFSHCD_STATE_RESET,
 112         UFSHCD_STATE_ERROR,
 113         UFSHCD_STATE_OPERATIONAL,
 114         UFSHCD_STATE_EH_SCHEDULED,
 115 };
 116
 117 /* UFSHCD error handling flags */
 118 enum {
 119         UFSHCD_EH_IN_PROGRESS = (1 << 0),
 120 };
 121
 122 /* UFSHCD UIC layer error flags */
 123 enum {
 124         UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
 125         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
 126         UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
 127         UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
 128         UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
 129         UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
 130 };
 131
 132 /* Interrupt configuration options */
 133 enum {
 134         UFSHCD_INT_DISABLE,
 135         UFSHCD_INT_ENABLE,
 136         UFSHCD_INT_CLEAR,
 137 };
 138
 139 #define ufshcd_set_eh_in_progress(h) \
 140         (h->eh_flags |= UFSHCD_EH_IN_PROGRESS)
 141 #define ufshcd_eh_in_progress(h) \
 142         (h->eh_flags & UFSHCD_EH_IN_PROGRESS)
 143 #define ufshcd_clear_eh_in_progress(h) \
 144         (h->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
 145
 146 #define ufshcd_set_ufs_dev_active(h) \
 147         ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
 148 #define ufshcd_set_ufs_dev_sleep(h) \
 149         ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
 150 #define ufshcd_set_ufs_dev_poweroff(h) \
 151         ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
 152 #define ufshcd_is_ufs_dev_active(h) \
 153         ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
 154 #define ufshcd_is_ufs_dev_sleep(h) \
 155         ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
 156 #define ufshcd_is_ufs_dev_poweroff(h) \
 157         ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
 158
 159 static struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
 160         {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 161         {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 162         {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 163         {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 164         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 165         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
 166 };
 167
 168 static inline enum ufs_dev_pwr_mode
 169 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
 170 {
 171         return ufs_pm_lvl_states[lvl].dev_state;
 172 }
 173
 174 static inline enum uic_link_state
 175 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
 176 {
 177         return ufs_pm_lvl_states[lvl].link_state;
 178 }
 179
 180 static struct ufs_dev_fix ufs_fixups[] = {
 181         /* UFS cards deviations table */
 182         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 183                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 184         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
 185         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 186                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
 187         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 188                 UFS_DEVICE_NO_FASTAUTO),
 189         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 190                 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
 191         UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
 192                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 193         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
 194                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 195         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
 196                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 197         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
 198         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
 199                 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
 200
 201         END_FIX
 202 };
 203
 204 static void ufshcd_tmc_handler(struct ufs_hba *hba);
 205 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
 206 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
 207 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
 208 static void ufshcd_hba_exit(struct ufs_hba *hba);
 209 static int ufshcd_probe_hba(struct ufs_hba *hba);
 210 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
 211                                  bool skip_ref_clk);
 212 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
 213 static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
 214 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
 215 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
 216 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
 217 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
 218 static irqreturn_t ufshcd_intr(int irq, void *__hba);
 219 static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
 220                 struct ufs_pa_layer_attr *desired_pwr_mode);
 221 static int ufshcd_change_power_mode(struct ufs_hba *hba,
 222                              struct ufs_pa_layer_attr *pwr_mode);
 223 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
 224 {
 225         return tag >= 0 && tag < hba->nutrs;
 226 }
 227
 228 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
 229 {
 230         int ret = 0;
 231
 232         if (!hba->is_irq_enabled) {
 233                 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
 234                                 hba);
 235                 if (ret)
 236                         dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
 237                                 __func__, ret);
 238                 hba->is_irq_enabled = true;
 239         }
 240
 241         return ret;
 242 }
 243
 244 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
 245 {
 246         if (hba->is_irq_enabled) {
 247                 free_irq(hba->irq, hba);
 248                 hba->is_irq_enabled = false;
 249         }
 250 }
 251
 252 /* replace non-printable or non-ASCII characters with spaces */
 253 static inline void ufshcd_remove_non_printable(char *val)
 254 {
 255         if (!val)
 256                 return;
 257
 258         if (*val < 0x20 || *val > 0x7e)
 259                 *val = ' ';
 260 }
 261
 262 /*
 263  * ufshcd_wait_for_register - wait for register value to change
 264  * @hba - per-adapter interface
 265  * @reg - mmio register offset
 266  * @mask - mask to apply to read register value
 267  * @val - wait condition
 268  * @interval_us - polling interval in microsecs
 269  * @timeout_ms - timeout in millisecs
 270  * @can_sleep - perform sleep or just spin
 271  *
 272  * Returns -ETIMEDOUT on error, zero on success
 273  */
 274 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
 275                                 u32 val, unsigned long interval_us,
 276                                 unsigned long timeout_ms, bool can_sleep)
 277 {
 278         int err = 0;
 279         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
 280
 281         /* ignore bits that we don't intend to wait on */
 282         val = val & mask;
 283
 284         while ((ufshcd_readl(hba, reg) & mask) != val) {
 285                 if (can_sleep)
 286                         usleep_range(interval_us, interval_us + 50);
 287                 else
 288                         udelay(interval_us);
 289                 if (time_after(jiffies, timeout)) {
 290                         if ((ufshcd_readl(hba, reg) & mask) != val)
 291                                 err = -ETIMEDOUT;
 292                         break;
 293                 }
 294         }
 295
 296         return err;
 297 }
 298
 299 /**
 300  * ufshcd_get_intr_mask - Get the interrupt bit mask
 301  * @hba - Pointer to adapter instance
 302  *
 303  * Returns interrupt bit mask per version
 304  */
 305 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
 306 {
 307         if (hba->ufs_version == UFSHCI_VERSION_10)
 308                 return INTERRUPT_MASK_ALL_VER_10;
 309         else
 310                 return INTERRUPT_MASK_ALL_VER_11;
 311 }
 312
 313 /**
 314  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
 315  * @hba - Pointer to adapter instance
 316  *
 317  * Returns UFSHCI version supported by the controller
 318  */
 319 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
 320 {
 321         if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
 322                 return ufshcd_vops_get_ufs_hci_version(hba);
 323
 324         return ufshcd_readl(hba, REG_UFS_VERSION);
 325 }
 326
 327 /**
 328  * ufshcd_is_device_present - Check if any device connected to
 329  *                            the host controller
 330  * @hba: pointer to adapter instance
 331  *
 332  * Returns 1 if device present, 0 if no device detected
 333  */
 334 static inline int ufshcd_is_device_present(struct ufs_hba *hba)
 335 {
 336         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
 337                                                 DEVICE_PRESENT) ? 1 : 0;
 338 }
 339
 340 /**
 341  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
 342  * @lrb: pointer to local command reference block
 343  *
 344  * This function is used to get the OCS field from UTRD
 345  * Returns the OCS field in the UTRD
 346  */
 347 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
 348 {
 349         return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
 350 }
 351
 352 /**
 353  * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
 354  * @task_req_descp: pointer to utp_task_req_desc structure
 355  *
 356  * This function is used to get the OCS field from UTMRD
 357  * Returns the OCS field in the UTMRD
 358  */
 359 static inline int
 360 ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
 361 {
 362         return le32_to_cpu(task_req_descp->header.dword_2) & MASK_OCS;
 363 }
 364
 365 /**
 366  * ufshcd_get_tm_free_slot - get a free slot for task management request
 367  * @hba: per adapter instance
 368  * @free_slot: pointer to variable with available slot value
 369  *
 370  * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
 371  * Returns 0 if free slot is not available, else return 1 with tag value
 372  * in @free_slot.
 373  */
 374 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
 375 {
 376         int tag;
 377         bool ret = false;
 378
 379         if (!free_slot)
 380                 goto out;
 381
 382         do {
 383                 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
 384                 if (tag >= hba->nutmrs)
 385                         goto out;
 386         } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
 387
 388         *free_slot = tag;
 389         ret = true;
 390 out:
 391         return ret;
 392 }
 393
 394 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
 395 {
 396         clear_bit_unlock(slot, &hba->tm_slots_in_use);
 397 }
 398
 399 /**
 400  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 401  * @hba: per adapter instance
 402  * @pos: position of the bit to be cleared
 403  */
 404 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
 405 {
 406         ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 407 }
 408
 409 /**
 410  * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 411  * @hba: per adapter instance
 412  * @tag: position of the bit to be cleared
 413  */
 414 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
 415 {
 416         __clear_bit(tag, &hba->outstanding_reqs);
 417 }
 418
 419 /**
 420  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 421  * @reg: Register value of host controller status
 422  *
 423  * Returns integer, 0 on Success and positive value if failed
 424  */
 425 static inline int ufshcd_get_lists_status(u32 reg)
 426 {
 427         /*
 428          * The mask 0xFF is for the following HCS register bits
 429          * Bit          Description
 430          *  0           Device Present
 431          *  1           UTRLRDY
 432          *  2           UTMRLRDY
 433          *  3           UCRDY
 434          * 4-7          reserved
 435          */
 436         return ((reg & 0xFF) >> 1) ^ 0x07;
 437 }
 438
 439 /**
 440  * ufshcd_get_uic_cmd_result - Get the UIC command result
 441  * @hba: Pointer to adapter instance
 442  *
 443  * This function gets the result of UIC command completion
 444  * Returns 0 on success, non zero value on error
 445  */
 446 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
 447 {
 448         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
 449                MASK_UIC_COMMAND_RESULT;
 450 }
 451
 452 /**
 453  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 454  * @hba: Pointer to adapter instance
 455  *
 456  * This function gets UIC command argument3
 457  * Returns 0 on success, non zero value on error
 458  */
 459 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
 460 {
 461         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
 462 }
 463
 464 /**
 465  * ufshcd_get_req_rsp - returns the TR response transaction type
 466  * @ucd_rsp_ptr: pointer to response UPIU
 467  */
 468 static inline int
 469 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
 470 {
 471         return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
 472 }
 473
 474 /**
 475  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 476  * @ucd_rsp_ptr: pointer to response UPIU
 477  *
 478  * This function gets the response status and scsi_status from response UPIU
 479  * Returns the response result code.
 480  */
 481 static inline int
 482 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
 483 {
 484         return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
 485 }
 486
 487 /*
 488  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 489  *                              from response UPIU
 490  * @ucd_rsp_ptr: pointer to response UPIU
 491  *
 492  * Return the data segment length.
 493  */
 494 static inline unsigned int
 495 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
 496 {
 497         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 498                 MASK_RSP_UPIU_DATA_SEG_LEN;
 499 }
 500
 501 /**
 502  * ufshcd_is_exception_event - Check if the device raised an exception event
 503  * @ucd_rsp_ptr: pointer to response UPIU
 504  *
 505  * The function checks if the device raised an exception event indicated in
 506  * the Device Information field of response UPIU.
 507  *
 508  * Returns true if exception is raised, false otherwise.
 509  */
 510 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
 511 {
 512         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 513                         MASK_RSP_EXCEPTION_EVENT ? true : false;
 514 }
 515
 516 /**
 517  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
 518  * @hba: per adapter instance
 519  */
 520 static inline void
 521 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
 522 {
 523         ufshcd_writel(hba, INT_AGGR_ENABLE |
 524                       INT_AGGR_COUNTER_AND_TIMER_RESET,
 525                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 526 }
 527
 528 /**
 529  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 530  * @hba: per adapter instance
 531  * @cnt: Interrupt aggregation counter threshold
 532  * @tmout: Interrupt aggregation timeout value
 533  */
 534 static inline void
 535 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
 536 {
 537         ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
 538                       INT_AGGR_COUNTER_THLD_VAL(cnt) |
 539                       INT_AGGR_TIMEOUT_VAL(tmout),
 540                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 541 }
 542
 543 /**
 544  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 545  * @hba: per adapter instance
 546  */
 547 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
 548 {
 549         ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 550 }
 551
 552 /**
 553  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 554  *                      When run-stop registers are set to 1, it indicates the
 555  *                      host controller that it can process the requests
 556  * @hba: per adapter instance
 557  */
 558 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
 559 {
 560         ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
 561                       REG_UTP_TASK_REQ_LIST_RUN_STOP);
 562         ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
 563                       REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
 564 }
 565
 566 /**
 567  * ufshcd_hba_start - Start controller initialization sequence
 568  * @hba: per adapter instance
 569  */
 570 static inline void ufshcd_hba_start(struct ufs_hba *hba)
 571 {
 572         ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
 573 }
 574
 575 /**
 576  * ufshcd_is_hba_active - Get controller state
 577  * @hba: per adapter instance
 578  *
 579  * Returns zero if controller is active, 1 otherwise
 580  */
 581 static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
 582 {
 583         return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
 584 }
 585
 586 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
 587 {
 588         /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
 589         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
 590             (hba->ufs_version == UFSHCI_VERSION_11))
 591                 return UFS_UNIPRO_VER_1_41;
 592         else
 593                 return UFS_UNIPRO_VER_1_6;
 594 }
 595 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
 596
 597 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
 598 {
 599         /*
 600          * If both host and device support UniPro ver1.6 or later, PA layer
 601          * parameters tuning happens during link startup itself.
 602          *
 603          * We can manually tune PA layer parameters if either host or device
 604          * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
 605          * logic simple, we will only do manual tuning if local unipro version
 606          * doesn't support ver1.6 or later.
 607          */
 608         if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
 609                 return true;
 610         else
 611                 return false;
 612 }
 613
 614 static void ufshcd_ungate_work(struct work_struct *work)
 615 {
 616         int ret;
 617         unsigned long flags;
 618         struct ufs_hba *hba = container_of(work, struct ufs_hba,
 619                         clk_gating.ungate_work);
 620
 621         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
 622
 623         spin_lock_irqsave(hba->host->host_lock, flags);
 624         if (hba->clk_gating.state == CLKS_ON) {
 625                 spin_unlock_irqrestore(hba->host->host_lock, flags);
 626                 goto unblock_reqs;
 627         }
 628
 629         spin_unlock_irqrestore(hba->host->host_lock, flags);
 630         ufshcd_setup_clocks(hba, true);
 631
 632         /* Exit from hibern8 */
 633         if (ufshcd_can_hibern8_during_gating(hba)) {
 634                 /* Prevent gating in this path */
 635                 hba->clk_gating.is_suspended = true;
 636                 if (ufshcd_is_link_hibern8(hba)) {
 637                         ret = ufshcd_uic_hibern8_exit(hba);
 638                         if (ret)
 639                                 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
 640                                         __func__, ret);
 641                         else
 642                                 ufshcd_set_link_active(hba);
 643                 }
 644                 hba->clk_gating.is_suspended = false;
 645         }
 646 unblock_reqs:
 647         if (ufshcd_is_clkscaling_enabled(hba))
 648                 devfreq_resume_device(hba->devfreq);
 649         scsi_unblock_requests(hba->host);
 650 }
 651
 652 /**
 653  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
 654  * Also, exit from hibern8 mode and set the link as active.
 655  * @hba: per adapter instance
 656  * @async: This indicates whether caller should ungate clocks asynchronously.
 657  */
 658 int ufshcd_hold(struct ufs_hba *hba, bool async)
 659 {
 660         int rc = 0;
 661         unsigned long flags;
 662
 663         if (!ufshcd_is_clkgating_allowed(hba))
 664                 goto out;
 665         spin_lock_irqsave(hba->host->host_lock, flags);
 666         hba->clk_gating.active_reqs++;
 667
 668         if (ufshcd_eh_in_progress(hba)) {
 669                 spin_unlock_irqrestore(hba->host->host_lock, flags);
 670                 return 0;
 671         }
 672
 673 start:
 674         switch (hba->clk_gating.state) {
 675         case CLKS_ON:
 676                 /*
 677                  * Wait for the ungate work to complete if in progress.
 678                  * Though the clocks may be in ON state, the link could
 679                  * still be in hibner8 state if hibern8 is allowed
 680                  * during clock gating.
 681                  * Make sure we exit hibern8 state also in addition to
 682                  * clocks being ON.
 683                  */
 684                 if (ufshcd_can_hibern8_during_gating(hba) &&
 685                     ufshcd_is_link_hibern8(hba)) {
 686                         spin_unlock_irqrestore(hba->host->host_lock, flags);
 687                         flush_work(&hba->clk_gating.ungate_work);
 688                         spin_lock_irqsave(hba->host->host_lock, flags);
 689                         goto start;
 690                 }
 691                 break;
 692         case REQ_CLKS_OFF:
 693                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
 694                         hba->clk_gating.state = CLKS_ON;
 695                         break;
 696                 }
 697                 /*
 698                  * If we here, it means gating work is either done or
 699                  * currently running. Hence, fall through to cancel gating
 700                  * work and to enable clocks.
 701                  */
 702         case CLKS_OFF:
 703                 scsi_block_requests(hba->host);
 704                 hba->clk_gating.state = REQ_CLKS_ON;
 705                 schedule_work(&hba->clk_gating.ungate_work);
 706                 /*
 707                  * fall through to check if we should wait for this
 708                  * work to be done or not.
 709                  */
 710         case REQ_CLKS_ON:
 711                 if (async) {
 712                         rc = -EAGAIN;
 713                         hba->clk_gating.active_reqs--;
 714                         break;
 715                 }
 716
 717                 spin_unlock_irqrestore(hba->host->host_lock, flags);
 718                 flush_work(&hba->clk_gating.ungate_work);
 719                 /* Make sure state is CLKS_ON before returning */
 720                 spin_lock_irqsave(hba->host->host_lock, flags);
 721                 goto start;
 722         default:
 723                 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
 724                                 __func__, hba->clk_gating.state);
 725                 break;
 726         }
 727         spin_unlock_irqrestore(hba->host->host_lock, flags);
 728 out:
 729         return rc;
 730 }
 731 EXPORT_SYMBOL_GPL(ufshcd_hold);
 732
 733 static void ufshcd_gate_work(struct work_struct *work)
 734 {
 735         struct ufs_hba *hba = container_of(work, struct ufs_hba,
 736                         clk_gating.gate_work.work);
 737         unsigned long flags;
 738
 739         spin_lock_irqsave(hba->host->host_lock, flags);
 740         if (hba->clk_gating.is_suspended) {
 741                 hba->clk_gating.state = CLKS_ON;
 742                 goto rel_lock;
 743         }
 744
 745         if (hba->clk_gating.active_reqs
 746                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
 747                 || hba->lrb_in_use || hba->outstanding_tasks
 748                 || hba->active_uic_cmd || hba->uic_async_done)
 749                 goto rel_lock;
 750
 751         spin_unlock_irqrestore(hba->host->host_lock, flags);
 752
 753         /* put the link into hibern8 mode before turning off clocks */
 754         if (ufshcd_can_hibern8_during_gating(hba)) {
 755                 if (ufshcd_uic_hibern8_enter(hba)) {
 756                         hba->clk_gating.state = CLKS_ON;
 757                         goto out;
 758                 }
 759                 ufshcd_set_link_hibern8(hba);
 760         }
 761
 762         if (ufshcd_is_clkscaling_enabled(hba)) {
 763                 devfreq_suspend_device(hba->devfreq);
 764                 hba->clk_scaling.window_start_t = 0;
 765         }
 766
 767         if (!ufshcd_is_link_active(hba))
 768                 ufshcd_setup_clocks(hba, false);
 769         else
 770                 /* If link is active, device ref_clk can't be switched off */
 771                 __ufshcd_setup_clocks(hba, false, true);
 772
 773         /*
 774          * In case you are here to cancel this work the gating state
 775          * would be marked as REQ_CLKS_ON. In this case keep the state
 776          * as REQ_CLKS_ON which would anyway imply that clocks are off
 777          * and a request to turn them on is pending. By doing this way,
 778          * we keep the state machine in tact and this would ultimately
 779          * prevent from doing cancel work multiple times when there are
 780          * new requests arriving before the current cancel work is done.
 781          */
 782         spin_lock_irqsave(hba->host->host_lock, flags);
 783         if (hba->clk_gating.state == REQ_CLKS_OFF)
 784                 hba->clk_gating.state = CLKS_OFF;
 785
 786 rel_lock:
 787         spin_unlock_irqrestore(hba->host->host_lock, flags);
 788 out:
 789         return;
 790 }
 791
 792 /* host lock must be held before calling this variant */
 793 static void __ufshcd_release(struct ufs_hba *hba)
 794 {
 795         if (!ufshcd_is_clkgating_allowed(hba))
 796                 return;
 797
 798         hba->clk_gating.active_reqs--;
 799
 800         if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
 801                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
 802                 || hba->lrb_in_use || hba->outstanding_tasks
 803                 || hba->active_uic_cmd || hba->uic_async_done
 804                 || ufshcd_eh_in_progress(hba))
 805                 return;
 806
 807         hba->clk_gating.state = REQ_CLKS_OFF;
 808         schedule_delayed_work(&hba->clk_gating.gate_work,
 809                         msecs_to_jiffies(hba->clk_gating.delay_ms));
 810 }
 811
 812 void ufshcd_release(struct ufs_hba *hba)
 813 {
 814         unsigned long flags;
 815
 816         spin_lock_irqsave(hba->host->host_lock, flags);
 817         __ufshcd_release(hba);
 818         spin_unlock_irqrestore(hba->host->host_lock, flags);
 819 }
 820 EXPORT_SYMBOL_GPL(ufshcd_release);
 821
 822 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
 823                 struct device_attribute *attr, char *buf)
 824 {
 825         struct ufs_hba *hba = dev_get_drvdata(dev);
 826
 827         return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
 828 }
 829
 830 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
 831                 struct device_attribute *attr, const char *buf, size_t count)
 832 {
 833         struct ufs_hba *hba = dev_get_drvdata(dev);
 834         unsigned long flags, value;
 835
 836         if (kstrtoul(buf, 0, &value))
 837                 return -EINVAL;
 838
 839         spin_lock_irqsave(hba->host->host_lock, flags);
 840         hba->clk_gating.delay_ms = value;
 841         spin_unlock_irqrestore(hba->host->host_lock, flags);
 842         return count;
 843 }
 844
 845 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
 846 {
 847         if (!ufshcd_is_clkgating_allowed(hba))
 848                 return;
 849
 850         hba->clk_gating.delay_ms = 150;
 851         INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
 852         INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
 853
 854         hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
 855         hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
 856         sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
 857         hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
 858         hba->clk_gating.delay_attr.attr.mode = S_IRUGO | S_IWUSR;
 859         if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
 860                 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
 861 }
 862
 863 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
 864 {
 865         if (!ufshcd_is_clkgating_allowed(hba))
 866                 return;
 867         device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
 868         cancel_work_sync(&hba->clk_gating.ungate_work);
 869         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
 870 }
 871
 872 /* Must be called with host lock acquired */
 873 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
 874 {
 875         if (!ufshcd_is_clkscaling_enabled(hba))
 876                 return;
 877
 878         if (!hba->clk_scaling.is_busy_started) {
 879                 hba->clk_scaling.busy_start_t = ktime_get();
 880                 hba->clk_scaling.is_busy_started = true;
 881         }
 882 }
 883
 884 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
 885 {
 886         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
 887
 888         if (!ufshcd_is_clkscaling_enabled(hba))
 889                 return;
 890
 891         if (!hba->outstanding_reqs && scaling->is_busy_started) {
 892                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
 893                                         scaling->busy_start_t));
 894                 scaling->busy_start_t = ktime_set(0, 0);
 895                 scaling->is_busy_started = false;
 896         }
 897 }
 898 /**
 899  * ufshcd_send_command - Send SCSI or device management commands
 900  * @hba: per adapter instance
 901  * @task_tag: Task tag of the command
 902  */
 903 static inline
 904 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
 905 {
 906         ufshcd_clk_scaling_start_busy(hba);
 907         __set_bit(task_tag, &hba->outstanding_reqs);
 908         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
 909 }
 910
 911 /**
 912  * ufshcd_copy_sense_data - Copy sense data in case of check condition
 913  * @lrb - pointer to local reference block
 914  */
 915 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
 916 {
 917         int len;
 918         if (lrbp->sense_buffer &&
 919             ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
 920                 int len_to_copy;
 921
 922                 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
 923                 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
 924
 925                 memcpy(lrbp->sense_buffer,
 926                         lrbp->ucd_rsp_ptr->sr.sense_data,
 927                         min_t(int, len_to_copy, SCSI_SENSE_BUFFERSIZE));
 928         }
 929 }
 930
 931 /**
 932  * ufshcd_copy_query_response() - Copy the Query Response and the data
 933  * descriptor
 934  * @hba: per adapter instance
 935  * @lrb - pointer to local reference block
 936  */
 937 static
 938 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
 939 {
 940         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
 941
 942         memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
 943
 944         /* Get the descriptor */
 945         if (hba->dev_cmd.query.descriptor &&
 946             lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
 947                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
 948                                 GENERAL_UPIU_REQUEST_SIZE;
 949                 u16 resp_len;
 950                 u16 buf_len;
 951
 952                 /* data segment length */
 953                 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
 954                                                 MASK_QUERY_DATA_SEG_LEN;
 955                 buf_len = be16_to_cpu(
 956                                 hba->dev_cmd.query.request.upiu_req.length);
 957                 if (likely(buf_len >= resp_len)) {
 958                         memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
 959                 } else {
 960                         dev_warn(hba->dev,
 961                                 "%s: Response size is bigger than buffer",
 962                                 __func__);
 963                         return -EINVAL;
 964                 }
 965         }
 966
 967         return 0;
 968 }
 969
 970 /**
 971  * ufshcd_hba_capabilities - Read controller capabilities
 972  * @hba: per adapter instance
 973  */
 974 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
 975 {
 976         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
 977
 978         /* nutrs and nutmrs are 0 based values */
 979         hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
 980         hba->nutmrs =
 981         ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
 982 }
 983
 984 /**
 985  * ufshcd_ready_for_uic_cmd - Check if controller is ready
 986  *                            to accept UIC commands
 987  * @hba: per adapter instance
 988  * Return true on success, else false
 989  */
 990 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
 991 {
 992         if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
 993                 return true;
 994         else
 995                 return false;
 996 }
 997
 998 /**
 999  * ufshcd_get_upmcrs - Get the power mode change request status
1000  * @hba: Pointer to adapter instance
1001  *
1002  * This function gets the UPMCRS field of HCS register
1003  * Returns value of UPMCRS field
1004  */
1005 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1006 {
1007         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1008 }
1009
1010 /**
1011  * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1012  * @hba: per adapter instance
1013  * @uic_cmd: UIC command
1014  *
1015  * Mutex must be held.
1016  */
1017 static inline void
1018 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1019 {
1020         WARN_ON(hba->active_uic_cmd);
1021
1022         hba->active_uic_cmd = uic_cmd;
1023
1024         /* Write Args */
1025         ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1026         ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1027         ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
1028
1029         /* Write UIC Cmd */
1030         ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
1031                       REG_UIC_COMMAND);
1032 }
1033
1034 /**
1035  * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
1036  * @hba: per adapter instance
1037  * @uic_command: UIC command
1038  *
1039  * Must be called with mutex held.
1040  * Returns 0 only if success.
1041  */
1042 static int
1043 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1044 {
1045         int ret;
1046         unsigned long flags;
1047
1048         if (wait_for_completion_timeout(&uic_cmd->done,
1049                                         msecs_to_jiffies(UIC_CMD_TIMEOUT)))
1050                 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
1051         else
1052                 ret = -ETIMEDOUT;
1053
1054         spin_lock_irqsave(hba->host->host_lock, flags);
1055         hba->active_uic_cmd = NULL;
1056         spin_unlock_irqrestore(hba->host->host_lock, flags);
1057
1058         return ret;
1059 }
1060
1061 /**
1062  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1063  * @hba: per adapter instance
1064  * @uic_cmd: UIC command
1065  * @completion: initialize the completion only if this is set to true
1066  *
1067  * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
1068  * with mutex held and host_lock locked.
1069  * Returns 0 only if success.
1070  */
1071 static int
1072 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
1073                       bool completion)
1074 {
1075         if (!ufshcd_ready_for_uic_cmd(hba)) {
1076                 dev_err(hba->dev,
1077                         "Controller not ready to accept UIC commands\n");
1078                 return -EIO;
1079         }
1080
1081         if (completion)
1082                 init_completion(&uic_cmd->done);
1083
1084         ufshcd_dispatch_uic_cmd(hba, uic_cmd);
1085
1086         return 0;
1087 }
1088
1089 /**
1090  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
1091  * @hba: per adapter instance
1092  * @uic_cmd: UIC command
1093  *
1094  * Returns 0 only if success.
1095  */
1096 static int
1097 ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1098 {
1099         int ret;
1100         unsigned long flags;
1101
1102         ufshcd_hold(hba, false);
1103         mutex_lock(&hba->uic_cmd_mutex);
1104         ufshcd_add_delay_before_dme_cmd(hba);
1105
1106         spin_lock_irqsave(hba->host->host_lock, flags);
1107         ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
1108         spin_unlock_irqrestore(hba->host->host_lock, flags);
1109         if (!ret)
1110                 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
1111
1112         mutex_unlock(&hba->uic_cmd_mutex);
1113
1114         ufshcd_release(hba);
1115         return ret;
1116 }
1117
1118 /**
1119  * ufshcd_map_sg - Map scatter-gather list to prdt
1120  * @lrbp - pointer to local reference block
1121  *
1122  * Returns 0 in case of success, non-zero value in case of failure
1123  */
1124 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1125 {
1126         struct ufshcd_sg_entry *prd_table;
1127         struct scatterlist *sg;
1128         struct scsi_cmnd *cmd;
1129         int sg_segments;
1130         int i;
1131
1132         cmd = lrbp->cmd;
1133         sg_segments = scsi_dma_map(cmd);
1134         if (sg_segments < 0)
1135                 return sg_segments;
1136
1137         if (sg_segments) {
1138                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
1139                         lrbp->utr_descriptor_ptr->prd_table_length =
1140                                 cpu_to_le16((u16)(sg_segments *
1141                                         sizeof(struct ufshcd_sg_entry)));
1142                 else
1143                         lrbp->utr_descriptor_ptr->prd_table_length =
1144                                 cpu_to_le16((u16) (sg_segments));
1145
1146                 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
1147
1148                 scsi_for_each_sg(cmd, sg, sg_segments, i) {
1149                         prd_table[i].size  =
1150                                 cpu_to_le32(((u32) sg_dma_len(sg))-1);
1151                         prd_table[i].base_addr =
1152                                 cpu_to_le32(lower_32_bits(sg->dma_address));
1153                         prd_table[i].upper_addr =
1154                                 cpu_to_le32(upper_32_bits(sg->dma_address));
1155                         prd_table[i].reserved = 0;
1156                 }
1157         } else {
1158                 lrbp->utr_descriptor_ptr->prd_table_length = 0;
1159         }
1160
1161         return 0;
1162 }
1163
1164 /**
1165  * ufshcd_enable_intr - enable interrupts
1166  * @hba: per adapter instance
1167  * @intrs: interrupt bits
1168  */
1169 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
1170 {
1171         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
1172
1173         if (hba->ufs_version == UFSHCI_VERSION_10) {
1174                 u32 rw;
1175                 rw = set & INTERRUPT_MASK_RW_VER_10;
1176                 set = rw | ((set ^ intrs) & intrs);
1177         } else {
1178                 set |= intrs;
1179         }
1180
1181         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
1182 }
1183
1184 /**
1185  * ufshcd_disable_intr - disable interrupts
1186  * @hba: per adapter instance
1187  * @intrs: interrupt bits
1188  */
1189 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
1190 {
1191         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
1192
1193         if (hba->ufs_version == UFSHCI_VERSION_10) {
1194                 u32 rw;
1195                 rw = (set & INTERRUPT_MASK_RW_VER_10) &
1196                         ~(intrs & INTERRUPT_MASK_RW_VER_10);
1197                 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
1198
1199         } else {
1200                 set &= ~intrs;
1201         }
1202
1203         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
1204 }
1205
1206 /**
1207  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
1208  * descriptor according to request
1209  * @lrbp: pointer to local reference block
1210  * @upiu_flags: flags required in the header
1211  * @cmd_dir: requests data direction
1212  */
1213 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
1214                         u32 *upiu_flags, enum dma_data_direction cmd_dir)
1215 {
1216         struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
1217         u32 data_direction;
1218         u32 dword_0;
1219
1220         if (cmd_dir == DMA_FROM_DEVICE) {
1221                 data_direction = UTP_DEVICE_TO_HOST;
1222                 *upiu_flags = UPIU_CMD_FLAGS_READ;
1223         } else if (cmd_dir == DMA_TO_DEVICE) {
1224                 data_direction = UTP_HOST_TO_DEVICE;
1225                 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
1226         } else {
1227                 data_direction = UTP_NO_DATA_TRANSFER;
1228                 *upiu_flags = UPIU_CMD_FLAGS_NONE;
1229         }
1230
1231         dword_0 = data_direction | (lrbp->command_type
1232                                 << UPIU_COMMAND_TYPE_OFFSET);
1233         if (lrbp->intr_cmd)
1234                 dword_0 |= UTP_REQ_DESC_INT_CMD;
1235
1236         /* Transfer request descriptor header fields */
1237         req_desc->header.dword_0 = cpu_to_le32(dword_0);
1238         /* dword_1 is reserved, hence it is set to 0 */
1239         req_desc->header.dword_1 = 0;
1240         /*
1241          * assigning invalid value for command status. Controller
1242          * updates OCS on command completion, with the command
1243          * status
1244          */
1245         req_desc->header.dword_2 =
1246                 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
1247         /* dword_3 is reserved, hence it is set to 0 */
1248         req_desc->header.dword_3 = 0;
1249
1250         req_desc->prd_table_length = 0;
1251 }
1252
1253 /**
1254  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
1255  * for scsi commands
1256  * @lrbp - local reference block pointer
1257  * @upiu_flags - flags
1258  */
1259 static
1260 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
1261 {
1262         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1263         unsigned short cdb_len;
1264
1265         /* command descriptor fields */
1266         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
1267                                 UPIU_TRANSACTION_COMMAND, upiu_flags,
1268                                 lrbp->lun, lrbp->task_tag);
1269         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
1270                                 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
1271
1272         /* Total EHS length and Data segment length will be zero */
1273         ucd_req_ptr->header.dword_2 = 0;
1274
1275         ucd_req_ptr->sc.exp_data_transfer_len =
1276                 cpu_to_be32(lrbp->cmd->sdb.length);
1277
1278         cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE);
1279         memset(ucd_req_ptr->sc.cdb, 0, MAX_CDB_SIZE);
1280         memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
1281
1282         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
1283 }
1284
1285 /**
1286  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
1287  * for query requsts
1288  * @hba: UFS hba
1289  * @lrbp: local reference block pointer
1290  * @upiu_flags: flags
1291  */
1292 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
1293                                 struct ufshcd_lrb *lrbp, u32 upiu_flags)
1294 {
1295         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1296         struct ufs_query *query = &hba->dev_cmd.query;
1297         u16 len = be16_to_cpu(query->request.upiu_req.length);
1298         u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
1299
1300         /* Query request header */
1301         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
1302                         UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
1303                         lrbp->lun, lrbp->task_tag);
1304         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
1305                         0, query->request.query_func, 0, 0);
1306
1307         /* Data segment length only need for WRITE_DESC */
1308         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
1309                 ucd_req_ptr->header.dword_2 =
1310                         UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
1311         else
1312                 ucd_req_ptr->header.dword_2 = 0;
1313
1314         /* Copy the Query Request buffer as is */
1315         memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
1316                         QUERY_OSF_SIZE);
1317
1318         /* Copy the Descriptor */
1319         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
1320                 memcpy(descp, query->descriptor, len);
1321
1322         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
1323 }
1324
1325 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
1326 {
1327         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
1328
1329         memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
1330
1331         /* command descriptor fields */
1332         ucd_req_ptr->header.dword_0 =
1333                 UPIU_HEADER_DWORD(
1334                         UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
1335         /* clear rest of the fields of basic header */
1336         ucd_req_ptr->header.dword_1 = 0;
1337         ucd_req_ptr->header.dword_2 = 0;
1338
1339         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
1340 }
1341
1342 /**
1343  * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
1344  *                           for Device Management Purposes
1345  * @hba - per adapter instance
1346  * @lrb - pointer to local reference block
1347  */
1348 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1349 {
1350         u32 upiu_flags;
1351         int ret = 0;
1352
1353         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
1354             (hba->ufs_version == UFSHCI_VERSION_11))
1355                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
1356         else
1357                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
1358
1359         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
1360         if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
1361                 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
1362         else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
1363                 ufshcd_prepare_utp_nop_upiu(lrbp);
1364         else
1365                 ret = -EINVAL;
1366
1367         return ret;
1368 }
1369
1370 /**
1371  * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
1372  *                         for SCSI Purposes
1373  * @hba - per adapter instance
1374  * @lrb - pointer to local reference block
1375  */
1376 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1377 {
1378         u32 upiu_flags;
1379         int ret = 0;
1380
1381         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
1382             (hba->ufs_version == UFSHCI_VERSION_11))
1383                 lrbp->command_type = UTP_CMD_TYPE_SCSI;
1384         else
1385                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
1386
1387         if (likely(lrbp->cmd)) {
1388                 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
1389                                                 lrbp->cmd->sc_data_direction);
1390                 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
1391         } else {
1392                 ret = -EINVAL;
1393         }
1394
1395         return ret;
1396 }
1397
1398 /*
1399  * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1400  * @scsi_lun: scsi LUN id
1401  *
1402  * Returns UPIU LUN id
1403  */
1404 static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1405 {
1406         if (scsi_is_wlun(scsi_lun))
1407                 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1408                         | UFS_UPIU_WLUN_ID;
1409         else
1410                 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1411 }
1412
1413 /**
1414  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
1415  * @scsi_lun: UPIU W-LUN id
1416  *
1417  * Returns SCSI W-LUN id
1418  */
1419 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
1420 {
1421         return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
1422 }
1423
1424 /**
1425  * ufshcd_queuecommand - main entry point for SCSI requests
1426  * @cmd: command from SCSI Midlayer
1427  * @done: call back function
1428  *
1429  * Returns 0 for success, non-zero in case of failure
1430  */
1431 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
1432 {
1433         struct ufshcd_lrb *lrbp;
1434         struct ufs_hba *hba;
1435         unsigned long flags;
1436         int tag;
1437         int err = 0;
1438
1439         hba = shost_priv(host);
1440
1441         tag = cmd->request->tag;
1442         if (!ufshcd_valid_tag(hba, tag)) {
1443                 dev_err(hba->dev,
1444                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
1445                         __func__, tag, cmd, cmd->request);
1446                 BUG();
1447         }
1448
1449         spin_lock_irqsave(hba->host->host_lock, flags);
1450         switch (hba->ufshcd_state) {
1451         case UFSHCD_STATE_OPERATIONAL:
1452                 break;
1453         case UFSHCD_STATE_EH_SCHEDULED:
1454         case UFSHCD_STATE_RESET:
1455                 err = SCSI_MLQUEUE_HOST_BUSY;
1456                 goto out_unlock;
1457         case UFSHCD_STATE_ERROR:
1458                 set_host_byte(cmd, DID_ERROR);
1459                 cmd->scsi_done(cmd);
1460                 goto out_unlock;
1461         default:
1462                 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
1463                                 __func__, hba->ufshcd_state);
1464                 set_host_byte(cmd, DID_BAD_TARGET);
1465                 cmd->scsi_done(cmd);
1466                 goto out_unlock;
1467         }
1468
1469         /* if error handling is in progress, don't issue commands */
1470         if (ufshcd_eh_in_progress(hba)) {
1471                 set_host_byte(cmd, DID_ERROR);
1472                 cmd->scsi_done(cmd);
1473                 goto out_unlock;
1474         }
1475         spin_unlock_irqrestore(hba->host->host_lock, flags);
1476
1477         /* acquire the tag to make sure device cmds don't use it */
1478         if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
1479                 /*
1480                  * Dev manage command in progress, requeue the command.
1481                  * Requeuing the command helps in cases where the request *may*
1482                  * find different tag instead of waiting for dev manage command
1483                  * completion.
1484                  */
1485                 err = SCSI_MLQUEUE_HOST_BUSY;
1486                 goto out;
1487         }
1488
1489         err = ufshcd_hold(hba, true);
1490         if (err) {
1491                 err = SCSI_MLQUEUE_HOST_BUSY;
1492                 clear_bit_unlock(tag, &hba->lrb_in_use);
1493                 goto out;
1494         }
1495
1496         /* IO svc time latency histogram */
1497         if (hba != NULL && cmd->request != NULL) {
1498                 if (hba->latency_hist_enabled &&
1499                     (cmd->request->cmd_type == REQ_TYPE_FS)) {
1500                         cmd->request->lat_hist_io_start = ktime_get();
1501                         cmd->request->lat_hist_enabled = 1;
1502                 } else
1503                         cmd->request->lat_hist_enabled = 0;
1504         }
1505
1506         WARN_ON(hba->clk_gating.state != CLKS_ON);
1507
1508         lrbp = &hba->lrb[tag];
1509
1510         WARN_ON(lrbp->cmd);
1511         lrbp->cmd = cmd;
1512         lrbp->sense_bufflen = SCSI_SENSE_BUFFERSIZE;
1513         lrbp->sense_buffer = cmd->sense_buffer;
1514         lrbp->task_tag = tag;
1515         lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
1516         lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
1517
1518         ufshcd_comp_scsi_upiu(hba, lrbp);
1519
1520         err = ufshcd_map_sg(hba, lrbp);
1521         if (err) {
1522                 lrbp->cmd = NULL;
1523                 clear_bit_unlock(tag, &hba->lrb_in_use);
1524                 goto out;
1525         }
1526
1527         /* issue command to the controller */
1528         spin_lock_irqsave(hba->host->host_lock, flags);
1529         ufshcd_send_command(hba, tag);
1530 out_unlock:
1531         spin_unlock_irqrestore(hba->host->host_lock, flags);
1532 out:
1533         return err;
1534 }
1535
1536 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
1537                 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
1538 {
1539         lrbp->cmd = NULL;
1540         lrbp->sense_bufflen = 0;
1541         lrbp->sense_buffer = NULL;
1542         lrbp->task_tag = tag;
1543         lrbp->lun = 0; /* device management cmd is not specific to any LUN */
1544         lrbp->intr_cmd = true; /* No interrupt aggregation */
1545         hba->dev_cmd.type = cmd_type;
1546
1547         return ufshcd_comp_devman_upiu(hba, lrbp);
1548 }
1549
1550 static int
1551 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
1552 {
1553         int err = 0;
1554         unsigned long flags;
1555         u32 mask = 1 << tag;
1556
1557         /* clear outstanding transaction before retry */
1558         spin_lock_irqsave(hba->host->host_lock, flags);
1559         ufshcd_utrl_clear(hba, tag);
1560         spin_unlock_irqrestore(hba->host->host_lock, flags);
1561
1562         /*
1563          * wait for for h/w to clear corresponding bit in door-bell.
1564          * max. wait is 1 sec.
1565          */
1566         err = ufshcd_wait_for_register(hba,
1567                         REG_UTP_TRANSFER_REQ_DOOR_BELL,
1568                         mask, ~mask, 1000, 1000, true);
1569
1570         return err;
1571 }
1572
1573 static int
1574 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1575 {
1576         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1577
1578         /* Get the UPIU response */
1579         query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
1580                                 UPIU_RSP_CODE_OFFSET;
1581         return query_res->response;
1582 }
1583
1584 /**
1585  * ufshcd_dev_cmd_completion() - handles device management command responses
1586  * @hba: per adapter instance
1587  * @lrbp: pointer to local reference block
1588  */
1589 static int
1590 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1591 {
1592         int resp;
1593         int err = 0;
1594
1595         resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
1596
1597         switch (resp) {
1598         case UPIU_TRANSACTION_NOP_IN:
1599                 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
1600                         err = -EINVAL;
1601                         dev_err(hba->dev, "%s: unexpected response %x\n",
1602                                         __func__, resp);
1603                 }
1604                 break;
1605         case UPIU_TRANSACTION_QUERY_RSP:
1606                 err = ufshcd_check_query_response(hba, lrbp);
1607                 if (!err)
1608                         err = ufshcd_copy_query_response(hba, lrbp);
1609                 break;
1610         case UPIU_TRANSACTION_REJECT_UPIU:
1611                 /* TODO: handle Reject UPIU Response */
1612                 err = -EPERM;
1613                 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
1614                                 __func__);
1615                 break;
1616         default:
1617                 err = -EINVAL;
1618                 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
1619                                 __func__, resp);
1620                 break;
1621         }
1622
1623         return err;
1624 }
1625
1626 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
1627                 struct ufshcd_lrb *lrbp, int max_timeout)
1628 {
1629         int err = 0;
1630         unsigned long time_left;
1631         unsigned long flags;
1632
1633         time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
1634                         msecs_to_jiffies(max_timeout));
1635
1636         spin_lock_irqsave(hba->host->host_lock, flags);
1637         hba->dev_cmd.complete = NULL;
1638         if (likely(time_left)) {
1639                 err = ufshcd_get_tr_ocs(lrbp);
1640                 if (!err)
1641                         err = ufshcd_dev_cmd_completion(hba, lrbp);
1642         }
1643         spin_unlock_irqrestore(hba->host->host_lock, flags);
1644
1645         if (!time_left) {
1646                 err = -ETIMEDOUT;
1647                 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
1648                         __func__, lrbp->task_tag);
1649                 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
1650                         /* successfully cleared the command, retry if needed */
1651                         err = -EAGAIN;
1652                 /*
1653                  * in case of an error, after clearing the doorbell,
1654                  * we also need to clear the outstanding_request
1655                  * field in hba
1656                  */
1657                 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
1658         }
1659
1660         return err;
1661 }
1662
1663 /**
1664  * ufshcd_get_dev_cmd_tag - Get device management command tag
1665  * @hba: per-adapter instance
1666  * @tag: pointer to variable with available slot value
1667  *
1668  * Get a free slot and lock it until device management command
1669  * completes.
1670  *
1671  * Returns false if free slot is unavailable for locking, else
1672  * return true with tag value in @tag.
1673  */
1674 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
1675 {
1676         int tag;
1677         bool ret = false;
1678         unsigned long tmp;
1679
1680         if (!tag_out)
1681                 goto out;
1682
1683         do {
1684                 tmp = ~hba->lrb_in_use;
1685                 tag = find_last_bit(&tmp, hba->nutrs);
1686                 if (tag >= hba->nutrs)
1687                         goto out;
1688         } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
1689
1690         *tag_out = tag;
1691         ret = true;
1692 out:
1693         return ret;
1694 }
1695
1696 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
1697 {
1698         clear_bit_unlock(tag, &hba->lrb_in_use);
1699 }
1700
1701 /**
1702  * ufshcd_exec_dev_cmd - API for sending device management requests
1703  * @hba - UFS hba
1704  * @cmd_type - specifies the type (NOP, Query...)
1705  * @timeout - time in seconds
1706  *
1707  * NOTE: Since there is only one available tag for device management commands,
1708  * it is expected you hold the hba->dev_cmd.lock mutex.
1709  */
1710 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
1711                 enum dev_cmd_type cmd_type, int timeout)
1712 {
1713         struct ufshcd_lrb *lrbp;
1714         int err;
1715         int tag;
1716         struct completion wait;
1717         unsigned long flags;
1718
1719         /*
1720          * Get free slot, sleep if slots are unavailable.
1721          * Even though we use wait_event() which sleeps indefinitely,
1722          * the maximum wait time is bounded by SCSI request timeout.
1723          */
1724         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
1725
1726         init_completion(&wait);
1727         lrbp = &hba->lrb[tag];
1728         WARN_ON(lrbp->cmd);
1729         err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
1730         if (unlikely(err))
1731                 goto out_put_tag;
1732
1733         hba->dev_cmd.complete = &wait;
1734
1735         /* Make sure descriptors are ready before ringing the doorbell */
1736         wmb();
1737         spin_lock_irqsave(hba->host->host_lock, flags);
1738         ufshcd_send_command(hba, tag);
1739         spin_unlock_irqrestore(hba->host->host_lock, flags);
1740
1741         err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
1742
1743 out_put_tag:
1744         ufshcd_put_dev_cmd_tag(hba, tag);
1745         wake_up(&hba->dev_cmd.tag_wq);
1746         return err;
1747 }
1748
1749 /**
1750  * ufshcd_init_query() - init the query response and request parameters
1751  * @hba: per-adapter instance
1752  * @request: address of the request pointer to be initialized
1753  * @response: address of the response pointer to be initialized
1754  * @opcode: operation to perform
1755  * @idn: flag idn to access
1756  * @index: LU number to access
1757  * @selector: query/flag/descriptor further identification
1758  */
1759 static inline void ufshcd_init_query(struct ufs_hba *hba,
1760                 struct ufs_query_req **request, struct ufs_query_res **response,
1761                 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
1762 {
1763         *request = &hba->dev_cmd.query.request;
1764         *response = &hba->dev_cmd.query.response;
1765         memset(*request, 0, sizeof(struct ufs_query_req));
1766         memset(*response, 0, sizeof(struct ufs_query_res));
1767         (*request)->upiu_req.opcode = opcode;
1768         (*request)->upiu_req.idn = idn;
1769         (*request)->upiu_req.index = index;
1770         (*request)->upiu_req.selector = selector;
1771 }
1772
1773 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
1774         enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
1775 {
1776         int ret;
1777         int retries;
1778
1779         for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
1780                 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
1781                 if (ret)
1782                         dev_dbg(hba->dev,
1783                                 "%s: failed with error %d, retries %d\n",
1784                                 __func__, ret, retries);
1785                 else
1786                         break;
1787         }
1788
1789         if (ret)
1790                 dev_err(hba->dev,
1791                         "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
1792                         __func__, opcode, idn, ret, retries);
1793         return ret;
1794 }
1795
1796 /**
1797  * ufshcd_query_flag() - API function for sending flag query requests
1798  * hba: per-adapter instance
1799  * query_opcode: flag query to perform
1800  * idn: flag idn to access
1801  * flag_res: the flag value after the query request completes
1802  *
1803  * Returns 0 for success, non-zero in case of failure
1804  */
1805 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
1806                         enum flag_idn idn, bool *flag_res)
1807 {
1808         struct ufs_query_req *request = NULL;
1809         struct ufs_query_res *response = NULL;
1810         int err, index = 0, selector = 0;
1811         int timeout = QUERY_REQ_TIMEOUT;
1812
1813         BUG_ON(!hba);
1814
1815         ufshcd_hold(hba, false);
1816         mutex_lock(&hba->dev_cmd.lock);
1817         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1818                         selector);
1819
1820         switch (opcode) {
1821         case UPIU_QUERY_OPCODE_SET_FLAG:
1822         case UPIU_QUERY_OPCODE_CLEAR_FLAG:
1823         case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
1824                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
1825                 break;
1826         case UPIU_QUERY_OPCODE_READ_FLAG:
1827                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
1828                 if (!flag_res) {
1829                         /* No dummy reads */
1830                         dev_err(hba->dev, "%s: Invalid argument for read request\n",
1831                                         __func__);
1832                         err = -EINVAL;
1833                         goto out_unlock;
1834                 }
1835                 break;
1836         default:
1837                 dev_err(hba->dev,
1838                         "%s: Expected query flag opcode but got = %d\n",
1839                         __func__, opcode);
1840                 err = -EINVAL;
1841                 goto out_unlock;
1842         }
1843
1844         if (idn == QUERY_FLAG_IDN_FDEVICEINIT)
1845                 timeout = QUERY_FDEVICEINIT_REQ_TIMEOUT;
1846
1847         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
1848
1849         if (err) {
1850                 dev_err(hba->dev,
1851                         "%s: Sending flag query for idn %d failed, err = %d\n",
1852                         __func__, idn, err);
1853                 goto out_unlock;
1854         }
1855
1856         if (flag_res)
1857                 *flag_res = (be32_to_cpu(response->upiu_res.value) &
1858                                 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
1859
1860 out_unlock:
1861         mutex_unlock(&hba->dev_cmd.lock);
1862         ufshcd_release(hba);
1863         return err;
1864 }
1865
1866 /**
1867  * ufshcd_query_attr - API function for sending attribute requests
1868  * hba: per-adapter instance
1869  * opcode: attribute opcode
1870  * idn: attribute idn to access
1871  * index: index field
1872  * selector: selector field
1873  * attr_val: the attribute value after the query request completes
1874  *
1875  * Returns 0 for success, non-zero in case of failure
1876 */
1877 static int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
1878                         enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
1879 {
1880         struct ufs_query_req *request = NULL;
1881         struct ufs_query_res *response = NULL;
1882         int err;
1883
1884         BUG_ON(!hba);
1885
1886         ufshcd_hold(hba, false);
1887         if (!attr_val) {
1888                 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
1889                                 __func__, opcode);
1890                 err = -EINVAL;
1891                 goto out;
1892         }
1893
1894         mutex_lock(&hba->dev_cmd.lock);
1895         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1896                         selector);
1897
1898         switch (opcode) {
1899         case UPIU_QUERY_OPCODE_WRITE_ATTR:
1900                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
1901                 request->upiu_req.value = cpu_to_be32(*attr_val);
1902                 break;
1903         case UPIU_QUERY_OPCODE_READ_ATTR:
1904                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
1905                 break;
1906         default:
1907                 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
1908                                 __func__, opcode);
1909                 err = -EINVAL;
1910                 goto out_unlock;
1911         }
1912
1913         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
1914
1915         if (err) {
1916                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
1917                                 __func__, opcode, idn, err);
1918                 goto out_unlock;
1919         }
1920
1921         *attr_val = be32_to_cpu(response->upiu_res.value);
1922
1923 out_unlock:
1924         mutex_unlock(&hba->dev_cmd.lock);
1925 out:
1926         ufshcd_release(hba);
1927         return err;
1928 }
1929
1930 /**
1931  * ufshcd_query_attr_retry() - API function for sending query
1932  * attribute with retries
1933  * @hba: per-adapter instance
1934  * @opcode: attribute opcode
1935  * @idn: attribute idn to access
1936  * @index: index field
1937  * @selector: selector field
1938  * @attr_val: the attribute value after the query request
1939  * completes
1940  *
1941  * Returns 0 for success, non-zero in case of failure
1942 */
1943 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
1944         enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
1945         u32 *attr_val)
1946 {
1947         int ret = 0;
1948         u32 retries;
1949
1950          for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
1951                 ret = ufshcd_query_attr(hba, opcode, idn, index,
1952                                                 selector, attr_val);
1953                 if (ret)
1954                         dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
1955                                 __func__, ret, retries);
1956                 else
1957                         break;
1958         }
1959
1960         if (ret)
1961                 dev_err(hba->dev,
1962                         "%s: query attribute, idn %d, failed with error %d after %d retires\n",
1963                         __func__, idn, ret, QUERY_REQ_RETRIES);
1964         return ret;
1965 }
1966
1967 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
1968                         enum query_opcode opcode, enum desc_idn idn, u8 index,
1969                         u8 selector, u8 *desc_buf, int *buf_len)
1970 {
1971         struct ufs_query_req *request = NULL;
1972         struct ufs_query_res *response = NULL;
1973         int err;
1974
1975         BUG_ON(!hba);
1976
1977         ufshcd_hold(hba, false);
1978         if (!desc_buf) {
1979                 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
1980                                 __func__, opcode);
1981                 err = -EINVAL;
1982                 goto out;
1983         }
1984
1985         if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
1986                 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
1987                                 __func__, *buf_len);
1988                 err = -EINVAL;
1989                 goto out;
1990         }
1991
1992         mutex_lock(&hba->dev_cmd.lock);
1993         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
1994                         selector);
1995         hba->dev_cmd.query.descriptor = desc_buf;
1996         request->upiu_req.length = cpu_to_be16(*buf_len);
1997
1998         switch (opcode) {
1999         case UPIU_QUERY_OPCODE_WRITE_DESC:
2000                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2001                 break;
2002         case UPIU_QUERY_OPCODE_READ_DESC:
2003                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2004                 break;
2005         default:
2006                 dev_err(hba->dev,
2007                                 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2008                                 __func__, opcode);
2009                 err = -EINVAL;
2010                 goto out_unlock;
2011         }
2012
2013         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2014
2015         if (err) {
2016                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
2017                                 __func__, opcode, idn, err);
2018                 goto out_unlock;
2019         }
2020
2021         *buf_len = be16_to_cpu(response->upiu_res.length);
2022
2023 out_unlock:
2024         hba->dev_cmd.query.descriptor = NULL;
2025         mutex_unlock(&hba->dev_cmd.lock);
2026 out:
2027         ufshcd_release(hba);
2028         return err;
2029 }
2030
2031 /**
2032  * ufshcd_query_descriptor_retry - API function for sending descriptor
2033  * requests
2034  * hba: per-adapter instance
2035  * opcode: attribute opcode
2036  * idn: attribute idn to access
2037  * index: index field
2038  * selector: selector field
2039  * desc_buf: the buffer that contains the descriptor
2040  * buf_len: length parameter passed to the device
2041  *
2042  * Returns 0 for success, non-zero in case of failure.
2043  * The buf_len parameter will contain, on return, the length parameter
2044  * received on the response.
2045  */
2046 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2047                         enum query_opcode opcode, enum desc_idn idn, u8 index,
2048                         u8 selector, u8 *desc_buf, int *buf_len)
2049 {
2050         int err;
2051         int retries;
2052
2053         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2054                 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2055                                                 selector, desc_buf, buf_len);
2056                 if (!err || err == -EINVAL)
2057                         break;
2058         }
2059
2060         return err;
2061 }
2062 EXPORT_SYMBOL(ufshcd_query_descriptor_retry);
2063
2064 /**
2065  * ufshcd_read_desc_length - read the specified descriptor length from header
2066  * @hba: Pointer to adapter instance
2067  * @desc_id: descriptor idn value
2068  * @desc_index: descriptor index
2069  * @desc_length: pointer to variable to read the length of descriptor
2070  *
2071  * Return 0 in case of success, non-zero otherwise
2072  */
2073 static int ufshcd_read_desc_length(struct ufs_hba *hba,
2074         enum desc_idn desc_id,
2075         int desc_index,
2076         int *desc_length)
2077 {
2078         int ret;
2079         u8 header[QUERY_DESC_HDR_SIZE];
2080         int header_len = QUERY_DESC_HDR_SIZE;
2081
2082         if (desc_id >= QUERY_DESC_IDN_MAX)
2083                 return -EINVAL;
2084
2085         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2086                                         desc_id, desc_index, 0, header,
2087                                         &header_len);
2088
2089         if (ret) {
2090                 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2091                         __func__, desc_id);
2092                 return ret;
2093         } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
2094                 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
2095                         __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
2096                         desc_id);
2097                 ret = -EINVAL;
2098         }
2099
2100         *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
2101         return ret;
2102
2103 }
2104
2105 /**
2106  * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
2107  * @hba: Pointer to adapter instance
2108  * @desc_id: descriptor idn value
2109  * @desc_len: mapped desc length (out)
2110  *
2111  * Return 0 in case of success, non-zero otherwise
2112  */
2113 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
2114         enum desc_idn desc_id, int *desc_len)
2115 {
2116         switch (desc_id) {
2117         case QUERY_DESC_IDN_DEVICE:
2118                 *desc_len = hba->desc_size.dev_desc;
2119                 break;
2120         case QUERY_DESC_IDN_POWER:
2121                 *desc_len = hba->desc_size.pwr_desc;
2122                 break;
2123         case QUERY_DESC_IDN_GEOMETRY:
2124                 *desc_len = hba->desc_size.geom_desc;
2125                 break;
2126         case QUERY_DESC_IDN_CONFIGURATION:
2127                 *desc_len = hba->desc_size.conf_desc;
2128                 break;
2129         case QUERY_DESC_IDN_UNIT:
2130                 *desc_len = hba->desc_size.unit_desc;
2131                 break;
2132         case QUERY_DESC_IDN_INTERCONNECT:
2133                 *desc_len = hba->desc_size.interc_desc;
2134                 break;
2135         case QUERY_DESC_IDN_STRING:
2136                 *desc_len = QUERY_DESC_MAX_SIZE;
2137                 break;
2138         case QUERY_DESC_IDN_RFU_0:
2139         case QUERY_DESC_IDN_RFU_1:
2140                 *desc_len = 0;
2141                 break;
2142         default:
2143                 *desc_len = 0;
2144                 return -EINVAL;
2145         }
2146         return 0;
2147 }
2148 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
2149
2150 /**
2151  * ufshcd_read_desc_param - read the specified descriptor parameter
2152  * @hba: Pointer to adapter instance
2153  * @desc_id: descriptor idn value
2154  * @desc_index: descriptor index
2155  * @param_offset: offset of the parameter to read
2156  * @param_read_buf: pointer to buffer where parameter would be read
2157  * @param_size: sizeof(param_read_buf)
2158  *
2159  * Return 0 in case of success, non-zero otherwise
2160  */
2161 static int ufshcd_read_desc_param(struct ufs_hba *hba,
2162                                   enum desc_idn desc_id,
2163                                   int desc_index,
2164                                   u8 param_offset,
2165                                   u8 *param_read_buf,
2166                                   u8 param_size)
2167 {
2168         int ret;
2169         u8 *desc_buf;
2170         int buff_len;
2171         bool is_kmalloc = true;
2172
2173         /* Safety check */
2174         if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
2175                 return -EINVAL;
2176
2177         /* Get the max length of descriptor from structure filled up at probe
2178          * time.
2179          */
2180         ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
2181
2182         /* Sanity checks */
2183         if (ret || !buff_len) {
2184                 dev_err(hba->dev, "%s: Failed to get full descriptor length",
2185                         __func__);
2186                 return ret;
2187         }
2188
2189         /* Check whether we need temp memory */
2190         if (param_offset != 0 || param_size < buff_len) {
2191                 desc_buf = kmalloc(buff_len, GFP_KERNEL);
2192                 if (!desc_buf)
2193                         return -ENOMEM;
2194         } else {
2195                 desc_buf = param_read_buf;
2196                 is_kmalloc = false;
2197         }
2198
2199         /* Request for full descriptor */
2200         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2201                                         desc_id, desc_index, 0,
2202                                         desc_buf, &buff_len);
2203
2204         if (ret) {
2205                 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
2206                         __func__, desc_id, desc_index, param_offset, ret);
2207                 goto out;
2208         }
2209
2210         /* Sanity check */
2211         if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
2212                 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
2213                         __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
2214                 ret = -EINVAL;
2215                 goto out;
2216         }
2217
2218         /* Check wherher we will not copy more data, than available */
2219         if (is_kmalloc && param_size > buff_len)
2220                 param_size = buff_len;
2221
2222         if (is_kmalloc)
2223                 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
2224 out:
2225         if (is_kmalloc)
2226                 kfree(desc_buf);
2227         return ret;
2228 }
2229
2230 static inline int ufshcd_read_desc(struct ufs_hba *hba,
2231                                    enum desc_idn desc_id,
2232                                    int desc_index,
2233                                    u8 *buf,
2234                                    u32 size)
2235 {
2236         return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
2237 }
2238
2239 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
2240                                          u8 *buf,
2241                                          u32 size)
2242 {
2243         return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
2244 }
2245
2246 int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
2247 {
2248         return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
2249 }
2250 EXPORT_SYMBOL(ufshcd_read_device_desc);
2251
2252 /**
2253  * ufshcd_read_string_desc - read string descriptor
2254  * @hba: pointer to adapter instance
2255  * @desc_index: descriptor index
2256  * @buf: pointer to buffer where descriptor would be read
2257  * @size: size of buf
2258  * @ascii: if true convert from unicode to ascii characters
2259  *
2260  * Return 0 in case of success, non-zero otherwise
2261  */
2262 int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, u8 *buf,
2263                                 u32 size, bool ascii)
2264 {
2265         int err = 0;
2266
2267         err = ufshcd_read_desc(hba,
2268                                 QUERY_DESC_IDN_STRING, desc_index, buf, size);
2269
2270         if (err) {
2271                 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
2272                         __func__, QUERY_REQ_RETRIES, err);
2273                 goto out;
2274         }
2275
2276         if (ascii) {
2277                 int desc_len;
2278                 int ascii_len;
2279                 int i;
2280                 char *buff_ascii;
2281
2282                 desc_len = buf[0];
2283                 /* remove header and divide by 2 to move from UTF16 to UTF8 */
2284                 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
2285                 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
2286                         dev_err(hba->dev, "%s: buffer allocated size is too small\n",
2287                                         __func__);
2288                         err = -ENOMEM;
2289                         goto out;
2290                 }
2291
2292                 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
2293                 if (!buff_ascii) {
2294                         err = -ENOMEM;
2295                         goto out;
2296                 }
2297
2298                 /*
2299                  * the descriptor contains string in UTF16 format
2300                  * we need to convert to utf-8 so it can be displayed
2301                  */
2302                 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
2303                                 desc_len - QUERY_DESC_HDR_SIZE,
2304                                 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
2305
2306                 /* replace non-printable or non-ASCII characters with spaces */
2307                 for (i = 0; i < ascii_len; i++)
2308                         ufshcd_remove_non_printable(&buff_ascii[i]);
2309
2310                 memset(buf + QUERY_DESC_HDR_SIZE, 0,
2311                                 size - QUERY_DESC_HDR_SIZE);
2312                 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
2313                 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
2314                 kfree(buff_ascii);
2315         }
2316 out:
2317         return err;
2318 }
2319 EXPORT_SYMBOL(ufshcd_read_string_desc);
2320
2321 /**
2322  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
2323  * @hba: Pointer to adapter instance
2324  * @lun: lun id
2325  * @param_offset: offset of the parameter to read
2326  * @param_read_buf: pointer to buffer where parameter would be read
2327  * @param_size: sizeof(param_read_buf)
2328  *
2329  * Return 0 in case of success, non-zero otherwise
2330  */
2331 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
2332                                               int lun,
2333                                               enum unit_desc_param param_offset,
2334                                               u8 *param_read_buf,
2335                                               u32 param_size)
2336 {
2337         /*
2338          * Unit descriptors are only available for general purpose LUs (LUN id
2339          * from 0 to 7) and RPMB Well known LU.
2340          */
2341         if (lun != UFS_UPIU_RPMB_WLUN && (lun >= UFS_UPIU_MAX_GENERAL_LUN))
2342                 return -EOPNOTSUPP;
2343
2344         return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
2345                                       param_offset, param_read_buf, param_size);
2346 }
2347
2348 /**
2349  * ufshcd_memory_alloc - allocate memory for host memory space data structures
2350  * @hba: per adapter instance
2351  *
2352  * 1. Allocate DMA memory for Command Descriptor array
2353  *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
2354  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
2355  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
2356  *      (UTMRDL)
2357  * 4. Allocate memory for local reference block(lrb).
2358  *
2359  * Returns 0 for success, non-zero in case of failure
2360  */
2361 static int ufshcd_memory_alloc(struct ufs_hba *hba)
2362 {
2363         size_t utmrdl_size, utrdl_size, ucdl_size;
2364
2365         /* Allocate memory for UTP command descriptors */
2366         ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
2367         hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
2368                                                   ucdl_size,
2369                                                   &hba->ucdl_dma_addr,
2370                                                   GFP_KERNEL);
2371
2372         /*
2373          * UFSHCI requires UTP command descriptor to be 128 byte aligned.
2374          * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
2375          * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
2376          * be aligned to 128 bytes as well
2377          */
2378         if (!hba->ucdl_base_addr ||
2379             WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
2380                 dev_err(hba->dev,
2381                         "Command Descriptor Memory allocation failed\n");
2382                 goto out;
2383         }
2384
2385         /*
2386          * Allocate memory for UTP Transfer descriptors
2387          * UFSHCI requires 1024 byte alignment of UTRD
2388          */
2389         utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
2390         hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
2391                                                    utrdl_size,
2392                                                    &hba->utrdl_dma_addr,
2393                                                    GFP_KERNEL);
2394         if (!hba->utrdl_base_addr ||
2395             WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
2396                 dev_err(hba->dev,
2397                         "Transfer Descriptor Memory allocation failed\n");
2398                 goto out;
2399         }
2400
2401         /*
2402          * Allocate memory for UTP Task Management descriptors
2403          * UFSHCI requires 1024 byte alignment of UTMRD
2404          */
2405         utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
2406         hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
2407                                                     utmrdl_size,
2408                                                     &hba->utmrdl_dma_addr,
2409                                                     GFP_KERNEL);
2410         if (!hba->utmrdl_base_addr ||
2411             WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
2412                 dev_err(hba->dev,
2413                 "Task Management Descriptor Memory allocation failed\n");
2414                 goto out;
2415         }
2416
2417         /* Allocate memory for local reference block */
2418         hba->lrb = devm_kzalloc(hba->dev,
2419                                 hba->nutrs * sizeof(struct ufshcd_lrb),
2420                                 GFP_KERNEL);
2421         if (!hba->lrb) {
2422                 dev_err(hba->dev, "LRB Memory allocation failed\n");
2423                 goto out;
2424         }
2425         return 0;
2426 out:
2427         return -ENOMEM;
2428 }
2429
2430 /**
2431  * ufshcd_host_memory_configure - configure local reference block with
2432  *                              memory offsets
2433  * @hba: per adapter instance
2434  *
2435  * Configure Host memory space
2436  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
2437  * address.
2438  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
2439  * and PRDT offset.
2440  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
2441  * into local reference block.
2442  */
2443 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
2444 {
2445         struct utp_transfer_cmd_desc *cmd_descp;
2446         struct utp_transfer_req_desc *utrdlp;
2447         dma_addr_t cmd_desc_dma_addr;
2448         dma_addr_t cmd_desc_element_addr;
2449         u16 response_offset;
2450         u16 prdt_offset;
2451         int cmd_desc_size;
2452         int i;
2453
2454         utrdlp = hba->utrdl_base_addr;
2455         cmd_descp = hba->ucdl_base_addr;
2456
2457         response_offset =
2458                 offsetof(struct utp_transfer_cmd_desc, response_upiu);
2459         prdt_offset =
2460                 offsetof(struct utp_transfer_cmd_desc, prd_table);
2461
2462         cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
2463         cmd_desc_dma_addr = hba->ucdl_dma_addr;
2464
2465         for (i = 0; i < hba->nutrs; i++) {
2466                 /* Configure UTRD with command descriptor base address */
2467                 cmd_desc_element_addr =
2468                                 (cmd_desc_dma_addr + (cmd_desc_size * i));
2469                 utrdlp[i].command_desc_base_addr_lo =
2470                                 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
2471                 utrdlp[i].command_desc_base_addr_hi =
2472                                 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
2473
2474                 /* Response upiu and prdt offset should be in double words */
2475                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
2476                         utrdlp[i].response_upiu_offset =
2477                                 cpu_to_le16(response_offset);
2478                         utrdlp[i].prd_table_offset =
2479                                 cpu_to_le16(prdt_offset);
2480                         utrdlp[i].response_upiu_length =
2481                                 cpu_to_le16(ALIGNED_UPIU_SIZE);
2482                 } else {
2483                         utrdlp[i].response_upiu_offset =
2484                                 cpu_to_le16((response_offset >> 2));
2485                         utrdlp[i].prd_table_offset =
2486                                 cpu_to_le16((prdt_offset >> 2));
2487                         utrdlp[i].response_upiu_length =
2488                                 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
2489                 }
2490
2491                 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
2492                 hba->lrb[i].ucd_req_ptr =
2493                         (struct utp_upiu_req *)(cmd_descp + i);
2494                 hba->lrb[i].ucd_rsp_ptr =
2495                         (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2496                 hba->lrb[i].ucd_prdt_ptr =
2497                         (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2498         }
2499 }
2500
2501 /**
2502  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
2503  * @hba: per adapter instance
2504  *
2505  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
2506  * in order to initialize the Unipro link startup procedure.
2507  * Once the Unipro links are up, the device connected to the controller
2508  * is detected.
2509  *
2510  * Returns 0 on success, non-zero value on failure
2511  */
2512 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
2513 {
2514         struct uic_command uic_cmd = {0};
2515         int ret;
2516
2517         uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
2518
2519         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2520         if (ret)
2521                 dev_err(hba->dev,
2522                         "dme-link-startup: error code %d\n", ret);
2523         return ret;
2524 }
2525
2526 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
2527 {
2528         #define MIN_DELAY_BEFORE_DME_CMDS_US    1000
2529         unsigned long min_sleep_time_us;
2530
2531         if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
2532                 return;
2533
2534         /*
2535          * last_dme_cmd_tstamp will be 0 only for 1st call to
2536          * this function
2537          */
2538         if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
2539                 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
2540         } else {
2541                 unsigned long delta =
2542                         (unsigned long) ktime_to_us(
2543                                 ktime_sub(ktime_get(),
2544                                 hba->last_dme_cmd_tstamp));
2545
2546                 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
2547                         min_sleep_time_us =
2548                                 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
2549                 else
2550                         return; /* no more delay required */
2551         }
2552
2553         /* allow sleep for extra 50us if needed */
2554         usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
2555 }
2556
2557 /**
2558  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
2559  * @hba: per adapter instance
2560  * @attr_sel: uic command argument1
2561  * @attr_set: attribute set type as uic command argument2
2562  * @mib_val: setting value as uic command argument3
2563  * @peer: indicate whether peer or local
2564  *
2565  * Returns 0 on success, non-zero value on failure
2566  */
2567 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
2568                         u8 attr_set, u32 mib_val, u8 peer)
2569 {
2570         struct uic_command uic_cmd = {0};
2571         static const char *const action[] = {
2572                 "dme-set",
2573                 "dme-peer-set"
2574         };
2575         const char *set = action[!!peer];
2576         int ret;
2577         int retries = UFS_UIC_COMMAND_RETRIES;
2578
2579         uic_cmd.command = peer ?
2580                 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
2581         uic_cmd.argument1 = attr_sel;
2582         uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
2583         uic_cmd.argument3 = mib_val;
2584
2585         do {
2586                 /* for peer attributes we retry upon failure */
2587                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2588                 if (ret)
2589                         dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
2590                                 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
2591         } while (ret && peer && --retries);
2592
2593         if (!retries)
2594                 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
2595                                 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
2596                                 retries);
2597
2598         return ret;
2599 }
2600 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
2601
2602 /**
2603  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
2604  * @hba: per adapter instance
2605  * @attr_sel: uic command argument1
2606  * @mib_val: the value of the attribute as returned by the UIC command
2607  * @peer: indicate whether peer or local
2608  *
2609  * Returns 0 on success, non-zero value on failure
2610  */
2611 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
2612                         u32 *mib_val, u8 peer)
2613 {
2614         struct uic_command uic_cmd = {0};
2615         static const char *const action[] = {
2616                 "dme-get",
2617                 "dme-peer-get"
2618         };
2619         const char *get = action[!!peer];
2620         int ret;
2621         int retries = UFS_UIC_COMMAND_RETRIES;
2622         struct ufs_pa_layer_attr orig_pwr_info;
2623         struct ufs_pa_layer_attr temp_pwr_info;
2624         bool pwr_mode_change = false;
2625
2626         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
2627                 orig_pwr_info = hba->pwr_info;
2628                 temp_pwr_info = orig_pwr_info;
2629
2630                 if (orig_pwr_info.pwr_tx == FAST_MODE ||
2631                     orig_pwr_info.pwr_rx == FAST_MODE) {
2632                         temp_pwr_info.pwr_tx = FASTAUTO_MODE;
2633                         temp_pwr_info.pwr_rx = FASTAUTO_MODE;
2634                         pwr_mode_change = true;
2635                 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
2636                     orig_pwr_info.pwr_rx == SLOW_MODE) {
2637                         temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
2638                         temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
2639                         pwr_mode_change = true;
2640                 }
2641                 if (pwr_mode_change) {
2642                         ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
2643                         if (ret)
2644                                 goto out;
2645                 }
2646         }
2647
2648         uic_cmd.command = peer ?
2649                 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
2650         uic_cmd.argument1 = attr_sel;
2651
2652         do {
2653                 /* for peer attributes we retry upon failure */
2654                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
2655                 if (ret)
2656                         dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
2657                                 get, UIC_GET_ATTR_ID(attr_sel), ret);
2658         } while (ret && peer && --retries);
2659
2660         if (!retries)
2661                 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
2662                                 get, UIC_GET_ATTR_ID(attr_sel), retries);
2663
2664         if (mib_val && !ret)
2665                 *mib_val = uic_cmd.argument3;
2666
2667         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
2668             && pwr_mode_change)
2669                 ufshcd_change_power_mode(hba, &orig_pwr_info);
2670 out:
2671         return ret;
2672 }
2673 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
2674
2675 /**
2676  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
2677  * state) and waits for it to take effect.
2678  *
2679  * @hba: per adapter instance
2680  * @cmd: UIC command to execute
2681  *
2682  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
2683  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
2684  * and device UniPro link and hence it's final completion would be indicated by
2685  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
2686  * addition to normal UIC command completion Status (UCCS). This function only
2687  * returns after the relevant status bits indicate the completion.
2688  *
2689  * Returns 0 on success, non-zero value on failure
2690  */
2691 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
2692 {
2693         struct completion uic_async_done;
2694         unsigned long flags;
2695         u8 status;
2696         int ret;
2697         bool reenable_intr = false;
2698
2699         mutex_lock(&hba->uic_cmd_mutex);
2700         init_completion(&uic_async_done);
2701         ufshcd_add_delay_before_dme_cmd(hba);
2702
2703         spin_lock_irqsave(hba->host->host_lock, flags);
2704         hba->uic_async_done = &uic_async_done;
2705         if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
2706                 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
2707                 /*
2708                  * Make sure UIC command completion interrupt is disabled before
2709                  * issuing UIC command.
2710                  */
2711                 wmb();
2712                 reenable_intr = true;
2713         }
2714         ret = __ufshcd_send_uic_cmd(hba, cmd, false);
2715         spin_unlock_irqrestore(hba->host->host_lock, flags);
2716         if (ret) {
2717                 dev_err(hba->dev,
2718                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
2719                         cmd->command, cmd->argument3, ret);
2720                 goto out;
2721         }
2722
2723         if (!wait_for_completion_timeout(hba->uic_async_done,
2724                                          msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
2725                 dev_err(hba->dev,
2726                         "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
2727                         cmd->command, cmd->argument3);
2728                 ret = -ETIMEDOUT;
2729                 goto out;
2730         }
2731
2732         status = ufshcd_get_upmcrs(hba);
2733         if (status != PWR_LOCAL) {
2734                 dev_err(hba->dev,
2735                         "pwr ctrl cmd 0x%0x failed, host upmcrs:0x%x\n",
2736                         cmd->command, status);
2737                 ret = (status != PWR_OK) ? status : -1;
2738         }
2739 out:
2740         spin_lock_irqsave(hba->host->host_lock, flags);
2741         hba->active_uic_cmd = NULL;
2742         hba->uic_async_done = NULL;
2743         if (reenable_intr)
2744                 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
2745         spin_unlock_irqrestore(hba->host->host_lock, flags);
2746         mutex_unlock(&hba->uic_cmd_mutex);
2747
2748         return ret;
2749 }
2750
2751 /**
2752  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
2753  *                              using DME_SET primitives.
2754  * @hba: per adapter instance
2755  * @mode: powr mode value
2756  *
2757  * Returns 0 on success, non-zero value on failure
2758  */
2759 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
2760 {
2761         struct uic_command uic_cmd = {0};
2762         int ret;
2763
2764         if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
2765                 ret = ufshcd_dme_set(hba,
2766                                 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
2767                 if (ret) {
2768                         dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
2769                                                 __func__, ret);
2770                         goto out;
2771                 }
2772         }
2773
2774         uic_cmd.command = UIC_CMD_DME_SET;
2775         uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
2776         uic_cmd.argument3 = mode;
2777         ufshcd_hold(hba, false);
2778         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2779         ufshcd_release(hba);
2780
2781 out:
2782         return ret;
2783 }
2784
2785 static int ufshcd_link_recovery(struct ufs_hba *hba)
2786 {
2787         int ret;
2788         unsigned long flags;
2789
2790         spin_lock_irqsave(hba->host->host_lock, flags);
2791         hba->ufshcd_state = UFSHCD_STATE_RESET;
2792         ufshcd_set_eh_in_progress(hba);
2793         spin_unlock_irqrestore(hba->host->host_lock, flags);
2794
2795         ret = ufshcd_host_reset_and_restore(hba);
2796
2797         spin_lock_irqsave(hba->host->host_lock, flags);
2798         if (ret)
2799                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
2800         ufshcd_clear_eh_in_progress(hba);
2801         spin_unlock_irqrestore(hba->host->host_lock, flags);
2802
2803         if (ret)
2804                 dev_err(hba->dev, "%s: link recovery failed, err %d",
2805                         __func__, ret);
2806
2807         return ret;
2808 }
2809
2810 static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
2811 {
2812         int ret;
2813         struct uic_command uic_cmd = {0};
2814
2815         uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
2816         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2817
2818         if (ret) {
2819                 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
2820                         __func__, ret);
2821
2822                 /*
2823                  * If link recovery fails then return error so that caller
2824                  * don't retry the hibern8 enter again.
2825                  */
2826                 if (ufshcd_link_recovery(hba))
2827                         ret = -ENOLINK;
2828         }
2829
2830         return ret;
2831 }
2832
2833 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
2834 {
2835         int ret = 0, retries;
2836
2837         for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
2838                 ret = __ufshcd_uic_hibern8_enter(hba);
2839                 if (!ret || ret == -ENOLINK)
2840                         goto out;
2841         }
2842 out:
2843         return ret;
2844 }
2845
2846 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
2847 {
2848         struct uic_command uic_cmd = {0};
2849         int ret;
2850
2851         uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
2852         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
2853         if (ret) {
2854                 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
2855                         __func__, ret);
2856                 ret = ufshcd_link_recovery(hba);
2857         }
2858
2859         return ret;
2860 }
2861
2862  /**
2863  * ufshcd_init_pwr_info - setting the POR (power on reset)
2864  * values in hba power info
2865  * @hba: per-adapter instance
2866  */
2867 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
2868 {
2869         hba->pwr_info.gear_rx = UFS_PWM_G1;
2870         hba->pwr_info.gear_tx = UFS_PWM_G1;
2871         hba->pwr_info.lane_rx = 1;
2872         hba->pwr_info.lane_tx = 1;
2873         hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
2874         hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
2875         hba->pwr_info.hs_rate = 0;
2876 }
2877
2878 /**
2879  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
2880  * @hba: per-adapter instance
2881  */
2882 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
2883 {
2884         struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
2885
2886         if (hba->max_pwr_info.is_valid)
2887                 return 0;
2888
2889         pwr_info->pwr_tx = FASTAUTO_MODE;
2890         pwr_info->pwr_rx = FASTAUTO_MODE;
2891         pwr_info->hs_rate = PA_HS_MODE_B;
2892
2893         /* Get the connected lane count */
2894         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
2895                         &pwr_info->lane_rx);
2896         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
2897                         &pwr_info->lane_tx);
2898
2899         if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
2900                 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
2901                                 __func__,
2902                                 pwr_info->lane_rx,
2903                                 pwr_info->lane_tx);
2904                 return -EINVAL;
2905         }
2906
2907         /*
2908          * First, get the maximum gears of HS speed.
2909          * If a zero value, it means there is no HSGEAR capability.
2910          * Then, get the maximum gears of PWM speed.
2911          */
2912         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
2913         if (!pwr_info->gear_rx) {
2914                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
2915                                 &pwr_info->gear_rx);
2916                 if (!pwr_info->gear_rx) {
2917                         dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
2918                                 __func__, pwr_info->gear_rx);
2919                         return -EINVAL;
2920                 }
2921                 pwr_info->pwr_rx = SLOWAUTO_MODE;
2922         }
2923
2924         ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
2925                         &pwr_info->gear_tx);
2926         if (!pwr_info->gear_tx) {
2927                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
2928                                 &pwr_info->gear_tx);
2929                 if (!pwr_info->gear_tx) {
2930                         dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
2931                                 __func__, pwr_info->gear_tx);
2932                         return -EINVAL;
2933                 }
2934                 pwr_info->pwr_tx = SLOWAUTO_MODE;
2935         }
2936
2937         hba->max_pwr_info.is_valid = true;
2938         return 0;
2939 }
2940
2941 static int ufshcd_change_power_mode(struct ufs_hba *hba,
2942                              struct ufs_pa_layer_attr *pwr_mode)
2943 {
2944         int ret;
2945
2946         /* if already configured to the requested pwr_mode */
2947         if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
2948             pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
2949             pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
2950             pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
2951             pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
2952             pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
2953             pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
2954                 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
2955                 return 0;
2956         }
2957
2958         /*
2959          * Configure attributes for power mode change with below.
2960          * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
2961          * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
2962          * - PA_HSSERIES
2963          */
2964         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
2965         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
2966                         pwr_mode->lane_rx);
2967         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
2968                         pwr_mode->pwr_rx == FAST_MODE)
2969                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
2970         else
2971                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
2972
2973         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
2974         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
2975                         pwr_mode->lane_tx);
2976         if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
2977                         pwr_mode->pwr_tx == FAST_MODE)
2978                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
2979         else
2980                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
2981
2982         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
2983             pwr_mode->pwr_tx == FASTAUTO_MODE ||
2984             pwr_mode->pwr_rx == FAST_MODE ||
2985             pwr_mode->pwr_tx == FAST_MODE)
2986                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
2987                                                 pwr_mode->hs_rate);
2988
2989         ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
2990                         | pwr_mode->pwr_tx);
2991
2992         if (ret) {
2993                 dev_err(hba->dev,
2994                         "%s: power mode change failed %d\n", __func__, ret);
2995         } else {
2996                 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
2997                                                                 pwr_mode);
2998
2999                 memcpy(&hba->pwr_info, pwr_mode,
3000                         sizeof(struct ufs_pa_layer_attr));
3001         }
3002
3003         return ret;
3004 }
3005
3006 /**
3007  * ufshcd_config_pwr_mode - configure a new power mode
3008  * @hba: per-adapter instance
3009  * @desired_pwr_mode: desired power configuration
3010  */
3011 static int ufshcd_config_pwr_mode(struct ufs_hba *hba,
3012                 struct ufs_pa_layer_attr *desired_pwr_mode)
3013 {
3014         struct ufs_pa_layer_attr final_params = { 0 };
3015         int ret;
3016
3017         ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
3018                                         desired_pwr_mode, &final_params);
3019
3020         if (ret)
3021                 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
3022
3023         ret = ufshcd_change_power_mode(hba, &final_params);
3024
3025         return ret;
3026 }
3027
3028 /**
3029  * ufshcd_complete_dev_init() - checks device readiness
3030  * hba: per-adapter instance
3031  *
3032  * Set fDeviceInit flag and poll until device toggles it.
3033  */
3034 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
3035 {
3036         int i;
3037         int err;
3038         bool flag_res = 1;
3039
3040         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
3041                 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
3042         if (err) {
3043                 dev_err(hba->dev,
3044                         "%s setting fDeviceInit flag failed with error %d\n",
3045                         __func__, err);
3046                 goto out;
3047         }
3048
3049         /* poll for max. 1000 iterations for fDeviceInit flag to clear */
3050         for (i = 0; i < 1000 && !err && flag_res; i++)
3051                 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
3052                         QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
3053
3054         if (err)
3055                 dev_err(hba->dev,
3056                         "%s reading fDeviceInit flag failed with error %d\n",
3057                         __func__, err);
3058         else if (flag_res)
3059                 dev_err(hba->dev,
3060                         "%s fDeviceInit was not cleared by the device\n",
3061                         __func__);
3062
3063 out:
3064         return err;
3065 }
3066
3067 /**
3068  * ufshcd_make_hba_operational - Make UFS controller operational
3069  * @hba: per adapter instance
3070  *
3071  * To bring UFS host controller to operational state,
3072  * 1. Enable required interrupts
3073  * 2. Configure interrupt aggregation
3074  * 3. Program UTRL and UTMRL base address
3075  * 4. Configure run-stop-registers
3076  *
3077  * Returns 0 on success, non-zero value on failure
3078  */
3079 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
3080 {
3081         int err = 0;
3082         u32 reg;
3083
3084         /* Enable required interrupts */
3085         ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
3086
3087         /* Configure interrupt aggregation */
3088         if (ufshcd_is_intr_aggr_allowed(hba))
3089                 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
3090         else
3091                 ufshcd_disable_intr_aggr(hba);
3092
3093         /* Configure UTRL and UTMRL base address registers */
3094         ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
3095                         REG_UTP_TRANSFER_REQ_LIST_BASE_L);
3096         ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
3097                         REG_UTP_TRANSFER_REQ_LIST_BASE_H);
3098         ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
3099                         REG_UTP_TASK_REQ_LIST_BASE_L);
3100         ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
3101                         REG_UTP_TASK_REQ_LIST_BASE_H);
3102
3103         /*
3104          * Make sure base address and interrupt setup are updated before
3105          * enabling the run/stop registers below.
3106          */
3107         wmb();
3108
3109         /*
3110          * UCRDY, UTMRLDY and UTRLRDY bits must be 1
3111          */
3112         reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
3113         if (!(ufshcd_get_lists_status(reg))) {
3114                 ufshcd_enable_run_stop_reg(hba);
3115         } else {
3116                 dev_err(hba->dev,
3117                         "Host controller not ready to process requests");
3118                 err = -EIO;
3119                 goto out;
3120         }
3121
3122 out:
3123         return err;
3124 }
3125
3126 /**
3127  * ufshcd_hba_stop - Send controller to reset state
3128  * @hba: per adapter instance
3129  * @can_sleep: perform sleep or just spin
3130  */
3131 static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
3132 {
3133         int err;
3134
3135         ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
3136         err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
3137                                         CONTROLLER_ENABLE, CONTROLLER_DISABLE,
3138                                         10, 1, can_sleep);
3139         if (err)
3140                 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
3141 }
3142
3143 /**
3144  * ufshcd_hba_enable - initialize the controller
3145  * @hba: per adapter instance
3146  *
3147  * The controller resets itself and controller firmware initialization
3148  * sequence kicks off. When controller is ready it will set
3149  * the Host Controller Enable bit to 1.
3150  *
3151  * Returns 0 on success, non-zero value on failure
3152  */
3153 static int ufshcd_hba_enable(struct ufs_hba *hba)
3154 {
3155         int retry;
3156
3157         /*
3158          * msleep of 1 and 5 used in this function might result in msleep(20),
3159          * but it was necessary to send the UFS FPGA to reset mode during
3160          * development and testing of this driver. msleep can be changed to
3161          * mdelay and retry count can be reduced based on the controller.
3162          */
3163         if (!ufshcd_is_hba_active(hba))
3164                 /* change controller state to "reset state" */
3165                 ufshcd_hba_stop(hba, true);
3166
3167         /* UniPro link is disabled at this point */
3168         ufshcd_set_link_off(hba);
3169
3170         ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
3171
3172         /* start controller initialization sequence */
3173         ufshcd_hba_start(hba);
3174
3175         /*
3176          * To initialize a UFS host controller HCE bit must be set to 1.
3177          * During initialization the HCE bit value changes from 1->0->1.
3178          * When the host controller completes initialization sequence
3179          * it sets the value of HCE bit to 1. The same HCE bit is read back
3180          * to check if the controller has completed initialization sequence.
3181          * So without this delay the value HCE = 1, set in the previous
3182          * instruction might be read back.
3183          * This delay can be changed based on the controller.
3184          */
3185         msleep(1);
3186
3187         /* wait for the host controller to complete initialization */
3188         retry = 10;
3189         while (ufshcd_is_hba_active(hba)) {
3190                 if (retry) {
3191                         retry--;
3192                 } else {
3193                         dev_err(hba->dev,
3194                                 "Controller enable failed\n");
3195                         return -EIO;
3196                 }
3197                 msleep(5);
3198         }
3199
3200         /* enable UIC related interrupts */
3201         ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
3202
3203         ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
3204
3205         return 0;
3206 }
3207
3208 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
3209 {
3210         int tx_lanes, i, err = 0;
3211
3212         if (!peer)
3213                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3214                                &tx_lanes);
3215         else
3216                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3217                                     &tx_lanes);
3218         for (i = 0; i < tx_lanes; i++) {
3219                 if (!peer)
3220                         err = ufshcd_dme_set(hba,
3221                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
3222                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
3223                                         0);
3224                 else
3225                         err = ufshcd_dme_peer_set(hba,
3226                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
3227                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
3228                                         0);
3229                 if (err) {
3230                         dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
3231                                 __func__, peer, i, err);
3232                         break;
3233                 }
3234         }
3235
3236         return err;
3237 }
3238
3239 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
3240 {
3241         return ufshcd_disable_tx_lcc(hba, true);
3242 }
3243
3244 /**
3245  * ufshcd_link_startup - Initialize unipro link startup
3246  * @hba: per adapter instance
3247  *
3248  * Returns 0 for success, non-zero in case of failure
3249  */
3250 static int ufshcd_link_startup(struct ufs_hba *hba)
3251 {
3252         int ret;
3253         int retries = DME_LINKSTARTUP_RETRIES;
3254         bool link_startup_again = false;
3255
3256         /*
3257          * If UFS device isn't active then we will have to issue link startup
3258          * 2 times to make sure the device state move to active.
3259          */
3260         if (!ufshcd_is_ufs_dev_active(hba))
3261                 link_startup_again = true;
3262
3263 link_startup:
3264         do {
3265                 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
3266
3267                 ret = ufshcd_dme_link_startup(hba);
3268
3269                 /* check if device is detected by inter-connect layer */
3270                 if (!ret && !ufshcd_is_device_present(hba)) {
3271                         dev_err(hba->dev, "%s: Device not present\n", __func__);
3272                         ret = -ENXIO;
3273                         goto out;
3274                 }
3275
3276                 /*
3277                  * DME link lost indication is only received when link is up,
3278                  * but we can't be sure if the link is up until link startup
3279                  * succeeds. So reset the local Uni-Pro and try again.
3280                  */
3281                 if (ret && ufshcd_hba_enable(hba))
3282                         goto out;
3283         } while (ret && retries--);
3284
3285         if (ret)
3286                 /* failed to get the link up... retire */
3287                 goto out;
3288
3289         if (link_startup_again) {
3290                 link_startup_again = false;
3291                 retries = DME_LINKSTARTUP_RETRIES;
3292                 goto link_startup;
3293         }
3294
3295         if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
3296                 ret = ufshcd_disable_device_tx_lcc(hba);
3297                 if (ret)
3298                         goto out;
3299         }
3300
3301         /* Include any host controller configuration via UIC commands */
3302         ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
3303         if (ret)
3304                 goto out;
3305
3306         ret = ufshcd_make_hba_operational(hba);
3307 out:
3308         if (ret)
3309                 dev_err(hba->dev, "link startup failed %d\n", ret);
3310         return ret;
3311 }
3312
3313 /**
3314  * ufshcd_verify_dev_init() - Verify device initialization
3315  * @hba: per-adapter instance
3316  *
3317  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
3318  * device Transport Protocol (UTP) layer is ready after a reset.
3319  * If the UTP layer at the device side is not initialized, it may
3320  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
3321  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
3322  */
3323 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
3324 {
3325         int err = 0;
3326         int retries;
3327
3328         ufshcd_hold(hba, false);
3329         mutex_lock(&hba->dev_cmd.lock);
3330         for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
3331                 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
3332                                                NOP_OUT_TIMEOUT);
3333
3334                 if (!err || err == -ETIMEDOUT)
3335                         break;
3336
3337                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
3338         }
3339         mutex_unlock(&hba->dev_cmd.lock);
3340         ufshcd_release(hba);
3341
3342         if (err)
3343                 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
3344         return err;
3345 }
3346
3347 /**
3348  * ufshcd_set_queue_depth - set lun queue depth
3349  * @sdev: pointer to SCSI device
3350  *
3351  * Read bLUQueueDepth value and activate scsi tagged command
3352  * queueing. For WLUN, queue depth is set to 1. For best-effort
3353  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
3354  * value that host can queue.
3355  */
3356 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
3357 {
3358         int ret = 0;
3359         u8 lun_qdepth;
3360         struct ufs_hba *hba;
3361
3362         hba = shost_priv(sdev->host);
3363
3364         lun_qdepth = hba->nutrs;
3365         ret = ufshcd_read_unit_desc_param(hba,
3366                                           ufshcd_scsi_to_upiu_lun(sdev->lun),
3367                                           UNIT_DESC_PARAM_LU_Q_DEPTH,
3368                                           &lun_qdepth,
3369                                           sizeof(lun_qdepth));
3370
3371         /* Some WLUN doesn't support unit descriptor */
3372         if (ret == -EOPNOTSUPP)
3373                 lun_qdepth = 1;
3374         else if (!lun_qdepth)
3375                 /* eventually, we can figure out the real queue depth */
3376                 lun_qdepth = hba->nutrs;
3377         else
3378                 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
3379
3380         dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
3381                         __func__, lun_qdepth);
3382         scsi_change_queue_depth(sdev, lun_qdepth);
3383 }
3384
3385 /*
3386  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
3387  * @hba: per-adapter instance
3388  * @lun: UFS device lun id
3389  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
3390  *
3391  * Returns 0 in case of success and b_lu_write_protect status would be returned
3392  * @b_lu_write_protect parameter.
3393  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
3394  * Returns -EINVAL in case of invalid parameters passed to this function.
3395  */
3396 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
3397                             u8 lun,
3398                             u8 *b_lu_write_protect)
3399 {
3400         int ret;
3401
3402         if (!b_lu_write_protect)
3403                 ret = -EINVAL;
3404         /*
3405          * According to UFS device spec, RPMB LU can't be write
3406          * protected so skip reading bLUWriteProtect parameter for
3407          * it. For other W-LUs, UNIT DESCRIPTOR is not available.
3408          */
3409         else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
3410                 ret = -ENOTSUPP;
3411         else
3412                 ret = ufshcd_read_unit_desc_param(hba,
3413                                           lun,
3414                                           UNIT_DESC_PARAM_LU_WR_PROTECT,
3415                                           b_lu_write_protect,
3416                                           sizeof(*b_lu_write_protect));
3417         return ret;
3418 }
3419
3420 /**
3421  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
3422  * status
3423  * @hba: per-adapter instance
3424  * @sdev: pointer to SCSI device
3425  *
3426  */
3427 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
3428                                                     struct scsi_device *sdev)
3429 {
3430         if (hba->dev_info.f_power_on_wp_en &&
3431             !hba->dev_info.is_lu_power_on_wp) {
3432                 u8 b_lu_write_protect;
3433
3434                 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
3435                                       &b_lu_write_protect) &&
3436                     (b_lu_write_protect == UFS_LU_POWER_ON_WP))
3437                         hba->dev_info.is_lu_power_on_wp = true;
3438         }
3439 }
3440
3441 /**
3442  * ufshcd_slave_alloc - handle initial SCSI device configurations
3443  * @sdev: pointer to SCSI device
3444  *
3445  * Returns success
3446  */
3447 static int ufshcd_slave_alloc(struct scsi_device *sdev)
3448 {
3449         struct ufs_hba *hba;
3450
3451         hba = shost_priv(sdev->host);
3452
3453         /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
3454         sdev->use_10_for_ms = 1;
3455
3456         /* allow SCSI layer to restart the device in case of errors */
3457         sdev->allow_restart = 1;
3458
3459         /* REPORT SUPPORTED OPERATION CODES is not supported */
3460         sdev->no_report_opcodes = 1;
3461
3462         /* WRITE_SAME command is not supported */
3463         sdev->no_write_same = 1;
3464
3465         ufshcd_set_queue_depth(sdev);
3466
3467         ufshcd_get_lu_power_on_wp_status(hba, sdev);
3468
3469         return 0;
3470 }
3471
3472 /**
3473  * ufshcd_change_queue_depth - change queue depth
3474  * @sdev: pointer to SCSI device
3475  * @depth: required depth to set
3476  *
3477  * Change queue depth and make sure the max. limits are not crossed.
3478  */
3479 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
3480 {
3481         struct ufs_hba *hba = shost_priv(sdev->host);
3482
3483         if (depth > hba->nutrs)
3484                 depth = hba->nutrs;
3485         return scsi_change_queue_depth(sdev, depth);
3486 }
3487
3488 /**
3489  * ufshcd_slave_configure - adjust SCSI device configurations
3490  * @sdev: pointer to SCSI device
3491  */
3492 static int ufshcd_slave_configure(struct scsi_device *sdev)
3493 {
3494         struct request_queue *q = sdev->request_queue;
3495
3496         blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
3497         blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
3498
3499         return 0;
3500 }
3501
3502 /**
3503  * ufshcd_slave_destroy - remove SCSI device configurations
3504  * @sdev: pointer to SCSI device
3505  */
3506 static void ufshcd_slave_destroy(struct scsi_device *sdev)
3507 {
3508         struct ufs_hba *hba;
3509
3510         hba = shost_priv(sdev->host);
3511         /* Drop the reference as it won't be needed anymore */
3512         if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
3513                 unsigned long flags;
3514
3515                 spin_lock_irqsave(hba->host->host_lock, flags);
3516                 hba->sdev_ufs_device = NULL;
3517                 spin_unlock_irqrestore(hba->host->host_lock, flags);
3518         }
3519 }
3520
3521 /**
3522  * ufshcd_task_req_compl - handle task management request completion
3523  * @hba: per adapter instance
3524  * @index: index of the completed request
3525  * @resp: task management service response
3526  *
3527  * Returns non-zero value on error, zero on success
3528  */
3529 static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index, u8 *resp)
3530 {
3531         struct utp_task_req_desc *task_req_descp;
3532         struct utp_upiu_task_rsp *task_rsp_upiup;
3533         unsigned long flags;
3534         int ocs_value;
3535         int task_result;
3536
3537         spin_lock_irqsave(hba->host->host_lock, flags);
3538
3539         /* Clear completed tasks from outstanding_tasks */
3540         __clear_bit(index, &hba->outstanding_tasks);
3541
3542         task_req_descp = hba->utmrdl_base_addr;
3543         ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
3544
3545         if (ocs_value == OCS_SUCCESS) {
3546                 task_rsp_upiup = (struct utp_upiu_task_rsp *)
3547                                 task_req_descp[index].task_rsp_upiu;
3548                 task_result = be32_to_cpu(task_rsp_upiup->output_param1);
3549                 task_result = task_result & MASK_TM_SERVICE_RESP;
3550                 if (resp)
3551                         *resp = (u8)task_result;
3552         } else {
3553                 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
3554                                 __func__, ocs_value);
3555         }
3556         spin_unlock_irqrestore(hba->host->host_lock, flags);
3557
3558         return ocs_value;
3559 }
3560
3561 /**
3562  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
3563  * @lrb: pointer to local reference block of completed command
3564  * @scsi_status: SCSI command status
3565  *
3566  * Returns value base on SCSI command status
3567  */
3568 static inline int
3569 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
3570 {
3571         int result = 0;
3572
3573         switch (scsi_status) {
3574         case SAM_STAT_CHECK_CONDITION:
3575                 ufshcd_copy_sense_data(lrbp);
3576         case SAM_STAT_GOOD:
3577                 result |= DID_OK << 16 |
3578                           COMMAND_COMPLETE << 8 |
3579                           scsi_status;
3580                 break;
3581         case SAM_STAT_TASK_SET_FULL:
3582         case SAM_STAT_BUSY:
3583         case SAM_STAT_TASK_ABORTED:
3584                 ufshcd_copy_sense_data(lrbp);
3585                 result |= scsi_status;
3586                 break;
3587         default:
3588                 result |= DID_ERROR << 16;
3589                 break;
3590         } /* end of switch */
3591
3592         return result;
3593 }
3594
3595 /**
3596  * ufshcd_transfer_rsp_status - Get overall status of the response
3597  * @hba: per adapter instance
3598  * @lrb: pointer to local reference block of completed command
3599  *
3600  * Returns result of the command to notify SCSI midlayer
3601  */
3602 static inline int
3603 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
3604 {
3605         int result = 0;
3606         int scsi_status;
3607         int ocs;
3608
3609         /* overall command status of utrd */
3610         ocs = ufshcd_get_tr_ocs(lrbp);
3611
3612         switch (ocs) {
3613         case OCS_SUCCESS:
3614                 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
3615
3616                 switch (result) {
3617                 case UPIU_TRANSACTION_RESPONSE:
3618                         /*
3619                          * get the response UPIU result to extract
3620                          * the SCSI command status
3621                          */
3622                         result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
3623
3624                         /*
3625                          * get the result based on SCSI status response
3626                          * to notify the SCSI midlayer of the command status
3627                          */
3628                         scsi_status = result & MASK_SCSI_STATUS;
3629                         result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
3630
3631                         /*
3632                          * Currently we are only supporting BKOPs exception
3633                          * events hence we can ignore BKOPs exception event
3634                          * during power management callbacks. BKOPs exception
3635                          * event is not expected to be raised in runtime suspend
3636                          * callback as it allows the urgent bkops.
3637                          * During system suspend, we are anyway forcefully
3638                          * disabling the bkops and if urgent bkops is needed
3639                          * it will be enabled on system resume. Long term
3640                          * solution could be to abort the system suspend if
3641                          * UFS device needs urgent BKOPs.
3642                          */
3643                         if (!hba->pm_op_in_progress &&
3644                             ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
3645                                 schedule_work(&hba->eeh_work);
3646                         break;
3647                 case UPIU_TRANSACTION_REJECT_UPIU:
3648                         /* TODO: handle Reject UPIU Response */
3649                         result = DID_ERROR << 16;
3650                         dev_err(hba->dev,
3651                                 "Reject UPIU not fully implemented\n");
3652                         break;
3653                 default:
3654                         result = DID_ERROR << 16;
3655                         dev_err(hba->dev,
3656                                 "Unexpected request response code = %x\n",
3657                                 result);
3658                         break;
3659                 }
3660                 break;
3661         case OCS_ABORTED:
3662                 result |= DID_ABORT << 16;
3663                 break;
3664         case OCS_INVALID_COMMAND_STATUS:
3665                 result |= DID_REQUEUE << 16;
3666                 break;
3667         case OCS_INVALID_CMD_TABLE_ATTR:
3668         case OCS_INVALID_PRDT_ATTR:
3669         case OCS_MISMATCH_DATA_BUF_SIZE:
3670         case OCS_MISMATCH_RESP_UPIU_SIZE:
3671         case OCS_PEER_COMM_FAILURE:
3672         case OCS_FATAL_ERROR:
3673         default:
3674                 result |= DID_ERROR << 16;
3675                 dev_err(hba->dev,
3676                 "OCS error from controller = %x\n", ocs);
3677                 break;
3678         } /* end of switch */
3679
3680         return result;
3681 }
3682
3683 /**
3684  * ufshcd_uic_cmd_compl - handle completion of uic command
3685  * @hba: per adapter instance
3686  * @intr_status: interrupt status generated by the controller
3687  */
3688 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
3689 {
3690         if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
3691                 hba->active_uic_cmd->argument2 |=
3692                         ufshcd_get_uic_cmd_result(hba);
3693                 hba->active_uic_cmd->argument3 =
3694                         ufshcd_get_dme_attr_val(hba);
3695                 complete(&hba->active_uic_cmd->done);
3696         }
3697
3698         if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
3699                 complete(hba->uic_async_done);
3700 }
3701
3702 /**
3703  * __ufshcd_transfer_req_compl - handle SCSI and query command completion
3704  * @hba: per adapter instance
3705  * @completed_reqs: requests to complete
3706  */
3707 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
3708                                         unsigned long completed_reqs)
3709 {
3710         struct ufshcd_lrb *lrbp;
3711         struct scsi_cmnd *cmd;
3712         int result;
3713         int index;
3714         struct request *req;
3715
3716         for_each_set_bit(index, &completed_reqs, hba->nutrs) {
3717                 lrbp = &hba->lrb[index];
3718                 cmd = lrbp->cmd;
3719                 if (cmd) {
3720                         result = ufshcd_transfer_rsp_status(hba, lrbp);
3721                         scsi_dma_unmap(cmd);
3722                         cmd->result = result;
3723                         /* Mark completed command as NULL in LRB */
3724                         lrbp->cmd = NULL;
3725                         clear_bit_unlock(index, &hba->lrb_in_use);
3726                         req = cmd->request;
3727                         if (req) {
3728                                 /* Update IO svc time latency histogram */
3729                                 if (req->lat_hist_enabled) {
3730                                         ktime_t completion;
3731                                         u_int64_t delta_us;
3732
3733                                         completion = ktime_get();
3734                                         delta_us = ktime_us_delta(completion,
3735                                                   req->lat_hist_io_start);
3736                                         blk_update_latency_hist(
3737                                                 (rq_data_dir(req) == READ) ?
3738                                                 &hba->io_lat_read :
3739                                                 &hba->io_lat_write, delta_us);
3740                                 }
3741                         }
3742                         /* Do not touch lrbp after scsi done */
3743                         cmd->scsi_done(cmd);
3744                         __ufshcd_release(hba);
3745                 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
3746                         lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
3747                         if (hba->dev_cmd.complete)
3748                                 complete(hba->dev_cmd.complete);
3749                 }
3750         }
3751
3752         /* clear corresponding bits of completed commands */
3753         hba->outstanding_reqs ^= completed_reqs;
3754
3755         ufshcd_clk_scaling_update_busy(hba);
3756
3757         /* we might have free'd some tags above */
3758         wake_up(&hba->dev_cmd.tag_wq);
3759 }
3760
3761 /**
3762  * ufshcd_transfer_req_compl - handle SCSI and query command completion
3763  * @hba: per adapter instance
3764  */
3765 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
3766 {
3767         unsigned long completed_reqs;
3768         u32 tr_doorbell;
3769
3770         /* Resetting interrupt aggregation counters first and reading the
3771          * DOOR_BELL afterward allows us to handle all the completed requests.
3772          * In order to prevent other interrupts starvation the DB is read once
3773          * after reset. The down side of this solution is the possibility of
3774          * false interrupt if device completes another request after resetting
3775          * aggregation and before reading the DB.
3776          */
3777         if (ufshcd_is_intr_aggr_allowed(hba))
3778                 ufshcd_reset_intr_aggr(hba);
3779
3780         tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
3781         completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
3782
3783         __ufshcd_transfer_req_compl(hba, completed_reqs);
3784 }
3785
3786 /**
3787  * ufshcd_disable_ee - disable exception event
3788  * @hba: per-adapter instance
3789  * @mask: exception event to disable
3790  *
3791  * Disables exception event in the device so that the EVENT_ALERT
3792  * bit is not set.
3793  *
3794  * Returns zero on success, non-zero error value on failure.
3795  */
3796 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
3797 {
3798         int err = 0;
3799         u32 val;
3800
3801         if (!(hba->ee_ctrl_mask & mask))
3802                 goto out;
3803
3804         val = hba->ee_ctrl_mask & ~mask;
3805         val &= 0xFFFF; /* 2 bytes */
3806         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
3807                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
3808         if (!err)
3809                 hba->ee_ctrl_mask &= ~mask;
3810 out:
3811         return err;
3812 }
3813
3814 /**
3815  * ufshcd_enable_ee - enable exception event
3816  * @hba: per-adapter instance
3817  * @mask: exception event to enable
3818  *
3819  * Enable corresponding exception event in the device to allow
3820  * device to alert host in critical scenarios.
3821  *
3822  * Returns zero on success, non-zero error value on failure.
3823  */
3824 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
3825 {
3826         int err = 0;
3827         u32 val;
3828
3829         if (hba->ee_ctrl_mask & mask)
3830                 goto out;
3831
3832         val = hba->ee_ctrl_mask | mask;
3833         val &= 0xFFFF; /* 2 bytes */
3834         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
3835                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
3836         if (!err)
3837                 hba->ee_ctrl_mask |= mask;
3838 out:
3839         return err;
3840 }
3841
3842 /**
3843  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
3844  * @hba: per-adapter instance
3845  *
3846  * Allow device to manage background operations on its own. Enabling
3847  * this might lead to inconsistent latencies during normal data transfers
3848  * as the device is allowed to manage its own way of handling background
3849  * operations.
3850  *
3851  * Returns zero on success, non-zero on failure.
3852  */
3853 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
3854 {
3855         int err = 0;
3856
3857         if (hba->auto_bkops_enabled)
3858                 goto out;
3859
3860         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
3861                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
3862         if (err) {
3863                 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
3864                                 __func__, err);
3865                 goto out;
3866         }
3867
3868         hba->auto_bkops_enabled = true;
3869
3870         /* No need of URGENT_BKOPS exception from the device */
3871         err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
3872         if (err)
3873                 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
3874                                 __func__, err);
3875 out:
3876         return err;
3877 }
3878
3879 /**
3880  * ufshcd_disable_auto_bkops - block device in doing background operations
3881  * @hba: per-adapter instance
3882  *
3883  * Disabling background operations improves command response latency but
3884  * has drawback of device moving into critical state where the device is
3885  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
3886  * host is idle so that BKOPS are managed effectively without any negative
3887  * impacts.
3888  *
3889  * Returns zero on success, non-zero on failure.
3890  */
3891 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
3892 {
3893         int err = 0;
3894
3895         if (!hba->auto_bkops_enabled)
3896                 goto out;
3897
3898         /*
3899          * If host assisted BKOPs is to be enabled, make sure
3900          * urgent bkops exception is allowed.
3901          */
3902         err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
3903         if (err) {
3904                 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
3905                                 __func__, err);
3906                 goto out;
3907         }
3908
3909         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
3910                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
3911         if (err) {
3912                 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
3913                                 __func__, err);
3914                 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
3915                 goto out;
3916         }
3917
3918         hba->auto_bkops_enabled = false;
3919 out:
3920         return err;
3921 }
3922
3923 /**
3924  * ufshcd_force_reset_auto_bkops - force reset auto bkops state
3925  * @hba: per adapter instance
3926  *
3927  * After a device reset the device may toggle the BKOPS_EN flag
3928  * to default value. The s/w tracking variables should be updated
3929  * as well. This function would change the auto-bkops state based on
3930  * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
3931  */
3932 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
3933 {
3934         if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
3935                 hba->auto_bkops_enabled = false;
3936                 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
3937                 ufshcd_enable_auto_bkops(hba);
3938         } else {
3939                 hba->auto_bkops_enabled = true;
3940                 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
3941                 ufshcd_disable_auto_bkops(hba);
3942         }
3943 }
3944
3945 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
3946 {
3947         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3948                         QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
3949 }
3950
3951 /**
3952  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
3953  * @hba: per-adapter instance
3954  * @status: bkops_status value
3955  *
3956  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
3957  * flag in the device to permit background operations if the device
3958  * bkops_status is greater than or equal to "status" argument passed to
3959  * this function, disable otherwise.
3960  *
3961  * Returns 0 for success, non-zero in case of failure.
3962  *
3963  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
3964  * to know whether auto bkops is enabled or disabled after this function
3965  * returns control to it.
3966  */
3967 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
3968                              enum bkops_status status)
3969 {
3970         int err;
3971         u32 curr_status = 0;
3972
3973         err = ufshcd_get_bkops_status(hba, &curr_status);
3974         if (err) {
3975                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
3976                                 __func__, err);
3977                 goto out;
3978         } else if (curr_status > BKOPS_STATUS_MAX) {
3979                 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
3980                                 __func__, curr_status);
3981                 err = -EINVAL;
3982                 goto out;
3983         }
3984
3985         if (curr_status >= status)
3986                 err = ufshcd_enable_auto_bkops(hba);
3987         else
3988                 err = ufshcd_disable_auto_bkops(hba);
3989 out:
3990         return err;
3991 }
3992
3993 /**
3994  * ufshcd_urgent_bkops - handle urgent bkops exception event
3995  * @hba: per-adapter instance
3996  *
3997  * Enable fBackgroundOpsEn flag in the device to permit background
3998  * operations.
3999  *
4000  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
4001  * and negative error value for any other failure.
4002  */
4003 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
4004 {
4005         return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
4006 }
4007
4008 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
4009 {
4010         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
4011                         QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
4012 }
4013
4014 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
4015 {
4016         int err;
4017         u32 curr_status = 0;
4018
4019         if (hba->is_urgent_bkops_lvl_checked)
4020                 goto enable_auto_bkops;
4021
4022         err = ufshcd_get_bkops_status(hba, &curr_status);
4023         if (err) {
4024                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
4025                                 __func__, err);
4026                 goto out;
4027         }
4028
4029         /*
4030          * We are seeing that some devices are raising the urgent bkops
4031          * exception events even when BKOPS status doesn't indicate performace
4032          * impacted or critical. Handle these device by determining their urgent
4033          * bkops status at runtime.
4034          */
4035         if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
4036                 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
4037                                 __func__, curr_status);
4038                 /* update the current status as the urgent bkops level */
4039                 hba->urgent_bkops_lvl = curr_status;
4040                 hba->is_urgent_bkops_lvl_checked = true;
4041         }
4042
4043 enable_auto_bkops:
4044         err = ufshcd_enable_auto_bkops(hba);
4045 out:
4046         if (err < 0)
4047                 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
4048                                 __func__, err);
4049 }
4050
4051 /**
4052  * ufshcd_exception_event_handler - handle exceptions raised by device
4053  * @work: pointer to work data
4054  *
4055  * Read bExceptionEventStatus attribute from the device and handle the
4056  * exception event accordingly.
4057  */
4058 static void ufshcd_exception_event_handler(struct work_struct *work)
4059 {
4060         struct ufs_hba *hba;
4061         int err;
4062         u32 status = 0;
4063         hba = container_of(work, struct ufs_hba, eeh_work);
4064
4065         pm_runtime_get_sync(hba->dev);
4066         scsi_block_requests(hba->host);
4067         err = ufshcd_get_ee_status(hba, &status);
4068         if (err) {
4069                 dev_err(hba->dev, "%s: failed to get exception status %d\n",
4070                                 __func__, err);
4071                 goto out;
4072         }
4073
4074         status &= hba->ee_ctrl_mask;
4075
4076         if (status & MASK_EE_URGENT_BKOPS)
4077                 ufshcd_bkops_exception_event_handler(hba);
4078
4079 out:
4080         scsi_unblock_requests(hba->host);
4081         pm_runtime_put_sync(hba->dev);
4082         return;
4083 }
4084
4085 /* Complete requests that have door-bell cleared */
4086 static void ufshcd_complete_requests(struct ufs_hba *hba)
4087 {
4088         ufshcd_transfer_req_compl(hba);
4089         ufshcd_tmc_handler(hba);
4090 }
4091
4092 /**
4093  * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
4094  *                              to recover from the DL NAC errors or not.
4095  * @hba: per-adapter instance
4096  *
4097  * Returns true if error handling is required, false otherwise
4098  */
4099 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
4100 {
4101         unsigned long flags;
4102         bool err_handling = true;
4103
4104         spin_lock_irqsave(hba->host->host_lock, flags);
4105         /*
4106          * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
4107          * device fatal error and/or DL NAC & REPLAY timeout errors.
4108          */
4109         if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
4110                 goto out;
4111
4112         if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
4113             ((hba->saved_err & UIC_ERROR) &&
4114              (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
4115                 goto out;
4116
4117         if ((hba->saved_err & UIC_ERROR) &&
4118             (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
4119                 int err;
4120                 /*
4121                  * wait for 50ms to see if we can get any other errors or not.
4122                  */
4123                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4124                 msleep(50);
4125                 spin_lock_irqsave(hba->host->host_lock, flags);
4126
4127                 /*
4128                  * now check if we have got any other severe errors other than
4129                  * DL NAC error?
4130                  */
4131                 if ((hba->saved_err & INT_FATAL_ERRORS) ||
4132                     ((hba->saved_err & UIC_ERROR) &&
4133                     (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
4134                         goto out;
4135
4136                 /*
4137                  * As DL NAC is the only error received so far, send out NOP
4138                  * command to confirm if link is still active or not.
4139                  *   - If we don't get any response then do error recovery.
4140                  *   - If we get response then clear the DL NAC error bit.
4141                  */
4142
4143                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4144                 err = ufshcd_verify_dev_init(hba);
4145                 spin_lock_irqsave(hba->host->host_lock, flags);
4146
4147                 if (err)
4148                         goto out;
4149
4150                 /* Link seems to be alive hence ignore the DL NAC errors */
4151                 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
4152                         hba->saved_err &= ~UIC_ERROR;
4153                 /* clear NAC error */
4154                 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
4155                 if (!hba->saved_uic_err) {
4156                         err_handling = false;
4157                         goto out;
4158                 }
4159         }
4160 out:
4161         spin_unlock_irqrestore(hba->host->host_lock, flags);
4162         return err_handling;
4163 }
4164
4165 /**
4166  * ufshcd_err_handler - handle UFS errors that require s/w attention
4167  * @work: pointer to work structure
4168  */
4169 static void ufshcd_err_handler(struct work_struct *work)
4170 {
4171         struct ufs_hba *hba;
4172         unsigned long flags;
4173         u32 err_xfer = 0;
4174         u32 err_tm = 0;
4175         int err = 0;
4176         int tag;
4177         bool needs_reset = false;
4178
4179         hba = container_of(work, struct ufs_hba, eh_work);
4180
4181         pm_runtime_get_sync(hba->dev);
4182         ufshcd_hold(hba, false);
4183
4184         spin_lock_irqsave(hba->host->host_lock, flags);
4185         if (hba->ufshcd_state == UFSHCD_STATE_RESET)
4186                 goto out;
4187
4188         hba->ufshcd_state = UFSHCD_STATE_RESET;
4189         ufshcd_set_eh_in_progress(hba);
4190
4191         /* Complete requests that have door-bell cleared by h/w */
4192         ufshcd_complete_requests(hba);
4193
4194         if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
4195                 bool ret;
4196
4197                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4198                 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
4199                 ret = ufshcd_quirk_dl_nac_errors(hba);
4200                 spin_lock_irqsave(hba->host->host_lock, flags);
4201                 if (!ret)
4202                         goto skip_err_handling;
4203         }
4204         if ((hba->saved_err & INT_FATAL_ERRORS) ||
4205             ((hba->saved_err & UIC_ERROR) &&
4206             (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
4207                                    UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
4208                                    UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
4209                 needs_reset = true;
4210
4211         /*
4212          * if host reset is required then skip clearing the pending
4213          * transfers forcefully because they will automatically get
4214          * cleared after link startup.
4215          */
4216         if (needs_reset)
4217                 goto skip_pending_xfer_clear;
4218
4219         /* release lock as clear command might sleep */
4220         spin_unlock_irqrestore(hba->host->host_lock, flags);
4221         /* Clear pending transfer requests */
4222         for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
4223                 if (ufshcd_clear_cmd(hba, tag)) {
4224                         err_xfer = true;
4225                         goto lock_skip_pending_xfer_clear;
4226                 }
4227         }
4228
4229         /* Clear pending task management requests */
4230         for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
4231                 if (ufshcd_clear_tm_cmd(hba, tag)) {
4232                         err_tm = true;
4233                         goto lock_skip_pending_xfer_clear;
4234                 }
4235         }
4236
4237 lock_skip_pending_xfer_clear:
4238         spin_lock_irqsave(hba->host->host_lock, flags);
4239
4240         /* Complete the requests that are cleared by s/w */
4241         ufshcd_complete_requests(hba);
4242
4243         if (err_xfer || err_tm)
4244                 needs_reset = true;
4245
4246 skip_pending_xfer_clear:
4247         /* Fatal errors need reset */
4248         if (needs_reset) {
4249                 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
4250
4251                 /*
4252                  * ufshcd_reset_and_restore() does the link reinitialization
4253                  * which will need atleast one empty doorbell slot to send the
4254                  * device management commands (NOP and query commands).
4255                  * If there is no slot empty at this moment then free up last
4256                  * slot forcefully.
4257                  */
4258                 if (hba->outstanding_reqs == max_doorbells)
4259                         __ufshcd_transfer_req_compl(hba,
4260                                                     (1UL << (hba->nutrs - 1)));
4261
4262                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4263                 err = ufshcd_reset_and_restore(hba);
4264                 spin_lock_irqsave(hba->host->host_lock, flags);
4265                 if (err) {
4266                         dev_err(hba->dev, "%s: reset and restore failed\n",
4267                                         __func__);
4268                         hba->ufshcd_state = UFSHCD_STATE_ERROR;
4269                 }
4270                 /*
4271                  * Inform scsi mid-layer that we did reset and allow to handle
4272                  * Unit Attention properly.
4273                  */
4274                 scsi_report_bus_reset(hba->host, 0);
4275                 hba->saved_err = 0;
4276                 hba->saved_uic_err = 0;
4277         }
4278
4279 skip_err_handling:
4280         if (!needs_reset) {
4281                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
4282                 if (hba->saved_err || hba->saved_uic_err)
4283                         dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
4284                             __func__, hba->saved_err, hba->saved_uic_err);
4285         }
4286
4287         ufshcd_clear_eh_in_progress(hba);
4288
4289 out:
4290         spin_unlock_irqrestore(hba->host->host_lock, flags);
4291         scsi_unblock_requests(hba->host);
4292         ufshcd_release(hba);
4293         pm_runtime_put_sync(hba->dev);
4294 }
4295
4296 /**
4297  * ufshcd_update_uic_error - check and set fatal UIC error flags.
4298  * @hba: per-adapter instance
4299  */
4300 static void ufshcd_update_uic_error(struct ufs_hba *hba)
4301 {
4302         u32 reg;
4303
4304         /* PA_INIT_ERROR is fatal and needs UIC reset */
4305         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
4306         if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
4307                 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
4308         else if (hba->dev_quirks &
4309                    UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
4310                 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
4311                         hba->uic_error |=
4312                                 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
4313                 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
4314                         hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
4315         }
4316
4317         /* UIC NL/TL/DME errors needs software retry */
4318         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
4319         if (reg)
4320                 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
4321
4322         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
4323         if (reg)
4324                 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
4325
4326         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
4327         if (reg)
4328                 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
4329
4330         dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
4331                         __func__, hba->uic_error);
4332 }
4333
4334 /**
4335  * ufshcd_check_errors - Check for errors that need s/w attention
4336  * @hba: per-adapter instance
4337  */
4338 static void ufshcd_check_errors(struct ufs_hba *hba)
4339 {
4340         bool queue_eh_work = false;
4341
4342         if (hba->errors & INT_FATAL_ERRORS)
4343                 queue_eh_work = true;
4344
4345         if (hba->errors & UIC_ERROR) {
4346                 hba->uic_error = 0;
4347                 ufshcd_update_uic_error(hba);
4348                 if (hba->uic_error)
4349                         queue_eh_work = true;
4350         }
4351
4352         if (queue_eh_work) {
4353                 /*
4354                  * update the transfer error masks to sticky bits, let's do this
4355                  * irrespective of current ufshcd_state.
4356                  */
4357                 hba->saved_err |= hba->errors;
4358                 hba->saved_uic_err |= hba->uic_error;
4359
4360                 /* handle fatal errors only when link is functional */
4361                 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
4362                         /* block commands from scsi mid-layer */
4363                         scsi_block_requests(hba->host);
4364
4365                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
4366                         schedule_work(&hba->eh_work);
4367                 }
4368         }
4369         /*
4370          * if (!queue_eh_work) -
4371          * Other errors are either non-fatal where host recovers
4372          * itself without s/w intervention or errors that will be
4373          * handled by the SCSI core layer.
4374          */
4375 }
4376
4377 /**
4378  * ufshcd_tmc_handler - handle task management function completion
4379  * @hba: per adapter instance
4380  */
4381 static void ufshcd_tmc_handler(struct ufs_hba *hba)
4382 {
4383         u32 tm_doorbell;
4384
4385         tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
4386         hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
4387         wake_up(&hba->tm_wq);
4388 }
4389
4390 /**
4391  * ufshcd_sl_intr - Interrupt service routine
4392  * @hba: per adapter instance
4393  * @intr_status: contains interrupts generated by the controller
4394  */
4395 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
4396 {
4397         hba->errors = UFSHCD_ERROR_MASK & intr_status;
4398         if (hba->errors)
4399                 ufshcd_check_errors(hba);
4400
4401         if (intr_status & UFSHCD_UIC_MASK)
4402                 ufshcd_uic_cmd_compl(hba, intr_status);
4403
4404         if (intr_status & UTP_TASK_REQ_COMPL)
4405                 ufshcd_tmc_handler(hba);
4406
4407         if (intr_status & UTP_TRANSFER_REQ_COMPL)
4408                 ufshcd_transfer_req_compl(hba);
4409 }
4410
4411 /**
4412  * ufshcd_intr - Main interrupt service routine
4413  * @irq: irq number
4414  * @__hba: pointer to adapter instance
4415  *
4416  * Returns IRQ_HANDLED - If interrupt is valid
4417  *              IRQ_NONE - If invalid interrupt
4418  */
4419 static irqreturn_t ufshcd_intr(int irq, void *__hba)
4420 {
4421         u32 intr_status, enabled_intr_status;
4422         irqreturn_t retval = IRQ_NONE;
4423         struct ufs_hba *hba = __hba;
4424
4425         spin_lock(hba->host->host_lock);
4426         intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
4427         enabled_intr_status =
4428                 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
4429
4430         if (intr_status)
4431                 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
4432
4433         if (enabled_intr_status) {
4434                 ufshcd_sl_intr(hba, enabled_intr_status);
4435                 retval = IRQ_HANDLED;
4436         }
4437         spin_unlock(hba->host->host_lock);
4438         return retval;
4439 }
4440
4441 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
4442 {
4443         int err = 0;
4444         u32 mask = 1 << tag;
4445         unsigned long flags;
4446
4447         if (!test_bit(tag, &hba->outstanding_tasks))
4448                 goto out;
4449
4450         spin_lock_irqsave(hba->host->host_lock, flags);
4451         ufshcd_writel(hba, ~(1 << tag), REG_UTP_TASK_REQ_LIST_CLEAR);
4452         spin_unlock_irqrestore(hba->host->host_lock, flags);
4453
4454         /* poll for max. 1 sec to clear door bell register by h/w */
4455         err = ufshcd_wait_for_register(hba,
4456                         REG_UTP_TASK_REQ_DOOR_BELL,
4457                         mask, 0, 1000, 1000, true);
4458 out:
4459         return err;
4460 }
4461
4462 /**
4463  * ufshcd_issue_tm_cmd - issues task management commands to controller
4464  * @hba: per adapter instance
4465  * @lun_id: LUN ID to which TM command is sent
4466  * @task_id: task ID to which the TM command is applicable
4467  * @tm_function: task management function opcode
4468  * @tm_response: task management service response return value
4469  *
4470  * Returns non-zero value on error, zero on success.
4471  */
4472 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
4473                 u8 tm_function, u8 *tm_response)
4474 {
4475         struct utp_task_req_desc *task_req_descp;
4476         struct utp_upiu_task_req *task_req_upiup;
4477         struct Scsi_Host *host;
4478         unsigned long flags;
4479         int free_slot;
4480         int err;
4481         int task_tag;
4482
4483         host = hba->host;
4484
4485         /*
4486          * Get free slot, sleep if slots are unavailable.
4487          * Even though we use wait_event() which sleeps indefinitely,
4488          * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
4489          */
4490         wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
4491         ufshcd_hold(hba, false);
4492
4493         spin_lock_irqsave(host->host_lock, flags);
4494         task_req_descp = hba->utmrdl_base_addr;
4495         task_req_descp += free_slot;
4496
4497         /* Configure task request descriptor */
4498         task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
4499         task_req_descp->header.dword_2 =
4500                         cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
4501
4502         /* Configure task request UPIU */
4503         task_req_upiup =
4504                 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
4505         task_tag = hba->nutrs + free_slot;
4506         task_req_upiup->header.dword_0 =
4507                 UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
4508                                               lun_id, task_tag);
4509         task_req_upiup->header.dword_1 =
4510                 UPIU_HEADER_DWORD(0, tm_function, 0, 0);
4511         /*
4512          * The host shall provide the same value for LUN field in the basic
4513          * header and for Input Parameter.
4514          */
4515         task_req_upiup->input_param1 = cpu_to_be32(lun_id);
4516         task_req_upiup->input_param2 = cpu_to_be32(task_id);
4517
4518         /* send command to the controller */
4519         __set_bit(free_slot, &hba->outstanding_tasks);
4520
4521         /* Make sure descriptors are ready before ringing the task doorbell */
4522         wmb();
4523
4524         ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
4525
4526         spin_unlock_irqrestore(host->host_lock, flags);
4527
4528         /* wait until the task management command is completed */
4529         err = wait_event_timeout(hba->tm_wq,
4530                         test_bit(free_slot, &hba->tm_condition),
4531                         msecs_to_jiffies(TM_CMD_TIMEOUT));
4532         if (!err) {
4533                 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
4534                                 __func__, tm_function);
4535                 if (ufshcd_clear_tm_cmd(hba, free_slot))
4536                         dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
4537                                         __func__, free_slot);
4538                 err = -ETIMEDOUT;
4539         } else {
4540                 err = ufshcd_task_req_compl(hba, free_slot, tm_response);
4541         }
4542
4543         clear_bit(free_slot, &hba->tm_condition);
4544         ufshcd_put_tm_slot(hba, free_slot);
4545         wake_up(&hba->tm_tag_wq);
4546
4547         ufshcd_release(hba);
4548         return err;
4549 }
4550
4551 /**
4552  * ufshcd_eh_device_reset_handler - device reset handler registered to
4553  *                                    scsi layer.
4554  * @cmd: SCSI command pointer
4555  *
4556  * Returns SUCCESS/FAILED
4557  */
4558 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
4559 {
4560         struct Scsi_Host *host;
4561         struct ufs_hba *hba;
4562         unsigned int tag;
4563         u32 pos;
4564         int err;
4565         u8 resp = 0xF;
4566         struct ufshcd_lrb *lrbp;
4567         unsigned long flags;
4568
4569         host = cmd->device->host;
4570         hba = shost_priv(host);
4571         tag = cmd->request->tag;
4572
4573         lrbp = &hba->lrb[tag];
4574         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
4575         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
4576                 if (!err)
4577                         err = resp;
4578                 goto out;
4579         }
4580
4581         /* clear the commands that were pending for corresponding LUN */
4582         for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
4583                 if (hba->lrb[pos].lun == lrbp->lun) {
4584                         err = ufshcd_clear_cmd(hba, pos);
4585                         if (err)
4586                                 break;
4587                 }
4588         }
4589         spin_lock_irqsave(host->host_lock, flags);
4590         ufshcd_transfer_req_compl(hba);
4591         spin_unlock_irqrestore(host->host_lock, flags);
4592 out:
4593         if (!err) {
4594                 err = SUCCESS;
4595         } else {
4596                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
4597                 err = FAILED;
4598         }
4599         return err;
4600 }
4601
4602 /**
4603  * ufshcd_abort - abort a specific command
4604  * @cmd: SCSI command pointer
4605  *
4606  * Abort the pending command in device by sending UFS_ABORT_TASK task management
4607  * command, and in host controller by clearing the door-bell register. There can
4608  * be race between controller sending the command to the device while abort is
4609  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
4610  * really issued and then try to abort it.
4611  *
4612  * Returns SUCCESS/FAILED
4613  */
4614 static int ufshcd_abort(struct scsi_cmnd *cmd)
4615 {
4616         struct Scsi_Host *host;
4617         struct ufs_hba *hba;
4618         unsigned long flags;
4619         unsigned int tag;
4620         int err = 0;
4621         int poll_cnt;
4622         u8 resp = 0xF;
4623         struct ufshcd_lrb *lrbp;
4624         u32 reg;
4625
4626         host = cmd->device->host;
4627         hba = shost_priv(host);
4628         tag = cmd->request->tag;
4629         if (!ufshcd_valid_tag(hba, tag)) {
4630                 dev_err(hba->dev,
4631                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
4632                         __func__, tag, cmd, cmd->request);
4633                 BUG();
4634         }
4635
4636         ufshcd_hold(hba, false);
4637         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4638         /* If command is already aborted/completed, return SUCCESS */
4639         if (!(test_bit(tag, &hba->outstanding_reqs))) {
4640                 dev_err(hba->dev,
4641                         "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
4642                         __func__, tag, hba->outstanding_reqs, reg);
4643                 goto out;
4644         }
4645
4646         if (!(reg & (1 << tag))) {
4647                 dev_err(hba->dev,
4648                 "%s: cmd was completed, but without a notifying intr, tag = %d",
4649                 __func__, tag);
4650         }
4651
4652         lrbp = &hba->lrb[tag];
4653         for (poll_cnt = 100; poll_cnt; poll_cnt--) {
4654                 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
4655                                 UFS_QUERY_TASK, &resp);
4656                 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
4657                         /* cmd pending in the device */
4658                         break;
4659                 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
4660                         /*
4661                          * cmd not pending in the device, check if it is
4662                          * in transition.
4663                          */
4664                         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4665                         if (reg & (1 << tag)) {
4666                                 /* sleep for max. 200us to stabilize */
4667                                 usleep_range(100, 200);
4668                                 continue;
4669                         }
4670                         /* command completed already */
4671                         goto out;
4672                 } else {
4673                         if (!err)
4674                                 err = resp; /* service response error */
4675                         goto out;
4676                 }
4677         }
4678
4679         if (!poll_cnt) {
4680                 err = -EBUSY;
4681                 goto out;
4682         }
4683
4684         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
4685                         UFS_ABORT_TASK, &resp);
4686         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
4687                 if (!err)
4688                         err = resp; /* service response error */
4689                 goto out;
4690         }
4691
4692         err = ufshcd_clear_cmd(hba, tag);
4693         if (err)
4694                 goto out;
4695
4696         scsi_dma_unmap(cmd);
4697
4698         spin_lock_irqsave(host->host_lock, flags);
4699         ufshcd_outstanding_req_clear(hba, tag);
4700         hba->lrb[tag].cmd = NULL;
4701         spin_unlock_irqrestore(host->host_lock, flags);
4702
4703         clear_bit_unlock(tag, &hba->lrb_in_use);
4704         wake_up(&hba->dev_cmd.tag_wq);
4705
4706 out:
4707         if (!err) {
4708                 err = SUCCESS;
4709         } else {
4710                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
4711                 err = FAILED;
4712         }
4713
4714         /*
4715          * This ufshcd_release() corresponds to the original scsi cmd that got
4716          * aborted here (as we won't get any IRQ for it).
4717          */
4718         ufshcd_release(hba);
4719         return err;
4720 }
4721
4722 /**
4723  * ufshcd_host_reset_and_restore - reset and restore host controller
4724  * @hba: per-adapter instance
4725  *
4726  * Note that host controller reset may issue DME_RESET to
4727  * local and remote (device) Uni-Pro stack and the attributes
4728  * are reset to default state.
4729  *
4730  * Returns zero on success, non-zero on failure
4731  */
4732 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
4733 {
4734         int err;
4735         unsigned long flags;
4736
4737         /* Reset the host controller */
4738         spin_lock_irqsave(hba->host->host_lock, flags);
4739         ufshcd_hba_stop(hba, false);
4740         spin_unlock_irqrestore(hba->host->host_lock, flags);
4741
4742         err = ufshcd_hba_enable(hba);
4743         if (err)
4744                 goto out;
4745
4746         /* Establish the link again and restore the device */
4747         err = ufshcd_probe_hba(hba);
4748
4749         if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
4750                 err = -EIO;
4751 out:
4752         if (err)
4753                 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
4754
4755         return err;
4756 }
4757
4758 /**
4759  * ufshcd_reset_and_restore - reset and re-initialize host/device
4760  * @hba: per-adapter instance
4761  *
4762  * Reset and recover device, host and re-establish link. This
4763  * is helpful to recover the communication in fatal error conditions.
4764  *
4765  * Returns zero on success, non-zero on failure
4766  */
4767 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
4768 {
4769         int err = 0;
4770         unsigned long flags;
4771         int retries = MAX_HOST_RESET_RETRIES;
4772
4773         do {
4774                 err = ufshcd_host_reset_and_restore(hba);
4775         } while (err && --retries);
4776
4777         /*
4778          * After reset the door-bell might be cleared, complete
4779          * outstanding requests in s/w here.
4780          */
4781         spin_lock_irqsave(hba->host->host_lock, flags);
4782         ufshcd_transfer_req_compl(hba);
4783         ufshcd_tmc_handler(hba);
4784         spin_unlock_irqrestore(hba->host->host_lock, flags);
4785
4786         return err;
4787 }
4788
4789 /**
4790  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
4791  * @cmd - SCSI command pointer
4792  *
4793  * Returns SUCCESS/FAILED
4794  */
4795 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
4796 {
4797         int err;
4798         unsigned long flags;
4799         struct ufs_hba *hba;
4800
4801         hba = shost_priv(cmd->device->host);
4802
4803         ufshcd_hold(hba, false);
4804         /*
4805          * Check if there is any race with fatal error handling.
4806          * If so, wait for it to complete. Even though fatal error
4807          * handling does reset and restore in some cases, don't assume
4808          * anything out of it. We are just avoiding race here.
4809          */
4810         do {
4811                 spin_lock_irqsave(hba->host->host_lock, flags);
4812                 if (!(work_pending(&hba->eh_work) ||
4813                                 hba->ufshcd_state == UFSHCD_STATE_RESET))
4814                         break;
4815                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4816                 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
4817                 flush_work(&hba->eh_work);
4818         } while (1);
4819
4820         hba->ufshcd_state = UFSHCD_STATE_RESET;
4821         ufshcd_set_eh_in_progress(hba);
4822         spin_unlock_irqrestore(hba->host->host_lock, flags);
4823
4824         err = ufshcd_reset_and_restore(hba);
4825
4826         spin_lock_irqsave(hba->host->host_lock, flags);
4827         if (!err) {
4828                 err = SUCCESS;
4829                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
4830         } else {
4831                 err = FAILED;
4832                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4833         }
4834         ufshcd_clear_eh_in_progress(hba);
4835         spin_unlock_irqrestore(hba->host->host_lock, flags);
4836
4837         ufshcd_release(hba);
4838         return err;
4839 }
4840
4841 /**
4842  * ufshcd_get_max_icc_level - calculate the ICC level
4843  * @sup_curr_uA: max. current supported by the regulator
4844  * @start_scan: row at the desc table to start scan from
4845  * @buff: power descriptor buffer
4846  *
4847  * Returns calculated max ICC level for specific regulator
4848  */
4849 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
4850 {
4851         int i;
4852         int curr_uA;
4853         u16 data;
4854         u16 unit;
4855
4856         for (i = start_scan; i >= 0; i--) {
4857                 data = be16_to_cpu(*((u16 *)(buff + 2*i)));
4858                 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
4859                                                 ATTR_ICC_LVL_UNIT_OFFSET;
4860                 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
4861                 switch (unit) {
4862                 case UFSHCD_NANO_AMP:
4863                         curr_uA = curr_uA / 1000;
4864                         break;
4865                 case UFSHCD_MILI_AMP:
4866                         curr_uA = curr_uA * 1000;
4867                         break;
4868                 case UFSHCD_AMP:
4869                         curr_uA = curr_uA * 1000 * 1000;
4870                         break;
4871                 case UFSHCD_MICRO_AMP:
4872                 default:
4873                         break;
4874                 }
4875                 if (sup_curr_uA >= curr_uA)
4876                         break;
4877         }
4878         if (i < 0) {
4879                 i = 0;
4880                 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
4881         }
4882
4883         return (u32)i;
4884 }
4885
4886 /**
4887  * ufshcd_calc_icc_level - calculate the max ICC level
4888  * In case regulators are not initialized we'll return 0
4889  * @hba: per-adapter instance
4890  * @desc_buf: power descriptor buffer to extract ICC levels from.
4891  * @len: length of desc_buff
4892  *
4893  * Returns calculated ICC level
4894  */
4895 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
4896                                                         u8 *desc_buf, int len)
4897 {
4898         u32 icc_level = 0;
4899
4900         if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
4901                                                 !hba->vreg_info.vccq2) {
4902                 dev_err(hba->dev,
4903                         "%s: Regulator capability was not set, actvIccLevel=%d",
4904                                                         __func__, icc_level);
4905                 goto out;
4906         }
4907
4908         if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
4909                 icc_level = ufshcd_get_max_icc_level(
4910                                 hba->vreg_info.vcc->max_uA,
4911                                 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
4912                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
4913
4914         if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
4915                 icc_level = ufshcd_get_max_icc_level(
4916                                 hba->vreg_info.vccq->max_uA,
4917                                 icc_level,
4918                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
4919
4920         if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
4921                 icc_level = ufshcd_get_max_icc_level(
4922                                 hba->vreg_info.vccq2->max_uA,
4923                                 icc_level,
4924                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
4925 out:
4926         return icc_level;
4927 }
4928
4929 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
4930 {
4931         int ret;
4932         int buff_len = hba->desc_size.pwr_desc;
4933         u8 desc_buf[hba->desc_size.pwr_desc];
4934
4935         ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
4936         if (ret) {
4937                 dev_err(hba->dev,
4938                         "%s: Failed reading power descriptor.len = %d ret = %d",
4939                         __func__, buff_len, ret);
4940                 return;
4941         }
4942
4943         hba->init_prefetch_data.icc_level =
4944                         ufshcd_find_max_sup_active_icc_level(hba,
4945                         desc_buf, buff_len);
4946         dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
4947                         __func__, hba->init_prefetch_data.icc_level);
4948
4949         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4950                 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
4951                 &hba->init_prefetch_data.icc_level);
4952
4953         if (ret)
4954                 dev_err(hba->dev,
4955                         "%s: Failed configuring bActiveICCLevel = %d ret = %d",
4956                         __func__, hba->init_prefetch_data.icc_level , ret);
4957
4958 }
4959
4960 /**
4961  * ufshcd_scsi_add_wlus - Adds required W-LUs
4962  * @hba: per-adapter instance
4963  *
4964  * UFS device specification requires the UFS devices to support 4 well known
4965  * logical units:
4966  *      "REPORT_LUNS" (address: 01h)
4967  *      "UFS Device" (address: 50h)
4968  *      "RPMB" (address: 44h)
4969  *      "BOOT" (address: 30h)
4970  * UFS device's power management needs to be controlled by "POWER CONDITION"
4971  * field of SSU (START STOP UNIT) command. But this "power condition" field
4972  * will take effect only when its sent to "UFS device" well known logical unit
4973  * hence we require the scsi_device instance to represent this logical unit in
4974  * order for the UFS host driver to send the SSU command for power management.
4975
4976  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
4977  * Block) LU so user space process can control this LU. User space may also
4978  * want to have access to BOOT LU.
4979
4980  * This function adds scsi device instances for each of all well known LUs
4981  * (except "REPORT LUNS" LU).
4982  *
4983  * Returns zero on success (all required W-LUs are added successfully),
4984  * non-zero error value on failure (if failed to add any of the required W-LU).
4985  */
4986 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
4987 {
4988         int ret = 0;
4989         struct scsi_device *sdev_rpmb;
4990         struct scsi_device *sdev_boot;
4991
4992         hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
4993                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
4994         if (IS_ERR(hba->sdev_ufs_device)) {
4995                 ret = PTR_ERR(hba->sdev_ufs_device);
4996                 hba->sdev_ufs_device = NULL;
4997                 goto out;
4998         }
4999         scsi_device_put(hba->sdev_ufs_device);
5000
5001         sdev_boot = __scsi_add_device(hba->host, 0, 0,
5002                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
5003         if (IS_ERR(sdev_boot)) {
5004                 ret = PTR_ERR(sdev_boot);
5005                 goto remove_sdev_ufs_device;
5006         }
5007         scsi_device_put(sdev_boot);
5008
5009         sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
5010                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
5011         if (IS_ERR(sdev_rpmb)) {
5012                 ret = PTR_ERR(sdev_rpmb);
5013                 goto remove_sdev_boot;
5014         }
5015         scsi_device_put(sdev_rpmb);
5016         goto out;
5017
5018 remove_sdev_boot:
5019         scsi_remove_device(sdev_boot);
5020 remove_sdev_ufs_device:
5021         scsi_remove_device(hba->sdev_ufs_device);
5022 out:
5023         return ret;
5024 }
5025
5026 static int ufs_get_device_desc(struct ufs_hba *hba,
5027                                struct ufs_dev_desc *dev_desc)
5028 {
5029         int err;
5030         u8 model_index;
5031         u8 str_desc_buf[QUERY_DESC_MAX_SIZE + 1] = {0};
5032         u8 desc_buf[hba->desc_size.dev_desc];
5033
5034         err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
5035         if (err) {
5036                 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
5037                         __func__, err);
5038                 goto out;
5039         }
5040
5041         /*
5042          * getting vendor (manufacturerID) and Bank Index in big endian
5043          * format
5044          */
5045         dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
5046                                      desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
5047
5048         model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
5049
5050         err = ufshcd_read_string_desc(hba, model_index, str_desc_buf,
5051                                 QUERY_DESC_MAX_SIZE, ASCII_STD);
5052         if (err) {
5053                 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
5054                         __func__, err);
5055                 goto out;
5056         }
5057
5058         str_desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
5059         strlcpy(dev_desc->model, (str_desc_buf + QUERY_DESC_HDR_SIZE),
5060                 min_t(u8, str_desc_buf[QUERY_DESC_LENGTH_OFFSET],
5061                       MAX_MODEL_LEN));
5062
5063         /* Null terminate the model string */
5064         dev_desc->model[MAX_MODEL_LEN] = '\0';
5065
5066 out:
5067         return err;
5068 }
5069
5070 static void ufs_fixup_device_setup(struct ufs_hba *hba,
5071                                    struct ufs_dev_desc *dev_desc)
5072 {
5073         struct ufs_dev_fix *f;
5074
5075         for (f = ufs_fixups; f->quirk; f++) {
5076                 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
5077                      f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
5078                     (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
5079                      !strcmp(f->card.model, UFS_ANY_MODEL)))
5080                         hba->dev_quirks |= f->quirk;
5081         }
5082 }
5083
5084 /**
5085  * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
5086  * @hba: per-adapter instance
5087  *
5088  * PA_TActivate parameter can be tuned manually if UniPro version is less than
5089  * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
5090  * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
5091  * the hibern8 exit latency.
5092  *
5093  * Returns zero on success, non-zero error value on failure.
5094  */
5095 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
5096 {
5097         int ret = 0;
5098         u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
5099
5100         ret = ufshcd_dme_peer_get(hba,
5101                                   UIC_ARG_MIB_SEL(
5102                                         RX_MIN_ACTIVATETIME_CAPABILITY,
5103                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
5104                                   &peer_rx_min_activatetime);
5105         if (ret)
5106                 goto out;
5107
5108         /* make sure proper unit conversion is applied */
5109         tuned_pa_tactivate =
5110                 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
5111                  / PA_TACTIVATE_TIME_UNIT_US);
5112         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
5113                              tuned_pa_tactivate);
5114
5115 out:
5116         return ret;
5117 }
5118
5119 /**
5120  * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
5121  * @hba: per-adapter instance
5122  *
5123  * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
5124  * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
5125  * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
5126  * This optimal value can help reduce the hibern8 exit latency.
5127  *
5128  * Returns zero on success, non-zero error value on failure.
5129  */
5130 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
5131 {
5132         int ret = 0;
5133         u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
5134         u32 max_hibern8_time, tuned_pa_hibern8time;
5135
5136         ret = ufshcd_dme_get(hba,
5137                              UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
5138                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
5139                                   &local_tx_hibern8_time_cap);
5140         if (ret)
5141                 goto out;
5142
5143         ret = ufshcd_dme_peer_get(hba,
5144                                   UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
5145                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
5146                                   &peer_rx_hibern8_time_cap);
5147         if (ret)
5148                 goto out;
5149
5150         max_hibern8_time = max(local_tx_hibern8_time_cap,
5151                                peer_rx_hibern8_time_cap);
5152         /* make sure proper unit conversion is applied */
5153         tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
5154                                 / PA_HIBERN8_TIME_UNIT_US);
5155         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
5156                              tuned_pa_hibern8time);
5157 out:
5158         return ret;
5159 }
5160
5161 /**
5162  * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
5163  * less than device PA_TACTIVATE time.
5164  * @hba: per-adapter instance
5165  *
5166  * Some UFS devices require host PA_TACTIVATE to be lower than device
5167  * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
5168  * for such devices.
5169  *
5170  * Returns zero on success, non-zero error value on failure.
5171  */
5172 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
5173 {
5174         int ret = 0;
5175         u32 granularity, peer_granularity;
5176         u32 pa_tactivate, peer_pa_tactivate;
5177         u32 pa_tactivate_us, peer_pa_tactivate_us;
5178         u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
5179
5180         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
5181                                   &granularity);
5182         if (ret)
5183                 goto out;
5184
5185         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
5186                                   &peer_granularity);
5187         if (ret)
5188                 goto out;
5189
5190         if ((granularity < PA_GRANULARITY_MIN_VAL) ||
5191             (granularity > PA_GRANULARITY_MAX_VAL)) {
5192                 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
5193                         __func__, granularity);
5194                 return -EINVAL;
5195         }
5196
5197         if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
5198             (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
5199                 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
5200                         __func__, peer_granularity);
5201                 return -EINVAL;
5202         }
5203
5204         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
5205         if (ret)
5206                 goto out;
5207
5208         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
5209                                   &peer_pa_tactivate);
5210         if (ret)
5211                 goto out;
5212
5213         pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
5214         peer_pa_tactivate_us = peer_pa_tactivate *
5215                              gran_to_us_table[peer_granularity - 1];
5216
5217         if (pa_tactivate_us > peer_pa_tactivate_us) {
5218                 u32 new_peer_pa_tactivate;
5219
5220                 new_peer_pa_tactivate = pa_tactivate_us /
5221                                       gran_to_us_table[peer_granularity - 1];
5222                 new_peer_pa_tactivate++;
5223                 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
5224                                           new_peer_pa_tactivate);
5225         }
5226
5227 out:
5228         return ret;
5229 }
5230
5231 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
5232 {
5233         if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
5234                 ufshcd_tune_pa_tactivate(hba);
5235                 ufshcd_tune_pa_hibern8time(hba);
5236         }
5237
5238         if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
5239                 /* set 1ms timeout for PA_TACTIVATE */
5240                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
5241
5242         if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
5243                 ufshcd_quirk_tune_host_pa_tactivate(hba);
5244
5245         ufshcd_vops_apply_dev_quirks(hba);
5246 }
5247
5248 static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
5249 {
5250         int err;
5251
5252         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
5253                 &hba->desc_size.dev_desc);
5254         if (err)
5255                 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
5256
5257         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
5258                 &hba->desc_size.pwr_desc);
5259         if (err)
5260                 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
5261
5262         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
5263                 &hba->desc_size.interc_desc);
5264         if (err)
5265                 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
5266
5267         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
5268                 &hba->desc_size.conf_desc);
5269         if (err)
5270                 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
5271
5272         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
5273                 &hba->desc_size.unit_desc);
5274         if (err)
5275                 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
5276
5277         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
5278                 &hba->desc_size.geom_desc);
5279         if (err)
5280                 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
5281 }
5282
5283 static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
5284 {
5285         hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
5286         hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
5287         hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
5288         hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
5289         hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
5290         hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
5291 }
5292
5293 /**
5294  * ufshcd_probe_hba - probe hba to detect device and initialize
5295  * @hba: per-adapter instance
5296  *
5297  * Execute link-startup and verify device initialization
5298  */
5299 static int ufshcd_probe_hba(struct ufs_hba *hba)
5300 {
5301         struct ufs_dev_desc card = {0};
5302         int ret;
5303
5304         ret = ufshcd_link_startup(hba);
5305         if (ret)
5306                 goto out;
5307
5308         ufshcd_init_pwr_info(hba);
5309
5310         /* set the default level for urgent bkops */
5311         hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
5312         hba->is_urgent_bkops_lvl_checked = false;
5313
5314         /* UniPro link is active now */
5315         ufshcd_set_link_active(hba);
5316
5317         ret = ufshcd_verify_dev_init(hba);
5318         if (ret)
5319                 goto out;
5320
5321         ret = ufshcd_complete_dev_init(hba);
5322         if (ret)
5323                 goto out;
5324
5325         /* Init check for device descriptor sizes */
5326         ufshcd_init_desc_sizes(hba);
5327
5328         ret = ufs_get_device_desc(hba, &card);
5329         if (ret) {
5330                 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
5331                         __func__, ret);
5332                 goto out;
5333         }
5334
5335         ufs_fixup_device_setup(hba, &card);
5336         ufshcd_tune_unipro_params(hba);
5337
5338         ret = ufshcd_set_vccq_rail_unused(hba,
5339                 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
5340         if (ret)
5341                 goto out;
5342
5343         /* UFS device is also active now */
5344         ufshcd_set_ufs_dev_active(hba);
5345         ufshcd_force_reset_auto_bkops(hba);
5346         hba->wlun_dev_clr_ua = true;
5347
5348         if (ufshcd_get_max_pwr_mode(hba)) {
5349                 dev_err(hba->dev,
5350                         "%s: Failed getting max supported power mode\n",
5351                         __func__);
5352         } else {
5353                 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
5354                 if (ret)
5355                         dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
5356                                         __func__, ret);
5357         }
5358
5359         /* set the state as operational after switching to desired gear */
5360         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5361
5362         /*
5363          * If we are in error handling context or in power management callbacks
5364          * context, no need to scan the host
5365          */
5366         if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
5367                 bool flag;
5368
5369                 /* clear any previous UFS device information */
5370                 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
5371                 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
5372                                 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
5373                         hba->dev_info.f_power_on_wp_en = flag;
5374
5375                 if (!hba->is_init_prefetch)
5376                         ufshcd_init_icc_levels(hba);
5377
5378                 /* Add required well known logical units to scsi mid layer */
5379                 ret = ufshcd_scsi_add_wlus(hba);
5380                 if (ret)
5381                         goto out;
5382
5383                 scsi_scan_host(hba->host);
5384                 pm_runtime_put_sync(hba->dev);
5385         }
5386
5387         if (!hba->is_init_prefetch)
5388                 hba->is_init_prefetch = true;
5389
5390         /* Resume devfreq after UFS device is detected */
5391         if (ufshcd_is_clkscaling_enabled(hba))
5392                 devfreq_resume_device(hba->devfreq);
5393
5394 out:
5395         /*
5396          * If we failed to initialize the device or the device is not
5397          * present, turn off the power/clocks etc.
5398          */
5399         if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
5400                 pm_runtime_put_sync(hba->dev);
5401                 ufshcd_hba_exit(hba);
5402         }
5403
5404         return ret;
5405 }
5406
5407 /**
5408  * ufshcd_async_scan - asynchronous execution for probing hba
5409  * @data: data pointer to pass to this function
5410  * @cookie: cookie data
5411  */
5412 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
5413 {
5414         struct ufs_hba *hba = (struct ufs_hba *)data;
5415
5416         ufshcd_probe_hba(hba);
5417 }
5418
5419 static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
5420 {
5421         unsigned long flags;
5422         struct Scsi_Host *host;
5423         struct ufs_hba *hba;
5424         int index;
5425         bool found = false;
5426
5427         if (!scmd || !scmd->device || !scmd->device->host)
5428                 return BLK_EH_NOT_HANDLED;
5429
5430         host = scmd->device->host;
5431         hba = shost_priv(host);
5432         if (!hba)
5433                 return BLK_EH_NOT_HANDLED;
5434
5435         spin_lock_irqsave(host->host_lock, flags);
5436
5437         for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
5438                 if (hba->lrb[index].cmd == scmd) {
5439                         found = true;
5440                         break;
5441                 }
5442         }
5443
5444         spin_unlock_irqrestore(host->host_lock, flags);
5445
5446         /*
5447          * Bypass SCSI error handling and reset the block layer timer if this
5448          * SCSI command was not actually dispatched to UFS driver, otherwise
5449          * let SCSI layer handle the error as usual.
5450          */
5451         return found ? BLK_EH_NOT_HANDLED : BLK_EH_RESET_TIMER;
5452 }
5453
5454 static struct scsi_host_template ufshcd_driver_template = {
5455         .module                 = THIS_MODULE,
5456         .name                   = UFSHCD,
5457         .proc_name              = UFSHCD,
5458         .queuecommand           = ufshcd_queuecommand,
5459         .slave_alloc            = ufshcd_slave_alloc,
5460         .slave_configure        = ufshcd_slave_configure,
5461         .slave_destroy          = ufshcd_slave_destroy,
5462         .change_queue_depth     = ufshcd_change_queue_depth,
5463         .eh_abort_handler       = ufshcd_abort,
5464         .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
5465         .eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
5466         .eh_timed_out           = ufshcd_eh_timed_out,
5467         .this_id                = -1,
5468         .sg_tablesize           = SG_ALL,
5469         .cmd_per_lun            = UFSHCD_CMD_PER_LUN,
5470         .can_queue              = UFSHCD_CAN_QUEUE,
5471         .max_host_blocked       = 1,
5472         .track_queue_depth      = 1,
5473 };
5474
5475 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
5476                                    int ua)
5477 {
5478         int ret;
5479
5480         if (!vreg)
5481                 return 0;
5482
5483         /*
5484          * "set_load" operation shall be required on those regulators
5485          * which specifically configured current limitation. Otherwise
5486          * zero max_uA may cause unexpected behavior when regulator is
5487          * enabled or set as high power mode.
5488          */
5489         if (!vreg->max_uA)
5490                 return 0;
5491
5492         ret = regulator_set_load(vreg->reg, ua);
5493         if (ret < 0) {
5494                 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
5495                                 __func__, vreg->name, ua, ret);
5496         }
5497
5498         return ret;
5499 }
5500
5501 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
5502                                          struct ufs_vreg *vreg)
5503 {
5504         if (!vreg)
5505                 return 0;
5506         else if (vreg->unused)
5507                 return 0;
5508         else
5509                 return ufshcd_config_vreg_load(hba->dev, vreg,
5510                                                UFS_VREG_LPM_LOAD_UA);
5511 }
5512
5513 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
5514                                          struct ufs_vreg *vreg)
5515 {
5516         if (!vreg)
5517                 return 0;
5518         else if (vreg->unused)
5519                 return 0;
5520         else
5521                 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
5522 }
5523
5524 static int ufshcd_config_vreg(struct device *dev,
5525                 struct ufs_vreg *vreg, bool on)
5526 {
5527         int ret = 0;
5528         struct regulator *reg;
5529         const char *name;
5530         int min_uV, uA_load;
5531
5532         BUG_ON(!vreg);
5533
5534         reg = vreg->reg;
5535         name = vreg->name;
5536
5537         if (regulator_count_voltages(reg) > 0) {
5538                 if (vreg->min_uV && vreg->max_uV) {
5539                         min_uV = on ? vreg->min_uV : 0;
5540                         ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
5541                         if (ret) {
5542                                 dev_err(dev,
5543                                         "%s: %s set voltage failed, err=%d\n",
5544                                         __func__, name, ret);
5545                                 goto out;
5546                         }
5547                 }
5548
5549                 uA_load = on ? vreg->max_uA : 0;
5550                 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
5551                 if (ret)
5552                         goto out;
5553         }
5554 out:
5555         return ret;
5556 }
5557
5558 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
5559 {
5560         int ret = 0;
5561
5562         if (!vreg)
5563                 goto out;
5564         else if (vreg->enabled || vreg->unused)
5565                 goto out;
5566
5567         ret = ufshcd_config_vreg(dev, vreg, true);
5568         if (!ret)
5569                 ret = regulator_enable(vreg->reg);
5570
5571         if (!ret)
5572                 vreg->enabled = true;
5573         else
5574                 dev_err(dev, "%s: %s enable failed, err=%d\n",
5575                                 __func__, vreg->name, ret);
5576 out:
5577         return ret;
5578 }
5579
5580 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
5581 {
5582         int ret = 0;
5583
5584         if (!vreg)
5585                 goto out;
5586         else if (!vreg->enabled || vreg->unused)
5587                 goto out;
5588
5589         ret = regulator_disable(vreg->reg);
5590
5591         if (!ret) {
5592                 /* ignore errors on applying disable config */
5593                 ufshcd_config_vreg(dev, vreg, false);
5594                 vreg->enabled = false;
5595         } else {
5596                 dev_err(dev, "%s: %s disable failed, err=%d\n",
5597                                 __func__, vreg->name, ret);
5598         }
5599 out:
5600         return ret;
5601 }
5602
5603 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
5604 {
5605         int ret = 0;
5606         struct device *dev = hba->dev;
5607         struct ufs_vreg_info *info = &hba->vreg_info;
5608
5609         if (!info)
5610                 goto out;
5611
5612         ret = ufshcd_toggle_vreg(dev, info->vcc, on);
5613         if (ret)
5614                 goto out;
5615
5616         ret = ufshcd_toggle_vreg(dev, info->vccq, on);
5617         if (ret)
5618                 goto out;
5619
5620         ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
5621         if (ret)
5622                 goto out;
5623
5624 out:
5625         if (ret) {
5626                 ufshcd_toggle_vreg(dev, info->vccq2, false);
5627                 ufshcd_toggle_vreg(dev, info->vccq, false);
5628                 ufshcd_toggle_vreg(dev, info->vcc, false);
5629         }
5630         return ret;
5631 }
5632
5633 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
5634 {
5635         struct ufs_vreg_info *info = &hba->vreg_info;
5636
5637         if (info)
5638                 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
5639
5640         return 0;
5641 }
5642
5643 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
5644 {
5645         int ret = 0;
5646
5647         if (!vreg)
5648                 goto out;
5649
5650         vreg->reg = devm_regulator_get(dev, vreg->name);
5651         if (IS_ERR(vreg->reg)) {
5652                 ret = PTR_ERR(vreg->reg);
5653                 dev_err(dev, "%s: %s get failed, err=%d\n",
5654                                 __func__, vreg->name, ret);
5655         }
5656 out:
5657         return ret;
5658 }
5659
5660 static int ufshcd_init_vreg(struct ufs_hba *hba)
5661 {
5662         int ret = 0;
5663         struct device *dev = hba->dev;
5664         struct ufs_vreg_info *info = &hba->vreg_info;
5665
5666         if (!info)
5667                 goto out;
5668
5669         ret = ufshcd_get_vreg(dev, info->vcc);
5670         if (ret)
5671                 goto out;
5672
5673         ret = ufshcd_get_vreg(dev, info->vccq);
5674         if (ret)
5675                 goto out;
5676
5677         ret = ufshcd_get_vreg(dev, info->vccq2);
5678 out:
5679         return ret;
5680 }
5681
5682 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
5683 {
5684         struct ufs_vreg_info *info = &hba->vreg_info;
5685
5686         if (info)
5687                 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
5688
5689         return 0;
5690 }
5691
5692 static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
5693 {
5694         int ret = 0;
5695         struct ufs_vreg_info *info = &hba->vreg_info;
5696
5697         if (!info)
5698                 goto out;
5699         else if (!info->vccq)
5700                 goto out;
5701
5702         if (unused) {
5703                 /* shut off the rail here */
5704                 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
5705                 /*
5706                  * Mark this rail as no longer used, so it doesn't get enabled
5707                  * later by mistake
5708                  */
5709                 if (!ret)
5710                         info->vccq->unused = true;
5711         } else {
5712                 /*
5713                  * rail should have been already enabled hence just make sure
5714                  * that unused flag is cleared.
5715                  */
5716                 info->vccq->unused = false;
5717         }
5718 out:
5719         return ret;
5720 }
5721
5722 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
5723                                         bool skip_ref_clk)
5724 {
5725         int ret = 0;
5726         struct ufs_clk_info *clki;
5727         struct list_head *head = &hba->clk_list_head;
5728         unsigned long flags;
5729
5730         if (!head || list_empty(head))
5731                 goto out;
5732
5733         list_for_each_entry(clki, head, list) {
5734                 if (!IS_ERR_OR_NULL(clki->clk)) {
5735                         if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
5736                                 continue;
5737
5738                         if (on && !clki->enabled) {
5739                                 ret = clk_prepare_enable(clki->clk);
5740                                 if (ret) {
5741                                         dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
5742                                                 __func__, clki->name, ret);
5743                                         goto out;
5744                                 }
5745                         } else if (!on && clki->enabled) {
5746                                 clk_disable_unprepare(clki->clk);
5747                         }
5748                         clki->enabled = on;
5749                         dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
5750                                         clki->name, on ? "en" : "dis");
5751                 }
5752         }
5753
5754         ret = ufshcd_vops_setup_clocks(hba, on);
5755 out:
5756         if (ret) {
5757                 list_for_each_entry(clki, head, list) {
5758                         if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
5759                                 clk_disable_unprepare(clki->clk);
5760                 }
5761         } else if (on) {
5762                 spin_lock_irqsave(hba->host->host_lock, flags);
5763                 hba->clk_gating.state = CLKS_ON;
5764                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5765         }
5766         return ret;
5767 }
5768
5769 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
5770 {
5771         return  __ufshcd_setup_clocks(hba, on, false);
5772 }
5773
5774 static int ufshcd_init_clocks(struct ufs_hba *hba)
5775 {
5776         int ret = 0;
5777         struct ufs_clk_info *clki;
5778         struct device *dev = hba->dev;
5779         struct list_head *head = &hba->clk_list_head;
5780
5781         if (!head || list_empty(head))
5782                 goto out;
5783
5784         list_for_each_entry(clki, head, list) {
5785                 if (!clki->name)
5786                         continue;
5787
5788                 clki->clk = devm_clk_get(dev, clki->name);
5789                 if (IS_ERR(clki->clk)) {
5790                         ret = PTR_ERR(clki->clk);
5791                         dev_err(dev, "%s: %s clk get failed, %d\n",
5792                                         __func__, clki->name, ret);
5793                         goto out;
5794                 }
5795
5796                 if (clki->max_freq) {
5797                         ret = clk_set_rate(clki->clk, clki->max_freq);
5798                         if (ret) {
5799                                 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
5800                                         __func__, clki->name,
5801                                         clki->max_freq, ret);
5802                                 goto out;
5803                         }
5804                         clki->curr_freq = clki->max_freq;
5805                 }
5806                 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
5807                                 clki->name, clk_get_rate(clki->clk));
5808         }
5809 out:
5810         return ret;
5811 }
5812
5813 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
5814 {
5815         int err = 0;
5816
5817         if (!hba->vops)
5818                 goto out;
5819
5820         err = ufshcd_vops_init(hba);
5821         if (err)
5822                 goto out;
5823
5824         err = ufshcd_vops_setup_regulators(hba, true);
5825         if (err)
5826                 goto out_exit;
5827
5828         goto out;
5829
5830 out_exit:
5831         ufshcd_vops_exit(hba);
5832 out:
5833         if (err)
5834                 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
5835                         __func__, ufshcd_get_var_name(hba), err);
5836         return err;
5837 }
5838
5839 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
5840 {
5841         if (!hba->vops)
5842                 return;
5843
5844         ufshcd_vops_setup_clocks(hba, false);
5845
5846         ufshcd_vops_setup_regulators(hba, false);
5847
5848         ufshcd_vops_exit(hba);
5849 }
5850
5851 static int ufshcd_hba_init(struct ufs_hba *hba)
5852 {
5853         int err;
5854
5855         /*
5856          * Handle host controller power separately from the UFS device power
5857          * rails as it will help controlling the UFS host controller power
5858          * collapse easily which is different than UFS device power collapse.
5859          * Also, enable the host controller power before we go ahead with rest
5860          * of the initialization here.
5861          */
5862         err = ufshcd_init_hba_vreg(hba);
5863         if (err)
5864                 goto out;
5865
5866         err = ufshcd_setup_hba_vreg(hba, true);
5867         if (err)
5868                 goto out;
5869
5870         err = ufshcd_init_clocks(hba);
5871         if (err)
5872                 goto out_disable_hba_vreg;
5873
5874         err = ufshcd_setup_clocks(hba, true);
5875         if (err)
5876                 goto out_disable_hba_vreg;
5877
5878         err = ufshcd_init_vreg(hba);
5879         if (err)
5880                 goto out_disable_clks;
5881
5882         err = ufshcd_setup_vreg(hba, true);
5883         if (err)
5884                 goto out_disable_clks;
5885
5886         err = ufshcd_variant_hba_init(hba);
5887         if (err)
5888                 goto out_disable_vreg;
5889
5890         hba->is_powered = true;
5891         goto out;
5892
5893 out_disable_vreg:
5894         ufshcd_setup_vreg(hba, false);
5895 out_disable_clks:
5896         ufshcd_setup_clocks(hba, false);
5897 out_disable_hba_vreg:
5898         ufshcd_setup_hba_vreg(hba, false);
5899 out:
5900         return err;
5901 }
5902
5903 static void ufshcd_hba_exit(struct ufs_hba *hba)
5904 {
5905         if (hba->is_powered) {
5906                 ufshcd_variant_hba_exit(hba);
5907                 ufshcd_setup_vreg(hba, false);
5908                 ufshcd_setup_clocks(hba, false);
5909                 ufshcd_setup_hba_vreg(hba, false);
5910                 hba->is_powered = false;
5911         }
5912 }
5913
5914 static int
5915 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
5916 {
5917         unsigned char cmd[6] = {REQUEST_SENSE,
5918                                 0,
5919                                 0,
5920                                 0,
5921                                 SCSI_SENSE_BUFFERSIZE,
5922                                 0};
5923         char *buffer;
5924         int ret;
5925
5926         buffer = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
5927         if (!buffer) {
5928                 ret = -ENOMEM;
5929                 goto out;
5930         }
5931
5932         ret = scsi_execute_req_flags(sdp, cmd, DMA_FROM_DEVICE, buffer,
5933                                 SCSI_SENSE_BUFFERSIZE, NULL,
5934                                 msecs_to_jiffies(1000), 3, NULL, REQ_PM);
5935         if (ret)
5936                 pr_err("%s: failed with err %d\n", __func__, ret);
5937
5938         kfree(buffer);
5939 out:
5940         return ret;
5941 }
5942
5943 /**
5944  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
5945  *                           power mode
5946  * @hba: per adapter instance
5947  * @pwr_mode: device power mode to set
5948  *
5949  * Returns 0 if requested power mode is set successfully
5950  * Returns non-zero if failed to set the requested power mode
5951  */
5952 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
5953                                      enum ufs_dev_pwr_mode pwr_mode)
5954 {
5955         unsigned char cmd[6] = { START_STOP };
5956         struct scsi_sense_hdr sshdr;
5957         struct scsi_device *sdp;
5958         unsigned long flags;
5959         int ret;
5960
5961         spin_lock_irqsave(hba->host->host_lock, flags);
5962         sdp = hba->sdev_ufs_device;
5963         if (sdp) {
5964                 ret = scsi_device_get(sdp);
5965                 if (!ret && !scsi_device_online(sdp)) {
5966                         ret = -ENODEV;
5967                         scsi_device_put(sdp);
5968                 }
5969         } else {
5970                 ret = -ENODEV;
5971         }
5972         spin_unlock_irqrestore(hba->host->host_lock, flags);
5973
5974         if (ret)
5975                 return ret;
5976
5977         /*
5978          * If scsi commands fail, the scsi mid-layer schedules scsi error-
5979          * handling, which would wait for host to be resumed. Since we know
5980          * we are functional while we are here, skip host resume in error
5981          * handling context.
5982          */
5983         hba->host->eh_noresume = 1;
5984         if (hba->wlun_dev_clr_ua) {
5985                 ret = ufshcd_send_request_sense(hba, sdp);
5986                 if (ret)
5987                         goto out;
5988                 /* Unit attention condition is cleared now */
5989                 hba->wlun_dev_clr_ua = false;
5990         }
5991
5992         cmd[4] = pwr_mode << 4;
5993
5994         /*
5995          * Current function would be generally called from the power management
5996          * callbacks hence set the REQ_PM flag so that it doesn't resume the
5997          * already suspended childs.
5998          */
5999         ret = scsi_execute_req_flags(sdp, cmd, DMA_NONE, NULL, 0, &sshdr,
6000                                      START_STOP_TIMEOUT, 0, NULL, REQ_PM);
6001         if (ret) {
6002                 sdev_printk(KERN_WARNING, sdp,
6003                             "START_STOP failed for power mode: %d, result %x\n",
6004                             pwr_mode, ret);
6005                 if (driver_byte(ret) & DRIVER_SENSE)
6006                         scsi_print_sense_hdr(sdp, NULL, &sshdr);
6007         }
6008
6009         if (!ret)
6010                 hba->curr_dev_pwr_mode = pwr_mode;
6011 out:
6012         scsi_device_put(sdp);
6013         hba->host->eh_noresume = 0;
6014         return ret;
6015 }
6016
6017 static int ufshcd_link_state_transition(struct ufs_hba *hba,
6018                                         enum uic_link_state req_link_state,
6019                                         int check_for_bkops)
6020 {
6021         int ret = 0;
6022
6023         if (req_link_state == hba->uic_link_state)
6024                 return 0;
6025
6026         if (req_link_state == UIC_LINK_HIBERN8_STATE) {
6027                 ret = ufshcd_uic_hibern8_enter(hba);
6028                 if (!ret)
6029                         ufshcd_set_link_hibern8(hba);
6030                 else
6031                         goto out;
6032         }
6033         /*
6034          * If autobkops is enabled, link can't be turned off because
6035          * turning off the link would also turn off the device.
6036          */
6037         else if ((req_link_state == UIC_LINK_OFF_STATE) &&
6038                    (!check_for_bkops || (check_for_bkops &&
6039                     !hba->auto_bkops_enabled))) {
6040                 /*
6041                  * Let's make sure that link is in low power mode, we are doing
6042                  * this currently by putting the link in Hibern8. Otherway to
6043                  * put the link in low power mode is to send the DME end point
6044                  * to device and then send the DME reset command to local
6045                  * unipro. But putting the link in hibern8 is much faster.
6046                  */
6047                 ret = ufshcd_uic_hibern8_enter(hba);
6048                 if (ret)
6049                         goto out;
6050                 /*
6051                  * Change controller state to "reset state" which
6052                  * should also put the link in off/reset state
6053                  */
6054                 ufshcd_hba_stop(hba, true);
6055                 /*
6056                  * TODO: Check if we need any delay to make sure that
6057                  * controller is reset
6058                  */
6059                 ufshcd_set_link_off(hba);
6060         }
6061
6062 out:
6063         return ret;
6064 }
6065
6066 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
6067 {
6068         /*
6069          * It seems some UFS devices may keep drawing more than sleep current
6070          * (atleast for 500us) from UFS rails (especially from VCCQ rail).
6071          * To avoid this situation, add 2ms delay before putting these UFS
6072          * rails in LPM mode.
6073          */
6074         if (!ufshcd_is_link_active(hba) &&
6075             hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
6076                 usleep_range(2000, 2100);
6077
6078         /*
6079          * If UFS device is either in UFS_Sleep turn off VCC rail to save some
6080          * power.
6081          *
6082          * If UFS device and link is in OFF state, all power supplies (VCC,
6083          * VCCQ, VCCQ2) can be turned off if power on write protect is not
6084          * required. If UFS link is inactive (Hibern8 or OFF state) and device
6085          * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
6086          *
6087          * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
6088          * in low power state which would save some power.
6089          */
6090         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
6091             !hba->dev_info.is_lu_power_on_wp) {
6092                 ufshcd_setup_vreg(hba, false);
6093         } else if (!ufshcd_is_ufs_dev_active(hba)) {
6094                 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
6095                 if (!ufshcd_is_link_active(hba)) {
6096                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
6097                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
6098                 }
6099         }
6100 }
6101
6102 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
6103 {
6104         int ret = 0;
6105
6106         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
6107             !hba->dev_info.is_lu_power_on_wp) {
6108                 ret = ufshcd_setup_vreg(hba, true);
6109         } else if (!ufshcd_is_ufs_dev_active(hba)) {
6110                 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
6111                 if (!ret && !ufshcd_is_link_active(hba)) {
6112                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
6113                         if (ret)
6114                                 goto vcc_disable;
6115                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
6116                         if (ret)
6117                                 goto vccq_lpm;
6118                 }
6119         }
6120         goto out;
6121
6122 vccq_lpm:
6123         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
6124 vcc_disable:
6125         ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
6126 out:
6127         return ret;
6128 }
6129
6130 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
6131 {
6132         if (ufshcd_is_link_off(hba))
6133                 ufshcd_setup_hba_vreg(hba, false);
6134 }
6135
6136 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
6137 {
6138         if (ufshcd_is_link_off(hba))
6139                 ufshcd_setup_hba_vreg(hba, true);
6140 }
6141
6142 /**
6143  * ufshcd_suspend - helper function for suspend operations
6144  * @hba: per adapter instance
6145  * @pm_op: desired low power operation type
6146  *
6147  * This function will try to put the UFS device and link into low power
6148  * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
6149  * (System PM level).
6150  *
6151  * If this function is called during shutdown, it will make sure that
6152  * both UFS device and UFS link is powered off.
6153  *
6154  * NOTE: UFS device & link must be active before we enter in this function.
6155  *
6156  * Returns 0 for success and non-zero for failure
6157  */
6158 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
6159 {
6160         int ret = 0;
6161         enum ufs_pm_level pm_lvl;
6162         enum ufs_dev_pwr_mode req_dev_pwr_mode;
6163         enum uic_link_state req_link_state;
6164
6165         hba->pm_op_in_progress = 1;
6166         if (!ufshcd_is_shutdown_pm(pm_op)) {
6167                 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
6168                          hba->rpm_lvl : hba->spm_lvl;
6169                 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
6170                 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
6171         } else {
6172                 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
6173                 req_link_state = UIC_LINK_OFF_STATE;
6174         }
6175
6176         /*
6177          * If we can't transition into any of the low power modes
6178          * just gate the clocks.
6179          */
6180         ufshcd_hold(hba, false);
6181         hba->clk_gating.is_suspended = true;
6182
6183         if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
6184                         req_link_state == UIC_LINK_ACTIVE_STATE) {
6185                 goto disable_clks;
6186         }
6187
6188         if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
6189             (req_link_state == hba->uic_link_state))
6190                 goto out;
6191
6192         /* UFS device & link must be active before we enter in this function */
6193         if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
6194                 ret = -EINVAL;
6195                 goto out;
6196         }
6197
6198         if (ufshcd_is_runtime_pm(pm_op)) {
6199                 if (ufshcd_can_autobkops_during_suspend(hba)) {
6200                         /*
6201                          * The device is idle with no requests in the queue,
6202                          * allow background operations if bkops status shows
6203                          * that performance might be impacted.
6204                          */
6205                         ret = ufshcd_urgent_bkops(hba);
6206                         if (ret)
6207                                 goto enable_gating;
6208                 } else {
6209                         /* make sure that auto bkops is disabled */
6210                         ufshcd_disable_auto_bkops(hba);
6211                 }
6212         }
6213
6214         if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
6215              ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
6216                !ufshcd_is_runtime_pm(pm_op))) {
6217                 /* ensure that bkops is disabled */
6218                 ufshcd_disable_auto_bkops(hba);
6219                 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
6220                 if (ret)
6221                         goto enable_gating;
6222         }
6223
6224         ret = ufshcd_link_state_transition(hba, req_link_state, 1);
6225         if (ret)
6226                 goto set_dev_active;
6227
6228         ufshcd_vreg_set_lpm(hba);
6229
6230 disable_clks:
6231         /*
6232          * The clock scaling needs access to controller registers. Hence, Wait
6233          * for pending clock scaling work to be done before clocks are
6234          * turned off.
6235          */
6236         if (ufshcd_is_clkscaling_enabled(hba)) {
6237                 devfreq_suspend_device(hba->devfreq);
6238                 hba->clk_scaling.window_start_t = 0;
6239         }
6240         /*
6241          * Call vendor specific suspend callback. As these callbacks may access
6242          * vendor specific host controller register space call them before the
6243          * host clocks are ON.
6244          */
6245         ret = ufshcd_vops_suspend(hba, pm_op);
6246         if (ret)
6247                 goto set_link_active;
6248
6249         ret = ufshcd_vops_setup_clocks(hba, false);
6250         if (ret)
6251                 goto vops_resume;
6252
6253         if (!ufshcd_is_link_active(hba))
6254                 ufshcd_setup_clocks(hba, false);
6255         else
6256                 /* If link is active, device ref_clk can't be switched off */
6257                 __ufshcd_setup_clocks(hba, false, true);
6258
6259         hba->clk_gating.state = CLKS_OFF;
6260         /*
6261          * Disable the host irq as host controller as there won't be any
6262          * host controller transaction expected till resume.
6263          */
6264         ufshcd_disable_irq(hba);
6265         /* Put the host controller in low power mode if possible */
6266         ufshcd_hba_vreg_set_lpm(hba);
6267         goto out;
6268
6269 vops_resume:
6270         ufshcd_vops_resume(hba, pm_op);
6271 set_link_active:
6272         ufshcd_vreg_set_hpm(hba);
6273         if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
6274                 ufshcd_set_link_active(hba);
6275         else if (ufshcd_is_link_off(hba))
6276                 ufshcd_host_reset_and_restore(hba);
6277 set_dev_active:
6278         if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
6279                 ufshcd_disable_auto_bkops(hba);
6280 enable_gating:
6281         hba->clk_gating.is_suspended = false;
6282         ufshcd_release(hba);
6283 out:
6284         hba->pm_op_in_progress = 0;
6285         return ret;
6286 }
6287
6288 /**
6289  * ufshcd_resume - helper function for resume operations
6290  * @hba: per adapter instance
6291  * @pm_op: runtime PM or system PM
6292  *
6293  * This function basically brings the UFS device, UniPro link and controller
6294  * to active state.
6295  *
6296  * Returns 0 for success and non-zero for failure
6297  */
6298 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
6299 {
6300         int ret;
6301         enum uic_link_state old_link_state;
6302
6303         hba->pm_op_in_progress = 1;
6304         old_link_state = hba->uic_link_state;
6305
6306         ufshcd_hba_vreg_set_hpm(hba);
6307         /* Make sure clocks are enabled before accessing controller */
6308         ret = ufshcd_setup_clocks(hba, true);
6309         if (ret)
6310                 goto out;
6311
6312         /* enable the host irq as host controller would be active soon */
6313         ret = ufshcd_enable_irq(hba);
6314         if (ret)
6315                 goto disable_irq_and_vops_clks;
6316
6317         ret = ufshcd_vreg_set_hpm(hba);
6318         if (ret)
6319                 goto disable_irq_and_vops_clks;
6320
6321         /*
6322          * Call vendor specific resume callback. As these callbacks may access
6323          * vendor specific host controller register space call them when the
6324          * host clocks are ON.
6325          */
6326         ret = ufshcd_vops_resume(hba, pm_op);
6327         if (ret)
6328                 goto disable_vreg;
6329
6330         if (ufshcd_is_link_hibern8(hba)) {
6331                 ret = ufshcd_uic_hibern8_exit(hba);
6332                 if (!ret)
6333                         ufshcd_set_link_active(hba);
6334                 else
6335                         goto vendor_suspend;
6336         } else if (ufshcd_is_link_off(hba)) {
6337                 ret = ufshcd_host_reset_and_restore(hba);
6338                 /*
6339                  * ufshcd_host_reset_and_restore() should have already
6340                  * set the link state as active
6341                  */
6342                 if (ret || !ufshcd_is_link_active(hba))
6343                         goto vendor_suspend;
6344         }
6345
6346         if (!ufshcd_is_ufs_dev_active(hba)) {
6347                 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
6348                 if (ret)
6349                         goto set_old_link_state;
6350         }
6351
6352         if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
6353                 ufshcd_enable_auto_bkops(hba);
6354         else
6355                 /*
6356                  * If BKOPs operations are urgently needed at this moment then
6357                  * keep auto-bkops enabled or else disable it.
6358                  */
6359                 ufshcd_urgent_bkops(hba);
6360
6361         hba->clk_gating.is_suspended = false;
6362
6363         if (ufshcd_is_clkscaling_enabled(hba))
6364                 devfreq_resume_device(hba->devfreq);
6365
6366         /* Schedule clock gating in case of no access to UFS device yet */
6367         ufshcd_release(hba);
6368         goto out;
6369
6370 set_old_link_state:
6371         ufshcd_link_state_transition(hba, old_link_state, 0);
6372 vendor_suspend:
6373         ufshcd_vops_suspend(hba, pm_op);
6374 disable_vreg:
6375         ufshcd_vreg_set_lpm(hba);
6376 disable_irq_and_vops_clks:
6377         ufshcd_disable_irq(hba);
6378         ufshcd_setup_clocks(hba, false);
6379 out:
6380         hba->pm_op_in_progress = 0;
6381         return ret;
6382 }
6383
6384 /**
6385  * ufshcd_system_suspend - system suspend routine
6386  * @hba: per adapter instance
6387  * @pm_op: runtime PM or system PM
6388  *
6389  * Check the description of ufshcd_suspend() function for more details.
6390  *
6391  * Returns 0 for success and non-zero for failure
6392  */
6393 int ufshcd_system_suspend(struct ufs_hba *hba)
6394 {
6395         int ret = 0;
6396
6397         if (!hba || !hba->is_powered)
6398                 return 0;
6399
6400         if (pm_runtime_suspended(hba->dev)) {
6401                 if (hba->rpm_lvl == hba->spm_lvl)
6402                         /*
6403                          * There is possibility that device may still be in
6404                          * active state during the runtime suspend.
6405                          */
6406                         if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
6407                             hba->curr_dev_pwr_mode) && !hba->auto_bkops_enabled)
6408                                 goto out;
6409
6410                 /*
6411                  * UFS device and/or UFS link low power states during runtime
6412                  * suspend seems to be different than what is expected during
6413                  * system suspend. Hence runtime resume the devic & link and
6414                  * let the system suspend low power states to take effect.
6415                  * TODO: If resume takes longer time, we might have optimize
6416                  * it in future by not resuming everything if possible.
6417                  */
6418                 ret = ufshcd_runtime_resume(hba);
6419                 if (ret)
6420                         goto out;
6421         }
6422
6423         ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
6424 out:
6425         if (!ret)
6426                 hba->is_sys_suspended = true;
6427         return ret;
6428 }
6429 EXPORT_SYMBOL(ufshcd_system_suspend);
6430
6431 /**
6432  * ufshcd_system_resume - system resume routine
6433  * @hba: per adapter instance
6434  *
6435  * Returns 0 for success and non-zero for failure
6436  */
6437
6438 int ufshcd_system_resume(struct ufs_hba *hba)
6439 {
6440         if (!hba)
6441                 return -EINVAL;
6442
6443         if (!hba->is_powered || pm_runtime_suspended(hba->dev))
6444                 /*
6445                  * Let the runtime resume take care of resuming
6446                  * if runtime suspended.
6447                  */
6448                 return 0;
6449
6450         return ufshcd_resume(hba, UFS_SYSTEM_PM);
6451 }
6452 EXPORT_SYMBOL(ufshcd_system_resume);
6453
6454 /**
6455  * ufshcd_runtime_suspend - runtime suspend routine
6456  * @hba: per adapter instance
6457  *
6458  * Check the description of ufshcd_suspend() function for more details.
6459  *
6460  * Returns 0 for success and non-zero for failure
6461  */
6462 int ufshcd_runtime_suspend(struct ufs_hba *hba)
6463 {
6464         if (!hba)
6465                 return -EINVAL;
6466
6467         if (!hba->is_powered)
6468                 return 0;
6469
6470         return ufshcd_suspend(hba, UFS_RUNTIME_PM);
6471 }
6472 EXPORT_SYMBOL(ufshcd_runtime_suspend);
6473
6474 /**
6475  * ufshcd_runtime_resume - runtime resume routine
6476  * @hba: per adapter instance
6477  *
6478  * This function basically brings the UFS device, UniPro link and controller
6479  * to active state. Following operations are done in this function:
6480  *
6481  * 1. Turn on all the controller related clocks
6482  * 2. Bring the UniPro link out of Hibernate state
6483  * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
6484  *    to active state.
6485  * 4. If auto-bkops is enabled on the device, disable it.
6486  *
6487  * So following would be the possible power state after this function return
6488  * successfully:
6489  *      S1: UFS device in Active state with VCC rail ON
6490  *          UniPro link in Active state
6491  *          All the UFS/UniPro controller clocks are ON
6492  *
6493  * Returns 0 for success and non-zero for failure
6494  */
6495 int ufshcd_runtime_resume(struct ufs_hba *hba)
6496 {
6497         if (!hba)
6498                 return -EINVAL;
6499
6500         if (!hba->is_powered)
6501                 return 0;
6502
6503         return ufshcd_resume(hba, UFS_RUNTIME_PM);
6504 }
6505 EXPORT_SYMBOL(ufshcd_runtime_resume);
6506
6507 int ufshcd_runtime_idle(struct ufs_hba *hba)
6508 {
6509         return 0;
6510 }
6511 EXPORT_SYMBOL(ufshcd_runtime_idle);
6512
6513 /**
6514  * ufshcd_shutdown - shutdown routine
6515  * @hba: per adapter instance
6516  *
6517  * This function would power off both UFS device and UFS link.
6518  *
6519  * Returns 0 always to allow force shutdown even in case of errors.
6520  */
6521 int ufshcd_shutdown(struct ufs_hba *hba)
6522 {
6523         int ret = 0;
6524
6525         if (!hba->is_powered)
6526                 goto out;
6527
6528         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
6529                 goto out;
6530
6531         if (pm_runtime_suspended(hba->dev)) {
6532                 ret = ufshcd_runtime_resume(hba);
6533                 if (ret)
6534                         goto out;
6535         }
6536
6537         ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
6538 out:
6539         if (ret)
6540                 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
6541         /* allow force shutdown even in case of errors */
6542         return 0;
6543 }
6544 EXPORT_SYMBOL(ufshcd_shutdown);
6545
6546 /*
6547  * Values permitted 0, 1, 2.
6548  * 0 -> Disable IO latency histograms (default)
6549  * 1 -> Enable IO latency histograms
6550  * 2 -> Zero out IO latency histograms
6551  */
6552 static ssize_t
6553 latency_hist_store(struct device *dev, struct device_attribute *attr,
6554                    const char *buf, size_t count)
6555 {
6556         struct ufs_hba *hba = dev_get_drvdata(dev);
6557         long value;
6558
6559         if (kstrtol(buf, 0, &value))
6560                 return -EINVAL;
6561         if (value == BLK_IO_LAT_HIST_ZERO) {
6562                 memset(&hba->io_lat_read, 0, sizeof(hba->io_lat_read));
6563                 memset(&hba->io_lat_write, 0, sizeof(hba->io_lat_write));
6564         } else if (value == BLK_IO_LAT_HIST_ENABLE ||
6565                  value == BLK_IO_LAT_HIST_DISABLE)
6566                 hba->latency_hist_enabled = value;
6567         return count;
6568 }
6569
6570 ssize_t
6571 latency_hist_show(struct device *dev, struct device_attribute *attr,
6572                   char *buf)
6573 {
6574         struct ufs_hba *hba = dev_get_drvdata(dev);
6575         size_t written_bytes;
6576
6577         written_bytes = blk_latency_hist_show("Read", &hba->io_lat_read,
6578                         buf, PAGE_SIZE);
6579         written_bytes += blk_latency_hist_show("Write", &hba->io_lat_write,
6580                         buf + written_bytes, PAGE_SIZE - written_bytes);
6581
6582         return written_bytes;
6583 }
6584
6585 static DEVICE_ATTR(latency_hist, S_IRUGO | S_IWUSR,
6586                    latency_hist_show, latency_hist_store);
6587
6588 static void
6589 ufshcd_init_latency_hist(struct ufs_hba *hba)
6590 {
6591         if (device_create_file(hba->dev, &dev_attr_latency_hist))
6592                 dev_err(hba->dev, "Failed to create latency_hist sysfs entry\n");
6593 }
6594
6595 static void
6596 ufshcd_exit_latency_hist(struct ufs_hba *hba)
6597 {
6598         device_create_file(hba->dev, &dev_attr_latency_hist);
6599 }
6600
6601 /**
6602  * ufshcd_remove - de-allocate SCSI host and host memory space
6603  *              data structure memory
6604  * @hba - per adapter instance
6605  */
6606 void ufshcd_remove(struct ufs_hba *hba)
6607 {
6608         scsi_remove_host(hba->host);
6609         /* disable interrupts */
6610         ufshcd_disable_intr(hba, hba->intr_mask);
6611         ufshcd_hba_stop(hba, true);
6612
6613         ufshcd_exit_clk_gating(hba);
6614         ufshcd_exit_latency_hist(hba);
6615         if (ufshcd_is_clkscaling_enabled(hba))
6616                 devfreq_remove_device(hba->devfreq);
6617         ufshcd_hba_exit(hba);
6618 }
6619 EXPORT_SYMBOL_GPL(ufshcd_remove);
6620
6621 /**
6622  * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
6623  * @hba: pointer to Host Bus Adapter (HBA)
6624  */
6625 void ufshcd_dealloc_host(struct ufs_hba *hba)
6626 {
6627         scsi_host_put(hba->host);
6628 }
6629 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
6630
6631 /**
6632  * ufshcd_set_dma_mask - Set dma mask based on the controller
6633  *                       addressing capability
6634  * @hba: per adapter instance
6635  *
6636  * Returns 0 for success, non-zero for failure
6637  */
6638 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
6639 {
6640         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
6641                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
6642                         return 0;
6643         }
6644         return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
6645 }
6646
6647 /**
6648  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
6649  * @dev: pointer to device handle
6650  * @hba_handle: driver private handle
6651  * Returns 0 on success, non-zero value on failure
6652  */
6653 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
6654 {
6655         struct Scsi_Host *host;
6656         struct ufs_hba *hba;
6657         int err = 0;
6658
6659         if (!dev) {
6660                 dev_err(dev,
6661                 "Invalid memory reference for dev is NULL\n");
6662                 err = -ENODEV;
6663                 goto out_error;
6664         }
6665
6666         host = scsi_host_alloc(&ufshcd_driver_template,
6667                                 sizeof(struct ufs_hba));
6668         if (!host) {
6669                 dev_err(dev, "scsi_host_alloc failed\n");
6670                 err = -ENOMEM;
6671                 goto out_error;
6672         }
6673         hba = shost_priv(host);
6674         hba->host = host;
6675         hba->dev = dev;
6676         *hba_handle = hba;
6677
6678 out_error:
6679         return err;
6680 }
6681 EXPORT_SYMBOL(ufshcd_alloc_host);
6682
6683 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
6684 {
6685         int ret = 0;
6686         struct ufs_clk_info *clki;
6687         struct list_head *head = &hba->clk_list_head;
6688
6689         if (!head || list_empty(head))
6690                 goto out;
6691
6692         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
6693         if (ret)
6694                 return ret;
6695
6696         list_for_each_entry(clki, head, list) {
6697                 if (!IS_ERR_OR_NULL(clki->clk)) {
6698                         if (scale_up && clki->max_freq) {
6699                                 if (clki->curr_freq == clki->max_freq)
6700                                         continue;
6701                                 ret = clk_set_rate(clki->clk, clki->max_freq);
6702                                 if (ret) {
6703                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
6704                                                 __func__, clki->name,
6705                                                 clki->max_freq, ret);
6706                                         break;
6707                                 }
6708                                 clki->curr_freq = clki->max_freq;
6709
6710                         } else if (!scale_up && clki->min_freq) {
6711                                 if (clki->curr_freq == clki->min_freq)
6712                                         continue;
6713                                 ret = clk_set_rate(clki->clk, clki->min_freq);
6714                                 if (ret) {
6715                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
6716                                                 __func__, clki->name,
6717                                                 clki->min_freq, ret);
6718                                         break;
6719                                 }
6720                                 clki->curr_freq = clki->min_freq;
6721                         }
6722                 }
6723                 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
6724                                 clki->name, clk_get_rate(clki->clk));
6725         }
6726
6727         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
6728
6729 out:
6730         return ret;
6731 }
6732
6733 static int ufshcd_devfreq_target(struct device *dev,
6734                                 unsigned long *freq, u32 flags)
6735 {
6736         int err = 0;
6737         struct ufs_hba *hba = dev_get_drvdata(dev);
6738         bool release_clk_hold = false;
6739         unsigned long irq_flags;
6740
6741         if (!ufshcd_is_clkscaling_enabled(hba))
6742                 return -EINVAL;
6743
6744         spin_lock_irqsave(hba->host->host_lock, irq_flags);
6745         if (ufshcd_eh_in_progress(hba)) {
6746                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
6747                 return 0;
6748         }
6749
6750         if (ufshcd_is_clkgating_allowed(hba) &&
6751             (hba->clk_gating.state != CLKS_ON)) {
6752                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
6753                         /* hold the vote until the scaling work is completed */
6754                         hba->clk_gating.active_reqs++;
6755                         release_clk_hold = true;
6756                         hba->clk_gating.state = CLKS_ON;
6757                 } else {
6758                         /*
6759                          * Clock gating work seems to be running in parallel
6760                          * hence skip scaling work to avoid deadlock between
6761                          * current scaling work and gating work.
6762                          */
6763                         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
6764                         return 0;
6765                 }
6766         }
6767         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
6768
6769         if (*freq == UINT_MAX)
6770                 err = ufshcd_scale_clks(hba, true);
6771         else if (*freq == 0)
6772                 err = ufshcd_scale_clks(hba, false);
6773
6774         spin_lock_irqsave(hba->host->host_lock, irq_flags);
6775         if (release_clk_hold)
6776                 __ufshcd_release(hba);
6777         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
6778
6779         return err;
6780 }
6781
6782 static int ufshcd_devfreq_get_dev_status(struct device *dev,
6783                 struct devfreq_dev_status *stat)
6784 {
6785         struct ufs_hba *hba = dev_get_drvdata(dev);
6786         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
6787         unsigned long flags;
6788
6789         if (!ufshcd_is_clkscaling_enabled(hba))
6790                 return -EINVAL;
6791
6792         memset(stat, 0, sizeof(*stat));
6793
6794         spin_lock_irqsave(hba->host->host_lock, flags);
6795         if (!scaling->window_start_t)
6796                 goto start_window;
6797
6798         if (scaling->is_busy_started)
6799                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
6800                                         scaling->busy_start_t));
6801
6802         stat->total_time = jiffies_to_usecs((long)jiffies -
6803                                 (long)scaling->window_start_t);
6804         stat->busy_time = scaling->tot_busy_t;
6805 start_window:
6806         scaling->window_start_t = jiffies;
6807         scaling->tot_busy_t = 0;
6808
6809         if (hba->outstanding_reqs) {
6810                 scaling->busy_start_t = ktime_get();
6811                 scaling->is_busy_started = true;
6812         } else {
6813                 scaling->busy_start_t = ktime_set(0, 0);
6814                 scaling->is_busy_started = false;
6815         }
6816         spin_unlock_irqrestore(hba->host->host_lock, flags);
6817         return 0;
6818 }
6819
6820 static struct devfreq_dev_profile ufs_devfreq_profile = {
6821         .polling_ms     = 100,
6822         .target         = ufshcd_devfreq_target,
6823         .get_dev_status = ufshcd_devfreq_get_dev_status,
6824 };
6825
6826 /**
6827  * ufshcd_init - Driver initialization routine
6828  * @hba: per-adapter instance
6829  * @mmio_base: base register address
6830  * @irq: Interrupt line of device
6831  * Returns 0 on success, non-zero value on failure
6832  */
6833 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
6834 {
6835         int err;
6836         struct Scsi_Host *host = hba->host;
6837         struct device *dev = hba->dev;
6838
6839         if (!mmio_base) {
6840                 dev_err(hba->dev,
6841                 "Invalid memory reference for mmio_base is NULL\n");
6842                 err = -ENODEV;
6843                 goto out_error;
6844         }
6845
6846         hba->mmio_base = mmio_base;
6847         hba->irq = irq;
6848
6849         /* Set descriptor lengths to specification defaults */
6850         ufshcd_def_desc_sizes(hba);
6851
6852         err = ufshcd_hba_init(hba);
6853         if (err)
6854                 goto out_error;
6855
6856         /* Read capabilities registers */
6857         ufshcd_hba_capabilities(hba);
6858
6859         /* Get UFS version supported by the controller */
6860         hba->ufs_version = ufshcd_get_ufs_version(hba);
6861
6862         /* Get Interrupt bit mask per version */
6863         hba->intr_mask = ufshcd_get_intr_mask(hba);
6864
6865         err = ufshcd_set_dma_mask(hba);
6866         if (err) {
6867                 dev_err(hba->dev, "set dma mask failed\n");
6868                 goto out_disable;
6869         }
6870
6871         /* Allocate memory for host memory space */
6872         err = ufshcd_memory_alloc(hba);
6873         if (err) {
6874                 dev_err(hba->dev, "Memory allocation failed\n");
6875                 goto out_disable;
6876         }
6877
6878         /* Configure LRB */
6879         ufshcd_host_memory_configure(hba);
6880
6881         host->can_queue = hba->nutrs;
6882         host->cmd_per_lun = hba->nutrs;
6883         host->max_id = UFSHCD_MAX_ID;
6884         host->max_lun = UFS_MAX_LUNS;
6885         host->max_channel = UFSHCD_MAX_CHANNEL;
6886         host->unique_id = host->host_no;
6887         host->max_cmd_len = MAX_CDB_SIZE;
6888
6889         hba->max_pwr_info.is_valid = false;
6890
6891         /* Initailize wait queue for task management */
6892         init_waitqueue_head(&hba->tm_wq);
6893         init_waitqueue_head(&hba->tm_tag_wq);
6894
6895         /* Initialize work queues */
6896         INIT_WORK(&hba->eh_work, ufshcd_err_handler);
6897         INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
6898
6899         /* Initialize UIC command mutex */
6900         mutex_init(&hba->uic_cmd_mutex);
6901
6902         /* Initialize mutex for device management commands */
6903         mutex_init(&hba->dev_cmd.lock);
6904
6905         /* Initialize device management tag acquire wait queue */
6906         init_waitqueue_head(&hba->dev_cmd.tag_wq);
6907
6908         ufshcd_init_clk_gating(hba);
6909
6910         /*
6911          * In order to avoid any spurious interrupt immediately after
6912          * registering UFS controller interrupt handler, clear any pending UFS
6913          * interrupt status and disable all the UFS interrupts.
6914          */
6915         ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
6916                       REG_INTERRUPT_STATUS);
6917         ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
6918         /*
6919          * Make sure that UFS interrupts are disabled and any pending interrupt
6920          * status is cleared before registering UFS interrupt handler.
6921          */
6922         mb();
6923
6924         /* IRQ registration */
6925         err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
6926         if (err) {
6927                 dev_err(hba->dev, "request irq failed\n");
6928                 goto exit_gating;
6929         } else {
6930                 hba->is_irq_enabled = true;
6931         }
6932
6933         err = scsi_add_host(host, hba->dev);
6934         if (err) {
6935                 dev_err(hba->dev, "scsi_add_host failed\n");
6936                 goto exit_gating;
6937         }
6938
6939         /* Host controller enable */
6940         err = ufshcd_hba_enable(hba);
6941         if (err) {
6942                 dev_err(hba->dev, "Host controller enable failed\n");
6943                 goto out_remove_scsi_host;
6944         }
6945
6946         if (ufshcd_is_clkscaling_enabled(hba)) {
6947                 hba->devfreq = devfreq_add_device(dev, &ufs_devfreq_profile,
6948                                                    "simple_ondemand", NULL);
6949                 if (IS_ERR(hba->devfreq)) {
6950                         dev_err(hba->dev, "Unable to register with devfreq %ld\n",
6951                                         PTR_ERR(hba->devfreq));
6952                         err = PTR_ERR(hba->devfreq);
6953                         goto out_remove_scsi_host;
6954                 }
6955                 /* Suspend devfreq until the UFS device is detected */
6956                 devfreq_suspend_device(hba->devfreq);
6957                 hba->clk_scaling.window_start_t = 0;
6958         }
6959
6960         /* Hold auto suspend until async scan completes */
6961         pm_runtime_get_sync(dev);
6962
6963         ufshcd_init_latency_hist(hba);
6964
6965         /*
6966          * We are assuming that device wasn't put in sleep/power-down
6967          * state exclusively during the boot stage before kernel.
6968          * This assumption helps avoid doing link startup twice during
6969          * ufshcd_probe_hba().
6970          */
6971         ufshcd_set_ufs_dev_active(hba);
6972
6973         async_schedule(ufshcd_async_scan, hba);
6974
6975         return 0;
6976
6977 out_remove_scsi_host:
6978         scsi_remove_host(hba->host);
6979 exit_gating:
6980         ufshcd_exit_clk_gating(hba);
6981         ufshcd_exit_latency_hist(hba);
6982 out_disable:
6983         hba->is_irq_enabled = false;
6984         ufshcd_hba_exit(hba);
6985 out_error:
6986         return err;
6987 }
6988 EXPORT_SYMBOL_GPL(ufshcd_init);
6989
6990 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
6991 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
6992 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
6993 MODULE_LICENSE("GPL");
6994 MODULE_VERSION(UFSHCD_DRIVER_VERSION);