1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Universal Flash Storage Host controller driver Core
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
12 #include <linux/async.h>
13 #include <linux/devfreq.h>
14 #include <linux/nls.h>
16 #include <linux/bitfield.h>
17 #include <linux/blk-pm.h>
18 #include <linux/blkdev.h>
19 #include <scsi/scsi_driver.h>
21 #include "ufs_quirks.h"
23 #include "ufs-sysfs.h"
24 #include "ufs-debugfs.h"
26 #include "ufshcd-crypto.h"
27 #include <asm/unaligned.h>
30 #define CREATE_TRACE_POINTS
31 #include <trace/events/ufs.h>
33 #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
36 /* UIC command timeout, unit: ms */
37 #define UIC_CMD_TIMEOUT 500
39 /* NOP OUT retries waiting for NOP IN response */
40 #define NOP_OUT_RETRIES 10
41 /* Timeout after 50 msecs if NOP OUT hangs without response */
42 #define NOP_OUT_TIMEOUT 50 /* msecs */
44 /* Query request retries */
45 #define QUERY_REQ_RETRIES 3
46 /* Query request timeout */
47 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
49 /* Task management command timeout */
50 #define TM_CMD_TIMEOUT 100 /* msecs */
52 /* maximum number of retries for a general UIC command */
53 #define UFS_UIC_COMMAND_RETRIES 3
55 /* maximum number of link-startup retries */
56 #define DME_LINKSTARTUP_RETRIES 3
58 /* Maximum retries for Hibern8 enter */
59 #define UIC_HIBERN8_ENTER_RETRIES 3
61 /* maximum number of reset retries before giving up */
62 #define MAX_HOST_RESET_RETRIES 5
64 /* Expose the flag value from utp_upiu_query.value */
65 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
67 /* Interrupt aggregation default timeout, unit: 40us */
68 #define INT_AGGR_DEF_TO 0x02
70 /* default delay of autosuspend: 2000 ms */
71 #define RPM_AUTOSUSPEND_DELAY_MS 2000
73 /* Default delay of RPM device flush delayed work */
74 #define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000
76 /* Default value of wait time before gating device ref clock */
77 #define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
79 /* Polling time to wait for fDeviceInit */
80 #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */
82 #define wlun_dev_to_hba(dv) shost_priv(to_scsi_device(dv)->host)
84 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \
88 _ret = ufshcd_enable_vreg(_dev, _vreg); \
90 _ret = ufshcd_disable_vreg(_dev, _vreg); \
94 #define ufshcd_hex_dump(prefix_str, buf, len) do { \
95 size_t __len = (len); \
96 print_hex_dump(KERN_ERR, prefix_str, \
97 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
98 16, 4, buf, __len, false); \
101 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
107 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
110 regs = kzalloc(len, GFP_ATOMIC);
114 for (pos = 0; pos < len; pos += 4)
115 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
117 ufshcd_hex_dump(prefix, regs, len);
122 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
125 UFSHCD_MAX_CHANNEL = 0,
127 UFSHCD_CMD_PER_LUN = 32,
128 UFSHCD_CAN_QUEUE = 32,
135 UFSHCD_STATE_OPERATIONAL,
136 UFSHCD_STATE_EH_SCHEDULED_FATAL,
137 UFSHCD_STATE_EH_SCHEDULED_NON_FATAL,
140 /* UFSHCD error handling flags */
142 UFSHCD_EH_IN_PROGRESS = (1 << 0),
145 /* UFSHCD UIC layer error flags */
147 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
148 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
149 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
150 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
151 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
152 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
153 UFSHCD_UIC_PA_GENERIC_ERROR = (1 << 6), /* Generic PA error */
156 #define ufshcd_set_eh_in_progress(h) \
157 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
158 #define ufshcd_eh_in_progress(h) \
159 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
160 #define ufshcd_clear_eh_in_progress(h) \
161 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
163 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
164 [UFS_PM_LVL_0] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
165 [UFS_PM_LVL_1] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
166 [UFS_PM_LVL_2] = {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
167 [UFS_PM_LVL_3] = {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
168 [UFS_PM_LVL_4] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
169 [UFS_PM_LVL_5] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
171 * For DeepSleep, the link is first put in hibern8 and then off.
172 * Leaving the link in hibern8 is not supported.
174 [UFS_PM_LVL_6] = {UFS_DEEPSLEEP_PWR_MODE, UIC_LINK_OFF_STATE},
177 static inline enum ufs_dev_pwr_mode
178 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
180 return ufs_pm_lvl_states[lvl].dev_state;
183 static inline enum uic_link_state
184 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
186 return ufs_pm_lvl_states[lvl].link_state;
189 static inline enum ufs_pm_level
190 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
191 enum uic_link_state link_state)
193 enum ufs_pm_level lvl;
195 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
196 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
197 (ufs_pm_lvl_states[lvl].link_state == link_state))
201 /* if no match found, return the level 0 */
205 static struct ufs_dev_fix ufs_fixups[] = {
206 /* UFS cards deviations table */
207 UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
208 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
209 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
210 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
211 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
212 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
213 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
214 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
215 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
216 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
217 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
218 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
219 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
220 UFS_DEVICE_QUIRK_PA_TACTIVATE),
221 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
222 UFS_DEVICE_QUIRK_PA_TACTIVATE),
226 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
227 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
228 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
229 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
230 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
231 static void ufshcd_hba_exit(struct ufs_hba *hba);
232 static int ufshcd_clear_ua_wluns(struct ufs_hba *hba);
233 static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
234 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
235 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
236 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
237 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
238 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
239 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
240 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
241 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
242 static irqreturn_t ufshcd_intr(int irq, void *__hba);
243 static int ufshcd_change_power_mode(struct ufs_hba *hba,
244 struct ufs_pa_layer_attr *pwr_mode);
245 static void ufshcd_schedule_eh_work(struct ufs_hba *hba);
246 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on);
247 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on);
248 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
249 struct ufs_vreg *vreg);
250 static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag);
251 static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
252 static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
253 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
254 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
256 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
258 return tag >= 0 && tag < hba->nutrs;
261 static inline void ufshcd_enable_irq(struct ufs_hba *hba)
263 if (!hba->is_irq_enabled) {
264 enable_irq(hba->irq);
265 hba->is_irq_enabled = true;
269 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
271 if (hba->is_irq_enabled) {
272 disable_irq(hba->irq);
273 hba->is_irq_enabled = false;
277 static inline void ufshcd_wb_config(struct ufs_hba *hba)
279 if (!ufshcd_is_wb_allowed(hba))
282 ufshcd_wb_toggle(hba, true);
284 ufshcd_wb_toggle_flush_during_h8(hba, true);
285 if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL))
286 ufshcd_wb_toggle_flush(hba, true);
289 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
291 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
292 scsi_unblock_requests(hba->host);
295 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
297 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
298 scsi_block_requests(hba->host);
301 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
302 enum ufs_trace_str_t str_t)
304 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
305 struct utp_upiu_header *header;
307 if (!trace_ufshcd_upiu_enabled())
310 if (str_t == UFS_CMD_SEND)
311 header = &rq->header;
313 header = &hba->lrb[tag].ucd_rsp_ptr->header;
315 trace_ufshcd_upiu(dev_name(hba->dev), str_t, header, &rq->sc.cdb,
319 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba,
320 enum ufs_trace_str_t str_t,
321 struct utp_upiu_req *rq_rsp)
323 if (!trace_ufshcd_upiu_enabled())
326 trace_ufshcd_upiu(dev_name(hba->dev), str_t, &rq_rsp->header,
327 &rq_rsp->qr, UFS_TSF_OSF);
330 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
331 enum ufs_trace_str_t str_t)
333 int off = (int)tag - hba->nutrs;
334 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
336 if (!trace_ufshcd_upiu_enabled())
339 if (str_t == UFS_TM_SEND)
340 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
341 &descp->upiu_req.req_header,
342 &descp->upiu_req.input_param1,
345 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
346 &descp->upiu_rsp.rsp_header,
347 &descp->upiu_rsp.output_param1,
351 static void ufshcd_add_uic_command_trace(struct ufs_hba *hba,
352 struct uic_command *ucmd,
353 enum ufs_trace_str_t str_t)
357 if (!trace_ufshcd_uic_command_enabled())
360 if (str_t == UFS_CMD_SEND)
363 cmd = ufshcd_readl(hba, REG_UIC_COMMAND);
365 trace_ufshcd_uic_command(dev_name(hba->dev), str_t, cmd,
366 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1),
367 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2),
368 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3));
371 static void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
372 enum ufs_trace_str_t str_t)
375 u8 opcode = 0, group_id = 0;
377 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
378 struct scsi_cmnd *cmd = lrbp->cmd;
379 int transfer_len = -1;
384 if (!trace_ufshcd_command_enabled()) {
385 /* trace UPIU W/O tracing command */
386 ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
390 /* trace UPIU also */
391 ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
392 opcode = cmd->cmnd[0];
393 lba = sectors_to_logical(cmd->device, blk_rq_pos(cmd->request));
395 if (opcode == READ_10 || opcode == WRITE_10) {
397 * Currently we only fully trace read(10) and write(10) commands
400 be32_to_cpu(lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
401 if (opcode == WRITE_10)
402 group_id = lrbp->cmd->cmnd[6];
403 } else if (opcode == UNMAP) {
405 * The number of Bytes to be unmapped beginning with the lba.
407 transfer_len = blk_rq_bytes(cmd->request);
410 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
411 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
412 trace_ufshcd_command(dev_name(hba->dev), str_t, tag,
413 doorbell, transfer_len, intr, lba, opcode, group_id);
416 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
418 struct ufs_clk_info *clki;
419 struct list_head *head = &hba->clk_list_head;
421 if (list_empty(head))
424 list_for_each_entry(clki, head, list) {
425 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
427 dev_err(hba->dev, "clk: %s, rate: %u\n",
428 clki->name, clki->curr_freq);
432 static void ufshcd_print_evt(struct ufs_hba *hba, u32 id,
437 struct ufs_event_hist *e;
439 if (id >= UFS_EVT_CNT)
442 e = &hba->ufs_stats.event[id];
444 for (i = 0; i < UFS_EVENT_HIST_LENGTH; i++) {
445 int p = (i + e->pos) % UFS_EVENT_HIST_LENGTH;
447 if (e->tstamp[p] == 0)
449 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
450 e->val[p], ktime_to_us(e->tstamp[p]));
455 dev_err(hba->dev, "No record of %s\n", err_name);
457 dev_err(hba->dev, "%s: total cnt=%llu\n", err_name, e->cnt);
460 static void ufshcd_print_evt_hist(struct ufs_hba *hba)
462 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
464 ufshcd_print_evt(hba, UFS_EVT_PA_ERR, "pa_err");
465 ufshcd_print_evt(hba, UFS_EVT_DL_ERR, "dl_err");
466 ufshcd_print_evt(hba, UFS_EVT_NL_ERR, "nl_err");
467 ufshcd_print_evt(hba, UFS_EVT_TL_ERR, "tl_err");
468 ufshcd_print_evt(hba, UFS_EVT_DME_ERR, "dme_err");
469 ufshcd_print_evt(hba, UFS_EVT_AUTO_HIBERN8_ERR,
471 ufshcd_print_evt(hba, UFS_EVT_FATAL_ERR, "fatal_err");
472 ufshcd_print_evt(hba, UFS_EVT_LINK_STARTUP_FAIL,
473 "link_startup_fail");
474 ufshcd_print_evt(hba, UFS_EVT_RESUME_ERR, "resume_fail");
475 ufshcd_print_evt(hba, UFS_EVT_SUSPEND_ERR,
477 ufshcd_print_evt(hba, UFS_EVT_DEV_RESET, "dev_reset");
478 ufshcd_print_evt(hba, UFS_EVT_HOST_RESET, "host_reset");
479 ufshcd_print_evt(hba, UFS_EVT_ABORT, "task_abort");
481 ufshcd_vops_dbg_register_dump(hba);
485 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
487 struct ufshcd_lrb *lrbp;
491 for_each_set_bit(tag, &bitmap, hba->nutrs) {
492 lrbp = &hba->lrb[tag];
494 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
495 tag, ktime_to_us(lrbp->issue_time_stamp));
496 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
497 tag, ktime_to_us(lrbp->compl_time_stamp));
499 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
500 tag, (u64)lrbp->utrd_dma_addr);
502 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
503 sizeof(struct utp_transfer_req_desc));
504 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
505 (u64)lrbp->ucd_req_dma_addr);
506 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
507 sizeof(struct utp_upiu_req));
508 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
509 (u64)lrbp->ucd_rsp_dma_addr);
510 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
511 sizeof(struct utp_upiu_rsp));
513 prdt_length = le16_to_cpu(
514 lrbp->utr_descriptor_ptr->prd_table_length);
515 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
516 prdt_length /= sizeof(struct ufshcd_sg_entry);
519 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
521 (u64)lrbp->ucd_prdt_dma_addr);
524 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
525 sizeof(struct ufshcd_sg_entry) * prdt_length);
529 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
533 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
534 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
536 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
537 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
541 static void ufshcd_print_host_state(struct ufs_hba *hba)
543 struct scsi_device *sdev_ufs = hba->sdev_ufs_device;
545 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
546 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
547 hba->outstanding_reqs, hba->outstanding_tasks);
548 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
549 hba->saved_err, hba->saved_uic_err);
550 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
551 hba->curr_dev_pwr_mode, hba->uic_link_state);
552 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
553 hba->pm_op_in_progress, hba->is_sys_suspended);
554 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
555 hba->auto_bkops_enabled, hba->host->host_self_blocked);
556 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
558 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt=%d\n",
559 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
560 hba->ufs_stats.hibern8_exit_cnt);
561 dev_err(hba->dev, "last intr at %lld us, last intr status=0x%x\n",
562 ktime_to_us(hba->ufs_stats.last_intr_ts),
563 hba->ufs_stats.last_intr_status);
564 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
565 hba->eh_flags, hba->req_abort_count);
566 dev_err(hba->dev, "hba->ufs_version=0x%x, Host capabilities=0x%x, caps=0x%x\n",
567 hba->ufs_version, hba->capabilities, hba->caps);
568 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
571 dev_err(hba->dev, "UFS dev info: %.8s %.16s rev %.4s\n",
572 sdev_ufs->vendor, sdev_ufs->model, sdev_ufs->rev);
574 ufshcd_print_clk_freqs(hba);
578 * ufshcd_print_pwr_info - print power params as saved in hba
580 * @hba: per-adapter instance
582 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
584 static const char * const names[] = {
594 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
596 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
597 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
598 names[hba->pwr_info.pwr_rx],
599 names[hba->pwr_info.pwr_tx],
600 hba->pwr_info.hs_rate);
603 static void ufshcd_device_reset(struct ufs_hba *hba)
607 err = ufshcd_vops_device_reset(hba);
610 ufshcd_set_ufs_dev_active(hba);
611 if (ufshcd_is_wb_allowed(hba)) {
612 hba->dev_info.wb_enabled = false;
613 hba->dev_info.wb_buf_flush_enabled = false;
616 if (err != -EOPNOTSUPP)
617 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
620 void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
628 usleep_range(us, us + tolerance);
630 EXPORT_SYMBOL_GPL(ufshcd_delay_us);
633 * ufshcd_wait_for_register - wait for register value to change
634 * @hba: per-adapter interface
635 * @reg: mmio register offset
636 * @mask: mask to apply to the read register value
637 * @val: value to wait for
638 * @interval_us: polling interval in microseconds
639 * @timeout_ms: timeout in milliseconds
642 * -ETIMEDOUT on error, zero on success.
644 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
645 u32 val, unsigned long interval_us,
646 unsigned long timeout_ms)
649 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
651 /* ignore bits that we don't intend to wait on */
654 while ((ufshcd_readl(hba, reg) & mask) != val) {
655 usleep_range(interval_us, interval_us + 50);
656 if (time_after(jiffies, timeout)) {
657 if ((ufshcd_readl(hba, reg) & mask) != val)
667 * ufshcd_get_intr_mask - Get the interrupt bit mask
668 * @hba: Pointer to adapter instance
670 * Returns interrupt bit mask per version
672 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
674 if (hba->ufs_version == ufshci_version(1, 0))
675 return INTERRUPT_MASK_ALL_VER_10;
676 if (hba->ufs_version <= ufshci_version(2, 0))
677 return INTERRUPT_MASK_ALL_VER_11;
679 return INTERRUPT_MASK_ALL_VER_21;
683 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
684 * @hba: Pointer to adapter instance
686 * Returns UFSHCI version supported by the controller
688 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
692 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
693 ufshci_ver = ufshcd_vops_get_ufs_hci_version(hba);
695 ufshci_ver = ufshcd_readl(hba, REG_UFS_VERSION);
698 * UFSHCI v1.x uses a different version scheme, in order
699 * to allow the use of comparisons with the ufshci_version
700 * function, we convert it to the same scheme as ufs 2.0+.
702 if (ufshci_ver & 0x00010000)
703 return ufshci_version(1, ufshci_ver & 0x00000100);
709 * ufshcd_is_device_present - Check if any device connected to
710 * the host controller
711 * @hba: pointer to adapter instance
713 * Returns true if device present, false if no device detected
715 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
717 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
718 DEVICE_PRESENT) ? true : false;
722 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
723 * @lrbp: pointer to local command reference block
725 * This function is used to get the OCS field from UTRD
726 * Returns the OCS field in the UTRD
728 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
730 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
734 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
735 * @hba: per adapter instance
736 * @pos: position of the bit to be cleared
738 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
740 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
741 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
743 ufshcd_writel(hba, ~(1 << pos),
744 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
748 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
749 * @hba: per adapter instance
750 * @pos: position of the bit to be cleared
752 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
754 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
755 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
757 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
761 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
762 * @hba: per adapter instance
763 * @tag: position of the bit to be cleared
765 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
767 clear_bit(tag, &hba->outstanding_reqs);
771 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
772 * @reg: Register value of host controller status
774 * Returns integer, 0 on Success and positive value if failed
776 static inline int ufshcd_get_lists_status(u32 reg)
778 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
782 * ufshcd_get_uic_cmd_result - Get the UIC command result
783 * @hba: Pointer to adapter instance
785 * This function gets the result of UIC command completion
786 * Returns 0 on success, non zero value on error
788 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
790 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
791 MASK_UIC_COMMAND_RESULT;
795 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
796 * @hba: Pointer to adapter instance
798 * This function gets UIC command argument3
799 * Returns 0 on success, non zero value on error
801 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
803 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
807 * ufshcd_get_req_rsp - returns the TR response transaction type
808 * @ucd_rsp_ptr: pointer to response UPIU
811 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
813 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
817 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
818 * @ucd_rsp_ptr: pointer to response UPIU
820 * This function gets the response status and scsi_status from response UPIU
821 * Returns the response result code.
824 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
826 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
830 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
832 * @ucd_rsp_ptr: pointer to response UPIU
834 * Return the data segment length.
836 static inline unsigned int
837 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
839 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
840 MASK_RSP_UPIU_DATA_SEG_LEN;
844 * ufshcd_is_exception_event - Check if the device raised an exception event
845 * @ucd_rsp_ptr: pointer to response UPIU
847 * The function checks if the device raised an exception event indicated in
848 * the Device Information field of response UPIU.
850 * Returns true if exception is raised, false otherwise.
852 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
854 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
855 MASK_RSP_EXCEPTION_EVENT ? true : false;
859 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
860 * @hba: per adapter instance
863 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
865 ufshcd_writel(hba, INT_AGGR_ENABLE |
866 INT_AGGR_COUNTER_AND_TIMER_RESET,
867 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
871 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
872 * @hba: per adapter instance
873 * @cnt: Interrupt aggregation counter threshold
874 * @tmout: Interrupt aggregation timeout value
877 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
879 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
880 INT_AGGR_COUNTER_THLD_VAL(cnt) |
881 INT_AGGR_TIMEOUT_VAL(tmout),
882 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
886 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
887 * @hba: per adapter instance
889 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
891 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
895 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
896 * When run-stop registers are set to 1, it indicates the
897 * host controller that it can process the requests
898 * @hba: per adapter instance
900 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
902 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
903 REG_UTP_TASK_REQ_LIST_RUN_STOP);
904 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
905 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
909 * ufshcd_hba_start - Start controller initialization sequence
910 * @hba: per adapter instance
912 static inline void ufshcd_hba_start(struct ufs_hba *hba)
914 u32 val = CONTROLLER_ENABLE;
916 if (ufshcd_crypto_enable(hba))
917 val |= CRYPTO_GENERAL_ENABLE;
919 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
923 * ufshcd_is_hba_active - Get controller state
924 * @hba: per adapter instance
926 * Returns false if controller is active, true otherwise
928 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
930 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
934 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
936 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
937 if (hba->ufs_version <= ufshci_version(1, 1))
938 return UFS_UNIPRO_VER_1_41;
940 return UFS_UNIPRO_VER_1_6;
942 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
944 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
947 * If both host and device support UniPro ver1.6 or later, PA layer
948 * parameters tuning happens during link startup itself.
950 * We can manually tune PA layer parameters if either host or device
951 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
952 * logic simple, we will only do manual tuning if local unipro version
953 * doesn't support ver1.6 or later.
955 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
962 * ufshcd_set_clk_freq - set UFS controller clock frequencies
963 * @hba: per adapter instance
964 * @scale_up: If True, set max possible frequency othewise set low frequency
966 * Returns 0 if successful
967 * Returns < 0 for any other errors
969 static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
972 struct ufs_clk_info *clki;
973 struct list_head *head = &hba->clk_list_head;
975 if (list_empty(head))
978 list_for_each_entry(clki, head, list) {
979 if (!IS_ERR_OR_NULL(clki->clk)) {
980 if (scale_up && clki->max_freq) {
981 if (clki->curr_freq == clki->max_freq)
984 ret = clk_set_rate(clki->clk, clki->max_freq);
986 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
987 __func__, clki->name,
988 clki->max_freq, ret);
991 trace_ufshcd_clk_scaling(dev_name(hba->dev),
992 "scaled up", clki->name,
996 clki->curr_freq = clki->max_freq;
998 } else if (!scale_up && clki->min_freq) {
999 if (clki->curr_freq == clki->min_freq)
1002 ret = clk_set_rate(clki->clk, clki->min_freq);
1004 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1005 __func__, clki->name,
1006 clki->min_freq, ret);
1009 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1010 "scaled down", clki->name,
1013 clki->curr_freq = clki->min_freq;
1016 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
1017 clki->name, clk_get_rate(clki->clk));
1025 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1026 * @hba: per adapter instance
1027 * @scale_up: True if scaling up and false if scaling down
1029 * Returns 0 if successful
1030 * Returns < 0 for any other errors
1032 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1035 ktime_t start = ktime_get();
1037 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1041 ret = ufshcd_set_clk_freq(hba, scale_up);
1045 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1047 ufshcd_set_clk_freq(hba, !scale_up);
1050 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1051 (scale_up ? "up" : "down"),
1052 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1057 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
1058 * @hba: per adapter instance
1059 * @scale_up: True if scaling up and false if scaling down
1061 * Returns true if scaling is required, false otherwise.
1063 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
1066 struct ufs_clk_info *clki;
1067 struct list_head *head = &hba->clk_list_head;
1069 if (list_empty(head))
1072 list_for_each_entry(clki, head, list) {
1073 if (!IS_ERR_OR_NULL(clki->clk)) {
1074 if (scale_up && clki->max_freq) {
1075 if (clki->curr_freq == clki->max_freq)
1078 } else if (!scale_up && clki->min_freq) {
1079 if (clki->curr_freq == clki->min_freq)
1089 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1090 u64 wait_timeout_us)
1092 unsigned long flags;
1096 bool timeout = false, do_last_check = false;
1099 ufshcd_hold(hba, false);
1100 spin_lock_irqsave(hba->host->host_lock, flags);
1102 * Wait for all the outstanding tasks/transfer requests.
1103 * Verify by checking the doorbell registers are clear.
1105 start = ktime_get();
1107 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1112 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1113 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1114 if (!tm_doorbell && !tr_doorbell) {
1117 } else if (do_last_check) {
1121 spin_unlock_irqrestore(hba->host->host_lock, flags);
1123 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1127 * We might have scheduled out for long time so make
1128 * sure to check if doorbells are cleared by this time
1131 do_last_check = true;
1133 spin_lock_irqsave(hba->host->host_lock, flags);
1134 } while (tm_doorbell || tr_doorbell);
1138 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1139 __func__, tm_doorbell, tr_doorbell);
1143 spin_unlock_irqrestore(hba->host->host_lock, flags);
1144 ufshcd_release(hba);
1149 * ufshcd_scale_gear - scale up/down UFS gear
1150 * @hba: per adapter instance
1151 * @scale_up: True for scaling up gear and false for scaling down
1153 * Returns 0 for success,
1154 * Returns -EBUSY if scaling can't happen at this time
1155 * Returns non-zero for any other errors
1157 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1160 struct ufs_pa_layer_attr new_pwr_info;
1163 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1164 sizeof(struct ufs_pa_layer_attr));
1166 memcpy(&new_pwr_info, &hba->pwr_info,
1167 sizeof(struct ufs_pa_layer_attr));
1169 if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||
1170 hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {
1171 /* save the current power mode */
1172 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1174 sizeof(struct ufs_pa_layer_attr));
1176 /* scale down gear */
1177 new_pwr_info.gear_tx = hba->clk_scaling.min_gear;
1178 new_pwr_info.gear_rx = hba->clk_scaling.min_gear;
1182 /* check if the power mode needs to be changed or not? */
1183 ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
1185 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1187 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1188 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1193 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1195 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1198 * make sure that there are no outstanding requests when
1199 * clock scaling is in progress
1201 ufshcd_scsi_block_requests(hba);
1202 down_write(&hba->clk_scaling_lock);
1204 if (!hba->clk_scaling.is_allowed ||
1205 ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1207 up_write(&hba->clk_scaling_lock);
1208 ufshcd_scsi_unblock_requests(hba);
1212 /* let's not get into low power until clock scaling is completed */
1213 ufshcd_hold(hba, false);
1219 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, bool writelock)
1222 up_write(&hba->clk_scaling_lock);
1224 up_read(&hba->clk_scaling_lock);
1225 ufshcd_scsi_unblock_requests(hba);
1226 ufshcd_release(hba);
1230 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1231 * @hba: per adapter instance
1232 * @scale_up: True for scaling up and false for scalin down
1234 * Returns 0 for success,
1235 * Returns -EBUSY if scaling can't happen at this time
1236 * Returns non-zero for any other errors
1238 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1241 bool is_writelock = true;
1243 ret = ufshcd_clock_scaling_prepare(hba);
1247 /* scale down the gear before scaling down clocks */
1249 ret = ufshcd_scale_gear(hba, false);
1254 ret = ufshcd_scale_clks(hba, scale_up);
1257 ufshcd_scale_gear(hba, true);
1261 /* scale up the gear after scaling up clocks */
1263 ret = ufshcd_scale_gear(hba, true);
1265 ufshcd_scale_clks(hba, false);
1270 /* Enable Write Booster if we have scaled up else disable it */
1271 downgrade_write(&hba->clk_scaling_lock);
1272 is_writelock = false;
1273 ufshcd_wb_toggle(hba, scale_up);
1276 ufshcd_clock_scaling_unprepare(hba, is_writelock);
1280 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1282 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1283 clk_scaling.suspend_work);
1284 unsigned long irq_flags;
1286 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1287 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1288 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1291 hba->clk_scaling.is_suspended = true;
1292 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1294 __ufshcd_suspend_clkscaling(hba);
1297 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1299 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1300 clk_scaling.resume_work);
1301 unsigned long irq_flags;
1303 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1304 if (!hba->clk_scaling.is_suspended) {
1305 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1308 hba->clk_scaling.is_suspended = false;
1309 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1311 devfreq_resume_device(hba->devfreq);
1314 static int ufshcd_devfreq_target(struct device *dev,
1315 unsigned long *freq, u32 flags)
1318 struct ufs_hba *hba = dev_get_drvdata(dev);
1320 bool scale_up, sched_clk_scaling_suspend_work = false;
1321 struct list_head *clk_list = &hba->clk_list_head;
1322 struct ufs_clk_info *clki;
1323 unsigned long irq_flags;
1325 if (!ufshcd_is_clkscaling_supported(hba))
1328 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1329 /* Override with the closest supported frequency */
1330 *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
1331 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1332 if (ufshcd_eh_in_progress(hba)) {
1333 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1337 if (!hba->clk_scaling.active_reqs)
1338 sched_clk_scaling_suspend_work = true;
1340 if (list_empty(clk_list)) {
1341 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1345 /* Decide based on the rounded-off frequency and update */
1346 scale_up = (*freq == clki->max_freq) ? true : false;
1348 *freq = clki->min_freq;
1349 /* Update the frequency */
1350 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1351 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1353 goto out; /* no state change required */
1355 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1357 start = ktime_get();
1358 ret = ufshcd_devfreq_scale(hba, scale_up);
1360 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1361 (scale_up ? "up" : "down"),
1362 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1365 if (sched_clk_scaling_suspend_work)
1366 queue_work(hba->clk_scaling.workq,
1367 &hba->clk_scaling.suspend_work);
1372 static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1376 WARN_ON_ONCE(reserved);
1381 /* Whether or not any tag is in use by a request that is in progress. */
1382 static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1384 struct request_queue *q = hba->cmd_queue;
1387 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1391 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1392 struct devfreq_dev_status *stat)
1394 struct ufs_hba *hba = dev_get_drvdata(dev);
1395 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1396 unsigned long flags;
1397 struct list_head *clk_list = &hba->clk_list_head;
1398 struct ufs_clk_info *clki;
1401 if (!ufshcd_is_clkscaling_supported(hba))
1404 memset(stat, 0, sizeof(*stat));
1406 spin_lock_irqsave(hba->host->host_lock, flags);
1407 curr_t = ktime_get();
1408 if (!scaling->window_start_t)
1411 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1413 * If current frequency is 0, then the ondemand governor considers
1414 * there's no initial frequency set. And it always requests to set
1415 * to max. frequency.
1417 stat->current_frequency = clki->curr_freq;
1418 if (scaling->is_busy_started)
1419 scaling->tot_busy_t += ktime_us_delta(curr_t,
1420 scaling->busy_start_t);
1422 stat->total_time = ktime_us_delta(curr_t, scaling->window_start_t);
1423 stat->busy_time = scaling->tot_busy_t;
1425 scaling->window_start_t = curr_t;
1426 scaling->tot_busy_t = 0;
1428 if (hba->outstanding_reqs) {
1429 scaling->busy_start_t = curr_t;
1430 scaling->is_busy_started = true;
1432 scaling->busy_start_t = 0;
1433 scaling->is_busy_started = false;
1435 spin_unlock_irqrestore(hba->host->host_lock, flags);
1439 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1441 struct list_head *clk_list = &hba->clk_list_head;
1442 struct ufs_clk_info *clki;
1443 struct devfreq *devfreq;
1446 /* Skip devfreq if we don't have any clocks in the list */
1447 if (list_empty(clk_list))
1450 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1451 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1452 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1454 ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
1455 &hba->vps->ondemand_data);
1456 devfreq = devfreq_add_device(hba->dev,
1457 &hba->vps->devfreq_profile,
1458 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1459 &hba->vps->ondemand_data);
1460 if (IS_ERR(devfreq)) {
1461 ret = PTR_ERR(devfreq);
1462 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1464 dev_pm_opp_remove(hba->dev, clki->min_freq);
1465 dev_pm_opp_remove(hba->dev, clki->max_freq);
1469 hba->devfreq = devfreq;
1474 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1476 struct list_head *clk_list = &hba->clk_list_head;
1477 struct ufs_clk_info *clki;
1482 devfreq_remove_device(hba->devfreq);
1483 hba->devfreq = NULL;
1485 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1486 dev_pm_opp_remove(hba->dev, clki->min_freq);
1487 dev_pm_opp_remove(hba->dev, clki->max_freq);
1490 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1492 unsigned long flags;
1494 devfreq_suspend_device(hba->devfreq);
1495 spin_lock_irqsave(hba->host->host_lock, flags);
1496 hba->clk_scaling.window_start_t = 0;
1497 spin_unlock_irqrestore(hba->host->host_lock, flags);
1500 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1502 unsigned long flags;
1503 bool suspend = false;
1505 cancel_work_sync(&hba->clk_scaling.suspend_work);
1506 cancel_work_sync(&hba->clk_scaling.resume_work);
1508 spin_lock_irqsave(hba->host->host_lock, flags);
1509 if (!hba->clk_scaling.is_suspended) {
1511 hba->clk_scaling.is_suspended = true;
1513 spin_unlock_irqrestore(hba->host->host_lock, flags);
1516 __ufshcd_suspend_clkscaling(hba);
1519 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1521 unsigned long flags;
1522 bool resume = false;
1524 spin_lock_irqsave(hba->host->host_lock, flags);
1525 if (hba->clk_scaling.is_suspended) {
1527 hba->clk_scaling.is_suspended = false;
1529 spin_unlock_irqrestore(hba->host->host_lock, flags);
1532 devfreq_resume_device(hba->devfreq);
1535 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1536 struct device_attribute *attr, char *buf)
1538 struct ufs_hba *hba = dev_get_drvdata(dev);
1540 return sysfs_emit(buf, "%d\n", hba->clk_scaling.is_enabled);
1543 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1544 struct device_attribute *attr, const char *buf, size_t count)
1546 struct ufs_hba *hba = dev_get_drvdata(dev);
1550 if (kstrtou32(buf, 0, &value))
1553 down(&hba->host_sem);
1554 if (!ufshcd_is_user_access_allowed(hba)) {
1560 if (value == hba->clk_scaling.is_enabled)
1563 ufshcd_rpm_get_sync(hba);
1564 ufshcd_hold(hba, false);
1566 hba->clk_scaling.is_enabled = value;
1569 ufshcd_resume_clkscaling(hba);
1571 ufshcd_suspend_clkscaling(hba);
1572 err = ufshcd_devfreq_scale(hba, true);
1574 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1578 ufshcd_release(hba);
1579 ufshcd_rpm_put_sync(hba);
1582 return err ? err : count;
1585 static void ufshcd_init_clk_scaling_sysfs(struct ufs_hba *hba)
1587 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1588 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1589 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1590 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1591 hba->clk_scaling.enable_attr.attr.mode = 0644;
1592 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1593 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1596 static void ufshcd_remove_clk_scaling_sysfs(struct ufs_hba *hba)
1598 if (hba->clk_scaling.enable_attr.attr.name)
1599 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
1602 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1604 char wq_name[sizeof("ufs_clkscaling_00")];
1606 if (!ufshcd_is_clkscaling_supported(hba))
1609 if (!hba->clk_scaling.min_gear)
1610 hba->clk_scaling.min_gear = UFS_HS_G1;
1612 INIT_WORK(&hba->clk_scaling.suspend_work,
1613 ufshcd_clk_scaling_suspend_work);
1614 INIT_WORK(&hba->clk_scaling.resume_work,
1615 ufshcd_clk_scaling_resume_work);
1617 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1618 hba->host->host_no);
1619 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1621 hba->clk_scaling.is_initialized = true;
1624 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1626 if (!hba->clk_scaling.is_initialized)
1629 ufshcd_remove_clk_scaling_sysfs(hba);
1630 destroy_workqueue(hba->clk_scaling.workq);
1631 ufshcd_devfreq_remove(hba);
1632 hba->clk_scaling.is_initialized = false;
1635 static void ufshcd_ungate_work(struct work_struct *work)
1638 unsigned long flags;
1639 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1640 clk_gating.ungate_work);
1642 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1644 spin_lock_irqsave(hba->host->host_lock, flags);
1645 if (hba->clk_gating.state == CLKS_ON) {
1646 spin_unlock_irqrestore(hba->host->host_lock, flags);
1650 spin_unlock_irqrestore(hba->host->host_lock, flags);
1651 ufshcd_hba_vreg_set_hpm(hba);
1652 ufshcd_setup_clocks(hba, true);
1654 ufshcd_enable_irq(hba);
1656 /* Exit from hibern8 */
1657 if (ufshcd_can_hibern8_during_gating(hba)) {
1658 /* Prevent gating in this path */
1659 hba->clk_gating.is_suspended = true;
1660 if (ufshcd_is_link_hibern8(hba)) {
1661 ret = ufshcd_uic_hibern8_exit(hba);
1663 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1666 ufshcd_set_link_active(hba);
1668 hba->clk_gating.is_suspended = false;
1671 ufshcd_scsi_unblock_requests(hba);
1675 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1676 * Also, exit from hibern8 mode and set the link as active.
1677 * @hba: per adapter instance
1678 * @async: This indicates whether caller should ungate clocks asynchronously.
1680 int ufshcd_hold(struct ufs_hba *hba, bool async)
1684 unsigned long flags;
1686 if (!ufshcd_is_clkgating_allowed(hba))
1688 spin_lock_irqsave(hba->host->host_lock, flags);
1689 hba->clk_gating.active_reqs++;
1692 switch (hba->clk_gating.state) {
1695 * Wait for the ungate work to complete if in progress.
1696 * Though the clocks may be in ON state, the link could
1697 * still be in hibner8 state if hibern8 is allowed
1698 * during clock gating.
1699 * Make sure we exit hibern8 state also in addition to
1702 if (ufshcd_can_hibern8_during_gating(hba) &&
1703 ufshcd_is_link_hibern8(hba)) {
1706 hba->clk_gating.active_reqs--;
1709 spin_unlock_irqrestore(hba->host->host_lock, flags);
1710 flush_result = flush_work(&hba->clk_gating.ungate_work);
1711 if (hba->clk_gating.is_suspended && !flush_result)
1713 spin_lock_irqsave(hba->host->host_lock, flags);
1718 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1719 hba->clk_gating.state = CLKS_ON;
1720 trace_ufshcd_clk_gating(dev_name(hba->dev),
1721 hba->clk_gating.state);
1725 * If we are here, it means gating work is either done or
1726 * currently running. Hence, fall through to cancel gating
1727 * work and to enable clocks.
1731 hba->clk_gating.state = REQ_CLKS_ON;
1732 trace_ufshcd_clk_gating(dev_name(hba->dev),
1733 hba->clk_gating.state);
1734 if (queue_work(hba->clk_gating.clk_gating_workq,
1735 &hba->clk_gating.ungate_work))
1736 ufshcd_scsi_block_requests(hba);
1738 * fall through to check if we should wait for this
1739 * work to be done or not.
1745 hba->clk_gating.active_reqs--;
1749 spin_unlock_irqrestore(hba->host->host_lock, flags);
1750 flush_work(&hba->clk_gating.ungate_work);
1751 /* Make sure state is CLKS_ON before returning */
1752 spin_lock_irqsave(hba->host->host_lock, flags);
1755 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1756 __func__, hba->clk_gating.state);
1759 spin_unlock_irqrestore(hba->host->host_lock, flags);
1763 EXPORT_SYMBOL_GPL(ufshcd_hold);
1765 static void ufshcd_gate_work(struct work_struct *work)
1767 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1768 clk_gating.gate_work.work);
1769 unsigned long flags;
1772 spin_lock_irqsave(hba->host->host_lock, flags);
1774 * In case you are here to cancel this work the gating state
1775 * would be marked as REQ_CLKS_ON. In this case save time by
1776 * skipping the gating work and exit after changing the clock
1779 if (hba->clk_gating.is_suspended ||
1780 (hba->clk_gating.state != REQ_CLKS_OFF)) {
1781 hba->clk_gating.state = CLKS_ON;
1782 trace_ufshcd_clk_gating(dev_name(hba->dev),
1783 hba->clk_gating.state);
1787 if (hba->clk_gating.active_reqs
1788 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1789 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1790 || hba->active_uic_cmd || hba->uic_async_done)
1793 spin_unlock_irqrestore(hba->host->host_lock, flags);
1795 /* put the link into hibern8 mode before turning off clocks */
1796 if (ufshcd_can_hibern8_during_gating(hba)) {
1797 ret = ufshcd_uic_hibern8_enter(hba);
1799 hba->clk_gating.state = CLKS_ON;
1800 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
1802 trace_ufshcd_clk_gating(dev_name(hba->dev),
1803 hba->clk_gating.state);
1806 ufshcd_set_link_hibern8(hba);
1809 ufshcd_disable_irq(hba);
1811 ufshcd_setup_clocks(hba, false);
1813 /* Put the host controller in low power mode if possible */
1814 ufshcd_hba_vreg_set_lpm(hba);
1816 * In case you are here to cancel this work the gating state
1817 * would be marked as REQ_CLKS_ON. In this case keep the state
1818 * as REQ_CLKS_ON which would anyway imply that clocks are off
1819 * and a request to turn them on is pending. By doing this way,
1820 * we keep the state machine in tact and this would ultimately
1821 * prevent from doing cancel work multiple times when there are
1822 * new requests arriving before the current cancel work is done.
1824 spin_lock_irqsave(hba->host->host_lock, flags);
1825 if (hba->clk_gating.state == REQ_CLKS_OFF) {
1826 hba->clk_gating.state = CLKS_OFF;
1827 trace_ufshcd_clk_gating(dev_name(hba->dev),
1828 hba->clk_gating.state);
1831 spin_unlock_irqrestore(hba->host->host_lock, flags);
1836 /* host lock must be held before calling this variant */
1837 static void __ufshcd_release(struct ufs_hba *hba)
1839 if (!ufshcd_is_clkgating_allowed(hba))
1842 hba->clk_gating.active_reqs--;
1844 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended ||
1845 hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL ||
1846 hba->outstanding_tasks ||
1847 hba->active_uic_cmd || hba->uic_async_done ||
1848 hba->clk_gating.state == CLKS_OFF)
1851 hba->clk_gating.state = REQ_CLKS_OFF;
1852 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1853 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1854 &hba->clk_gating.gate_work,
1855 msecs_to_jiffies(hba->clk_gating.delay_ms));
1858 void ufshcd_release(struct ufs_hba *hba)
1860 unsigned long flags;
1862 spin_lock_irqsave(hba->host->host_lock, flags);
1863 __ufshcd_release(hba);
1864 spin_unlock_irqrestore(hba->host->host_lock, flags);
1866 EXPORT_SYMBOL_GPL(ufshcd_release);
1868 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1869 struct device_attribute *attr, char *buf)
1871 struct ufs_hba *hba = dev_get_drvdata(dev);
1873 return sysfs_emit(buf, "%lu\n", hba->clk_gating.delay_ms);
1876 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1877 struct device_attribute *attr, const char *buf, size_t count)
1879 struct ufs_hba *hba = dev_get_drvdata(dev);
1880 unsigned long flags, value;
1882 if (kstrtoul(buf, 0, &value))
1885 spin_lock_irqsave(hba->host->host_lock, flags);
1886 hba->clk_gating.delay_ms = value;
1887 spin_unlock_irqrestore(hba->host->host_lock, flags);
1891 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1892 struct device_attribute *attr, char *buf)
1894 struct ufs_hba *hba = dev_get_drvdata(dev);
1896 return sysfs_emit(buf, "%d\n", hba->clk_gating.is_enabled);
1899 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1900 struct device_attribute *attr, const char *buf, size_t count)
1902 struct ufs_hba *hba = dev_get_drvdata(dev);
1903 unsigned long flags;
1906 if (kstrtou32(buf, 0, &value))
1911 spin_lock_irqsave(hba->host->host_lock, flags);
1912 if (value == hba->clk_gating.is_enabled)
1916 __ufshcd_release(hba);
1918 hba->clk_gating.active_reqs++;
1920 hba->clk_gating.is_enabled = value;
1922 spin_unlock_irqrestore(hba->host->host_lock, flags);
1926 static void ufshcd_init_clk_gating_sysfs(struct ufs_hba *hba)
1928 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1929 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1930 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1931 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1932 hba->clk_gating.delay_attr.attr.mode = 0644;
1933 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1934 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1936 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1937 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1938 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1939 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1940 hba->clk_gating.enable_attr.attr.mode = 0644;
1941 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1942 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1945 static void ufshcd_remove_clk_gating_sysfs(struct ufs_hba *hba)
1947 if (hba->clk_gating.delay_attr.attr.name)
1948 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1949 if (hba->clk_gating.enable_attr.attr.name)
1950 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1953 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1955 char wq_name[sizeof("ufs_clk_gating_00")];
1957 if (!ufshcd_is_clkgating_allowed(hba))
1960 hba->clk_gating.state = CLKS_ON;
1962 hba->clk_gating.delay_ms = 150;
1963 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1964 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1966 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1967 hba->host->host_no);
1968 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1969 WQ_MEM_RECLAIM | WQ_HIGHPRI);
1971 ufshcd_init_clk_gating_sysfs(hba);
1973 hba->clk_gating.is_enabled = true;
1974 hba->clk_gating.is_initialized = true;
1977 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1979 if (!hba->clk_gating.is_initialized)
1981 ufshcd_remove_clk_gating_sysfs(hba);
1982 cancel_work_sync(&hba->clk_gating.ungate_work);
1983 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1984 destroy_workqueue(hba->clk_gating.clk_gating_workq);
1985 hba->clk_gating.is_initialized = false;
1988 /* Must be called with host lock acquired */
1989 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1991 bool queue_resume_work = false;
1992 ktime_t curr_t = ktime_get();
1993 unsigned long flags;
1995 if (!ufshcd_is_clkscaling_supported(hba))
1998 spin_lock_irqsave(hba->host->host_lock, flags);
1999 if (!hba->clk_scaling.active_reqs++)
2000 queue_resume_work = true;
2002 if (!hba->clk_scaling.is_enabled || hba->pm_op_in_progress) {
2003 spin_unlock_irqrestore(hba->host->host_lock, flags);
2007 if (queue_resume_work)
2008 queue_work(hba->clk_scaling.workq,
2009 &hba->clk_scaling.resume_work);
2011 if (!hba->clk_scaling.window_start_t) {
2012 hba->clk_scaling.window_start_t = curr_t;
2013 hba->clk_scaling.tot_busy_t = 0;
2014 hba->clk_scaling.is_busy_started = false;
2017 if (!hba->clk_scaling.is_busy_started) {
2018 hba->clk_scaling.busy_start_t = curr_t;
2019 hba->clk_scaling.is_busy_started = true;
2021 spin_unlock_irqrestore(hba->host->host_lock, flags);
2024 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
2026 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
2027 unsigned long flags;
2029 if (!ufshcd_is_clkscaling_supported(hba))
2032 spin_lock_irqsave(hba->host->host_lock, flags);
2033 hba->clk_scaling.active_reqs--;
2034 if (!hba->outstanding_reqs && scaling->is_busy_started) {
2035 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
2036 scaling->busy_start_t));
2037 scaling->busy_start_t = 0;
2038 scaling->is_busy_started = false;
2040 spin_unlock_irqrestore(hba->host->host_lock, flags);
2043 static inline int ufshcd_monitor_opcode2dir(u8 opcode)
2045 if (opcode == READ_6 || opcode == READ_10 || opcode == READ_16)
2047 else if (opcode == WRITE_6 || opcode == WRITE_10 || opcode == WRITE_16)
2053 static inline bool ufshcd_should_inform_monitor(struct ufs_hba *hba,
2054 struct ufshcd_lrb *lrbp)
2056 struct ufs_hba_monitor *m = &hba->monitor;
2058 return (m->enabled && lrbp && lrbp->cmd &&
2059 (!m->chunk_size || m->chunk_size == lrbp->cmd->sdb.length) &&
2060 ktime_before(hba->monitor.enabled_ts, lrbp->issue_time_stamp));
2063 static void ufshcd_start_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2065 int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
2066 unsigned long flags;
2068 spin_lock_irqsave(hba->host->host_lock, flags);
2069 if (dir >= 0 && hba->monitor.nr_queued[dir]++ == 0)
2070 hba->monitor.busy_start_ts[dir] = ktime_get();
2071 spin_unlock_irqrestore(hba->host->host_lock, flags);
2074 static void ufshcd_update_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2076 int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
2077 unsigned long flags;
2079 spin_lock_irqsave(hba->host->host_lock, flags);
2080 if (dir >= 0 && hba->monitor.nr_queued[dir] > 0) {
2081 struct request *req = lrbp->cmd->request;
2082 struct ufs_hba_monitor *m = &hba->monitor;
2083 ktime_t now, inc, lat;
2085 now = lrbp->compl_time_stamp;
2086 inc = ktime_sub(now, m->busy_start_ts[dir]);
2087 m->total_busy[dir] = ktime_add(m->total_busy[dir], inc);
2088 m->nr_sec_rw[dir] += blk_rq_sectors(req);
2090 /* Update latencies */
2092 lat = ktime_sub(now, lrbp->issue_time_stamp);
2093 m->lat_sum[dir] += lat;
2094 if (m->lat_max[dir] < lat || !m->lat_max[dir])
2095 m->lat_max[dir] = lat;
2096 if (m->lat_min[dir] > lat || !m->lat_min[dir])
2097 m->lat_min[dir] = lat;
2099 m->nr_queued[dir]--;
2100 /* Push forward the busy start of monitor */
2101 m->busy_start_ts[dir] = now;
2103 spin_unlock_irqrestore(hba->host->host_lock, flags);
2107 * ufshcd_send_command - Send SCSI or device management commands
2108 * @hba: per adapter instance
2109 * @task_tag: Task tag of the command
2112 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
2114 struct ufshcd_lrb *lrbp = &hba->lrb[task_tag];
2116 lrbp->issue_time_stamp = ktime_get();
2117 lrbp->compl_time_stamp = ktime_set(0, 0);
2118 ufshcd_vops_setup_xfer_req(hba, task_tag, (lrbp->cmd ? true : false));
2119 ufshcd_add_command_trace(hba, task_tag, UFS_CMD_SEND);
2120 ufshcd_clk_scaling_start_busy(hba);
2121 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
2122 ufshcd_start_monitor(hba, lrbp);
2123 if (ufshcd_has_utrlcnr(hba)) {
2124 set_bit(task_tag, &hba->outstanding_reqs);
2125 ufshcd_writel(hba, 1 << task_tag,
2126 REG_UTP_TRANSFER_REQ_DOOR_BELL);
2128 unsigned long flags;
2130 spin_lock_irqsave(hba->host->host_lock, flags);
2131 set_bit(task_tag, &hba->outstanding_reqs);
2132 ufshcd_writel(hba, 1 << task_tag,
2133 REG_UTP_TRANSFER_REQ_DOOR_BELL);
2134 spin_unlock_irqrestore(hba->host->host_lock, flags);
2136 /* Make sure that doorbell is committed immediately */
2141 * ufshcd_copy_sense_data - Copy sense data in case of check condition
2142 * @lrbp: pointer to local reference block
2144 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2147 if (lrbp->sense_buffer &&
2148 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
2151 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
2152 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
2154 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
2160 * ufshcd_copy_query_response() - Copy the Query Response and the data
2162 * @hba: per adapter instance
2163 * @lrbp: pointer to local reference block
2166 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2168 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2170 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
2172 /* Get the descriptor */
2173 if (hba->dev_cmd.query.descriptor &&
2174 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
2175 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
2176 GENERAL_UPIU_REQUEST_SIZE;
2180 /* data segment length */
2181 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
2182 MASK_QUERY_DATA_SEG_LEN;
2183 buf_len = be16_to_cpu(
2184 hba->dev_cmd.query.request.upiu_req.length);
2185 if (likely(buf_len >= resp_len)) {
2186 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2189 "%s: rsp size %d is bigger than buffer size %d",
2190 __func__, resp_len, buf_len);
2199 * ufshcd_hba_capabilities - Read controller capabilities
2200 * @hba: per adapter instance
2202 * Return: 0 on success, negative on error.
2204 static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
2208 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
2210 /* nutrs and nutmrs are 0 based values */
2211 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2213 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2215 /* Read crypto capabilities */
2216 err = ufshcd_hba_init_crypto_capabilities(hba);
2218 dev_err(hba->dev, "crypto setup failed\n");
2224 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2225 * to accept UIC commands
2226 * @hba: per adapter instance
2227 * Return true on success, else false
2229 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2231 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2238 * ufshcd_get_upmcrs - Get the power mode change request status
2239 * @hba: Pointer to adapter instance
2241 * This function gets the UPMCRS field of HCS register
2242 * Returns value of UPMCRS field
2244 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2246 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2250 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2251 * @hba: per adapter instance
2252 * @uic_cmd: UIC command
2254 * Mutex must be held.
2257 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2259 WARN_ON(hba->active_uic_cmd);
2261 hba->active_uic_cmd = uic_cmd;
2264 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2265 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2266 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2268 ufshcd_add_uic_command_trace(hba, uic_cmd, UFS_CMD_SEND);
2271 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2276 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2277 * @hba: per adapter instance
2278 * @uic_cmd: UIC command
2280 * Must be called with mutex held.
2281 * Returns 0 only if success.
2284 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2287 unsigned long flags;
2289 if (wait_for_completion_timeout(&uic_cmd->done,
2290 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
2291 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2295 "uic cmd 0x%x with arg3 0x%x completion timeout\n",
2296 uic_cmd->command, uic_cmd->argument3);
2298 if (!uic_cmd->cmd_active) {
2299 dev_err(hba->dev, "%s: UIC cmd has been completed, return the result\n",
2301 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2305 spin_lock_irqsave(hba->host->host_lock, flags);
2306 hba->active_uic_cmd = NULL;
2307 spin_unlock_irqrestore(hba->host->host_lock, flags);
2313 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2314 * @hba: per adapter instance
2315 * @uic_cmd: UIC command
2316 * @completion: initialize the completion only if this is set to true
2318 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2319 * with mutex held and host_lock locked.
2320 * Returns 0 only if success.
2323 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2326 if (!ufshcd_ready_for_uic_cmd(hba)) {
2328 "Controller not ready to accept UIC commands\n");
2333 init_completion(&uic_cmd->done);
2335 uic_cmd->cmd_active = 1;
2336 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2342 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2343 * @hba: per adapter instance
2344 * @uic_cmd: UIC command
2346 * Returns 0 only if success.
2348 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2351 unsigned long flags;
2353 ufshcd_hold(hba, false);
2354 mutex_lock(&hba->uic_cmd_mutex);
2355 ufshcd_add_delay_before_dme_cmd(hba);
2357 spin_lock_irqsave(hba->host->host_lock, flags);
2358 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2359 spin_unlock_irqrestore(hba->host->host_lock, flags);
2361 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2363 mutex_unlock(&hba->uic_cmd_mutex);
2365 ufshcd_release(hba);
2370 * ufshcd_map_sg - Map scatter-gather list to prdt
2371 * @hba: per adapter instance
2372 * @lrbp: pointer to local reference block
2374 * Returns 0 in case of success, non-zero value in case of failure
2376 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2378 struct ufshcd_sg_entry *prd_table;
2379 struct scatterlist *sg;
2380 struct scsi_cmnd *cmd;
2385 sg_segments = scsi_dma_map(cmd);
2386 if (sg_segments < 0)
2391 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2392 lrbp->utr_descriptor_ptr->prd_table_length =
2393 cpu_to_le16((sg_segments *
2394 sizeof(struct ufshcd_sg_entry)));
2396 lrbp->utr_descriptor_ptr->prd_table_length =
2397 cpu_to_le16((u16) (sg_segments));
2399 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2401 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2403 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2404 prd_table[i].base_addr =
2405 cpu_to_le32(lower_32_bits(sg->dma_address));
2406 prd_table[i].upper_addr =
2407 cpu_to_le32(upper_32_bits(sg->dma_address));
2408 prd_table[i].reserved = 0;
2411 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2418 * ufshcd_enable_intr - enable interrupts
2419 * @hba: per adapter instance
2420 * @intrs: interrupt bits
2422 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2424 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2426 if (hba->ufs_version == ufshci_version(1, 0)) {
2428 rw = set & INTERRUPT_MASK_RW_VER_10;
2429 set = rw | ((set ^ intrs) & intrs);
2434 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2438 * ufshcd_disable_intr - disable interrupts
2439 * @hba: per adapter instance
2440 * @intrs: interrupt bits
2442 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2444 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2446 if (hba->ufs_version == ufshci_version(1, 0)) {
2448 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2449 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2450 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2456 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2460 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2461 * descriptor according to request
2462 * @lrbp: pointer to local reference block
2463 * @upiu_flags: flags required in the header
2464 * @cmd_dir: requests data direction
2466 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2467 u8 *upiu_flags, enum dma_data_direction cmd_dir)
2469 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2475 if (cmd_dir == DMA_FROM_DEVICE) {
2476 data_direction = UTP_DEVICE_TO_HOST;
2477 *upiu_flags = UPIU_CMD_FLAGS_READ;
2478 } else if (cmd_dir == DMA_TO_DEVICE) {
2479 data_direction = UTP_HOST_TO_DEVICE;
2480 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2482 data_direction = UTP_NO_DATA_TRANSFER;
2483 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2486 dword_0 = data_direction | (lrbp->command_type
2487 << UPIU_COMMAND_TYPE_OFFSET);
2489 dword_0 |= UTP_REQ_DESC_INT_CMD;
2491 /* Prepare crypto related dwords */
2492 ufshcd_prepare_req_desc_hdr_crypto(lrbp, &dword_0, &dword_1, &dword_3);
2494 /* Transfer request descriptor header fields */
2495 req_desc->header.dword_0 = cpu_to_le32(dword_0);
2496 req_desc->header.dword_1 = cpu_to_le32(dword_1);
2498 * assigning invalid value for command status. Controller
2499 * updates OCS on command completion, with the command
2502 req_desc->header.dword_2 =
2503 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2504 req_desc->header.dword_3 = cpu_to_le32(dword_3);
2506 req_desc->prd_table_length = 0;
2510 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2512 * @lrbp: local reference block pointer
2513 * @upiu_flags: flags
2516 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u8 upiu_flags)
2518 struct scsi_cmnd *cmd = lrbp->cmd;
2519 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2520 unsigned short cdb_len;
2522 /* command descriptor fields */
2523 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2524 UPIU_TRANSACTION_COMMAND, upiu_flags,
2525 lrbp->lun, lrbp->task_tag);
2526 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2527 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2529 /* Total EHS length and Data segment length will be zero */
2530 ucd_req_ptr->header.dword_2 = 0;
2532 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
2534 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
2535 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2536 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
2538 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2542 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2545 * @lrbp: local reference block pointer
2546 * @upiu_flags: flags
2548 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2549 struct ufshcd_lrb *lrbp, u8 upiu_flags)
2551 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2552 struct ufs_query *query = &hba->dev_cmd.query;
2553 u16 len = be16_to_cpu(query->request.upiu_req.length);
2555 /* Query request header */
2556 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2557 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2558 lrbp->lun, lrbp->task_tag);
2559 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2560 0, query->request.query_func, 0, 0);
2562 /* Data segment length only need for WRITE_DESC */
2563 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2564 ucd_req_ptr->header.dword_2 =
2565 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2567 ucd_req_ptr->header.dword_2 = 0;
2569 /* Copy the Query Request buffer as is */
2570 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2573 /* Copy the Descriptor */
2574 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2575 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2577 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2580 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2582 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2584 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2586 /* command descriptor fields */
2587 ucd_req_ptr->header.dword_0 =
2589 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2590 /* clear rest of the fields of basic header */
2591 ucd_req_ptr->header.dword_1 = 0;
2592 ucd_req_ptr->header.dword_2 = 0;
2594 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2598 * ufshcd_compose_devman_upiu - UFS Protocol Information Unit(UPIU)
2599 * for Device Management Purposes
2600 * @hba: per adapter instance
2601 * @lrbp: pointer to local reference block
2603 static int ufshcd_compose_devman_upiu(struct ufs_hba *hba,
2604 struct ufshcd_lrb *lrbp)
2609 if (hba->ufs_version <= ufshci_version(1, 1))
2610 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2612 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2614 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2615 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2616 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2617 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2618 ufshcd_prepare_utp_nop_upiu(lrbp);
2626 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2628 * @hba: per adapter instance
2629 * @lrbp: pointer to local reference block
2631 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2636 if (hba->ufs_version <= ufshci_version(1, 1))
2637 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2639 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2641 if (likely(lrbp->cmd)) {
2642 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2643 lrbp->cmd->sc_data_direction);
2644 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2653 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2654 * @upiu_wlun_id: UPIU W-LUN id
2656 * Returns SCSI W-LUN id
2658 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2660 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2663 static inline bool is_rpmb_wlun(struct scsi_device *sdev)
2665 return sdev->lun == ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN);
2668 static inline bool is_device_wlun(struct scsi_device *sdev)
2671 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN);
2674 static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2676 struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2677 struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2678 dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2679 i * sizeof(struct utp_transfer_cmd_desc);
2680 u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2682 u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2684 lrb->utr_descriptor_ptr = utrdlp + i;
2685 lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2686 i * sizeof(struct utp_transfer_req_desc);
2687 lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2688 lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2689 lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2690 lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2691 lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2692 lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2696 * ufshcd_queuecommand - main entry point for SCSI requests
2697 * @host: SCSI host pointer
2698 * @cmd: command from SCSI Midlayer
2700 * Returns 0 for success, non-zero in case of failure
2702 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2704 struct ufshcd_lrb *lrbp;
2705 struct ufs_hba *hba;
2709 hba = shost_priv(host);
2711 tag = cmd->request->tag;
2712 if (!ufshcd_valid_tag(hba, tag)) {
2714 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2715 __func__, tag, cmd, cmd->request);
2719 if (!down_read_trylock(&hba->clk_scaling_lock))
2720 return SCSI_MLQUEUE_HOST_BUSY;
2722 switch (hba->ufshcd_state) {
2723 case UFSHCD_STATE_OPERATIONAL:
2724 case UFSHCD_STATE_EH_SCHEDULED_NON_FATAL:
2726 case UFSHCD_STATE_EH_SCHEDULED_FATAL:
2728 * pm_runtime_get_sync() is used at error handling preparation
2729 * stage. If a scsi cmd, e.g. the SSU cmd, is sent from hba's
2730 * PM ops, it can never be finished if we let SCSI layer keep
2731 * retrying it, which gets err handler stuck forever. Neither
2732 * can we let the scsi cmd pass through, because UFS is in bad
2733 * state, the scsi cmd may eventually time out, which will get
2734 * err handler blocked for too long. So, just fail the scsi cmd
2735 * sent from PM ops, err handler can recover PM error anyways.
2737 if (hba->pm_op_in_progress) {
2738 hba->force_reset = true;
2739 set_host_byte(cmd, DID_BAD_TARGET);
2740 cmd->scsi_done(cmd);
2744 case UFSHCD_STATE_RESET:
2745 err = SCSI_MLQUEUE_HOST_BUSY;
2747 case UFSHCD_STATE_ERROR:
2748 set_host_byte(cmd, DID_ERROR);
2749 cmd->scsi_done(cmd);
2752 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2753 __func__, hba->ufshcd_state);
2754 set_host_byte(cmd, DID_BAD_TARGET);
2755 cmd->scsi_done(cmd);
2759 hba->req_abort_count = 0;
2761 err = ufshcd_hold(hba, true);
2763 err = SCSI_MLQUEUE_HOST_BUSY;
2766 WARN_ON(ufshcd_is_clkgating_allowed(hba) &&
2767 (hba->clk_gating.state != CLKS_ON));
2769 if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
2770 if (hba->pm_op_in_progress)
2771 set_host_byte(cmd, DID_BAD_TARGET);
2773 err = SCSI_MLQUEUE_HOST_BUSY;
2774 ufshcd_release(hba);
2778 lrbp = &hba->lrb[tag];
2781 lrbp->sense_bufflen = UFS_SENSE_SIZE;
2782 lrbp->sense_buffer = cmd->sense_buffer;
2783 lrbp->task_tag = tag;
2784 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2785 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2787 ufshcd_prepare_lrbp_crypto(cmd->request, lrbp);
2789 lrbp->req_abort_skip = false;
2791 ufshcd_comp_scsi_upiu(hba, lrbp);
2793 err = ufshcd_map_sg(hba, lrbp);
2796 ufshcd_release(hba);
2799 /* Make sure descriptors are ready before ringing the doorbell */
2802 ufshcd_send_command(hba, tag);
2804 up_read(&hba->clk_scaling_lock);
2808 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2809 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2812 lrbp->sense_bufflen = 0;
2813 lrbp->sense_buffer = NULL;
2814 lrbp->task_tag = tag;
2815 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2816 lrbp->intr_cmd = true; /* No interrupt aggregation */
2817 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
2818 hba->dev_cmd.type = cmd_type;
2820 return ufshcd_compose_devman_upiu(hba, lrbp);
2824 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2827 unsigned long flags;
2828 u32 mask = 1 << tag;
2830 /* clear outstanding transaction before retry */
2831 spin_lock_irqsave(hba->host->host_lock, flags);
2832 ufshcd_utrl_clear(hba, tag);
2833 spin_unlock_irqrestore(hba->host->host_lock, flags);
2836 * wait for h/w to clear corresponding bit in door-bell.
2837 * max. wait is 1 sec.
2839 err = ufshcd_wait_for_register(hba,
2840 REG_UTP_TRANSFER_REQ_DOOR_BELL,
2841 mask, ~mask, 1000, 1000);
2847 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2849 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2851 /* Get the UPIU response */
2852 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2853 UPIU_RSP_CODE_OFFSET;
2854 return query_res->response;
2858 * ufshcd_dev_cmd_completion() - handles device management command responses
2859 * @hba: per adapter instance
2860 * @lrbp: pointer to local reference block
2863 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2868 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2869 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2872 case UPIU_TRANSACTION_NOP_IN:
2873 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2875 dev_err(hba->dev, "%s: unexpected response %x\n",
2879 case UPIU_TRANSACTION_QUERY_RSP:
2880 err = ufshcd_check_query_response(hba, lrbp);
2882 err = ufshcd_copy_query_response(hba, lrbp);
2884 case UPIU_TRANSACTION_REJECT_UPIU:
2885 /* TODO: handle Reject UPIU Response */
2887 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2892 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2900 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2901 struct ufshcd_lrb *lrbp, int max_timeout)
2904 unsigned long time_left;
2905 unsigned long flags;
2907 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2908 msecs_to_jiffies(max_timeout));
2910 /* Make sure descriptors are ready before ringing the doorbell */
2912 spin_lock_irqsave(hba->host->host_lock, flags);
2913 hba->dev_cmd.complete = NULL;
2914 if (likely(time_left)) {
2915 err = ufshcd_get_tr_ocs(lrbp);
2917 err = ufshcd_dev_cmd_completion(hba, lrbp);
2919 spin_unlock_irqrestore(hba->host->host_lock, flags);
2923 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2924 __func__, lrbp->task_tag);
2925 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2926 /* successfully cleared the command, retry if needed */
2929 * in case of an error, after clearing the doorbell,
2930 * we also need to clear the outstanding_request
2933 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2940 * ufshcd_exec_dev_cmd - API for sending device management requests
2942 * @cmd_type: specifies the type (NOP, Query...)
2943 * @timeout: timeout in milliseconds
2945 * NOTE: Since there is only one available tag for device management commands,
2946 * it is expected you hold the hba->dev_cmd.lock mutex.
2948 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2949 enum dev_cmd_type cmd_type, int timeout)
2951 struct request_queue *q = hba->cmd_queue;
2952 struct request *req;
2953 struct ufshcd_lrb *lrbp;
2956 struct completion wait;
2958 down_read(&hba->clk_scaling_lock);
2961 * Get free slot, sleep if slots are unavailable.
2962 * Even though we use wait_event() which sleeps indefinitely,
2963 * the maximum wait time is bounded by SCSI request timeout.
2965 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
2971 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
2972 /* Set the timeout such that the SCSI error handler is not activated. */
2973 req->timeout = msecs_to_jiffies(2 * timeout);
2974 blk_mq_start_request(req);
2976 if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
2981 init_completion(&wait);
2982 lrbp = &hba->lrb[tag];
2984 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2988 hba->dev_cmd.complete = &wait;
2990 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
2991 /* Make sure descriptors are ready before ringing the doorbell */
2994 ufshcd_send_command(hba, tag);
2995 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2996 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
2997 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
3000 blk_put_request(req);
3002 up_read(&hba->clk_scaling_lock);
3007 * ufshcd_init_query() - init the query response and request parameters
3008 * @hba: per-adapter instance
3009 * @request: address of the request pointer to be initialized
3010 * @response: address of the response pointer to be initialized
3011 * @opcode: operation to perform
3012 * @idn: flag idn to access
3013 * @index: LU number to access
3014 * @selector: query/flag/descriptor further identification
3016 static inline void ufshcd_init_query(struct ufs_hba *hba,
3017 struct ufs_query_req **request, struct ufs_query_res **response,
3018 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
3020 *request = &hba->dev_cmd.query.request;
3021 *response = &hba->dev_cmd.query.response;
3022 memset(*request, 0, sizeof(struct ufs_query_req));
3023 memset(*response, 0, sizeof(struct ufs_query_res));
3024 (*request)->upiu_req.opcode = opcode;
3025 (*request)->upiu_req.idn = idn;
3026 (*request)->upiu_req.index = index;
3027 (*request)->upiu_req.selector = selector;
3030 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
3031 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
3036 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
3037 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
3040 "%s: failed with error %d, retries %d\n",
3041 __func__, ret, retries);
3048 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
3049 __func__, opcode, idn, ret, retries);
3054 * ufshcd_query_flag() - API function for sending flag query requests
3055 * @hba: per-adapter instance
3056 * @opcode: flag query to perform
3057 * @idn: flag idn to access
3058 * @index: flag index to access
3059 * @flag_res: the flag value after the query request completes
3061 * Returns 0 for success, non-zero in case of failure
3063 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
3064 enum flag_idn idn, u8 index, bool *flag_res)
3066 struct ufs_query_req *request = NULL;
3067 struct ufs_query_res *response = NULL;
3068 int err, selector = 0;
3069 int timeout = QUERY_REQ_TIMEOUT;
3073 ufshcd_hold(hba, false);
3074 mutex_lock(&hba->dev_cmd.lock);
3075 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3079 case UPIU_QUERY_OPCODE_SET_FLAG:
3080 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3081 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3082 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3084 case UPIU_QUERY_OPCODE_READ_FLAG:
3085 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3087 /* No dummy reads */
3088 dev_err(hba->dev, "%s: Invalid argument for read request\n",
3096 "%s: Expected query flag opcode but got = %d\n",
3102 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
3106 "%s: Sending flag query for idn %d failed, err = %d\n",
3107 __func__, idn, err);
3112 *flag_res = (be32_to_cpu(response->upiu_res.value) &
3113 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3116 mutex_unlock(&hba->dev_cmd.lock);
3117 ufshcd_release(hba);
3122 * ufshcd_query_attr - API function for sending attribute requests
3123 * @hba: per-adapter instance
3124 * @opcode: attribute opcode
3125 * @idn: attribute idn to access
3126 * @index: index field
3127 * @selector: selector field
3128 * @attr_val: the attribute value after the query request completes
3130 * Returns 0 for success, non-zero in case of failure
3132 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
3133 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
3135 struct ufs_query_req *request = NULL;
3136 struct ufs_query_res *response = NULL;
3142 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3147 ufshcd_hold(hba, false);
3149 mutex_lock(&hba->dev_cmd.lock);
3150 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3154 case UPIU_QUERY_OPCODE_WRITE_ATTR:
3155 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3156 request->upiu_req.value = cpu_to_be32(*attr_val);
3158 case UPIU_QUERY_OPCODE_READ_ATTR:
3159 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3162 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3168 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3171 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3172 __func__, opcode, idn, index, err);
3176 *attr_val = be32_to_cpu(response->upiu_res.value);
3179 mutex_unlock(&hba->dev_cmd.lock);
3180 ufshcd_release(hba);
3185 * ufshcd_query_attr_retry() - API function for sending query
3186 * attribute with retries
3187 * @hba: per-adapter instance
3188 * @opcode: attribute opcode
3189 * @idn: attribute idn to access
3190 * @index: index field
3191 * @selector: selector field
3192 * @attr_val: the attribute value after the query request
3195 * Returns 0 for success, non-zero in case of failure
3197 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
3198 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3204 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3205 ret = ufshcd_query_attr(hba, opcode, idn, index,
3206 selector, attr_val);
3208 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3209 __func__, ret, retries);
3216 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
3217 __func__, idn, ret, QUERY_REQ_RETRIES);
3221 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
3222 enum query_opcode opcode, enum desc_idn idn, u8 index,
3223 u8 selector, u8 *desc_buf, int *buf_len)
3225 struct ufs_query_req *request = NULL;
3226 struct ufs_query_res *response = NULL;
3232 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3237 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
3238 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3239 __func__, *buf_len);
3243 ufshcd_hold(hba, false);
3245 mutex_lock(&hba->dev_cmd.lock);
3246 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3248 hba->dev_cmd.query.descriptor = desc_buf;
3249 request->upiu_req.length = cpu_to_be16(*buf_len);
3252 case UPIU_QUERY_OPCODE_WRITE_DESC:
3253 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3255 case UPIU_QUERY_OPCODE_READ_DESC:
3256 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3260 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3266 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3269 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3270 __func__, opcode, idn, index, err);
3274 *buf_len = be16_to_cpu(response->upiu_res.length);
3277 hba->dev_cmd.query.descriptor = NULL;
3278 mutex_unlock(&hba->dev_cmd.lock);
3279 ufshcd_release(hba);
3284 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3285 * @hba: per-adapter instance
3286 * @opcode: attribute opcode
3287 * @idn: attribute idn to access
3288 * @index: index field
3289 * @selector: selector field
3290 * @desc_buf: the buffer that contains the descriptor
3291 * @buf_len: length parameter passed to the device
3293 * Returns 0 for success, non-zero in case of failure.
3294 * The buf_len parameter will contain, on return, the length parameter
3295 * received on the response.
3297 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3298 enum query_opcode opcode,
3299 enum desc_idn idn, u8 index,
3301 u8 *desc_buf, int *buf_len)
3306 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3307 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3308 selector, desc_buf, buf_len);
3309 if (!err || err == -EINVAL)
3317 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3318 * @hba: Pointer to adapter instance
3319 * @desc_id: descriptor idn value
3320 * @desc_len: mapped desc length (out)
3322 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
3325 if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 ||
3326 desc_id == QUERY_DESC_IDN_RFU_1)
3329 *desc_len = hba->desc_size[desc_id];
3331 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3333 static void ufshcd_update_desc_length(struct ufs_hba *hba,
3334 enum desc_idn desc_id, int desc_index,
3335 unsigned char desc_len)
3337 if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE &&
3338 desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT)
3339 /* For UFS 3.1, the normal unit descriptor is 10 bytes larger
3340 * than the RPMB unit, however, both descriptors share the same
3341 * desc_idn, to cover both unit descriptors with one length, we
3342 * choose the normal unit descriptor length by desc_index.
3344 hba->desc_size[desc_id] = desc_len;
3348 * ufshcd_read_desc_param - read the specified descriptor parameter
3349 * @hba: Pointer to adapter instance
3350 * @desc_id: descriptor idn value
3351 * @desc_index: descriptor index
3352 * @param_offset: offset of the parameter to read
3353 * @param_read_buf: pointer to buffer where parameter would be read
3354 * @param_size: sizeof(param_read_buf)
3356 * Return 0 in case of success, non-zero otherwise
3358 int ufshcd_read_desc_param(struct ufs_hba *hba,
3359 enum desc_idn desc_id,
3368 bool is_kmalloc = true;
3371 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3374 /* Get the length of descriptor */
3375 ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3377 dev_err(hba->dev, "%s: Failed to get desc length\n", __func__);
3381 if (param_offset >= buff_len) {
3382 dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n",
3383 __func__, param_offset, desc_id, buff_len);
3387 /* Check whether we need temp memory */
3388 if (param_offset != 0 || param_size < buff_len) {
3389 desc_buf = kzalloc(buff_len, GFP_KERNEL);
3393 desc_buf = param_read_buf;
3397 /* Request for full descriptor */
3398 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3399 desc_id, desc_index, 0,
3400 desc_buf, &buff_len);
3403 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
3404 __func__, desc_id, desc_index, param_offset, ret);
3409 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3410 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
3411 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3416 /* Update descriptor length */
3417 buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
3418 ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
3421 /* Make sure we don't copy more data than available */
3422 if (param_offset + param_size > buff_len)
3423 param_size = buff_len - param_offset;
3424 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3433 * struct uc_string_id - unicode string
3435 * @len: size of this descriptor inclusive
3436 * @type: descriptor type
3437 * @uc: unicode string character
3439 struct uc_string_id {
3445 /* replace non-printable or non-ASCII characters with spaces */
3446 static inline char ufshcd_remove_non_printable(u8 ch)
3448 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3452 * ufshcd_read_string_desc - read string descriptor
3453 * @hba: pointer to adapter instance
3454 * @desc_index: descriptor index
3455 * @buf: pointer to buffer where descriptor would be read,
3456 * the caller should free the memory.
3457 * @ascii: if true convert from unicode to ascii characters
3458 * null terminated string.
3461 * * string size on success.
3462 * * -ENOMEM: on allocation failure
3463 * * -EINVAL: on a wrong parameter
3465 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3466 u8 **buf, bool ascii)
3468 struct uc_string_id *uc_str;
3475 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3479 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_STRING, desc_index, 0,
3480 (u8 *)uc_str, QUERY_DESC_MAX_SIZE);
3482 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3483 QUERY_REQ_RETRIES, ret);
3488 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3489 dev_dbg(hba->dev, "String Desc is of zero length\n");
3498 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3499 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3500 str = kzalloc(ascii_len, GFP_KERNEL);
3507 * the descriptor contains string in UTF16 format
3508 * we need to convert to utf-8 so it can be displayed
3510 ret = utf16s_to_utf8s(uc_str->uc,
3511 uc_str->len - QUERY_DESC_HDR_SIZE,
3512 UTF16_BIG_ENDIAN, str, ascii_len);
3514 /* replace non-printable or non-ASCII characters with spaces */
3515 for (i = 0; i < ret; i++)
3516 str[i] = ufshcd_remove_non_printable(str[i]);
3521 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
3535 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3536 * @hba: Pointer to adapter instance
3538 * @param_offset: offset of the parameter to read
3539 * @param_read_buf: pointer to buffer where parameter would be read
3540 * @param_size: sizeof(param_read_buf)
3542 * Return 0 in case of success, non-zero otherwise
3544 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3546 enum unit_desc_param param_offset,
3551 * Unit descriptors are only available for general purpose LUs (LUN id
3552 * from 0 to 7) and RPMB Well known LU.
3554 if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun, param_offset))
3557 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3558 param_offset, param_read_buf, param_size);
3561 static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3564 u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3566 if (hba->dev_info.wspecversion >= 0x300) {
3567 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3568 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3571 dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3574 if (gating_wait == 0) {
3575 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3576 dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3580 hba->dev_info.clk_gating_wait_us = gating_wait;
3587 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3588 * @hba: per adapter instance
3590 * 1. Allocate DMA memory for Command Descriptor array
3591 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3592 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3593 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3595 * 4. Allocate memory for local reference block(lrb).
3597 * Returns 0 for success, non-zero in case of failure
3599 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3601 size_t utmrdl_size, utrdl_size, ucdl_size;
3603 /* Allocate memory for UTP command descriptors */
3604 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3605 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3607 &hba->ucdl_dma_addr,
3611 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3612 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3613 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3614 * be aligned to 128 bytes as well
3616 if (!hba->ucdl_base_addr ||
3617 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3619 "Command Descriptor Memory allocation failed\n");
3624 * Allocate memory for UTP Transfer descriptors
3625 * UFSHCI requires 1024 byte alignment of UTRD
3627 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3628 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3630 &hba->utrdl_dma_addr,
3632 if (!hba->utrdl_base_addr ||
3633 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3635 "Transfer Descriptor Memory allocation failed\n");
3640 * Allocate memory for UTP Task Management descriptors
3641 * UFSHCI requires 1024 byte alignment of UTMRD
3643 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3644 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3646 &hba->utmrdl_dma_addr,
3648 if (!hba->utmrdl_base_addr ||
3649 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3651 "Task Management Descriptor Memory allocation failed\n");
3655 /* Allocate memory for local reference block */
3656 hba->lrb = devm_kcalloc(hba->dev,
3657 hba->nutrs, sizeof(struct ufshcd_lrb),
3660 dev_err(hba->dev, "LRB Memory allocation failed\n");
3669 * ufshcd_host_memory_configure - configure local reference block with
3671 * @hba: per adapter instance
3673 * Configure Host memory space
3674 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3676 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3678 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3679 * into local reference block.
3681 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3683 struct utp_transfer_req_desc *utrdlp;
3684 dma_addr_t cmd_desc_dma_addr;
3685 dma_addr_t cmd_desc_element_addr;
3686 u16 response_offset;
3691 utrdlp = hba->utrdl_base_addr;
3694 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3696 offsetof(struct utp_transfer_cmd_desc, prd_table);
3698 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3699 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3701 for (i = 0; i < hba->nutrs; i++) {
3702 /* Configure UTRD with command descriptor base address */
3703 cmd_desc_element_addr =
3704 (cmd_desc_dma_addr + (cmd_desc_size * i));
3705 utrdlp[i].command_desc_base_addr_lo =
3706 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3707 utrdlp[i].command_desc_base_addr_hi =
3708 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3710 /* Response upiu and prdt offset should be in double words */
3711 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3712 utrdlp[i].response_upiu_offset =
3713 cpu_to_le16(response_offset);
3714 utrdlp[i].prd_table_offset =
3715 cpu_to_le16(prdt_offset);
3716 utrdlp[i].response_upiu_length =
3717 cpu_to_le16(ALIGNED_UPIU_SIZE);
3719 utrdlp[i].response_upiu_offset =
3720 cpu_to_le16(response_offset >> 2);
3721 utrdlp[i].prd_table_offset =
3722 cpu_to_le16(prdt_offset >> 2);
3723 utrdlp[i].response_upiu_length =
3724 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3727 ufshcd_init_lrb(hba, &hba->lrb[i], i);
3732 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3733 * @hba: per adapter instance
3735 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3736 * in order to initialize the Unipro link startup procedure.
3737 * Once the Unipro links are up, the device connected to the controller
3740 * Returns 0 on success, non-zero value on failure
3742 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3744 struct uic_command uic_cmd = {0};
3747 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3749 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3752 "dme-link-startup: error code %d\n", ret);
3756 * ufshcd_dme_reset - UIC command for DME_RESET
3757 * @hba: per adapter instance
3759 * DME_RESET command is issued in order to reset UniPro stack.
3760 * This function now deals with cold reset.
3762 * Returns 0 on success, non-zero value on failure
3764 static int ufshcd_dme_reset(struct ufs_hba *hba)
3766 struct uic_command uic_cmd = {0};
3769 uic_cmd.command = UIC_CMD_DME_RESET;
3771 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3774 "dme-reset: error code %d\n", ret);
3779 int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
3785 if (agreed_gear != UFS_HS_G4)
3786 adapt_val = PA_NO_ADAPT;
3788 ret = ufshcd_dme_set(hba,
3789 UIC_ARG_MIB(PA_TXHSADAPTTYPE),
3793 EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt);
3796 * ufshcd_dme_enable - UIC command for DME_ENABLE
3797 * @hba: per adapter instance
3799 * DME_ENABLE command is issued in order to enable UniPro stack.
3801 * Returns 0 on success, non-zero value on failure
3803 static int ufshcd_dme_enable(struct ufs_hba *hba)
3805 struct uic_command uic_cmd = {0};
3808 uic_cmd.command = UIC_CMD_DME_ENABLE;
3810 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3813 "dme-enable: error code %d\n", ret);
3818 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3820 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3821 unsigned long min_sleep_time_us;
3823 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3827 * last_dme_cmd_tstamp will be 0 only for 1st call to
3830 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3831 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3833 unsigned long delta =
3834 (unsigned long) ktime_to_us(
3835 ktime_sub(ktime_get(),
3836 hba->last_dme_cmd_tstamp));
3838 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3840 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3842 return; /* no more delay required */
3845 /* allow sleep for extra 50us if needed */
3846 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3850 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3851 * @hba: per adapter instance
3852 * @attr_sel: uic command argument1
3853 * @attr_set: attribute set type as uic command argument2
3854 * @mib_val: setting value as uic command argument3
3855 * @peer: indicate whether peer or local
3857 * Returns 0 on success, non-zero value on failure
3859 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3860 u8 attr_set, u32 mib_val, u8 peer)
3862 struct uic_command uic_cmd = {0};
3863 static const char *const action[] = {
3867 const char *set = action[!!peer];
3869 int retries = UFS_UIC_COMMAND_RETRIES;
3871 uic_cmd.command = peer ?
3872 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3873 uic_cmd.argument1 = attr_sel;
3874 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3875 uic_cmd.argument3 = mib_val;
3878 /* for peer attributes we retry upon failure */
3879 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3881 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3882 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3883 } while (ret && peer && --retries);
3886 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3887 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3888 UFS_UIC_COMMAND_RETRIES - retries);
3892 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3895 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3896 * @hba: per adapter instance
3897 * @attr_sel: uic command argument1
3898 * @mib_val: the value of the attribute as returned by the UIC command
3899 * @peer: indicate whether peer or local
3901 * Returns 0 on success, non-zero value on failure
3903 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3904 u32 *mib_val, u8 peer)
3906 struct uic_command uic_cmd = {0};
3907 static const char *const action[] = {
3911 const char *get = action[!!peer];
3913 int retries = UFS_UIC_COMMAND_RETRIES;
3914 struct ufs_pa_layer_attr orig_pwr_info;
3915 struct ufs_pa_layer_attr temp_pwr_info;
3916 bool pwr_mode_change = false;
3918 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3919 orig_pwr_info = hba->pwr_info;
3920 temp_pwr_info = orig_pwr_info;
3922 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3923 orig_pwr_info.pwr_rx == FAST_MODE) {
3924 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3925 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3926 pwr_mode_change = true;
3927 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3928 orig_pwr_info.pwr_rx == SLOW_MODE) {
3929 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3930 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3931 pwr_mode_change = true;
3933 if (pwr_mode_change) {
3934 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3940 uic_cmd.command = peer ?
3941 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3942 uic_cmd.argument1 = attr_sel;
3945 /* for peer attributes we retry upon failure */
3946 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3948 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3949 get, UIC_GET_ATTR_ID(attr_sel), ret);
3950 } while (ret && peer && --retries);
3953 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3954 get, UIC_GET_ATTR_ID(attr_sel),
3955 UFS_UIC_COMMAND_RETRIES - retries);
3957 if (mib_val && !ret)
3958 *mib_val = uic_cmd.argument3;
3960 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3962 ufshcd_change_power_mode(hba, &orig_pwr_info);
3966 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3969 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3970 * state) and waits for it to take effect.
3972 * @hba: per adapter instance
3973 * @cmd: UIC command to execute
3975 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3976 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3977 * and device UniPro link and hence it's final completion would be indicated by
3978 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3979 * addition to normal UIC command completion Status (UCCS). This function only
3980 * returns after the relevant status bits indicate the completion.
3982 * Returns 0 on success, non-zero value on failure
3984 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3986 struct completion uic_async_done;
3987 unsigned long flags;
3990 bool reenable_intr = false;
3992 mutex_lock(&hba->uic_cmd_mutex);
3993 init_completion(&uic_async_done);
3994 ufshcd_add_delay_before_dme_cmd(hba);
3996 spin_lock_irqsave(hba->host->host_lock, flags);
3997 if (ufshcd_is_link_broken(hba)) {
4001 hba->uic_async_done = &uic_async_done;
4002 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
4003 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
4005 * Make sure UIC command completion interrupt is disabled before
4006 * issuing UIC command.
4009 reenable_intr = true;
4011 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
4012 spin_unlock_irqrestore(hba->host->host_lock, flags);
4015 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
4016 cmd->command, cmd->argument3, ret);
4020 if (!wait_for_completion_timeout(hba->uic_async_done,
4021 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
4023 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
4024 cmd->command, cmd->argument3);
4026 if (!cmd->cmd_active) {
4027 dev_err(hba->dev, "%s: Power Mode Change operation has been completed, go check UPMCRS\n",
4037 status = ufshcd_get_upmcrs(hba);
4038 if (status != PWR_LOCAL) {
4040 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
4041 cmd->command, status);
4042 ret = (status != PWR_OK) ? status : -1;
4046 ufshcd_print_host_state(hba);
4047 ufshcd_print_pwr_info(hba);
4048 ufshcd_print_evt_hist(hba);
4051 spin_lock_irqsave(hba->host->host_lock, flags);
4052 hba->active_uic_cmd = NULL;
4053 hba->uic_async_done = NULL;
4055 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
4057 ufshcd_set_link_broken(hba);
4058 ufshcd_schedule_eh_work(hba);
4061 spin_unlock_irqrestore(hba->host->host_lock, flags);
4062 mutex_unlock(&hba->uic_cmd_mutex);
4068 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
4069 * using DME_SET primitives.
4070 * @hba: per adapter instance
4071 * @mode: powr mode value
4073 * Returns 0 on success, non-zero value on failure
4075 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
4077 struct uic_command uic_cmd = {0};
4080 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
4081 ret = ufshcd_dme_set(hba,
4082 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
4084 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
4090 uic_cmd.command = UIC_CMD_DME_SET;
4091 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4092 uic_cmd.argument3 = mode;
4093 ufshcd_hold(hba, false);
4094 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4095 ufshcd_release(hba);
4101 int ufshcd_link_recovery(struct ufs_hba *hba)
4104 unsigned long flags;
4106 spin_lock_irqsave(hba->host->host_lock, flags);
4107 hba->ufshcd_state = UFSHCD_STATE_RESET;
4108 ufshcd_set_eh_in_progress(hba);
4109 spin_unlock_irqrestore(hba->host->host_lock, flags);
4111 /* Reset the attached device */
4112 ufshcd_device_reset(hba);
4114 ret = ufshcd_host_reset_and_restore(hba);
4116 spin_lock_irqsave(hba->host->host_lock, flags);
4118 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4119 ufshcd_clear_eh_in_progress(hba);
4120 spin_unlock_irqrestore(hba->host->host_lock, flags);
4123 dev_err(hba->dev, "%s: link recovery failed, err %d",
4126 ufshcd_clear_ua_wluns(hba);
4130 EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
4132 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
4135 struct uic_command uic_cmd = {0};
4136 ktime_t start = ktime_get();
4138 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
4140 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
4141 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4142 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4143 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4146 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
4149 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
4155 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
4157 struct uic_command uic_cmd = {0};
4159 ktime_t start = ktime_get();
4161 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
4163 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4164 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4165 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4166 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4169 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
4172 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
4174 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4175 hba->ufs_stats.hibern8_exit_cnt++;
4180 EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
4182 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
4184 unsigned long flags;
4185 bool update = false;
4187 if (!ufshcd_is_auto_hibern8_supported(hba))
4190 spin_lock_irqsave(hba->host->host_lock, flags);
4191 if (hba->ahit != ahit) {
4195 spin_unlock_irqrestore(hba->host->host_lock, flags);
4198 !pm_runtime_suspended(&hba->sdev_ufs_device->sdev_gendev)) {
4199 ufshcd_rpm_get_sync(hba);
4200 ufshcd_hold(hba, false);
4201 ufshcd_auto_hibern8_enable(hba);
4202 ufshcd_release(hba);
4203 ufshcd_rpm_put_sync(hba);
4206 EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
4208 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
4210 unsigned long flags;
4212 if (!ufshcd_is_auto_hibern8_supported(hba))
4215 spin_lock_irqsave(hba->host->host_lock, flags);
4216 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
4217 spin_unlock_irqrestore(hba->host->host_lock, flags);
4221 * ufshcd_init_pwr_info - setting the POR (power on reset)
4222 * values in hba power info
4223 * @hba: per-adapter instance
4225 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4227 hba->pwr_info.gear_rx = UFS_PWM_G1;
4228 hba->pwr_info.gear_tx = UFS_PWM_G1;
4229 hba->pwr_info.lane_rx = 1;
4230 hba->pwr_info.lane_tx = 1;
4231 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4232 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4233 hba->pwr_info.hs_rate = 0;
4237 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4238 * @hba: per-adapter instance
4240 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
4242 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4244 if (hba->max_pwr_info.is_valid)
4247 pwr_info->pwr_tx = FAST_MODE;
4248 pwr_info->pwr_rx = FAST_MODE;
4249 pwr_info->hs_rate = PA_HS_MODE_B;
4251 /* Get the connected lane count */
4252 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4253 &pwr_info->lane_rx);
4254 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4255 &pwr_info->lane_tx);
4257 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4258 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4266 * First, get the maximum gears of HS speed.
4267 * If a zero value, it means there is no HSGEAR capability.
4268 * Then, get the maximum gears of PWM speed.
4270 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4271 if (!pwr_info->gear_rx) {
4272 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4273 &pwr_info->gear_rx);
4274 if (!pwr_info->gear_rx) {
4275 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4276 __func__, pwr_info->gear_rx);
4279 pwr_info->pwr_rx = SLOW_MODE;
4282 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4283 &pwr_info->gear_tx);
4284 if (!pwr_info->gear_tx) {
4285 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4286 &pwr_info->gear_tx);
4287 if (!pwr_info->gear_tx) {
4288 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4289 __func__, pwr_info->gear_tx);
4292 pwr_info->pwr_tx = SLOW_MODE;
4295 hba->max_pwr_info.is_valid = true;
4299 static int ufshcd_change_power_mode(struct ufs_hba *hba,
4300 struct ufs_pa_layer_attr *pwr_mode)
4304 /* if already configured to the requested pwr_mode */
4305 if (!hba->force_pmc &&
4306 pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4307 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4308 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4309 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4310 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4311 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4312 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4313 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4318 * Configure attributes for power mode change with below.
4319 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4320 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4323 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4324 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4326 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4327 pwr_mode->pwr_rx == FAST_MODE)
4328 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4330 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4332 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4333 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4335 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4336 pwr_mode->pwr_tx == FAST_MODE)
4337 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4339 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4341 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4342 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4343 pwr_mode->pwr_rx == FAST_MODE ||
4344 pwr_mode->pwr_tx == FAST_MODE)
4345 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4348 if (!(hba->quirks & UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING)) {
4349 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4350 DL_FC0ProtectionTimeOutVal_Default);
4351 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4352 DL_TC0ReplayTimeOutVal_Default);
4353 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4354 DL_AFC0ReqTimeOutVal_Default);
4355 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4356 DL_FC1ProtectionTimeOutVal_Default);
4357 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4358 DL_TC1ReplayTimeOutVal_Default);
4359 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4360 DL_AFC1ReqTimeOutVal_Default);
4362 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4363 DL_FC0ProtectionTimeOutVal_Default);
4364 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4365 DL_TC0ReplayTimeOutVal_Default);
4366 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4367 DL_AFC0ReqTimeOutVal_Default);
4370 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4371 | pwr_mode->pwr_tx);
4375 "%s: power mode change failed %d\n", __func__, ret);
4377 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4380 memcpy(&hba->pwr_info, pwr_mode,
4381 sizeof(struct ufs_pa_layer_attr));
4388 * ufshcd_config_pwr_mode - configure a new power mode
4389 * @hba: per-adapter instance
4390 * @desired_pwr_mode: desired power configuration
4392 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4393 struct ufs_pa_layer_attr *desired_pwr_mode)
4395 struct ufs_pa_layer_attr final_params = { 0 };
4398 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4399 desired_pwr_mode, &final_params);
4402 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4404 ret = ufshcd_change_power_mode(hba, &final_params);
4408 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4411 * ufshcd_complete_dev_init() - checks device readiness
4412 * @hba: per-adapter instance
4414 * Set fDeviceInit flag and poll until device toggles it.
4416 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4419 bool flag_res = true;
4422 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4423 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
4426 "%s setting fDeviceInit flag failed with error %d\n",
4431 /* Poll fDeviceInit flag to be cleared */
4432 timeout = ktime_add_ms(ktime_get(), FDEVICEINIT_COMPL_TIMEOUT);
4434 err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4435 QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4438 usleep_range(5000, 10000);
4439 } while (ktime_before(ktime_get(), timeout));
4443 "%s reading fDeviceInit flag failed with error %d\n",
4445 } else if (flag_res) {
4447 "%s fDeviceInit was not cleared by the device\n",
4456 * ufshcd_make_hba_operational - Make UFS controller operational
4457 * @hba: per adapter instance
4459 * To bring UFS host controller to operational state,
4460 * 1. Enable required interrupts
4461 * 2. Configure interrupt aggregation
4462 * 3. Program UTRL and UTMRL base address
4463 * 4. Configure run-stop-registers
4465 * Returns 0 on success, non-zero value on failure
4467 int ufshcd_make_hba_operational(struct ufs_hba *hba)
4472 /* Enable required interrupts */
4473 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4475 /* Configure interrupt aggregation */
4476 if (ufshcd_is_intr_aggr_allowed(hba))
4477 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4479 ufshcd_disable_intr_aggr(hba);
4481 /* Configure UTRL and UTMRL base address registers */
4482 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4483 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4484 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4485 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4486 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4487 REG_UTP_TASK_REQ_LIST_BASE_L);
4488 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4489 REG_UTP_TASK_REQ_LIST_BASE_H);
4492 * Make sure base address and interrupt setup are updated before
4493 * enabling the run/stop registers below.
4498 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4500 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4501 if (!(ufshcd_get_lists_status(reg))) {
4502 ufshcd_enable_run_stop_reg(hba);
4505 "Host controller not ready to process requests");
4511 EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
4514 * ufshcd_hba_stop - Send controller to reset state
4515 * @hba: per adapter instance
4517 void ufshcd_hba_stop(struct ufs_hba *hba)
4519 unsigned long flags;
4523 * Obtain the host lock to prevent that the controller is disabled
4524 * while the UFS interrupt handler is active on another CPU.
4526 spin_lock_irqsave(hba->host->host_lock, flags);
4527 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4528 spin_unlock_irqrestore(hba->host->host_lock, flags);
4530 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4531 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4534 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4536 EXPORT_SYMBOL_GPL(ufshcd_hba_stop);
4539 * ufshcd_hba_execute_hce - initialize the controller
4540 * @hba: per adapter instance
4542 * The controller resets itself and controller firmware initialization
4543 * sequence kicks off. When controller is ready it will set
4544 * the Host Controller Enable bit to 1.
4546 * Returns 0 on success, non-zero value on failure
4548 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4550 int retry_outer = 3;
4554 if (!ufshcd_is_hba_active(hba))
4555 /* change controller state to "reset state" */
4556 ufshcd_hba_stop(hba);
4558 /* UniPro link is disabled at this point */
4559 ufshcd_set_link_off(hba);
4561 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4563 /* start controller initialization sequence */
4564 ufshcd_hba_start(hba);
4567 * To initialize a UFS host controller HCE bit must be set to 1.
4568 * During initialization the HCE bit value changes from 1->0->1.
4569 * When the host controller completes initialization sequence
4570 * it sets the value of HCE bit to 1. The same HCE bit is read back
4571 * to check if the controller has completed initialization sequence.
4572 * So without this delay the value HCE = 1, set in the previous
4573 * instruction might be read back.
4574 * This delay can be changed based on the controller.
4576 ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
4578 /* wait for the host controller to complete initialization */
4580 while (ufshcd_is_hba_active(hba)) {
4585 "Controller enable failed\n");
4592 usleep_range(1000, 1100);
4595 /* enable UIC related interrupts */
4596 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4598 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4603 int ufshcd_hba_enable(struct ufs_hba *hba)
4607 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4608 ufshcd_set_link_off(hba);
4609 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4611 /* enable UIC related interrupts */
4612 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4613 ret = ufshcd_dme_reset(hba);
4615 ret = ufshcd_dme_enable(hba);
4617 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4620 "Host controller enable failed with non-hce\n");
4623 ret = ufshcd_hba_execute_hce(hba);
4628 EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4630 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4632 int tx_lanes = 0, i, err = 0;
4635 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4638 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4640 for (i = 0; i < tx_lanes; i++) {
4642 err = ufshcd_dme_set(hba,
4643 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4644 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4647 err = ufshcd_dme_peer_set(hba,
4648 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4649 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4652 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4653 __func__, peer, i, err);
4661 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4663 return ufshcd_disable_tx_lcc(hba, true);
4666 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
4668 struct ufs_event_hist *e;
4670 if (id >= UFS_EVT_CNT)
4673 e = &hba->ufs_stats.event[id];
4674 e->val[e->pos] = val;
4675 e->tstamp[e->pos] = ktime_get();
4677 e->pos = (e->pos + 1) % UFS_EVENT_HIST_LENGTH;
4679 ufshcd_vops_event_notify(hba, id, &val);
4681 EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
4684 * ufshcd_link_startup - Initialize unipro link startup
4685 * @hba: per adapter instance
4687 * Returns 0 for success, non-zero in case of failure
4689 static int ufshcd_link_startup(struct ufs_hba *hba)
4692 int retries = DME_LINKSTARTUP_RETRIES;
4693 bool link_startup_again = false;
4696 * If UFS device isn't active then we will have to issue link startup
4697 * 2 times to make sure the device state move to active.
4699 if (!ufshcd_is_ufs_dev_active(hba))
4700 link_startup_again = true;
4704 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4706 ret = ufshcd_dme_link_startup(hba);
4708 /* check if device is detected by inter-connect layer */
4709 if (!ret && !ufshcd_is_device_present(hba)) {
4710 ufshcd_update_evt_hist(hba,
4711 UFS_EVT_LINK_STARTUP_FAIL,
4713 dev_err(hba->dev, "%s: Device not present\n", __func__);
4719 * DME link lost indication is only received when link is up,
4720 * but we can't be sure if the link is up until link startup
4721 * succeeds. So reset the local Uni-Pro and try again.
4723 if (ret && ufshcd_hba_enable(hba)) {
4724 ufshcd_update_evt_hist(hba,
4725 UFS_EVT_LINK_STARTUP_FAIL,
4729 } while (ret && retries--);
4732 /* failed to get the link up... retire */
4733 ufshcd_update_evt_hist(hba,
4734 UFS_EVT_LINK_STARTUP_FAIL,
4739 if (link_startup_again) {
4740 link_startup_again = false;
4741 retries = DME_LINKSTARTUP_RETRIES;
4745 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4746 ufshcd_init_pwr_info(hba);
4747 ufshcd_print_pwr_info(hba);
4749 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4750 ret = ufshcd_disable_device_tx_lcc(hba);
4755 /* Include any host controller configuration via UIC commands */
4756 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4760 /* Clear UECPA once due to LINERESET has happened during LINK_STARTUP */
4761 ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
4762 ret = ufshcd_make_hba_operational(hba);
4765 dev_err(hba->dev, "link startup failed %d\n", ret);
4766 ufshcd_print_host_state(hba);
4767 ufshcd_print_pwr_info(hba);
4768 ufshcd_print_evt_hist(hba);
4774 * ufshcd_verify_dev_init() - Verify device initialization
4775 * @hba: per-adapter instance
4777 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4778 * device Transport Protocol (UTP) layer is ready after a reset.
4779 * If the UTP layer at the device side is not initialized, it may
4780 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4781 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4783 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4788 ufshcd_hold(hba, false);
4789 mutex_lock(&hba->dev_cmd.lock);
4790 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4791 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4794 if (!err || err == -ETIMEDOUT)
4797 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4799 mutex_unlock(&hba->dev_cmd.lock);
4800 ufshcd_release(hba);
4803 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4808 * ufshcd_set_queue_depth - set lun queue depth
4809 * @sdev: pointer to SCSI device
4811 * Read bLUQueueDepth value and activate scsi tagged command
4812 * queueing. For WLUN, queue depth is set to 1. For best-effort
4813 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4814 * value that host can queue.
4816 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4820 struct ufs_hba *hba;
4822 hba = shost_priv(sdev->host);
4824 lun_qdepth = hba->nutrs;
4825 ret = ufshcd_read_unit_desc_param(hba,
4826 ufshcd_scsi_to_upiu_lun(sdev->lun),
4827 UNIT_DESC_PARAM_LU_Q_DEPTH,
4829 sizeof(lun_qdepth));
4831 /* Some WLUN doesn't support unit descriptor */
4832 if (ret == -EOPNOTSUPP)
4834 else if (!lun_qdepth)
4835 /* eventually, we can figure out the real queue depth */
4836 lun_qdepth = hba->nutrs;
4838 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4840 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4841 __func__, lun_qdepth);
4842 scsi_change_queue_depth(sdev, lun_qdepth);
4846 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4847 * @hba: per-adapter instance
4848 * @lun: UFS device lun id
4849 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4851 * Returns 0 in case of success and b_lu_write_protect status would be returned
4852 * @b_lu_write_protect parameter.
4853 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4854 * Returns -EINVAL in case of invalid parameters passed to this function.
4856 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4858 u8 *b_lu_write_protect)
4862 if (!b_lu_write_protect)
4865 * According to UFS device spec, RPMB LU can't be write
4866 * protected so skip reading bLUWriteProtect parameter for
4867 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4869 else if (lun >= hba->dev_info.max_lu_supported)
4872 ret = ufshcd_read_unit_desc_param(hba,
4874 UNIT_DESC_PARAM_LU_WR_PROTECT,
4876 sizeof(*b_lu_write_protect));
4881 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4883 * @hba: per-adapter instance
4884 * @sdev: pointer to SCSI device
4887 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4888 struct scsi_device *sdev)
4890 if (hba->dev_info.f_power_on_wp_en &&
4891 !hba->dev_info.is_lu_power_on_wp) {
4892 u8 b_lu_write_protect;
4894 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4895 &b_lu_write_protect) &&
4896 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4897 hba->dev_info.is_lu_power_on_wp = true;
4902 * ufshcd_setup_links - associate link b/w device wlun and other luns
4903 * @sdev: pointer to SCSI device
4904 * @hba: pointer to ufs hba
4906 static void ufshcd_setup_links(struct ufs_hba *hba, struct scsi_device *sdev)
4908 struct device_link *link;
4911 * Device wlun is the supplier & rest of the luns are consumers.
4912 * This ensures that device wlun suspends after all other luns.
4914 if (hba->sdev_ufs_device) {
4915 link = device_link_add(&sdev->sdev_gendev,
4916 &hba->sdev_ufs_device->sdev_gendev,
4917 DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
4919 dev_err(&sdev->sdev_gendev, "Failed establishing link - %s\n",
4920 dev_name(&hba->sdev_ufs_device->sdev_gendev));
4924 /* Ignore REPORT_LUN wlun probing */
4925 if (hba->luns_avail == 1) {
4926 ufshcd_rpm_put(hba);
4931 * Device wlun is probed. The assumption is that WLUNs are
4932 * scanned before other LUNs.
4939 * ufshcd_slave_alloc - handle initial SCSI device configurations
4940 * @sdev: pointer to SCSI device
4944 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4946 struct ufs_hba *hba;
4948 hba = shost_priv(sdev->host);
4950 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4951 sdev->use_10_for_ms = 1;
4953 /* DBD field should be set to 1 in mode sense(10) */
4954 sdev->set_dbd_for_ms = 1;
4956 /* allow SCSI layer to restart the device in case of errors */
4957 sdev->allow_restart = 1;
4959 /* REPORT SUPPORTED OPERATION CODES is not supported */
4960 sdev->no_report_opcodes = 1;
4962 /* WRITE_SAME command is not supported */
4963 sdev->no_write_same = 1;
4965 ufshcd_set_queue_depth(sdev);
4967 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4969 ufshcd_setup_links(hba, sdev);
4975 * ufshcd_change_queue_depth - change queue depth
4976 * @sdev: pointer to SCSI device
4977 * @depth: required depth to set
4979 * Change queue depth and make sure the max. limits are not crossed.
4981 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4983 struct ufs_hba *hba = shost_priv(sdev->host);
4985 if (depth > hba->nutrs)
4987 return scsi_change_queue_depth(sdev, depth);
4991 * ufshcd_slave_configure - adjust SCSI device configurations
4992 * @sdev: pointer to SCSI device
4994 static int ufshcd_slave_configure(struct scsi_device *sdev)
4996 struct ufs_hba *hba = shost_priv(sdev->host);
4997 struct request_queue *q = sdev->request_queue;
4999 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
5000 if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE)
5001 blk_queue_update_dma_alignment(q, PAGE_SIZE - 1);
5003 * Block runtime-pm until all consumers are added.
5004 * Refer ufshcd_setup_links().
5006 if (is_device_wlun(sdev))
5007 pm_runtime_get_noresume(&sdev->sdev_gendev);
5008 else if (ufshcd_is_rpm_autosuspend_allowed(hba))
5009 sdev->rpm_autosuspend = 1;
5011 ufshcd_crypto_setup_rq_keyslot_manager(hba, q);
5017 * ufshcd_slave_destroy - remove SCSI device configurations
5018 * @sdev: pointer to SCSI device
5020 static void ufshcd_slave_destroy(struct scsi_device *sdev)
5022 struct ufs_hba *hba;
5024 hba = shost_priv(sdev->host);
5025 /* Drop the reference as it won't be needed anymore */
5026 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
5027 unsigned long flags;
5029 spin_lock_irqsave(hba->host->host_lock, flags);
5030 hba->sdev_ufs_device = NULL;
5031 spin_unlock_irqrestore(hba->host->host_lock, flags);
5036 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
5037 * @lrbp: pointer to local reference block of completed command
5038 * @scsi_status: SCSI command status
5040 * Returns value base on SCSI command status
5043 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
5047 switch (scsi_status) {
5048 case SAM_STAT_CHECK_CONDITION:
5049 ufshcd_copy_sense_data(lrbp);
5052 result |= DID_OK << 16 | scsi_status;
5054 case SAM_STAT_TASK_SET_FULL:
5056 case SAM_STAT_TASK_ABORTED:
5057 ufshcd_copy_sense_data(lrbp);
5058 result |= scsi_status;
5061 result |= DID_ERROR << 16;
5063 } /* end of switch */
5069 * ufshcd_transfer_rsp_status - Get overall status of the response
5070 * @hba: per adapter instance
5071 * @lrbp: pointer to local reference block of completed command
5073 * Returns result of the command to notify SCSI midlayer
5076 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
5082 /* overall command status of utrd */
5083 ocs = ufshcd_get_tr_ocs(lrbp);
5085 if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) {
5086 if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) &
5087 MASK_RSP_UPIU_RESULT)
5093 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
5094 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
5096 case UPIU_TRANSACTION_RESPONSE:
5098 * get the response UPIU result to extract
5099 * the SCSI command status
5101 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
5104 * get the result based on SCSI status response
5105 * to notify the SCSI midlayer of the command status
5107 scsi_status = result & MASK_SCSI_STATUS;
5108 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
5111 * Currently we are only supporting BKOPs exception
5112 * events hence we can ignore BKOPs exception event
5113 * during power management callbacks. BKOPs exception
5114 * event is not expected to be raised in runtime suspend
5115 * callback as it allows the urgent bkops.
5116 * During system suspend, we are anyway forcefully
5117 * disabling the bkops and if urgent bkops is needed
5118 * it will be enabled on system resume. Long term
5119 * solution could be to abort the system suspend if
5120 * UFS device needs urgent BKOPs.
5122 if (!hba->pm_op_in_progress &&
5123 !ufshcd_eh_in_progress(hba) &&
5124 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
5125 /* Flushed in suspend */
5126 schedule_work(&hba->eeh_work);
5128 case UPIU_TRANSACTION_REJECT_UPIU:
5129 /* TODO: handle Reject UPIU Response */
5130 result = DID_ERROR << 16;
5132 "Reject UPIU not fully implemented\n");
5136 "Unexpected request response code = %x\n",
5138 result = DID_ERROR << 16;
5143 result |= DID_ABORT << 16;
5145 case OCS_INVALID_COMMAND_STATUS:
5146 result |= DID_REQUEUE << 16;
5148 case OCS_INVALID_CMD_TABLE_ATTR:
5149 case OCS_INVALID_PRDT_ATTR:
5150 case OCS_MISMATCH_DATA_BUF_SIZE:
5151 case OCS_MISMATCH_RESP_UPIU_SIZE:
5152 case OCS_PEER_COMM_FAILURE:
5153 case OCS_FATAL_ERROR:
5154 case OCS_DEVICE_FATAL_ERROR:
5155 case OCS_INVALID_CRYPTO_CONFIG:
5156 case OCS_GENERAL_CRYPTO_ERROR:
5158 result |= DID_ERROR << 16;
5160 "OCS error from controller = %x for tag %d\n",
5161 ocs, lrbp->task_tag);
5162 ufshcd_print_evt_hist(hba);
5163 ufshcd_print_host_state(hba);
5165 } /* end of switch */
5167 if ((host_byte(result) != DID_OK) &&
5168 (host_byte(result) != DID_REQUEUE) && !hba->silence_err_logs)
5169 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
5173 static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5176 if (!ufshcd_is_auto_hibern8_supported(hba) ||
5177 !ufshcd_is_auto_hibern8_enabled(hba))
5180 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5183 if (hba->active_uic_cmd &&
5184 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5185 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5192 * ufshcd_uic_cmd_compl - handle completion of uic command
5193 * @hba: per adapter instance
5194 * @intr_status: interrupt status generated by the controller
5197 * IRQ_HANDLED - If interrupt is valid
5198 * IRQ_NONE - If invalid interrupt
5200 static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
5202 irqreturn_t retval = IRQ_NONE;
5204 spin_lock(hba->host->host_lock);
5205 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5206 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5208 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
5209 hba->active_uic_cmd->argument2 |=
5210 ufshcd_get_uic_cmd_result(hba);
5211 hba->active_uic_cmd->argument3 =
5212 ufshcd_get_dme_attr_val(hba);
5213 if (!hba->uic_async_done)
5214 hba->active_uic_cmd->cmd_active = 0;
5215 complete(&hba->active_uic_cmd->done);
5216 retval = IRQ_HANDLED;
5219 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
5220 hba->active_uic_cmd->cmd_active = 0;
5221 complete(hba->uic_async_done);
5222 retval = IRQ_HANDLED;
5225 if (retval == IRQ_HANDLED)
5226 ufshcd_add_uic_command_trace(hba, hba->active_uic_cmd,
5228 spin_unlock(hba->host->host_lock);
5233 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
5234 * @hba: per adapter instance
5235 * @completed_reqs: requests to complete
5237 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
5238 unsigned long completed_reqs)
5240 struct ufshcd_lrb *lrbp;
5241 struct scsi_cmnd *cmd;
5244 bool update_scaling = false;
5246 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5247 if (!test_and_clear_bit(index, &hba->outstanding_reqs))
5249 lrbp = &hba->lrb[index];
5250 lrbp->compl_time_stamp = ktime_get();
5253 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
5254 ufshcd_update_monitor(hba, lrbp);
5255 ufshcd_add_command_trace(hba, index, UFS_CMD_COMP);
5256 result = ufshcd_transfer_rsp_status(hba, lrbp);
5257 scsi_dma_unmap(cmd);
5258 cmd->result = result;
5259 /* Mark completed command as NULL in LRB */
5261 /* Do not touch lrbp after scsi done */
5262 cmd->scsi_done(cmd);
5263 ufshcd_release(hba);
5264 update_scaling = true;
5265 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
5266 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
5267 if (hba->dev_cmd.complete) {
5268 ufshcd_add_command_trace(hba, index,
5270 complete(hba->dev_cmd.complete);
5271 update_scaling = true;
5275 ufshcd_clk_scaling_update_busy(hba);
5280 * ufshcd_trc_handler - handle transfer requests completion
5281 * @hba: per adapter instance
5282 * @use_utrlcnr: get completed requests from UTRLCNR
5285 * IRQ_HANDLED - If interrupt is valid
5286 * IRQ_NONE - If invalid interrupt
5288 static irqreturn_t ufshcd_trc_handler(struct ufs_hba *hba, bool use_utrlcnr)
5290 unsigned long completed_reqs = 0;
5292 /* Resetting interrupt aggregation counters first and reading the
5293 * DOOR_BELL afterward allows us to handle all the completed requests.
5294 * In order to prevent other interrupts starvation the DB is read once
5295 * after reset. The down side of this solution is the possibility of
5296 * false interrupt if device completes another request after resetting
5297 * aggregation and before reading the DB.
5299 if (ufshcd_is_intr_aggr_allowed(hba) &&
5300 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
5301 ufshcd_reset_intr_aggr(hba);
5306 utrlcnr = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_LIST_COMPL);
5308 ufshcd_writel(hba, utrlcnr,
5309 REG_UTP_TRANSFER_REQ_LIST_COMPL);
5310 completed_reqs = utrlcnr;
5313 unsigned long flags;
5316 spin_lock_irqsave(hba->host->host_lock, flags);
5317 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5318 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
5319 spin_unlock_irqrestore(hba->host->host_lock, flags);
5322 if (completed_reqs) {
5323 __ufshcd_transfer_req_compl(hba, completed_reqs);
5330 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask)
5332 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
5333 QUERY_ATTR_IDN_EE_CONTROL, 0, 0,
5337 int ufshcd_write_ee_control(struct ufs_hba *hba)
5341 mutex_lock(&hba->ee_ctrl_mutex);
5342 err = __ufshcd_write_ee_control(hba, hba->ee_ctrl_mask);
5343 mutex_unlock(&hba->ee_ctrl_mutex);
5345 dev_err(hba->dev, "%s: failed to write ee control %d\n",
5350 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
5353 u16 new_mask, ee_ctrl_mask;
5356 mutex_lock(&hba->ee_ctrl_mutex);
5357 new_mask = (*mask & ~clr) | set;
5358 ee_ctrl_mask = new_mask | *other_mask;
5359 if (ee_ctrl_mask != hba->ee_ctrl_mask)
5360 err = __ufshcd_write_ee_control(hba, ee_ctrl_mask);
5361 /* Still need to update 'mask' even if 'ee_ctrl_mask' was unchanged */
5363 hba->ee_ctrl_mask = ee_ctrl_mask;
5366 mutex_unlock(&hba->ee_ctrl_mutex);
5371 * ufshcd_disable_ee - disable exception event
5372 * @hba: per-adapter instance
5373 * @mask: exception event to disable
5375 * Disables exception event in the device so that the EVENT_ALERT
5378 * Returns zero on success, non-zero error value on failure.
5380 static inline int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
5382 return ufshcd_update_ee_drv_mask(hba, 0, mask);
5386 * ufshcd_enable_ee - enable exception event
5387 * @hba: per-adapter instance
5388 * @mask: exception event to enable
5390 * Enable corresponding exception event in the device to allow
5391 * device to alert host in critical scenarios.
5393 * Returns zero on success, non-zero error value on failure.
5395 static inline int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
5397 return ufshcd_update_ee_drv_mask(hba, mask, 0);
5401 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5402 * @hba: per-adapter instance
5404 * Allow device to manage background operations on its own. Enabling
5405 * this might lead to inconsistent latencies during normal data transfers
5406 * as the device is allowed to manage its own way of handling background
5409 * Returns zero on success, non-zero on failure.
5411 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5415 if (hba->auto_bkops_enabled)
5418 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
5419 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5421 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5426 hba->auto_bkops_enabled = true;
5427 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
5429 /* No need of URGENT_BKOPS exception from the device */
5430 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5432 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5439 * ufshcd_disable_auto_bkops - block device in doing background operations
5440 * @hba: per-adapter instance
5442 * Disabling background operations improves command response latency but
5443 * has drawback of device moving into critical state where the device is
5444 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5445 * host is idle so that BKOPS are managed effectively without any negative
5448 * Returns zero on success, non-zero on failure.
5450 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5454 if (!hba->auto_bkops_enabled)
5458 * If host assisted BKOPs is to be enabled, make sure
5459 * urgent bkops exception is allowed.
5461 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5463 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5468 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5469 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5471 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5473 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5477 hba->auto_bkops_enabled = false;
5478 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5479 hba->is_urgent_bkops_lvl_checked = false;
5485 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5486 * @hba: per adapter instance
5488 * After a device reset the device may toggle the BKOPS_EN flag
5489 * to default value. The s/w tracking variables should be updated
5490 * as well. This function would change the auto-bkops state based on
5491 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5493 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5495 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5496 hba->auto_bkops_enabled = false;
5497 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5498 ufshcd_enable_auto_bkops(hba);
5500 hba->auto_bkops_enabled = true;
5501 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5502 ufshcd_disable_auto_bkops(hba);
5504 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
5505 hba->is_urgent_bkops_lvl_checked = false;
5508 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5510 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5511 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5515 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5516 * @hba: per-adapter instance
5517 * @status: bkops_status value
5519 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5520 * flag in the device to permit background operations if the device
5521 * bkops_status is greater than or equal to "status" argument passed to
5522 * this function, disable otherwise.
5524 * Returns 0 for success, non-zero in case of failure.
5526 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5527 * to know whether auto bkops is enabled or disabled after this function
5528 * returns control to it.
5530 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5531 enum bkops_status status)
5534 u32 curr_status = 0;
5536 err = ufshcd_get_bkops_status(hba, &curr_status);
5538 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5541 } else if (curr_status > BKOPS_STATUS_MAX) {
5542 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5543 __func__, curr_status);
5548 if (curr_status >= status)
5549 err = ufshcd_enable_auto_bkops(hba);
5551 err = ufshcd_disable_auto_bkops(hba);
5557 * ufshcd_urgent_bkops - handle urgent bkops exception event
5558 * @hba: per-adapter instance
5560 * Enable fBackgroundOpsEn flag in the device to permit background
5563 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5564 * and negative error value for any other failure.
5566 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5568 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5571 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5573 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5574 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5577 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5580 u32 curr_status = 0;
5582 if (hba->is_urgent_bkops_lvl_checked)
5583 goto enable_auto_bkops;
5585 err = ufshcd_get_bkops_status(hba, &curr_status);
5587 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5593 * We are seeing that some devices are raising the urgent bkops
5594 * exception events even when BKOPS status doesn't indicate performace
5595 * impacted or critical. Handle these device by determining their urgent
5596 * bkops status at runtime.
5598 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5599 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5600 __func__, curr_status);
5601 /* update the current status as the urgent bkops level */
5602 hba->urgent_bkops_lvl = curr_status;
5603 hba->is_urgent_bkops_lvl_checked = true;
5607 err = ufshcd_enable_auto_bkops(hba);
5610 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5614 static int __ufshcd_wb_toggle(struct ufs_hba *hba, bool set, enum flag_idn idn)
5617 enum query_opcode opcode = set ? UPIU_QUERY_OPCODE_SET_FLAG :
5618 UPIU_QUERY_OPCODE_CLEAR_FLAG;
5620 index = ufshcd_wb_get_query_index(hba);
5621 return ufshcd_query_flag_retry(hba, opcode, idn, index, NULL);
5624 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable)
5628 if (!ufshcd_is_wb_allowed(hba))
5631 if (!(enable ^ hba->dev_info.wb_enabled))
5634 ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_EN);
5636 dev_err(hba->dev, "%s Write Booster %s failed %d\n",
5637 __func__, enable ? "enable" : "disable", ret);
5641 hba->dev_info.wb_enabled = enable;
5642 dev_info(hba->dev, "%s Write Booster %s\n",
5643 __func__, enable ? "enabled" : "disabled");
5648 static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
5652 ret = __ufshcd_wb_toggle(hba, set,
5653 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8);
5655 dev_err(hba->dev, "%s: WB-Buf Flush during H8 %s failed: %d\n",
5656 __func__, set ? "enable" : "disable", ret);
5659 dev_dbg(hba->dev, "%s WB-Buf Flush during H8 %s\n",
5660 __func__, set ? "enabled" : "disabled");
5663 static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5667 if (!ufshcd_is_wb_allowed(hba) ||
5668 hba->dev_info.wb_buf_flush_enabled == enable)
5671 ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN);
5673 dev_err(hba->dev, "%s WB-Buf Flush %s failed %d\n", __func__,
5674 enable ? "enable" : "disable", ret);
5678 hba->dev_info.wb_buf_flush_enabled = enable;
5680 dev_dbg(hba->dev, "%s WB-Buf Flush %s\n",
5681 __func__, enable ? "enabled" : "disabled");
5684 static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5691 index = ufshcd_wb_get_query_index(hba);
5692 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5693 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
5694 index, 0, &cur_buf);
5696 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5702 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5706 /* Let it continue to flush when available buffer exceeds threshold */
5707 if (avail_buf < hba->vps->wb_flush_threshold)
5713 static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
5719 if (!ufshcd_is_wb_allowed(hba))
5722 * The ufs device needs the vcc to be ON to flush.
5723 * With user-space reduction enabled, it's enough to enable flush
5724 * by checking only the available buffer. The threshold
5725 * defined here is > 90% full.
5726 * With user-space preserved enabled, the current-buffer
5727 * should be checked too because the wb buffer size can reduce
5728 * when disk tends to be full. This info is provided by current
5729 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5730 * keeping vcc on when current buffer is empty.
5732 index = ufshcd_wb_get_query_index(hba);
5733 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5734 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
5735 index, 0, &avail_buf);
5737 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5742 if (!hba->dev_info.b_presrv_uspc_en) {
5743 if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
5748 return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5751 static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
5753 struct ufs_hba *hba = container_of(to_delayed_work(work),
5755 rpm_dev_flush_recheck_work);
5757 * To prevent unnecessary VCC power drain after device finishes
5758 * WriteBooster buffer flush or Auto BKOPs, force runtime resume
5759 * after a certain delay to recheck the threshold by next runtime
5762 ufshcd_rpm_get_sync(hba);
5763 ufshcd_rpm_put_sync(hba);
5767 * ufshcd_exception_event_handler - handle exceptions raised by device
5768 * @work: pointer to work data
5770 * Read bExceptionEventStatus attribute from the device and handle the
5771 * exception event accordingly.
5773 static void ufshcd_exception_event_handler(struct work_struct *work)
5775 struct ufs_hba *hba;
5778 hba = container_of(work, struct ufs_hba, eeh_work);
5780 ufshcd_scsi_block_requests(hba);
5781 err = ufshcd_get_ee_status(hba, &status);
5783 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5788 trace_ufshcd_exception_event(dev_name(hba->dev), status);
5790 if (status & hba->ee_drv_mask & MASK_EE_URGENT_BKOPS)
5791 ufshcd_bkops_exception_event_handler(hba);
5793 ufs_debugfs_exception_event(hba, status);
5795 ufshcd_scsi_unblock_requests(hba);
5799 /* Complete requests that have door-bell cleared */
5800 static void ufshcd_complete_requests(struct ufs_hba *hba)
5802 ufshcd_trc_handler(hba, false);
5803 ufshcd_tmc_handler(hba);
5807 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5808 * to recover from the DL NAC errors or not.
5809 * @hba: per-adapter instance
5811 * Returns true if error handling is required, false otherwise
5813 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5815 unsigned long flags;
5816 bool err_handling = true;
5818 spin_lock_irqsave(hba->host->host_lock, flags);
5820 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5821 * device fatal error and/or DL NAC & REPLAY timeout errors.
5823 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5826 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5827 ((hba->saved_err & UIC_ERROR) &&
5828 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5831 if ((hba->saved_err & UIC_ERROR) &&
5832 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5835 * wait for 50ms to see if we can get any other errors or not.
5837 spin_unlock_irqrestore(hba->host->host_lock, flags);
5839 spin_lock_irqsave(hba->host->host_lock, flags);
5842 * now check if we have got any other severe errors other than
5845 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5846 ((hba->saved_err & UIC_ERROR) &&
5847 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5851 * As DL NAC is the only error received so far, send out NOP
5852 * command to confirm if link is still active or not.
5853 * - If we don't get any response then do error recovery.
5854 * - If we get response then clear the DL NAC error bit.
5857 spin_unlock_irqrestore(hba->host->host_lock, flags);
5858 err = ufshcd_verify_dev_init(hba);
5859 spin_lock_irqsave(hba->host->host_lock, flags);
5864 /* Link seems to be alive hence ignore the DL NAC errors */
5865 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5866 hba->saved_err &= ~UIC_ERROR;
5867 /* clear NAC error */
5868 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5869 if (!hba->saved_uic_err)
5870 err_handling = false;
5873 spin_unlock_irqrestore(hba->host->host_lock, flags);
5874 return err_handling;
5877 /* host lock must be held before calling this func */
5878 static inline bool ufshcd_is_saved_err_fatal(struct ufs_hba *hba)
5880 return (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR) ||
5881 (hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK));
5884 /* host lock must be held before calling this func */
5885 static inline void ufshcd_schedule_eh_work(struct ufs_hba *hba)
5887 /* handle fatal errors only when link is not in error state */
5888 if (hba->ufshcd_state != UFSHCD_STATE_ERROR) {
5889 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
5890 ufshcd_is_saved_err_fatal(hba))
5891 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_FATAL;
5893 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_NON_FATAL;
5894 queue_work(hba->eh_wq, &hba->eh_work);
5898 static void ufshcd_clk_scaling_allow(struct ufs_hba *hba, bool allow)
5900 down_write(&hba->clk_scaling_lock);
5901 hba->clk_scaling.is_allowed = allow;
5902 up_write(&hba->clk_scaling_lock);
5905 static void ufshcd_clk_scaling_suspend(struct ufs_hba *hba, bool suspend)
5908 if (hba->clk_scaling.is_enabled)
5909 ufshcd_suspend_clkscaling(hba);
5910 ufshcd_clk_scaling_allow(hba, false);
5912 ufshcd_clk_scaling_allow(hba, true);
5913 if (hba->clk_scaling.is_enabled)
5914 ufshcd_resume_clkscaling(hba);
5918 static void ufshcd_err_handling_prepare(struct ufs_hba *hba)
5920 ufshcd_rpm_get_sync(hba);
5921 if (pm_runtime_status_suspended(&hba->sdev_ufs_device->sdev_gendev) ||
5922 hba->is_sys_suspended) {
5923 enum ufs_pm_op pm_op;
5926 * Don't assume anything of resume, if
5927 * resume fails, irq and clocks can be OFF, and powers
5928 * can be OFF or in LPM.
5930 ufshcd_setup_hba_vreg(hba, true);
5931 ufshcd_enable_irq(hba);
5932 ufshcd_setup_vreg(hba, true);
5933 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
5934 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
5935 ufshcd_hold(hba, false);
5936 if (!ufshcd_is_clkgating_allowed(hba))
5937 ufshcd_setup_clocks(hba, true);
5938 ufshcd_release(hba);
5939 pm_op = hba->is_sys_suspended ? UFS_SYSTEM_PM : UFS_RUNTIME_PM;
5940 ufshcd_vops_resume(hba, pm_op);
5942 ufshcd_hold(hba, false);
5943 if (ufshcd_is_clkscaling_supported(hba) &&
5944 hba->clk_scaling.is_enabled)
5945 ufshcd_suspend_clkscaling(hba);
5946 ufshcd_clk_scaling_allow(hba, false);
5948 ufshcd_scsi_block_requests(hba);
5949 /* Drain ufshcd_queuecommand() */
5950 down_write(&hba->clk_scaling_lock);
5951 up_write(&hba->clk_scaling_lock);
5952 cancel_work_sync(&hba->eeh_work);
5955 static void ufshcd_err_handling_unprepare(struct ufs_hba *hba)
5957 ufshcd_scsi_unblock_requests(hba);
5958 ufshcd_release(hba);
5959 if (ufshcd_is_clkscaling_supported(hba))
5960 ufshcd_clk_scaling_suspend(hba, false);
5961 ufshcd_clear_ua_wluns(hba);
5962 ufshcd_rpm_put(hba);
5965 static inline bool ufshcd_err_handling_should_stop(struct ufs_hba *hba)
5967 return (!hba->is_powered || hba->shutting_down ||
5968 !hba->sdev_ufs_device ||
5969 hba->ufshcd_state == UFSHCD_STATE_ERROR ||
5970 (!(hba->saved_err || hba->saved_uic_err || hba->force_reset ||
5971 ufshcd_is_link_broken(hba))));
5975 static void ufshcd_recover_pm_error(struct ufs_hba *hba)
5977 struct Scsi_Host *shost = hba->host;
5978 struct scsi_device *sdev;
5979 struct request_queue *q;
5982 hba->is_sys_suspended = false;
5984 * Set RPM status of wlun device to RPM_ACTIVE,
5985 * this also clears its runtime error.
5987 ret = pm_runtime_set_active(&hba->sdev_ufs_device->sdev_gendev);
5989 /* hba device might have a runtime error otherwise */
5991 ret = pm_runtime_set_active(hba->dev);
5993 * If wlun device had runtime error, we also need to resume those
5994 * consumer scsi devices in case any of them has failed to be
5995 * resumed due to supplier runtime resume failure. This is to unblock
5996 * blk_queue_enter in case there are bios waiting inside it.
5999 shost_for_each_device(sdev, shost) {
6000 q = sdev->request_queue;
6001 if (q->dev && (q->rpm_status == RPM_SUSPENDED ||
6002 q->rpm_status == RPM_SUSPENDING))
6003 pm_request_resume(q->dev);
6008 static inline void ufshcd_recover_pm_error(struct ufs_hba *hba)
6013 static bool ufshcd_is_pwr_mode_restore_needed(struct ufs_hba *hba)
6015 struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;
6018 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
6020 if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))
6023 if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))
6030 * ufshcd_err_handler - handle UFS errors that require s/w attention
6031 * @work: pointer to work structure
6033 static void ufshcd_err_handler(struct work_struct *work)
6035 struct ufs_hba *hba;
6036 unsigned long flags;
6037 bool err_xfer = false;
6038 bool err_tm = false;
6039 int err = 0, pmc_err;
6041 bool needs_reset = false, needs_restore = false;
6043 hba = container_of(work, struct ufs_hba, eh_work);
6045 down(&hba->host_sem);
6046 spin_lock_irqsave(hba->host->host_lock, flags);
6047 if (ufshcd_err_handling_should_stop(hba)) {
6048 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6049 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6050 spin_unlock_irqrestore(hba->host->host_lock, flags);
6054 ufshcd_set_eh_in_progress(hba);
6055 spin_unlock_irqrestore(hba->host->host_lock, flags);
6056 ufshcd_err_handling_prepare(hba);
6057 /* Complete requests that have door-bell cleared by h/w */
6058 ufshcd_complete_requests(hba);
6059 spin_lock_irqsave(hba->host->host_lock, flags);
6060 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6061 hba->ufshcd_state = UFSHCD_STATE_RESET;
6063 * A full reset and restore might have happened after preparation
6064 * is finished, double check whether we should stop.
6066 if (ufshcd_err_handling_should_stop(hba))
6067 goto skip_err_handling;
6069 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6072 spin_unlock_irqrestore(hba->host->host_lock, flags);
6073 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
6074 ret = ufshcd_quirk_dl_nac_errors(hba);
6075 spin_lock_irqsave(hba->host->host_lock, flags);
6076 if (!ret && ufshcd_err_handling_should_stop(hba))
6077 goto skip_err_handling;
6080 if ((hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6081 (hba->saved_uic_err &&
6082 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
6083 bool pr_prdt = !!(hba->saved_err & SYSTEM_BUS_FATAL_ERROR);
6085 spin_unlock_irqrestore(hba->host->host_lock, flags);
6086 ufshcd_print_host_state(hba);
6087 ufshcd_print_pwr_info(hba);
6088 ufshcd_print_evt_hist(hba);
6089 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
6090 ufshcd_print_trs(hba, hba->outstanding_reqs, pr_prdt);
6091 spin_lock_irqsave(hba->host->host_lock, flags);
6095 * if host reset is required then skip clearing the pending
6096 * transfers forcefully because they will get cleared during
6097 * host reset and restore
6099 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
6100 ufshcd_is_saved_err_fatal(hba) ||
6101 ((hba->saved_err & UIC_ERROR) &&
6102 (hba->saved_uic_err & (UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
6103 UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))) {
6109 * If LINERESET was caught, UFS might have been put to PWM mode,
6110 * check if power mode restore is needed.
6112 if (hba->saved_uic_err & UFSHCD_UIC_PA_GENERIC_ERROR) {
6113 hba->saved_uic_err &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6114 if (!hba->saved_uic_err)
6115 hba->saved_err &= ~UIC_ERROR;
6116 spin_unlock_irqrestore(hba->host->host_lock, flags);
6117 if (ufshcd_is_pwr_mode_restore_needed(hba))
6118 needs_restore = true;
6119 spin_lock_irqsave(hba->host->host_lock, flags);
6120 if (!hba->saved_err && !needs_restore)
6121 goto skip_err_handling;
6124 hba->silence_err_logs = true;
6125 /* release lock as clear command might sleep */
6126 spin_unlock_irqrestore(hba->host->host_lock, flags);
6127 /* Clear pending transfer requests */
6128 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
6129 if (ufshcd_try_to_abort_task(hba, tag)) {
6131 goto lock_skip_pending_xfer_clear;
6135 /* Clear pending task management requests */
6136 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
6137 if (ufshcd_clear_tm_cmd(hba, tag)) {
6139 goto lock_skip_pending_xfer_clear;
6143 lock_skip_pending_xfer_clear:
6144 /* Complete the requests that are cleared by s/w */
6145 ufshcd_complete_requests(hba);
6147 spin_lock_irqsave(hba->host->host_lock, flags);
6148 hba->silence_err_logs = false;
6149 if (err_xfer || err_tm) {
6155 * After all reqs and tasks are cleared from doorbell,
6156 * now it is safe to retore power mode.
6158 if (needs_restore) {
6159 spin_unlock_irqrestore(hba->host->host_lock, flags);
6161 * Hold the scaling lock just in case dev cmds
6162 * are sent via bsg and/or sysfs.
6164 down_write(&hba->clk_scaling_lock);
6165 hba->force_pmc = true;
6166 pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));
6169 dev_err(hba->dev, "%s: Failed to restore power mode, err = %d\n",
6172 hba->force_pmc = false;
6173 ufshcd_print_pwr_info(hba);
6174 up_write(&hba->clk_scaling_lock);
6175 spin_lock_irqsave(hba->host->host_lock, flags);
6179 /* Fatal errors need reset */
6181 hba->force_reset = false;
6182 spin_unlock_irqrestore(hba->host->host_lock, flags);
6183 err = ufshcd_reset_and_restore(hba);
6185 dev_err(hba->dev, "%s: reset and restore failed with err %d\n",
6188 ufshcd_recover_pm_error(hba);
6189 spin_lock_irqsave(hba->host->host_lock, flags);
6194 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
6195 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6196 if (hba->saved_err || hba->saved_uic_err)
6197 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
6198 __func__, hba->saved_err, hba->saved_uic_err);
6200 ufshcd_clear_eh_in_progress(hba);
6201 spin_unlock_irqrestore(hba->host->host_lock, flags);
6202 ufshcd_err_handling_unprepare(hba);
6207 * ufshcd_update_uic_error - check and set fatal UIC error flags.
6208 * @hba: per-adapter instance
6211 * IRQ_HANDLED - If interrupt is valid
6212 * IRQ_NONE - If invalid interrupt
6214 static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
6217 irqreturn_t retval = IRQ_NONE;
6219 /* PHY layer error */
6220 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
6221 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
6222 (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) {
6223 ufshcd_update_evt_hist(hba, UFS_EVT_PA_ERR, reg);
6225 * To know whether this error is fatal or not, DB timeout
6226 * must be checked but this error is handled separately.
6228 if (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)
6229 dev_dbg(hba->dev, "%s: UIC Lane error reported\n",
6232 /* Got a LINERESET indication. */
6233 if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) {
6234 struct uic_command *cmd = NULL;
6236 hba->uic_error |= UFSHCD_UIC_PA_GENERIC_ERROR;
6237 if (hba->uic_async_done && hba->active_uic_cmd)
6238 cmd = hba->active_uic_cmd;
6240 * Ignore the LINERESET during power mode change
6241 * operation via DME_SET command.
6243 if (cmd && (cmd->command == UIC_CMD_DME_SET))
6244 hba->uic_error &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6246 retval |= IRQ_HANDLED;
6249 /* PA_INIT_ERROR is fatal and needs UIC reset */
6250 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
6251 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
6252 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
6253 ufshcd_update_evt_hist(hba, UFS_EVT_DL_ERR, reg);
6255 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
6256 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
6257 else if (hba->dev_quirks &
6258 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6259 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
6261 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6262 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
6263 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
6265 retval |= IRQ_HANDLED;
6268 /* UIC NL/TL/DME errors needs software retry */
6269 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
6270 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
6271 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
6272 ufshcd_update_evt_hist(hba, UFS_EVT_NL_ERR, reg);
6273 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
6274 retval |= IRQ_HANDLED;
6277 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
6278 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
6279 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
6280 ufshcd_update_evt_hist(hba, UFS_EVT_TL_ERR, reg);
6281 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
6282 retval |= IRQ_HANDLED;
6285 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
6286 if ((reg & UIC_DME_ERROR) &&
6287 (reg & UIC_DME_ERROR_CODE_MASK)) {
6288 ufshcd_update_evt_hist(hba, UFS_EVT_DME_ERR, reg);
6289 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
6290 retval |= IRQ_HANDLED;
6293 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
6294 __func__, hba->uic_error);
6299 * ufshcd_check_errors - Check for errors that need s/w attention
6300 * @hba: per-adapter instance
6301 * @intr_status: interrupt status generated by the controller
6304 * IRQ_HANDLED - If interrupt is valid
6305 * IRQ_NONE - If invalid interrupt
6307 static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba, u32 intr_status)
6309 bool queue_eh_work = false;
6310 irqreturn_t retval = IRQ_NONE;
6312 spin_lock(hba->host->host_lock);
6313 hba->errors |= UFSHCD_ERROR_MASK & intr_status;
6315 if (hba->errors & INT_FATAL_ERRORS) {
6316 ufshcd_update_evt_hist(hba, UFS_EVT_FATAL_ERR,
6318 queue_eh_work = true;
6321 if (hba->errors & UIC_ERROR) {
6323 retval = ufshcd_update_uic_error(hba);
6325 queue_eh_work = true;
6328 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
6330 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
6331 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
6333 hba->errors, ufshcd_get_upmcrs(hba));
6334 ufshcd_update_evt_hist(hba, UFS_EVT_AUTO_HIBERN8_ERR,
6336 ufshcd_set_link_broken(hba);
6337 queue_eh_work = true;
6340 if (queue_eh_work) {
6342 * update the transfer error masks to sticky bits, let's do this
6343 * irrespective of current ufshcd_state.
6345 hba->saved_err |= hba->errors;
6346 hba->saved_uic_err |= hba->uic_error;
6348 /* dump controller state before resetting */
6349 if ((hba->saved_err &
6350 (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6351 (hba->saved_uic_err &&
6352 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
6353 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
6354 __func__, hba->saved_err,
6355 hba->saved_uic_err);
6356 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE,
6358 ufshcd_print_pwr_info(hba);
6360 ufshcd_schedule_eh_work(hba);
6361 retval |= IRQ_HANDLED;
6364 * if (!queue_eh_work) -
6365 * Other errors are either non-fatal where host recovers
6366 * itself without s/w intervention or errors that will be
6367 * handled by the SCSI core layer.
6371 spin_unlock(hba->host->host_lock);
6376 struct ufs_hba *hba;
6377 unsigned long pending;
6381 static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
6383 struct ctm_info *const ci = priv;
6384 struct completion *c;
6386 WARN_ON_ONCE(reserved);
6387 if (test_bit(req->tag, &ci->pending))
6390 c = req->end_io_data;
6397 * ufshcd_tmc_handler - handle task management function completion
6398 * @hba: per adapter instance
6401 * IRQ_HANDLED - If interrupt is valid
6402 * IRQ_NONE - If invalid interrupt
6404 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
6406 unsigned long flags;
6407 struct request_queue *q = hba->tmf_queue;
6408 struct ctm_info ci = {
6412 spin_lock_irqsave(hba->host->host_lock, flags);
6413 ci.pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
6414 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
6415 spin_unlock_irqrestore(hba->host->host_lock, flags);
6417 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
6421 * ufshcd_sl_intr - Interrupt service routine
6422 * @hba: per adapter instance
6423 * @intr_status: contains interrupts generated by the controller
6426 * IRQ_HANDLED - If interrupt is valid
6427 * IRQ_NONE - If invalid interrupt
6429 static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
6431 irqreturn_t retval = IRQ_NONE;
6433 if (intr_status & UFSHCD_UIC_MASK)
6434 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
6436 if (intr_status & UFSHCD_ERROR_MASK || hba->errors)
6437 retval |= ufshcd_check_errors(hba, intr_status);
6439 if (intr_status & UTP_TASK_REQ_COMPL)
6440 retval |= ufshcd_tmc_handler(hba);
6442 if (intr_status & UTP_TRANSFER_REQ_COMPL)
6443 retval |= ufshcd_trc_handler(hba, ufshcd_has_utrlcnr(hba));
6449 * ufshcd_intr - Main interrupt service routine
6451 * @__hba: pointer to adapter instance
6454 * IRQ_HANDLED - If interrupt is valid
6455 * IRQ_NONE - If invalid interrupt
6457 static irqreturn_t ufshcd_intr(int irq, void *__hba)
6459 u32 intr_status, enabled_intr_status = 0;
6460 irqreturn_t retval = IRQ_NONE;
6461 struct ufs_hba *hba = __hba;
6462 int retries = hba->nutrs;
6464 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6465 hba->ufs_stats.last_intr_status = intr_status;
6466 hba->ufs_stats.last_intr_ts = ktime_get();
6469 * There could be max of hba->nutrs reqs in flight and in worst case
6470 * if the reqs get finished 1 by 1 after the interrupt status is
6471 * read, make sure we handle them by checking the interrupt status
6472 * again in a loop until we process all of the reqs before returning.
6474 while (intr_status && retries--) {
6475 enabled_intr_status =
6476 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
6477 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
6478 if (enabled_intr_status)
6479 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
6481 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6484 if (enabled_intr_status && retval == IRQ_NONE &&
6485 (!(enabled_intr_status & UTP_TRANSFER_REQ_COMPL) ||
6486 hba->outstanding_reqs) && !ufshcd_eh_in_progress(hba)) {
6487 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x (0x%08x, 0x%08x)\n",
6490 hba->ufs_stats.last_intr_status,
6491 enabled_intr_status);
6492 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
6498 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
6501 u32 mask = 1 << tag;
6502 unsigned long flags;
6504 if (!test_bit(tag, &hba->outstanding_tasks))
6507 spin_lock_irqsave(hba->host->host_lock, flags);
6508 ufshcd_utmrl_clear(hba, tag);
6509 spin_unlock_irqrestore(hba->host->host_lock, flags);
6511 /* poll for max. 1 sec to clear door bell register by h/w */
6512 err = ufshcd_wait_for_register(hba,
6513 REG_UTP_TASK_REQ_DOOR_BELL,
6514 mask, 0, 1000, 1000);
6519 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
6520 struct utp_task_req_desc *treq, u8 tm_function)
6522 struct request_queue *q = hba->tmf_queue;
6523 struct Scsi_Host *host = hba->host;
6524 DECLARE_COMPLETION_ONSTACK(wait);
6525 struct request *req;
6526 unsigned long flags;
6530 * blk_get_request() is used here only to get a free tag.
6532 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6534 return PTR_ERR(req);
6536 req->end_io_data = &wait;
6537 ufshcd_hold(hba, false);
6539 spin_lock_irqsave(host->host_lock, flags);
6540 blk_mq_start_request(req);
6542 task_tag = req->tag;
6543 treq->upiu_req.req_header.dword_0 |= cpu_to_be32(task_tag);
6545 memcpy(hba->utmrdl_base_addr + task_tag, treq, sizeof(*treq));
6546 ufshcd_vops_setup_task_mgmt(hba, task_tag, tm_function);
6548 /* send command to the controller */
6549 __set_bit(task_tag, &hba->outstanding_tasks);
6551 /* Make sure descriptors are ready before ringing the task doorbell */
6554 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TASK_REQ_DOOR_BELL);
6555 /* Make sure that doorbell is committed immediately */
6558 spin_unlock_irqrestore(host->host_lock, flags);
6560 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_SEND);
6562 /* wait until the task management command is completed */
6563 err = wait_for_completion_io_timeout(&wait,
6564 msecs_to_jiffies(TM_CMD_TIMEOUT));
6567 * Make sure that ufshcd_compl_tm() does not trigger a
6570 req->end_io_data = NULL;
6571 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_ERR);
6572 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6573 __func__, tm_function);
6574 if (ufshcd_clear_tm_cmd(hba, task_tag))
6575 dev_WARN(hba->dev, "%s: unable to clear tm cmd (slot %d) after timeout\n",
6576 __func__, task_tag);
6580 memcpy(treq, hba->utmrdl_base_addr + task_tag, sizeof(*treq));
6582 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_COMP);
6585 spin_lock_irqsave(hba->host->host_lock, flags);
6586 __clear_bit(task_tag, &hba->outstanding_tasks);
6587 spin_unlock_irqrestore(hba->host->host_lock, flags);
6589 ufshcd_release(hba);
6590 blk_put_request(req);
6596 * ufshcd_issue_tm_cmd - issues task management commands to controller
6597 * @hba: per adapter instance
6598 * @lun_id: LUN ID to which TM command is sent
6599 * @task_id: task ID to which the TM command is applicable
6600 * @tm_function: task management function opcode
6601 * @tm_response: task management service response return value
6603 * Returns non-zero value on error, zero on success.
6605 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6606 u8 tm_function, u8 *tm_response)
6608 struct utp_task_req_desc treq = { { 0 }, };
6611 /* Configure task request descriptor */
6612 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6613 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6615 /* Configure task request UPIU */
6616 treq.upiu_req.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
6617 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
6618 treq.upiu_req.req_header.dword_1 = cpu_to_be32(tm_function << 16);
6621 * The host shall provide the same value for LUN field in the basic
6622 * header and for Input Parameter.
6624 treq.upiu_req.input_param1 = cpu_to_be32(lun_id);
6625 treq.upiu_req.input_param2 = cpu_to_be32(task_id);
6627 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6628 if (err == -ETIMEDOUT)
6631 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6632 if (ocs_value != OCS_SUCCESS)
6633 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6634 __func__, ocs_value);
6635 else if (tm_response)
6636 *tm_response = be32_to_cpu(treq.upiu_rsp.output_param1) &
6637 MASK_TM_SERVICE_RESP;
6642 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6643 * @hba: per-adapter instance
6644 * @req_upiu: upiu request
6645 * @rsp_upiu: upiu reply
6646 * @desc_buff: pointer to descriptor buffer, NULL if NA
6647 * @buff_len: descriptor size, 0 if NA
6648 * @cmd_type: specifies the type (NOP, Query...)
6649 * @desc_op: descriptor operation
6651 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6652 * Therefore, it "rides" the device management infrastructure: uses its tag and
6653 * tasks work queues.
6655 * Since there is only one available tag for device management commands,
6656 * the caller is expected to hold the hba->dev_cmd.lock mutex.
6658 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6659 struct utp_upiu_req *req_upiu,
6660 struct utp_upiu_req *rsp_upiu,
6661 u8 *desc_buff, int *buff_len,
6662 enum dev_cmd_type cmd_type,
6663 enum query_opcode desc_op)
6665 struct request_queue *q = hba->cmd_queue;
6666 struct request *req;
6667 struct ufshcd_lrb *lrbp;
6670 struct completion wait;
6673 down_read(&hba->clk_scaling_lock);
6675 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6681 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
6683 if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
6688 init_completion(&wait);
6689 lrbp = &hba->lrb[tag];
6692 lrbp->sense_bufflen = 0;
6693 lrbp->sense_buffer = NULL;
6694 lrbp->task_tag = tag;
6696 lrbp->intr_cmd = true;
6697 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
6698 hba->dev_cmd.type = cmd_type;
6700 if (hba->ufs_version <= ufshci_version(1, 1))
6701 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
6703 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
6705 /* update the task tag in the request upiu */
6706 req_upiu->header.dword_0 |= cpu_to_be32(tag);
6708 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6710 /* just copy the upiu request as it is */
6711 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6712 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6713 /* The Data Segment Area is optional depending upon the query
6714 * function value. for WRITE DESCRIPTOR, the data segment
6715 * follows right after the tsf.
6717 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6721 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6723 hba->dev_cmd.complete = &wait;
6725 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
6726 /* Make sure descriptors are ready before ringing the doorbell */
6729 ufshcd_send_command(hba, tag);
6731 * ignore the returning value here - ufshcd_check_query_response is
6732 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6733 * read the response directly ignoring all errors.
6735 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6737 /* just copy the upiu response as it is */
6738 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
6739 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6740 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6741 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6742 MASK_QUERY_DATA_SEG_LEN;
6744 if (*buff_len >= resp_len) {
6745 memcpy(desc_buff, descp, resp_len);
6746 *buff_len = resp_len;
6749 "%s: rsp size %d is bigger than buffer size %d",
6750 __func__, resp_len, *buff_len);
6755 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
6756 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
6759 blk_put_request(req);
6761 up_read(&hba->clk_scaling_lock);
6766 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6767 * @hba: per-adapter instance
6768 * @req_upiu: upiu request
6769 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
6770 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
6771 * @desc_buff: pointer to descriptor buffer, NULL if NA
6772 * @buff_len: descriptor size, 0 if NA
6773 * @desc_op: descriptor operation
6775 * Supports UTP Transfer requests (nop and query), and UTP Task
6776 * Management requests.
6777 * It is up to the caller to fill the upiu conent properly, as it will
6778 * be copied without any further input validations.
6780 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6781 struct utp_upiu_req *req_upiu,
6782 struct utp_upiu_req *rsp_upiu,
6784 u8 *desc_buff, int *buff_len,
6785 enum query_opcode desc_op)
6788 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
6789 struct utp_task_req_desc treq = { { 0 }, };
6791 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6794 case UPIU_TRANSACTION_NOP_OUT:
6795 cmd_type = DEV_CMD_TYPE_NOP;
6797 case UPIU_TRANSACTION_QUERY_REQ:
6798 ufshcd_hold(hba, false);
6799 mutex_lock(&hba->dev_cmd.lock);
6800 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6801 desc_buff, buff_len,
6803 mutex_unlock(&hba->dev_cmd.lock);
6804 ufshcd_release(hba);
6807 case UPIU_TRANSACTION_TASK_REQ:
6808 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6809 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6811 memcpy(&treq.upiu_req, req_upiu, sizeof(*req_upiu));
6813 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6814 if (err == -ETIMEDOUT)
6817 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6818 if (ocs_value != OCS_SUCCESS) {
6819 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6824 memcpy(rsp_upiu, &treq.upiu_rsp, sizeof(*rsp_upiu));
6837 * ufshcd_eh_device_reset_handler - device reset handler registered to
6839 * @cmd: SCSI command pointer
6841 * Returns SUCCESS/FAILED
6843 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
6845 struct Scsi_Host *host;
6846 struct ufs_hba *hba;
6851 host = cmd->device->host;
6852 hba = shost_priv(host);
6854 lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
6855 err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp);
6856 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6862 /* clear the commands that were pending for corresponding LUN */
6863 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6864 if (hba->lrb[pos].lun == lun) {
6865 err = ufshcd_clear_cmd(hba, pos);
6868 __ufshcd_transfer_req_compl(hba, pos);
6873 hba->req_abort_count = 0;
6874 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, (u32)err);
6878 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6884 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6886 struct ufshcd_lrb *lrbp;
6889 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6890 lrbp = &hba->lrb[tag];
6891 lrbp->req_abort_skip = true;
6896 * ufshcd_try_to_abort_task - abort a specific task
6897 * @hba: Pointer to adapter instance
6898 * @tag: Task tag/index to be aborted
6900 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6901 * command, and in host controller by clearing the door-bell register. There can
6902 * be race between controller sending the command to the device while abort is
6903 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6904 * really issued and then try to abort it.
6906 * Returns zero on success, non-zero on failure
6908 static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag)
6910 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6916 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6917 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6918 UFS_QUERY_TASK, &resp);
6919 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6920 /* cmd pending in the device */
6921 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6924 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6926 * cmd not pending in the device, check if it is
6929 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6931 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6932 if (reg & (1 << tag)) {
6933 /* sleep for max. 200us to stabilize */
6934 usleep_range(100, 200);
6937 /* command completed already */
6938 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6943 "%s: no response from device. tag = %d, err %d\n",
6944 __func__, tag, err);
6946 err = resp; /* service response error */
6956 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6957 UFS_ABORT_TASK, &resp);
6958 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6960 err = resp; /* service response error */
6961 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6962 __func__, tag, err);
6967 err = ufshcd_clear_cmd(hba, tag);
6969 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6970 __func__, tag, err);
6977 * ufshcd_abort - scsi host template eh_abort_handler callback
6978 * @cmd: SCSI command pointer
6980 * Returns SUCCESS/FAILED
6982 static int ufshcd_abort(struct scsi_cmnd *cmd)
6984 struct Scsi_Host *host;
6985 struct ufs_hba *hba;
6986 unsigned long flags;
6989 struct ufshcd_lrb *lrbp;
6992 host = cmd->device->host;
6993 hba = shost_priv(host);
6994 tag = cmd->request->tag;
6995 lrbp = &hba->lrb[tag];
6996 if (!ufshcd_valid_tag(hba, tag)) {
6998 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6999 __func__, tag, cmd, cmd->request);
7003 ufshcd_hold(hba, false);
7004 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
7005 /* If command is already aborted/completed, return SUCCESS */
7006 if (!(test_bit(tag, &hba->outstanding_reqs))) {
7008 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
7009 __func__, tag, hba->outstanding_reqs, reg);
7013 /* Print Transfer Request of aborted task */
7014 dev_info(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
7017 * Print detailed info about aborted request.
7018 * As more than one request might get aborted at the same time,
7019 * print full information only for the first aborted request in order
7020 * to reduce repeated printouts. For other aborted requests only print
7023 scsi_print_command(cmd);
7024 if (!hba->req_abort_count) {
7025 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, tag);
7026 ufshcd_print_evt_hist(hba);
7027 ufshcd_print_host_state(hba);
7028 ufshcd_print_pwr_info(hba);
7029 ufshcd_print_trs(hba, 1 << tag, true);
7031 ufshcd_print_trs(hba, 1 << tag, false);
7033 hba->req_abort_count++;
7035 if (!(reg & (1 << tag))) {
7037 "%s: cmd was completed, but without a notifying intr, tag = %d",
7043 * Task abort to the device W-LUN is illegal. When this command
7044 * will fail, due to spec violation, scsi err handling next step
7045 * will be to send LU reset which, again, is a spec violation.
7046 * To avoid these unnecessary/illegal steps, first we clean up
7047 * the lrb taken by this cmd and re-set it in outstanding_reqs,
7048 * then queue the eh_work and bail.
7050 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) {
7051 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, lrbp->lun);
7052 __ufshcd_transfer_req_compl(hba, (1UL << tag));
7053 set_bit(tag, &hba->outstanding_reqs);
7054 spin_lock_irqsave(host->host_lock, flags);
7055 hba->force_reset = true;
7056 ufshcd_schedule_eh_work(hba);
7057 spin_unlock_irqrestore(host->host_lock, flags);
7061 /* Skip task abort in case previous aborts failed and report failure */
7062 if (lrbp->req_abort_skip)
7065 err = ufshcd_try_to_abort_task(hba, tag);
7069 __ufshcd_transfer_req_compl(hba, (1UL << tag));
7073 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
7074 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
7079 * This ufshcd_release() corresponds to the original scsi cmd that got
7080 * aborted here (as we won't get any IRQ for it).
7082 ufshcd_release(hba);
7087 * ufshcd_host_reset_and_restore - reset and restore host controller
7088 * @hba: per-adapter instance
7090 * Note that host controller reset may issue DME_RESET to
7091 * local and remote (device) Uni-Pro stack and the attributes
7092 * are reset to default state.
7094 * Returns zero on success, non-zero on failure
7096 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
7101 * Stop the host controller and complete the requests
7104 ufshcd_hba_stop(hba);
7105 hba->silence_err_logs = true;
7106 ufshcd_complete_requests(hba);
7107 hba->silence_err_logs = false;
7109 /* scale up clocks to max frequency before full reinitialization */
7110 ufshcd_set_clk_freq(hba, true);
7112 err = ufshcd_hba_enable(hba);
7114 /* Establish the link again and restore the device */
7116 err = ufshcd_probe_hba(hba, false);
7119 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
7120 ufshcd_update_evt_hist(hba, UFS_EVT_HOST_RESET, (u32)err);
7125 * ufshcd_reset_and_restore - reset and re-initialize host/device
7126 * @hba: per-adapter instance
7128 * Reset and recover device, host and re-establish link. This
7129 * is helpful to recover the communication in fatal error conditions.
7131 * Returns zero on success, non-zero on failure
7133 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
7138 unsigned long flags;
7139 int retries = MAX_HOST_RESET_RETRIES;
7142 * This is a fresh start, cache and clear saved error first,
7143 * in case new error generated during reset and restore.
7145 spin_lock_irqsave(hba->host->host_lock, flags);
7146 saved_err = hba->saved_err;
7147 saved_uic_err = hba->saved_uic_err;
7149 hba->saved_uic_err = 0;
7150 spin_unlock_irqrestore(hba->host->host_lock, flags);
7153 /* Reset the attached device */
7154 ufshcd_device_reset(hba);
7156 err = ufshcd_host_reset_and_restore(hba);
7157 } while (err && --retries);
7159 spin_lock_irqsave(hba->host->host_lock, flags);
7161 * Inform scsi mid-layer that we did reset and allow to handle
7162 * Unit Attention properly.
7164 scsi_report_bus_reset(hba->host, 0);
7166 hba->ufshcd_state = UFSHCD_STATE_ERROR;
7167 hba->saved_err |= saved_err;
7168 hba->saved_uic_err |= saved_uic_err;
7170 spin_unlock_irqrestore(hba->host->host_lock, flags);
7176 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
7177 * @cmd: SCSI command pointer
7179 * Returns SUCCESS/FAILED
7181 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
7184 unsigned long flags;
7185 struct ufs_hba *hba;
7187 hba = shost_priv(cmd->device->host);
7189 spin_lock_irqsave(hba->host->host_lock, flags);
7190 hba->force_reset = true;
7191 ufshcd_schedule_eh_work(hba);
7192 dev_err(hba->dev, "%s: reset in progress - 1\n", __func__);
7193 spin_unlock_irqrestore(hba->host->host_lock, flags);
7195 flush_work(&hba->eh_work);
7197 spin_lock_irqsave(hba->host->host_lock, flags);
7198 if (hba->ufshcd_state == UFSHCD_STATE_ERROR)
7200 spin_unlock_irqrestore(hba->host->host_lock, flags);
7206 * ufshcd_get_max_icc_level - calculate the ICC level
7207 * @sup_curr_uA: max. current supported by the regulator
7208 * @start_scan: row at the desc table to start scan from
7209 * @buff: power descriptor buffer
7211 * Returns calculated max ICC level for specific regulator
7213 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
7220 for (i = start_scan; i >= 0; i--) {
7221 data = be16_to_cpup((__be16 *)&buff[2 * i]);
7222 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
7223 ATTR_ICC_LVL_UNIT_OFFSET;
7224 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
7226 case UFSHCD_NANO_AMP:
7227 curr_uA = curr_uA / 1000;
7229 case UFSHCD_MILI_AMP:
7230 curr_uA = curr_uA * 1000;
7233 curr_uA = curr_uA * 1000 * 1000;
7235 case UFSHCD_MICRO_AMP:
7239 if (sup_curr_uA >= curr_uA)
7244 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
7251 * ufshcd_find_max_sup_active_icc_level - calculate the max ICC level
7252 * In case regulators are not initialized we'll return 0
7253 * @hba: per-adapter instance
7254 * @desc_buf: power descriptor buffer to extract ICC levels from.
7255 * @len: length of desc_buff
7257 * Returns calculated ICC level
7259 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
7260 u8 *desc_buf, int len)
7264 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
7265 !hba->vreg_info.vccq2) {
7267 "%s: Regulator capability was not set, actvIccLevel=%d",
7268 __func__, icc_level);
7272 if (hba->vreg_info.vcc->max_uA)
7273 icc_level = ufshcd_get_max_icc_level(
7274 hba->vreg_info.vcc->max_uA,
7275 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
7276 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
7278 if (hba->vreg_info.vccq->max_uA)
7279 icc_level = ufshcd_get_max_icc_level(
7280 hba->vreg_info.vccq->max_uA,
7282 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
7284 if (hba->vreg_info.vccq2->max_uA)
7285 icc_level = ufshcd_get_max_icc_level(
7286 hba->vreg_info.vccq2->max_uA,
7288 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
7293 static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
7296 int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER];
7300 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7304 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0,
7305 desc_buf, buff_len);
7308 "%s: Failed reading power descriptor.len = %d ret = %d",
7309 __func__, buff_len, ret);
7313 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
7315 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
7317 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7318 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
7322 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
7323 __func__, icc_level, ret);
7329 static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
7331 scsi_autopm_get_device(sdev);
7332 blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
7333 if (sdev->rpm_autosuspend)
7334 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
7335 RPM_AUTOSUSPEND_DELAY_MS);
7336 scsi_autopm_put_device(sdev);
7340 * ufshcd_scsi_add_wlus - Adds required W-LUs
7341 * @hba: per-adapter instance
7343 * UFS device specification requires the UFS devices to support 4 well known
7345 * "REPORT_LUNS" (address: 01h)
7346 * "UFS Device" (address: 50h)
7347 * "RPMB" (address: 44h)
7348 * "BOOT" (address: 30h)
7349 * UFS device's power management needs to be controlled by "POWER CONDITION"
7350 * field of SSU (START STOP UNIT) command. But this "power condition" field
7351 * will take effect only when its sent to "UFS device" well known logical unit
7352 * hence we require the scsi_device instance to represent this logical unit in
7353 * order for the UFS host driver to send the SSU command for power management.
7355 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
7356 * Block) LU so user space process can control this LU. User space may also
7357 * want to have access to BOOT LU.
7359 * This function adds scsi device instances for each of all well known LUs
7360 * (except "REPORT LUNS" LU).
7362 * Returns zero on success (all required W-LUs are added successfully),
7363 * non-zero error value on failure (if failed to add any of the required W-LU).
7365 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
7368 struct scsi_device *sdev_boot;
7370 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
7371 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
7372 if (IS_ERR(hba->sdev_ufs_device)) {
7373 ret = PTR_ERR(hba->sdev_ufs_device);
7374 hba->sdev_ufs_device = NULL;
7377 scsi_device_put(hba->sdev_ufs_device);
7379 hba->sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
7380 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
7381 if (IS_ERR(hba->sdev_rpmb)) {
7382 ret = PTR_ERR(hba->sdev_rpmb);
7383 goto remove_sdev_ufs_device;
7385 ufshcd_blk_pm_runtime_init(hba->sdev_rpmb);
7386 scsi_device_put(hba->sdev_rpmb);
7388 sdev_boot = __scsi_add_device(hba->host, 0, 0,
7389 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
7390 if (IS_ERR(sdev_boot)) {
7391 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
7393 ufshcd_blk_pm_runtime_init(sdev_boot);
7394 scsi_device_put(sdev_boot);
7398 remove_sdev_ufs_device:
7399 scsi_remove_device(hba->sdev_ufs_device);
7404 static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
7406 struct ufs_dev_info *dev_info = &hba->dev_info;
7408 u32 d_lu_wb_buf_alloc;
7409 u32 ext_ufs_feature;
7411 if (!ufshcd_is_wb_allowed(hba))
7414 * Probe WB only for UFS-2.2 and UFS-3.1 (and later) devices or
7415 * UFS devices with quirk UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES
7418 if (!(dev_info->wspecversion >= 0x310 ||
7419 dev_info->wspecversion == 0x220 ||
7420 (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES)))
7423 if (hba->desc_size[QUERY_DESC_IDN_DEVICE] <
7424 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
7427 ext_ufs_feature = get_unaligned_be32(desc_buf +
7428 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
7430 if (!(ext_ufs_feature & UFS_DEV_WRITE_BOOSTER_SUP))
7434 * WB may be supported but not configured while provisioning. The spec
7435 * says, in dedicated wb buffer mode, a max of 1 lun would have wb
7436 * buffer configured.
7438 dev_info->wb_buffer_type = desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
7440 dev_info->b_presrv_uspc_en =
7441 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
7443 if (dev_info->wb_buffer_type == WB_BUF_MODE_SHARED) {
7444 if (!get_unaligned_be32(desc_buf +
7445 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS))
7448 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
7449 d_lu_wb_buf_alloc = 0;
7450 ufshcd_read_unit_desc_param(hba,
7452 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
7453 (u8 *)&d_lu_wb_buf_alloc,
7454 sizeof(d_lu_wb_buf_alloc));
7455 if (d_lu_wb_buf_alloc) {
7456 dev_info->wb_dedicated_lu = lun;
7461 if (!d_lu_wb_buf_alloc)
7467 hba->caps &= ~UFSHCD_CAP_WB_EN;
7470 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
7472 struct ufs_dev_fix *f;
7473 struct ufs_dev_info *dev_info = &hba->dev_info;
7478 for (f = fixups; f->quirk; f++) {
7479 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
7480 f->wmanufacturerid == UFS_ANY_VENDOR) &&
7481 ((dev_info->model &&
7482 STR_PRFX_EQUAL(f->model, dev_info->model)) ||
7483 !strcmp(f->model, UFS_ANY_MODEL)))
7484 hba->dev_quirks |= f->quirk;
7487 EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
7489 static void ufs_fixup_device_setup(struct ufs_hba *hba)
7491 /* fix by general quirk table */
7492 ufshcd_fixup_dev_quirks(hba, ufs_fixups);
7494 /* allow vendors to fix quirks */
7495 ufshcd_vops_fixup_dev_quirks(hba);
7498 static int ufs_get_device_desc(struct ufs_hba *hba)
7503 struct ufs_dev_info *dev_info = &hba->dev_info;
7505 desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
7511 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf,
7512 hba->desc_size[QUERY_DESC_IDN_DEVICE]);
7514 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
7520 * getting vendor (manufacturerID) and Bank Index in big endian
7523 dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
7524 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
7526 /* getting Specification Version in big endian format */
7527 dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
7528 desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
7530 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
7532 err = ufshcd_read_string_desc(hba, model_index,
7533 &dev_info->model, SD_ASCII_STD);
7535 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
7540 hba->luns_avail = desc_buf[DEVICE_DESC_PARAM_NUM_LU] +
7541 desc_buf[DEVICE_DESC_PARAM_NUM_WLU];
7543 ufs_fixup_device_setup(hba);
7545 ufshcd_wb_probe(hba, desc_buf);
7548 * ufshcd_read_string_desc returns size of the string
7549 * reset the error value
7558 static void ufs_put_device_desc(struct ufs_hba *hba)
7560 struct ufs_dev_info *dev_info = &hba->dev_info;
7562 kfree(dev_info->model);
7563 dev_info->model = NULL;
7567 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
7568 * @hba: per-adapter instance
7570 * PA_TActivate parameter can be tuned manually if UniPro version is less than
7571 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
7572 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
7573 * the hibern8 exit latency.
7575 * Returns zero on success, non-zero error value on failure.
7577 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
7580 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
7582 ret = ufshcd_dme_peer_get(hba,
7584 RX_MIN_ACTIVATETIME_CAPABILITY,
7585 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7586 &peer_rx_min_activatetime);
7590 /* make sure proper unit conversion is applied */
7591 tuned_pa_tactivate =
7592 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7593 / PA_TACTIVATE_TIME_UNIT_US);
7594 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7595 tuned_pa_tactivate);
7602 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7603 * @hba: per-adapter instance
7605 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7606 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7607 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7608 * This optimal value can help reduce the hibern8 exit latency.
7610 * Returns zero on success, non-zero error value on failure.
7612 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7615 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7616 u32 max_hibern8_time, tuned_pa_hibern8time;
7618 ret = ufshcd_dme_get(hba,
7619 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7620 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7621 &local_tx_hibern8_time_cap);
7625 ret = ufshcd_dme_peer_get(hba,
7626 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7627 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7628 &peer_rx_hibern8_time_cap);
7632 max_hibern8_time = max(local_tx_hibern8_time_cap,
7633 peer_rx_hibern8_time_cap);
7634 /* make sure proper unit conversion is applied */
7635 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7636 / PA_HIBERN8_TIME_UNIT_US);
7637 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7638 tuned_pa_hibern8time);
7644 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7645 * less than device PA_TACTIVATE time.
7646 * @hba: per-adapter instance
7648 * Some UFS devices require host PA_TACTIVATE to be lower than device
7649 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7652 * Returns zero on success, non-zero error value on failure.
7654 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7657 u32 granularity, peer_granularity;
7658 u32 pa_tactivate, peer_pa_tactivate;
7659 u32 pa_tactivate_us, peer_pa_tactivate_us;
7660 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7662 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7667 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7672 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7673 (granularity > PA_GRANULARITY_MAX_VAL)) {
7674 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7675 __func__, granularity);
7679 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7680 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7681 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7682 __func__, peer_granularity);
7686 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7690 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7691 &peer_pa_tactivate);
7695 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7696 peer_pa_tactivate_us = peer_pa_tactivate *
7697 gran_to_us_table[peer_granularity - 1];
7699 if (pa_tactivate_us > peer_pa_tactivate_us) {
7700 u32 new_peer_pa_tactivate;
7702 new_peer_pa_tactivate = pa_tactivate_us /
7703 gran_to_us_table[peer_granularity - 1];
7704 new_peer_pa_tactivate++;
7705 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7706 new_peer_pa_tactivate);
7713 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
7715 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7716 ufshcd_tune_pa_tactivate(hba);
7717 ufshcd_tune_pa_hibern8time(hba);
7720 ufshcd_vops_apply_dev_quirks(hba);
7722 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7723 /* set 1ms timeout for PA_TACTIVATE */
7724 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
7726 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7727 ufshcd_quirk_tune_host_pa_tactivate(hba);
7730 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7732 hba->ufs_stats.hibern8_exit_cnt = 0;
7733 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
7734 hba->req_abort_count = 0;
7737 static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7743 buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY];
7744 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7750 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0,
7751 desc_buf, buff_len);
7753 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7758 if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7759 hba->dev_info.max_lu_supported = 32;
7760 else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7761 hba->dev_info.max_lu_supported = 8;
7768 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7769 {19200000, REF_CLK_FREQ_19_2_MHZ},
7770 {26000000, REF_CLK_FREQ_26_MHZ},
7771 {38400000, REF_CLK_FREQ_38_4_MHZ},
7772 {52000000, REF_CLK_FREQ_52_MHZ},
7773 {0, REF_CLK_FREQ_INVAL},
7776 static enum ufs_ref_clk_freq
7777 ufs_get_bref_clk_from_hz(unsigned long freq)
7781 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7782 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7783 return ufs_ref_clk_freqs[i].val;
7785 return REF_CLK_FREQ_INVAL;
7788 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7792 freq = clk_get_rate(refclk);
7794 hba->dev_ref_clk_freq =
7795 ufs_get_bref_clk_from_hz(freq);
7797 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7799 "invalid ref_clk setting = %ld\n", freq);
7802 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7806 u32 freq = hba->dev_ref_clk_freq;
7808 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7809 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7812 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7817 if (ref_clk == freq)
7818 goto out; /* nothing to update */
7820 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7821 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7824 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7825 ufs_ref_clk_freqs[freq].freq_hz);
7829 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7830 ufs_ref_clk_freqs[freq].freq_hz);
7836 static int ufshcd_device_params_init(struct ufs_hba *hba)
7841 /* Init device descriptor sizes */
7842 for (i = 0; i < QUERY_DESC_IDN_MAX; i++)
7843 hba->desc_size[i] = QUERY_DESC_MAX_SIZE;
7845 /* Init UFS geometry descriptor related parameters */
7846 ret = ufshcd_device_geo_params_init(hba);
7850 /* Check and apply UFS device quirks */
7851 ret = ufs_get_device_desc(hba);
7853 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7858 ufshcd_get_ref_clk_gating_wait(hba);
7860 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7861 QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
7862 hba->dev_info.f_power_on_wp_en = flag;
7864 /* Probe maximum power mode co-supported by both UFS host and device */
7865 if (ufshcd_get_max_pwr_mode(hba))
7867 "%s: Failed getting max supported power mode\n",
7874 * ufshcd_add_lus - probe and add UFS logical units
7875 * @hba: per-adapter instance
7877 static int ufshcd_add_lus(struct ufs_hba *hba)
7881 /* Add required well known logical units to scsi mid layer */
7882 ret = ufshcd_scsi_add_wlus(hba);
7886 ufshcd_clear_ua_wluns(hba);
7888 /* Initialize devfreq after UFS device is detected */
7889 if (ufshcd_is_clkscaling_supported(hba)) {
7890 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7892 sizeof(struct ufs_pa_layer_attr));
7893 hba->clk_scaling.saved_pwr_info.is_valid = true;
7894 hba->clk_scaling.is_allowed = true;
7896 ret = ufshcd_devfreq_init(hba);
7900 hba->clk_scaling.is_enabled = true;
7901 ufshcd_init_clk_scaling_sysfs(hba);
7905 scsi_scan_host(hba->host);
7906 pm_runtime_put_sync(hba->dev);
7913 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp);
7915 static int ufshcd_clear_ua_wlun(struct ufs_hba *hba, u8 wlun)
7917 struct scsi_device *sdp;
7918 unsigned long flags;
7921 spin_lock_irqsave(hba->host->host_lock, flags);
7922 if (wlun == UFS_UPIU_UFS_DEVICE_WLUN)
7923 sdp = hba->sdev_ufs_device;
7924 else if (wlun == UFS_UPIU_RPMB_WLUN)
7925 sdp = hba->sdev_rpmb;
7929 ret = scsi_device_get(sdp);
7930 if (!ret && !scsi_device_online(sdp)) {
7932 scsi_device_put(sdp);
7937 spin_unlock_irqrestore(hba->host->host_lock, flags);
7941 ret = ufshcd_send_request_sense(hba, sdp);
7942 scsi_device_put(sdp);
7945 dev_err(hba->dev, "%s: UAC clear LU=%x ret = %d\n",
7946 __func__, wlun, ret);
7950 static int ufshcd_clear_ua_wluns(struct ufs_hba *hba)
7954 if (!hba->wlun_dev_clr_ua)
7957 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
7959 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
7961 hba->wlun_dev_clr_ua = false;
7964 dev_err(hba->dev, "%s: Failed to clear UAC WLUNS ret = %d\n",
7970 * ufshcd_probe_hba - probe hba to detect device and initialize
7971 * @hba: per-adapter instance
7972 * @async: asynchronous execution or not
7974 * Execute link-startup and verify device initialization
7976 static int ufshcd_probe_hba(struct ufs_hba *hba, bool async)
7979 unsigned long flags;
7980 ktime_t start = ktime_get();
7982 hba->ufshcd_state = UFSHCD_STATE_RESET;
7984 ret = ufshcd_link_startup(hba);
7988 /* Debug counters initialization */
7989 ufshcd_clear_dbg_ufs_stats(hba);
7991 /* UniPro link is active now */
7992 ufshcd_set_link_active(hba);
7994 /* Verify device initialization by sending NOP OUT UPIU */
7995 ret = ufshcd_verify_dev_init(hba);
7999 /* Initiate UFS initialization, and waiting until completion */
8000 ret = ufshcd_complete_dev_init(hba);
8005 * Initialize UFS device parameters used by driver, these
8006 * parameters are associated with UFS descriptors.
8009 ret = ufshcd_device_params_init(hba);
8014 ufshcd_tune_unipro_params(hba);
8016 /* UFS device is also active now */
8017 ufshcd_set_ufs_dev_active(hba);
8018 ufshcd_force_reset_auto_bkops(hba);
8019 hba->wlun_dev_clr_ua = true;
8020 hba->wlun_rpmb_clr_ua = true;
8022 /* Gear up to HS gear if supported */
8023 if (hba->max_pwr_info.is_valid) {
8025 * Set the right value to bRefClkFreq before attempting to
8026 * switch to HS gears.
8028 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
8029 ufshcd_set_dev_ref_clk(hba);
8030 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
8032 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
8036 ufshcd_print_pwr_info(hba);
8040 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
8041 * and for removable UFS card as well, hence always set the parameter.
8042 * Note: Error handler may issue the device reset hence resetting
8043 * bActiveICCLevel as well so it is always safe to set this here.
8045 ufshcd_set_active_icc_lvl(hba);
8047 ufshcd_wb_config(hba);
8048 if (hba->ee_usr_mask)
8049 ufshcd_write_ee_control(hba);
8050 /* Enable Auto-Hibernate if configured */
8051 ufshcd_auto_hibern8_enable(hba);
8054 spin_lock_irqsave(hba->host->host_lock, flags);
8056 hba->ufshcd_state = UFSHCD_STATE_ERROR;
8057 else if (hba->ufshcd_state == UFSHCD_STATE_RESET)
8058 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
8059 spin_unlock_irqrestore(hba->host->host_lock, flags);
8061 trace_ufshcd_init(dev_name(hba->dev), ret,
8062 ktime_to_us(ktime_sub(ktime_get(), start)),
8063 hba->curr_dev_pwr_mode, hba->uic_link_state);
8068 * ufshcd_async_scan - asynchronous execution for probing hba
8069 * @data: data pointer to pass to this function
8070 * @cookie: cookie data
8072 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
8074 struct ufs_hba *hba = (struct ufs_hba *)data;
8077 down(&hba->host_sem);
8078 /* Initialize hba, detect and initialize UFS device */
8079 ret = ufshcd_probe_hba(hba, true);
8084 /* Probe and add UFS logical units */
8085 ret = ufshcd_add_lus(hba);
8088 * If we failed to initialize the device or the device is not
8089 * present, turn off the power/clocks etc.
8092 pm_runtime_put_sync(hba->dev);
8093 ufshcd_hba_exit(hba);
8097 static const struct attribute_group *ufshcd_driver_groups[] = {
8098 &ufs_sysfs_unit_descriptor_group,
8099 &ufs_sysfs_lun_attributes_group,
8103 static struct ufs_hba_variant_params ufs_hba_vps = {
8104 .hba_enable_delay_us = 1000,
8105 .wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(40),
8106 .devfreq_profile.polling_ms = 100,
8107 .devfreq_profile.target = ufshcd_devfreq_target,
8108 .devfreq_profile.get_dev_status = ufshcd_devfreq_get_dev_status,
8109 .ondemand_data.upthreshold = 70,
8110 .ondemand_data.downdifferential = 5,
8113 static struct scsi_host_template ufshcd_driver_template = {
8114 .module = THIS_MODULE,
8116 .proc_name = UFSHCD,
8117 .queuecommand = ufshcd_queuecommand,
8118 .slave_alloc = ufshcd_slave_alloc,
8119 .slave_configure = ufshcd_slave_configure,
8120 .slave_destroy = ufshcd_slave_destroy,
8121 .change_queue_depth = ufshcd_change_queue_depth,
8122 .eh_abort_handler = ufshcd_abort,
8123 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
8124 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
8126 .sg_tablesize = SG_ALL,
8127 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
8128 .can_queue = UFSHCD_CAN_QUEUE,
8129 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
8130 .max_host_blocked = 1,
8131 .track_queue_depth = 1,
8132 .sdev_groups = ufshcd_driver_groups,
8133 .dma_boundary = PAGE_SIZE - 1,
8134 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
8137 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
8146 * "set_load" operation shall be required on those regulators
8147 * which specifically configured current limitation. Otherwise
8148 * zero max_uA may cause unexpected behavior when regulator is
8149 * enabled or set as high power mode.
8154 ret = regulator_set_load(vreg->reg, ua);
8156 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
8157 __func__, vreg->name, ua, ret);
8163 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
8164 struct ufs_vreg *vreg)
8166 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
8169 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
8170 struct ufs_vreg *vreg)
8175 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
8178 static int ufshcd_config_vreg(struct device *dev,
8179 struct ufs_vreg *vreg, bool on)
8182 struct regulator *reg;
8184 int min_uV, uA_load;
8191 if (regulator_count_voltages(reg) > 0) {
8192 uA_load = on ? vreg->max_uA : 0;
8193 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
8197 if (vreg->min_uV && vreg->max_uV) {
8198 min_uV = on ? vreg->min_uV : 0;
8199 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
8202 "%s: %s set voltage failed, err=%d\n",
8203 __func__, name, ret);
8210 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
8214 if (!vreg || vreg->enabled)
8217 ret = ufshcd_config_vreg(dev, vreg, true);
8219 ret = regulator_enable(vreg->reg);
8222 vreg->enabled = true;
8224 dev_err(dev, "%s: %s enable failed, err=%d\n",
8225 __func__, vreg->name, ret);
8230 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
8234 if (!vreg || !vreg->enabled || vreg->always_on)
8237 ret = regulator_disable(vreg->reg);
8240 /* ignore errors on applying disable config */
8241 ufshcd_config_vreg(dev, vreg, false);
8242 vreg->enabled = false;
8244 dev_err(dev, "%s: %s disable failed, err=%d\n",
8245 __func__, vreg->name, ret);
8251 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
8254 struct device *dev = hba->dev;
8255 struct ufs_vreg_info *info = &hba->vreg_info;
8257 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
8261 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
8265 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
8269 ufshcd_toggle_vreg(dev, info->vccq2, false);
8270 ufshcd_toggle_vreg(dev, info->vccq, false);
8271 ufshcd_toggle_vreg(dev, info->vcc, false);
8276 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
8278 struct ufs_vreg_info *info = &hba->vreg_info;
8280 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
8283 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
8290 vreg->reg = devm_regulator_get(dev, vreg->name);
8291 if (IS_ERR(vreg->reg)) {
8292 ret = PTR_ERR(vreg->reg);
8293 dev_err(dev, "%s: %s get failed, err=%d\n",
8294 __func__, vreg->name, ret);
8300 static int ufshcd_init_vreg(struct ufs_hba *hba)
8303 struct device *dev = hba->dev;
8304 struct ufs_vreg_info *info = &hba->vreg_info;
8306 ret = ufshcd_get_vreg(dev, info->vcc);
8310 ret = ufshcd_get_vreg(dev, info->vccq);
8312 ret = ufshcd_get_vreg(dev, info->vccq2);
8317 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
8319 struct ufs_vreg_info *info = &hba->vreg_info;
8322 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
8327 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
8330 struct ufs_clk_info *clki;
8331 struct list_head *head = &hba->clk_list_head;
8332 unsigned long flags;
8333 ktime_t start = ktime_get();
8334 bool clk_state_changed = false;
8336 if (list_empty(head))
8339 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
8343 list_for_each_entry(clki, head, list) {
8344 if (!IS_ERR_OR_NULL(clki->clk)) {
8346 * Don't disable clocks which are needed
8347 * to keep the link active.
8349 if (ufshcd_is_link_active(hba) &&
8350 clki->keep_link_active)
8353 clk_state_changed = on ^ clki->enabled;
8354 if (on && !clki->enabled) {
8355 ret = clk_prepare_enable(clki->clk);
8357 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
8358 __func__, clki->name, ret);
8361 } else if (!on && clki->enabled) {
8362 clk_disable_unprepare(clki->clk);
8365 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
8366 clki->name, on ? "en" : "dis");
8370 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
8376 list_for_each_entry(clki, head, list) {
8377 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
8378 clk_disable_unprepare(clki->clk);
8380 } else if (!ret && on) {
8381 spin_lock_irqsave(hba->host->host_lock, flags);
8382 hba->clk_gating.state = CLKS_ON;
8383 trace_ufshcd_clk_gating(dev_name(hba->dev),
8384 hba->clk_gating.state);
8385 spin_unlock_irqrestore(hba->host->host_lock, flags);
8388 if (clk_state_changed)
8389 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
8390 (on ? "on" : "off"),
8391 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
8395 static int ufshcd_init_clocks(struct ufs_hba *hba)
8398 struct ufs_clk_info *clki;
8399 struct device *dev = hba->dev;
8400 struct list_head *head = &hba->clk_list_head;
8402 if (list_empty(head))
8405 list_for_each_entry(clki, head, list) {
8409 clki->clk = devm_clk_get(dev, clki->name);
8410 if (IS_ERR(clki->clk)) {
8411 ret = PTR_ERR(clki->clk);
8412 dev_err(dev, "%s: %s clk get failed, %d\n",
8413 __func__, clki->name, ret);
8418 * Parse device ref clk freq as per device tree "ref_clk".
8419 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
8420 * in ufshcd_alloc_host().
8422 if (!strcmp(clki->name, "ref_clk"))
8423 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
8425 if (clki->max_freq) {
8426 ret = clk_set_rate(clki->clk, clki->max_freq);
8428 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
8429 __func__, clki->name,
8430 clki->max_freq, ret);
8433 clki->curr_freq = clki->max_freq;
8435 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
8436 clki->name, clk_get_rate(clki->clk));
8442 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
8449 err = ufshcd_vops_init(hba);
8451 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
8452 __func__, ufshcd_get_var_name(hba), err);
8457 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
8462 ufshcd_vops_exit(hba);
8465 static int ufshcd_hba_init(struct ufs_hba *hba)
8470 * Handle host controller power separately from the UFS device power
8471 * rails as it will help controlling the UFS host controller power
8472 * collapse easily which is different than UFS device power collapse.
8473 * Also, enable the host controller power before we go ahead with rest
8474 * of the initialization here.
8476 err = ufshcd_init_hba_vreg(hba);
8480 err = ufshcd_setup_hba_vreg(hba, true);
8484 err = ufshcd_init_clocks(hba);
8486 goto out_disable_hba_vreg;
8488 err = ufshcd_setup_clocks(hba, true);
8490 goto out_disable_hba_vreg;
8492 err = ufshcd_init_vreg(hba);
8494 goto out_disable_clks;
8496 err = ufshcd_setup_vreg(hba, true);
8498 goto out_disable_clks;
8500 err = ufshcd_variant_hba_init(hba);
8502 goto out_disable_vreg;
8504 ufs_debugfs_hba_init(hba);
8506 hba->is_powered = true;
8510 ufshcd_setup_vreg(hba, false);
8512 ufshcd_setup_clocks(hba, false);
8513 out_disable_hba_vreg:
8514 ufshcd_setup_hba_vreg(hba, false);
8519 static void ufshcd_hba_exit(struct ufs_hba *hba)
8521 if (hba->is_powered) {
8522 ufshcd_exit_clk_scaling(hba);
8523 ufshcd_exit_clk_gating(hba);
8525 destroy_workqueue(hba->eh_wq);
8526 ufs_debugfs_hba_exit(hba);
8527 ufshcd_variant_hba_exit(hba);
8528 ufshcd_setup_vreg(hba, false);
8529 ufshcd_setup_clocks(hba, false);
8530 ufshcd_setup_hba_vreg(hba, false);
8531 hba->is_powered = false;
8532 ufs_put_device_desc(hba);
8537 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
8539 unsigned char cmd[6] = {REQUEST_SENSE,
8548 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
8554 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
8555 UFS_SENSE_SIZE, NULL, NULL,
8556 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
8558 pr_err("%s: failed with err %d\n", __func__, ret);
8566 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
8568 * @hba: per adapter instance
8569 * @pwr_mode: device power mode to set
8571 * Returns 0 if requested power mode is set successfully
8572 * Returns non-zero if failed to set the requested power mode
8574 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
8575 enum ufs_dev_pwr_mode pwr_mode)
8577 unsigned char cmd[6] = { START_STOP };
8578 struct scsi_sense_hdr sshdr;
8579 struct scsi_device *sdp;
8580 unsigned long flags;
8583 spin_lock_irqsave(hba->host->host_lock, flags);
8584 sdp = hba->sdev_ufs_device;
8586 ret = scsi_device_get(sdp);
8587 if (!ret && !scsi_device_online(sdp)) {
8589 scsi_device_put(sdp);
8594 spin_unlock_irqrestore(hba->host->host_lock, flags);
8600 * If scsi commands fail, the scsi mid-layer schedules scsi error-
8601 * handling, which would wait for host to be resumed. Since we know
8602 * we are functional while we are here, skip host resume in error
8605 hba->host->eh_noresume = 1;
8606 if (hba->wlun_dev_clr_ua)
8607 ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
8609 cmd[4] = pwr_mode << 4;
8612 * Current function would be generally called from the power management
8613 * callbacks hence set the RQF_PM flag so that it doesn't resume the
8614 * already suspended childs.
8616 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8617 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
8619 sdev_printk(KERN_WARNING, sdp,
8620 "START_STOP failed for power mode: %d, result %x\n",
8622 if (ret > 0 && scsi_sense_valid(&sshdr))
8623 scsi_print_sense_hdr(sdp, NULL, &sshdr);
8627 hba->curr_dev_pwr_mode = pwr_mode;
8629 scsi_device_put(sdp);
8630 hba->host->eh_noresume = 0;
8634 static int ufshcd_link_state_transition(struct ufs_hba *hba,
8635 enum uic_link_state req_link_state,
8636 int check_for_bkops)
8640 if (req_link_state == hba->uic_link_state)
8643 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8644 ret = ufshcd_uic_hibern8_enter(hba);
8646 ufshcd_set_link_hibern8(hba);
8648 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8654 * If autobkops is enabled, link can't be turned off because
8655 * turning off the link would also turn off the device, except in the
8656 * case of DeepSleep where the device is expected to remain powered.
8658 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
8659 (!check_for_bkops || !hba->auto_bkops_enabled)) {
8661 * Let's make sure that link is in low power mode, we are doing
8662 * this currently by putting the link in Hibern8. Otherway to
8663 * put the link in low power mode is to send the DME end point
8664 * to device and then send the DME reset command to local
8665 * unipro. But putting the link in hibern8 is much faster.
8667 * Note also that putting the link in Hibern8 is a requirement
8668 * for entering DeepSleep.
8670 ret = ufshcd_uic_hibern8_enter(hba);
8672 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8677 * Change controller state to "reset state" which
8678 * should also put the link in off/reset state
8680 ufshcd_hba_stop(hba);
8682 * TODO: Check if we need any delay to make sure that
8683 * controller is reset
8685 ufshcd_set_link_off(hba);
8692 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8694 bool vcc_off = false;
8697 * It seems some UFS devices may keep drawing more than sleep current
8698 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8699 * To avoid this situation, add 2ms delay before putting these UFS
8700 * rails in LPM mode.
8702 if (!ufshcd_is_link_active(hba) &&
8703 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8704 usleep_range(2000, 2100);
8707 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8710 * If UFS device and link is in OFF state, all power supplies (VCC,
8711 * VCCQ, VCCQ2) can be turned off if power on write protect is not
8712 * required. If UFS link is inactive (Hibern8 or OFF state) and device
8713 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8715 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8716 * in low power state which would save some power.
8718 * If Write Booster is enabled and the device needs to flush the WB
8719 * buffer OR if bkops status is urgent for WB, keep Vcc on.
8721 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8722 !hba->dev_info.is_lu_power_on_wp) {
8723 ufshcd_setup_vreg(hba, false);
8725 } else if (!ufshcd_is_ufs_dev_active(hba)) {
8726 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8728 if (ufshcd_is_link_hibern8(hba) || ufshcd_is_link_off(hba)) {
8729 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8730 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8735 * Some UFS devices require delay after VCC power rail is turned-off.
8737 if (vcc_off && hba->vreg_info.vcc &&
8738 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)
8739 usleep_range(5000, 5100);
8742 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8746 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8747 !hba->dev_info.is_lu_power_on_wp) {
8748 ret = ufshcd_setup_vreg(hba, true);
8749 } else if (!ufshcd_is_ufs_dev_active(hba)) {
8750 if (!ufshcd_is_link_active(hba)) {
8751 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8754 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8758 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
8763 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8765 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8770 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8772 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
8773 ufshcd_setup_hba_vreg(hba, false);
8776 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8778 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
8779 ufshcd_setup_hba_vreg(hba, true);
8782 static int __ufshcd_wl_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8785 int check_for_bkops;
8786 enum ufs_pm_level pm_lvl;
8787 enum ufs_dev_pwr_mode req_dev_pwr_mode;
8788 enum uic_link_state req_link_state;
8790 hba->pm_op_in_progress = true;
8791 if (pm_op != UFS_SHUTDOWN_PM) {
8792 pm_lvl = pm_op == UFS_RUNTIME_PM ?
8793 hba->rpm_lvl : hba->spm_lvl;
8794 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8795 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8797 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8798 req_link_state = UIC_LINK_OFF_STATE;
8802 * If we can't transition into any of the low power modes
8803 * just gate the clocks.
8805 ufshcd_hold(hba, false);
8806 hba->clk_gating.is_suspended = true;
8808 if (ufshcd_is_clkscaling_supported(hba))
8809 ufshcd_clk_scaling_suspend(hba, true);
8811 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8812 req_link_state == UIC_LINK_ACTIVE_STATE) {
8816 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8817 (req_link_state == hba->uic_link_state))
8818 goto enable_scaling;
8820 /* UFS device & link must be active before we enter in this function */
8821 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8823 goto enable_scaling;
8826 if (pm_op == UFS_RUNTIME_PM) {
8827 if (ufshcd_can_autobkops_during_suspend(hba)) {
8829 * The device is idle with no requests in the queue,
8830 * allow background operations if bkops status shows
8831 * that performance might be impacted.
8833 ret = ufshcd_urgent_bkops(hba);
8835 goto enable_scaling;
8837 /* make sure that auto bkops is disabled */
8838 ufshcd_disable_auto_bkops(hba);
8841 * If device needs to do BKOP or WB buffer flush during
8842 * Hibern8, keep device power mode as "active power mode"
8845 hba->dev_info.b_rpm_dev_flush_capable =
8846 hba->auto_bkops_enabled ||
8847 (((req_link_state == UIC_LINK_HIBERN8_STATE) ||
8848 ((req_link_state == UIC_LINK_ACTIVE_STATE) &&
8849 ufshcd_is_auto_hibern8_enabled(hba))) &&
8850 ufshcd_wb_need_flush(hba));
8853 flush_work(&hba->eeh_work);
8855 if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
8856 if (pm_op != UFS_RUNTIME_PM)
8857 /* ensure that bkops is disabled */
8858 ufshcd_disable_auto_bkops(hba);
8860 if (!hba->dev_info.b_rpm_dev_flush_capable) {
8861 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8863 goto enable_scaling;
8868 * In the case of DeepSleep, the device is expected to remain powered
8869 * with the link off, so do not check for bkops.
8871 check_for_bkops = !ufshcd_is_ufs_dev_deepsleep(hba);
8872 ret = ufshcd_link_state_transition(hba, req_link_state, check_for_bkops);
8874 goto set_dev_active;
8878 * Call vendor specific suspend callback. As these callbacks may access
8879 * vendor specific host controller register space call them before the
8880 * host clocks are ON.
8882 ret = ufshcd_vops_suspend(hba, pm_op);
8884 goto set_link_active;
8889 * Device hardware reset is required to exit DeepSleep. Also, for
8890 * DeepSleep, the link is off so host reset and restore will be done
8893 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
8894 ufshcd_device_reset(hba);
8895 WARN_ON(!ufshcd_is_link_off(hba));
8897 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
8898 ufshcd_set_link_active(hba);
8899 else if (ufshcd_is_link_off(hba))
8900 ufshcd_host_reset_and_restore(hba);
8902 /* Can also get here needing to exit DeepSleep */
8903 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
8904 ufshcd_device_reset(hba);
8905 ufshcd_host_reset_and_restore(hba);
8907 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8908 ufshcd_disable_auto_bkops(hba);
8910 if (ufshcd_is_clkscaling_supported(hba))
8911 ufshcd_clk_scaling_suspend(hba, false);
8913 hba->dev_info.b_rpm_dev_flush_capable = false;
8915 if (hba->dev_info.b_rpm_dev_flush_capable) {
8916 schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
8917 msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
8921 ufshcd_update_evt_hist(hba, UFS_EVT_WL_SUSP_ERR, (u32)ret);
8922 hba->clk_gating.is_suspended = false;
8923 ufshcd_release(hba);
8925 hba->pm_op_in_progress = false;
8929 static int __ufshcd_wl_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8932 enum uic_link_state old_link_state = hba->uic_link_state;
8934 hba->pm_op_in_progress = true;
8937 * Call vendor specific resume callback. As these callbacks may access
8938 * vendor specific host controller register space call them when the
8939 * host clocks are ON.
8941 ret = ufshcd_vops_resume(hba, pm_op);
8945 /* For DeepSleep, the only supported option is to have the link off */
8946 WARN_ON(ufshcd_is_ufs_dev_deepsleep(hba) && !ufshcd_is_link_off(hba));
8948 if (ufshcd_is_link_hibern8(hba)) {
8949 ret = ufshcd_uic_hibern8_exit(hba);
8951 ufshcd_set_link_active(hba);
8953 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
8955 goto vendor_suspend;
8957 } else if (ufshcd_is_link_off(hba)) {
8959 * A full initialization of the host and the device is
8960 * required since the link was put to off during suspend.
8961 * Note, in the case of DeepSleep, the device will exit
8962 * DeepSleep due to device reset.
8964 ret = ufshcd_reset_and_restore(hba);
8966 * ufshcd_reset_and_restore() should have already
8967 * set the link state as active
8969 if (ret || !ufshcd_is_link_active(hba))
8970 goto vendor_suspend;
8973 if (!ufshcd_is_ufs_dev_active(hba)) {
8974 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8976 goto set_old_link_state;
8979 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8980 ufshcd_enable_auto_bkops(hba);
8983 * If BKOPs operations are urgently needed at this moment then
8984 * keep auto-bkops enabled or else disable it.
8986 ufshcd_urgent_bkops(hba);
8988 if (hba->ee_usr_mask)
8989 ufshcd_write_ee_control(hba);
8991 if (ufshcd_is_clkscaling_supported(hba))
8992 ufshcd_clk_scaling_suspend(hba, false);
8994 if (hba->dev_info.b_rpm_dev_flush_capable) {
8995 hba->dev_info.b_rpm_dev_flush_capable = false;
8996 cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
8999 /* Enable Auto-Hibernate if configured */
9000 ufshcd_auto_hibern8_enable(hba);
9004 ufshcd_link_state_transition(hba, old_link_state, 0);
9006 ufshcd_vops_suspend(hba, pm_op);
9009 ufshcd_update_evt_hist(hba, UFS_EVT_WL_RES_ERR, (u32)ret);
9010 hba->clk_gating.is_suspended = false;
9011 ufshcd_release(hba);
9012 hba->pm_op_in_progress = false;
9016 static int ufshcd_wl_runtime_suspend(struct device *dev)
9018 struct scsi_device *sdev = to_scsi_device(dev);
9019 struct ufs_hba *hba;
9021 ktime_t start = ktime_get();
9023 hba = shost_priv(sdev->host);
9025 ret = __ufshcd_wl_suspend(hba, UFS_RUNTIME_PM);
9027 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9029 trace_ufshcd_wl_runtime_suspend(dev_name(dev), ret,
9030 ktime_to_us(ktime_sub(ktime_get(), start)),
9031 hba->curr_dev_pwr_mode, hba->uic_link_state);
9036 static int ufshcd_wl_runtime_resume(struct device *dev)
9038 struct scsi_device *sdev = to_scsi_device(dev);
9039 struct ufs_hba *hba;
9041 ktime_t start = ktime_get();
9043 hba = shost_priv(sdev->host);
9045 ret = __ufshcd_wl_resume(hba, UFS_RUNTIME_PM);
9047 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9049 trace_ufshcd_wl_runtime_resume(dev_name(dev), ret,
9050 ktime_to_us(ktime_sub(ktime_get(), start)),
9051 hba->curr_dev_pwr_mode, hba->uic_link_state);
9056 #ifdef CONFIG_PM_SLEEP
9057 static int ufshcd_wl_suspend(struct device *dev)
9059 struct scsi_device *sdev = to_scsi_device(dev);
9060 struct ufs_hba *hba;
9062 ktime_t start = ktime_get();
9064 hba = shost_priv(sdev->host);
9065 down(&hba->host_sem);
9067 if (pm_runtime_suspended(dev))
9070 ret = __ufshcd_wl_suspend(hba, UFS_SYSTEM_PM);
9072 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9078 hba->is_sys_suspended = true;
9079 trace_ufshcd_wl_suspend(dev_name(dev), ret,
9080 ktime_to_us(ktime_sub(ktime_get(), start)),
9081 hba->curr_dev_pwr_mode, hba->uic_link_state);
9086 static int ufshcd_wl_resume(struct device *dev)
9088 struct scsi_device *sdev = to_scsi_device(dev);
9089 struct ufs_hba *hba;
9091 ktime_t start = ktime_get();
9093 hba = shost_priv(sdev->host);
9095 if (pm_runtime_suspended(dev))
9098 ret = __ufshcd_wl_resume(hba, UFS_SYSTEM_PM);
9100 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9102 trace_ufshcd_wl_resume(dev_name(dev), ret,
9103 ktime_to_us(ktime_sub(ktime_get(), start)),
9104 hba->curr_dev_pwr_mode, hba->uic_link_state);
9106 hba->is_sys_suspended = false;
9112 static void ufshcd_wl_shutdown(struct device *dev)
9114 struct scsi_device *sdev = to_scsi_device(dev);
9115 struct ufs_hba *hba;
9117 hba = shost_priv(sdev->host);
9119 down(&hba->host_sem);
9120 hba->shutting_down = true;
9123 /* Turn on everything while shutting down */
9124 ufshcd_rpm_get_sync(hba);
9125 scsi_device_quiesce(sdev);
9126 shost_for_each_device(sdev, hba->host) {
9127 if (sdev == hba->sdev_ufs_device)
9129 scsi_device_quiesce(sdev);
9131 __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9135 * ufshcd_suspend - helper function for suspend operations
9136 * @hba: per adapter instance
9138 * This function will put disable irqs, turn off clocks
9139 * and set vreg and hba-vreg in lpm mode.
9141 static int ufshcd_suspend(struct ufs_hba *hba)
9145 if (!hba->is_powered)
9148 * Disable the host irq as host controller as there won't be any
9149 * host controller transaction expected till resume.
9151 ufshcd_disable_irq(hba);
9152 ret = ufshcd_setup_clocks(hba, false);
9154 ufshcd_enable_irq(hba);
9157 if (ufshcd_is_clkgating_allowed(hba)) {
9158 hba->clk_gating.state = CLKS_OFF;
9159 trace_ufshcd_clk_gating(dev_name(hba->dev),
9160 hba->clk_gating.state);
9163 ufshcd_vreg_set_lpm(hba);
9164 /* Put the host controller in low power mode if possible */
9165 ufshcd_hba_vreg_set_lpm(hba);
9170 * ufshcd_resume - helper function for resume operations
9171 * @hba: per adapter instance
9173 * This function basically turns on the regulators, clocks and
9176 * Returns 0 for success and non-zero for failure
9178 static int ufshcd_resume(struct ufs_hba *hba)
9182 if (!hba->is_powered)
9185 ufshcd_hba_vreg_set_hpm(hba);
9186 ret = ufshcd_vreg_set_hpm(hba);
9190 /* Make sure clocks are enabled before accessing controller */
9191 ret = ufshcd_setup_clocks(hba, true);
9195 /* enable the host irq as host controller would be active soon */
9196 ufshcd_enable_irq(hba);
9200 ufshcd_vreg_set_lpm(hba);
9203 ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)ret);
9208 * ufshcd_system_suspend - system suspend routine
9209 * @hba: per adapter instance
9211 * Check the description of ufshcd_suspend() function for more details.
9213 * Returns 0 for success and non-zero for failure
9215 int ufshcd_system_suspend(struct ufs_hba *hba)
9218 ktime_t start = ktime_get();
9220 if (pm_runtime_suspended(hba->dev))
9223 ret = ufshcd_suspend(hba);
9225 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
9226 ktime_to_us(ktime_sub(ktime_get(), start)),
9227 hba->curr_dev_pwr_mode, hba->uic_link_state);
9230 EXPORT_SYMBOL(ufshcd_system_suspend);
9233 * ufshcd_system_resume - system resume routine
9234 * @hba: per adapter instance
9236 * Returns 0 for success and non-zero for failure
9239 int ufshcd_system_resume(struct ufs_hba *hba)
9242 ktime_t start = ktime_get();
9244 if (pm_runtime_suspended(hba->dev))
9247 ret = ufshcd_resume(hba);
9250 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
9251 ktime_to_us(ktime_sub(ktime_get(), start)),
9252 hba->curr_dev_pwr_mode, hba->uic_link_state);
9256 EXPORT_SYMBOL(ufshcd_system_resume);
9259 * ufshcd_runtime_suspend - runtime suspend routine
9260 * @hba: per adapter instance
9262 * Check the description of ufshcd_suspend() function for more details.
9264 * Returns 0 for success and non-zero for failure
9266 int ufshcd_runtime_suspend(struct ufs_hba *hba)
9269 ktime_t start = ktime_get();
9271 ret = ufshcd_suspend(hba);
9273 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
9274 ktime_to_us(ktime_sub(ktime_get(), start)),
9275 hba->curr_dev_pwr_mode, hba->uic_link_state);
9278 EXPORT_SYMBOL(ufshcd_runtime_suspend);
9281 * ufshcd_runtime_resume - runtime resume routine
9282 * @hba: per adapter instance
9284 * This function basically brings controller
9285 * to active state. Following operations are done in this function:
9287 * 1. Turn on all the controller related clocks
9288 * 2. Turn ON VCC rail
9290 int ufshcd_runtime_resume(struct ufs_hba *hba)
9293 ktime_t start = ktime_get();
9295 ret = ufshcd_resume(hba);
9297 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
9298 ktime_to_us(ktime_sub(ktime_get(), start)),
9299 hba->curr_dev_pwr_mode, hba->uic_link_state);
9302 EXPORT_SYMBOL(ufshcd_runtime_resume);
9304 int ufshcd_runtime_idle(struct ufs_hba *hba)
9308 EXPORT_SYMBOL(ufshcd_runtime_idle);
9311 * ufshcd_shutdown - shutdown routine
9312 * @hba: per adapter instance
9314 * This function would turn off both UFS device and UFS hba
9315 * regulators. It would also disable clocks.
9317 * Returns 0 always to allow force shutdown even in case of errors.
9319 int ufshcd_shutdown(struct ufs_hba *hba)
9321 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
9324 pm_runtime_get_sync(hba->dev);
9326 ufshcd_suspend(hba);
9328 hba->is_powered = false;
9329 /* allow force shutdown even in case of errors */
9332 EXPORT_SYMBOL(ufshcd_shutdown);
9335 * ufshcd_remove - de-allocate SCSI host and host memory space
9336 * data structure memory
9337 * @hba: per adapter instance
9339 void ufshcd_remove(struct ufs_hba *hba)
9341 if (hba->sdev_ufs_device)
9342 ufshcd_rpm_get_sync(hba);
9343 ufs_bsg_remove(hba);
9344 ufs_sysfs_remove_nodes(hba->dev);
9345 blk_cleanup_queue(hba->tmf_queue);
9346 blk_mq_free_tag_set(&hba->tmf_tag_set);
9347 blk_cleanup_queue(hba->cmd_queue);
9348 scsi_remove_host(hba->host);
9349 /* disable interrupts */
9350 ufshcd_disable_intr(hba, hba->intr_mask);
9351 ufshcd_hba_stop(hba);
9352 ufshcd_hba_exit(hba);
9354 EXPORT_SYMBOL_GPL(ufshcd_remove);
9357 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
9358 * @hba: pointer to Host Bus Adapter (HBA)
9360 void ufshcd_dealloc_host(struct ufs_hba *hba)
9362 scsi_host_put(hba->host);
9364 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
9367 * ufshcd_set_dma_mask - Set dma mask based on the controller
9368 * addressing capability
9369 * @hba: per adapter instance
9371 * Returns 0 for success, non-zero for failure
9373 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
9375 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
9376 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
9379 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
9383 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
9384 * @dev: pointer to device handle
9385 * @hba_handle: driver private handle
9386 * Returns 0 on success, non-zero value on failure
9388 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
9390 struct Scsi_Host *host;
9391 struct ufs_hba *hba;
9396 "Invalid memory reference for dev is NULL\n");
9401 host = scsi_host_alloc(&ufshcd_driver_template,
9402 sizeof(struct ufs_hba));
9404 dev_err(dev, "scsi_host_alloc failed\n");
9408 hba = shost_priv(host);
9412 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
9414 INIT_LIST_HEAD(&hba->clk_list_head);
9419 EXPORT_SYMBOL(ufshcd_alloc_host);
9421 /* This function exists because blk_mq_alloc_tag_set() requires this. */
9422 static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
9423 const struct blk_mq_queue_data *qd)
9426 return BLK_STS_NOTSUPP;
9429 static const struct blk_mq_ops ufshcd_tmf_ops = {
9430 .queue_rq = ufshcd_queue_tmf,
9434 * ufshcd_init - Driver initialization routine
9435 * @hba: per-adapter instance
9436 * @mmio_base: base register address
9437 * @irq: Interrupt line of device
9438 * Returns 0 on success, non-zero value on failure
9440 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9443 struct Scsi_Host *host = hba->host;
9444 struct device *dev = hba->dev;
9445 char eh_wq_name[sizeof("ufs_eh_wq_00")];
9449 "Invalid memory reference for mmio_base is NULL\n");
9454 hba->mmio_base = mmio_base;
9456 hba->vps = &ufs_hba_vps;
9458 err = ufshcd_hba_init(hba);
9462 /* Read capabilities registers */
9463 err = ufshcd_hba_capabilities(hba);
9467 /* Get UFS version supported by the controller */
9468 hba->ufs_version = ufshcd_get_ufs_version(hba);
9470 /* Get Interrupt bit mask per version */
9471 hba->intr_mask = ufshcd_get_intr_mask(hba);
9473 err = ufshcd_set_dma_mask(hba);
9475 dev_err(hba->dev, "set dma mask failed\n");
9479 /* Allocate memory for host memory space */
9480 err = ufshcd_memory_alloc(hba);
9482 dev_err(hba->dev, "Memory allocation failed\n");
9487 ufshcd_host_memory_configure(hba);
9489 host->can_queue = hba->nutrs;
9490 host->cmd_per_lun = hba->nutrs;
9491 host->max_id = UFSHCD_MAX_ID;
9492 host->max_lun = UFS_MAX_LUNS;
9493 host->max_channel = UFSHCD_MAX_CHANNEL;
9494 host->unique_id = host->host_no;
9495 host->max_cmd_len = UFS_CDB_SIZE;
9497 hba->max_pwr_info.is_valid = false;
9499 /* Initialize work queues */
9500 snprintf(eh_wq_name, sizeof(eh_wq_name), "ufs_eh_wq_%d",
9501 hba->host->host_no);
9502 hba->eh_wq = create_singlethread_workqueue(eh_wq_name);
9504 dev_err(hba->dev, "%s: failed to create eh workqueue\n",
9509 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
9510 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
9512 sema_init(&hba->host_sem, 1);
9514 /* Initialize UIC command mutex */
9515 mutex_init(&hba->uic_cmd_mutex);
9517 /* Initialize mutex for device management commands */
9518 mutex_init(&hba->dev_cmd.lock);
9520 /* Initialize mutex for exception event control */
9521 mutex_init(&hba->ee_ctrl_mutex);
9523 init_rwsem(&hba->clk_scaling_lock);
9525 ufshcd_init_clk_gating(hba);
9527 ufshcd_init_clk_scaling(hba);
9530 * In order to avoid any spurious interrupt immediately after
9531 * registering UFS controller interrupt handler, clear any pending UFS
9532 * interrupt status and disable all the UFS interrupts.
9534 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9535 REG_INTERRUPT_STATUS);
9536 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9538 * Make sure that UFS interrupts are disabled and any pending interrupt
9539 * status is cleared before registering UFS interrupt handler.
9543 /* IRQ registration */
9544 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
9546 dev_err(hba->dev, "request irq failed\n");
9549 hba->is_irq_enabled = true;
9552 err = scsi_add_host(host, hba->dev);
9554 dev_err(hba->dev, "scsi_add_host failed\n");
9558 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
9559 if (IS_ERR(hba->cmd_queue)) {
9560 err = PTR_ERR(hba->cmd_queue);
9561 goto out_remove_scsi_host;
9564 hba->tmf_tag_set = (struct blk_mq_tag_set) {
9566 .queue_depth = hba->nutmrs,
9567 .ops = &ufshcd_tmf_ops,
9568 .flags = BLK_MQ_F_NO_SCHED,
9570 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
9572 goto free_cmd_queue;
9573 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
9574 if (IS_ERR(hba->tmf_queue)) {
9575 err = PTR_ERR(hba->tmf_queue);
9576 goto free_tmf_tag_set;
9579 /* Reset the attached device */
9580 ufshcd_device_reset(hba);
9582 ufshcd_init_crypto(hba);
9584 /* Host controller enable */
9585 err = ufshcd_hba_enable(hba);
9587 dev_err(hba->dev, "Host controller enable failed\n");
9588 ufshcd_print_evt_hist(hba);
9589 ufshcd_print_host_state(hba);
9590 goto free_tmf_queue;
9594 * Set the default power management level for runtime and system PM.
9595 * Default power saving mode is to keep UFS link in Hibern8 state
9596 * and UFS device in sleep state.
9598 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9600 UIC_LINK_HIBERN8_STATE);
9601 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9603 UIC_LINK_HIBERN8_STATE);
9605 INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
9606 ufshcd_rpm_dev_flush_recheck_work);
9608 /* Set the default auto-hiberate idle timer value to 150 ms */
9609 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
9610 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
9611 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
9614 /* Hold auto suspend until async scan completes */
9615 pm_runtime_get_sync(dev);
9616 atomic_set(&hba->scsi_block_reqs_cnt, 0);
9618 * We are assuming that device wasn't put in sleep/power-down
9619 * state exclusively during the boot stage before kernel.
9620 * This assumption helps avoid doing link startup twice during
9621 * ufshcd_probe_hba().
9623 ufshcd_set_ufs_dev_active(hba);
9625 async_schedule(ufshcd_async_scan, hba);
9626 ufs_sysfs_add_nodes(hba->dev);
9631 blk_cleanup_queue(hba->tmf_queue);
9633 blk_mq_free_tag_set(&hba->tmf_tag_set);
9635 blk_cleanup_queue(hba->cmd_queue);
9636 out_remove_scsi_host:
9637 scsi_remove_host(hba->host);
9639 hba->is_irq_enabled = false;
9640 ufshcd_hba_exit(hba);
9644 EXPORT_SYMBOL_GPL(ufshcd_init);
9646 void ufshcd_resume_complete(struct device *dev)
9648 struct ufs_hba *hba = dev_get_drvdata(dev);
9650 if (hba->complete_put) {
9651 ufshcd_rpm_put(hba);
9652 hba->complete_put = false;
9654 if (hba->rpmb_complete_put) {
9655 ufshcd_rpmb_rpm_put(hba);
9656 hba->rpmb_complete_put = false;
9659 EXPORT_SYMBOL_GPL(ufshcd_resume_complete);
9661 int ufshcd_suspend_prepare(struct device *dev)
9663 struct ufs_hba *hba = dev_get_drvdata(dev);
9667 * SCSI assumes that runtime-pm and system-pm for scsi drivers
9668 * are same. And it doesn't wake up the device for system-suspend
9669 * if it's runtime suspended. But ufs doesn't follow that.
9670 * Refer ufshcd_resume_complete()
9672 if (hba->sdev_ufs_device) {
9673 ret = ufshcd_rpm_get_sync(hba);
9674 if (ret < 0 && ret != -EACCES) {
9675 ufshcd_rpm_put(hba);
9678 hba->complete_put = true;
9680 if (hba->sdev_rpmb) {
9681 ufshcd_rpmb_rpm_get_sync(hba);
9682 hba->rpmb_complete_put = true;
9686 EXPORT_SYMBOL_GPL(ufshcd_suspend_prepare);
9688 #ifdef CONFIG_PM_SLEEP
9689 static int ufshcd_wl_poweroff(struct device *dev)
9691 struct scsi_device *sdev = to_scsi_device(dev);
9692 struct ufs_hba *hba = shost_priv(sdev->host);
9694 __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9699 static int ufshcd_wl_probe(struct device *dev)
9701 struct scsi_device *sdev = to_scsi_device(dev);
9703 if (!is_device_wlun(sdev))
9706 blk_pm_runtime_init(sdev->request_queue, dev);
9707 pm_runtime_set_autosuspend_delay(dev, 0);
9708 pm_runtime_allow(dev);
9713 static int ufshcd_wl_remove(struct device *dev)
9715 pm_runtime_forbid(dev);
9719 static const struct dev_pm_ops ufshcd_wl_pm_ops = {
9720 #ifdef CONFIG_PM_SLEEP
9721 .suspend = ufshcd_wl_suspend,
9722 .resume = ufshcd_wl_resume,
9723 .freeze = ufshcd_wl_suspend,
9724 .thaw = ufshcd_wl_resume,
9725 .poweroff = ufshcd_wl_poweroff,
9726 .restore = ufshcd_wl_resume,
9728 SET_RUNTIME_PM_OPS(ufshcd_wl_runtime_suspend, ufshcd_wl_runtime_resume, NULL)
9732 * ufs_dev_wlun_template - describes ufs device wlun
9733 * ufs-device wlun - used to send pm commands
9734 * All luns are consumers of ufs-device wlun.
9736 * Currently, no sd driver is present for wluns.
9737 * Hence the no specific pm operations are performed.
9738 * With ufs design, SSU should be sent to ufs-device wlun.
9739 * Hence register a scsi driver for ufs wluns only.
9741 static struct scsi_driver ufs_dev_wlun_template = {
9743 .name = "ufs_device_wlun",
9744 .owner = THIS_MODULE,
9745 .probe = ufshcd_wl_probe,
9746 .remove = ufshcd_wl_remove,
9747 .pm = &ufshcd_wl_pm_ops,
9748 .shutdown = ufshcd_wl_shutdown,
9752 static int ufshcd_rpmb_probe(struct device *dev)
9754 return is_rpmb_wlun(to_scsi_device(dev)) ? 0 : -ENODEV;
9757 static inline int ufshcd_clear_rpmb_uac(struct ufs_hba *hba)
9761 if (!hba->wlun_rpmb_clr_ua)
9763 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
9765 hba->wlun_rpmb_clr_ua = 0;
9769 static int ufshcd_rpmb_resume(struct device *dev)
9771 struct ufs_hba *hba = wlun_dev_to_hba(dev);
9774 ufshcd_clear_rpmb_uac(hba);
9778 static const struct dev_pm_ops ufs_rpmb_pm_ops = {
9779 SET_RUNTIME_PM_OPS(NULL, ufshcd_rpmb_resume, NULL)
9780 SET_SYSTEM_SLEEP_PM_OPS(NULL, ufshcd_rpmb_resume)
9783 /* ufs_rpmb_wlun_template - Describes UFS RPMB WLUN. Used only to send UAC. */
9784 static struct scsi_driver ufs_rpmb_wlun_template = {
9786 .name = "ufs_rpmb_wlun",
9787 .owner = THIS_MODULE,
9788 .probe = ufshcd_rpmb_probe,
9789 .pm = &ufs_rpmb_pm_ops,
9793 static int __init ufshcd_core_init(void)
9799 ret = scsi_register_driver(&ufs_dev_wlun_template.gendrv);
9803 ret = scsi_register_driver(&ufs_rpmb_wlun_template.gendrv);
9809 scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9815 static void __exit ufshcd_core_exit(void)
9818 scsi_unregister_driver(&ufs_rpmb_wlun_template.gendrv);
9819 scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9822 module_init(ufshcd_core_init);
9823 module_exit(ufshcd_core_exit);
9825 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9826 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
9827 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
9828 MODULE_LICENSE("GPL");
9829 MODULE_VERSION(UFSHCD_DRIVER_VERSION);