drivers/scsi/ufs/ufshcd.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Universal Flash Storage Host controller driver Core
   4  * Copyright (C) 2011-2013 Samsung India Software Operations
   5  * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
   6  *
   7  * Authors:
   8  *      Santosh Yaraganavi <santosh.sy@samsung.com>
   9  *      Vinayak Holikatti <h.vinayak@samsung.com>
  10  */
  11
  12 #include <linux/async.h>
  13 #include <linux/devfreq.h>
  14 #include <linux/nls.h>
  15 #include <linux/of.h>
  16 #include <linux/bitfield.h>
  17 #include <linux/blk-pm.h>
  18 #include <linux/blkdev.h>
  19 #include <scsi/scsi_driver.h>
  20 #include <scsi/scsi_transport.h>
  21 #include "../scsi_transport_api.h"
  22 #include "ufshcd.h"
  23 #include "ufs_quirks.h"
  24 #include "unipro.h"
  25 #include "ufs-sysfs.h"
  26 #include "ufs-debugfs.h"
  27 #include "ufs-fault-injection.h"
  28 #include "ufs_bsg.h"
  29 #include "ufshcd-crypto.h"
  30 #include "ufshpb.h"
  31 #include <asm/unaligned.h>
  32
  33 #define CREATE_TRACE_POINTS
  34 #include <trace/events/ufs.h>
  35
  36 #define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
  37                                  UTP_TASK_REQ_COMPL |\
  38                                  UFSHCD_ERROR_MASK)
  39 /* UIC command timeout, unit: ms */
  40 #define UIC_CMD_TIMEOUT 500
  41
  42 /* NOP OUT retries waiting for NOP IN response */
  43 #define NOP_OUT_RETRIES    10
  44 /* Timeout after 50 msecs if NOP OUT hangs without response */
  45 #define NOP_OUT_TIMEOUT    50 /* msecs */
  46
  47 /* Query request retries */
  48 #define QUERY_REQ_RETRIES 3
  49 /* Query request timeout */
  50 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
  51
  52 /* Task management command timeout */
  53 #define TM_CMD_TIMEOUT  100 /* msecs */
  54
  55 /* maximum number of retries for a general UIC command  */
  56 #define UFS_UIC_COMMAND_RETRIES 3
  57
  58 /* maximum number of link-startup retries */
  59 #define DME_LINKSTARTUP_RETRIES 3
  60
  61 /* Maximum retries for Hibern8 enter */
  62 #define UIC_HIBERN8_ENTER_RETRIES 3
  63
  64 /* maximum number of reset retries before giving up */
  65 #define MAX_HOST_RESET_RETRIES 5
  66
  67 /* Expose the flag value from utp_upiu_query.value */
  68 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  69
  70 /* Interrupt aggregation default timeout, unit: 40us */
  71 #define INT_AGGR_DEF_TO 0x02
  72
  73 /* default delay of autosuspend: 2000 ms */
  74 #define RPM_AUTOSUSPEND_DELAY_MS 2000
  75
  76 /* Default delay of RPM device flush delayed work */
  77 #define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000
  78
  79 /* Default value of wait time before gating device ref clock */
  80 #define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
  81
  82 /* Polling time to wait for fDeviceInit */
  83 #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */
  84
  85 #define wlun_dev_to_hba(dv) shost_priv(to_scsi_device(dv)->host)
  86
  87 #define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
  88         ({                                                              \
  89                 int _ret;                                               \
  90                 if (_on)                                                \
  91                         _ret = ufshcd_enable_vreg(_dev, _vreg);         \
  92                 else                                                    \
  93                         _ret = ufshcd_disable_vreg(_dev, _vreg);        \
  94                 _ret;                                                   \
  95         })
  96
  97 #define ufshcd_hex_dump(prefix_str, buf, len) do {                       \
  98         size_t __len = (len);                                            \
  99         print_hex_dump(KERN_ERR, prefix_str,                             \
 100                        __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
 101                        16, 4, buf, __len, false);                        \
 102 } while (0)
 103
 104 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
 105                      const char *prefix)
 106 {
 107         u32 *regs;
 108         size_t pos;
 109
 110         if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
 111                 return -EINVAL;
 112
 113         regs = kzalloc(len, GFP_ATOMIC);
 114         if (!regs)
 115                 return -ENOMEM;
 116
 117         for (pos = 0; pos < len; pos += 4)
 118                 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
 119
 120         ufshcd_hex_dump(prefix, regs, len);
 121         kfree(regs);
 122
 123         return 0;
 124 }
 125 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
 126
 127 enum {
 128         UFSHCD_MAX_CHANNEL      = 0,
 129         UFSHCD_MAX_ID           = 1,
 130         UFSHCD_CMD_PER_LUN      = 32,
 131         UFSHCD_CAN_QUEUE        = 32,
 132 };
 133
 134 /* UFSHCD error handling flags */
 135 enum {
 136         UFSHCD_EH_IN_PROGRESS = (1 << 0),
 137 };
 138
 139 /* UFSHCD UIC layer error flags */
 140 enum {
 141         UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
 142         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
 143         UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
 144         UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
 145         UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
 146         UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
 147         UFSHCD_UIC_PA_GENERIC_ERROR = (1 << 6), /* Generic PA error */
 148 };
 149
 150 #define ufshcd_set_eh_in_progress(h) \
 151         ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
 152 #define ufshcd_eh_in_progress(h) \
 153         ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
 154 #define ufshcd_clear_eh_in_progress(h) \
 155         ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
 156
 157 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
 158         [UFS_PM_LVL_0] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 159         [UFS_PM_LVL_1] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 160         [UFS_PM_LVL_2] = {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 161         [UFS_PM_LVL_3] = {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 162         [UFS_PM_LVL_4] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 163         [UFS_PM_LVL_5] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
 164         /*
 165          * For DeepSleep, the link is first put in hibern8 and then off.
 166          * Leaving the link in hibern8 is not supported.
 167          */
 168         [UFS_PM_LVL_6] = {UFS_DEEPSLEEP_PWR_MODE, UIC_LINK_OFF_STATE},
 169 };
 170
 171 static inline enum ufs_dev_pwr_mode
 172 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
 173 {
 174         return ufs_pm_lvl_states[lvl].dev_state;
 175 }
 176
 177 static inline enum uic_link_state
 178 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
 179 {
 180         return ufs_pm_lvl_states[lvl].link_state;
 181 }
 182
 183 static inline enum ufs_pm_level
 184 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
 185                                         enum uic_link_state link_state)
 186 {
 187         enum ufs_pm_level lvl;
 188
 189         for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
 190                 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
 191                         (ufs_pm_lvl_states[lvl].link_state == link_state))
 192                         return lvl;
 193         }
 194
 195         /* if no match found, return the level 0 */
 196         return UFS_PM_LVL_0;
 197 }
 198
 199 static struct ufs_dev_fix ufs_fixups[] = {
 200         /* UFS cards deviations table */
 201         UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
 202                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
 203                 UFS_DEVICE_QUIRK_SWAP_L2P_ENTRY_FOR_HPB_READ),
 204         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 205                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
 206                 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
 207                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
 208         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
 209                 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
 210         UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
 211                 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
 212         UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
 213                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 214         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
 215                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 216         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
 217                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 218         END_FIX
 219 };
 220
 221 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
 222 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
 223 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
 224 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
 225 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
 226 static void ufshcd_hba_exit(struct ufs_hba *hba);
 227 static int ufshcd_clear_ua_wluns(struct ufs_hba *hba);
 228 static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
 229 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
 230 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
 231 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
 232 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
 233 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
 234 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 235 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 236 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
 237 static irqreturn_t ufshcd_intr(int irq, void *__hba);
 238 static int ufshcd_change_power_mode(struct ufs_hba *hba,
 239                              struct ufs_pa_layer_attr *pwr_mode);
 240 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on);
 241 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on);
 242 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
 243                                          struct ufs_vreg *vreg);
 244 static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag);
 245 static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
 246 static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
 247 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
 248 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
 249
 250 static inline void ufshcd_enable_irq(struct ufs_hba *hba)
 251 {
 252         if (!hba->is_irq_enabled) {
 253                 enable_irq(hba->irq);
 254                 hba->is_irq_enabled = true;
 255         }
 256 }
 257
 258 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
 259 {
 260         if (hba->is_irq_enabled) {
 261                 disable_irq(hba->irq);
 262                 hba->is_irq_enabled = false;
 263         }
 264 }
 265
 266 static inline void ufshcd_wb_config(struct ufs_hba *hba)
 267 {
 268         if (!ufshcd_is_wb_allowed(hba))
 269                 return;
 270
 271         ufshcd_wb_toggle(hba, true);
 272
 273         ufshcd_wb_toggle_flush_during_h8(hba, true);
 274         if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL))
 275                 ufshcd_wb_toggle_flush(hba, true);
 276 }
 277
 278 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
 279 {
 280         if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
 281                 scsi_unblock_requests(hba->host);
 282 }
 283
 284 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
 285 {
 286         if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
 287                 scsi_block_requests(hba->host);
 288 }
 289
 290 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 291                                       enum ufs_trace_str_t str_t)
 292 {
 293         struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
 294         struct utp_upiu_header *header;
 295
 296         if (!trace_ufshcd_upiu_enabled())
 297                 return;
 298
 299         if (str_t == UFS_CMD_SEND)
 300                 header = &rq->header;
 301         else
 302                 header = &hba->lrb[tag].ucd_rsp_ptr->header;
 303
 304         trace_ufshcd_upiu(dev_name(hba->dev), str_t, header, &rq->sc.cdb,
 305                           UFS_TSF_CDB);
 306 }
 307
 308 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba,
 309                                         enum ufs_trace_str_t str_t,
 310                                         struct utp_upiu_req *rq_rsp)
 311 {
 312         if (!trace_ufshcd_upiu_enabled())
 313                 return;
 314
 315         trace_ufshcd_upiu(dev_name(hba->dev), str_t, &rq_rsp->header,
 316                           &rq_rsp->qr, UFS_TSF_OSF);
 317 }
 318
 319 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 320                                      enum ufs_trace_str_t str_t)
 321 {
 322         int off = (int)tag - hba->nutrs;
 323         struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
 324
 325         if (!trace_ufshcd_upiu_enabled())
 326                 return;
 327
 328         if (str_t == UFS_TM_SEND)
 329                 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
 330                                   &descp->upiu_req.req_header,
 331                                   &descp->upiu_req.input_param1,
 332                                   UFS_TSF_TM_INPUT);
 333         else
 334                 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
 335                                   &descp->upiu_rsp.rsp_header,
 336                                   &descp->upiu_rsp.output_param1,
 337                                   UFS_TSF_TM_OUTPUT);
 338 }
 339
 340 static void ufshcd_add_uic_command_trace(struct ufs_hba *hba,
 341                                          struct uic_command *ucmd,
 342                                          enum ufs_trace_str_t str_t)
 343 {
 344         u32 cmd;
 345
 346         if (!trace_ufshcd_uic_command_enabled())
 347                 return;
 348
 349         if (str_t == UFS_CMD_SEND)
 350                 cmd = ucmd->command;
 351         else
 352                 cmd = ufshcd_readl(hba, REG_UIC_COMMAND);
 353
 354         trace_ufshcd_uic_command(dev_name(hba->dev), str_t, cmd,
 355                                  ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1),
 356                                  ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2),
 357                                  ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3));
 358 }
 359
 360 static void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
 361                                      enum ufs_trace_str_t str_t)
 362 {
 363         u64 lba;
 364         u8 opcode = 0, group_id = 0;
 365         u32 intr, doorbell;
 366         struct ufshcd_lrb *lrbp = &hba->lrb[tag];
 367         struct scsi_cmnd *cmd = lrbp->cmd;
 368         struct request *rq = scsi_cmd_to_rq(cmd);
 369         int transfer_len = -1;
 370
 371         if (!cmd)
 372                 return;
 373
 374         /* trace UPIU also */
 375         ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
 376         if (!trace_ufshcd_command_enabled())
 377                 return;
 378
 379         opcode = cmd->cmnd[0];
 380         lba = scsi_get_lba(cmd);
 381
 382         if (opcode == READ_10 || opcode == WRITE_10) {
 383                 /*
 384                  * Currently we only fully trace read(10) and write(10) commands
 385                  */
 386                 transfer_len =
 387                        be32_to_cpu(lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
 388                 if (opcode == WRITE_10)
 389                         group_id = lrbp->cmd->cmnd[6];
 390         } else if (opcode == UNMAP) {
 391                 /*
 392                  * The number of Bytes to be unmapped beginning with the lba.
 393                  */
 394                 transfer_len = blk_rq_bytes(rq);
 395         }
 396
 397         intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
 398         doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
 399         trace_ufshcd_command(dev_name(hba->dev), str_t, tag,
 400                         doorbell, transfer_len, intr, lba, opcode, group_id);
 401 }
 402
 403 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
 404 {
 405         struct ufs_clk_info *clki;
 406         struct list_head *head = &hba->clk_list_head;
 407
 408         if (list_empty(head))
 409                 return;
 410
 411         list_for_each_entry(clki, head, list) {
 412                 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
 413                                 clki->max_freq)
 414                         dev_err(hba->dev, "clk: %s, rate: %u\n",
 415                                         clki->name, clki->curr_freq);
 416         }
 417 }
 418
 419 static void ufshcd_print_evt(struct ufs_hba *hba, u32 id,
 420                              char *err_name)
 421 {
 422         int i;
 423         bool found = false;
 424         struct ufs_event_hist *e;
 425
 426         if (id >= UFS_EVT_CNT)
 427                 return;
 428
 429         e = &hba->ufs_stats.event[id];
 430
 431         for (i = 0; i < UFS_EVENT_HIST_LENGTH; i++) {
 432                 int p = (i + e->pos) % UFS_EVENT_HIST_LENGTH;
 433
 434                 if (e->tstamp[p] == 0)
 435                         continue;
 436                 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
 437                         e->val[p], ktime_to_us(e->tstamp[p]));
 438                 found = true;
 439         }
 440
 441         if (!found)
 442                 dev_err(hba->dev, "No record of %s\n", err_name);
 443         else
 444                 dev_err(hba->dev, "%s: total cnt=%llu\n", err_name, e->cnt);
 445 }
 446
 447 static void ufshcd_print_evt_hist(struct ufs_hba *hba)
 448 {
 449         ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
 450
 451         ufshcd_print_evt(hba, UFS_EVT_PA_ERR, "pa_err");
 452         ufshcd_print_evt(hba, UFS_EVT_DL_ERR, "dl_err");
 453         ufshcd_print_evt(hba, UFS_EVT_NL_ERR, "nl_err");
 454         ufshcd_print_evt(hba, UFS_EVT_TL_ERR, "tl_err");
 455         ufshcd_print_evt(hba, UFS_EVT_DME_ERR, "dme_err");
 456         ufshcd_print_evt(hba, UFS_EVT_AUTO_HIBERN8_ERR,
 457                          "auto_hibern8_err");
 458         ufshcd_print_evt(hba, UFS_EVT_FATAL_ERR, "fatal_err");
 459         ufshcd_print_evt(hba, UFS_EVT_LINK_STARTUP_FAIL,
 460                          "link_startup_fail");
 461         ufshcd_print_evt(hba, UFS_EVT_RESUME_ERR, "resume_fail");
 462         ufshcd_print_evt(hba, UFS_EVT_SUSPEND_ERR,
 463                          "suspend_fail");
 464         ufshcd_print_evt(hba, UFS_EVT_DEV_RESET, "dev_reset");
 465         ufshcd_print_evt(hba, UFS_EVT_HOST_RESET, "host_reset");
 466         ufshcd_print_evt(hba, UFS_EVT_ABORT, "task_abort");
 467
 468         ufshcd_vops_dbg_register_dump(hba);
 469 }
 470
 471 static
 472 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
 473 {
 474         struct ufshcd_lrb *lrbp;
 475         int prdt_length;
 476         int tag;
 477
 478         for_each_set_bit(tag, &bitmap, hba->nutrs) {
 479                 lrbp = &hba->lrb[tag];
 480
 481                 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
 482                                 tag, ktime_to_us(lrbp->issue_time_stamp));
 483                 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
 484                                 tag, ktime_to_us(lrbp->compl_time_stamp));
 485                 dev_err(hba->dev,
 486                         "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
 487                         tag, (u64)lrbp->utrd_dma_addr);
 488
 489                 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
 490                                 sizeof(struct utp_transfer_req_desc));
 491                 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
 492                         (u64)lrbp->ucd_req_dma_addr);
 493                 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
 494                                 sizeof(struct utp_upiu_req));
 495                 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
 496                         (u64)lrbp->ucd_rsp_dma_addr);
 497                 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
 498                                 sizeof(struct utp_upiu_rsp));
 499
 500                 prdt_length = le16_to_cpu(
 501                         lrbp->utr_descriptor_ptr->prd_table_length);
 502                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
 503                         prdt_length /= sizeof(struct ufshcd_sg_entry);
 504
 505                 dev_err(hba->dev,
 506                         "UPIU[%d] - PRDT - %d entries  phys@0x%llx\n",
 507                         tag, prdt_length,
 508                         (u64)lrbp->ucd_prdt_dma_addr);
 509
 510                 if (pr_prdt)
 511                         ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
 512                                 sizeof(struct ufshcd_sg_entry) * prdt_length);
 513         }
 514 }
 515
 516 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
 517 {
 518         int tag;
 519
 520         for_each_set_bit(tag, &bitmap, hba->nutmrs) {
 521                 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
 522
 523                 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
 524                 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
 525         }
 526 }
 527
 528 static void ufshcd_print_host_state(struct ufs_hba *hba)
 529 {
 530         struct scsi_device *sdev_ufs = hba->sdev_ufs_device;
 531
 532         dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
 533         dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
 534                 hba->outstanding_reqs, hba->outstanding_tasks);
 535         dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
 536                 hba->saved_err, hba->saved_uic_err);
 537         dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
 538                 hba->curr_dev_pwr_mode, hba->uic_link_state);
 539         dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
 540                 hba->pm_op_in_progress, hba->is_sys_suspended);
 541         dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
 542                 hba->auto_bkops_enabled, hba->host->host_self_blocked);
 543         dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
 544         dev_err(hba->dev,
 545                 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt=%d\n",
 546                 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
 547                 hba->ufs_stats.hibern8_exit_cnt);
 548         dev_err(hba->dev, "last intr at %lld us, last intr status=0x%x\n",
 549                 ktime_to_us(hba->ufs_stats.last_intr_ts),
 550                 hba->ufs_stats.last_intr_status);
 551         dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
 552                 hba->eh_flags, hba->req_abort_count);
 553         dev_err(hba->dev, "hba->ufs_version=0x%x, Host capabilities=0x%x, caps=0x%x\n",
 554                 hba->ufs_version, hba->capabilities, hba->caps);
 555         dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
 556                 hba->dev_quirks);
 557         if (sdev_ufs)
 558                 dev_err(hba->dev, "UFS dev info: %.8s %.16s rev %.4s\n",
 559                         sdev_ufs->vendor, sdev_ufs->model, sdev_ufs->rev);
 560
 561         ufshcd_print_clk_freqs(hba);
 562 }
 563
 564 /**
 565  * ufshcd_print_pwr_info - print power params as saved in hba
 566  * power info
 567  * @hba: per-adapter instance
 568  */
 569 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
 570 {
 571         static const char * const names[] = {
 572                 "INVALID MODE",
 573                 "FAST MODE",
 574                 "SLOW_MODE",
 575                 "INVALID MODE",
 576                 "FASTAUTO_MODE",
 577                 "SLOWAUTO_MODE",
 578                 "INVALID MODE",
 579         };
 580
 581         dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
 582                  __func__,
 583                  hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
 584                  hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
 585                  names[hba->pwr_info.pwr_rx],
 586                  names[hba->pwr_info.pwr_tx],
 587                  hba->pwr_info.hs_rate);
 588 }
 589
 590 static void ufshcd_device_reset(struct ufs_hba *hba)
 591 {
 592         int err;
 593
 594         err = ufshcd_vops_device_reset(hba);
 595
 596         if (!err) {
 597                 ufshcd_set_ufs_dev_active(hba);
 598                 if (ufshcd_is_wb_allowed(hba)) {
 599                         hba->dev_info.wb_enabled = false;
 600                         hba->dev_info.wb_buf_flush_enabled = false;
 601                 }
 602         }
 603         if (err != -EOPNOTSUPP)
 604                 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
 605 }
 606
 607 void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
 608 {
 609         if (!us)
 610                 return;
 611
 612         if (us < 10)
 613                 udelay(us);
 614         else
 615                 usleep_range(us, us + tolerance);
 616 }
 617 EXPORT_SYMBOL_GPL(ufshcd_delay_us);
 618
 619 /**
 620  * ufshcd_wait_for_register - wait for register value to change
 621  * @hba: per-adapter interface
 622  * @reg: mmio register offset
 623  * @mask: mask to apply to the read register value
 624  * @val: value to wait for
 625  * @interval_us: polling interval in microseconds
 626  * @timeout_ms: timeout in milliseconds
 627  *
 628  * Return:
 629  * -ETIMEDOUT on error, zero on success.
 630  */
 631 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
 632                                 u32 val, unsigned long interval_us,
 633                                 unsigned long timeout_ms)
 634 {
 635         int err = 0;
 636         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
 637
 638         /* ignore bits that we don't intend to wait on */
 639         val = val & mask;
 640
 641         while ((ufshcd_readl(hba, reg) & mask) != val) {
 642                 usleep_range(interval_us, interval_us + 50);
 643                 if (time_after(jiffies, timeout)) {
 644                         if ((ufshcd_readl(hba, reg) & mask) != val)
 645                                 err = -ETIMEDOUT;
 646                         break;
 647                 }
 648         }
 649
 650         return err;
 651 }
 652
 653 /**
 654  * ufshcd_get_intr_mask - Get the interrupt bit mask
 655  * @hba: Pointer to adapter instance
 656  *
 657  * Returns interrupt bit mask per version
 658  */
 659 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
 660 {
 661         if (hba->ufs_version == ufshci_version(1, 0))
 662                 return INTERRUPT_MASK_ALL_VER_10;
 663         if (hba->ufs_version <= ufshci_version(2, 0))
 664                 return INTERRUPT_MASK_ALL_VER_11;
 665
 666         return INTERRUPT_MASK_ALL_VER_21;
 667 }
 668
 669 /**
 670  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
 671  * @hba: Pointer to adapter instance
 672  *
 673  * Returns UFSHCI version supported by the controller
 674  */
 675 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
 676 {
 677         u32 ufshci_ver;
 678
 679         if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
 680                 ufshci_ver = ufshcd_vops_get_ufs_hci_version(hba);
 681         else
 682                 ufshci_ver = ufshcd_readl(hba, REG_UFS_VERSION);
 683
 684         /*
 685          * UFSHCI v1.x uses a different version scheme, in order
 686          * to allow the use of comparisons with the ufshci_version
 687          * function, we convert it to the same scheme as ufs 2.0+.
 688          */
 689         if (ufshci_ver & 0x00010000)
 690                 return ufshci_version(1, ufshci_ver & 0x00000100);
 691
 692         return ufshci_ver;
 693 }
 694
 695 /**
 696  * ufshcd_is_device_present - Check if any device connected to
 697  *                            the host controller
 698  * @hba: pointer to adapter instance
 699  *
 700  * Returns true if device present, false if no device detected
 701  */
 702 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
 703 {
 704         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
 705                                                 DEVICE_PRESENT) ? true : false;
 706 }
 707
 708 /**
 709  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
 710  * @lrbp: pointer to local command reference block
 711  *
 712  * This function is used to get the OCS field from UTRD
 713  * Returns the OCS field in the UTRD
 714  */
 715 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
 716 {
 717         return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
 718 }
 719
 720 /**
 721  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 722  * @hba: per adapter instance
 723  * @pos: position of the bit to be cleared
 724  */
 725 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
 726 {
 727         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 728                 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 729         else
 730                 ufshcd_writel(hba, ~(1 << pos),
 731                                 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 732 }
 733
 734 /**
 735  * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
 736  * @hba: per adapter instance
 737  * @pos: position of the bit to be cleared
 738  */
 739 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
 740 {
 741         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 742                 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 743         else
 744                 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 745 }
 746
 747 /**
 748  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 749  * @reg: Register value of host controller status
 750  *
 751  * Returns integer, 0 on Success and positive value if failed
 752  */
 753 static inline int ufshcd_get_lists_status(u32 reg)
 754 {
 755         return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
 756 }
 757
 758 /**
 759  * ufshcd_get_uic_cmd_result - Get the UIC command result
 760  * @hba: Pointer to adapter instance
 761  *
 762  * This function gets the result of UIC command completion
 763  * Returns 0 on success, non zero value on error
 764  */
 765 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
 766 {
 767         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
 768                MASK_UIC_COMMAND_RESULT;
 769 }
 770
 771 /**
 772  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 773  * @hba: Pointer to adapter instance
 774  *
 775  * This function gets UIC command argument3
 776  * Returns 0 on success, non zero value on error
 777  */
 778 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
 779 {
 780         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
 781 }
 782
 783 /**
 784  * ufshcd_get_req_rsp - returns the TR response transaction type
 785  * @ucd_rsp_ptr: pointer to response UPIU
 786  */
 787 static inline int
 788 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
 789 {
 790         return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
 791 }
 792
 793 /**
 794  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 795  * @ucd_rsp_ptr: pointer to response UPIU
 796  *
 797  * This function gets the response status and scsi_status from response UPIU
 798  * Returns the response result code.
 799  */
 800 static inline int
 801 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
 802 {
 803         return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
 804 }
 805
 806 /*
 807  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 808  *                              from response UPIU
 809  * @ucd_rsp_ptr: pointer to response UPIU
 810  *
 811  * Return the data segment length.
 812  */
 813 static inline unsigned int
 814 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
 815 {
 816         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 817                 MASK_RSP_UPIU_DATA_SEG_LEN;
 818 }
 819
 820 /**
 821  * ufshcd_is_exception_event - Check if the device raised an exception event
 822  * @ucd_rsp_ptr: pointer to response UPIU
 823  *
 824  * The function checks if the device raised an exception event indicated in
 825  * the Device Information field of response UPIU.
 826  *
 827  * Returns true if exception is raised, false otherwise.
 828  */
 829 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
 830 {
 831         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 832                         MASK_RSP_EXCEPTION_EVENT ? true : false;
 833 }
 834
 835 /**
 836  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
 837  * @hba: per adapter instance
 838  */
 839 static inline void
 840 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
 841 {
 842         ufshcd_writel(hba, INT_AGGR_ENABLE |
 843                       INT_AGGR_COUNTER_AND_TIMER_RESET,
 844                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 845 }
 846
 847 /**
 848  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 849  * @hba: per adapter instance
 850  * @cnt: Interrupt aggregation counter threshold
 851  * @tmout: Interrupt aggregation timeout value
 852  */
 853 static inline void
 854 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
 855 {
 856         ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
 857                       INT_AGGR_COUNTER_THLD_VAL(cnt) |
 858                       INT_AGGR_TIMEOUT_VAL(tmout),
 859                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 860 }
 861
 862 /**
 863  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 864  * @hba: per adapter instance
 865  */
 866 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
 867 {
 868         ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 869 }
 870
 871 /**
 872  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 873  *                      When run-stop registers are set to 1, it indicates the
 874  *                      host controller that it can process the requests
 875  * @hba: per adapter instance
 876  */
 877 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
 878 {
 879         ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
 880                       REG_UTP_TASK_REQ_LIST_RUN_STOP);
 881         ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
 882                       REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
 883 }
 884
 885 /**
 886  * ufshcd_hba_start - Start controller initialization sequence
 887  * @hba: per adapter instance
 888  */
 889 static inline void ufshcd_hba_start(struct ufs_hba *hba)
 890 {
 891         u32 val = CONTROLLER_ENABLE;
 892
 893         if (ufshcd_crypto_enable(hba))
 894                 val |= CRYPTO_GENERAL_ENABLE;
 895
 896         ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
 897 }
 898
 899 /**
 900  * ufshcd_is_hba_active - Get controller state
 901  * @hba: per adapter instance
 902  *
 903  * Returns false if controller is active, true otherwise
 904  */
 905 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
 906 {
 907         return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
 908                 ? false : true;
 909 }
 910
 911 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
 912 {
 913         /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
 914         if (hba->ufs_version <= ufshci_version(1, 1))
 915                 return UFS_UNIPRO_VER_1_41;
 916         else
 917                 return UFS_UNIPRO_VER_1_6;
 918 }
 919 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
 920
 921 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
 922 {
 923         /*
 924          * If both host and device support UniPro ver1.6 or later, PA layer
 925          * parameters tuning happens during link startup itself.
 926          *
 927          * We can manually tune PA layer parameters if either host or device
 928          * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
 929          * logic simple, we will only do manual tuning if local unipro version
 930          * doesn't support ver1.6 or later.
 931          */
 932         if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
 933                 return true;
 934         else
 935                 return false;
 936 }
 937
 938 /**
 939  * ufshcd_set_clk_freq - set UFS controller clock frequencies
 940  * @hba: per adapter instance
 941  * @scale_up: If True, set max possible frequency othewise set low frequency
 942  *
 943  * Returns 0 if successful
 944  * Returns < 0 for any other errors
 945  */
 946 static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
 947 {
 948         int ret = 0;
 949         struct ufs_clk_info *clki;
 950         struct list_head *head = &hba->clk_list_head;
 951
 952         if (list_empty(head))
 953                 goto out;
 954
 955         list_for_each_entry(clki, head, list) {
 956                 if (!IS_ERR_OR_NULL(clki->clk)) {
 957                         if (scale_up && clki->max_freq) {
 958                                 if (clki->curr_freq == clki->max_freq)
 959                                         continue;
 960
 961                                 ret = clk_set_rate(clki->clk, clki->max_freq);
 962                                 if (ret) {
 963                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 964                                                 __func__, clki->name,
 965                                                 clki->max_freq, ret);
 966                                         break;
 967                                 }
 968                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 969                                                 "scaled up", clki->name,
 970                                                 clki->curr_freq,
 971                                                 clki->max_freq);
 972
 973                                 clki->curr_freq = clki->max_freq;
 974
 975                         } else if (!scale_up && clki->min_freq) {
 976                                 if (clki->curr_freq == clki->min_freq)
 977                                         continue;
 978
 979                                 ret = clk_set_rate(clki->clk, clki->min_freq);
 980                                 if (ret) {
 981                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 982                                                 __func__, clki->name,
 983                                                 clki->min_freq, ret);
 984                                         break;
 985                                 }
 986                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 987                                                 "scaled down", clki->name,
 988                                                 clki->curr_freq,
 989                                                 clki->min_freq);
 990                                 clki->curr_freq = clki->min_freq;
 991                         }
 992                 }
 993                 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
 994                                 clki->name, clk_get_rate(clki->clk));
 995         }
 996
 997 out:
 998         return ret;
 999 }
1000
1001 /**
1002  * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1003  * @hba: per adapter instance
1004  * @scale_up: True if scaling up and false if scaling down
1005  *
1006  * Returns 0 if successful
1007  * Returns < 0 for any other errors
1008  */
1009 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1010 {
1011         int ret = 0;
1012         ktime_t start = ktime_get();
1013
1014         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1015         if (ret)
1016                 goto out;
1017
1018         ret = ufshcd_set_clk_freq(hba, scale_up);
1019         if (ret)
1020                 goto out;
1021
1022         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1023         if (ret)
1024                 ufshcd_set_clk_freq(hba, !scale_up);
1025
1026 out:
1027         trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1028                         (scale_up ? "up" : "down"),
1029                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1030         return ret;
1031 }
1032
1033 /**
1034  * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
1035  * @hba: per adapter instance
1036  * @scale_up: True if scaling up and false if scaling down
1037  *
1038  * Returns true if scaling is required, false otherwise.
1039  */
1040 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
1041                                                bool scale_up)
1042 {
1043         struct ufs_clk_info *clki;
1044         struct list_head *head = &hba->clk_list_head;
1045
1046         if (list_empty(head))
1047                 return false;
1048
1049         list_for_each_entry(clki, head, list) {
1050                 if (!IS_ERR_OR_NULL(clki->clk)) {
1051                         if (scale_up && clki->max_freq) {
1052                                 if (clki->curr_freq == clki->max_freq)
1053                                         continue;
1054                                 return true;
1055                         } else if (!scale_up && clki->min_freq) {
1056                                 if (clki->curr_freq == clki->min_freq)
1057                                         continue;
1058                                 return true;
1059                         }
1060                 }
1061         }
1062
1063         return false;
1064 }
1065
1066 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1067                                         u64 wait_timeout_us)
1068 {
1069         unsigned long flags;
1070         int ret = 0;
1071         u32 tm_doorbell;
1072         u32 tr_doorbell;
1073         bool timeout = false, do_last_check = false;
1074         ktime_t start;
1075
1076         ufshcd_hold(hba, false);
1077         spin_lock_irqsave(hba->host->host_lock, flags);
1078         /*
1079          * Wait for all the outstanding tasks/transfer requests.
1080          * Verify by checking the doorbell registers are clear.
1081          */
1082         start = ktime_get();
1083         do {
1084                 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1085                         ret = -EBUSY;
1086                         goto out;
1087                 }
1088
1089                 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1090                 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1091                 if (!tm_doorbell && !tr_doorbell) {
1092                         timeout = false;
1093                         break;
1094                 } else if (do_last_check) {
1095                         break;
1096                 }
1097
1098                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1099                 schedule();
1100                 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1101                     wait_timeout_us) {
1102                         timeout = true;
1103                         /*
1104                          * We might have scheduled out for long time so make
1105                          * sure to check if doorbells are cleared by this time
1106                          * or not.
1107                          */
1108                         do_last_check = true;
1109                 }
1110                 spin_lock_irqsave(hba->host->host_lock, flags);
1111         } while (tm_doorbell || tr_doorbell);
1112
1113         if (timeout) {
1114                 dev_err(hba->dev,
1115                         "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1116                         __func__, tm_doorbell, tr_doorbell);
1117                 ret = -EBUSY;
1118         }
1119 out:
1120         spin_unlock_irqrestore(hba->host->host_lock, flags);
1121         ufshcd_release(hba);
1122         return ret;
1123 }
1124
1125 /**
1126  * ufshcd_scale_gear - scale up/down UFS gear
1127  * @hba: per adapter instance
1128  * @scale_up: True for scaling up gear and false for scaling down
1129  *
1130  * Returns 0 for success,
1131  * Returns -EBUSY if scaling can't happen at this time
1132  * Returns non-zero for any other errors
1133  */
1134 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1135 {
1136         int ret = 0;
1137         struct ufs_pa_layer_attr new_pwr_info;
1138
1139         if (scale_up) {
1140                 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1141                        sizeof(struct ufs_pa_layer_attr));
1142         } else {
1143                 memcpy(&new_pwr_info, &hba->pwr_info,
1144                        sizeof(struct ufs_pa_layer_attr));
1145
1146                 if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||
1147                     hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {
1148                         /* save the current power mode */
1149                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
1150                                 &hba->pwr_info,
1151                                 sizeof(struct ufs_pa_layer_attr));
1152
1153                         /* scale down gear */
1154                         new_pwr_info.gear_tx = hba->clk_scaling.min_gear;
1155                         new_pwr_info.gear_rx = hba->clk_scaling.min_gear;
1156                 }
1157         }
1158
1159         /* check if the power mode needs to be changed or not? */
1160         ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
1161         if (ret)
1162                 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1163                         __func__, ret,
1164                         hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1165                         new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1166
1167         return ret;
1168 }
1169
1170 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1171 {
1172         #define DOORBELL_CLR_TOUT_US            (1000 * 1000) /* 1 sec */
1173         int ret = 0;
1174         /*
1175          * make sure that there are no outstanding requests when
1176          * clock scaling is in progress
1177          */
1178         ufshcd_scsi_block_requests(hba);
1179         down_write(&hba->clk_scaling_lock);
1180
1181         if (!hba->clk_scaling.is_allowed ||
1182             ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1183                 ret = -EBUSY;
1184                 up_write(&hba->clk_scaling_lock);
1185                 ufshcd_scsi_unblock_requests(hba);
1186                 goto out;
1187         }
1188
1189         /* let's not get into low power until clock scaling is completed */
1190         ufshcd_hold(hba, false);
1191
1192 out:
1193         return ret;
1194 }
1195
1196 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, bool writelock)
1197 {
1198         if (writelock)
1199                 up_write(&hba->clk_scaling_lock);
1200         else
1201                 up_read(&hba->clk_scaling_lock);
1202         ufshcd_scsi_unblock_requests(hba);
1203         ufshcd_release(hba);
1204 }
1205
1206 /**
1207  * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1208  * @hba: per adapter instance
1209  * @scale_up: True for scaling up and false for scalin down
1210  *
1211  * Returns 0 for success,
1212  * Returns -EBUSY if scaling can't happen at this time
1213  * Returns non-zero for any other errors
1214  */
1215 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1216 {
1217         int ret = 0;
1218         bool is_writelock = true;
1219
1220         ret = ufshcd_clock_scaling_prepare(hba);
1221         if (ret)
1222                 return ret;
1223
1224         /* scale down the gear before scaling down clocks */
1225         if (!scale_up) {
1226                 ret = ufshcd_scale_gear(hba, false);
1227                 if (ret)
1228                         goto out_unprepare;
1229         }
1230
1231         ret = ufshcd_scale_clks(hba, scale_up);
1232         if (ret) {
1233                 if (!scale_up)
1234                         ufshcd_scale_gear(hba, true);
1235                 goto out_unprepare;
1236         }
1237
1238         /* scale up the gear after scaling up clocks */
1239         if (scale_up) {
1240                 ret = ufshcd_scale_gear(hba, true);
1241                 if (ret) {
1242                         ufshcd_scale_clks(hba, false);
1243                         goto out_unprepare;
1244                 }
1245         }
1246
1247         /* Enable Write Booster if we have scaled up else disable it */
1248         downgrade_write(&hba->clk_scaling_lock);
1249         is_writelock = false;
1250         ufshcd_wb_toggle(hba, scale_up);
1251
1252 out_unprepare:
1253         ufshcd_clock_scaling_unprepare(hba, is_writelock);
1254         return ret;
1255 }
1256
1257 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1258 {
1259         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1260                                            clk_scaling.suspend_work);
1261         unsigned long irq_flags;
1262
1263         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1264         if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1265                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1266                 return;
1267         }
1268         hba->clk_scaling.is_suspended = true;
1269         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1270
1271         __ufshcd_suspend_clkscaling(hba);
1272 }
1273
1274 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1275 {
1276         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1277                                            clk_scaling.resume_work);
1278         unsigned long irq_flags;
1279
1280         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1281         if (!hba->clk_scaling.is_suspended) {
1282                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1283                 return;
1284         }
1285         hba->clk_scaling.is_suspended = false;
1286         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1287
1288         devfreq_resume_device(hba->devfreq);
1289 }
1290
1291 static int ufshcd_devfreq_target(struct device *dev,
1292                                 unsigned long *freq, u32 flags)
1293 {
1294         int ret = 0;
1295         struct ufs_hba *hba = dev_get_drvdata(dev);
1296         ktime_t start;
1297         bool scale_up, sched_clk_scaling_suspend_work = false;
1298         struct list_head *clk_list = &hba->clk_list_head;
1299         struct ufs_clk_info *clki;
1300         unsigned long irq_flags;
1301
1302         if (!ufshcd_is_clkscaling_supported(hba))
1303                 return -EINVAL;
1304
1305         clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1306         /* Override with the closest supported frequency */
1307         *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
1308         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1309         if (ufshcd_eh_in_progress(hba)) {
1310                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1311                 return 0;
1312         }
1313
1314         if (!hba->clk_scaling.active_reqs)
1315                 sched_clk_scaling_suspend_work = true;
1316
1317         if (list_empty(clk_list)) {
1318                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1319                 goto out;
1320         }
1321
1322         /* Decide based on the rounded-off frequency and update */
1323         scale_up = (*freq == clki->max_freq) ? true : false;
1324         if (!scale_up)
1325                 *freq = clki->min_freq;
1326         /* Update the frequency */
1327         if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1328                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1329                 ret = 0;
1330                 goto out; /* no state change required */
1331         }
1332         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1333
1334         start = ktime_get();
1335         ret = ufshcd_devfreq_scale(hba, scale_up);
1336
1337         trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1338                 (scale_up ? "up" : "down"),
1339                 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1340
1341 out:
1342         if (sched_clk_scaling_suspend_work)
1343                 queue_work(hba->clk_scaling.workq,
1344                            &hba->clk_scaling.suspend_work);
1345
1346         return ret;
1347 }
1348
1349 static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1350 {
1351         int *busy = priv;
1352
1353         WARN_ON_ONCE(reserved);
1354         (*busy)++;
1355         return false;
1356 }
1357
1358 /* Whether or not any tag is in use by a request that is in progress. */
1359 static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1360 {
1361         struct request_queue *q = hba->cmd_queue;
1362         int busy = 0;
1363
1364         blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1365         return busy;
1366 }
1367
1368 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1369                 struct devfreq_dev_status *stat)
1370 {
1371         struct ufs_hba *hba = dev_get_drvdata(dev);
1372         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1373         unsigned long flags;
1374         struct list_head *clk_list = &hba->clk_list_head;
1375         struct ufs_clk_info *clki;
1376         ktime_t curr_t;
1377
1378         if (!ufshcd_is_clkscaling_supported(hba))
1379                 return -EINVAL;
1380
1381         memset(stat, 0, sizeof(*stat));
1382
1383         spin_lock_irqsave(hba->host->host_lock, flags);
1384         curr_t = ktime_get();
1385         if (!scaling->window_start_t)
1386                 goto start_window;
1387
1388         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1389         /*
1390          * If current frequency is 0, then the ondemand governor considers
1391          * there's no initial frequency set. And it always requests to set
1392          * to max. frequency.
1393          */
1394         stat->current_frequency = clki->curr_freq;
1395         if (scaling->is_busy_started)
1396                 scaling->tot_busy_t += ktime_us_delta(curr_t,
1397                                 scaling->busy_start_t);
1398
1399         stat->total_time = ktime_us_delta(curr_t, scaling->window_start_t);
1400         stat->busy_time = scaling->tot_busy_t;
1401 start_window:
1402         scaling->window_start_t = curr_t;
1403         scaling->tot_busy_t = 0;
1404
1405         if (hba->outstanding_reqs) {
1406                 scaling->busy_start_t = curr_t;
1407                 scaling->is_busy_started = true;
1408         } else {
1409                 scaling->busy_start_t = 0;
1410                 scaling->is_busy_started = false;
1411         }
1412         spin_unlock_irqrestore(hba->host->host_lock, flags);
1413         return 0;
1414 }
1415
1416 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1417 {
1418         struct list_head *clk_list = &hba->clk_list_head;
1419         struct ufs_clk_info *clki;
1420         struct devfreq *devfreq;
1421         int ret;
1422
1423         /* Skip devfreq if we don't have any clocks in the list */
1424         if (list_empty(clk_list))
1425                 return 0;
1426
1427         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1428         dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1429         dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1430
1431         ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
1432                                          &hba->vps->ondemand_data);
1433         devfreq = devfreq_add_device(hba->dev,
1434                         &hba->vps->devfreq_profile,
1435                         DEVFREQ_GOV_SIMPLE_ONDEMAND,
1436                         &hba->vps->ondemand_data);
1437         if (IS_ERR(devfreq)) {
1438                 ret = PTR_ERR(devfreq);
1439                 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1440
1441                 dev_pm_opp_remove(hba->dev, clki->min_freq);
1442                 dev_pm_opp_remove(hba->dev, clki->max_freq);
1443                 return ret;
1444         }
1445
1446         hba->devfreq = devfreq;
1447
1448         return 0;
1449 }
1450
1451 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1452 {
1453         struct list_head *clk_list = &hba->clk_list_head;
1454         struct ufs_clk_info *clki;
1455
1456         if (!hba->devfreq)
1457                 return;
1458
1459         devfreq_remove_device(hba->devfreq);
1460         hba->devfreq = NULL;
1461
1462         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1463         dev_pm_opp_remove(hba->dev, clki->min_freq);
1464         dev_pm_opp_remove(hba->dev, clki->max_freq);
1465 }
1466
1467 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1468 {
1469         unsigned long flags;
1470
1471         devfreq_suspend_device(hba->devfreq);
1472         spin_lock_irqsave(hba->host->host_lock, flags);
1473         hba->clk_scaling.window_start_t = 0;
1474         spin_unlock_irqrestore(hba->host->host_lock, flags);
1475 }
1476
1477 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1478 {
1479         unsigned long flags;
1480         bool suspend = false;
1481
1482         cancel_work_sync(&hba->clk_scaling.suspend_work);
1483         cancel_work_sync(&hba->clk_scaling.resume_work);
1484
1485         spin_lock_irqsave(hba->host->host_lock, flags);
1486         if (!hba->clk_scaling.is_suspended) {
1487                 suspend = true;
1488                 hba->clk_scaling.is_suspended = true;
1489         }
1490         spin_unlock_irqrestore(hba->host->host_lock, flags);
1491
1492         if (suspend)
1493                 __ufshcd_suspend_clkscaling(hba);
1494 }
1495
1496 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1497 {
1498         unsigned long flags;
1499         bool resume = false;
1500
1501         spin_lock_irqsave(hba->host->host_lock, flags);
1502         if (hba->clk_scaling.is_suspended) {
1503                 resume = true;
1504                 hba->clk_scaling.is_suspended = false;
1505         }
1506         spin_unlock_irqrestore(hba->host->host_lock, flags);
1507
1508         if (resume)
1509                 devfreq_resume_device(hba->devfreq);
1510 }
1511
1512 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1513                 struct device_attribute *attr, char *buf)
1514 {
1515         struct ufs_hba *hba = dev_get_drvdata(dev);
1516
1517         return sysfs_emit(buf, "%d\n", hba->clk_scaling.is_enabled);
1518 }
1519
1520 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1521                 struct device_attribute *attr, const char *buf, size_t count)
1522 {
1523         struct ufs_hba *hba = dev_get_drvdata(dev);
1524         u32 value;
1525         int err = 0;
1526
1527         if (kstrtou32(buf, 0, &value))
1528                 return -EINVAL;
1529
1530         down(&hba->host_sem);
1531         if (!ufshcd_is_user_access_allowed(hba)) {
1532                 err = -EBUSY;
1533                 goto out;
1534         }
1535
1536         value = !!value;
1537         if (value == hba->clk_scaling.is_enabled)
1538                 goto out;
1539
1540         ufshcd_rpm_get_sync(hba);
1541         ufshcd_hold(hba, false);
1542
1543         hba->clk_scaling.is_enabled = value;
1544
1545         if (value) {
1546                 ufshcd_resume_clkscaling(hba);
1547         } else {
1548                 ufshcd_suspend_clkscaling(hba);
1549                 err = ufshcd_devfreq_scale(hba, true);
1550                 if (err)
1551                         dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1552                                         __func__, err);
1553         }
1554
1555         ufshcd_release(hba);
1556         ufshcd_rpm_put_sync(hba);
1557 out:
1558         up(&hba->host_sem);
1559         return err ? err : count;
1560 }
1561
1562 static void ufshcd_init_clk_scaling_sysfs(struct ufs_hba *hba)
1563 {
1564         hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1565         hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1566         sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1567         hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1568         hba->clk_scaling.enable_attr.attr.mode = 0644;
1569         if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1570                 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1571 }
1572
1573 static void ufshcd_remove_clk_scaling_sysfs(struct ufs_hba *hba)
1574 {
1575         if (hba->clk_scaling.enable_attr.attr.name)
1576                 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
1577 }
1578
1579 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1580 {
1581         char wq_name[sizeof("ufs_clkscaling_00")];
1582
1583         if (!ufshcd_is_clkscaling_supported(hba))
1584                 return;
1585
1586         if (!hba->clk_scaling.min_gear)
1587                 hba->clk_scaling.min_gear = UFS_HS_G1;
1588
1589         INIT_WORK(&hba->clk_scaling.suspend_work,
1590                   ufshcd_clk_scaling_suspend_work);
1591         INIT_WORK(&hba->clk_scaling.resume_work,
1592                   ufshcd_clk_scaling_resume_work);
1593
1594         snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1595                  hba->host->host_no);
1596         hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1597
1598         hba->clk_scaling.is_initialized = true;
1599 }
1600
1601 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1602 {
1603         if (!hba->clk_scaling.is_initialized)
1604                 return;
1605
1606         ufshcd_remove_clk_scaling_sysfs(hba);
1607         destroy_workqueue(hba->clk_scaling.workq);
1608         ufshcd_devfreq_remove(hba);
1609         hba->clk_scaling.is_initialized = false;
1610 }
1611
1612 static void ufshcd_ungate_work(struct work_struct *work)
1613 {
1614         int ret;
1615         unsigned long flags;
1616         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1617                         clk_gating.ungate_work);
1618
1619         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1620
1621         spin_lock_irqsave(hba->host->host_lock, flags);
1622         if (hba->clk_gating.state == CLKS_ON) {
1623                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1624                 goto unblock_reqs;
1625         }
1626
1627         spin_unlock_irqrestore(hba->host->host_lock, flags);
1628         ufshcd_hba_vreg_set_hpm(hba);
1629         ufshcd_setup_clocks(hba, true);
1630
1631         ufshcd_enable_irq(hba);
1632
1633         /* Exit from hibern8 */
1634         if (ufshcd_can_hibern8_during_gating(hba)) {
1635                 /* Prevent gating in this path */
1636                 hba->clk_gating.is_suspended = true;
1637                 if (ufshcd_is_link_hibern8(hba)) {
1638                         ret = ufshcd_uic_hibern8_exit(hba);
1639                         if (ret)
1640                                 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1641                                         __func__, ret);
1642                         else
1643                                 ufshcd_set_link_active(hba);
1644                 }
1645                 hba->clk_gating.is_suspended = false;
1646         }
1647 unblock_reqs:
1648         ufshcd_scsi_unblock_requests(hba);
1649 }
1650
1651 /**
1652  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1653  * Also, exit from hibern8 mode and set the link as active.
1654  * @hba: per adapter instance
1655  * @async: This indicates whether caller should ungate clocks asynchronously.
1656  */
1657 int ufshcd_hold(struct ufs_hba *hba, bool async)
1658 {
1659         int rc = 0;
1660         bool flush_result;
1661         unsigned long flags;
1662
1663         if (!ufshcd_is_clkgating_allowed(hba))
1664                 goto out;
1665         spin_lock_irqsave(hba->host->host_lock, flags);
1666         hba->clk_gating.active_reqs++;
1667
1668 start:
1669         switch (hba->clk_gating.state) {
1670         case CLKS_ON:
1671                 /*
1672                  * Wait for the ungate work to complete if in progress.
1673                  * Though the clocks may be in ON state, the link could
1674                  * still be in hibner8 state if hibern8 is allowed
1675                  * during clock gating.
1676                  * Make sure we exit hibern8 state also in addition to
1677                  * clocks being ON.
1678                  */
1679                 if (ufshcd_can_hibern8_during_gating(hba) &&
1680                     ufshcd_is_link_hibern8(hba)) {
1681                         if (async) {
1682                                 rc = -EAGAIN;
1683                                 hba->clk_gating.active_reqs--;
1684                                 break;
1685                         }
1686                         spin_unlock_irqrestore(hba->host->host_lock, flags);
1687                         flush_result = flush_work(&hba->clk_gating.ungate_work);
1688                         if (hba->clk_gating.is_suspended && !flush_result)
1689                                 goto out;
1690                         spin_lock_irqsave(hba->host->host_lock, flags);
1691                         goto start;
1692                 }
1693                 break;
1694         case REQ_CLKS_OFF:
1695                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1696                         hba->clk_gating.state = CLKS_ON;
1697                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1698                                                 hba->clk_gating.state);
1699                         break;
1700                 }
1701                 /*
1702                  * If we are here, it means gating work is either done or
1703                  * currently running. Hence, fall through to cancel gating
1704                  * work and to enable clocks.
1705                  */
1706                 fallthrough;
1707         case CLKS_OFF:
1708                 hba->clk_gating.state = REQ_CLKS_ON;
1709                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1710                                         hba->clk_gating.state);
1711                 if (queue_work(hba->clk_gating.clk_gating_workq,
1712                                &hba->clk_gating.ungate_work))
1713                         ufshcd_scsi_block_requests(hba);
1714                 /*
1715                  * fall through to check if we should wait for this
1716                  * work to be done or not.
1717                  */
1718                 fallthrough;
1719         case REQ_CLKS_ON:
1720                 if (async) {
1721                         rc = -EAGAIN;
1722                         hba->clk_gating.active_reqs--;
1723                         break;
1724                 }
1725
1726                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1727                 flush_work(&hba->clk_gating.ungate_work);
1728                 /* Make sure state is CLKS_ON before returning */
1729                 spin_lock_irqsave(hba->host->host_lock, flags);
1730                 goto start;
1731         default:
1732                 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1733                                 __func__, hba->clk_gating.state);
1734                 break;
1735         }
1736         spin_unlock_irqrestore(hba->host->host_lock, flags);
1737 out:
1738         return rc;
1739 }
1740 EXPORT_SYMBOL_GPL(ufshcd_hold);
1741
1742 static void ufshcd_gate_work(struct work_struct *work)
1743 {
1744         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1745                         clk_gating.gate_work.work);
1746         unsigned long flags;
1747         int ret;
1748
1749         spin_lock_irqsave(hba->host->host_lock, flags);
1750         /*
1751          * In case you are here to cancel this work the gating state
1752          * would be marked as REQ_CLKS_ON. In this case save time by
1753          * skipping the gating work and exit after changing the clock
1754          * state to CLKS_ON.
1755          */
1756         if (hba->clk_gating.is_suspended ||
1757                 (hba->clk_gating.state != REQ_CLKS_OFF)) {
1758                 hba->clk_gating.state = CLKS_ON;
1759                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1760                                         hba->clk_gating.state);
1761                 goto rel_lock;
1762         }
1763
1764         if (hba->clk_gating.active_reqs
1765                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1766                 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1767                 || hba->active_uic_cmd || hba->uic_async_done)
1768                 goto rel_lock;
1769
1770         spin_unlock_irqrestore(hba->host->host_lock, flags);
1771
1772         /* put the link into hibern8 mode before turning off clocks */
1773         if (ufshcd_can_hibern8_during_gating(hba)) {
1774                 ret = ufshcd_uic_hibern8_enter(hba);
1775                 if (ret) {
1776                         hba->clk_gating.state = CLKS_ON;
1777                         dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
1778                                         __func__, ret);
1779                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1780                                                 hba->clk_gating.state);
1781                         goto out;
1782                 }
1783                 ufshcd_set_link_hibern8(hba);
1784         }
1785
1786         ufshcd_disable_irq(hba);
1787
1788         ufshcd_setup_clocks(hba, false);
1789
1790         /* Put the host controller in low power mode if possible */
1791         ufshcd_hba_vreg_set_lpm(hba);
1792         /*
1793          * In case you are here to cancel this work the gating state
1794          * would be marked as REQ_CLKS_ON. In this case keep the state
1795          * as REQ_CLKS_ON which would anyway imply that clocks are off
1796          * and a request to turn them on is pending. By doing this way,
1797          * we keep the state machine in tact and this would ultimately
1798          * prevent from doing cancel work multiple times when there are
1799          * new requests arriving before the current cancel work is done.
1800          */
1801         spin_lock_irqsave(hba->host->host_lock, flags);
1802         if (hba->clk_gating.state == REQ_CLKS_OFF) {
1803                 hba->clk_gating.state = CLKS_OFF;
1804                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1805                                         hba->clk_gating.state);
1806         }
1807 rel_lock:
1808         spin_unlock_irqrestore(hba->host->host_lock, flags);
1809 out:
1810         return;
1811 }
1812
1813 /* host lock must be held before calling this variant */
1814 static void __ufshcd_release(struct ufs_hba *hba)
1815 {
1816         if (!ufshcd_is_clkgating_allowed(hba))
1817                 return;
1818
1819         hba->clk_gating.active_reqs--;
1820
1821         if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended ||
1822             hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL ||
1823             hba->outstanding_tasks ||
1824             hba->active_uic_cmd || hba->uic_async_done ||
1825             hba->clk_gating.state == CLKS_OFF)
1826                 return;
1827
1828         hba->clk_gating.state = REQ_CLKS_OFF;
1829         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1830         queue_delayed_work(hba->clk_gating.clk_gating_workq,
1831                            &hba->clk_gating.gate_work,
1832                            msecs_to_jiffies(hba->clk_gating.delay_ms));
1833 }
1834
1835 void ufshcd_release(struct ufs_hba *hba)
1836 {
1837         unsigned long flags;
1838
1839         spin_lock_irqsave(hba->host->host_lock, flags);
1840         __ufshcd_release(hba);
1841         spin_unlock_irqrestore(hba->host->host_lock, flags);
1842 }
1843 EXPORT_SYMBOL_GPL(ufshcd_release);
1844
1845 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1846                 struct device_attribute *attr, char *buf)
1847 {
1848         struct ufs_hba *hba = dev_get_drvdata(dev);
1849
1850         return sysfs_emit(buf, "%lu\n", hba->clk_gating.delay_ms);
1851 }
1852
1853 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1854                 struct device_attribute *attr, const char *buf, size_t count)
1855 {
1856         struct ufs_hba *hba = dev_get_drvdata(dev);
1857         unsigned long flags, value;
1858
1859         if (kstrtoul(buf, 0, &value))
1860                 return -EINVAL;
1861
1862         spin_lock_irqsave(hba->host->host_lock, flags);
1863         hba->clk_gating.delay_ms = value;
1864         spin_unlock_irqrestore(hba->host->host_lock, flags);
1865         return count;
1866 }
1867
1868 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1869                 struct device_attribute *attr, char *buf)
1870 {
1871         struct ufs_hba *hba = dev_get_drvdata(dev);
1872
1873         return sysfs_emit(buf, "%d\n", hba->clk_gating.is_enabled);
1874 }
1875
1876 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1877                 struct device_attribute *attr, const char *buf, size_t count)
1878 {
1879         struct ufs_hba *hba = dev_get_drvdata(dev);
1880         unsigned long flags;
1881         u32 value;
1882
1883         if (kstrtou32(buf, 0, &value))
1884                 return -EINVAL;
1885
1886         value = !!value;
1887
1888         spin_lock_irqsave(hba->host->host_lock, flags);
1889         if (value == hba->clk_gating.is_enabled)
1890                 goto out;
1891
1892         if (value)
1893                 __ufshcd_release(hba);
1894         else
1895                 hba->clk_gating.active_reqs++;
1896
1897         hba->clk_gating.is_enabled = value;
1898 out:
1899         spin_unlock_irqrestore(hba->host->host_lock, flags);
1900         return count;
1901 }
1902
1903 static void ufshcd_init_clk_gating_sysfs(struct ufs_hba *hba)
1904 {
1905         hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1906         hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1907         sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1908         hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1909         hba->clk_gating.delay_attr.attr.mode = 0644;
1910         if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1911                 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1912
1913         hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1914         hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1915         sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1916         hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1917         hba->clk_gating.enable_attr.attr.mode = 0644;
1918         if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1919                 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1920 }
1921
1922 static void ufshcd_remove_clk_gating_sysfs(struct ufs_hba *hba)
1923 {
1924         if (hba->clk_gating.delay_attr.attr.name)
1925                 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1926         if (hba->clk_gating.enable_attr.attr.name)
1927                 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1928 }
1929
1930 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1931 {
1932         char wq_name[sizeof("ufs_clk_gating_00")];
1933
1934         if (!ufshcd_is_clkgating_allowed(hba))
1935                 return;
1936
1937         hba->clk_gating.state = CLKS_ON;
1938
1939         hba->clk_gating.delay_ms = 150;
1940         INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1941         INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1942
1943         snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1944                  hba->host->host_no);
1945         hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1946                                         WQ_MEM_RECLAIM | WQ_HIGHPRI);
1947
1948         ufshcd_init_clk_gating_sysfs(hba);
1949
1950         hba->clk_gating.is_enabled = true;
1951         hba->clk_gating.is_initialized = true;
1952 }
1953
1954 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1955 {
1956         if (!hba->clk_gating.is_initialized)
1957                 return;
1958         ufshcd_remove_clk_gating_sysfs(hba);
1959         cancel_work_sync(&hba->clk_gating.ungate_work);
1960         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1961         destroy_workqueue(hba->clk_gating.clk_gating_workq);
1962         hba->clk_gating.is_initialized = false;
1963 }
1964
1965 /* Must be called with host lock acquired */
1966 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1967 {
1968         bool queue_resume_work = false;
1969         ktime_t curr_t = ktime_get();
1970         unsigned long flags;
1971
1972         if (!ufshcd_is_clkscaling_supported(hba))
1973                 return;
1974
1975         spin_lock_irqsave(hba->host->host_lock, flags);
1976         if (!hba->clk_scaling.active_reqs++)
1977                 queue_resume_work = true;
1978
1979         if (!hba->clk_scaling.is_enabled || hba->pm_op_in_progress) {
1980                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1981                 return;
1982         }
1983
1984         if (queue_resume_work)
1985                 queue_work(hba->clk_scaling.workq,
1986                            &hba->clk_scaling.resume_work);
1987
1988         if (!hba->clk_scaling.window_start_t) {
1989                 hba->clk_scaling.window_start_t = curr_t;
1990                 hba->clk_scaling.tot_busy_t = 0;
1991                 hba->clk_scaling.is_busy_started = false;
1992         }
1993
1994         if (!hba->clk_scaling.is_busy_started) {
1995                 hba->clk_scaling.busy_start_t = curr_t;
1996                 hba->clk_scaling.is_busy_started = true;
1997         }
1998         spin_unlock_irqrestore(hba->host->host_lock, flags);
1999 }
2000
2001 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
2002 {
2003         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
2004         unsigned long flags;
2005
2006         if (!ufshcd_is_clkscaling_supported(hba))
2007                 return;
2008
2009         spin_lock_irqsave(hba->host->host_lock, flags);
2010         hba->clk_scaling.active_reqs--;
2011         if (!hba->outstanding_reqs && scaling->is_busy_started) {
2012                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
2013                                         scaling->busy_start_t));
2014                 scaling->busy_start_t = 0;
2015                 scaling->is_busy_started = false;
2016         }
2017         spin_unlock_irqrestore(hba->host->host_lock, flags);
2018 }
2019
2020 static inline int ufshcd_monitor_opcode2dir(u8 opcode)
2021 {
2022         if (opcode == READ_6 || opcode == READ_10 || opcode == READ_16)
2023                 return READ;
2024         else if (opcode == WRITE_6 || opcode == WRITE_10 || opcode == WRITE_16)
2025                 return WRITE;
2026         else
2027                 return -EINVAL;
2028 }
2029
2030 static inline bool ufshcd_should_inform_monitor(struct ufs_hba *hba,
2031                                                 struct ufshcd_lrb *lrbp)
2032 {
2033         struct ufs_hba_monitor *m = &hba->monitor;
2034
2035         return (m->enabled && lrbp && lrbp->cmd &&
2036                 (!m->chunk_size || m->chunk_size == lrbp->cmd->sdb.length) &&
2037                 ktime_before(hba->monitor.enabled_ts, lrbp->issue_time_stamp));
2038 }
2039
2040 static void ufshcd_start_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2041 {
2042         int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
2043         unsigned long flags;
2044
2045         spin_lock_irqsave(hba->host->host_lock, flags);
2046         if (dir >= 0 && hba->monitor.nr_queued[dir]++ == 0)
2047                 hba->monitor.busy_start_ts[dir] = ktime_get();
2048         spin_unlock_irqrestore(hba->host->host_lock, flags);
2049 }
2050
2051 static void ufshcd_update_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2052 {
2053         int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
2054         unsigned long flags;
2055
2056         spin_lock_irqsave(hba->host->host_lock, flags);
2057         if (dir >= 0 && hba->monitor.nr_queued[dir] > 0) {
2058                 struct request *req = scsi_cmd_to_rq(lrbp->cmd);
2059                 struct ufs_hba_monitor *m = &hba->monitor;
2060                 ktime_t now, inc, lat;
2061
2062                 now = lrbp->compl_time_stamp;
2063                 inc = ktime_sub(now, m->busy_start_ts[dir]);
2064                 m->total_busy[dir] = ktime_add(m->total_busy[dir], inc);
2065                 m->nr_sec_rw[dir] += blk_rq_sectors(req);
2066
2067                 /* Update latencies */
2068                 m->nr_req[dir]++;
2069                 lat = ktime_sub(now, lrbp->issue_time_stamp);
2070                 m->lat_sum[dir] += lat;
2071                 if (m->lat_max[dir] < lat || !m->lat_max[dir])
2072                         m->lat_max[dir] = lat;
2073                 if (m->lat_min[dir] > lat || !m->lat_min[dir])
2074                         m->lat_min[dir] = lat;
2075
2076                 m->nr_queued[dir]--;
2077                 /* Push forward the busy start of monitor */
2078                 m->busy_start_ts[dir] = now;
2079         }
2080         spin_unlock_irqrestore(hba->host->host_lock, flags);
2081 }
2082
2083 /**
2084  * ufshcd_send_command - Send SCSI or device management commands
2085  * @hba: per adapter instance
2086  * @task_tag: Task tag of the command
2087  */
2088 static inline
2089 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
2090 {
2091         struct ufshcd_lrb *lrbp = &hba->lrb[task_tag];
2092         unsigned long flags;
2093
2094         lrbp->issue_time_stamp = ktime_get();
2095         lrbp->compl_time_stamp = ktime_set(0, 0);
2096         ufshcd_add_command_trace(hba, task_tag, UFS_CMD_SEND);
2097         ufshcd_clk_scaling_start_busy(hba);
2098         if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
2099                 ufshcd_start_monitor(hba, lrbp);
2100
2101         spin_lock_irqsave(&hba->outstanding_lock, flags);
2102         if (hba->vops && hba->vops->setup_xfer_req)
2103                 hba->vops->setup_xfer_req(hba, task_tag, !!lrbp->cmd);
2104         __set_bit(task_tag, &hba->outstanding_reqs);
2105         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
2106         spin_unlock_irqrestore(&hba->outstanding_lock, flags);
2107
2108         /* Make sure that doorbell is committed immediately */
2109         wmb();
2110 }
2111
2112 /**
2113  * ufshcd_copy_sense_data - Copy sense data in case of check condition
2114  * @lrbp: pointer to local reference block
2115  */
2116 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2117 {
2118         int len;
2119         if (lrbp->sense_buffer &&
2120             ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
2121                 int len_to_copy;
2122
2123                 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
2124                 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
2125
2126                 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
2127                        len_to_copy);
2128         }
2129 }
2130
2131 /**
2132  * ufshcd_copy_query_response() - Copy the Query Response and the data
2133  * descriptor
2134  * @hba: per adapter instance
2135  * @lrbp: pointer to local reference block
2136  */
2137 static
2138 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2139 {
2140         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2141
2142         memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
2143
2144         /* Get the descriptor */
2145         if (hba->dev_cmd.query.descriptor &&
2146             lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
2147                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
2148                                 GENERAL_UPIU_REQUEST_SIZE;
2149                 u16 resp_len;
2150                 u16 buf_len;
2151
2152                 /* data segment length */
2153                 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
2154                                                 MASK_QUERY_DATA_SEG_LEN;
2155                 buf_len = be16_to_cpu(
2156                                 hba->dev_cmd.query.request.upiu_req.length);
2157                 if (likely(buf_len >= resp_len)) {
2158                         memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2159                 } else {
2160                         dev_warn(hba->dev,
2161                                  "%s: rsp size %d is bigger than buffer size %d",
2162                                  __func__, resp_len, buf_len);
2163                         return -EINVAL;
2164                 }
2165         }
2166
2167         return 0;
2168 }
2169
2170 /**
2171  * ufshcd_hba_capabilities - Read controller capabilities
2172  * @hba: per adapter instance
2173  *
2174  * Return: 0 on success, negative on error.
2175  */
2176 static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
2177 {
2178         int err;
2179
2180         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
2181
2182         /* nutrs and nutmrs are 0 based values */
2183         hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2184         hba->nutmrs =
2185         ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2186
2187         /* Read crypto capabilities */
2188         err = ufshcd_hba_init_crypto_capabilities(hba);
2189         if (err)
2190                 dev_err(hba->dev, "crypto setup failed\n");
2191
2192         return err;
2193 }
2194
2195 /**
2196  * ufshcd_ready_for_uic_cmd - Check if controller is ready
2197  *                            to accept UIC commands
2198  * @hba: per adapter instance
2199  * Return true on success, else false
2200  */
2201 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2202 {
2203         if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2204                 return true;
2205         else
2206                 return false;
2207 }
2208
2209 /**
2210  * ufshcd_get_upmcrs - Get the power mode change request status
2211  * @hba: Pointer to adapter instance
2212  *
2213  * This function gets the UPMCRS field of HCS register
2214  * Returns value of UPMCRS field
2215  */
2216 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2217 {
2218         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2219 }
2220
2221 /**
2222  * ufshcd_dispatch_uic_cmd - Dispatch an UIC command to the Unipro layer
2223  * @hba: per adapter instance
2224  * @uic_cmd: UIC command
2225  */
2226 static inline void
2227 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2228 {
2229         lockdep_assert_held(&hba->uic_cmd_mutex);
2230
2231         WARN_ON(hba->active_uic_cmd);
2232
2233         hba->active_uic_cmd = uic_cmd;
2234
2235         /* Write Args */
2236         ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2237         ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2238         ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2239
2240         ufshcd_add_uic_command_trace(hba, uic_cmd, UFS_CMD_SEND);
2241
2242         /* Write UIC Cmd */
2243         ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2244                       REG_UIC_COMMAND);
2245 }
2246
2247 /**
2248  * ufshcd_wait_for_uic_cmd - Wait for completion of an UIC command
2249  * @hba: per adapter instance
2250  * @uic_cmd: UIC command
2251  *
2252  * Returns 0 only if success.
2253  */
2254 static int
2255 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2256 {
2257         int ret;
2258         unsigned long flags;
2259
2260         lockdep_assert_held(&hba->uic_cmd_mutex);
2261
2262         if (wait_for_completion_timeout(&uic_cmd->done,
2263                                         msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
2264                 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2265         } else {
2266                 ret = -ETIMEDOUT;
2267                 dev_err(hba->dev,
2268                         "uic cmd 0x%x with arg3 0x%x completion timeout\n",
2269                         uic_cmd->command, uic_cmd->argument3);
2270
2271                 if (!uic_cmd->cmd_active) {
2272                         dev_err(hba->dev, "%s: UIC cmd has been completed, return the result\n",
2273                                 __func__);
2274                         ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2275                 }
2276         }
2277
2278         spin_lock_irqsave(hba->host->host_lock, flags);
2279         hba->active_uic_cmd = NULL;
2280         spin_unlock_irqrestore(hba->host->host_lock, flags);
2281
2282         return ret;
2283 }
2284
2285 /**
2286  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2287  * @hba: per adapter instance
2288  * @uic_cmd: UIC command
2289  * @completion: initialize the completion only if this is set to true
2290  *
2291  * Returns 0 only if success.
2292  */
2293 static int
2294 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2295                       bool completion)
2296 {
2297         lockdep_assert_held(&hba->uic_cmd_mutex);
2298         lockdep_assert_held(hba->host->host_lock);
2299
2300         if (!ufshcd_ready_for_uic_cmd(hba)) {
2301                 dev_err(hba->dev,
2302                         "Controller not ready to accept UIC commands\n");
2303                 return -EIO;
2304         }
2305
2306         if (completion)
2307                 init_completion(&uic_cmd->done);
2308
2309         uic_cmd->cmd_active = 1;
2310         ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2311
2312         return 0;
2313 }
2314
2315 /**
2316  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2317  * @hba: per adapter instance
2318  * @uic_cmd: UIC command
2319  *
2320  * Returns 0 only if success.
2321  */
2322 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2323 {
2324         int ret;
2325         unsigned long flags;
2326
2327         ufshcd_hold(hba, false);
2328         mutex_lock(&hba->uic_cmd_mutex);
2329         ufshcd_add_delay_before_dme_cmd(hba);
2330
2331         spin_lock_irqsave(hba->host->host_lock, flags);
2332         ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2333         spin_unlock_irqrestore(hba->host->host_lock, flags);
2334         if (!ret)
2335                 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2336
2337         mutex_unlock(&hba->uic_cmd_mutex);
2338
2339         ufshcd_release(hba);
2340         return ret;
2341 }
2342
2343 /**
2344  * ufshcd_map_sg - Map scatter-gather list to prdt
2345  * @hba: per adapter instance
2346  * @lrbp: pointer to local reference block
2347  *
2348  * Returns 0 in case of success, non-zero value in case of failure
2349  */
2350 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2351 {
2352         struct ufshcd_sg_entry *prd_table;
2353         struct scatterlist *sg;
2354         struct scsi_cmnd *cmd;
2355         int sg_segments;
2356         int i;
2357
2358         cmd = lrbp->cmd;
2359         sg_segments = scsi_dma_map(cmd);
2360         if (sg_segments < 0)
2361                 return sg_segments;
2362
2363         if (sg_segments) {
2364
2365                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2366                         lrbp->utr_descriptor_ptr->prd_table_length =
2367                                 cpu_to_le16((sg_segments *
2368                                         sizeof(struct ufshcd_sg_entry)));
2369                 else
2370                         lrbp->utr_descriptor_ptr->prd_table_length =
2371                                 cpu_to_le16((u16) (sg_segments));
2372
2373                 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2374
2375                 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2376                         prd_table[i].size  =
2377                                 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2378                         prd_table[i].base_addr =
2379                                 cpu_to_le32(lower_32_bits(sg->dma_address));
2380                         prd_table[i].upper_addr =
2381                                 cpu_to_le32(upper_32_bits(sg->dma_address));
2382                         prd_table[i].reserved = 0;
2383                 }
2384         } else {
2385                 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2386         }
2387
2388         return 0;
2389 }
2390
2391 /**
2392  * ufshcd_enable_intr - enable interrupts
2393  * @hba: per adapter instance
2394  * @intrs: interrupt bits
2395  */
2396 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2397 {
2398         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2399
2400         if (hba->ufs_version == ufshci_version(1, 0)) {
2401                 u32 rw;
2402                 rw = set & INTERRUPT_MASK_RW_VER_10;
2403                 set = rw | ((set ^ intrs) & intrs);
2404         } else {
2405                 set |= intrs;
2406         }
2407
2408         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2409 }
2410
2411 /**
2412  * ufshcd_disable_intr - disable interrupts
2413  * @hba: per adapter instance
2414  * @intrs: interrupt bits
2415  */
2416 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2417 {
2418         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2419
2420         if (hba->ufs_version == ufshci_version(1, 0)) {
2421                 u32 rw;
2422                 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2423                         ~(intrs & INTERRUPT_MASK_RW_VER_10);
2424                 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2425
2426         } else {
2427                 set &= ~intrs;
2428         }
2429
2430         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2431 }
2432
2433 /**
2434  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2435  * descriptor according to request
2436  * @lrbp: pointer to local reference block
2437  * @upiu_flags: flags required in the header
2438  * @cmd_dir: requests data direction
2439  */
2440 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2441                         u8 *upiu_flags, enum dma_data_direction cmd_dir)
2442 {
2443         struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2444         u32 data_direction;
2445         u32 dword_0;
2446         u32 dword_1 = 0;
2447         u32 dword_3 = 0;
2448
2449         if (cmd_dir == DMA_FROM_DEVICE) {
2450                 data_direction = UTP_DEVICE_TO_HOST;
2451                 *upiu_flags = UPIU_CMD_FLAGS_READ;
2452         } else if (cmd_dir == DMA_TO_DEVICE) {
2453                 data_direction = UTP_HOST_TO_DEVICE;
2454                 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2455         } else {
2456                 data_direction = UTP_NO_DATA_TRANSFER;
2457                 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2458         }
2459
2460         dword_0 = data_direction | (lrbp->command_type
2461                                 << UPIU_COMMAND_TYPE_OFFSET);
2462         if (lrbp->intr_cmd)
2463                 dword_0 |= UTP_REQ_DESC_INT_CMD;
2464
2465         /* Prepare crypto related dwords */
2466         ufshcd_prepare_req_desc_hdr_crypto(lrbp, &dword_0, &dword_1, &dword_3);
2467
2468         /* Transfer request descriptor header fields */
2469         req_desc->header.dword_0 = cpu_to_le32(dword_0);
2470         req_desc->header.dword_1 = cpu_to_le32(dword_1);
2471         /*
2472          * assigning invalid value for command status. Controller
2473          * updates OCS on command completion, with the command
2474          * status
2475          */
2476         req_desc->header.dword_2 =
2477                 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2478         req_desc->header.dword_3 = cpu_to_le32(dword_3);
2479
2480         req_desc->prd_table_length = 0;
2481 }
2482
2483 /**
2484  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2485  * for scsi commands
2486  * @lrbp: local reference block pointer
2487  * @upiu_flags: flags
2488  */
2489 static
2490 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u8 upiu_flags)
2491 {
2492         struct scsi_cmnd *cmd = lrbp->cmd;
2493         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2494         unsigned short cdb_len;
2495
2496         /* command descriptor fields */
2497         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2498                                 UPIU_TRANSACTION_COMMAND, upiu_flags,
2499                                 lrbp->lun, lrbp->task_tag);
2500         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2501                                 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2502
2503         /* Total EHS length and Data segment length will be zero */
2504         ucd_req_ptr->header.dword_2 = 0;
2505
2506         ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
2507
2508         cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
2509         memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2510         memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
2511
2512         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2513 }
2514
2515 /**
2516  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2517  * for query requsts
2518  * @hba: UFS hba
2519  * @lrbp: local reference block pointer
2520  * @upiu_flags: flags
2521  */
2522 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2523                                 struct ufshcd_lrb *lrbp, u8 upiu_flags)
2524 {
2525         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2526         struct ufs_query *query = &hba->dev_cmd.query;
2527         u16 len = be16_to_cpu(query->request.upiu_req.length);
2528
2529         /* Query request header */
2530         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2531                         UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2532                         lrbp->lun, lrbp->task_tag);
2533         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2534                         0, query->request.query_func, 0, 0);
2535
2536         /* Data segment length only need for WRITE_DESC */
2537         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2538                 ucd_req_ptr->header.dword_2 =
2539                         UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2540         else
2541                 ucd_req_ptr->header.dword_2 = 0;
2542
2543         /* Copy the Query Request buffer as is */
2544         memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2545                         QUERY_OSF_SIZE);
2546
2547         /* Copy the Descriptor */
2548         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2549                 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2550
2551         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2552 }
2553
2554 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2555 {
2556         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2557
2558         memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2559
2560         /* command descriptor fields */
2561         ucd_req_ptr->header.dword_0 =
2562                 UPIU_HEADER_DWORD(
2563                         UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2564         /* clear rest of the fields of basic header */
2565         ucd_req_ptr->header.dword_1 = 0;
2566         ucd_req_ptr->header.dword_2 = 0;
2567
2568         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2569 }
2570
2571 /**
2572  * ufshcd_compose_devman_upiu - UFS Protocol Information Unit(UPIU)
2573  *                           for Device Management Purposes
2574  * @hba: per adapter instance
2575  * @lrbp: pointer to local reference block
2576  */
2577 static int ufshcd_compose_devman_upiu(struct ufs_hba *hba,
2578                                       struct ufshcd_lrb *lrbp)
2579 {
2580         u8 upiu_flags;
2581         int ret = 0;
2582
2583         if (hba->ufs_version <= ufshci_version(1, 1))
2584                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2585         else
2586                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2587
2588         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2589         if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2590                 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2591         else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2592                 ufshcd_prepare_utp_nop_upiu(lrbp);
2593         else
2594                 ret = -EINVAL;
2595
2596         return ret;
2597 }
2598
2599 /**
2600  * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2601  *                         for SCSI Purposes
2602  * @hba: per adapter instance
2603  * @lrbp: pointer to local reference block
2604  */
2605 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2606 {
2607         u8 upiu_flags;
2608         int ret = 0;
2609
2610         if (hba->ufs_version <= ufshci_version(1, 1))
2611                 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2612         else
2613                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2614
2615         if (likely(lrbp->cmd)) {
2616                 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2617                                                 lrbp->cmd->sc_data_direction);
2618                 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2619         } else {
2620                 ret = -EINVAL;
2621         }
2622
2623         return ret;
2624 }
2625
2626 /**
2627  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2628  * @upiu_wlun_id: UPIU W-LUN id
2629  *
2630  * Returns SCSI W-LUN id
2631  */
2632 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2633 {
2634         return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2635 }
2636
2637 static inline bool is_rpmb_wlun(struct scsi_device *sdev)
2638 {
2639         return sdev->lun == ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN);
2640 }
2641
2642 static inline bool is_device_wlun(struct scsi_device *sdev)
2643 {
2644         return sdev->lun ==
2645                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN);
2646 }
2647
2648 static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2649 {
2650         struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2651         struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2652         dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2653                 i * sizeof(struct utp_transfer_cmd_desc);
2654         u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2655                                        response_upiu);
2656         u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2657
2658         lrb->utr_descriptor_ptr = utrdlp + i;
2659         lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2660                 i * sizeof(struct utp_transfer_req_desc);
2661         lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2662         lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2663         lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2664         lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2665         lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2666         lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2667 }
2668
2669 /**
2670  * ufshcd_queuecommand - main entry point for SCSI requests
2671  * @host: SCSI host pointer
2672  * @cmd: command from SCSI Midlayer
2673  *
2674  * Returns 0 for success, non-zero in case of failure
2675  */
2676 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2677 {
2678         struct ufs_hba *hba = shost_priv(host);
2679         int tag = scsi_cmd_to_rq(cmd)->tag;
2680         struct ufshcd_lrb *lrbp;
2681         int err = 0;
2682
2683         WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
2684
2685         if (!down_read_trylock(&hba->clk_scaling_lock))
2686                 return SCSI_MLQUEUE_HOST_BUSY;
2687
2688         switch (hba->ufshcd_state) {
2689         case UFSHCD_STATE_OPERATIONAL:
2690         case UFSHCD_STATE_EH_SCHEDULED_NON_FATAL:
2691                 break;
2692         case UFSHCD_STATE_EH_SCHEDULED_FATAL:
2693                 /*
2694                  * pm_runtime_get_sync() is used at error handling preparation
2695                  * stage. If a scsi cmd, e.g. the SSU cmd, is sent from hba's
2696                  * PM ops, it can never be finished if we let SCSI layer keep
2697                  * retrying it, which gets err handler stuck forever. Neither
2698                  * can we let the scsi cmd pass through, because UFS is in bad
2699                  * state, the scsi cmd may eventually time out, which will get
2700                  * err handler blocked for too long. So, just fail the scsi cmd
2701                  * sent from PM ops, err handler can recover PM error anyways.
2702                  */
2703                 if (hba->pm_op_in_progress) {
2704                         hba->force_reset = true;
2705                         set_host_byte(cmd, DID_BAD_TARGET);
2706                         cmd->scsi_done(cmd);
2707                         goto out;
2708                 }
2709                 fallthrough;
2710         case UFSHCD_STATE_RESET:
2711                 err = SCSI_MLQUEUE_HOST_BUSY;
2712                 goto out;
2713         case UFSHCD_STATE_ERROR:
2714                 set_host_byte(cmd, DID_ERROR);
2715                 cmd->scsi_done(cmd);
2716                 goto out;
2717         }
2718
2719         hba->req_abort_count = 0;
2720
2721         err = ufshcd_hold(hba, true);
2722         if (err) {
2723                 err = SCSI_MLQUEUE_HOST_BUSY;
2724                 goto out;
2725         }
2726         WARN_ON(ufshcd_is_clkgating_allowed(hba) &&
2727                 (hba->clk_gating.state != CLKS_ON));
2728
2729         lrbp = &hba->lrb[tag];
2730         WARN_ON(lrbp->cmd);
2731         lrbp->cmd = cmd;
2732         lrbp->sense_bufflen = UFS_SENSE_SIZE;
2733         lrbp->sense_buffer = cmd->sense_buffer;
2734         lrbp->task_tag = tag;
2735         lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2736         lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2737
2738         ufshcd_prepare_lrbp_crypto(scsi_cmd_to_rq(cmd), lrbp);
2739
2740         lrbp->req_abort_skip = false;
2741
2742         err = ufshpb_prep(hba, lrbp);
2743         if (err == -EAGAIN) {
2744                 lrbp->cmd = NULL;
2745                 ufshcd_release(hba);
2746                 goto out;
2747         }
2748
2749         ufshcd_comp_scsi_upiu(hba, lrbp);
2750
2751         err = ufshcd_map_sg(hba, lrbp);
2752         if (err) {
2753                 lrbp->cmd = NULL;
2754                 ufshcd_release(hba);
2755                 goto out;
2756         }
2757
2758         ufshcd_send_command(hba, tag);
2759 out:
2760         up_read(&hba->clk_scaling_lock);
2761
2762         if (ufs_trigger_eh())
2763                 scsi_schedule_eh(hba->host);
2764
2765         return err;
2766 }
2767
2768 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2769                 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2770 {
2771         lrbp->cmd = NULL;
2772         lrbp->sense_bufflen = 0;
2773         lrbp->sense_buffer = NULL;
2774         lrbp->task_tag = tag;
2775         lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2776         lrbp->intr_cmd = true; /* No interrupt aggregation */
2777         ufshcd_prepare_lrbp_crypto(NULL, lrbp);
2778         hba->dev_cmd.type = cmd_type;
2779
2780         return ufshcd_compose_devman_upiu(hba, lrbp);
2781 }
2782
2783 static int
2784 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2785 {
2786         int err = 0;
2787         unsigned long flags;
2788         u32 mask = 1 << tag;
2789
2790         /* clear outstanding transaction before retry */
2791         spin_lock_irqsave(hba->host->host_lock, flags);
2792         ufshcd_utrl_clear(hba, tag);
2793         spin_unlock_irqrestore(hba->host->host_lock, flags);
2794
2795         /*
2796          * wait for h/w to clear corresponding bit in door-bell.
2797          * max. wait is 1 sec.
2798          */
2799         err = ufshcd_wait_for_register(hba,
2800                         REG_UTP_TRANSFER_REQ_DOOR_BELL,
2801                         mask, ~mask, 1000, 1000);
2802
2803         return err;
2804 }
2805
2806 static int
2807 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2808 {
2809         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2810
2811         /* Get the UPIU response */
2812         query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2813                                 UPIU_RSP_CODE_OFFSET;
2814         return query_res->response;
2815 }
2816
2817 /**
2818  * ufshcd_dev_cmd_completion() - handles device management command responses
2819  * @hba: per adapter instance
2820  * @lrbp: pointer to local reference block
2821  */
2822 static int
2823 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2824 {
2825         int resp;
2826         int err = 0;
2827
2828         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2829         resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2830
2831         switch (resp) {
2832         case UPIU_TRANSACTION_NOP_IN:
2833                 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2834                         err = -EINVAL;
2835                         dev_err(hba->dev, "%s: unexpected response %x\n",
2836                                         __func__, resp);
2837                 }
2838                 break;
2839         case UPIU_TRANSACTION_QUERY_RSP:
2840                 err = ufshcd_check_query_response(hba, lrbp);
2841                 if (!err)
2842                         err = ufshcd_copy_query_response(hba, lrbp);
2843                 break;
2844         case UPIU_TRANSACTION_REJECT_UPIU:
2845                 /* TODO: handle Reject UPIU Response */
2846                 err = -EPERM;
2847                 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2848                                 __func__);
2849                 break;
2850         default:
2851                 err = -EINVAL;
2852                 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2853                                 __func__, resp);
2854                 break;
2855         }
2856
2857         return err;
2858 }
2859
2860 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2861                 struct ufshcd_lrb *lrbp, int max_timeout)
2862 {
2863         int err = 0;
2864         unsigned long time_left;
2865         unsigned long flags;
2866
2867         time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2868                         msecs_to_jiffies(max_timeout));
2869
2870         spin_lock_irqsave(hba->host->host_lock, flags);
2871         hba->dev_cmd.complete = NULL;
2872         if (likely(time_left)) {
2873                 err = ufshcd_get_tr_ocs(lrbp);
2874                 if (!err)
2875                         err = ufshcd_dev_cmd_completion(hba, lrbp);
2876         }
2877         spin_unlock_irqrestore(hba->host->host_lock, flags);
2878
2879         if (!time_left) {
2880                 err = -ETIMEDOUT;
2881                 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2882                         __func__, lrbp->task_tag);
2883                 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2884                         /* successfully cleared the command, retry if needed */
2885                         err = -EAGAIN;
2886                 /*
2887                  * in case of an error, after clearing the doorbell,
2888                  * we also need to clear the outstanding_request
2889                  * field in hba
2890                  */
2891                 spin_lock_irqsave(&hba->outstanding_lock, flags);
2892                 __clear_bit(lrbp->task_tag, &hba->outstanding_reqs);
2893                 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
2894         }
2895
2896         return err;
2897 }
2898
2899 /**
2900  * ufshcd_exec_dev_cmd - API for sending device management requests
2901  * @hba: UFS hba
2902  * @cmd_type: specifies the type (NOP, Query...)
2903  * @timeout: timeout in milliseconds
2904  *
2905  * NOTE: Since there is only one available tag for device management commands,
2906  * it is expected you hold the hba->dev_cmd.lock mutex.
2907  */
2908 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2909                 enum dev_cmd_type cmd_type, int timeout)
2910 {
2911         struct request_queue *q = hba->cmd_queue;
2912         DECLARE_COMPLETION_ONSTACK(wait);
2913         struct request *req;
2914         struct ufshcd_lrb *lrbp;
2915         int err;
2916         int tag;
2917
2918         down_read(&hba->clk_scaling_lock);
2919
2920         /*
2921          * Get free slot, sleep if slots are unavailable.
2922          * Even though we use wait_event() which sleeps indefinitely,
2923          * the maximum wait time is bounded by SCSI request timeout.
2924          */
2925         req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
2926         if (IS_ERR(req)) {
2927                 err = PTR_ERR(req);
2928                 goto out_unlock;
2929         }
2930         tag = req->tag;
2931         WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
2932         /* Set the timeout such that the SCSI error handler is not activated. */
2933         req->timeout = msecs_to_jiffies(2 * timeout);
2934         blk_mq_start_request(req);
2935
2936         lrbp = &hba->lrb[tag];
2937         WARN_ON(lrbp->cmd);
2938         err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2939         if (unlikely(err))
2940                 goto out;
2941
2942         hba->dev_cmd.complete = &wait;
2943
2944         ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
2945
2946         ufshcd_send_command(hba, tag);
2947         err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2948         ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
2949                                     (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
2950
2951 out:
2952         blk_put_request(req);
2953 out_unlock:
2954         up_read(&hba->clk_scaling_lock);
2955         return err;
2956 }
2957
2958 /**
2959  * ufshcd_init_query() - init the query response and request parameters
2960  * @hba: per-adapter instance
2961  * @request: address of the request pointer to be initialized
2962  * @response: address of the response pointer to be initialized
2963  * @opcode: operation to perform
2964  * @idn: flag idn to access
2965  * @index: LU number to access
2966  * @selector: query/flag/descriptor further identification
2967  */
2968 static inline void ufshcd_init_query(struct ufs_hba *hba,
2969                 struct ufs_query_req **request, struct ufs_query_res **response,
2970                 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2971 {
2972         *request = &hba->dev_cmd.query.request;
2973         *response = &hba->dev_cmd.query.response;
2974         memset(*request, 0, sizeof(struct ufs_query_req));
2975         memset(*response, 0, sizeof(struct ufs_query_res));
2976         (*request)->upiu_req.opcode = opcode;
2977         (*request)->upiu_req.idn = idn;
2978         (*request)->upiu_req.index = index;
2979         (*request)->upiu_req.selector = selector;
2980 }
2981
2982 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2983         enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
2984 {
2985         int ret;
2986         int retries;
2987
2988         for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2989                 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
2990                 if (ret)
2991                         dev_dbg(hba->dev,
2992                                 "%s: failed with error %d, retries %d\n",
2993                                 __func__, ret, retries);
2994                 else
2995                         break;
2996         }
2997
2998         if (ret)
2999                 dev_err(hba->dev,
3000                         "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
3001                         __func__, opcode, idn, ret, retries);
3002         return ret;
3003 }
3004
3005 /**
3006  * ufshcd_query_flag() - API function for sending flag query requests
3007  * @hba: per-adapter instance
3008  * @opcode: flag query to perform
3009  * @idn: flag idn to access
3010  * @index: flag index to access
3011  * @flag_res: the flag value after the query request completes
3012  *
3013  * Returns 0 for success, non-zero in case of failure
3014  */
3015 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
3016                         enum flag_idn idn, u8 index, bool *flag_res)
3017 {
3018         struct ufs_query_req *request = NULL;
3019         struct ufs_query_res *response = NULL;
3020         int err, selector = 0;
3021         int timeout = QUERY_REQ_TIMEOUT;
3022
3023         BUG_ON(!hba);
3024
3025         ufshcd_hold(hba, false);
3026         mutex_lock(&hba->dev_cmd.lock);
3027         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3028                         selector);
3029
3030         switch (opcode) {
3031         case UPIU_QUERY_OPCODE_SET_FLAG:
3032         case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3033         case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3034                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3035                 break;
3036         case UPIU_QUERY_OPCODE_READ_FLAG:
3037                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3038                 if (!flag_res) {
3039                         /* No dummy reads */
3040                         dev_err(hba->dev, "%s: Invalid argument for read request\n",
3041                                         __func__);
3042                         err = -EINVAL;
3043                         goto out_unlock;
3044                 }
3045                 break;
3046         default:
3047                 dev_err(hba->dev,
3048                         "%s: Expected query flag opcode but got = %d\n",
3049                         __func__, opcode);
3050                 err = -EINVAL;
3051                 goto out_unlock;
3052         }
3053
3054         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
3055
3056         if (err) {
3057                 dev_err(hba->dev,
3058                         "%s: Sending flag query for idn %d failed, err = %d\n",
3059                         __func__, idn, err);
3060                 goto out_unlock;
3061         }
3062
3063         if (flag_res)
3064                 *flag_res = (be32_to_cpu(response->upiu_res.value) &
3065                                 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3066
3067 out_unlock:
3068         mutex_unlock(&hba->dev_cmd.lock);
3069         ufshcd_release(hba);
3070         return err;
3071 }
3072
3073 /**
3074  * ufshcd_query_attr - API function for sending attribute requests
3075  * @hba: per-adapter instance
3076  * @opcode: attribute opcode
3077  * @idn: attribute idn to access
3078  * @index: index field
3079  * @selector: selector field
3080  * @attr_val: the attribute value after the query request completes
3081  *
3082  * Returns 0 for success, non-zero in case of failure
3083 */
3084 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
3085                       enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
3086 {
3087         struct ufs_query_req *request = NULL;
3088         struct ufs_query_res *response = NULL;
3089         int err;
3090
3091         BUG_ON(!hba);
3092
3093         if (!attr_val) {
3094                 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3095                                 __func__, opcode);
3096                 return -EINVAL;
3097         }
3098
3099         ufshcd_hold(hba, false);
3100
3101         mutex_lock(&hba->dev_cmd.lock);
3102         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3103                         selector);
3104
3105         switch (opcode) {
3106         case UPIU_QUERY_OPCODE_WRITE_ATTR:
3107                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3108                 request->upiu_req.value = cpu_to_be32(*attr_val);
3109                 break;
3110         case UPIU_QUERY_OPCODE_READ_ATTR:
3111                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3112                 break;
3113         default:
3114                 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3115                                 __func__, opcode);
3116                 err = -EINVAL;
3117                 goto out_unlock;
3118         }
3119
3120         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3121
3122         if (err) {
3123                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3124                                 __func__, opcode, idn, index, err);
3125                 goto out_unlock;
3126         }
3127
3128         *attr_val = be32_to_cpu(response->upiu_res.value);
3129
3130 out_unlock:
3131         mutex_unlock(&hba->dev_cmd.lock);
3132         ufshcd_release(hba);
3133         return err;
3134 }
3135
3136 /**
3137  * ufshcd_query_attr_retry() - API function for sending query
3138  * attribute with retries
3139  * @hba: per-adapter instance
3140  * @opcode: attribute opcode
3141  * @idn: attribute idn to access
3142  * @index: index field
3143  * @selector: selector field
3144  * @attr_val: the attribute value after the query request
3145  * completes
3146  *
3147  * Returns 0 for success, non-zero in case of failure
3148 */
3149 int ufshcd_query_attr_retry(struct ufs_hba *hba,
3150         enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3151         u32 *attr_val)
3152 {
3153         int ret = 0;
3154         u32 retries;
3155
3156         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3157                 ret = ufshcd_query_attr(hba, opcode, idn, index,
3158                                                 selector, attr_val);
3159                 if (ret)
3160                         dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3161                                 __func__, ret, retries);
3162                 else
3163                         break;
3164         }
3165
3166         if (ret)
3167                 dev_err(hba->dev,
3168                         "%s: query attribute, idn %d, failed with error %d after %d retires\n",
3169                         __func__, idn, ret, QUERY_REQ_RETRIES);
3170         return ret;
3171 }
3172
3173 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
3174                         enum query_opcode opcode, enum desc_idn idn, u8 index,
3175                         u8 selector, u8 *desc_buf, int *buf_len)
3176 {
3177         struct ufs_query_req *request = NULL;
3178         struct ufs_query_res *response = NULL;
3179         int err;
3180
3181         BUG_ON(!hba);
3182
3183         if (!desc_buf) {
3184                 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3185                                 __func__, opcode);
3186                 return -EINVAL;
3187         }
3188
3189         if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
3190                 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3191                                 __func__, *buf_len);
3192                 return -EINVAL;
3193         }
3194
3195         ufshcd_hold(hba, false);
3196
3197         mutex_lock(&hba->dev_cmd.lock);
3198         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3199                         selector);
3200         hba->dev_cmd.query.descriptor = desc_buf;
3201         request->upiu_req.length = cpu_to_be16(*buf_len);
3202
3203         switch (opcode) {
3204         case UPIU_QUERY_OPCODE_WRITE_DESC:
3205                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3206                 break;
3207         case UPIU_QUERY_OPCODE_READ_DESC:
3208                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3209                 break;
3210         default:
3211                 dev_err(hba->dev,
3212                                 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3213                                 __func__, opcode);
3214                 err = -EINVAL;
3215                 goto out_unlock;
3216         }
3217
3218         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3219
3220         if (err) {
3221                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3222                                 __func__, opcode, idn, index, err);
3223                 goto out_unlock;
3224         }
3225
3226         *buf_len = be16_to_cpu(response->upiu_res.length);
3227
3228 out_unlock:
3229         hba->dev_cmd.query.descriptor = NULL;
3230         mutex_unlock(&hba->dev_cmd.lock);
3231         ufshcd_release(hba);
3232         return err;
3233 }
3234
3235 /**
3236  * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3237  * @hba: per-adapter instance
3238  * @opcode: attribute opcode
3239  * @idn: attribute idn to access
3240  * @index: index field
3241  * @selector: selector field
3242  * @desc_buf: the buffer that contains the descriptor
3243  * @buf_len: length parameter passed to the device
3244  *
3245  * Returns 0 for success, non-zero in case of failure.
3246  * The buf_len parameter will contain, on return, the length parameter
3247  * received on the response.
3248  */
3249 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3250                                   enum query_opcode opcode,
3251                                   enum desc_idn idn, u8 index,
3252                                   u8 selector,
3253                                   u8 *desc_buf, int *buf_len)
3254 {
3255         int err;
3256         int retries;
3257
3258         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3259                 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3260                                                 selector, desc_buf, buf_len);
3261                 if (!err || err == -EINVAL)
3262                         break;
3263         }
3264
3265         return err;
3266 }
3267
3268 /**
3269  * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3270  * @hba: Pointer to adapter instance
3271  * @desc_id: descriptor idn value
3272  * @desc_len: mapped desc length (out)
3273  */
3274 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
3275                                   int *desc_len)
3276 {
3277         if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 ||
3278             desc_id == QUERY_DESC_IDN_RFU_1)
3279                 *desc_len = 0;
3280         else
3281                 *desc_len = hba->desc_size[desc_id];
3282 }
3283 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3284
3285 static void ufshcd_update_desc_length(struct ufs_hba *hba,
3286                                       enum desc_idn desc_id, int desc_index,
3287                                       unsigned char desc_len)
3288 {
3289         if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE &&
3290             desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT)
3291                 /* For UFS 3.1, the normal unit descriptor is 10 bytes larger
3292                  * than the RPMB unit, however, both descriptors share the same
3293                  * desc_idn, to cover both unit descriptors with one length, we
3294                  * choose the normal unit descriptor length by desc_index.
3295                  */
3296                 hba->desc_size[desc_id] = desc_len;
3297 }
3298
3299 /**
3300  * ufshcd_read_desc_param - read the specified descriptor parameter
3301  * @hba: Pointer to adapter instance
3302  * @desc_id: descriptor idn value
3303  * @desc_index: descriptor index
3304  * @param_offset: offset of the parameter to read
3305  * @param_read_buf: pointer to buffer where parameter would be read
3306  * @param_size: sizeof(param_read_buf)
3307  *
3308  * Return 0 in case of success, non-zero otherwise
3309  */
3310 int ufshcd_read_desc_param(struct ufs_hba *hba,
3311                            enum desc_idn desc_id,
3312                            int desc_index,
3313                            u8 param_offset,
3314                            u8 *param_read_buf,
3315                            u8 param_size)
3316 {
3317         int ret;
3318         u8 *desc_buf;
3319         int buff_len;
3320         bool is_kmalloc = true;
3321
3322         /* Safety check */
3323         if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3324                 return -EINVAL;
3325
3326         /* Get the length of descriptor */
3327         ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3328         if (!buff_len) {
3329                 dev_err(hba->dev, "%s: Failed to get desc length\n", __func__);
3330                 return -EINVAL;
3331         }
3332
3333         if (param_offset >= buff_len) {
3334                 dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n",
3335                         __func__, param_offset, desc_id, buff_len);
3336                 return -EINVAL;
3337         }
3338
3339         /* Check whether we need temp memory */
3340         if (param_offset != 0 || param_size < buff_len) {
3341                 desc_buf = kzalloc(buff_len, GFP_KERNEL);
3342                 if (!desc_buf)
3343                         return -ENOMEM;
3344         } else {
3345                 desc_buf = param_read_buf;
3346                 is_kmalloc = false;
3347         }
3348
3349         /* Request for full descriptor */
3350         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3351                                         desc_id, desc_index, 0,
3352                                         desc_buf, &buff_len);
3353
3354         if (ret) {
3355                 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
3356                         __func__, desc_id, desc_index, param_offset, ret);
3357                 goto out;
3358         }
3359
3360         /* Sanity check */
3361         if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3362                 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
3363                         __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3364                 ret = -EINVAL;
3365                 goto out;
3366         }
3367
3368         /* Update descriptor length */
3369         buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
3370         ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
3371
3372         if (is_kmalloc) {
3373                 /* Make sure we don't copy more data than available */
3374                 if (param_offset >= buff_len)
3375                         ret = -EINVAL;
3376                 else
3377                         memcpy(param_read_buf, &desc_buf[param_offset],
3378                                min_t(u32, param_size, buff_len - param_offset));
3379         }
3380 out:
3381         if (is_kmalloc)
3382                 kfree(desc_buf);
3383         return ret;
3384 }
3385
3386 /**
3387  * struct uc_string_id - unicode string
3388  *
3389  * @len: size of this descriptor inclusive
3390  * @type: descriptor type
3391  * @uc: unicode string character
3392  */
3393 struct uc_string_id {
3394         u8 len;
3395         u8 type;
3396         wchar_t uc[];
3397 } __packed;
3398
3399 /* replace non-printable or non-ASCII characters with spaces */
3400 static inline char ufshcd_remove_non_printable(u8 ch)
3401 {
3402         return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3403 }
3404
3405 /**
3406  * ufshcd_read_string_desc - read string descriptor
3407  * @hba: pointer to adapter instance
3408  * @desc_index: descriptor index
3409  * @buf: pointer to buffer where descriptor would be read,
3410  *       the caller should free the memory.
3411  * @ascii: if true convert from unicode to ascii characters
3412  *         null terminated string.
3413  *
3414  * Return:
3415  * *      string size on success.
3416  * *      -ENOMEM: on allocation failure
3417  * *      -EINVAL: on a wrong parameter
3418  */
3419 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3420                             u8 **buf, bool ascii)
3421 {
3422         struct uc_string_id *uc_str;
3423         u8 *str;
3424         int ret;
3425
3426         if (!buf)
3427                 return -EINVAL;
3428
3429         uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3430         if (!uc_str)
3431                 return -ENOMEM;
3432
3433         ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_STRING, desc_index, 0,
3434                                      (u8 *)uc_str, QUERY_DESC_MAX_SIZE);
3435         if (ret < 0) {
3436                 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3437                         QUERY_REQ_RETRIES, ret);
3438                 str = NULL;
3439                 goto out;
3440         }
3441
3442         if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3443                 dev_dbg(hba->dev, "String Desc is of zero length\n");
3444                 str = NULL;
3445                 ret = 0;
3446                 goto out;
3447         }
3448
3449         if (ascii) {
3450                 ssize_t ascii_len;
3451                 int i;
3452                 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3453                 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3454                 str = kzalloc(ascii_len, GFP_KERNEL);
3455                 if (!str) {
3456                         ret = -ENOMEM;
3457                         goto out;
3458                 }
3459
3460                 /*
3461                  * the descriptor contains string in UTF16 format
3462                  * we need to convert to utf-8 so it can be displayed
3463                  */
3464                 ret = utf16s_to_utf8s(uc_str->uc,
3465                                       uc_str->len - QUERY_DESC_HDR_SIZE,
3466                                       UTF16_BIG_ENDIAN, str, ascii_len);
3467
3468                 /* replace non-printable or non-ASCII characters with spaces */
3469                 for (i = 0; i < ret; i++)
3470                         str[i] = ufshcd_remove_non_printable(str[i]);
3471
3472                 str[ret++] = '\0';
3473
3474         } else {
3475                 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
3476                 if (!str) {
3477                         ret = -ENOMEM;
3478                         goto out;
3479                 }
3480                 ret = uc_str->len;
3481         }
3482 out:
3483         *buf = str;
3484         kfree(uc_str);
3485         return ret;
3486 }
3487
3488 /**
3489  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3490  * @hba: Pointer to adapter instance
3491  * @lun: lun id
3492  * @param_offset: offset of the parameter to read
3493  * @param_read_buf: pointer to buffer where parameter would be read
3494  * @param_size: sizeof(param_read_buf)
3495  *
3496  * Return 0 in case of success, non-zero otherwise
3497  */
3498 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3499                                               int lun,
3500                                               enum unit_desc_param param_offset,
3501                                               u8 *param_read_buf,
3502                                               u32 param_size)
3503 {
3504         /*
3505          * Unit descriptors are only available for general purpose LUs (LUN id
3506          * from 0 to 7) and RPMB Well known LU.
3507          */
3508         if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun, param_offset))
3509                 return -EOPNOTSUPP;
3510
3511         return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3512                                       param_offset, param_read_buf, param_size);
3513 }
3514
3515 static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3516 {
3517         int err = 0;
3518         u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3519
3520         if (hba->dev_info.wspecversion >= 0x300) {
3521                 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3522                                 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3523                                 &gating_wait);
3524                 if (err)
3525                         dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3526                                          err, gating_wait);
3527
3528                 if (gating_wait == 0) {
3529                         gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3530                         dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3531                                          gating_wait);
3532                 }
3533
3534                 hba->dev_info.clk_gating_wait_us = gating_wait;
3535         }
3536
3537         return err;
3538 }
3539
3540 /**
3541  * ufshcd_memory_alloc - allocate memory for host memory space data structures
3542  * @hba: per adapter instance
3543  *
3544  * 1. Allocate DMA memory for Command Descriptor array
3545  *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3546  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3547  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3548  *      (UTMRDL)
3549  * 4. Allocate memory for local reference block(lrb).
3550  *
3551  * Returns 0 for success, non-zero in case of failure
3552  */
3553 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3554 {
3555         size_t utmrdl_size, utrdl_size, ucdl_size;
3556
3557         /* Allocate memory for UTP command descriptors */
3558         ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3559         hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3560                                                   ucdl_size,
3561                                                   &hba->ucdl_dma_addr,
3562                                                   GFP_KERNEL);
3563
3564         /*
3565          * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3566          * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3567          * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3568          * be aligned to 128 bytes as well
3569          */
3570         if (!hba->ucdl_base_addr ||
3571             WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3572                 dev_err(hba->dev,
3573                         "Command Descriptor Memory allocation failed\n");
3574                 goto out;
3575         }
3576
3577         /*
3578          * Allocate memory for UTP Transfer descriptors
3579          * UFSHCI requires 1024 byte alignment of UTRD
3580          */
3581         utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3582         hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3583                                                    utrdl_size,
3584                                                    &hba->utrdl_dma_addr,
3585                                                    GFP_KERNEL);
3586         if (!hba->utrdl_base_addr ||
3587             WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3588                 dev_err(hba->dev,
3589                         "Transfer Descriptor Memory allocation failed\n");
3590                 goto out;
3591         }
3592
3593         /*
3594          * Allocate memory for UTP Task Management descriptors
3595          * UFSHCI requires 1024 byte alignment of UTMRD
3596          */
3597         utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3598         hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3599                                                     utmrdl_size,
3600                                                     &hba->utmrdl_dma_addr,
3601                                                     GFP_KERNEL);
3602         if (!hba->utmrdl_base_addr ||
3603             WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3604                 dev_err(hba->dev,
3605                 "Task Management Descriptor Memory allocation failed\n");
3606                 goto out;
3607         }
3608
3609         /* Allocate memory for local reference block */
3610         hba->lrb = devm_kcalloc(hba->dev,
3611                                 hba->nutrs, sizeof(struct ufshcd_lrb),
3612                                 GFP_KERNEL);
3613         if (!hba->lrb) {
3614                 dev_err(hba->dev, "LRB Memory allocation failed\n");
3615                 goto out;
3616         }
3617         return 0;
3618 out:
3619         return -ENOMEM;
3620 }
3621
3622 /**
3623  * ufshcd_host_memory_configure - configure local reference block with
3624  *                              memory offsets
3625  * @hba: per adapter instance
3626  *
3627  * Configure Host memory space
3628  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3629  * address.
3630  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3631  * and PRDT offset.
3632  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3633  * into local reference block.
3634  */
3635 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3636 {
3637         struct utp_transfer_req_desc *utrdlp;
3638         dma_addr_t cmd_desc_dma_addr;
3639         dma_addr_t cmd_desc_element_addr;
3640         u16 response_offset;
3641         u16 prdt_offset;
3642         int cmd_desc_size;
3643         int i;
3644
3645         utrdlp = hba->utrdl_base_addr;
3646
3647         response_offset =
3648                 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3649         prdt_offset =
3650                 offsetof(struct utp_transfer_cmd_desc, prd_table);
3651
3652         cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3653         cmd_desc_dma_addr = hba->ucdl_dma_addr;
3654
3655         for (i = 0; i < hba->nutrs; i++) {
3656                 /* Configure UTRD with command descriptor base address */
3657                 cmd_desc_element_addr =
3658                                 (cmd_desc_dma_addr + (cmd_desc_size * i));
3659                 utrdlp[i].command_desc_base_addr_lo =
3660                                 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3661                 utrdlp[i].command_desc_base_addr_hi =
3662                                 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3663
3664                 /* Response upiu and prdt offset should be in double words */
3665                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3666                         utrdlp[i].response_upiu_offset =
3667                                 cpu_to_le16(response_offset);
3668                         utrdlp[i].prd_table_offset =
3669                                 cpu_to_le16(prdt_offset);
3670                         utrdlp[i].response_upiu_length =
3671                                 cpu_to_le16(ALIGNED_UPIU_SIZE);
3672                 } else {
3673                         utrdlp[i].response_upiu_offset =
3674                                 cpu_to_le16(response_offset >> 2);
3675                         utrdlp[i].prd_table_offset =
3676                                 cpu_to_le16(prdt_offset >> 2);
3677                         utrdlp[i].response_upiu_length =
3678                                 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3679                 }
3680
3681                 ufshcd_init_lrb(hba, &hba->lrb[i], i);
3682         }
3683 }
3684
3685 /**
3686  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3687  * @hba: per adapter instance
3688  *
3689  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3690  * in order to initialize the Unipro link startup procedure.
3691  * Once the Unipro links are up, the device connected to the controller
3692  * is detected.
3693  *
3694  * Returns 0 on success, non-zero value on failure
3695  */
3696 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3697 {
3698         struct uic_command uic_cmd = {0};
3699         int ret;
3700
3701         uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3702
3703         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3704         if (ret)
3705                 dev_dbg(hba->dev,
3706                         "dme-link-startup: error code %d\n", ret);
3707         return ret;
3708 }
3709 /**
3710  * ufshcd_dme_reset - UIC command for DME_RESET
3711  * @hba: per adapter instance
3712  *
3713  * DME_RESET command is issued in order to reset UniPro stack.
3714  * This function now deals with cold reset.
3715  *
3716  * Returns 0 on success, non-zero value on failure
3717  */
3718 static int ufshcd_dme_reset(struct ufs_hba *hba)
3719 {
3720         struct uic_command uic_cmd = {0};
3721         int ret;
3722
3723         uic_cmd.command = UIC_CMD_DME_RESET;
3724
3725         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3726         if (ret)
3727                 dev_err(hba->dev,
3728                         "dme-reset: error code %d\n", ret);
3729
3730         return ret;
3731 }
3732
3733 int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
3734                                int agreed_gear,
3735                                int adapt_val)
3736 {
3737         int ret;
3738
3739         if (agreed_gear != UFS_HS_G4)
3740                 adapt_val = PA_NO_ADAPT;
3741
3742         ret = ufshcd_dme_set(hba,
3743                              UIC_ARG_MIB(PA_TXHSADAPTTYPE),
3744                              adapt_val);
3745         return ret;
3746 }
3747 EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt);
3748
3749 /**
3750  * ufshcd_dme_enable - UIC command for DME_ENABLE
3751  * @hba: per adapter instance
3752  *
3753  * DME_ENABLE command is issued in order to enable UniPro stack.
3754  *
3755  * Returns 0 on success, non-zero value on failure
3756  */
3757 static int ufshcd_dme_enable(struct ufs_hba *hba)
3758 {
3759         struct uic_command uic_cmd = {0};
3760         int ret;
3761
3762         uic_cmd.command = UIC_CMD_DME_ENABLE;
3763
3764         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3765         if (ret)
3766                 dev_err(hba->dev,
3767                         "dme-enable: error code %d\n", ret);
3768
3769         return ret;
3770 }
3771
3772 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3773 {
3774         #define MIN_DELAY_BEFORE_DME_CMDS_US    1000
3775         unsigned long min_sleep_time_us;
3776
3777         if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3778                 return;
3779
3780         /*
3781          * last_dme_cmd_tstamp will be 0 only for 1st call to
3782          * this function
3783          */
3784         if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3785                 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3786         } else {
3787                 unsigned long delta =
3788                         (unsigned long) ktime_to_us(
3789                                 ktime_sub(ktime_get(),
3790                                 hba->last_dme_cmd_tstamp));
3791
3792                 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3793                         min_sleep_time_us =
3794                                 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3795                 else
3796                         return; /* no more delay required */
3797         }
3798
3799         /* allow sleep for extra 50us if needed */
3800         usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3801 }
3802
3803 /**
3804  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3805  * @hba: per adapter instance
3806  * @attr_sel: uic command argument1
3807  * @attr_set: attribute set type as uic command argument2
3808  * @mib_val: setting value as uic command argument3
3809  * @peer: indicate whether peer or local
3810  *
3811  * Returns 0 on success, non-zero value on failure
3812  */
3813 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3814                         u8 attr_set, u32 mib_val, u8 peer)
3815 {
3816         struct uic_command uic_cmd = {0};
3817         static const char *const action[] = {
3818                 "dme-set",
3819                 "dme-peer-set"
3820         };
3821         const char *set = action[!!peer];
3822         int ret;
3823         int retries = UFS_UIC_COMMAND_RETRIES;
3824
3825         uic_cmd.command = peer ?
3826                 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3827         uic_cmd.argument1 = attr_sel;
3828         uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3829         uic_cmd.argument3 = mib_val;
3830
3831         do {
3832                 /* for peer attributes we retry upon failure */
3833                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3834                 if (ret)
3835                         dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3836                                 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3837         } while (ret && peer && --retries);
3838
3839         if (ret)
3840                 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3841                         set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3842                         UFS_UIC_COMMAND_RETRIES - retries);
3843
3844         return ret;
3845 }
3846 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3847
3848 /**
3849  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3850  * @hba: per adapter instance
3851  * @attr_sel: uic command argument1
3852  * @mib_val: the value of the attribute as returned by the UIC command
3853  * @peer: indicate whether peer or local
3854  *
3855  * Returns 0 on success, non-zero value on failure
3856  */
3857 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3858                         u32 *mib_val, u8 peer)
3859 {
3860         struct uic_command uic_cmd = {0};
3861         static const char *const action[] = {
3862                 "dme-get",
3863                 "dme-peer-get"
3864         };
3865         const char *get = action[!!peer];
3866         int ret;
3867         int retries = UFS_UIC_COMMAND_RETRIES;
3868         struct ufs_pa_layer_attr orig_pwr_info;
3869         struct ufs_pa_layer_attr temp_pwr_info;
3870         bool pwr_mode_change = false;
3871
3872         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3873                 orig_pwr_info = hba->pwr_info;
3874                 temp_pwr_info = orig_pwr_info;
3875
3876                 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3877                     orig_pwr_info.pwr_rx == FAST_MODE) {
3878                         temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3879                         temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3880                         pwr_mode_change = true;
3881                 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3882                     orig_pwr_info.pwr_rx == SLOW_MODE) {
3883                         temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3884                         temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3885                         pwr_mode_change = true;
3886                 }
3887                 if (pwr_mode_change) {
3888                         ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3889                         if (ret)
3890                                 goto out;
3891                 }
3892         }
3893
3894         uic_cmd.command = peer ?
3895                 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3896         uic_cmd.argument1 = attr_sel;
3897
3898         do {
3899                 /* for peer attributes we retry upon failure */
3900                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3901                 if (ret)
3902                         dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3903                                 get, UIC_GET_ATTR_ID(attr_sel), ret);
3904         } while (ret && peer && --retries);
3905
3906         if (ret)
3907                 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3908                         get, UIC_GET_ATTR_ID(attr_sel),
3909                         UFS_UIC_COMMAND_RETRIES - retries);
3910
3911         if (mib_val && !ret)
3912                 *mib_val = uic_cmd.argument3;
3913
3914         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3915             && pwr_mode_change)
3916                 ufshcd_change_power_mode(hba, &orig_pwr_info);
3917 out:
3918         return ret;
3919 }
3920 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3921
3922 static inline bool ufshcd_is_saved_err_fatal(struct ufs_hba *hba)
3923 {
3924         lockdep_assert_held(hba->host->host_lock);
3925
3926         return (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR) ||
3927                (hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK));
3928 }
3929
3930 static void ufshcd_schedule_eh(struct ufs_hba *hba)
3931 {
3932         bool schedule_eh = false;
3933         unsigned long flags;
3934
3935         spin_lock_irqsave(hba->host->host_lock, flags);
3936         /* handle fatal errors only when link is not in error state */
3937         if (hba->ufshcd_state != UFSHCD_STATE_ERROR) {
3938                 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
3939                     ufshcd_is_saved_err_fatal(hba))
3940                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_FATAL;
3941                 else
3942                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_NON_FATAL;
3943                 schedule_eh = true;
3944         }
3945         spin_unlock_irqrestore(hba->host->host_lock, flags);
3946
3947         if (schedule_eh)
3948                 scsi_schedule_eh(hba->host);
3949 }
3950
3951 /**
3952  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3953  * state) and waits for it to take effect.
3954  *
3955  * @hba: per adapter instance
3956  * @cmd: UIC command to execute
3957  *
3958  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3959  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3960  * and device UniPro link and hence it's final completion would be indicated by
3961  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3962  * addition to normal UIC command completion Status (UCCS). This function only
3963  * returns after the relevant status bits indicate the completion.
3964  *
3965  * Returns 0 on success, non-zero value on failure
3966  */
3967 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3968 {
3969         DECLARE_COMPLETION_ONSTACK(uic_async_done);
3970         unsigned long flags;
3971         bool schedule_eh = false;
3972         u8 status;
3973         int ret;
3974         bool reenable_intr = false;
3975
3976         mutex_lock(&hba->uic_cmd_mutex);
3977         ufshcd_add_delay_before_dme_cmd(hba);
3978
3979         spin_lock_irqsave(hba->host->host_lock, flags);
3980         if (ufshcd_is_link_broken(hba)) {
3981                 ret = -ENOLINK;
3982                 goto out_unlock;
3983         }
3984         hba->uic_async_done = &uic_async_done;
3985         if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3986                 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3987                 /*
3988                  * Make sure UIC command completion interrupt is disabled before
3989                  * issuing UIC command.
3990                  */
3991                 wmb();
3992                 reenable_intr = true;
3993         }
3994         ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3995         spin_unlock_irqrestore(hba->host->host_lock, flags);
3996         if (ret) {
3997                 dev_err(hba->dev,
3998                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3999                         cmd->command, cmd->argument3, ret);
4000                 goto out;
4001         }
4002
4003         if (!wait_for_completion_timeout(hba->uic_async_done,
4004                                          msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
4005                 dev_err(hba->dev,
4006                         "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
4007                         cmd->command, cmd->argument3);
4008
4009                 if (!cmd->cmd_active) {
4010                         dev_err(hba->dev, "%s: Power Mode Change operation has been completed, go check UPMCRS\n",
4011                                 __func__);
4012                         goto check_upmcrs;
4013                 }
4014
4015                 ret = -ETIMEDOUT;
4016                 goto out;
4017         }
4018
4019 check_upmcrs:
4020         status = ufshcd_get_upmcrs(hba);
4021         if (status != PWR_LOCAL) {
4022                 dev_err(hba->dev,
4023                         "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
4024                         cmd->command, status);
4025                 ret = (status != PWR_OK) ? status : -1;
4026         }
4027 out:
4028         if (ret) {
4029                 ufshcd_print_host_state(hba);
4030                 ufshcd_print_pwr_info(hba);
4031                 ufshcd_print_evt_hist(hba);
4032         }
4033
4034         spin_lock_irqsave(hba->host->host_lock, flags);
4035         hba->active_uic_cmd = NULL;
4036         hba->uic_async_done = NULL;
4037         if (reenable_intr)
4038                 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
4039         if (ret) {
4040                 ufshcd_set_link_broken(hba);
4041                 schedule_eh = true;
4042         }
4043
4044 out_unlock:
4045         spin_unlock_irqrestore(hba->host->host_lock, flags);
4046
4047         if (schedule_eh)
4048                 ufshcd_schedule_eh(hba);
4049         mutex_unlock(&hba->uic_cmd_mutex);
4050
4051         return ret;
4052 }
4053
4054 /**
4055  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
4056  *                              using DME_SET primitives.
4057  * @hba: per adapter instance
4058  * @mode: powr mode value
4059  *
4060  * Returns 0 on success, non-zero value on failure
4061  */
4062 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
4063 {
4064         struct uic_command uic_cmd = {0};
4065         int ret;
4066
4067         if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
4068                 ret = ufshcd_dme_set(hba,
4069                                 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
4070                 if (ret) {
4071                         dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
4072                                                 __func__, ret);
4073                         goto out;
4074                 }
4075         }
4076
4077         uic_cmd.command = UIC_CMD_DME_SET;
4078         uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4079         uic_cmd.argument3 = mode;
4080         ufshcd_hold(hba, false);
4081         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4082         ufshcd_release(hba);
4083
4084 out:
4085         return ret;
4086 }
4087
4088 int ufshcd_link_recovery(struct ufs_hba *hba)
4089 {
4090         int ret;
4091         unsigned long flags;
4092
4093         spin_lock_irqsave(hba->host->host_lock, flags);
4094         hba->ufshcd_state = UFSHCD_STATE_RESET;
4095         ufshcd_set_eh_in_progress(hba);
4096         spin_unlock_irqrestore(hba->host->host_lock, flags);
4097
4098         /* Reset the attached device */
4099         ufshcd_device_reset(hba);
4100
4101         ret = ufshcd_host_reset_and_restore(hba);
4102
4103         spin_lock_irqsave(hba->host->host_lock, flags);
4104         if (ret)
4105                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4106         ufshcd_clear_eh_in_progress(hba);
4107         spin_unlock_irqrestore(hba->host->host_lock, flags);
4108
4109         if (ret)
4110                 dev_err(hba->dev, "%s: link recovery failed, err %d",
4111                         __func__, ret);
4112         else
4113                 ufshcd_clear_ua_wluns(hba);
4114
4115         return ret;
4116 }
4117 EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
4118
4119 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
4120 {
4121         int ret;
4122         struct uic_command uic_cmd = {0};
4123         ktime_t start = ktime_get();
4124
4125         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
4126
4127         uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
4128         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4129         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4130                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4131
4132         if (ret)
4133                 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
4134                         __func__, ret);
4135         else
4136                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
4137                                                                 POST_CHANGE);
4138
4139         return ret;
4140 }
4141
4142 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
4143 {
4144         struct uic_command uic_cmd = {0};
4145         int ret;
4146         ktime_t start = ktime_get();
4147
4148         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
4149
4150         uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4151         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4152         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4153                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4154
4155         if (ret) {
4156                 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
4157                         __func__, ret);
4158         } else {
4159                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
4160                                                                 POST_CHANGE);
4161                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4162                 hba->ufs_stats.hibern8_exit_cnt++;
4163         }
4164
4165         return ret;
4166 }
4167 EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
4168
4169 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
4170 {
4171         unsigned long flags;
4172         bool update = false;
4173
4174         if (!ufshcd_is_auto_hibern8_supported(hba))
4175                 return;
4176
4177         spin_lock_irqsave(hba->host->host_lock, flags);
4178         if (hba->ahit != ahit) {
4179                 hba->ahit = ahit;
4180                 update = true;
4181         }
4182         spin_unlock_irqrestore(hba->host->host_lock, flags);
4183
4184         if (update &&
4185             !pm_runtime_suspended(&hba->sdev_ufs_device->sdev_gendev)) {
4186                 ufshcd_rpm_get_sync(hba);
4187                 ufshcd_hold(hba, false);
4188                 ufshcd_auto_hibern8_enable(hba);
4189                 ufshcd_release(hba);
4190                 ufshcd_rpm_put_sync(hba);
4191         }
4192 }
4193 EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
4194
4195 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
4196 {
4197         unsigned long flags;
4198
4199         if (!ufshcd_is_auto_hibern8_supported(hba))
4200                 return;
4201
4202         spin_lock_irqsave(hba->host->host_lock, flags);
4203         ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
4204         spin_unlock_irqrestore(hba->host->host_lock, flags);
4205 }
4206
4207  /**
4208  * ufshcd_init_pwr_info - setting the POR (power on reset)
4209  * values in hba power info
4210  * @hba: per-adapter instance
4211  */
4212 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4213 {
4214         hba->pwr_info.gear_rx = UFS_PWM_G1;
4215         hba->pwr_info.gear_tx = UFS_PWM_G1;
4216         hba->pwr_info.lane_rx = 1;
4217         hba->pwr_info.lane_tx = 1;
4218         hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4219         hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4220         hba->pwr_info.hs_rate = 0;
4221 }
4222
4223 /**
4224  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4225  * @hba: per-adapter instance
4226  */
4227 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
4228 {
4229         struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4230
4231         if (hba->max_pwr_info.is_valid)
4232                 return 0;
4233
4234         pwr_info->pwr_tx = FAST_MODE;
4235         pwr_info->pwr_rx = FAST_MODE;
4236         pwr_info->hs_rate = PA_HS_MODE_B;
4237
4238         /* Get the connected lane count */
4239         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4240                         &pwr_info->lane_rx);
4241         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4242                         &pwr_info->lane_tx);
4243
4244         if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4245                 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4246                                 __func__,
4247                                 pwr_info->lane_rx,
4248                                 pwr_info->lane_tx);
4249                 return -EINVAL;
4250         }
4251
4252         /*
4253          * First, get the maximum gears of HS speed.
4254          * If a zero value, it means there is no HSGEAR capability.
4255          * Then, get the maximum gears of PWM speed.
4256          */
4257         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4258         if (!pwr_info->gear_rx) {
4259                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4260                                 &pwr_info->gear_rx);
4261                 if (!pwr_info->gear_rx) {
4262                         dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4263                                 __func__, pwr_info->gear_rx);
4264                         return -EINVAL;
4265                 }
4266                 pwr_info->pwr_rx = SLOW_MODE;
4267         }
4268
4269         ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4270                         &pwr_info->gear_tx);
4271         if (!pwr_info->gear_tx) {
4272                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4273                                 &pwr_info->gear_tx);
4274                 if (!pwr_info->gear_tx) {
4275                         dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4276                                 __func__, pwr_info->gear_tx);
4277                         return -EINVAL;
4278                 }
4279                 pwr_info->pwr_tx = SLOW_MODE;
4280         }
4281
4282         hba->max_pwr_info.is_valid = true;
4283         return 0;
4284 }
4285
4286 static int ufshcd_change_power_mode(struct ufs_hba *hba,
4287                              struct ufs_pa_layer_attr *pwr_mode)
4288 {
4289         int ret;
4290
4291         /* if already configured to the requested pwr_mode */
4292         if (!hba->force_pmc &&
4293             pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4294             pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4295             pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4296             pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4297             pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4298             pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4299             pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4300                 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4301                 return 0;
4302         }
4303
4304         /*
4305          * Configure attributes for power mode change with below.
4306          * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4307          * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4308          * - PA_HSSERIES
4309          */
4310         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4311         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4312                         pwr_mode->lane_rx);
4313         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4314                         pwr_mode->pwr_rx == FAST_MODE)
4315                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4316         else
4317                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4318
4319         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4320         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4321                         pwr_mode->lane_tx);
4322         if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4323                         pwr_mode->pwr_tx == FAST_MODE)
4324                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4325         else
4326                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4327
4328         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4329             pwr_mode->pwr_tx == FASTAUTO_MODE ||
4330             pwr_mode->pwr_rx == FAST_MODE ||
4331             pwr_mode->pwr_tx == FAST_MODE)
4332                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4333                                                 pwr_mode->hs_rate);
4334
4335         if (!(hba->quirks & UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING)) {
4336                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4337                                 DL_FC0ProtectionTimeOutVal_Default);
4338                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4339                                 DL_TC0ReplayTimeOutVal_Default);
4340                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4341                                 DL_AFC0ReqTimeOutVal_Default);
4342                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4343                                 DL_FC1ProtectionTimeOutVal_Default);
4344                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4345                                 DL_TC1ReplayTimeOutVal_Default);
4346                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4347                                 DL_AFC1ReqTimeOutVal_Default);
4348
4349                 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4350                                 DL_FC0ProtectionTimeOutVal_Default);
4351                 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4352                                 DL_TC0ReplayTimeOutVal_Default);
4353                 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4354                                 DL_AFC0ReqTimeOutVal_Default);
4355         }
4356
4357         ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4358                         | pwr_mode->pwr_tx);
4359
4360         if (ret) {
4361                 dev_err(hba->dev,
4362                         "%s: power mode change failed %d\n", __func__, ret);
4363         } else {
4364                 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4365                                                                 pwr_mode);
4366
4367                 memcpy(&hba->pwr_info, pwr_mode,
4368                         sizeof(struct ufs_pa_layer_attr));
4369         }
4370
4371         return ret;
4372 }
4373
4374 /**
4375  * ufshcd_config_pwr_mode - configure a new power mode
4376  * @hba: per-adapter instance
4377  * @desired_pwr_mode: desired power configuration
4378  */
4379 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4380                 struct ufs_pa_layer_attr *desired_pwr_mode)
4381 {
4382         struct ufs_pa_layer_attr final_params = { 0 };
4383         int ret;
4384
4385         ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4386                                         desired_pwr_mode, &final_params);
4387
4388         if (ret)
4389                 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4390
4391         ret = ufshcd_change_power_mode(hba, &final_params);
4392
4393         return ret;
4394 }
4395 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4396
4397 /**
4398  * ufshcd_complete_dev_init() - checks device readiness
4399  * @hba: per-adapter instance
4400  *
4401  * Set fDeviceInit flag and poll until device toggles it.
4402  */
4403 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4404 {
4405         int err;
4406         bool flag_res = true;
4407         ktime_t timeout;
4408
4409         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4410                 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
4411         if (err) {
4412                 dev_err(hba->dev,
4413                         "%s setting fDeviceInit flag failed with error %d\n",
4414                         __func__, err);
4415                 goto out;
4416         }
4417
4418         /* Poll fDeviceInit flag to be cleared */
4419         timeout = ktime_add_ms(ktime_get(), FDEVICEINIT_COMPL_TIMEOUT);
4420         do {
4421                 err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4422                                         QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4423                 if (!flag_res)
4424                         break;
4425                 usleep_range(5000, 10000);
4426         } while (ktime_before(ktime_get(), timeout));
4427
4428         if (err) {
4429                 dev_err(hba->dev,
4430                                 "%s reading fDeviceInit flag failed with error %d\n",
4431                                 __func__, err);
4432         } else if (flag_res) {
4433                 dev_err(hba->dev,
4434                                 "%s fDeviceInit was not cleared by the device\n",
4435                                 __func__);
4436                 err = -EBUSY;
4437         }
4438 out:
4439         return err;
4440 }
4441
4442 /**
4443  * ufshcd_make_hba_operational - Make UFS controller operational
4444  * @hba: per adapter instance
4445  *
4446  * To bring UFS host controller to operational state,
4447  * 1. Enable required interrupts
4448  * 2. Configure interrupt aggregation
4449  * 3. Program UTRL and UTMRL base address
4450  * 4. Configure run-stop-registers
4451  *
4452  * Returns 0 on success, non-zero value on failure
4453  */
4454 int ufshcd_make_hba_operational(struct ufs_hba *hba)
4455 {
4456         int err = 0;
4457         u32 reg;
4458
4459         /* Enable required interrupts */
4460         ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4461
4462         /* Configure interrupt aggregation */
4463         if (ufshcd_is_intr_aggr_allowed(hba))
4464                 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4465         else
4466                 ufshcd_disable_intr_aggr(hba);
4467
4468         /* Configure UTRL and UTMRL base address registers */
4469         ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4470                         REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4471         ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4472                         REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4473         ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4474                         REG_UTP_TASK_REQ_LIST_BASE_L);
4475         ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4476                         REG_UTP_TASK_REQ_LIST_BASE_H);
4477
4478         /*
4479          * Make sure base address and interrupt setup are updated before
4480          * enabling the run/stop registers below.
4481          */
4482         wmb();
4483
4484         /*
4485          * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4486          */
4487         reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4488         if (!(ufshcd_get_lists_status(reg))) {
4489                 ufshcd_enable_run_stop_reg(hba);
4490         } else {
4491                 dev_err(hba->dev,
4492                         "Host controller not ready to process requests");
4493                 err = -EIO;
4494         }
4495
4496         return err;
4497 }
4498 EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
4499
4500 /**
4501  * ufshcd_hba_stop - Send controller to reset state
4502  * @hba: per adapter instance
4503  */
4504 void ufshcd_hba_stop(struct ufs_hba *hba)
4505 {
4506         unsigned long flags;
4507         int err;
4508
4509         /*
4510          * Obtain the host lock to prevent that the controller is disabled
4511          * while the UFS interrupt handler is active on another CPU.
4512          */
4513         spin_lock_irqsave(hba->host->host_lock, flags);
4514         ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
4515         spin_unlock_irqrestore(hba->host->host_lock, flags);
4516
4517         err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4518                                         CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4519                                         10, 1);
4520         if (err)
4521                 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4522 }
4523 EXPORT_SYMBOL_GPL(ufshcd_hba_stop);
4524
4525 /**
4526  * ufshcd_hba_execute_hce - initialize the controller
4527  * @hba: per adapter instance
4528  *
4529  * The controller resets itself and controller firmware initialization
4530  * sequence kicks off. When controller is ready it will set
4531  * the Host Controller Enable bit to 1.
4532  *
4533  * Returns 0 on success, non-zero value on failure
4534  */
4535 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4536 {
4537         int retry_outer = 3;
4538         int retry_inner;
4539
4540 start:
4541         if (!ufshcd_is_hba_active(hba))
4542                 /* change controller state to "reset state" */
4543                 ufshcd_hba_stop(hba);
4544
4545         /* UniPro link is disabled at this point */
4546         ufshcd_set_link_off(hba);
4547
4548         ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4549
4550         /* start controller initialization sequence */
4551         ufshcd_hba_start(hba);
4552
4553         /*
4554          * To initialize a UFS host controller HCE bit must be set to 1.
4555          * During initialization the HCE bit value changes from 1->0->1.
4556          * When the host controller completes initialization sequence
4557          * it sets the value of HCE bit to 1. The same HCE bit is read back
4558          * to check if the controller has completed initialization sequence.
4559          * So without this delay the value HCE = 1, set in the previous
4560          * instruction might be read back.
4561          * This delay can be changed based on the controller.
4562          */
4563         ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
4564
4565         /* wait for the host controller to complete initialization */
4566         retry_inner = 50;
4567         while (ufshcd_is_hba_active(hba)) {
4568                 if (retry_inner) {
4569                         retry_inner--;
4570                 } else {
4571                         dev_err(hba->dev,
4572                                 "Controller enable failed\n");
4573                         if (retry_outer) {
4574                                 retry_outer--;
4575                                 goto start;
4576                         }
4577                         return -EIO;
4578                 }
4579                 usleep_range(1000, 1100);
4580         }
4581
4582         /* enable UIC related interrupts */
4583         ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4584
4585         ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4586
4587         return 0;
4588 }
4589
4590 int ufshcd_hba_enable(struct ufs_hba *hba)
4591 {
4592         int ret;
4593
4594         if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4595                 ufshcd_set_link_off(hba);
4596                 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4597
4598                 /* enable UIC related interrupts */
4599                 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4600                 ret = ufshcd_dme_reset(hba);
4601                 if (!ret) {
4602                         ret = ufshcd_dme_enable(hba);
4603                         if (!ret)
4604                                 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4605                         if (ret)
4606                                 dev_err(hba->dev,
4607                                         "Host controller enable failed with non-hce\n");
4608                 }
4609         } else {
4610                 ret = ufshcd_hba_execute_hce(hba);
4611         }
4612
4613         return ret;
4614 }
4615 EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4616
4617 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4618 {
4619         int tx_lanes = 0, i, err = 0;
4620
4621         if (!peer)
4622                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4623                                &tx_lanes);
4624         else
4625                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4626                                     &tx_lanes);
4627         for (i = 0; i < tx_lanes; i++) {
4628                 if (!peer)
4629                         err = ufshcd_dme_set(hba,
4630                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4631                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4632                                         0);
4633                 else
4634                         err = ufshcd_dme_peer_set(hba,
4635                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4636                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4637                                         0);
4638                 if (err) {
4639                         dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4640                                 __func__, peer, i, err);
4641                         break;
4642                 }
4643         }
4644
4645         return err;
4646 }
4647
4648 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4649 {
4650         return ufshcd_disable_tx_lcc(hba, true);
4651 }
4652
4653 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
4654 {
4655         struct ufs_event_hist *e;
4656
4657         if (id >= UFS_EVT_CNT)
4658                 return;
4659
4660         e = &hba->ufs_stats.event[id];
4661         e->val[e->pos] = val;
4662         e->tstamp[e->pos] = ktime_get();
4663         e->cnt += 1;
4664         e->pos = (e->pos + 1) % UFS_EVENT_HIST_LENGTH;
4665
4666         ufshcd_vops_event_notify(hba, id, &val);
4667 }
4668 EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
4669
4670 /**
4671  * ufshcd_link_startup - Initialize unipro link startup
4672  * @hba: per adapter instance
4673  *
4674  * Returns 0 for success, non-zero in case of failure
4675  */
4676 static int ufshcd_link_startup(struct ufs_hba *hba)
4677 {
4678         int ret;
4679         int retries = DME_LINKSTARTUP_RETRIES;
4680         bool link_startup_again = false;
4681
4682         /*
4683          * If UFS device isn't active then we will have to issue link startup
4684          * 2 times to make sure the device state move to active.
4685          */
4686         if (!ufshcd_is_ufs_dev_active(hba))
4687                 link_startup_again = true;
4688
4689 link_startup:
4690         do {
4691                 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4692
4693                 ret = ufshcd_dme_link_startup(hba);
4694
4695                 /* check if device is detected by inter-connect layer */
4696                 if (!ret && !ufshcd_is_device_present(hba)) {
4697                         ufshcd_update_evt_hist(hba,
4698                                                UFS_EVT_LINK_STARTUP_FAIL,
4699                                                0);
4700                         dev_err(hba->dev, "%s: Device not present\n", __func__);
4701                         ret = -ENXIO;
4702                         goto out;
4703                 }
4704
4705                 /*
4706                  * DME link lost indication is only received when link is up,
4707                  * but we can't be sure if the link is up until link startup
4708                  * succeeds. So reset the local Uni-Pro and try again.
4709                  */
4710                 if (ret && ufshcd_hba_enable(hba)) {
4711                         ufshcd_update_evt_hist(hba,
4712                                                UFS_EVT_LINK_STARTUP_FAIL,
4713                                                (u32)ret);
4714                         goto out;
4715                 }
4716         } while (ret && retries--);
4717
4718         if (ret) {
4719                 /* failed to get the link up... retire */
4720                 ufshcd_update_evt_hist(hba,
4721                                        UFS_EVT_LINK_STARTUP_FAIL,
4722                                        (u32)ret);
4723                 goto out;
4724         }
4725
4726         if (link_startup_again) {
4727                 link_startup_again = false;
4728                 retries = DME_LINKSTARTUP_RETRIES;
4729                 goto link_startup;
4730         }
4731
4732         /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4733         ufshcd_init_pwr_info(hba);
4734         ufshcd_print_pwr_info(hba);
4735
4736         if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4737                 ret = ufshcd_disable_device_tx_lcc(hba);
4738                 if (ret)
4739                         goto out;
4740         }
4741
4742         /* Include any host controller configuration via UIC commands */
4743         ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4744         if (ret)
4745                 goto out;
4746
4747         /* Clear UECPA once due to LINERESET has happened during LINK_STARTUP */
4748         ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
4749         ret = ufshcd_make_hba_operational(hba);
4750 out:
4751         if (ret) {
4752                 dev_err(hba->dev, "link startup failed %d\n", ret);
4753                 ufshcd_print_host_state(hba);
4754                 ufshcd_print_pwr_info(hba);
4755                 ufshcd_print_evt_hist(hba);
4756         }
4757         return ret;
4758 }
4759
4760 /**
4761  * ufshcd_verify_dev_init() - Verify device initialization
4762  * @hba: per-adapter instance
4763  *
4764  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4765  * device Transport Protocol (UTP) layer is ready after a reset.
4766  * If the UTP layer at the device side is not initialized, it may
4767  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4768  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4769  */
4770 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4771 {
4772         int err = 0;
4773         int retries;
4774
4775         ufshcd_hold(hba, false);
4776         mutex_lock(&hba->dev_cmd.lock);
4777         for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4778                 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4779                                                NOP_OUT_TIMEOUT);
4780
4781                 if (!err || err == -ETIMEDOUT)
4782                         break;
4783
4784                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4785         }
4786         mutex_unlock(&hba->dev_cmd.lock);
4787         ufshcd_release(hba);
4788
4789         if (err)
4790                 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4791         return err;
4792 }
4793
4794 /**
4795  * ufshcd_set_queue_depth - set lun queue depth
4796  * @sdev: pointer to SCSI device
4797  *
4798  * Read bLUQueueDepth value and activate scsi tagged command
4799  * queueing. For WLUN, queue depth is set to 1. For best-effort
4800  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4801  * value that host can queue.
4802  */
4803 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4804 {
4805         int ret = 0;
4806         u8 lun_qdepth;
4807         struct ufs_hba *hba;
4808
4809         hba = shost_priv(sdev->host);
4810
4811         lun_qdepth = hba->nutrs;
4812         ret = ufshcd_read_unit_desc_param(hba,
4813                                           ufshcd_scsi_to_upiu_lun(sdev->lun),
4814                                           UNIT_DESC_PARAM_LU_Q_DEPTH,
4815                                           &lun_qdepth,
4816                                           sizeof(lun_qdepth));
4817
4818         /* Some WLUN doesn't support unit descriptor */
4819         if (ret == -EOPNOTSUPP)
4820                 lun_qdepth = 1;
4821         else if (!lun_qdepth)
4822                 /* eventually, we can figure out the real queue depth */
4823                 lun_qdepth = hba->nutrs;
4824         else
4825                 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4826
4827         dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4828                         __func__, lun_qdepth);
4829         scsi_change_queue_depth(sdev, lun_qdepth);
4830 }
4831
4832 /*
4833  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4834  * @hba: per-adapter instance
4835  * @lun: UFS device lun id
4836  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4837  *
4838  * Returns 0 in case of success and b_lu_write_protect status would be returned
4839  * @b_lu_write_protect parameter.
4840  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4841  * Returns -EINVAL in case of invalid parameters passed to this function.
4842  */
4843 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4844                             u8 lun,
4845                             u8 *b_lu_write_protect)
4846 {
4847         int ret;
4848
4849         if (!b_lu_write_protect)
4850                 ret = -EINVAL;
4851         /*
4852          * According to UFS device spec, RPMB LU can't be write
4853          * protected so skip reading bLUWriteProtect parameter for
4854          * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4855          */
4856         else if (lun >= hba->dev_info.max_lu_supported)
4857                 ret = -ENOTSUPP;
4858         else
4859                 ret = ufshcd_read_unit_desc_param(hba,
4860                                           lun,
4861                                           UNIT_DESC_PARAM_LU_WR_PROTECT,
4862                                           b_lu_write_protect,
4863                                           sizeof(*b_lu_write_protect));
4864         return ret;
4865 }
4866
4867 /**
4868  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4869  * status
4870  * @hba: per-adapter instance
4871  * @sdev: pointer to SCSI device
4872  *
4873  */
4874 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4875                                                     struct scsi_device *sdev)
4876 {
4877         if (hba->dev_info.f_power_on_wp_en &&
4878             !hba->dev_info.is_lu_power_on_wp) {
4879                 u8 b_lu_write_protect;
4880
4881                 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4882                                       &b_lu_write_protect) &&
4883                     (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4884                         hba->dev_info.is_lu_power_on_wp = true;
4885         }
4886 }
4887
4888 /**
4889  * ufshcd_setup_links - associate link b/w device wlun and other luns
4890  * @sdev: pointer to SCSI device
4891  * @hba: pointer to ufs hba
4892  */
4893 static void ufshcd_setup_links(struct ufs_hba *hba, struct scsi_device *sdev)
4894 {
4895         struct device_link *link;
4896
4897         /*
4898          * Device wlun is the supplier & rest of the luns are consumers.
4899          * This ensures that device wlun suspends after all other luns.
4900          */
4901         if (hba->sdev_ufs_device) {
4902                 link = device_link_add(&sdev->sdev_gendev,
4903                                        &hba->sdev_ufs_device->sdev_gendev,
4904                                        DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
4905                 if (!link) {
4906                         dev_err(&sdev->sdev_gendev, "Failed establishing link - %s\n",
4907                                 dev_name(&hba->sdev_ufs_device->sdev_gendev));
4908                         return;
4909                 }
4910                 hba->luns_avail--;
4911                 /* Ignore REPORT_LUN wlun probing */
4912                 if (hba->luns_avail == 1) {
4913                         ufshcd_rpm_put(hba);
4914                         return;
4915                 }
4916         } else {
4917                 /*
4918                  * Device wlun is probed. The assumption is that WLUNs are
4919                  * scanned before other LUNs.
4920                  */
4921                 hba->luns_avail--;
4922         }
4923 }
4924
4925 /**
4926  * ufshcd_slave_alloc - handle initial SCSI device configurations
4927  * @sdev: pointer to SCSI device
4928  *
4929  * Returns success
4930  */
4931 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4932 {
4933         struct ufs_hba *hba;
4934
4935         hba = shost_priv(sdev->host);
4936
4937         /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4938         sdev->use_10_for_ms = 1;
4939
4940         /* DBD field should be set to 1 in mode sense(10) */
4941         sdev->set_dbd_for_ms = 1;
4942
4943         /* allow SCSI layer to restart the device in case of errors */
4944         sdev->allow_restart = 1;
4945
4946         /* REPORT SUPPORTED OPERATION CODES is not supported */
4947         sdev->no_report_opcodes = 1;
4948
4949         /* WRITE_SAME command is not supported */
4950         sdev->no_write_same = 1;
4951
4952         ufshcd_set_queue_depth(sdev);
4953
4954         ufshcd_get_lu_power_on_wp_status(hba, sdev);
4955
4956         ufshcd_setup_links(hba, sdev);
4957
4958         return 0;
4959 }
4960
4961 /**
4962  * ufshcd_change_queue_depth - change queue depth
4963  * @sdev: pointer to SCSI device
4964  * @depth: required depth to set
4965  *
4966  * Change queue depth and make sure the max. limits are not crossed.
4967  */
4968 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4969 {
4970         struct ufs_hba *hba = shost_priv(sdev->host);
4971
4972         if (depth > hba->nutrs)
4973                 depth = hba->nutrs;
4974         return scsi_change_queue_depth(sdev, depth);
4975 }
4976
4977 static void ufshcd_hpb_destroy(struct ufs_hba *hba, struct scsi_device *sdev)
4978 {
4979         /* skip well-known LU */
4980         if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
4981             !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
4982                 return;
4983
4984         ufshpb_destroy_lu(hba, sdev);
4985 }
4986
4987 static void ufshcd_hpb_configure(struct ufs_hba *hba, struct scsi_device *sdev)
4988 {
4989         /* skip well-known LU */
4990         if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
4991             !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
4992                 return;
4993
4994         ufshpb_init_hpb_lu(hba, sdev);
4995 }
4996
4997 /**
4998  * ufshcd_slave_configure - adjust SCSI device configurations
4999  * @sdev: pointer to SCSI device
5000  */
5001 static int ufshcd_slave_configure(struct scsi_device *sdev)
5002 {
5003         struct ufs_hba *hba = shost_priv(sdev->host);
5004         struct request_queue *q = sdev->request_queue;
5005
5006         ufshcd_hpb_configure(hba, sdev);
5007
5008         blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
5009         if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE)
5010                 blk_queue_update_dma_alignment(q, PAGE_SIZE - 1);
5011         /*
5012          * Block runtime-pm until all consumers are added.
5013          * Refer ufshcd_setup_links().
5014          */
5015         if (is_device_wlun(sdev))
5016                 pm_runtime_get_noresume(&sdev->sdev_gendev);
5017         else if (ufshcd_is_rpm_autosuspend_allowed(hba))
5018                 sdev->rpm_autosuspend = 1;
5019
5020         ufshcd_crypto_setup_rq_keyslot_manager(hba, q);
5021
5022         return 0;
5023 }
5024
5025 /**
5026  * ufshcd_slave_destroy - remove SCSI device configurations
5027  * @sdev: pointer to SCSI device
5028  */
5029 static void ufshcd_slave_destroy(struct scsi_device *sdev)
5030 {
5031         struct ufs_hba *hba;
5032         unsigned long flags;
5033
5034         hba = shost_priv(sdev->host);
5035
5036         ufshcd_hpb_destroy(hba, sdev);
5037
5038         /* Drop the reference as it won't be needed anymore */
5039         if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
5040                 spin_lock_irqsave(hba->host->host_lock, flags);
5041                 hba->sdev_ufs_device = NULL;
5042                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5043         } else if (hba->sdev_ufs_device) {
5044                 struct device *supplier = NULL;
5045
5046                 /* Ensure UFS Device WLUN exists and does not disappear */
5047                 spin_lock_irqsave(hba->host->host_lock, flags);
5048                 if (hba->sdev_ufs_device) {
5049                         supplier = &hba->sdev_ufs_device->sdev_gendev;
5050                         get_device(supplier);
5051                 }
5052                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5053
5054                 if (supplier) {
5055                         /*
5056                          * If a LUN fails to probe (e.g. absent BOOT WLUN), the
5057                          * device will not have been registered but can still
5058                          * have a device link holding a reference to the device.
5059                          */
5060                         device_link_remove(&sdev->sdev_gendev, supplier);
5061                         put_device(supplier);
5062                 }
5063         }
5064 }
5065
5066 /**
5067  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
5068  * @lrbp: pointer to local reference block of completed command
5069  * @scsi_status: SCSI command status
5070  *
5071  * Returns value base on SCSI command status
5072  */
5073 static inline int
5074 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
5075 {
5076         int result = 0;
5077
5078         switch (scsi_status) {
5079         case SAM_STAT_CHECK_CONDITION:
5080                 ufshcd_copy_sense_data(lrbp);
5081                 fallthrough;
5082         case SAM_STAT_GOOD:
5083                 result |= DID_OK << 16 | scsi_status;
5084                 break;
5085         case SAM_STAT_TASK_SET_FULL:
5086         case SAM_STAT_BUSY:
5087         case SAM_STAT_TASK_ABORTED:
5088                 ufshcd_copy_sense_data(lrbp);
5089                 result |= scsi_status;
5090                 break;
5091         default:
5092                 result |= DID_ERROR << 16;
5093                 break;
5094         } /* end of switch */
5095
5096         return result;
5097 }
5098
5099 /**
5100  * ufshcd_transfer_rsp_status - Get overall status of the response
5101  * @hba: per adapter instance
5102  * @lrbp: pointer to local reference block of completed command
5103  *
5104  * Returns result of the command to notify SCSI midlayer
5105  */
5106 static inline int
5107 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
5108 {
5109         int result = 0;
5110         int scsi_status;
5111         int ocs;
5112
5113         /* overall command status of utrd */
5114         ocs = ufshcd_get_tr_ocs(lrbp);
5115
5116         if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) {
5117                 if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) &
5118                                         MASK_RSP_UPIU_RESULT)
5119                         ocs = OCS_SUCCESS;
5120         }
5121
5122         switch (ocs) {
5123         case OCS_SUCCESS:
5124                 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
5125                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
5126                 switch (result) {
5127                 case UPIU_TRANSACTION_RESPONSE:
5128                         /*
5129                          * get the response UPIU result to extract
5130                          * the SCSI command status
5131                          */
5132                         result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
5133
5134                         /*
5135                          * get the result based on SCSI status response
5136                          * to notify the SCSI midlayer of the command status
5137                          */
5138                         scsi_status = result & MASK_SCSI_STATUS;
5139                         result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
5140
5141                         /*
5142                          * Currently we are only supporting BKOPs exception
5143                          * events hence we can ignore BKOPs exception event
5144                          * during power management callbacks. BKOPs exception
5145                          * event is not expected to be raised in runtime suspend
5146                          * callback as it allows the urgent bkops.
5147                          * During system suspend, we are anyway forcefully
5148                          * disabling the bkops and if urgent bkops is needed
5149                          * it will be enabled on system resume. Long term
5150                          * solution could be to abort the system suspend if
5151                          * UFS device needs urgent BKOPs.
5152                          */
5153                         if (!hba->pm_op_in_progress &&
5154                             !ufshcd_eh_in_progress(hba) &&
5155                             ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
5156                                 /* Flushed in suspend */
5157                                 schedule_work(&hba->eeh_work);
5158
5159                         if (scsi_status == SAM_STAT_GOOD)
5160                                 ufshpb_rsp_upiu(hba, lrbp);
5161                         break;
5162                 case UPIU_TRANSACTION_REJECT_UPIU:
5163                         /* TODO: handle Reject UPIU Response */
5164                         result = DID_ERROR << 16;
5165                         dev_err(hba->dev,
5166                                 "Reject UPIU not fully implemented\n");
5167                         break;
5168                 default:
5169                         dev_err(hba->dev,
5170                                 "Unexpected request response code = %x\n",
5171                                 result);
5172                         result = DID_ERROR << 16;
5173                         break;
5174                 }
5175                 break;
5176         case OCS_ABORTED:
5177                 result |= DID_ABORT << 16;
5178                 break;
5179         case OCS_INVALID_COMMAND_STATUS:
5180                 result |= DID_REQUEUE << 16;
5181                 break;
5182         case OCS_INVALID_CMD_TABLE_ATTR:
5183         case OCS_INVALID_PRDT_ATTR:
5184         case OCS_MISMATCH_DATA_BUF_SIZE:
5185         case OCS_MISMATCH_RESP_UPIU_SIZE:
5186         case OCS_PEER_COMM_FAILURE:
5187         case OCS_FATAL_ERROR:
5188         case OCS_DEVICE_FATAL_ERROR:
5189         case OCS_INVALID_CRYPTO_CONFIG:
5190         case OCS_GENERAL_CRYPTO_ERROR:
5191         default:
5192                 result |= DID_ERROR << 16;
5193                 dev_err(hba->dev,
5194                                 "OCS error from controller = %x for tag %d\n",
5195                                 ocs, lrbp->task_tag);
5196                 ufshcd_print_evt_hist(hba);
5197                 ufshcd_print_host_state(hba);
5198                 break;
5199         } /* end of switch */
5200
5201         if ((host_byte(result) != DID_OK) &&
5202             (host_byte(result) != DID_REQUEUE) && !hba->silence_err_logs)
5203                 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
5204         return result;
5205 }
5206
5207 static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5208                                          u32 intr_mask)
5209 {
5210         if (!ufshcd_is_auto_hibern8_supported(hba) ||
5211             !ufshcd_is_auto_hibern8_enabled(hba))
5212                 return false;
5213
5214         if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5215                 return false;
5216
5217         if (hba->active_uic_cmd &&
5218             (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5219             hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5220                 return false;
5221
5222         return true;
5223 }
5224
5225 /**
5226  * ufshcd_uic_cmd_compl - handle completion of uic command
5227  * @hba: per adapter instance
5228  * @intr_status: interrupt status generated by the controller
5229  *
5230  * Returns
5231  *  IRQ_HANDLED - If interrupt is valid
5232  *  IRQ_NONE    - If invalid interrupt
5233  */
5234 static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
5235 {
5236         irqreturn_t retval = IRQ_NONE;
5237
5238         spin_lock(hba->host->host_lock);
5239         if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5240                 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5241
5242         if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
5243                 hba->active_uic_cmd->argument2 |=
5244                         ufshcd_get_uic_cmd_result(hba);
5245                 hba->active_uic_cmd->argument3 =
5246                         ufshcd_get_dme_attr_val(hba);
5247                 if (!hba->uic_async_done)
5248                         hba->active_uic_cmd->cmd_active = 0;
5249                 complete(&hba->active_uic_cmd->done);
5250                 retval = IRQ_HANDLED;
5251         }
5252
5253         if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
5254                 hba->active_uic_cmd->cmd_active = 0;
5255                 complete(hba->uic_async_done);
5256                 retval = IRQ_HANDLED;
5257         }
5258
5259         if (retval == IRQ_HANDLED)
5260                 ufshcd_add_uic_command_trace(hba, hba->active_uic_cmd,
5261                                              UFS_CMD_COMP);
5262         spin_unlock(hba->host->host_lock);
5263         return retval;
5264 }
5265
5266 /**
5267  * __ufshcd_transfer_req_compl - handle SCSI and query command completion
5268  * @hba: per adapter instance
5269  * @completed_reqs: bitmask that indicates which requests to complete
5270  * @retry_requests: whether to ask the SCSI core to retry completed requests
5271  */
5272 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
5273                                         unsigned long completed_reqs,
5274                                         bool retry_requests)
5275 {
5276         struct ufshcd_lrb *lrbp;
5277         struct scsi_cmnd *cmd;
5278         int result;
5279         int index;
5280         bool update_scaling = false;
5281
5282         for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5283                 lrbp = &hba->lrb[index];
5284                 lrbp->compl_time_stamp = ktime_get();
5285                 cmd = lrbp->cmd;
5286                 if (cmd) {
5287                         if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
5288                                 ufshcd_update_monitor(hba, lrbp);
5289                         ufshcd_add_command_trace(hba, index, UFS_CMD_COMP);
5290                         result = retry_requests ? DID_BUS_BUSY << 16 :
5291                                 ufshcd_transfer_rsp_status(hba, lrbp);
5292                         scsi_dma_unmap(cmd);
5293                         cmd->result = result;
5294                         /* Mark completed command as NULL in LRB */
5295                         lrbp->cmd = NULL;
5296                         /* Do not touch lrbp after scsi done */
5297                         cmd->scsi_done(cmd);
5298                         ufshcd_release(hba);
5299                         update_scaling = true;
5300                 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
5301                         lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
5302                         if (hba->dev_cmd.complete) {
5303                                 ufshcd_add_command_trace(hba, index,
5304                                                          UFS_DEV_COMP);
5305                                 complete(hba->dev_cmd.complete);
5306                                 update_scaling = true;
5307                         }
5308                 }
5309                 if (update_scaling)
5310                         ufshcd_clk_scaling_update_busy(hba);
5311         }
5312 }
5313
5314 /**
5315  * ufshcd_transfer_req_compl - handle SCSI and query command completion
5316  * @hba: per adapter instance
5317  * @retry_requests: whether or not to ask to retry requests
5318  *
5319  * Returns
5320  *  IRQ_HANDLED - If interrupt is valid
5321  *  IRQ_NONE    - If invalid interrupt
5322  */
5323 static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba,
5324                                              bool retry_requests)
5325 {
5326         unsigned long completed_reqs, flags;
5327         u32 tr_doorbell;
5328
5329         /* Resetting interrupt aggregation counters first and reading the
5330          * DOOR_BELL afterward allows us to handle all the completed requests.
5331          * In order to prevent other interrupts starvation the DB is read once
5332          * after reset. The down side of this solution is the possibility of
5333          * false interrupt if device completes another request after resetting
5334          * aggregation and before reading the DB.
5335          */
5336         if (ufshcd_is_intr_aggr_allowed(hba) &&
5337             !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
5338                 ufshcd_reset_intr_aggr(hba);
5339
5340         if (ufs_fail_completion())
5341                 return IRQ_HANDLED;
5342
5343         spin_lock_irqsave(&hba->outstanding_lock, flags);
5344         tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5345         completed_reqs = ~tr_doorbell & hba->outstanding_reqs;
5346         WARN_ONCE(completed_reqs & ~hba->outstanding_reqs,
5347                   "completed: %#lx; outstanding: %#lx\n", completed_reqs,
5348                   hba->outstanding_reqs);
5349         hba->outstanding_reqs &= ~completed_reqs;
5350         spin_unlock_irqrestore(&hba->outstanding_lock, flags);
5351
5352         if (completed_reqs) {
5353                 __ufshcd_transfer_req_compl(hba, completed_reqs,
5354                                             retry_requests);
5355                 return IRQ_HANDLED;
5356         } else {
5357                 return IRQ_NONE;
5358         }
5359 }
5360
5361 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask)
5362 {
5363         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
5364                                        QUERY_ATTR_IDN_EE_CONTROL, 0, 0,
5365                                        &ee_ctrl_mask);
5366 }
5367
5368 int ufshcd_write_ee_control(struct ufs_hba *hba)
5369 {
5370         int err;
5371
5372         mutex_lock(&hba->ee_ctrl_mutex);
5373         err = __ufshcd_write_ee_control(hba, hba->ee_ctrl_mask);
5374         mutex_unlock(&hba->ee_ctrl_mutex);
5375         if (err)
5376                 dev_err(hba->dev, "%s: failed to write ee control %d\n",
5377                         __func__, err);
5378         return err;
5379 }
5380
5381 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
5382                              u16 set, u16 clr)
5383 {
5384         u16 new_mask, ee_ctrl_mask;
5385         int err = 0;
5386
5387         mutex_lock(&hba->ee_ctrl_mutex);
5388         new_mask = (*mask & ~clr) | set;
5389         ee_ctrl_mask = new_mask | *other_mask;
5390         if (ee_ctrl_mask != hba->ee_ctrl_mask)
5391                 err = __ufshcd_write_ee_control(hba, ee_ctrl_mask);
5392         /* Still need to update 'mask' even if 'ee_ctrl_mask' was unchanged */
5393         if (!err) {
5394                 hba->ee_ctrl_mask = ee_ctrl_mask;
5395                 *mask = new_mask;
5396         }
5397         mutex_unlock(&hba->ee_ctrl_mutex);
5398         return err;
5399 }
5400
5401 /**
5402  * ufshcd_disable_ee - disable exception event
5403  * @hba: per-adapter instance
5404  * @mask: exception event to disable
5405  *
5406  * Disables exception event in the device so that the EVENT_ALERT
5407  * bit is not set.
5408  *
5409  * Returns zero on success, non-zero error value on failure.
5410  */
5411 static inline int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
5412 {
5413         return ufshcd_update_ee_drv_mask(hba, 0, mask);
5414 }
5415
5416 /**
5417  * ufshcd_enable_ee - enable exception event
5418  * @hba: per-adapter instance
5419  * @mask: exception event to enable
5420  *
5421  * Enable corresponding exception event in the device to allow
5422  * device to alert host in critical scenarios.
5423  *
5424  * Returns zero on success, non-zero error value on failure.
5425  */
5426 static inline int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
5427 {
5428         return ufshcd_update_ee_drv_mask(hba, mask, 0);
5429 }
5430
5431 /**
5432  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5433  * @hba: per-adapter instance
5434  *
5435  * Allow device to manage background operations on its own. Enabling
5436  * this might lead to inconsistent latencies during normal data transfers
5437  * as the device is allowed to manage its own way of handling background
5438  * operations.
5439  *
5440  * Returns zero on success, non-zero on failure.
5441  */
5442 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5443 {
5444         int err = 0;
5445
5446         if (hba->auto_bkops_enabled)
5447                 goto out;
5448
5449         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
5450                         QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5451         if (err) {
5452                 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5453                                 __func__, err);
5454                 goto out;
5455         }
5456
5457         hba->auto_bkops_enabled = true;
5458         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
5459
5460         /* No need of URGENT_BKOPS exception from the device */
5461         err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5462         if (err)
5463                 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5464                                 __func__, err);
5465 out:
5466         return err;
5467 }
5468
5469 /**
5470  * ufshcd_disable_auto_bkops - block device in doing background operations
5471  * @hba: per-adapter instance
5472  *
5473  * Disabling background operations improves command response latency but
5474  * has drawback of device moving into critical state where the device is
5475  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5476  * host is idle so that BKOPS are managed effectively without any negative
5477  * impacts.
5478  *
5479  * Returns zero on success, non-zero on failure.
5480  */
5481 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5482 {
5483         int err = 0;
5484
5485         if (!hba->auto_bkops_enabled)
5486                 goto out;
5487
5488         /*
5489          * If host assisted BKOPs is to be enabled, make sure
5490          * urgent bkops exception is allowed.
5491          */
5492         err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5493         if (err) {
5494                 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5495                                 __func__, err);
5496                 goto out;
5497         }
5498
5499         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
5500                         QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
5501         if (err) {
5502                 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5503                                 __func__, err);
5504                 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5505                 goto out;
5506         }
5507
5508         hba->auto_bkops_enabled = false;
5509         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5510         hba->is_urgent_bkops_lvl_checked = false;
5511 out:
5512         return err;
5513 }
5514
5515 /**
5516  * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5517  * @hba: per adapter instance
5518  *
5519  * After a device reset the device may toggle the BKOPS_EN flag
5520  * to default value. The s/w tracking variables should be updated
5521  * as well. This function would change the auto-bkops state based on
5522  * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5523  */
5524 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5525 {
5526         if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5527                 hba->auto_bkops_enabled = false;
5528                 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5529                 ufshcd_enable_auto_bkops(hba);
5530         } else {
5531                 hba->auto_bkops_enabled = true;
5532                 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5533                 ufshcd_disable_auto_bkops(hba);
5534         }
5535         hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
5536         hba->is_urgent_bkops_lvl_checked = false;
5537 }
5538
5539 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5540 {
5541         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5542                         QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5543 }
5544
5545 /**
5546  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5547  * @hba: per-adapter instance
5548  * @status: bkops_status value
5549  *
5550  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5551  * flag in the device to permit background operations if the device
5552  * bkops_status is greater than or equal to "status" argument passed to
5553  * this function, disable otherwise.
5554  *
5555  * Returns 0 for success, non-zero in case of failure.
5556  *
5557  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5558  * to know whether auto bkops is enabled or disabled after this function
5559  * returns control to it.
5560  */
5561 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5562                              enum bkops_status status)
5563 {
5564         int err;
5565         u32 curr_status = 0;
5566
5567         err = ufshcd_get_bkops_status(hba, &curr_status);
5568         if (err) {
5569                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5570                                 __func__, err);
5571                 goto out;
5572         } else if (curr_status > BKOPS_STATUS_MAX) {
5573                 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5574                                 __func__, curr_status);
5575                 err = -EINVAL;
5576                 goto out;
5577         }
5578
5579         if (curr_status >= status)
5580                 err = ufshcd_enable_auto_bkops(hba);
5581         else
5582                 err = ufshcd_disable_auto_bkops(hba);
5583 out:
5584         return err;
5585 }
5586
5587 /**
5588  * ufshcd_urgent_bkops - handle urgent bkops exception event
5589  * @hba: per-adapter instance
5590  *
5591  * Enable fBackgroundOpsEn flag in the device to permit background
5592  * operations.
5593  *
5594  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5595  * and negative error value for any other failure.
5596  */
5597 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5598 {
5599         return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5600 }
5601
5602 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5603 {
5604         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5605                         QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5606 }
5607
5608 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5609 {
5610         int err;
5611         u32 curr_status = 0;
5612
5613         if (hba->is_urgent_bkops_lvl_checked)
5614                 goto enable_auto_bkops;
5615
5616         err = ufshcd_get_bkops_status(hba, &curr_status);
5617         if (err) {
5618                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5619                                 __func__, err);
5620                 goto out;
5621         }
5622
5623         /*
5624          * We are seeing that some devices are raising the urgent bkops
5625          * exception events even when BKOPS status doesn't indicate performace
5626          * impacted or critical. Handle these device by determining their urgent
5627          * bkops status at runtime.
5628          */
5629         if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5630                 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5631                                 __func__, curr_status);
5632                 /* update the current status as the urgent bkops level */
5633                 hba->urgent_bkops_lvl = curr_status;
5634                 hba->is_urgent_bkops_lvl_checked = true;
5635         }
5636
5637 enable_auto_bkops:
5638         err = ufshcd_enable_auto_bkops(hba);
5639 out:
5640         if (err < 0)
5641                 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5642                                 __func__, err);
5643 }
5644
5645 static int __ufshcd_wb_toggle(struct ufs_hba *hba, bool set, enum flag_idn idn)
5646 {
5647         u8 index;
5648         enum query_opcode opcode = set ? UPIU_QUERY_OPCODE_SET_FLAG :
5649                                    UPIU_QUERY_OPCODE_CLEAR_FLAG;
5650
5651         index = ufshcd_wb_get_query_index(hba);
5652         return ufshcd_query_flag_retry(hba, opcode, idn, index, NULL);
5653 }
5654
5655 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable)
5656 {
5657         int ret;
5658
5659         if (!ufshcd_is_wb_allowed(hba))
5660                 return 0;
5661
5662         if (!(enable ^ hba->dev_info.wb_enabled))
5663                 return 0;
5664
5665         ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_EN);
5666         if (ret) {
5667                 dev_err(hba->dev, "%s Write Booster %s failed %d\n",
5668                         __func__, enable ? "enable" : "disable", ret);
5669                 return ret;
5670         }
5671
5672         hba->dev_info.wb_enabled = enable;
5673         dev_info(hba->dev, "%s Write Booster %s\n",
5674                         __func__, enable ? "enabled" : "disabled");
5675
5676         return ret;
5677 }
5678
5679 static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
5680 {
5681         int ret;
5682
5683         ret = __ufshcd_wb_toggle(hba, set,
5684                         QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8);
5685         if (ret) {
5686                 dev_err(hba->dev, "%s: WB-Buf Flush during H8 %s failed: %d\n",
5687                         __func__, set ? "enable" : "disable", ret);
5688                 return;
5689         }
5690         dev_dbg(hba->dev, "%s WB-Buf Flush during H8 %s\n",
5691                         __func__, set ? "enabled" : "disabled");
5692 }
5693
5694 static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5695 {
5696         int ret;
5697
5698         if (!ufshcd_is_wb_allowed(hba) ||
5699             hba->dev_info.wb_buf_flush_enabled == enable)
5700                 return;
5701
5702         ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN);
5703         if (ret) {
5704                 dev_err(hba->dev, "%s WB-Buf Flush %s failed %d\n", __func__,
5705                         enable ? "enable" : "disable", ret);
5706                 return;
5707         }
5708
5709         hba->dev_info.wb_buf_flush_enabled = enable;
5710
5711         dev_dbg(hba->dev, "%s WB-Buf Flush %s\n",
5712                         __func__, enable ? "enabled" : "disabled");
5713 }
5714
5715 static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5716                                                 u32 avail_buf)
5717 {
5718         u32 cur_buf;
5719         int ret;
5720         u8 index;
5721
5722         index = ufshcd_wb_get_query_index(hba);
5723         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5724                                               QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
5725                                               index, 0, &cur_buf);
5726         if (ret) {
5727                 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5728                         __func__, ret);
5729                 return false;
5730         }
5731
5732         if (!cur_buf) {
5733                 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5734                          cur_buf);
5735                 return false;
5736         }
5737         /* Let it continue to flush when available buffer exceeds threshold */
5738         if (avail_buf < hba->vps->wb_flush_threshold)
5739                 return true;
5740
5741         return false;
5742 }
5743
5744 static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
5745 {
5746         int ret;
5747         u32 avail_buf;
5748         u8 index;
5749
5750         if (!ufshcd_is_wb_allowed(hba))
5751                 return false;
5752         /*
5753          * The ufs device needs the vcc to be ON to flush.
5754          * With user-space reduction enabled, it's enough to enable flush
5755          * by checking only the available buffer. The threshold
5756          * defined here is > 90% full.
5757          * With user-space preserved enabled, the current-buffer
5758          * should be checked too because the wb buffer size can reduce
5759          * when disk tends to be full. This info is provided by current
5760          * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5761          * keeping vcc on when current buffer is empty.
5762          */
5763         index = ufshcd_wb_get_query_index(hba);
5764         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5765                                       QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
5766                                       index, 0, &avail_buf);
5767         if (ret) {
5768                 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5769                          __func__, ret);
5770                 return false;
5771         }
5772
5773         if (!hba->dev_info.b_presrv_uspc_en) {
5774                 if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
5775                         return true;
5776                 return false;
5777         }
5778
5779         return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5780 }
5781
5782 static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
5783 {
5784         struct ufs_hba *hba = container_of(to_delayed_work(work),
5785                                            struct ufs_hba,
5786                                            rpm_dev_flush_recheck_work);
5787         /*
5788          * To prevent unnecessary VCC power drain after device finishes
5789          * WriteBooster buffer flush or Auto BKOPs, force runtime resume
5790          * after a certain delay to recheck the threshold by next runtime
5791          * suspend.
5792          */
5793         ufshcd_rpm_get_sync(hba);
5794         ufshcd_rpm_put_sync(hba);
5795 }
5796
5797 /**
5798  * ufshcd_exception_event_handler - handle exceptions raised by device
5799  * @work: pointer to work data
5800  *
5801  * Read bExceptionEventStatus attribute from the device and handle the
5802  * exception event accordingly.
5803  */
5804 static void ufshcd_exception_event_handler(struct work_struct *work)
5805 {
5806         struct ufs_hba *hba;
5807         int err;
5808         u32 status = 0;
5809         hba = container_of(work, struct ufs_hba, eeh_work);
5810
5811         ufshcd_scsi_block_requests(hba);
5812         err = ufshcd_get_ee_status(hba, &status);
5813         if (err) {
5814                 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5815                                 __func__, err);
5816                 goto out;
5817         }
5818
5819         trace_ufshcd_exception_event(dev_name(hba->dev), status);
5820
5821         if (status & hba->ee_drv_mask & MASK_EE_URGENT_BKOPS)
5822                 ufshcd_bkops_exception_event_handler(hba);
5823
5824         ufs_debugfs_exception_event(hba, status);
5825 out:
5826         ufshcd_scsi_unblock_requests(hba);
5827         return;
5828 }
5829
5830 /* Complete requests that have door-bell cleared */
5831 static void ufshcd_complete_requests(struct ufs_hba *hba)
5832 {
5833         ufshcd_transfer_req_compl(hba, /*retry_requests=*/false);
5834         ufshcd_tmc_handler(hba);
5835 }
5836
5837 static void ufshcd_retry_aborted_requests(struct ufs_hba *hba)
5838 {
5839         ufshcd_transfer_req_compl(hba, /*retry_requests=*/true);
5840         ufshcd_tmc_handler(hba);
5841 }
5842
5843 /**
5844  * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5845  *                              to recover from the DL NAC errors or not.
5846  * @hba: per-adapter instance
5847  *
5848  * Returns true if error handling is required, false otherwise
5849  */
5850 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5851 {
5852         unsigned long flags;
5853         bool err_handling = true;
5854
5855         spin_lock_irqsave(hba->host->host_lock, flags);
5856         /*
5857          * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5858          * device fatal error and/or DL NAC & REPLAY timeout errors.
5859          */
5860         if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5861                 goto out;
5862
5863         if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5864             ((hba->saved_err & UIC_ERROR) &&
5865              (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5866                 goto out;
5867
5868         if ((hba->saved_err & UIC_ERROR) &&
5869             (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5870                 int err;
5871                 /*
5872                  * wait for 50ms to see if we can get any other errors or not.
5873                  */
5874                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5875                 msleep(50);
5876                 spin_lock_irqsave(hba->host->host_lock, flags);
5877
5878                 /*
5879                  * now check if we have got any other severe errors other than
5880                  * DL NAC error?
5881                  */
5882                 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5883                     ((hba->saved_err & UIC_ERROR) &&
5884                     (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5885                         goto out;
5886
5887                 /*
5888                  * As DL NAC is the only error received so far, send out NOP
5889                  * command to confirm if link is still active or not.
5890                  *   - If we don't get any response then do error recovery.
5891                  *   - If we get response then clear the DL NAC error bit.
5892                  */
5893
5894                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5895                 err = ufshcd_verify_dev_init(hba);
5896                 spin_lock_irqsave(hba->host->host_lock, flags);
5897
5898                 if (err)
5899                         goto out;
5900
5901                 /* Link seems to be alive hence ignore the DL NAC errors */
5902                 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5903                         hba->saved_err &= ~UIC_ERROR;
5904                 /* clear NAC error */
5905                 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5906                 if (!hba->saved_uic_err)
5907                         err_handling = false;
5908         }
5909 out:
5910         spin_unlock_irqrestore(hba->host->host_lock, flags);
5911         return err_handling;
5912 }
5913
5914 static void ufshcd_clk_scaling_allow(struct ufs_hba *hba, bool allow)
5915 {
5916         down_write(&hba->clk_scaling_lock);
5917         hba->clk_scaling.is_allowed = allow;
5918         up_write(&hba->clk_scaling_lock);
5919 }
5920
5921 static void ufshcd_clk_scaling_suspend(struct ufs_hba *hba, bool suspend)
5922 {
5923         if (suspend) {
5924                 if (hba->clk_scaling.is_enabled)
5925                         ufshcd_suspend_clkscaling(hba);
5926                 ufshcd_clk_scaling_allow(hba, false);
5927         } else {
5928                 ufshcd_clk_scaling_allow(hba, true);
5929                 if (hba->clk_scaling.is_enabled)
5930                         ufshcd_resume_clkscaling(hba);
5931         }
5932 }
5933
5934 static void ufshcd_err_handling_prepare(struct ufs_hba *hba)
5935 {
5936         ufshcd_rpm_get_sync(hba);
5937         if (pm_runtime_status_suspended(&hba->sdev_ufs_device->sdev_gendev) ||
5938             hba->is_sys_suspended) {
5939                 enum ufs_pm_op pm_op;
5940
5941                 /*
5942                  * Don't assume anything of resume, if
5943                  * resume fails, irq and clocks can be OFF, and powers
5944                  * can be OFF or in LPM.
5945                  */
5946                 ufshcd_setup_hba_vreg(hba, true);
5947                 ufshcd_enable_irq(hba);
5948                 ufshcd_setup_vreg(hba, true);
5949                 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
5950                 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
5951                 ufshcd_hold(hba, false);
5952                 if (!ufshcd_is_clkgating_allowed(hba))
5953                         ufshcd_setup_clocks(hba, true);
5954                 ufshcd_release(hba);
5955                 pm_op = hba->is_sys_suspended ? UFS_SYSTEM_PM : UFS_RUNTIME_PM;
5956                 ufshcd_vops_resume(hba, pm_op);
5957         } else {
5958                 ufshcd_hold(hba, false);
5959                 if (ufshcd_is_clkscaling_supported(hba) &&
5960                     hba->clk_scaling.is_enabled)
5961                         ufshcd_suspend_clkscaling(hba);
5962                 ufshcd_clk_scaling_allow(hba, false);
5963         }
5964         ufshcd_scsi_block_requests(hba);
5965         /* Drain ufshcd_queuecommand() */
5966         down_write(&hba->clk_scaling_lock);
5967         up_write(&hba->clk_scaling_lock);
5968         cancel_work_sync(&hba->eeh_work);
5969 }
5970
5971 static void ufshcd_err_handling_unprepare(struct ufs_hba *hba)
5972 {
5973         ufshcd_scsi_unblock_requests(hba);
5974         ufshcd_release(hba);
5975         if (ufshcd_is_clkscaling_supported(hba))
5976                 ufshcd_clk_scaling_suspend(hba, false);
5977         ufshcd_clear_ua_wluns(hba);
5978         ufshcd_rpm_put(hba);
5979 }
5980
5981 static inline bool ufshcd_err_handling_should_stop(struct ufs_hba *hba)
5982 {
5983         return (!hba->is_powered || hba->shutting_down ||
5984                 !hba->sdev_ufs_device ||
5985                 hba->ufshcd_state == UFSHCD_STATE_ERROR ||
5986                 (!(hba->saved_err || hba->saved_uic_err || hba->force_reset ||
5987                    ufshcd_is_link_broken(hba))));
5988 }
5989
5990 #ifdef CONFIG_PM
5991 static void ufshcd_recover_pm_error(struct ufs_hba *hba)
5992 {
5993         struct Scsi_Host *shost = hba->host;
5994         struct scsi_device *sdev;
5995         struct request_queue *q;
5996         int ret;
5997
5998         hba->is_sys_suspended = false;
5999         /*
6000          * Set RPM status of wlun device to RPM_ACTIVE,
6001          * this also clears its runtime error.
6002          */
6003         ret = pm_runtime_set_active(&hba->sdev_ufs_device->sdev_gendev);
6004
6005         /* hba device might have a runtime error otherwise */
6006         if (ret)
6007                 ret = pm_runtime_set_active(hba->dev);
6008         /*
6009          * If wlun device had runtime error, we also need to resume those
6010          * consumer scsi devices in case any of them has failed to be
6011          * resumed due to supplier runtime resume failure. This is to unblock
6012          * blk_queue_enter in case there are bios waiting inside it.
6013          */
6014         if (!ret) {
6015                 shost_for_each_device(sdev, shost) {
6016                         q = sdev->request_queue;
6017                         if (q->dev && (q->rpm_status == RPM_SUSPENDED ||
6018                                        q->rpm_status == RPM_SUSPENDING))
6019                                 pm_request_resume(q->dev);
6020                 }
6021         }
6022 }
6023 #else
6024 static inline void ufshcd_recover_pm_error(struct ufs_hba *hba)
6025 {
6026 }
6027 #endif
6028
6029 static bool ufshcd_is_pwr_mode_restore_needed(struct ufs_hba *hba)
6030 {
6031         struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;
6032         u32 mode;
6033
6034         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
6035
6036         if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))
6037                 return true;
6038
6039         if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))
6040                 return true;
6041
6042         return false;
6043 }
6044
6045 /**
6046  * ufshcd_err_handler - handle UFS errors that require s/w attention
6047  * @host: SCSI host pointer
6048  */
6049 static void ufshcd_err_handler(struct Scsi_Host *host)
6050 {
6051         struct ufs_hba *hba = shost_priv(host);
6052         unsigned long flags;
6053         bool err_xfer = false;
6054         bool err_tm = false;
6055         int err = 0, pmc_err;
6056         int tag;
6057         bool needs_reset = false, needs_restore = false;
6058
6059         down(&hba->host_sem);
6060         spin_lock_irqsave(hba->host->host_lock, flags);
6061         hba->host->host_eh_scheduled = 0;
6062         if (ufshcd_err_handling_should_stop(hba)) {
6063                 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6064                         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6065                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6066                 up(&hba->host_sem);
6067                 return;
6068         }
6069         ufshcd_set_eh_in_progress(hba);
6070         spin_unlock_irqrestore(hba->host->host_lock, flags);
6071         ufshcd_err_handling_prepare(hba);
6072         /* Complete requests that have door-bell cleared by h/w */
6073         ufshcd_complete_requests(hba);
6074         spin_lock_irqsave(hba->host->host_lock, flags);
6075         if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6076                 hba->ufshcd_state = UFSHCD_STATE_RESET;
6077         /*
6078          * A full reset and restore might have happened after preparation
6079          * is finished, double check whether we should stop.
6080          */
6081         if (ufshcd_err_handling_should_stop(hba))
6082                 goto skip_err_handling;
6083
6084         if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6085                 bool ret;
6086
6087                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6088                 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
6089                 ret = ufshcd_quirk_dl_nac_errors(hba);
6090                 spin_lock_irqsave(hba->host->host_lock, flags);
6091                 if (!ret && ufshcd_err_handling_should_stop(hba))
6092                         goto skip_err_handling;
6093         }
6094
6095         if ((hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6096             (hba->saved_uic_err &&
6097              (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
6098                 bool pr_prdt = !!(hba->saved_err & SYSTEM_BUS_FATAL_ERROR);
6099
6100                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6101                 ufshcd_print_host_state(hba);
6102                 ufshcd_print_pwr_info(hba);
6103                 ufshcd_print_evt_hist(hba);
6104                 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
6105                 ufshcd_print_trs(hba, hba->outstanding_reqs, pr_prdt);
6106                 spin_lock_irqsave(hba->host->host_lock, flags);
6107         }
6108
6109         /*
6110          * if host reset is required then skip clearing the pending
6111          * transfers forcefully because they will get cleared during
6112          * host reset and restore
6113          */
6114         if (hba->force_reset || ufshcd_is_link_broken(hba) ||
6115             ufshcd_is_saved_err_fatal(hba) ||
6116             ((hba->saved_err & UIC_ERROR) &&
6117              (hba->saved_uic_err & (UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
6118                                     UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))) {
6119                 needs_reset = true;
6120                 goto do_reset;
6121         }
6122
6123         /*
6124          * If LINERESET was caught, UFS might have been put to PWM mode,
6125          * check if power mode restore is needed.
6126          */
6127         if (hba->saved_uic_err & UFSHCD_UIC_PA_GENERIC_ERROR) {
6128                 hba->saved_uic_err &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6129                 if (!hba->saved_uic_err)
6130                         hba->saved_err &= ~UIC_ERROR;
6131                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6132                 if (ufshcd_is_pwr_mode_restore_needed(hba))
6133                         needs_restore = true;
6134                 spin_lock_irqsave(hba->host->host_lock, flags);
6135                 if (!hba->saved_err && !needs_restore)
6136                         goto skip_err_handling;
6137         }
6138
6139         hba->silence_err_logs = true;
6140         /* release lock as clear command might sleep */
6141         spin_unlock_irqrestore(hba->host->host_lock, flags);
6142         /* Clear pending transfer requests */
6143         for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
6144                 if (ufshcd_try_to_abort_task(hba, tag)) {
6145                         err_xfer = true;
6146                         goto lock_skip_pending_xfer_clear;
6147                 }
6148         }
6149
6150         /* Clear pending task management requests */
6151         for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
6152                 if (ufshcd_clear_tm_cmd(hba, tag)) {
6153                         err_tm = true;
6154                         goto lock_skip_pending_xfer_clear;
6155                 }
6156         }
6157
6158 lock_skip_pending_xfer_clear:
6159         ufshcd_retry_aborted_requests(hba);
6160
6161         spin_lock_irqsave(hba->host->host_lock, flags);
6162         hba->silence_err_logs = false;
6163         if (err_xfer || err_tm) {
6164                 needs_reset = true;
6165                 goto do_reset;
6166         }
6167
6168         /*
6169          * After all reqs and tasks are cleared from doorbell,
6170          * now it is safe to retore power mode.
6171          */
6172         if (needs_restore) {
6173                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6174                 /*
6175                  * Hold the scaling lock just in case dev cmds
6176                  * are sent via bsg and/or sysfs.
6177                  */
6178                 down_write(&hba->clk_scaling_lock);
6179                 hba->force_pmc = true;
6180                 pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));
6181                 if (pmc_err) {
6182                         needs_reset = true;
6183                         dev_err(hba->dev, "%s: Failed to restore power mode, err = %d\n",
6184                                         __func__, pmc_err);
6185                 }
6186                 hba->force_pmc = false;
6187                 ufshcd_print_pwr_info(hba);
6188                 up_write(&hba->clk_scaling_lock);
6189                 spin_lock_irqsave(hba->host->host_lock, flags);
6190         }
6191
6192 do_reset:
6193         /* Fatal errors need reset */
6194         if (needs_reset) {
6195                 hba->force_reset = false;
6196                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6197                 err = ufshcd_reset_and_restore(hba);
6198                 if (err)
6199                         dev_err(hba->dev, "%s: reset and restore failed with err %d\n",
6200                                         __func__, err);
6201                 else
6202                         ufshcd_recover_pm_error(hba);
6203                 spin_lock_irqsave(hba->host->host_lock, flags);
6204         }
6205
6206 skip_err_handling:
6207         if (!needs_reset) {
6208                 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
6209                         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6210                 if (hba->saved_err || hba->saved_uic_err)
6211                         dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
6212                             __func__, hba->saved_err, hba->saved_uic_err);
6213         }
6214         ufshcd_clear_eh_in_progress(hba);
6215         spin_unlock_irqrestore(hba->host->host_lock, flags);
6216         ufshcd_err_handling_unprepare(hba);
6217         up(&hba->host_sem);
6218 }
6219
6220 /**
6221  * ufshcd_update_uic_error - check and set fatal UIC error flags.
6222  * @hba: per-adapter instance
6223  *
6224  * Returns
6225  *  IRQ_HANDLED - If interrupt is valid
6226  *  IRQ_NONE    - If invalid interrupt
6227  */
6228 static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
6229 {
6230         u32 reg;
6231         irqreturn_t retval = IRQ_NONE;
6232
6233         /* PHY layer error */
6234         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
6235         if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
6236             (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) {
6237                 ufshcd_update_evt_hist(hba, UFS_EVT_PA_ERR, reg);
6238                 /*
6239                  * To know whether this error is fatal or not, DB timeout
6240                  * must be checked but this error is handled separately.
6241                  */
6242                 if (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)
6243                         dev_dbg(hba->dev, "%s: UIC Lane error reported\n",
6244                                         __func__);
6245
6246                 /* Got a LINERESET indication. */
6247                 if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) {
6248                         struct uic_command *cmd = NULL;
6249
6250                         hba->uic_error |= UFSHCD_UIC_PA_GENERIC_ERROR;
6251                         if (hba->uic_async_done && hba->active_uic_cmd)
6252                                 cmd = hba->active_uic_cmd;
6253                         /*
6254                          * Ignore the LINERESET during power mode change
6255                          * operation via DME_SET command.
6256                          */
6257                         if (cmd && (cmd->command == UIC_CMD_DME_SET))
6258                                 hba->uic_error &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6259                 }
6260                 retval |= IRQ_HANDLED;
6261         }
6262
6263         /* PA_INIT_ERROR is fatal and needs UIC reset */
6264         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
6265         if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
6266             (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
6267                 ufshcd_update_evt_hist(hba, UFS_EVT_DL_ERR, reg);
6268
6269                 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
6270                         hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
6271                 else if (hba->dev_quirks &
6272                                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6273                         if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
6274                                 hba->uic_error |=
6275                                         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6276                         else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
6277                                 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
6278                 }
6279                 retval |= IRQ_HANDLED;
6280         }
6281
6282         /* UIC NL/TL/DME errors needs software retry */
6283         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
6284         if ((reg & UIC_NETWORK_LAYER_ERROR) &&
6285             (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
6286                 ufshcd_update_evt_hist(hba, UFS_EVT_NL_ERR, reg);
6287                 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
6288                 retval |= IRQ_HANDLED;
6289         }
6290
6291         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
6292         if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
6293             (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
6294                 ufshcd_update_evt_hist(hba, UFS_EVT_TL_ERR, reg);
6295                 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
6296                 retval |= IRQ_HANDLED;
6297         }
6298
6299         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
6300         if ((reg & UIC_DME_ERROR) &&
6301             (reg & UIC_DME_ERROR_CODE_MASK)) {
6302                 ufshcd_update_evt_hist(hba, UFS_EVT_DME_ERR, reg);
6303                 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
6304                 retval |= IRQ_HANDLED;
6305         }
6306
6307         dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
6308                         __func__, hba->uic_error);
6309         return retval;
6310 }
6311
6312 /**
6313  * ufshcd_check_errors - Check for errors that need s/w attention
6314  * @hba: per-adapter instance
6315  * @intr_status: interrupt status generated by the controller
6316  *
6317  * Returns
6318  *  IRQ_HANDLED - If interrupt is valid
6319  *  IRQ_NONE    - If invalid interrupt
6320  */
6321 static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba, u32 intr_status)
6322 {
6323         bool queue_eh_work = false;
6324         irqreturn_t retval = IRQ_NONE;
6325
6326         spin_lock(hba->host->host_lock);
6327         hba->errors |= UFSHCD_ERROR_MASK & intr_status;
6328
6329         if (hba->errors & INT_FATAL_ERRORS) {
6330                 ufshcd_update_evt_hist(hba, UFS_EVT_FATAL_ERR,
6331                                        hba->errors);
6332                 queue_eh_work = true;
6333         }
6334
6335         if (hba->errors & UIC_ERROR) {
6336                 hba->uic_error = 0;
6337                 retval = ufshcd_update_uic_error(hba);
6338                 if (hba->uic_error)
6339                         queue_eh_work = true;
6340         }
6341
6342         if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
6343                 dev_err(hba->dev,
6344                         "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
6345                         __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
6346                         "Enter" : "Exit",
6347                         hba->errors, ufshcd_get_upmcrs(hba));
6348                 ufshcd_update_evt_hist(hba, UFS_EVT_AUTO_HIBERN8_ERR,
6349                                        hba->errors);
6350                 ufshcd_set_link_broken(hba);
6351                 queue_eh_work = true;
6352         }
6353
6354         if (queue_eh_work) {
6355                 /*
6356                  * update the transfer error masks to sticky bits, let's do this
6357                  * irrespective of current ufshcd_state.
6358                  */
6359                 hba->saved_err |= hba->errors;
6360                 hba->saved_uic_err |= hba->uic_error;
6361
6362                 /* dump controller state before resetting */
6363                 if ((hba->saved_err &
6364                      (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6365                     (hba->saved_uic_err &&
6366                      (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
6367                         dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
6368                                         __func__, hba->saved_err,
6369                                         hba->saved_uic_err);
6370                         ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE,
6371                                          "host_regs: ");
6372                         ufshcd_print_pwr_info(hba);
6373                 }
6374                 retval |= IRQ_HANDLED;
6375         }
6376         /*
6377          * if (!queue_eh_work) -
6378          * Other errors are either non-fatal where host recovers
6379          * itself without s/w intervention or errors that will be
6380          * handled by the SCSI core layer.
6381          */
6382         hba->errors = 0;
6383         hba->uic_error = 0;
6384         spin_unlock(hba->host->host_lock);
6385
6386         if (queue_eh_work)
6387                 ufshcd_schedule_eh(hba);
6388
6389         return retval;
6390 }
6391
6392 struct ctm_info {
6393         struct ufs_hba  *hba;
6394         unsigned long   pending;
6395         unsigned int    ncpl;
6396 };
6397
6398 static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
6399 {
6400         struct ctm_info *const ci = priv;
6401         struct completion *c;
6402
6403         WARN_ON_ONCE(reserved);
6404         if (test_bit(req->tag, &ci->pending))
6405                 return true;
6406         ci->ncpl++;
6407         c = req->end_io_data;
6408         if (c)
6409                 complete(c);
6410         return true;
6411 }
6412
6413 /**
6414  * ufshcd_tmc_handler - handle task management function completion
6415  * @hba: per adapter instance
6416  *
6417  * Returns
6418  *  IRQ_HANDLED - If interrupt is valid
6419  *  IRQ_NONE    - If invalid interrupt
6420  */
6421 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
6422 {
6423         unsigned long flags;
6424         struct request_queue *q = hba->tmf_queue;
6425         struct ctm_info ci = {
6426                 .hba     = hba,
6427         };
6428
6429         spin_lock_irqsave(hba->host->host_lock, flags);
6430         ci.pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
6431         blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
6432         spin_unlock_irqrestore(hba->host->host_lock, flags);
6433
6434         return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
6435 }
6436
6437 /**
6438  * ufshcd_sl_intr - Interrupt service routine
6439  * @hba: per adapter instance
6440  * @intr_status: contains interrupts generated by the controller
6441  *
6442  * Returns
6443  *  IRQ_HANDLED - If interrupt is valid
6444  *  IRQ_NONE    - If invalid interrupt
6445  */
6446 static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
6447 {
6448         irqreturn_t retval = IRQ_NONE;
6449
6450         if (intr_status & UFSHCD_UIC_MASK)
6451                 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
6452
6453         if (intr_status & UFSHCD_ERROR_MASK || hba->errors)
6454                 retval |= ufshcd_check_errors(hba, intr_status);
6455
6456         if (intr_status & UTP_TASK_REQ_COMPL)
6457                 retval |= ufshcd_tmc_handler(hba);
6458
6459         if (intr_status & UTP_TRANSFER_REQ_COMPL)
6460                 retval |= ufshcd_transfer_req_compl(hba, /*retry_requests=*/false);
6461
6462         return retval;
6463 }
6464
6465 /**
6466  * ufshcd_intr - Main interrupt service routine
6467  * @irq: irq number
6468  * @__hba: pointer to adapter instance
6469  *
6470  * Returns
6471  *  IRQ_HANDLED - If interrupt is valid
6472  *  IRQ_NONE    - If invalid interrupt
6473  */
6474 static irqreturn_t ufshcd_intr(int irq, void *__hba)
6475 {
6476         u32 intr_status, enabled_intr_status = 0;
6477         irqreturn_t retval = IRQ_NONE;
6478         struct ufs_hba *hba = __hba;
6479         int retries = hba->nutrs;
6480
6481         intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6482         hba->ufs_stats.last_intr_status = intr_status;
6483         hba->ufs_stats.last_intr_ts = ktime_get();
6484
6485         /*
6486          * There could be max of hba->nutrs reqs in flight and in worst case
6487          * if the reqs get finished 1 by 1 after the interrupt status is
6488          * read, make sure we handle them by checking the interrupt status
6489          * again in a loop until we process all of the reqs before returning.
6490          */
6491         while (intr_status && retries--) {
6492                 enabled_intr_status =
6493                         intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
6494                 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
6495                 if (enabled_intr_status)
6496                         retval |= ufshcd_sl_intr(hba, enabled_intr_status);
6497
6498                 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
6499         }
6500
6501         if (enabled_intr_status && retval == IRQ_NONE &&
6502             (!(enabled_intr_status & UTP_TRANSFER_REQ_COMPL) ||
6503              hba->outstanding_reqs) && !ufshcd_eh_in_progress(hba)) {
6504                 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x (0x%08x, 0x%08x)\n",
6505                                         __func__,
6506                                         intr_status,
6507                                         hba->ufs_stats.last_intr_status,
6508                                         enabled_intr_status);
6509                 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
6510         }
6511
6512         return retval;
6513 }
6514
6515 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
6516 {
6517         int err = 0;
6518         u32 mask = 1 << tag;
6519         unsigned long flags;
6520
6521         if (!test_bit(tag, &hba->outstanding_tasks))
6522                 goto out;
6523
6524         spin_lock_irqsave(hba->host->host_lock, flags);
6525         ufshcd_utmrl_clear(hba, tag);
6526         spin_unlock_irqrestore(hba->host->host_lock, flags);
6527
6528         /* poll for max. 1 sec to clear door bell register by h/w */
6529         err = ufshcd_wait_for_register(hba,
6530                         REG_UTP_TASK_REQ_DOOR_BELL,
6531                         mask, 0, 1000, 1000);
6532 out:
6533         return err;
6534 }
6535
6536 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
6537                 struct utp_task_req_desc *treq, u8 tm_function)
6538 {
6539         struct request_queue *q = hba->tmf_queue;
6540         struct Scsi_Host *host = hba->host;
6541         DECLARE_COMPLETION_ONSTACK(wait);
6542         struct request *req;
6543         unsigned long flags;
6544         int task_tag, err;
6545
6546         /*
6547          * blk_get_request() is used here only to get a free tag.
6548          */
6549         req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6550         if (IS_ERR(req))
6551                 return PTR_ERR(req);
6552
6553         req->end_io_data = &wait;
6554         ufshcd_hold(hba, false);
6555
6556         spin_lock_irqsave(host->host_lock, flags);
6557         blk_mq_start_request(req);
6558
6559         task_tag = req->tag;
6560         treq->upiu_req.req_header.dword_0 |= cpu_to_be32(task_tag);
6561
6562         memcpy(hba->utmrdl_base_addr + task_tag, treq, sizeof(*treq));
6563         ufshcd_vops_setup_task_mgmt(hba, task_tag, tm_function);
6564
6565         /* send command to the controller */
6566         __set_bit(task_tag, &hba->outstanding_tasks);
6567
6568         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TASK_REQ_DOOR_BELL);
6569         /* Make sure that doorbell is committed immediately */
6570         wmb();
6571
6572         spin_unlock_irqrestore(host->host_lock, flags);
6573
6574         ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_SEND);
6575
6576         /* wait until the task management command is completed */
6577         err = wait_for_completion_io_timeout(&wait,
6578                         msecs_to_jiffies(TM_CMD_TIMEOUT));
6579         if (!err) {
6580                 /*
6581                  * Make sure that ufshcd_compl_tm() does not trigger a
6582                  * use-after-free.
6583                  */
6584                 req->end_io_data = NULL;
6585                 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_ERR);
6586                 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6587                                 __func__, tm_function);
6588                 if (ufshcd_clear_tm_cmd(hba, task_tag))
6589                         dev_WARN(hba->dev, "%s: unable to clear tm cmd (slot %d) after timeout\n",
6590                                         __func__, task_tag);
6591                 err = -ETIMEDOUT;
6592         } else {
6593                 err = 0;
6594                 memcpy(treq, hba->utmrdl_base_addr + task_tag, sizeof(*treq));
6595
6596                 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_COMP);
6597         }
6598
6599         spin_lock_irqsave(hba->host->host_lock, flags);
6600         __clear_bit(task_tag, &hba->outstanding_tasks);
6601         spin_unlock_irqrestore(hba->host->host_lock, flags);
6602
6603         ufshcd_release(hba);
6604         blk_put_request(req);
6605
6606         return err;
6607 }
6608
6609 /**
6610  * ufshcd_issue_tm_cmd - issues task management commands to controller
6611  * @hba: per adapter instance
6612  * @lun_id: LUN ID to which TM command is sent
6613  * @task_id: task ID to which the TM command is applicable
6614  * @tm_function: task management function opcode
6615  * @tm_response: task management service response return value
6616  *
6617  * Returns non-zero value on error, zero on success.
6618  */
6619 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6620                 u8 tm_function, u8 *tm_response)
6621 {
6622         struct utp_task_req_desc treq = { { 0 }, };
6623         int ocs_value, err;
6624
6625         /* Configure task request descriptor */
6626         treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6627         treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6628
6629         /* Configure task request UPIU */
6630         treq.upiu_req.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
6631                                   cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
6632         treq.upiu_req.req_header.dword_1 = cpu_to_be32(tm_function << 16);
6633
6634         /*
6635          * The host shall provide the same value for LUN field in the basic
6636          * header and for Input Parameter.
6637          */
6638         treq.upiu_req.input_param1 = cpu_to_be32(lun_id);
6639         treq.upiu_req.input_param2 = cpu_to_be32(task_id);
6640
6641         err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6642         if (err == -ETIMEDOUT)
6643                 return err;
6644
6645         ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6646         if (ocs_value != OCS_SUCCESS)
6647                 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6648                                 __func__, ocs_value);
6649         else if (tm_response)
6650                 *tm_response = be32_to_cpu(treq.upiu_rsp.output_param1) &
6651                                 MASK_TM_SERVICE_RESP;
6652         return err;
6653 }
6654
6655 /**
6656  * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6657  * @hba:        per-adapter instance
6658  * @req_upiu:   upiu request
6659  * @rsp_upiu:   upiu reply
6660  * @desc_buff:  pointer to descriptor buffer, NULL if NA
6661  * @buff_len:   descriptor size, 0 if NA
6662  * @cmd_type:   specifies the type (NOP, Query...)
6663  * @desc_op:    descriptor operation
6664  *
6665  * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6666  * Therefore, it "rides" the device management infrastructure: uses its tag and
6667  * tasks work queues.
6668  *
6669  * Since there is only one available tag for device management commands,
6670  * the caller is expected to hold the hba->dev_cmd.lock mutex.
6671  */
6672 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6673                                         struct utp_upiu_req *req_upiu,
6674                                         struct utp_upiu_req *rsp_upiu,
6675                                         u8 *desc_buff, int *buff_len,
6676                                         enum dev_cmd_type cmd_type,
6677                                         enum query_opcode desc_op)
6678 {
6679         struct request_queue *q = hba->cmd_queue;
6680         DECLARE_COMPLETION_ONSTACK(wait);
6681         struct request *req;
6682         struct ufshcd_lrb *lrbp;
6683         int err = 0;
6684         int tag;
6685         u8 upiu_flags;
6686
6687         down_read(&hba->clk_scaling_lock);
6688
6689         req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6690         if (IS_ERR(req)) {
6691                 err = PTR_ERR(req);
6692                 goto out_unlock;
6693         }
6694         tag = req->tag;
6695         WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
6696
6697         if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
6698                 err = -EBUSY;
6699                 goto out;
6700         }
6701
6702         lrbp = &hba->lrb[tag];
6703         WARN_ON(lrbp->cmd);
6704         lrbp->cmd = NULL;
6705         lrbp->sense_bufflen = 0;
6706         lrbp->sense_buffer = NULL;
6707         lrbp->task_tag = tag;
6708         lrbp->lun = 0;
6709         lrbp->intr_cmd = true;
6710         ufshcd_prepare_lrbp_crypto(NULL, lrbp);
6711         hba->dev_cmd.type = cmd_type;
6712
6713         if (hba->ufs_version <= ufshci_version(1, 1))
6714                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
6715         else
6716                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
6717
6718         /* update the task tag in the request upiu */
6719         req_upiu->header.dword_0 |= cpu_to_be32(tag);
6720
6721         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6722
6723         /* just copy the upiu request as it is */
6724         memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6725         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6726                 /* The Data Segment Area is optional depending upon the query
6727                  * function value. for WRITE DESCRIPTOR, the data segment
6728                  * follows right after the tsf.
6729                  */
6730                 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6731                 *buff_len = 0;
6732         }
6733
6734         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6735
6736         hba->dev_cmd.complete = &wait;
6737
6738         ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
6739
6740         ufshcd_send_command(hba, tag);
6741         /*
6742          * ignore the returning value here - ufshcd_check_query_response is
6743          * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6744          * read the response directly ignoring all errors.
6745          */
6746         ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6747
6748         /* just copy the upiu response as it is */
6749         memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
6750         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6751                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6752                 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6753                                MASK_QUERY_DATA_SEG_LEN;
6754
6755                 if (*buff_len >= resp_len) {
6756                         memcpy(desc_buff, descp, resp_len);
6757                         *buff_len = resp_len;
6758                 } else {
6759                         dev_warn(hba->dev,
6760                                  "%s: rsp size %d is bigger than buffer size %d",
6761                                  __func__, resp_len, *buff_len);
6762                         *buff_len = 0;
6763                         err = -EINVAL;
6764                 }
6765         }
6766         ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
6767                                     (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
6768
6769 out:
6770         blk_put_request(req);
6771 out_unlock:
6772         up_read(&hba->clk_scaling_lock);
6773         return err;
6774 }
6775
6776 /**
6777  * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6778  * @hba:        per-adapter instance
6779  * @req_upiu:   upiu request
6780  * @rsp_upiu:   upiu reply - only 8 DW as we do not support scsi commands
6781  * @msgcode:    message code, one of UPIU Transaction Codes Initiator to Target
6782  * @desc_buff:  pointer to descriptor buffer, NULL if NA
6783  * @buff_len:   descriptor size, 0 if NA
6784  * @desc_op:    descriptor operation
6785  *
6786  * Supports UTP Transfer requests (nop and query), and UTP Task
6787  * Management requests.
6788  * It is up to the caller to fill the upiu conent properly, as it will
6789  * be copied without any further input validations.
6790  */
6791 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6792                              struct utp_upiu_req *req_upiu,
6793                              struct utp_upiu_req *rsp_upiu,
6794                              int msgcode,
6795                              u8 *desc_buff, int *buff_len,
6796                              enum query_opcode desc_op)
6797 {
6798         int err;
6799         enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
6800         struct utp_task_req_desc treq = { { 0 }, };
6801         int ocs_value;
6802         u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6803
6804         switch (msgcode) {
6805         case UPIU_TRANSACTION_NOP_OUT:
6806                 cmd_type = DEV_CMD_TYPE_NOP;
6807                 fallthrough;
6808         case UPIU_TRANSACTION_QUERY_REQ:
6809                 ufshcd_hold(hba, false);
6810                 mutex_lock(&hba->dev_cmd.lock);
6811                 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6812                                                    desc_buff, buff_len,
6813                                                    cmd_type, desc_op);
6814                 mutex_unlock(&hba->dev_cmd.lock);
6815                 ufshcd_release(hba);
6816
6817                 break;
6818         case UPIU_TRANSACTION_TASK_REQ:
6819                 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6820                 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6821
6822                 memcpy(&treq.upiu_req, req_upiu, sizeof(*req_upiu));
6823
6824                 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6825                 if (err == -ETIMEDOUT)
6826                         break;
6827
6828                 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6829                 if (ocs_value != OCS_SUCCESS) {
6830                         dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6831                                 ocs_value);
6832                         break;
6833                 }
6834
6835                 memcpy(rsp_upiu, &treq.upiu_rsp, sizeof(*rsp_upiu));
6836
6837                 break;
6838         default:
6839                 err = -EINVAL;
6840
6841                 break;
6842         }
6843
6844         return err;
6845 }
6846
6847 /**
6848  * ufshcd_eh_device_reset_handler - device reset handler registered to
6849  *                                    scsi layer.
6850  * @cmd: SCSI command pointer
6851  *
6852  * Returns SUCCESS/FAILED
6853  */
6854 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
6855 {
6856         struct Scsi_Host *host;
6857         struct ufs_hba *hba;
6858         u32 pos;
6859         int err;
6860         u8 resp = 0xF, lun;
6861
6862         host = cmd->device->host;
6863         hba = shost_priv(host);
6864
6865         lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
6866         err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp);
6867         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6868                 if (!err)
6869                         err = resp;
6870                 goto out;
6871         }
6872
6873         /* clear the commands that were pending for corresponding LUN */
6874         for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6875                 if (hba->lrb[pos].lun == lun) {
6876                         err = ufshcd_clear_cmd(hba, pos);
6877                         if (err)
6878                                 break;
6879                         __ufshcd_transfer_req_compl(hba, pos, /*retry_requests=*/true);
6880                 }
6881         }
6882
6883 out:
6884         hba->req_abort_count = 0;
6885         ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, (u32)err);
6886         if (!err) {
6887                 err = SUCCESS;
6888         } else {
6889                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6890                 err = FAILED;
6891         }
6892         return err;
6893 }
6894
6895 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6896 {
6897         struct ufshcd_lrb *lrbp;
6898         int tag;
6899
6900         for_each_set_bit(tag, &bitmap, hba->nutrs) {
6901                 lrbp = &hba->lrb[tag];
6902                 lrbp->req_abort_skip = true;
6903         }
6904 }
6905
6906 /**
6907  * ufshcd_try_to_abort_task - abort a specific task
6908  * @hba: Pointer to adapter instance
6909  * @tag: Task tag/index to be aborted
6910  *
6911  * Abort the pending command in device by sending UFS_ABORT_TASK task management
6912  * command, and in host controller by clearing the door-bell register. There can
6913  * be race between controller sending the command to the device while abort is
6914  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6915  * really issued and then try to abort it.
6916  *
6917  * Returns zero on success, non-zero on failure
6918  */
6919 static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag)
6920 {
6921         struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6922         int err = 0;
6923         int poll_cnt;
6924         u8 resp = 0xF;
6925         u32 reg;
6926
6927         for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6928                 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6929                                 UFS_QUERY_TASK, &resp);
6930                 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6931                         /* cmd pending in the device */
6932                         dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6933                                 __func__, tag);
6934                         break;
6935                 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6936                         /*
6937                          * cmd not pending in the device, check if it is
6938                          * in transition.
6939                          */
6940                         dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6941                                 __func__, tag);
6942                         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6943                         if (reg & (1 << tag)) {
6944                                 /* sleep for max. 200us to stabilize */
6945                                 usleep_range(100, 200);
6946                                 continue;
6947                         }
6948                         /* command completed already */
6949                         dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6950                                 __func__, tag);
6951                         goto out;
6952                 } else {
6953                         dev_err(hba->dev,
6954                                 "%s: no response from device. tag = %d, err %d\n",
6955                                 __func__, tag, err);
6956                         if (!err)
6957                                 err = resp; /* service response error */
6958                         goto out;
6959                 }
6960         }
6961
6962         if (!poll_cnt) {
6963                 err = -EBUSY;
6964                 goto out;
6965         }
6966
6967         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6968                         UFS_ABORT_TASK, &resp);
6969         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6970                 if (!err) {
6971                         err = resp; /* service response error */
6972                         dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6973                                 __func__, tag, err);
6974                 }
6975                 goto out;
6976         }
6977
6978         err = ufshcd_clear_cmd(hba, tag);
6979         if (err)
6980                 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6981                         __func__, tag, err);
6982
6983 out:
6984         return err;
6985 }
6986
6987 /**
6988  * ufshcd_abort - scsi host template eh_abort_handler callback
6989  * @cmd: SCSI command pointer
6990  *
6991  * Returns SUCCESS/FAILED
6992  */
6993 static int ufshcd_abort(struct scsi_cmnd *cmd)
6994 {
6995         struct Scsi_Host *host = cmd->device->host;
6996         struct ufs_hba *hba = shost_priv(host);
6997         int tag = scsi_cmd_to_rq(cmd)->tag;
6998         struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6999         unsigned long flags;
7000         int err = FAILED;
7001         u32 reg;
7002
7003         WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
7004
7005         ufshcd_hold(hba, false);
7006         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
7007         /* If command is already aborted/completed, return FAILED. */
7008         if (!(test_bit(tag, &hba->outstanding_reqs))) {
7009                 dev_err(hba->dev,
7010                         "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
7011                         __func__, tag, hba->outstanding_reqs, reg);
7012                 goto release;
7013         }
7014
7015         /* Print Transfer Request of aborted task */
7016         dev_info(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
7017
7018         /*
7019          * Print detailed info about aborted request.
7020          * As more than one request might get aborted at the same time,
7021          * print full information only for the first aborted request in order
7022          * to reduce repeated printouts. For other aborted requests only print
7023          * basic details.
7024          */
7025         scsi_print_command(cmd);
7026         if (!hba->req_abort_count) {
7027                 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, tag);
7028                 ufshcd_print_evt_hist(hba);
7029                 ufshcd_print_host_state(hba);
7030                 ufshcd_print_pwr_info(hba);
7031                 ufshcd_print_trs(hba, 1 << tag, true);
7032         } else {
7033                 ufshcd_print_trs(hba, 1 << tag, false);
7034         }
7035         hba->req_abort_count++;
7036
7037         if (!(reg & (1 << tag))) {
7038                 dev_err(hba->dev,
7039                 "%s: cmd was completed, but without a notifying intr, tag = %d",
7040                 __func__, tag);
7041                 __ufshcd_transfer_req_compl(hba, 1UL << tag, /*retry_requests=*/false);
7042                 goto release;
7043         }
7044
7045         /*
7046          * Task abort to the device W-LUN is illegal. When this command
7047          * will fail, due to spec violation, scsi err handling next step
7048          * will be to send LU reset which, again, is a spec violation.
7049          * To avoid these unnecessary/illegal steps, first we clean up
7050          * the lrb taken by this cmd and re-set it in outstanding_reqs,
7051          * then queue the error handler and bail.
7052          */
7053         if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) {
7054                 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, lrbp->lun);
7055
7056                 spin_lock_irqsave(host->host_lock, flags);
7057                 hba->force_reset = true;
7058                 spin_unlock_irqrestore(host->host_lock, flags);
7059
7060                 ufshcd_schedule_eh(hba);
7061
7062                 goto release;
7063         }
7064
7065         /* Skip task abort in case previous aborts failed and report failure */
7066         if (lrbp->req_abort_skip) {
7067                 dev_err(hba->dev, "%s: skipping abort\n", __func__);
7068                 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
7069                 goto release;
7070         }
7071
7072         err = ufshcd_try_to_abort_task(hba, tag);
7073         if (err) {
7074                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
7075                 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
7076                 err = FAILED;
7077                 goto release;
7078         }
7079
7080         err = SUCCESS;
7081
7082 release:
7083         /* Matches the ufshcd_hold() call at the start of this function. */
7084         ufshcd_release(hba);
7085         return err;
7086 }
7087
7088 /**
7089  * ufshcd_host_reset_and_restore - reset and restore host controller
7090  * @hba: per-adapter instance
7091  *
7092  * Note that host controller reset may issue DME_RESET to
7093  * local and remote (device) Uni-Pro stack and the attributes
7094  * are reset to default state.
7095  *
7096  * Returns zero on success, non-zero on failure
7097  */
7098 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
7099 {
7100         int err;
7101
7102         /*
7103          * Stop the host controller and complete the requests
7104          * cleared by h/w
7105          */
7106         ufshpb_reset_host(hba);
7107         ufshcd_hba_stop(hba);
7108         hba->silence_err_logs = true;
7109         ufshcd_retry_aborted_requests(hba);
7110         hba->silence_err_logs = false;
7111
7112         /* scale up clocks to max frequency before full reinitialization */
7113         ufshcd_set_clk_freq(hba, true);
7114
7115         err = ufshcd_hba_enable(hba);
7116
7117         /* Establish the link again and restore the device */
7118         if (!err)
7119                 err = ufshcd_probe_hba(hba, false);
7120
7121         if (err)
7122                 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
7123         ufshcd_update_evt_hist(hba, UFS_EVT_HOST_RESET, (u32)err);
7124         return err;
7125 }
7126
7127 /**
7128  * ufshcd_reset_and_restore - reset and re-initialize host/device
7129  * @hba: per-adapter instance
7130  *
7131  * Reset and recover device, host and re-establish link. This
7132  * is helpful to recover the communication in fatal error conditions.
7133  *
7134  * Returns zero on success, non-zero on failure
7135  */
7136 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
7137 {
7138         u32 saved_err;
7139         u32 saved_uic_err;
7140         int err = 0;
7141         unsigned long flags;
7142         int retries = MAX_HOST_RESET_RETRIES;
7143
7144         /*
7145          * This is a fresh start, cache and clear saved error first,
7146          * in case new error generated during reset and restore.
7147          */
7148         spin_lock_irqsave(hba->host->host_lock, flags);
7149         saved_err = hba->saved_err;
7150         saved_uic_err = hba->saved_uic_err;
7151         hba->saved_err = 0;
7152         hba->saved_uic_err = 0;
7153         spin_unlock_irqrestore(hba->host->host_lock, flags);
7154
7155         do {
7156                 /* Reset the attached device */
7157                 ufshcd_device_reset(hba);
7158
7159                 err = ufshcd_host_reset_and_restore(hba);
7160         } while (err && --retries);
7161
7162         spin_lock_irqsave(hba->host->host_lock, flags);
7163         /*
7164          * Inform scsi mid-layer that we did reset and allow to handle
7165          * Unit Attention properly.
7166          */
7167         scsi_report_bus_reset(hba->host, 0);
7168         if (err) {
7169                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
7170                 hba->saved_err |= saved_err;
7171                 hba->saved_uic_err |= saved_uic_err;
7172         }
7173         spin_unlock_irqrestore(hba->host->host_lock, flags);
7174
7175         return err;
7176 }
7177
7178 /**
7179  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
7180  * @cmd: SCSI command pointer
7181  *
7182  * Returns SUCCESS/FAILED
7183  */
7184 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
7185 {
7186         int err = SUCCESS;
7187         unsigned long flags;
7188         struct ufs_hba *hba;
7189
7190         hba = shost_priv(cmd->device->host);
7191
7192         spin_lock_irqsave(hba->host->host_lock, flags);
7193         hba->force_reset = true;
7194         dev_err(hba->dev, "%s: reset in progress - 1\n", __func__);
7195         spin_unlock_irqrestore(hba->host->host_lock, flags);
7196
7197         ufshcd_err_handler(hba->host);
7198
7199         spin_lock_irqsave(hba->host->host_lock, flags);
7200         if (hba->ufshcd_state == UFSHCD_STATE_ERROR)
7201                 err = FAILED;
7202         spin_unlock_irqrestore(hba->host->host_lock, flags);
7203
7204         return err;
7205 }
7206
7207 /**
7208  * ufshcd_get_max_icc_level - calculate the ICC level
7209  * @sup_curr_uA: max. current supported by the regulator
7210  * @start_scan: row at the desc table to start scan from
7211  * @buff: power descriptor buffer
7212  *
7213  * Returns calculated max ICC level for specific regulator
7214  */
7215 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
7216 {
7217         int i;
7218         int curr_uA;
7219         u16 data;
7220         u16 unit;
7221
7222         for (i = start_scan; i >= 0; i--) {
7223                 data = be16_to_cpup((__be16 *)&buff[2 * i]);
7224                 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
7225                                                 ATTR_ICC_LVL_UNIT_OFFSET;
7226                 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
7227                 switch (unit) {
7228                 case UFSHCD_NANO_AMP:
7229                         curr_uA = curr_uA / 1000;
7230                         break;
7231                 case UFSHCD_MILI_AMP:
7232                         curr_uA = curr_uA * 1000;
7233                         break;
7234                 case UFSHCD_AMP:
7235                         curr_uA = curr_uA * 1000 * 1000;
7236                         break;
7237                 case UFSHCD_MICRO_AMP:
7238                 default:
7239                         break;
7240                 }
7241                 if (sup_curr_uA >= curr_uA)
7242                         break;
7243         }
7244         if (i < 0) {
7245                 i = 0;
7246                 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
7247         }
7248
7249         return (u32)i;
7250 }
7251
7252 /**
7253  * ufshcd_find_max_sup_active_icc_level - calculate the max ICC level
7254  * In case regulators are not initialized we'll return 0
7255  * @hba: per-adapter instance
7256  * @desc_buf: power descriptor buffer to extract ICC levels from.
7257  * @len: length of desc_buff
7258  *
7259  * Returns calculated ICC level
7260  */
7261 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
7262                                                         u8 *desc_buf, int len)
7263 {
7264         u32 icc_level = 0;
7265
7266         if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
7267                                                 !hba->vreg_info.vccq2) {
7268                 dev_err(hba->dev,
7269                         "%s: Regulator capability was not set, actvIccLevel=%d",
7270                                                         __func__, icc_level);
7271                 goto out;
7272         }
7273
7274         if (hba->vreg_info.vcc->max_uA)
7275                 icc_level = ufshcd_get_max_icc_level(
7276                                 hba->vreg_info.vcc->max_uA,
7277                                 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
7278                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
7279
7280         if (hba->vreg_info.vccq->max_uA)
7281                 icc_level = ufshcd_get_max_icc_level(
7282                                 hba->vreg_info.vccq->max_uA,
7283                                 icc_level,
7284                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
7285
7286         if (hba->vreg_info.vccq2->max_uA)
7287                 icc_level = ufshcd_get_max_icc_level(
7288                                 hba->vreg_info.vccq2->max_uA,
7289                                 icc_level,
7290                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
7291 out:
7292         return icc_level;
7293 }
7294
7295 static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
7296 {
7297         int ret;
7298         int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER];
7299         u8 *desc_buf;
7300         u32 icc_level;
7301
7302         desc_buf = kmalloc(buff_len, GFP_KERNEL);
7303         if (!desc_buf)
7304                 return;
7305
7306         ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0,
7307                                      desc_buf, buff_len);
7308         if (ret) {
7309                 dev_err(hba->dev,
7310                         "%s: Failed reading power descriptor.len = %d ret = %d",
7311                         __func__, buff_len, ret);
7312                 goto out;
7313         }
7314
7315         icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
7316                                                          buff_len);
7317         dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
7318
7319         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7320                 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
7321
7322         if (ret)
7323                 dev_err(hba->dev,
7324                         "%s: Failed configuring bActiveICCLevel = %d ret = %d",
7325                         __func__, icc_level, ret);
7326
7327 out:
7328         kfree(desc_buf);
7329 }
7330
7331 static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
7332 {
7333         scsi_autopm_get_device(sdev);
7334         blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
7335         if (sdev->rpm_autosuspend)
7336                 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
7337                                                  RPM_AUTOSUSPEND_DELAY_MS);
7338         scsi_autopm_put_device(sdev);
7339 }
7340
7341 /**
7342  * ufshcd_scsi_add_wlus - Adds required W-LUs
7343  * @hba: per-adapter instance
7344  *
7345  * UFS device specification requires the UFS devices to support 4 well known
7346  * logical units:
7347  *      "REPORT_LUNS" (address: 01h)
7348  *      "UFS Device" (address: 50h)
7349  *      "RPMB" (address: 44h)
7350  *      "BOOT" (address: 30h)
7351  * UFS device's power management needs to be controlled by "POWER CONDITION"
7352  * field of SSU (START STOP UNIT) command. But this "power condition" field
7353  * will take effect only when its sent to "UFS device" well known logical unit
7354  * hence we require the scsi_device instance to represent this logical unit in
7355  * order for the UFS host driver to send the SSU command for power management.
7356  *
7357  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
7358  * Block) LU so user space process can control this LU. User space may also
7359  * want to have access to BOOT LU.
7360  *
7361  * This function adds scsi device instances for each of all well known LUs
7362  * (except "REPORT LUNS" LU).
7363  *
7364  * Returns zero on success (all required W-LUs are added successfully),
7365  * non-zero error value on failure (if failed to add any of the required W-LU).
7366  */
7367 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
7368 {
7369         int ret = 0;
7370         struct scsi_device *sdev_boot;
7371
7372         hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
7373                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
7374         if (IS_ERR(hba->sdev_ufs_device)) {
7375                 ret = PTR_ERR(hba->sdev_ufs_device);
7376                 hba->sdev_ufs_device = NULL;
7377                 goto out;
7378         }
7379         scsi_device_put(hba->sdev_ufs_device);
7380
7381         hba->sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
7382                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
7383         if (IS_ERR(hba->sdev_rpmb)) {
7384                 ret = PTR_ERR(hba->sdev_rpmb);
7385                 goto remove_sdev_ufs_device;
7386         }
7387         ufshcd_blk_pm_runtime_init(hba->sdev_rpmb);
7388         scsi_device_put(hba->sdev_rpmb);
7389
7390         sdev_boot = __scsi_add_device(hba->host, 0, 0,
7391                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
7392         if (IS_ERR(sdev_boot)) {
7393                 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
7394         } else {
7395                 ufshcd_blk_pm_runtime_init(sdev_boot);
7396                 scsi_device_put(sdev_boot);
7397         }
7398         goto out;
7399
7400 remove_sdev_ufs_device:
7401         scsi_remove_device(hba->sdev_ufs_device);
7402 out:
7403         return ret;
7404 }
7405
7406 static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
7407 {
7408         struct ufs_dev_info *dev_info = &hba->dev_info;
7409         u8 lun;
7410         u32 d_lu_wb_buf_alloc;
7411         u32 ext_ufs_feature;
7412
7413         if (!ufshcd_is_wb_allowed(hba))
7414                 return;
7415         /*
7416          * Probe WB only for UFS-2.2 and UFS-3.1 (and later) devices or
7417          * UFS devices with quirk UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES
7418          * enabled
7419          */
7420         if (!(dev_info->wspecversion >= 0x310 ||
7421               dev_info->wspecversion == 0x220 ||
7422              (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES)))
7423                 goto wb_disabled;
7424
7425         if (hba->desc_size[QUERY_DESC_IDN_DEVICE] <
7426             DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
7427                 goto wb_disabled;
7428
7429         ext_ufs_feature = get_unaligned_be32(desc_buf +
7430                                         DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
7431
7432         if (!(ext_ufs_feature & UFS_DEV_WRITE_BOOSTER_SUP))
7433                 goto wb_disabled;
7434
7435         /*
7436          * WB may be supported but not configured while provisioning. The spec
7437          * says, in dedicated wb buffer mode, a max of 1 lun would have wb
7438          * buffer configured.
7439          */
7440         dev_info->wb_buffer_type = desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
7441
7442         dev_info->b_presrv_uspc_en =
7443                 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
7444
7445         if (dev_info->wb_buffer_type == WB_BUF_MODE_SHARED) {
7446                 if (!get_unaligned_be32(desc_buf +
7447                                    DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS))
7448                         goto wb_disabled;
7449         } else {
7450                 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
7451                         d_lu_wb_buf_alloc = 0;
7452                         ufshcd_read_unit_desc_param(hba,
7453                                         lun,
7454                                         UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
7455                                         (u8 *)&d_lu_wb_buf_alloc,
7456                                         sizeof(d_lu_wb_buf_alloc));
7457                         if (d_lu_wb_buf_alloc) {
7458                                 dev_info->wb_dedicated_lu = lun;
7459                                 break;
7460                         }
7461                 }
7462
7463                 if (!d_lu_wb_buf_alloc)
7464                         goto wb_disabled;
7465         }
7466         return;
7467
7468 wb_disabled:
7469         hba->caps &= ~UFSHCD_CAP_WB_EN;
7470 }
7471
7472 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
7473 {
7474         struct ufs_dev_fix *f;
7475         struct ufs_dev_info *dev_info = &hba->dev_info;
7476
7477         if (!fixups)
7478                 return;
7479
7480         for (f = fixups; f->quirk; f++) {
7481                 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
7482                      f->wmanufacturerid == UFS_ANY_VENDOR) &&
7483                      ((dev_info->model &&
7484                        STR_PRFX_EQUAL(f->model, dev_info->model)) ||
7485                       !strcmp(f->model, UFS_ANY_MODEL)))
7486                         hba->dev_quirks |= f->quirk;
7487         }
7488 }
7489 EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
7490
7491 static void ufs_fixup_device_setup(struct ufs_hba *hba)
7492 {
7493         /* fix by general quirk table */
7494         ufshcd_fixup_dev_quirks(hba, ufs_fixups);
7495
7496         /* allow vendors to fix quirks */
7497         ufshcd_vops_fixup_dev_quirks(hba);
7498 }
7499
7500 static int ufs_get_device_desc(struct ufs_hba *hba)
7501 {
7502         int err;
7503         u8 model_index;
7504         u8 b_ufs_feature_sup;
7505         u8 *desc_buf;
7506         struct ufs_dev_info *dev_info = &hba->dev_info;
7507
7508         desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
7509         if (!desc_buf) {
7510                 err = -ENOMEM;
7511                 goto out;
7512         }
7513
7514         err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf,
7515                                      hba->desc_size[QUERY_DESC_IDN_DEVICE]);
7516         if (err) {
7517                 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
7518                         __func__, err);
7519                 goto out;
7520         }
7521
7522         /*
7523          * getting vendor (manufacturerID) and Bank Index in big endian
7524          * format
7525          */
7526         dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
7527                                      desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
7528
7529         /* getting Specification Version in big endian format */
7530         dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
7531                                       desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
7532         b_ufs_feature_sup = desc_buf[DEVICE_DESC_PARAM_UFS_FEAT];
7533
7534         model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
7535
7536         if (dev_info->wspecversion >= UFS_DEV_HPB_SUPPORT_VERSION &&
7537             (b_ufs_feature_sup & UFS_DEV_HPB_SUPPORT)) {
7538                 bool hpb_en = false;
7539
7540                 ufshpb_get_dev_info(hba, desc_buf);
7541
7542                 if (!ufshpb_is_legacy(hba))
7543                         err = ufshcd_query_flag_retry(hba,
7544                                                       UPIU_QUERY_OPCODE_READ_FLAG,
7545                                                       QUERY_FLAG_IDN_HPB_EN, 0,
7546                                                       &hpb_en);
7547
7548                 if (ufshpb_is_legacy(hba) || (!err && hpb_en))
7549                         dev_info->hpb_enabled = true;
7550         }
7551
7552         err = ufshcd_read_string_desc(hba, model_index,
7553                                       &dev_info->model, SD_ASCII_STD);
7554         if (err < 0) {
7555                 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
7556                         __func__, err);
7557                 goto out;
7558         }
7559
7560         hba->luns_avail = desc_buf[DEVICE_DESC_PARAM_NUM_LU] +
7561                 desc_buf[DEVICE_DESC_PARAM_NUM_WLU];
7562
7563         ufs_fixup_device_setup(hba);
7564
7565         ufshcd_wb_probe(hba, desc_buf);
7566
7567         /*
7568          * ufshcd_read_string_desc returns size of the string
7569          * reset the error value
7570          */
7571         err = 0;
7572
7573 out:
7574         kfree(desc_buf);
7575         return err;
7576 }
7577
7578 static void ufs_put_device_desc(struct ufs_hba *hba)
7579 {
7580         struct ufs_dev_info *dev_info = &hba->dev_info;
7581
7582         kfree(dev_info->model);
7583         dev_info->model = NULL;
7584 }
7585
7586 /**
7587  * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
7588  * @hba: per-adapter instance
7589  *
7590  * PA_TActivate parameter can be tuned manually if UniPro version is less than
7591  * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
7592  * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
7593  * the hibern8 exit latency.
7594  *
7595  * Returns zero on success, non-zero error value on failure.
7596  */
7597 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
7598 {
7599         int ret = 0;
7600         u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
7601
7602         ret = ufshcd_dme_peer_get(hba,
7603                                   UIC_ARG_MIB_SEL(
7604                                         RX_MIN_ACTIVATETIME_CAPABILITY,
7605                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7606                                   &peer_rx_min_activatetime);
7607         if (ret)
7608                 goto out;
7609
7610         /* make sure proper unit conversion is applied */
7611         tuned_pa_tactivate =
7612                 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7613                  / PA_TACTIVATE_TIME_UNIT_US);
7614         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7615                              tuned_pa_tactivate);
7616
7617 out:
7618         return ret;
7619 }
7620
7621 /**
7622  * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7623  * @hba: per-adapter instance
7624  *
7625  * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7626  * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7627  * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7628  * This optimal value can help reduce the hibern8 exit latency.
7629  *
7630  * Returns zero on success, non-zero error value on failure.
7631  */
7632 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7633 {
7634         int ret = 0;
7635         u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7636         u32 max_hibern8_time, tuned_pa_hibern8time;
7637
7638         ret = ufshcd_dme_get(hba,
7639                              UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7640                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7641                                   &local_tx_hibern8_time_cap);
7642         if (ret)
7643                 goto out;
7644
7645         ret = ufshcd_dme_peer_get(hba,
7646                                   UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7647                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7648                                   &peer_rx_hibern8_time_cap);
7649         if (ret)
7650                 goto out;
7651
7652         max_hibern8_time = max(local_tx_hibern8_time_cap,
7653                                peer_rx_hibern8_time_cap);
7654         /* make sure proper unit conversion is applied */
7655         tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7656                                 / PA_HIBERN8_TIME_UNIT_US);
7657         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7658                              tuned_pa_hibern8time);
7659 out:
7660         return ret;
7661 }
7662
7663 /**
7664  * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7665  * less than device PA_TACTIVATE time.
7666  * @hba: per-adapter instance
7667  *
7668  * Some UFS devices require host PA_TACTIVATE to be lower than device
7669  * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7670  * for such devices.
7671  *
7672  * Returns zero on success, non-zero error value on failure.
7673  */
7674 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7675 {
7676         int ret = 0;
7677         u32 granularity, peer_granularity;
7678         u32 pa_tactivate, peer_pa_tactivate;
7679         u32 pa_tactivate_us, peer_pa_tactivate_us;
7680         u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7681
7682         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7683                                   &granularity);
7684         if (ret)
7685                 goto out;
7686
7687         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7688                                   &peer_granularity);
7689         if (ret)
7690                 goto out;
7691
7692         if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7693             (granularity > PA_GRANULARITY_MAX_VAL)) {
7694                 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7695                         __func__, granularity);
7696                 return -EINVAL;
7697         }
7698
7699         if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7700             (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7701                 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7702                         __func__, peer_granularity);
7703                 return -EINVAL;
7704         }
7705
7706         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7707         if (ret)
7708                 goto out;
7709
7710         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7711                                   &peer_pa_tactivate);
7712         if (ret)
7713                 goto out;
7714
7715         pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7716         peer_pa_tactivate_us = peer_pa_tactivate *
7717                              gran_to_us_table[peer_granularity - 1];
7718
7719         if (pa_tactivate_us > peer_pa_tactivate_us) {
7720                 u32 new_peer_pa_tactivate;
7721
7722                 new_peer_pa_tactivate = pa_tactivate_us /
7723                                       gran_to_us_table[peer_granularity - 1];
7724                 new_peer_pa_tactivate++;
7725                 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7726                                           new_peer_pa_tactivate);
7727         }
7728
7729 out:
7730         return ret;
7731 }
7732
7733 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
7734 {
7735         if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7736                 ufshcd_tune_pa_tactivate(hba);
7737                 ufshcd_tune_pa_hibern8time(hba);
7738         }
7739
7740         ufshcd_vops_apply_dev_quirks(hba);
7741
7742         if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7743                 /* set 1ms timeout for PA_TACTIVATE */
7744                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
7745
7746         if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7747                 ufshcd_quirk_tune_host_pa_tactivate(hba);
7748 }
7749
7750 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7751 {
7752         hba->ufs_stats.hibern8_exit_cnt = 0;
7753         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
7754         hba->req_abort_count = 0;
7755 }
7756
7757 static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7758 {
7759         int err;
7760         size_t buff_len;
7761         u8 *desc_buf;
7762
7763         buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY];
7764         desc_buf = kmalloc(buff_len, GFP_KERNEL);
7765         if (!desc_buf) {
7766                 err = -ENOMEM;
7767                 goto out;
7768         }
7769
7770         err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0,
7771                                      desc_buf, buff_len);
7772         if (err) {
7773                 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7774                                 __func__, err);
7775                 goto out;
7776         }
7777
7778         if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7779                 hba->dev_info.max_lu_supported = 32;
7780         else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7781                 hba->dev_info.max_lu_supported = 8;
7782
7783         if (hba->desc_size[QUERY_DESC_IDN_GEOMETRY] >=
7784                 GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS)
7785                 ufshpb_get_geo_info(hba, desc_buf);
7786
7787 out:
7788         kfree(desc_buf);
7789         return err;
7790 }
7791
7792 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7793         {19200000, REF_CLK_FREQ_19_2_MHZ},
7794         {26000000, REF_CLK_FREQ_26_MHZ},
7795         {38400000, REF_CLK_FREQ_38_4_MHZ},
7796         {52000000, REF_CLK_FREQ_52_MHZ},
7797         {0, REF_CLK_FREQ_INVAL},
7798 };
7799
7800 static enum ufs_ref_clk_freq
7801 ufs_get_bref_clk_from_hz(unsigned long freq)
7802 {
7803         int i;
7804
7805         for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7806                 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7807                         return ufs_ref_clk_freqs[i].val;
7808
7809         return REF_CLK_FREQ_INVAL;
7810 }
7811
7812 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7813 {
7814         unsigned long freq;
7815
7816         freq = clk_get_rate(refclk);
7817
7818         hba->dev_ref_clk_freq =
7819                 ufs_get_bref_clk_from_hz(freq);
7820
7821         if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7822                 dev_err(hba->dev,
7823                 "invalid ref_clk setting = %ld\n", freq);
7824 }
7825
7826 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7827 {
7828         int err;
7829         u32 ref_clk;
7830         u32 freq = hba->dev_ref_clk_freq;
7831
7832         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7833                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7834
7835         if (err) {
7836                 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7837                         err);
7838                 goto out;
7839         }
7840
7841         if (ref_clk == freq)
7842                 goto out; /* nothing to update */
7843
7844         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7845                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7846
7847         if (err) {
7848                 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7849                         ufs_ref_clk_freqs[freq].freq_hz);
7850                 goto out;
7851         }
7852
7853         dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7854                         ufs_ref_clk_freqs[freq].freq_hz);
7855
7856 out:
7857         return err;
7858 }
7859
7860 static int ufshcd_device_params_init(struct ufs_hba *hba)
7861 {
7862         bool flag;
7863         int ret, i;
7864
7865          /* Init device descriptor sizes */
7866         for (i = 0; i < QUERY_DESC_IDN_MAX; i++)
7867                 hba->desc_size[i] = QUERY_DESC_MAX_SIZE;
7868
7869         /* Init UFS geometry descriptor related parameters */
7870         ret = ufshcd_device_geo_params_init(hba);
7871         if (ret)
7872                 goto out;
7873
7874         /* Check and apply UFS device quirks */
7875         ret = ufs_get_device_desc(hba);
7876         if (ret) {
7877                 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7878                         __func__, ret);
7879                 goto out;
7880         }
7881
7882         ufshcd_get_ref_clk_gating_wait(hba);
7883
7884         if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7885                         QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
7886                 hba->dev_info.f_power_on_wp_en = flag;
7887
7888         /* Probe maximum power mode co-supported by both UFS host and device */
7889         if (ufshcd_get_max_pwr_mode(hba))
7890                 dev_err(hba->dev,
7891                         "%s: Failed getting max supported power mode\n",
7892                         __func__);
7893 out:
7894         return ret;
7895 }
7896
7897 /**
7898  * ufshcd_add_lus - probe and add UFS logical units
7899  * @hba: per-adapter instance
7900  */
7901 static int ufshcd_add_lus(struct ufs_hba *hba)
7902 {
7903         int ret;
7904
7905         /* Add required well known logical units to scsi mid layer */
7906         ret = ufshcd_scsi_add_wlus(hba);
7907         if (ret)
7908                 goto out;
7909
7910         ufshcd_clear_ua_wluns(hba);
7911
7912         /* Initialize devfreq after UFS device is detected */
7913         if (ufshcd_is_clkscaling_supported(hba)) {
7914                 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7915                         &hba->pwr_info,
7916                         sizeof(struct ufs_pa_layer_attr));
7917                 hba->clk_scaling.saved_pwr_info.is_valid = true;
7918                 hba->clk_scaling.is_allowed = true;
7919
7920                 ret = ufshcd_devfreq_init(hba);
7921                 if (ret)
7922                         goto out;
7923
7924                 hba->clk_scaling.is_enabled = true;
7925                 ufshcd_init_clk_scaling_sysfs(hba);
7926         }
7927
7928         ufs_bsg_probe(hba);
7929         ufshpb_init(hba);
7930         scsi_scan_host(hba->host);
7931         pm_runtime_put_sync(hba->dev);
7932
7933 out:
7934         return ret;
7935 }
7936
7937 static void ufshcd_request_sense_done(struct request *rq, blk_status_t error)
7938 {
7939         if (error != BLK_STS_OK)
7940                 pr_err("%s: REQUEST SENSE failed (%d)\n", __func__, error);
7941         kfree(rq->end_io_data);
7942         blk_put_request(rq);
7943 }
7944
7945 static int
7946 ufshcd_request_sense_async(struct ufs_hba *hba, struct scsi_device *sdev)
7947 {
7948         /*
7949          * Some UFS devices clear unit attention condition only if the sense
7950          * size used (UFS_SENSE_SIZE in this case) is non-zero.
7951          */
7952         static const u8 cmd[6] = {REQUEST_SENSE, 0, 0, 0, UFS_SENSE_SIZE, 0};
7953         struct scsi_request *rq;
7954         struct request *req;
7955         char *buffer;
7956         int ret;
7957
7958         buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7959         if (!buffer)
7960                 return -ENOMEM;
7961
7962         req = blk_get_request(sdev->request_queue, REQ_OP_DRV_IN,
7963                               /*flags=*/BLK_MQ_REQ_PM);
7964         if (IS_ERR(req)) {
7965                 ret = PTR_ERR(req);
7966                 goto out_free;
7967         }
7968
7969         ret = blk_rq_map_kern(sdev->request_queue, req,
7970                               buffer, UFS_SENSE_SIZE, GFP_NOIO);
7971         if (ret)
7972                 goto out_put;
7973
7974         rq = scsi_req(req);
7975         rq->cmd_len = ARRAY_SIZE(cmd);
7976         memcpy(rq->cmd, cmd, rq->cmd_len);
7977         rq->retries = 3;
7978         req->timeout = 1 * HZ;
7979         req->rq_flags |= RQF_PM | RQF_QUIET;
7980         req->end_io_data = buffer;
7981
7982         blk_execute_rq_nowait(/*bd_disk=*/NULL, req, /*at_head=*/true,
7983                               ufshcd_request_sense_done);
7984         return 0;
7985
7986 out_put:
7987         blk_put_request(req);
7988 out_free:
7989         kfree(buffer);
7990         return ret;
7991 }
7992
7993 static int ufshcd_clear_ua_wlun(struct ufs_hba *hba, u8 wlun)
7994 {
7995         struct scsi_device *sdp;
7996         unsigned long flags;
7997         int ret = 0;
7998
7999         spin_lock_irqsave(hba->host->host_lock, flags);
8000         if (wlun == UFS_UPIU_UFS_DEVICE_WLUN)
8001                 sdp = hba->sdev_ufs_device;
8002         else if (wlun == UFS_UPIU_RPMB_WLUN)
8003                 sdp = hba->sdev_rpmb;
8004         else
8005                 BUG();
8006         if (sdp) {
8007                 ret = scsi_device_get(sdp);
8008                 if (!ret && !scsi_device_online(sdp)) {
8009                         ret = -ENODEV;
8010                         scsi_device_put(sdp);
8011                 }
8012         } else {
8013                 ret = -ENODEV;
8014         }
8015         spin_unlock_irqrestore(hba->host->host_lock, flags);
8016         if (ret)
8017                 goto out_err;
8018
8019         ret = ufshcd_request_sense_async(hba, sdp);
8020         scsi_device_put(sdp);
8021 out_err:
8022         if (ret)
8023                 dev_err(hba->dev, "%s: UAC clear LU=%x ret = %d\n",
8024                                 __func__, wlun, ret);
8025         return ret;
8026 }
8027
8028 static int ufshcd_clear_ua_wluns(struct ufs_hba *hba)
8029 {
8030         int ret = 0;
8031
8032         if (!hba->wlun_dev_clr_ua)
8033                 goto out;
8034
8035         ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
8036         if (!ret)
8037                 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
8038         if (!ret)
8039                 hba->wlun_dev_clr_ua = false;
8040 out:
8041         if (ret)
8042                 dev_err(hba->dev, "%s: Failed to clear UAC WLUNS ret = %d\n",
8043                                 __func__, ret);
8044         return ret;
8045 }
8046
8047 /**
8048  * ufshcd_probe_hba - probe hba to detect device and initialize it
8049  * @hba: per-adapter instance
8050  * @init_dev_params: whether or not to call ufshcd_device_params_init().
8051  *
8052  * Execute link-startup and verify device initialization
8053  */
8054 static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params)
8055 {
8056         int ret;
8057         unsigned long flags;
8058         ktime_t start = ktime_get();
8059
8060         hba->ufshcd_state = UFSHCD_STATE_RESET;
8061
8062         ret = ufshcd_link_startup(hba);
8063         if (ret)
8064                 goto out;
8065
8066         /* Debug counters initialization */
8067         ufshcd_clear_dbg_ufs_stats(hba);
8068
8069         /* UniPro link is active now */
8070         ufshcd_set_link_active(hba);
8071
8072         /* Verify device initialization by sending NOP OUT UPIU */
8073         ret = ufshcd_verify_dev_init(hba);
8074         if (ret)
8075                 goto out;
8076
8077         /* Initiate UFS initialization, and waiting until completion */
8078         ret = ufshcd_complete_dev_init(hba);
8079         if (ret)
8080                 goto out;
8081
8082         /*
8083          * Initialize UFS device parameters used by driver, these
8084          * parameters are associated with UFS descriptors.
8085          */
8086         if (init_dev_params) {
8087                 ret = ufshcd_device_params_init(hba);
8088                 if (ret)
8089                         goto out;
8090         }
8091
8092         ufshcd_tune_unipro_params(hba);
8093
8094         /* UFS device is also active now */
8095         ufshcd_set_ufs_dev_active(hba);
8096         ufshcd_force_reset_auto_bkops(hba);
8097         hba->wlun_dev_clr_ua = true;
8098         hba->wlun_rpmb_clr_ua = true;
8099
8100         /* Gear up to HS gear if supported */
8101         if (hba->max_pwr_info.is_valid) {
8102                 /*
8103                  * Set the right value to bRefClkFreq before attempting to
8104                  * switch to HS gears.
8105                  */
8106                 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
8107                         ufshcd_set_dev_ref_clk(hba);
8108                 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
8109                 if (ret) {
8110                         dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
8111                                         __func__, ret);
8112                         goto out;
8113                 }
8114                 ufshcd_print_pwr_info(hba);
8115         }
8116
8117         /*
8118          * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
8119          * and for removable UFS card as well, hence always set the parameter.
8120          * Note: Error handler may issue the device reset hence resetting
8121          * bActiveICCLevel as well so it is always safe to set this here.
8122          */
8123         ufshcd_set_active_icc_lvl(hba);
8124
8125         ufshcd_wb_config(hba);
8126         if (hba->ee_usr_mask)
8127                 ufshcd_write_ee_control(hba);
8128         /* Enable Auto-Hibernate if configured */
8129         ufshcd_auto_hibern8_enable(hba);
8130
8131         ufshpb_reset(hba);
8132 out:
8133         spin_lock_irqsave(hba->host->host_lock, flags);
8134         if (ret)
8135                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
8136         else if (hba->ufshcd_state == UFSHCD_STATE_RESET)
8137                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
8138         spin_unlock_irqrestore(hba->host->host_lock, flags);
8139
8140         trace_ufshcd_init(dev_name(hba->dev), ret,
8141                 ktime_to_us(ktime_sub(ktime_get(), start)),
8142                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8143         return ret;
8144 }
8145
8146 /**
8147  * ufshcd_async_scan - asynchronous execution for probing hba
8148  * @data: data pointer to pass to this function
8149  * @cookie: cookie data
8150  */
8151 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
8152 {
8153         struct ufs_hba *hba = (struct ufs_hba *)data;
8154         int ret;
8155
8156         down(&hba->host_sem);
8157         /* Initialize hba, detect and initialize UFS device */
8158         ret = ufshcd_probe_hba(hba, true);
8159         up(&hba->host_sem);
8160         if (ret)
8161                 goto out;
8162
8163         /* Probe and add UFS logical units  */
8164         ret = ufshcd_add_lus(hba);
8165 out:
8166         /*
8167          * If we failed to initialize the device or the device is not
8168          * present, turn off the power/clocks etc.
8169          */
8170         if (ret) {
8171                 pm_runtime_put_sync(hba->dev);
8172                 ufshcd_hba_exit(hba);
8173         }
8174 }
8175
8176 static const struct attribute_group *ufshcd_driver_groups[] = {
8177         &ufs_sysfs_unit_descriptor_group,
8178         &ufs_sysfs_lun_attributes_group,
8179 #ifdef CONFIG_SCSI_UFS_HPB
8180         &ufs_sysfs_hpb_stat_group,
8181         &ufs_sysfs_hpb_param_group,
8182 #endif
8183         NULL,
8184 };
8185
8186 static struct ufs_hba_variant_params ufs_hba_vps = {
8187         .hba_enable_delay_us            = 1000,
8188         .wb_flush_threshold             = UFS_WB_BUF_REMAIN_PERCENT(40),
8189         .devfreq_profile.polling_ms     = 100,
8190         .devfreq_profile.target         = ufshcd_devfreq_target,
8191         .devfreq_profile.get_dev_status = ufshcd_devfreq_get_dev_status,
8192         .ondemand_data.upthreshold      = 70,
8193         .ondemand_data.downdifferential = 5,
8194 };
8195
8196 static struct scsi_host_template ufshcd_driver_template = {
8197         .module                 = THIS_MODULE,
8198         .name                   = UFSHCD,
8199         .proc_name              = UFSHCD,
8200         .queuecommand           = ufshcd_queuecommand,
8201         .slave_alloc            = ufshcd_slave_alloc,
8202         .slave_configure        = ufshcd_slave_configure,
8203         .slave_destroy          = ufshcd_slave_destroy,
8204         .change_queue_depth     = ufshcd_change_queue_depth,
8205         .eh_abort_handler       = ufshcd_abort,
8206         .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
8207         .eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
8208         .this_id                = -1,
8209         .sg_tablesize           = SG_ALL,
8210         .cmd_per_lun            = UFSHCD_CMD_PER_LUN,
8211         .can_queue              = UFSHCD_CAN_QUEUE,
8212         .max_segment_size       = PRDT_DATA_BYTE_COUNT_MAX,
8213         .max_host_blocked       = 1,
8214         .track_queue_depth      = 1,
8215         .sdev_groups            = ufshcd_driver_groups,
8216         .dma_boundary           = PAGE_SIZE - 1,
8217         .rpm_autosuspend_delay  = RPM_AUTOSUSPEND_DELAY_MS,
8218 };
8219
8220 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
8221                                    int ua)
8222 {
8223         int ret;
8224
8225         if (!vreg)
8226                 return 0;
8227
8228         /*
8229          * "set_load" operation shall be required on those regulators
8230          * which specifically configured current limitation. Otherwise
8231          * zero max_uA may cause unexpected behavior when regulator is
8232          * enabled or set as high power mode.
8233          */
8234         if (!vreg->max_uA)
8235                 return 0;
8236
8237         ret = regulator_set_load(vreg->reg, ua);
8238         if (ret < 0) {
8239                 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
8240                                 __func__, vreg->name, ua, ret);
8241         }
8242
8243         return ret;
8244 }
8245
8246 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
8247                                          struct ufs_vreg *vreg)
8248 {
8249         return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
8250 }
8251
8252 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
8253                                          struct ufs_vreg *vreg)
8254 {
8255         if (!vreg)
8256                 return 0;
8257
8258         return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
8259 }
8260
8261 static int ufshcd_config_vreg(struct device *dev,
8262                 struct ufs_vreg *vreg, bool on)
8263 {
8264         int ret = 0;
8265         struct regulator *reg;
8266         const char *name;
8267         int min_uV, uA_load;
8268
8269         BUG_ON(!vreg);
8270
8271         reg = vreg->reg;
8272         name = vreg->name;
8273
8274         if (regulator_count_voltages(reg) > 0) {
8275                 uA_load = on ? vreg->max_uA : 0;
8276                 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
8277                 if (ret)
8278                         goto out;
8279
8280                 if (vreg->min_uV && vreg->max_uV) {
8281                         min_uV = on ? vreg->min_uV : 0;
8282                         ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
8283                         if (ret)
8284                                 dev_err(dev,
8285                                         "%s: %s set voltage failed, err=%d\n",
8286                                         __func__, name, ret);
8287                 }
8288         }
8289 out:
8290         return ret;
8291 }
8292
8293 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
8294 {
8295         int ret = 0;
8296
8297         if (!vreg || vreg->enabled)
8298                 goto out;
8299
8300         ret = ufshcd_config_vreg(dev, vreg, true);
8301         if (!ret)
8302                 ret = regulator_enable(vreg->reg);
8303
8304         if (!ret)
8305                 vreg->enabled = true;
8306         else
8307                 dev_err(dev, "%s: %s enable failed, err=%d\n",
8308                                 __func__, vreg->name, ret);
8309 out:
8310         return ret;
8311 }
8312
8313 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
8314 {
8315         int ret = 0;
8316
8317         if (!vreg || !vreg->enabled || vreg->always_on)
8318                 goto out;
8319
8320         ret = regulator_disable(vreg->reg);
8321
8322         if (!ret) {
8323                 /* ignore errors on applying disable config */
8324                 ufshcd_config_vreg(dev, vreg, false);
8325                 vreg->enabled = false;
8326         } else {
8327                 dev_err(dev, "%s: %s disable failed, err=%d\n",
8328                                 __func__, vreg->name, ret);
8329         }
8330 out:
8331         return ret;
8332 }
8333
8334 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
8335 {
8336         int ret = 0;
8337         struct device *dev = hba->dev;
8338         struct ufs_vreg_info *info = &hba->vreg_info;
8339
8340         ret = ufshcd_toggle_vreg(dev, info->vcc, on);
8341         if (ret)
8342                 goto out;
8343
8344         ret = ufshcd_toggle_vreg(dev, info->vccq, on);
8345         if (ret)
8346                 goto out;
8347
8348         ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
8349
8350 out:
8351         if (ret) {
8352                 ufshcd_toggle_vreg(dev, info->vccq2, false);
8353                 ufshcd_toggle_vreg(dev, info->vccq, false);
8354                 ufshcd_toggle_vreg(dev, info->vcc, false);
8355         }
8356         return ret;
8357 }
8358
8359 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
8360 {
8361         struct ufs_vreg_info *info = &hba->vreg_info;
8362
8363         return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
8364 }
8365
8366 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
8367 {
8368         int ret = 0;
8369
8370         if (!vreg)
8371                 goto out;
8372
8373         vreg->reg = devm_regulator_get(dev, vreg->name);
8374         if (IS_ERR(vreg->reg)) {
8375                 ret = PTR_ERR(vreg->reg);
8376                 dev_err(dev, "%s: %s get failed, err=%d\n",
8377                                 __func__, vreg->name, ret);
8378         }
8379 out:
8380         return ret;
8381 }
8382
8383 static int ufshcd_init_vreg(struct ufs_hba *hba)
8384 {
8385         int ret = 0;
8386         struct device *dev = hba->dev;
8387         struct ufs_vreg_info *info = &hba->vreg_info;
8388
8389         ret = ufshcd_get_vreg(dev, info->vcc);
8390         if (ret)
8391                 goto out;
8392
8393         ret = ufshcd_get_vreg(dev, info->vccq);
8394         if (!ret)
8395                 ret = ufshcd_get_vreg(dev, info->vccq2);
8396 out:
8397         return ret;
8398 }
8399
8400 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
8401 {
8402         struct ufs_vreg_info *info = &hba->vreg_info;
8403
8404         if (info)
8405                 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
8406
8407         return 0;
8408 }
8409
8410 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
8411 {
8412         int ret = 0;
8413         struct ufs_clk_info *clki;
8414         struct list_head *head = &hba->clk_list_head;
8415         unsigned long flags;
8416         ktime_t start = ktime_get();
8417         bool clk_state_changed = false;
8418
8419         if (list_empty(head))
8420                 goto out;
8421
8422         ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
8423         if (ret)
8424                 return ret;
8425
8426         list_for_each_entry(clki, head, list) {
8427                 if (!IS_ERR_OR_NULL(clki->clk)) {
8428                         /*
8429                          * Don't disable clocks which are needed
8430                          * to keep the link active.
8431                          */
8432                         if (ufshcd_is_link_active(hba) &&
8433                             clki->keep_link_active)
8434                                 continue;
8435
8436                         clk_state_changed = on ^ clki->enabled;
8437                         if (on && !clki->enabled) {
8438                                 ret = clk_prepare_enable(clki->clk);
8439                                 if (ret) {
8440                                         dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
8441                                                 __func__, clki->name, ret);
8442                                         goto out;
8443                                 }
8444                         } else if (!on && clki->enabled) {
8445                                 clk_disable_unprepare(clki->clk);
8446                         }
8447                         clki->enabled = on;
8448                         dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
8449                                         clki->name, on ? "en" : "dis");
8450                 }
8451         }
8452
8453         ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
8454         if (ret)
8455                 return ret;
8456
8457 out:
8458         if (ret) {
8459                 list_for_each_entry(clki, head, list) {
8460                         if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
8461                                 clk_disable_unprepare(clki->clk);
8462                 }
8463         } else if (!ret && on) {
8464                 spin_lock_irqsave(hba->host->host_lock, flags);
8465                 hba->clk_gating.state = CLKS_ON;
8466                 trace_ufshcd_clk_gating(dev_name(hba->dev),
8467                                         hba->clk_gating.state);
8468                 spin_unlock_irqrestore(hba->host->host_lock, flags);
8469         }
8470
8471         if (clk_state_changed)
8472                 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
8473                         (on ? "on" : "off"),
8474                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
8475         return ret;
8476 }
8477
8478 static int ufshcd_init_clocks(struct ufs_hba *hba)
8479 {
8480         int ret = 0;
8481         struct ufs_clk_info *clki;
8482         struct device *dev = hba->dev;
8483         struct list_head *head = &hba->clk_list_head;
8484
8485         if (list_empty(head))
8486                 goto out;
8487
8488         list_for_each_entry(clki, head, list) {
8489                 if (!clki->name)
8490                         continue;
8491
8492                 clki->clk = devm_clk_get(dev, clki->name);
8493                 if (IS_ERR(clki->clk)) {
8494                         ret = PTR_ERR(clki->clk);
8495                         dev_err(dev, "%s: %s clk get failed, %d\n",
8496                                         __func__, clki->name, ret);
8497                         goto out;
8498                 }
8499
8500                 /*
8501                  * Parse device ref clk freq as per device tree "ref_clk".
8502                  * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
8503                  * in ufshcd_alloc_host().
8504                  */
8505                 if (!strcmp(clki->name, "ref_clk"))
8506                         ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
8507
8508                 if (clki->max_freq) {
8509                         ret = clk_set_rate(clki->clk, clki->max_freq);
8510                         if (ret) {
8511                                 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
8512                                         __func__, clki->name,
8513                                         clki->max_freq, ret);
8514                                 goto out;
8515                         }
8516                         clki->curr_freq = clki->max_freq;
8517                 }
8518                 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
8519                                 clki->name, clk_get_rate(clki->clk));
8520         }
8521 out:
8522         return ret;
8523 }
8524
8525 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
8526 {
8527         int err = 0;
8528
8529         if (!hba->vops)
8530                 goto out;
8531
8532         err = ufshcd_vops_init(hba);
8533         if (err)
8534                 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
8535                         __func__, ufshcd_get_var_name(hba), err);
8536 out:
8537         return err;
8538 }
8539
8540 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
8541 {
8542         if (!hba->vops)
8543                 return;
8544
8545         ufshcd_vops_exit(hba);
8546 }
8547
8548 static int ufshcd_hba_init(struct ufs_hba *hba)
8549 {
8550         int err;
8551
8552         /*
8553          * Handle host controller power separately from the UFS device power
8554          * rails as it will help controlling the UFS host controller power
8555          * collapse easily which is different than UFS device power collapse.
8556          * Also, enable the host controller power before we go ahead with rest
8557          * of the initialization here.
8558          */
8559         err = ufshcd_init_hba_vreg(hba);
8560         if (err)
8561                 goto out;
8562
8563         err = ufshcd_setup_hba_vreg(hba, true);
8564         if (err)
8565                 goto out;
8566
8567         err = ufshcd_init_clocks(hba);
8568         if (err)
8569                 goto out_disable_hba_vreg;
8570
8571         err = ufshcd_setup_clocks(hba, true);
8572         if (err)
8573                 goto out_disable_hba_vreg;
8574
8575         err = ufshcd_init_vreg(hba);
8576         if (err)
8577                 goto out_disable_clks;
8578
8579         err = ufshcd_setup_vreg(hba, true);
8580         if (err)
8581                 goto out_disable_clks;
8582
8583         err = ufshcd_variant_hba_init(hba);
8584         if (err)
8585                 goto out_disable_vreg;
8586
8587         ufs_debugfs_hba_init(hba);
8588
8589         hba->is_powered = true;
8590         goto out;
8591
8592 out_disable_vreg:
8593         ufshcd_setup_vreg(hba, false);
8594 out_disable_clks:
8595         ufshcd_setup_clocks(hba, false);
8596 out_disable_hba_vreg:
8597         ufshcd_setup_hba_vreg(hba, false);
8598 out:
8599         return err;
8600 }
8601
8602 static void ufshcd_hba_exit(struct ufs_hba *hba)
8603 {
8604         if (hba->is_powered) {
8605                 ufshcd_exit_clk_scaling(hba);
8606                 ufshcd_exit_clk_gating(hba);
8607                 ufs_debugfs_hba_exit(hba);
8608                 ufshcd_variant_hba_exit(hba);
8609                 ufshcd_setup_vreg(hba, false);
8610                 ufshcd_setup_clocks(hba, false);
8611                 ufshcd_setup_hba_vreg(hba, false);
8612                 hba->is_powered = false;
8613                 ufs_put_device_desc(hba);
8614         }
8615 }
8616
8617 /**
8618  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
8619  *                           power mode
8620  * @hba: per adapter instance
8621  * @pwr_mode: device power mode to set
8622  *
8623  * Returns 0 if requested power mode is set successfully
8624  * Returns non-zero if failed to set the requested power mode
8625  */
8626 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
8627                                      enum ufs_dev_pwr_mode pwr_mode)
8628 {
8629         unsigned char cmd[6] = { START_STOP };
8630         struct scsi_sense_hdr sshdr;
8631         struct scsi_device *sdp;
8632         unsigned long flags;
8633         int ret;
8634
8635         spin_lock_irqsave(hba->host->host_lock, flags);
8636         sdp = hba->sdev_ufs_device;
8637         if (sdp) {
8638                 ret = scsi_device_get(sdp);
8639                 if (!ret && !scsi_device_online(sdp)) {
8640                         ret = -ENODEV;
8641                         scsi_device_put(sdp);
8642                 }
8643         } else {
8644                 ret = -ENODEV;
8645         }
8646         spin_unlock_irqrestore(hba->host->host_lock, flags);
8647
8648         if (ret)
8649                 return ret;
8650
8651         /*
8652          * If scsi commands fail, the scsi mid-layer schedules scsi error-
8653          * handling, which would wait for host to be resumed. Since we know
8654          * we are functional while we are here, skip host resume in error
8655          * handling context.
8656          */
8657         hba->host->eh_noresume = 1;
8658         if (hba->wlun_dev_clr_ua)
8659                 ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
8660
8661         cmd[4] = pwr_mode << 4;
8662
8663         /*
8664          * Current function would be generally called from the power management
8665          * callbacks hence set the RQF_PM flag so that it doesn't resume the
8666          * already suspended childs.
8667          */
8668         ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8669                         START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
8670         if (ret) {
8671                 sdev_printk(KERN_WARNING, sdp,
8672                             "START_STOP failed for power mode: %d, result %x\n",
8673                             pwr_mode, ret);
8674                 if (ret > 0 && scsi_sense_valid(&sshdr))
8675                         scsi_print_sense_hdr(sdp, NULL, &sshdr);
8676         }
8677
8678         if (!ret)
8679                 hba->curr_dev_pwr_mode = pwr_mode;
8680
8681         scsi_device_put(sdp);
8682         hba->host->eh_noresume = 0;
8683         return ret;
8684 }
8685
8686 static int ufshcd_link_state_transition(struct ufs_hba *hba,
8687                                         enum uic_link_state req_link_state,
8688                                         int check_for_bkops)
8689 {
8690         int ret = 0;
8691
8692         if (req_link_state == hba->uic_link_state)
8693                 return 0;
8694
8695         if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8696                 ret = ufshcd_uic_hibern8_enter(hba);
8697                 if (!ret) {
8698                         ufshcd_set_link_hibern8(hba);
8699                 } else {
8700                         dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8701                                         __func__, ret);
8702                         goto out;
8703                 }
8704         }
8705         /*
8706          * If autobkops is enabled, link can't be turned off because
8707          * turning off the link would also turn off the device, except in the
8708          * case of DeepSleep where the device is expected to remain powered.
8709          */
8710         else if ((req_link_state == UIC_LINK_OFF_STATE) &&
8711                  (!check_for_bkops || !hba->auto_bkops_enabled)) {
8712                 /*
8713                  * Let's make sure that link is in low power mode, we are doing
8714                  * this currently by putting the link in Hibern8. Otherway to
8715                  * put the link in low power mode is to send the DME end point
8716                  * to device and then send the DME reset command to local
8717                  * unipro. But putting the link in hibern8 is much faster.
8718                  *
8719                  * Note also that putting the link in Hibern8 is a requirement
8720                  * for entering DeepSleep.
8721                  */
8722                 ret = ufshcd_uic_hibern8_enter(hba);
8723                 if (ret) {
8724                         dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8725                                         __func__, ret);
8726                         goto out;
8727                 }
8728                 /*
8729                  * Change controller state to "reset state" which
8730                  * should also put the link in off/reset state
8731                  */
8732                 ufshcd_hba_stop(hba);
8733                 /*
8734                  * TODO: Check if we need any delay to make sure that
8735                  * controller is reset
8736                  */
8737                 ufshcd_set_link_off(hba);
8738         }
8739
8740 out:
8741         return ret;
8742 }
8743
8744 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8745 {
8746         bool vcc_off = false;
8747
8748         /*
8749          * It seems some UFS devices may keep drawing more than sleep current
8750          * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8751          * To avoid this situation, add 2ms delay before putting these UFS
8752          * rails in LPM mode.
8753          */
8754         if (!ufshcd_is_link_active(hba) &&
8755             hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8756                 usleep_range(2000, 2100);
8757
8758         /*
8759          * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8760          * power.
8761          *
8762          * If UFS device and link is in OFF state, all power supplies (VCC,
8763          * VCCQ, VCCQ2) can be turned off if power on write protect is not
8764          * required. If UFS link is inactive (Hibern8 or OFF state) and device
8765          * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8766          *
8767          * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8768          * in low power state which would save some power.
8769          *
8770          * If Write Booster is enabled and the device needs to flush the WB
8771          * buffer OR if bkops status is urgent for WB, keep Vcc on.
8772          */
8773         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8774             !hba->dev_info.is_lu_power_on_wp) {
8775                 ufshcd_setup_vreg(hba, false);
8776                 vcc_off = true;
8777         } else if (!ufshcd_is_ufs_dev_active(hba)) {
8778                 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8779                 vcc_off = true;
8780                 if (ufshcd_is_link_hibern8(hba) || ufshcd_is_link_off(hba)) {
8781                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8782                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8783                 }
8784         }
8785
8786         /*
8787          * Some UFS devices require delay after VCC power rail is turned-off.
8788          */
8789         if (vcc_off && hba->vreg_info.vcc &&
8790                 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)
8791                 usleep_range(5000, 5100);
8792 }
8793
8794 #ifdef CONFIG_PM
8795 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8796 {
8797         int ret = 0;
8798
8799         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8800             !hba->dev_info.is_lu_power_on_wp) {
8801                 ret = ufshcd_setup_vreg(hba, true);
8802         } else if (!ufshcd_is_ufs_dev_active(hba)) {
8803                 if (!ufshcd_is_link_active(hba)) {
8804                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8805                         if (ret)
8806                                 goto vcc_disable;
8807                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8808                         if (ret)
8809                                 goto vccq_lpm;
8810                 }
8811                 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
8812         }
8813         goto out;
8814
8815 vccq_lpm:
8816         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8817 vcc_disable:
8818         ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8819 out:
8820         return ret;
8821 }
8822 #endif /* CONFIG_PM */
8823
8824 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8825 {
8826         if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
8827                 ufshcd_setup_hba_vreg(hba, false);
8828 }
8829
8830 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8831 {
8832         if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
8833                 ufshcd_setup_hba_vreg(hba, true);
8834 }
8835
8836 static int __ufshcd_wl_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8837 {
8838         int ret = 0;
8839         int check_for_bkops;
8840         enum ufs_pm_level pm_lvl;
8841         enum ufs_dev_pwr_mode req_dev_pwr_mode;
8842         enum uic_link_state req_link_state;
8843
8844         hba->pm_op_in_progress = true;
8845         if (pm_op != UFS_SHUTDOWN_PM) {
8846                 pm_lvl = pm_op == UFS_RUNTIME_PM ?
8847                          hba->rpm_lvl : hba->spm_lvl;
8848                 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8849                 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8850         } else {
8851                 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8852                 req_link_state = UIC_LINK_OFF_STATE;
8853         }
8854
8855         ufshpb_suspend(hba);
8856
8857         /*
8858          * If we can't transition into any of the low power modes
8859          * just gate the clocks.
8860          */
8861         ufshcd_hold(hba, false);
8862         hba->clk_gating.is_suspended = true;
8863
8864         if (ufshcd_is_clkscaling_supported(hba))
8865                 ufshcd_clk_scaling_suspend(hba, true);
8866
8867         if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8868                         req_link_state == UIC_LINK_ACTIVE_STATE) {
8869                 goto vops_suspend;
8870         }
8871
8872         if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8873             (req_link_state == hba->uic_link_state))
8874                 goto enable_scaling;
8875
8876         /* UFS device & link must be active before we enter in this function */
8877         if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8878                 ret = -EINVAL;
8879                 goto enable_scaling;
8880         }
8881
8882         if (pm_op == UFS_RUNTIME_PM) {
8883                 if (ufshcd_can_autobkops_during_suspend(hba)) {
8884                         /*
8885                          * The device is idle with no requests in the queue,
8886                          * allow background operations if bkops status shows
8887                          * that performance might be impacted.
8888                          */
8889                         ret = ufshcd_urgent_bkops(hba);
8890                         if (ret)
8891                                 goto enable_scaling;
8892                 } else {
8893                         /* make sure that auto bkops is disabled */
8894                         ufshcd_disable_auto_bkops(hba);
8895                 }
8896                 /*
8897                  * If device needs to do BKOP or WB buffer flush during
8898                  * Hibern8, keep device power mode as "active power mode"
8899                  * and VCC supply.
8900                  */
8901                 hba->dev_info.b_rpm_dev_flush_capable =
8902                         hba->auto_bkops_enabled ||
8903                         (((req_link_state == UIC_LINK_HIBERN8_STATE) ||
8904                         ((req_link_state == UIC_LINK_ACTIVE_STATE) &&
8905                         ufshcd_is_auto_hibern8_enabled(hba))) &&
8906                         ufshcd_wb_need_flush(hba));
8907         }
8908
8909         flush_work(&hba->eeh_work);
8910
8911         if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
8912                 if (pm_op != UFS_RUNTIME_PM)
8913                         /* ensure that bkops is disabled */
8914                         ufshcd_disable_auto_bkops(hba);
8915
8916                 if (!hba->dev_info.b_rpm_dev_flush_capable) {
8917                         ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8918                         if (ret)
8919                                 goto enable_scaling;
8920                 }
8921         }
8922
8923         /*
8924          * In the case of DeepSleep, the device is expected to remain powered
8925          * with the link off, so do not check for bkops.
8926          */
8927         check_for_bkops = !ufshcd_is_ufs_dev_deepsleep(hba);
8928         ret = ufshcd_link_state_transition(hba, req_link_state, check_for_bkops);
8929         if (ret)
8930                 goto set_dev_active;
8931
8932 vops_suspend:
8933         /*
8934          * Call vendor specific suspend callback. As these callbacks may access
8935          * vendor specific host controller register space call them before the
8936          * host clocks are ON.
8937          */
8938         ret = ufshcd_vops_suspend(hba, pm_op);
8939         if (ret)
8940                 goto set_link_active;
8941         goto out;
8942
8943 set_link_active:
8944         /*
8945          * Device hardware reset is required to exit DeepSleep. Also, for
8946          * DeepSleep, the link is off so host reset and restore will be done
8947          * further below.
8948          */
8949         if (ufshcd_is_ufs_dev_deepsleep(hba)) {
8950                 ufshcd_device_reset(hba);
8951                 WARN_ON(!ufshcd_is_link_off(hba));
8952         }
8953         if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
8954                 ufshcd_set_link_active(hba);
8955         else if (ufshcd_is_link_off(hba))
8956                 ufshcd_host_reset_and_restore(hba);
8957 set_dev_active:
8958         /* Can also get here needing to exit DeepSleep */
8959         if (ufshcd_is_ufs_dev_deepsleep(hba)) {
8960                 ufshcd_device_reset(hba);
8961                 ufshcd_host_reset_and_restore(hba);
8962         }
8963         if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8964                 ufshcd_disable_auto_bkops(hba);
8965 enable_scaling:
8966         if (ufshcd_is_clkscaling_supported(hba))
8967                 ufshcd_clk_scaling_suspend(hba, false);
8968
8969         hba->dev_info.b_rpm_dev_flush_capable = false;
8970 out:
8971         if (hba->dev_info.b_rpm_dev_flush_capable) {
8972                 schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
8973                         msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
8974         }
8975
8976         if (ret) {
8977                 ufshcd_update_evt_hist(hba, UFS_EVT_WL_SUSP_ERR, (u32)ret);
8978                 hba->clk_gating.is_suspended = false;
8979                 ufshcd_release(hba);
8980                 ufshpb_resume(hba);
8981         }
8982         hba->pm_op_in_progress = false;
8983         return ret;
8984 }
8985
8986 #ifdef CONFIG_PM
8987 static int __ufshcd_wl_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8988 {
8989         int ret;
8990         enum uic_link_state old_link_state = hba->uic_link_state;
8991
8992         hba->pm_op_in_progress = true;
8993
8994         /*
8995          * Call vendor specific resume callback. As these callbacks may access
8996          * vendor specific host controller register space call them when the
8997          * host clocks are ON.
8998          */
8999         ret = ufshcd_vops_resume(hba, pm_op);
9000         if (ret)
9001                 goto out;
9002
9003         /* For DeepSleep, the only supported option is to have the link off */
9004         WARN_ON(ufshcd_is_ufs_dev_deepsleep(hba) && !ufshcd_is_link_off(hba));
9005
9006         if (ufshcd_is_link_hibern8(hba)) {
9007                 ret = ufshcd_uic_hibern8_exit(hba);
9008                 if (!ret) {
9009                         ufshcd_set_link_active(hba);
9010                 } else {
9011                         dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
9012                                         __func__, ret);
9013                         goto vendor_suspend;
9014                 }
9015         } else if (ufshcd_is_link_off(hba)) {
9016                 /*
9017                  * A full initialization of the host and the device is
9018                  * required since the link was put to off during suspend.
9019                  * Note, in the case of DeepSleep, the device will exit
9020                  * DeepSleep due to device reset.
9021                  */
9022                 ret = ufshcd_reset_and_restore(hba);
9023                 /*
9024                  * ufshcd_reset_and_restore() should have already
9025                  * set the link state as active
9026                  */
9027                 if (ret || !ufshcd_is_link_active(hba))
9028                         goto vendor_suspend;
9029         }
9030
9031         if (!ufshcd_is_ufs_dev_active(hba)) {
9032                 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
9033                 if (ret)
9034                         goto set_old_link_state;
9035         }
9036
9037         if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
9038                 ufshcd_enable_auto_bkops(hba);
9039         else
9040                 /*
9041                  * If BKOPs operations are urgently needed at this moment then
9042                  * keep auto-bkops enabled or else disable it.
9043                  */
9044                 ufshcd_urgent_bkops(hba);
9045
9046         if (hba->ee_usr_mask)
9047                 ufshcd_write_ee_control(hba);
9048
9049         if (ufshcd_is_clkscaling_supported(hba))
9050                 ufshcd_clk_scaling_suspend(hba, false);
9051
9052         if (hba->dev_info.b_rpm_dev_flush_capable) {
9053                 hba->dev_info.b_rpm_dev_flush_capable = false;
9054                 cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
9055         }
9056
9057         /* Enable Auto-Hibernate if configured */
9058         ufshcd_auto_hibern8_enable(hba);
9059
9060         ufshpb_resume(hba);
9061         goto out;
9062
9063 set_old_link_state:
9064         ufshcd_link_state_transition(hba, old_link_state, 0);
9065 vendor_suspend:
9066         ufshcd_vops_suspend(hba, pm_op);
9067 out:
9068         if (ret)
9069                 ufshcd_update_evt_hist(hba, UFS_EVT_WL_RES_ERR, (u32)ret);
9070         hba->clk_gating.is_suspended = false;
9071         ufshcd_release(hba);
9072         hba->pm_op_in_progress = false;
9073         return ret;
9074 }
9075
9076 static int ufshcd_wl_runtime_suspend(struct device *dev)
9077 {
9078         struct scsi_device *sdev = to_scsi_device(dev);
9079         struct ufs_hba *hba;
9080         int ret;
9081         ktime_t start = ktime_get();
9082
9083         hba = shost_priv(sdev->host);
9084
9085         ret = __ufshcd_wl_suspend(hba, UFS_RUNTIME_PM);
9086         if (ret)
9087                 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9088
9089         trace_ufshcd_wl_runtime_suspend(dev_name(dev), ret,
9090                 ktime_to_us(ktime_sub(ktime_get(), start)),
9091                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9092
9093         return ret;
9094 }
9095
9096 static int ufshcd_wl_runtime_resume(struct device *dev)
9097 {
9098         struct scsi_device *sdev = to_scsi_device(dev);
9099         struct ufs_hba *hba;
9100         int ret = 0;
9101         ktime_t start = ktime_get();
9102
9103         hba = shost_priv(sdev->host);
9104
9105         ret = __ufshcd_wl_resume(hba, UFS_RUNTIME_PM);
9106         if (ret)
9107                 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9108
9109         trace_ufshcd_wl_runtime_resume(dev_name(dev), ret,
9110                 ktime_to_us(ktime_sub(ktime_get(), start)),
9111                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9112
9113         return ret;
9114 }
9115 #endif
9116
9117 #ifdef CONFIG_PM_SLEEP
9118 static int ufshcd_wl_suspend(struct device *dev)
9119 {
9120         struct scsi_device *sdev = to_scsi_device(dev);
9121         struct ufs_hba *hba;
9122         int ret = 0;
9123         ktime_t start = ktime_get();
9124
9125         hba = shost_priv(sdev->host);
9126         down(&hba->host_sem);
9127
9128         if (pm_runtime_suspended(dev))
9129                 goto out;
9130
9131         ret = __ufshcd_wl_suspend(hba, UFS_SYSTEM_PM);
9132         if (ret) {
9133                 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__,  ret);
9134                 up(&hba->host_sem);
9135         }
9136
9137 out:
9138         if (!ret)
9139                 hba->is_sys_suspended = true;
9140         trace_ufshcd_wl_suspend(dev_name(dev), ret,
9141                 ktime_to_us(ktime_sub(ktime_get(), start)),
9142                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9143
9144         return ret;
9145 }
9146
9147 static int ufshcd_wl_resume(struct device *dev)
9148 {
9149         struct scsi_device *sdev = to_scsi_device(dev);
9150         struct ufs_hba *hba;
9151         int ret = 0;
9152         ktime_t start = ktime_get();
9153
9154         hba = shost_priv(sdev->host);
9155
9156         if (pm_runtime_suspended(dev))
9157                 goto out;
9158
9159         ret = __ufshcd_wl_resume(hba, UFS_SYSTEM_PM);
9160         if (ret)
9161                 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9162 out:
9163         trace_ufshcd_wl_resume(dev_name(dev), ret,
9164                 ktime_to_us(ktime_sub(ktime_get(), start)),
9165                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9166         if (!ret)
9167                 hba->is_sys_suspended = false;
9168         up(&hba->host_sem);
9169         return ret;
9170 }
9171 #endif
9172
9173 static void ufshcd_wl_shutdown(struct device *dev)
9174 {
9175         struct scsi_device *sdev = to_scsi_device(dev);
9176         struct ufs_hba *hba;
9177
9178         hba = shost_priv(sdev->host);
9179
9180         down(&hba->host_sem);
9181         hba->shutting_down = true;
9182         up(&hba->host_sem);
9183
9184         /* Turn on everything while shutting down */
9185         ufshcd_rpm_get_sync(hba);
9186         scsi_device_quiesce(sdev);
9187         shost_for_each_device(sdev, hba->host) {
9188                 if (sdev == hba->sdev_ufs_device)
9189                         continue;
9190                 scsi_device_quiesce(sdev);
9191         }
9192         __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9193 }
9194
9195 /**
9196  * ufshcd_suspend - helper function for suspend operations
9197  * @hba: per adapter instance
9198  *
9199  * This function will put disable irqs, turn off clocks
9200  * and set vreg and hba-vreg in lpm mode.
9201  */
9202 static int ufshcd_suspend(struct ufs_hba *hba)
9203 {
9204         int ret;
9205
9206         if (!hba->is_powered)
9207                 return 0;
9208         /*
9209          * Disable the host irq as host controller as there won't be any
9210          * host controller transaction expected till resume.
9211          */
9212         ufshcd_disable_irq(hba);
9213         ret = ufshcd_setup_clocks(hba, false);
9214         if (ret) {
9215                 ufshcd_enable_irq(hba);
9216                 return ret;
9217         }
9218         if (ufshcd_is_clkgating_allowed(hba)) {
9219                 hba->clk_gating.state = CLKS_OFF;
9220                 trace_ufshcd_clk_gating(dev_name(hba->dev),
9221                                         hba->clk_gating.state);
9222         }
9223
9224         ufshcd_vreg_set_lpm(hba);
9225         /* Put the host controller in low power mode if possible */
9226         ufshcd_hba_vreg_set_lpm(hba);
9227         return ret;
9228 }
9229
9230 #ifdef CONFIG_PM
9231 /**
9232  * ufshcd_resume - helper function for resume operations
9233  * @hba: per adapter instance
9234  *
9235  * This function basically turns on the regulators, clocks and
9236  * irqs of the hba.
9237  *
9238  * Returns 0 for success and non-zero for failure
9239  */
9240 static int ufshcd_resume(struct ufs_hba *hba)
9241 {
9242         int ret;
9243
9244         if (!hba->is_powered)
9245                 return 0;
9246
9247         ufshcd_hba_vreg_set_hpm(hba);
9248         ret = ufshcd_vreg_set_hpm(hba);
9249         if (ret)
9250                 goto out;
9251
9252         /* Make sure clocks are enabled before accessing controller */
9253         ret = ufshcd_setup_clocks(hba, true);
9254         if (ret)
9255                 goto disable_vreg;
9256
9257         /* enable the host irq as host controller would be active soon */
9258         ufshcd_enable_irq(hba);
9259         goto out;
9260
9261 disable_vreg:
9262         ufshcd_vreg_set_lpm(hba);
9263 out:
9264         if (ret)
9265                 ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)ret);
9266         return ret;
9267 }
9268 #endif /* CONFIG_PM */
9269
9270 #ifdef CONFIG_PM_SLEEP
9271 /**
9272  * ufshcd_system_suspend - system suspend callback
9273  * @dev: Device associated with the UFS controller.
9274  *
9275  * Executed before putting the system into a sleep state in which the contents
9276  * of main memory are preserved.
9277  *
9278  * Returns 0 for success and non-zero for failure
9279  */
9280 int ufshcd_system_suspend(struct device *dev)
9281 {
9282         struct ufs_hba *hba = dev_get_drvdata(dev);
9283         int ret = 0;
9284         ktime_t start = ktime_get();
9285
9286         if (pm_runtime_suspended(hba->dev))
9287                 goto out;
9288
9289         ret = ufshcd_suspend(hba);
9290 out:
9291         trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
9292                 ktime_to_us(ktime_sub(ktime_get(), start)),
9293                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9294         return ret;
9295 }
9296 EXPORT_SYMBOL(ufshcd_system_suspend);
9297
9298 /**
9299  * ufshcd_system_resume - system resume callback
9300  * @dev: Device associated with the UFS controller.
9301  *
9302  * Executed after waking the system up from a sleep state in which the contents
9303  * of main memory were preserved.
9304  *
9305  * Returns 0 for success and non-zero for failure
9306  */
9307 int ufshcd_system_resume(struct device *dev)
9308 {
9309         struct ufs_hba *hba = dev_get_drvdata(dev);
9310         ktime_t start = ktime_get();
9311         int ret = 0;
9312
9313         if (pm_runtime_suspended(hba->dev))
9314                 goto out;
9315
9316         ret = ufshcd_resume(hba);
9317
9318 out:
9319         trace_ufshcd_system_resume(dev_name(hba->dev), ret,
9320                 ktime_to_us(ktime_sub(ktime_get(), start)),
9321                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9322
9323         return ret;
9324 }
9325 EXPORT_SYMBOL(ufshcd_system_resume);
9326 #endif /* CONFIG_PM_SLEEP */
9327
9328 #ifdef CONFIG_PM
9329 /**
9330  * ufshcd_runtime_suspend - runtime suspend callback
9331  * @dev: Device associated with the UFS controller.
9332  *
9333  * Check the description of ufshcd_suspend() function for more details.
9334  *
9335  * Returns 0 for success and non-zero for failure
9336  */
9337 int ufshcd_runtime_suspend(struct device *dev)
9338 {
9339         struct ufs_hba *hba = dev_get_drvdata(dev);
9340         int ret;
9341         ktime_t start = ktime_get();
9342
9343         ret = ufshcd_suspend(hba);
9344
9345         trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
9346                 ktime_to_us(ktime_sub(ktime_get(), start)),
9347                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9348         return ret;
9349 }
9350 EXPORT_SYMBOL(ufshcd_runtime_suspend);
9351
9352 /**
9353  * ufshcd_runtime_resume - runtime resume routine
9354  * @dev: Device associated with the UFS controller.
9355  *
9356  * This function basically brings controller
9357  * to active state. Following operations are done in this function:
9358  *
9359  * 1. Turn on all the controller related clocks
9360  * 2. Turn ON VCC rail
9361  */
9362 int ufshcd_runtime_resume(struct device *dev)
9363 {
9364         struct ufs_hba *hba = dev_get_drvdata(dev);
9365         int ret;
9366         ktime_t start = ktime_get();
9367
9368         ret = ufshcd_resume(hba);
9369
9370         trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
9371                 ktime_to_us(ktime_sub(ktime_get(), start)),
9372                 hba->curr_dev_pwr_mode, hba->uic_link_state);
9373         return ret;
9374 }
9375 EXPORT_SYMBOL(ufshcd_runtime_resume);
9376 #endif /* CONFIG_PM */
9377
9378 /**
9379  * ufshcd_shutdown - shutdown routine
9380  * @hba: per adapter instance
9381  *
9382  * This function would turn off both UFS device and UFS hba
9383  * regulators. It would also disable clocks.
9384  *
9385  * Returns 0 always to allow force shutdown even in case of errors.
9386  */
9387 int ufshcd_shutdown(struct ufs_hba *hba)
9388 {
9389         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
9390                 goto out;
9391
9392         pm_runtime_get_sync(hba->dev);
9393
9394         ufshcd_suspend(hba);
9395 out:
9396         hba->is_powered = false;
9397         /* allow force shutdown even in case of errors */
9398         return 0;
9399 }
9400 EXPORT_SYMBOL(ufshcd_shutdown);
9401
9402 /**
9403  * ufshcd_remove - de-allocate SCSI host and host memory space
9404  *              data structure memory
9405  * @hba: per adapter instance
9406  */
9407 void ufshcd_remove(struct ufs_hba *hba)
9408 {
9409         if (hba->sdev_ufs_device)
9410                 ufshcd_rpm_get_sync(hba);
9411         ufs_bsg_remove(hba);
9412         ufshpb_remove(hba);
9413         ufs_sysfs_remove_nodes(hba->dev);
9414         blk_cleanup_queue(hba->tmf_queue);
9415         blk_mq_free_tag_set(&hba->tmf_tag_set);
9416         blk_cleanup_queue(hba->cmd_queue);
9417         scsi_remove_host(hba->host);
9418         /* disable interrupts */
9419         ufshcd_disable_intr(hba, hba->intr_mask);
9420         ufshcd_hba_stop(hba);
9421         ufshcd_hba_exit(hba);
9422 }
9423 EXPORT_SYMBOL_GPL(ufshcd_remove);
9424
9425 /**
9426  * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
9427  * @hba: pointer to Host Bus Adapter (HBA)
9428  */
9429 void ufshcd_dealloc_host(struct ufs_hba *hba)
9430 {
9431         scsi_host_put(hba->host);
9432 }
9433 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
9434
9435 /**
9436  * ufshcd_set_dma_mask - Set dma mask based on the controller
9437  *                       addressing capability
9438  * @hba: per adapter instance
9439  *
9440  * Returns 0 for success, non-zero for failure
9441  */
9442 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
9443 {
9444         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
9445                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
9446                         return 0;
9447         }
9448         return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
9449 }
9450
9451 static struct scsi_transport_template ufshcd_transport_template = {
9452         .eh_strategy_handler = ufshcd_err_handler,
9453 };
9454
9455 /**
9456  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
9457  * @dev: pointer to device handle
9458  * @hba_handle: driver private handle
9459  * Returns 0 on success, non-zero value on failure
9460  */
9461 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
9462 {
9463         struct Scsi_Host *host;
9464         struct ufs_hba *hba;
9465         int err = 0;
9466
9467         if (!dev) {
9468                 dev_err(dev,
9469                 "Invalid memory reference for dev is NULL\n");
9470                 err = -ENODEV;
9471                 goto out_error;
9472         }
9473
9474         host = scsi_host_alloc(&ufshcd_driver_template,
9475                                 sizeof(struct ufs_hba));
9476         if (!host) {
9477                 dev_err(dev, "scsi_host_alloc failed\n");
9478                 err = -ENOMEM;
9479                 goto out_error;
9480         }
9481         host->transportt = &ufshcd_transport_template;
9482         hba = shost_priv(host);
9483         hba->host = host;
9484         hba->dev = dev;
9485         hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
9486         INIT_LIST_HEAD(&hba->clk_list_head);
9487         spin_lock_init(&hba->outstanding_lock);
9488
9489         *hba_handle = hba;
9490
9491 out_error:
9492         return err;
9493 }
9494 EXPORT_SYMBOL(ufshcd_alloc_host);
9495
9496 /* This function exists because blk_mq_alloc_tag_set() requires this. */
9497 static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
9498                                      const struct blk_mq_queue_data *qd)
9499 {
9500         WARN_ON_ONCE(true);
9501         return BLK_STS_NOTSUPP;
9502 }
9503
9504 static const struct blk_mq_ops ufshcd_tmf_ops = {
9505         .queue_rq = ufshcd_queue_tmf,
9506 };
9507
9508 /**
9509  * ufshcd_init - Driver initialization routine
9510  * @hba: per-adapter instance
9511  * @mmio_base: base register address
9512  * @irq: Interrupt line of device
9513  * Returns 0 on success, non-zero value on failure
9514  */
9515 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9516 {
9517         int err;
9518         struct Scsi_Host *host = hba->host;
9519         struct device *dev = hba->dev;
9520
9521         if (!mmio_base) {
9522                 dev_err(hba->dev,
9523                 "Invalid memory reference for mmio_base is NULL\n");
9524                 err = -ENODEV;
9525                 goto out_error;
9526         }
9527
9528         hba->mmio_base = mmio_base;
9529         hba->irq = irq;
9530         hba->vps = &ufs_hba_vps;
9531
9532         err = ufshcd_hba_init(hba);
9533         if (err)
9534                 goto out_error;
9535
9536         /* Read capabilities registers */
9537         err = ufshcd_hba_capabilities(hba);
9538         if (err)
9539                 goto out_disable;
9540
9541         /* Get UFS version supported by the controller */
9542         hba->ufs_version = ufshcd_get_ufs_version(hba);
9543
9544         /* Get Interrupt bit mask per version */
9545         hba->intr_mask = ufshcd_get_intr_mask(hba);
9546
9547         err = ufshcd_set_dma_mask(hba);
9548         if (err) {
9549                 dev_err(hba->dev, "set dma mask failed\n");
9550                 goto out_disable;
9551         }
9552
9553         /* Allocate memory for host memory space */
9554         err = ufshcd_memory_alloc(hba);
9555         if (err) {
9556                 dev_err(hba->dev, "Memory allocation failed\n");
9557                 goto out_disable;
9558         }
9559
9560         /* Configure LRB */
9561         ufshcd_host_memory_configure(hba);
9562
9563         host->can_queue = hba->nutrs;
9564         host->cmd_per_lun = hba->nutrs;
9565         host->max_id = UFSHCD_MAX_ID;
9566         host->max_lun = UFS_MAX_LUNS;
9567         host->max_channel = UFSHCD_MAX_CHANNEL;
9568         host->unique_id = host->host_no;
9569         host->max_cmd_len = UFS_CDB_SIZE;
9570
9571         hba->max_pwr_info.is_valid = false;
9572
9573         INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
9574
9575         sema_init(&hba->host_sem, 1);
9576
9577         /* Initialize UIC command mutex */
9578         mutex_init(&hba->uic_cmd_mutex);
9579
9580         /* Initialize mutex for device management commands */
9581         mutex_init(&hba->dev_cmd.lock);
9582
9583         /* Initialize mutex for exception event control */
9584         mutex_init(&hba->ee_ctrl_mutex);
9585
9586         init_rwsem(&hba->clk_scaling_lock);
9587
9588         ufshcd_init_clk_gating(hba);
9589
9590         ufshcd_init_clk_scaling(hba);
9591
9592         /*
9593          * In order to avoid any spurious interrupt immediately after
9594          * registering UFS controller interrupt handler, clear any pending UFS
9595          * interrupt status and disable all the UFS interrupts.
9596          */
9597         ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9598                       REG_INTERRUPT_STATUS);
9599         ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9600         /*
9601          * Make sure that UFS interrupts are disabled and any pending interrupt
9602          * status is cleared before registering UFS interrupt handler.
9603          */
9604         mb();
9605
9606         /* IRQ registration */
9607         err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
9608         if (err) {
9609                 dev_err(hba->dev, "request irq failed\n");
9610                 goto out_disable;
9611         } else {
9612                 hba->is_irq_enabled = true;
9613         }
9614
9615         err = scsi_add_host(host, hba->dev);
9616         if (err) {
9617                 dev_err(hba->dev, "scsi_add_host failed\n");
9618                 goto out_disable;
9619         }
9620
9621         hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
9622         if (IS_ERR(hba->cmd_queue)) {
9623                 err = PTR_ERR(hba->cmd_queue);
9624                 goto out_remove_scsi_host;
9625         }
9626
9627         hba->tmf_tag_set = (struct blk_mq_tag_set) {
9628                 .nr_hw_queues   = 1,
9629                 .queue_depth    = hba->nutmrs,
9630                 .ops            = &ufshcd_tmf_ops,
9631                 .flags          = BLK_MQ_F_NO_SCHED,
9632         };
9633         err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
9634         if (err < 0)
9635                 goto free_cmd_queue;
9636         hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
9637         if (IS_ERR(hba->tmf_queue)) {
9638                 err = PTR_ERR(hba->tmf_queue);
9639                 goto free_tmf_tag_set;
9640         }
9641
9642         /* Reset the attached device */
9643         ufshcd_device_reset(hba);
9644
9645         ufshcd_init_crypto(hba);
9646
9647         /* Host controller enable */
9648         err = ufshcd_hba_enable(hba);
9649         if (err) {
9650                 dev_err(hba->dev, "Host controller enable failed\n");
9651                 ufshcd_print_evt_hist(hba);
9652                 ufshcd_print_host_state(hba);
9653                 goto free_tmf_queue;
9654         }
9655
9656         /*
9657          * Set the default power management level for runtime and system PM.
9658          * Default power saving mode is to keep UFS link in Hibern8 state
9659          * and UFS device in sleep state.
9660          */
9661         hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9662                                                 UFS_SLEEP_PWR_MODE,
9663                                                 UIC_LINK_HIBERN8_STATE);
9664         hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9665                                                 UFS_SLEEP_PWR_MODE,
9666                                                 UIC_LINK_HIBERN8_STATE);
9667
9668         INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
9669                           ufshcd_rpm_dev_flush_recheck_work);
9670
9671         /* Set the default auto-hiberate idle timer value to 150 ms */
9672         if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
9673                 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
9674                             FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
9675         }
9676
9677         /* Hold auto suspend until async scan completes */
9678         pm_runtime_get_sync(dev);
9679         atomic_set(&hba->scsi_block_reqs_cnt, 0);
9680         /*
9681          * We are assuming that device wasn't put in sleep/power-down
9682          * state exclusively during the boot stage before kernel.
9683          * This assumption helps avoid doing link startup twice during
9684          * ufshcd_probe_hba().
9685          */
9686         ufshcd_set_ufs_dev_active(hba);
9687
9688         async_schedule(ufshcd_async_scan, hba);
9689         ufs_sysfs_add_nodes(hba->dev);
9690
9691         device_enable_async_suspend(dev);
9692         return 0;
9693
9694 free_tmf_queue:
9695         blk_cleanup_queue(hba->tmf_queue);
9696 free_tmf_tag_set:
9697         blk_mq_free_tag_set(&hba->tmf_tag_set);
9698 free_cmd_queue:
9699         blk_cleanup_queue(hba->cmd_queue);
9700 out_remove_scsi_host:
9701         scsi_remove_host(hba->host);
9702 out_disable:
9703         hba->is_irq_enabled = false;
9704         ufshcd_hba_exit(hba);
9705 out_error:
9706         return err;
9707 }
9708 EXPORT_SYMBOL_GPL(ufshcd_init);
9709
9710 void ufshcd_resume_complete(struct device *dev)
9711 {
9712         struct ufs_hba *hba = dev_get_drvdata(dev);
9713
9714         if (hba->complete_put) {
9715                 ufshcd_rpm_put(hba);
9716                 hba->complete_put = false;
9717         }
9718         if (hba->rpmb_complete_put) {
9719                 ufshcd_rpmb_rpm_put(hba);
9720                 hba->rpmb_complete_put = false;
9721         }
9722 }
9723 EXPORT_SYMBOL_GPL(ufshcd_resume_complete);
9724
9725 int ufshcd_suspend_prepare(struct device *dev)
9726 {
9727         struct ufs_hba *hba = dev_get_drvdata(dev);
9728         int ret;
9729
9730         /*
9731          * SCSI assumes that runtime-pm and system-pm for scsi drivers
9732          * are same. And it doesn't wake up the device for system-suspend
9733          * if it's runtime suspended. But ufs doesn't follow that.
9734          * Refer ufshcd_resume_complete()
9735          */
9736         if (hba->sdev_ufs_device) {
9737                 ret = ufshcd_rpm_get_sync(hba);
9738                 if (ret < 0 && ret != -EACCES) {
9739                         ufshcd_rpm_put(hba);
9740                         return ret;
9741                 }
9742                 hba->complete_put = true;
9743         }
9744         if (hba->sdev_rpmb) {
9745                 ufshcd_rpmb_rpm_get_sync(hba);
9746                 hba->rpmb_complete_put = true;
9747         }
9748         return 0;
9749 }
9750 EXPORT_SYMBOL_GPL(ufshcd_suspend_prepare);
9751
9752 #ifdef CONFIG_PM_SLEEP
9753 static int ufshcd_wl_poweroff(struct device *dev)
9754 {
9755         struct scsi_device *sdev = to_scsi_device(dev);
9756         struct ufs_hba *hba = shost_priv(sdev->host);
9757
9758         __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9759         return 0;
9760 }
9761 #endif
9762
9763 static int ufshcd_wl_probe(struct device *dev)
9764 {
9765         struct scsi_device *sdev = to_scsi_device(dev);
9766
9767         if (!is_device_wlun(sdev))
9768                 return -ENODEV;
9769
9770         blk_pm_runtime_init(sdev->request_queue, dev);
9771         pm_runtime_set_autosuspend_delay(dev, 0);
9772         pm_runtime_allow(dev);
9773
9774         return  0;
9775 }
9776
9777 static int ufshcd_wl_remove(struct device *dev)
9778 {
9779         pm_runtime_forbid(dev);
9780         return 0;
9781 }
9782
9783 static const struct dev_pm_ops ufshcd_wl_pm_ops = {
9784 #ifdef CONFIG_PM_SLEEP
9785         .suspend = ufshcd_wl_suspend,
9786         .resume = ufshcd_wl_resume,
9787         .freeze = ufshcd_wl_suspend,
9788         .thaw = ufshcd_wl_resume,
9789         .poweroff = ufshcd_wl_poweroff,
9790         .restore = ufshcd_wl_resume,
9791 #endif
9792         SET_RUNTIME_PM_OPS(ufshcd_wl_runtime_suspend, ufshcd_wl_runtime_resume, NULL)
9793 };
9794
9795 /*
9796  * ufs_dev_wlun_template - describes ufs device wlun
9797  * ufs-device wlun - used to send pm commands
9798  * All luns are consumers of ufs-device wlun.
9799  *
9800  * Currently, no sd driver is present for wluns.
9801  * Hence the no specific pm operations are performed.
9802  * With ufs design, SSU should be sent to ufs-device wlun.
9803  * Hence register a scsi driver for ufs wluns only.
9804  */
9805 static struct scsi_driver ufs_dev_wlun_template = {
9806         .gendrv = {
9807                 .name = "ufs_device_wlun",
9808                 .owner = THIS_MODULE,
9809                 .probe = ufshcd_wl_probe,
9810                 .remove = ufshcd_wl_remove,
9811                 .pm = &ufshcd_wl_pm_ops,
9812                 .shutdown = ufshcd_wl_shutdown,
9813         },
9814 };
9815
9816 static int ufshcd_rpmb_probe(struct device *dev)
9817 {
9818         return is_rpmb_wlun(to_scsi_device(dev)) ? 0 : -ENODEV;
9819 }
9820
9821 static inline int ufshcd_clear_rpmb_uac(struct ufs_hba *hba)
9822 {
9823         int ret = 0;
9824
9825         if (!hba->wlun_rpmb_clr_ua)
9826                 return 0;
9827         ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
9828         if (!ret)
9829                 hba->wlun_rpmb_clr_ua = 0;
9830         return ret;
9831 }
9832
9833 #ifdef CONFIG_PM
9834 static int ufshcd_rpmb_resume(struct device *dev)
9835 {
9836         struct ufs_hba *hba = wlun_dev_to_hba(dev);
9837
9838         if (hba->sdev_rpmb)
9839                 ufshcd_clear_rpmb_uac(hba);
9840         return 0;
9841 }
9842 #endif
9843
9844 static const struct dev_pm_ops ufs_rpmb_pm_ops = {
9845         SET_RUNTIME_PM_OPS(NULL, ufshcd_rpmb_resume, NULL)
9846         SET_SYSTEM_SLEEP_PM_OPS(NULL, ufshcd_rpmb_resume)
9847 };
9848
9849 /* ufs_rpmb_wlun_template - Describes UFS RPMB WLUN. Used only to send UAC. */
9850 static struct scsi_driver ufs_rpmb_wlun_template = {
9851         .gendrv = {
9852                 .name = "ufs_rpmb_wlun",
9853                 .owner = THIS_MODULE,
9854                 .probe = ufshcd_rpmb_probe,
9855                 .pm = &ufs_rpmb_pm_ops,
9856         },
9857 };
9858
9859 static int __init ufshcd_core_init(void)
9860 {
9861         int ret;
9862
9863         ufs_debugfs_init();
9864
9865         ret = scsi_register_driver(&ufs_dev_wlun_template.gendrv);
9866         if (ret)
9867                 goto debugfs_exit;
9868
9869         ret = scsi_register_driver(&ufs_rpmb_wlun_template.gendrv);
9870         if (ret)
9871                 goto unregister;
9872
9873         return ret;
9874 unregister:
9875         scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9876 debugfs_exit:
9877         ufs_debugfs_exit();
9878         return ret;
9879 }
9880
9881 static void __exit ufshcd_core_exit(void)
9882 {
9883         ufs_debugfs_exit();
9884         scsi_unregister_driver(&ufs_rpmb_wlun_template.gendrv);
9885         scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9886 }
9887
9888 module_init(ufshcd_core_init);
9889 module_exit(ufshcd_core_exit);
9890
9891 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9892 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
9893 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
9894 MODULE_LICENSE("GPL");
9895 MODULE_VERSION(UFSHCD_DRIVER_VERSION);