2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
16 #include <scsi/scsi_tcq.h>
17 #include <scsi/scsicam.h>
18 #include <scsi/scsi_transport.h>
19 #include <scsi/scsi_transport_fc.h>
21 #include "qla_target.h"
26 char qla2x00_version_str[40];
28 static int apidev_major;
31 * SRB allocation cache
33 static struct kmem_cache *srb_cachep;
36 * CT6 CTX allocation cache
38 static struct kmem_cache *ctx_cachep;
40 * error level for logging
42 int ql_errlev = ql_log_all;
44 static int ql2xenableclass2;
45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
46 MODULE_PARM_DESC(ql2xenableclass2,
47 "Specify if Class 2 operations are supported from the very "
48 "beginning. Default is 0 - class 2 not supported.");
51 int ql2xlogintimeout = 20;
52 module_param(ql2xlogintimeout, int, S_IRUGO);
53 MODULE_PARM_DESC(ql2xlogintimeout,
54 "Login timeout value in seconds.");
56 int qlport_down_retry;
57 module_param(qlport_down_retry, int, S_IRUGO);
58 MODULE_PARM_DESC(qlport_down_retry,
59 "Maximum number of command retries to a port that returns "
60 "a PORT-DOWN status.");
62 int ql2xplogiabsentdevice;
63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
65 "Option to enable PLOGI to devices that are not present after "
66 "a Fabric scan. This is needed for several broken switches. "
67 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
69 int ql2xloginretrycount = 0;
70 module_param(ql2xloginretrycount, int, S_IRUGO);
71 MODULE_PARM_DESC(ql2xloginretrycount,
72 "Specify an alternate value for the NVRAM login retry count.");
74 int ql2xallocfwdump = 1;
75 module_param(ql2xallocfwdump, int, S_IRUGO);
76 MODULE_PARM_DESC(ql2xallocfwdump,
77 "Option to enable allocation of memory for a firmware dump "
78 "during HBA initialization. Memory allocation requirements "
79 "vary by ISP type. Default is 1 - allocate memory.");
81 int ql2xextended_error_logging;
82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
83 MODULE_PARM_DESC(ql2xextended_error_logging,
84 "Option to enable extended error logging,\n"
85 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
86 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
87 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
88 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
89 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
90 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
91 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
92 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
93 "\t\t0x00008000 - Verbose. 0x00004000 - Target.\n"
94 "\t\t0x00002000 - Target Mgmt. 0x00001000 - Target TMF.\n"
95 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
96 "\t\t0x1e400000 - Preferred value for capturing essential "
97 "debug information (equivalent to old "
98 "ql2xextended_error_logging=1).\n"
99 "\t\tDo LOGICAL OR of the value to enable more than one level");
101 int ql2xshiftctondsd = 6;
102 module_param(ql2xshiftctondsd, int, S_IRUGO);
103 MODULE_PARM_DESC(ql2xshiftctondsd,
104 "Set to control shifting of command type processing "
105 "based on total number of SG elements.");
107 int ql2xfdmienable=1;
108 module_param(ql2xfdmienable, int, S_IRUGO);
109 MODULE_PARM_DESC(ql2xfdmienable,
110 "Enables FDMI registrations. "
111 "0 - no FDMI. Default is 1 - perform FDMI.");
113 int ql2xmaxqdepth = MAX_Q_DEPTH;
114 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
115 MODULE_PARM_DESC(ql2xmaxqdepth,
116 "Maximum queue depth to set for each LUN. "
119 int ql2xenabledif = 2;
120 module_param(ql2xenabledif, int, S_IRUGO);
121 MODULE_PARM_DESC(ql2xenabledif,
122 " Enable T10-CRC-DIF "
123 " Default is 0 - No DIF Support. 1 - Enable it"
124 ", 2 - Enable DIF for all types, except Type 0.");
126 int ql2xenablehba_err_chk = 2;
127 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
128 MODULE_PARM_DESC(ql2xenablehba_err_chk,
129 " Enable T10-CRC-DIF Error isolation by HBA:\n"
131 " 0 -- Error isolation disabled\n"
132 " 1 -- Error isolation enabled only for DIX Type 0\n"
133 " 2 -- Error isolation enabled for all Types\n");
135 int ql2xiidmaenable=1;
136 module_param(ql2xiidmaenable, int, S_IRUGO);
137 MODULE_PARM_DESC(ql2xiidmaenable,
138 "Enables iIDMA settings "
139 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
141 int ql2xmaxqueues = 1;
142 module_param(ql2xmaxqueues, int, S_IRUGO);
143 MODULE_PARM_DESC(ql2xmaxqueues,
144 "Enables MQ settings "
145 "Default is 1 for single queue. Set it to number "
146 "of queues in MQ mode.");
148 int ql2xmultique_tag;
149 module_param(ql2xmultique_tag, int, S_IRUGO);
150 MODULE_PARM_DESC(ql2xmultique_tag,
151 "Enables CPU affinity settings for the driver "
152 "Default is 0 for no affinity of request and response IO. "
153 "Set it to 1 to turn on the cpu affinity.");
156 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
157 MODULE_PARM_DESC(ql2xfwloadbin,
158 "Option to specify location from which to load ISP firmware:.\n"
159 " 2 -- load firmware via the request_firmware() (hotplug).\n"
161 " 1 -- load firmware from flash.\n"
162 " 0 -- use default semantics.\n");
165 module_param(ql2xetsenable, int, S_IRUGO);
166 MODULE_PARM_DESC(ql2xetsenable,
167 "Enables firmware ETS burst."
168 "Default is 0 - skip ETS enablement.");
171 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
172 MODULE_PARM_DESC(ql2xdbwr,
173 "Option to specify scheme for request queue posting.\n"
174 " 0 -- Regular doorbell.\n"
175 " 1 -- CAMRAM doorbell (faster).\n");
177 int ql2xtargetreset = 1;
178 module_param(ql2xtargetreset, int, S_IRUGO);
179 MODULE_PARM_DESC(ql2xtargetreset,
180 "Enable target reset."
181 "Default is 1 - use hw defaults.");
184 module_param(ql2xgffidenable, int, S_IRUGO);
185 MODULE_PARM_DESC(ql2xgffidenable,
186 "Enables GFF_ID checks of port type. "
187 "Default is 0 - Do not use GFF_ID information.");
189 int ql2xasynctmfenable;
190 module_param(ql2xasynctmfenable, int, S_IRUGO);
191 MODULE_PARM_DESC(ql2xasynctmfenable,
192 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
193 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
195 int ql2xdontresethba;
196 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
197 MODULE_PARM_DESC(ql2xdontresethba,
198 "Option to specify reset behaviour.\n"
199 " 0 (Default) -- Reset on failure.\n"
200 " 1 -- Do not reset on failure.\n");
202 uint ql2xmaxlun = MAX_LUNS;
203 module_param(ql2xmaxlun, uint, S_IRUGO);
204 MODULE_PARM_DESC(ql2xmaxlun,
205 "Defines the maximum LU number to register with the SCSI "
206 "midlayer. Default is 65535.");
208 int ql2xmdcapmask = 0x1F;
209 module_param(ql2xmdcapmask, int, S_IRUGO);
210 MODULE_PARM_DESC(ql2xmdcapmask,
211 "Set the Minidump driver capture mask level. "
212 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
214 int ql2xmdenable = 1;
215 module_param(ql2xmdenable, int, S_IRUGO);
216 MODULE_PARM_DESC(ql2xmdenable,
217 "Enable/disable MiniDump. "
218 "0 - MiniDump disabled. "
219 "1 (Default) - MiniDump enabled.");
222 * SCSI host template entry points
224 static int qla2xxx_slave_configure(struct scsi_device * device);
225 static int qla2xxx_slave_alloc(struct scsi_device *);
226 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
227 static void qla2xxx_scan_start(struct Scsi_Host *);
228 static void qla2xxx_slave_destroy(struct scsi_device *);
229 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
230 static int qla2xxx_eh_abort(struct scsi_cmnd *);
231 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
232 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
233 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
234 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
236 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
237 static int qla2x00_change_queue_type(struct scsi_device *, int);
238 static void qla2x00_free_device(scsi_qla_host_t *);
240 struct scsi_host_template qla2xxx_driver_template = {
241 .module = THIS_MODULE,
242 .name = QLA2XXX_DRIVER_NAME,
243 .queuecommand = qla2xxx_queuecommand,
245 .eh_abort_handler = qla2xxx_eh_abort,
246 .eh_device_reset_handler = qla2xxx_eh_device_reset,
247 .eh_target_reset_handler = qla2xxx_eh_target_reset,
248 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
249 .eh_host_reset_handler = qla2xxx_eh_host_reset,
251 .slave_configure = qla2xxx_slave_configure,
253 .slave_alloc = qla2xxx_slave_alloc,
254 .slave_destroy = qla2xxx_slave_destroy,
255 .scan_finished = qla2xxx_scan_finished,
256 .scan_start = qla2xxx_scan_start,
257 .change_queue_depth = qla2x00_change_queue_depth,
258 .change_queue_type = qla2x00_change_queue_type,
261 .use_clustering = ENABLE_CLUSTERING,
262 .sg_tablesize = SG_ALL,
264 .max_sectors = 0xFFFF,
265 .shost_attrs = qla2x00_host_attrs,
267 .supported_mode = MODE_INITIATOR,
270 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
271 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
273 /* TODO Convert to inlines
279 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
281 init_timer(&vha->timer);
282 vha->timer.expires = jiffies + interval * HZ;
283 vha->timer.data = (unsigned long)vha;
284 vha->timer.function = (void (*)(unsigned long))func;
285 add_timer(&vha->timer);
286 vha->timer_active = 1;
290 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
292 /* Currently used for 82XX only. */
293 if (vha->device_flags & DFLG_DEV_FAILED) {
294 ql_dbg(ql_dbg_timer, vha, 0x600d,
295 "Device in a failed state, returning.\n");
299 mod_timer(&vha->timer, jiffies + interval * HZ);
302 static __inline__ void
303 qla2x00_stop_timer(scsi_qla_host_t *vha)
305 del_timer_sync(&vha->timer);
306 vha->timer_active = 0;
309 static int qla2x00_do_dpc(void *data);
311 static void qla2x00_rst_aen(scsi_qla_host_t *);
313 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
314 struct req_que **, struct rsp_que **);
315 static void qla2x00_free_fw_dump(struct qla_hw_data *);
316 static void qla2x00_mem_free(struct qla_hw_data *);
318 /* -------------------------------------------------------------------------- */
319 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
322 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
323 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
325 if (!ha->req_q_map) {
326 ql_log(ql_log_fatal, vha, 0x003b,
327 "Unable to allocate memory for request queue ptrs.\n");
331 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
333 if (!ha->rsp_q_map) {
334 ql_log(ql_log_fatal, vha, 0x003c,
335 "Unable to allocate memory for response queue ptrs.\n");
339 * Make sure we record at least the request and response queue zero in
340 * case we need to free them if part of the probe fails.
342 ha->rsp_q_map[0] = rsp;
343 ha->req_q_map[0] = req;
344 set_bit(0, ha->rsp_qid_map);
345 set_bit(0, ha->req_qid_map);
349 kfree(ha->req_q_map);
350 ha->req_q_map = NULL;
355 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
357 if (IS_QLAFX00(ha)) {
358 if (req && req->ring_fx00)
359 dma_free_coherent(&ha->pdev->dev,
360 (req->length_fx00 + 1) * sizeof(request_t),
361 req->ring_fx00, req->dma_fx00);
362 } else if (req && req->ring)
363 dma_free_coherent(&ha->pdev->dev,
364 (req->length + 1) * sizeof(request_t),
365 req->ring, req->dma);
368 kfree(req->outstanding_cmds);
374 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
376 if (IS_QLAFX00(ha)) {
377 if (rsp && rsp->ring)
378 dma_free_coherent(&ha->pdev->dev,
379 (rsp->length_fx00 + 1) * sizeof(request_t),
380 rsp->ring_fx00, rsp->dma_fx00);
381 } else if (rsp && rsp->ring) {
382 dma_free_coherent(&ha->pdev->dev,
383 (rsp->length + 1) * sizeof(response_t),
384 rsp->ring, rsp->dma);
390 static void qla2x00_free_queues(struct qla_hw_data *ha)
396 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
397 req = ha->req_q_map[cnt];
398 qla2x00_free_req_que(ha, req);
400 kfree(ha->req_q_map);
401 ha->req_q_map = NULL;
403 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
404 rsp = ha->rsp_q_map[cnt];
405 qla2x00_free_rsp_que(ha, rsp);
407 kfree(ha->rsp_q_map);
408 ha->rsp_q_map = NULL;
411 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
413 uint16_t options = 0;
415 struct qla_hw_data *ha = vha->hw;
417 if (!(ha->fw_attributes & BIT_6)) {
418 ql_log(ql_log_warn, vha, 0x00d8,
419 "Firmware is not multi-queue capable.\n");
422 if (ql2xmultique_tag) {
423 /* create a request queue for IO */
425 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
426 QLA_DEFAULT_QUE_QOS);
428 ql_log(ql_log_warn, vha, 0x00e0,
429 "Failed to create request queue.\n");
432 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
433 vha->req = ha->req_q_map[req];
435 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
436 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
438 ql_log(ql_log_warn, vha, 0x00e8,
439 "Failed to create response queue.\n");
443 ha->flags.cpu_affinity_enabled = 1;
444 ql_dbg(ql_dbg_multiq, vha, 0xc007,
445 "CPU affinity mode enalbed, "
446 "no. of response queues:%d no. of request queues:%d.\n",
447 ha->max_rsp_queues, ha->max_req_queues);
448 ql_dbg(ql_dbg_init, vha, 0x00e9,
449 "CPU affinity mode enalbed, "
450 "no. of response queues:%d no. of request queues:%d.\n",
451 ha->max_rsp_queues, ha->max_req_queues);
455 qla25xx_delete_queues(vha);
456 destroy_workqueue(ha->wq);
458 vha->req = ha->req_q_map[0];
461 kfree(ha->req_q_map);
462 kfree(ha->rsp_q_map);
463 ha->max_req_queues = ha->max_rsp_queues = 1;
468 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
470 struct qla_hw_data *ha = vha->hw;
471 static char *pci_bus_modes[] = {
472 "33", "66", "100", "133",
477 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
480 strcat(str, pci_bus_modes[pci_bus]);
482 pci_bus = (ha->pci_attr & BIT_8) >> 8;
484 strcat(str, pci_bus_modes[pci_bus]);
486 strcat(str, " MHz)");
492 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
494 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
495 struct qla_hw_data *ha = vha->hw;
499 pcie_reg = pci_pcie_cap(ha->pdev);
502 uint16_t pcie_lstat, lspeed, lwidth;
504 pcie_reg += PCI_EXP_LNKCAP;
505 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
506 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
507 lwidth = (pcie_lstat &
508 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
510 strcpy(str, "PCIe (");
513 strcat(str, "2.5GT/s ");
516 strcat(str, "5.0GT/s ");
519 strcat(str, "8.0GT/s ");
522 strcat(str, "<unknown> ");
525 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
532 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
533 if (pci_bus == 0 || pci_bus == 8) {
535 strcat(str, pci_bus_modes[pci_bus >> 3]);
539 strcat(str, "Mode 2");
541 strcat(str, "Mode 1");
543 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
545 strcat(str, " MHz)");
551 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
554 struct qla_hw_data *ha = vha->hw;
556 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
557 ha->fw_minor_version,
558 ha->fw_subminor_version);
560 if (ha->fw_attributes & BIT_9) {
565 switch (ha->fw_attributes & 0xFF) {
579 sprintf(un_str, "(%x)", ha->fw_attributes);
583 if (ha->fw_attributes & 0x100)
590 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
592 struct qla_hw_data *ha = vha->hw;
594 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
595 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
600 qla2x00_sp_free_dma(void *vha, void *ptr)
602 srb_t *sp = (srb_t *)ptr;
603 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
604 struct qla_hw_data *ha = sp->fcport->vha->hw;
605 void *ctx = GET_CMD_CTX_SP(sp);
607 if (sp->flags & SRB_DMA_VALID) {
609 sp->flags &= ~SRB_DMA_VALID;
612 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
613 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
614 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
615 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
618 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
619 /* List assured to be having elements */
620 qla2x00_clean_dsd_pool(ha, sp);
621 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
624 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
625 dma_pool_free(ha->dl_dma_pool, ctx,
626 ((struct crc_context *)ctx)->crc_ctx_dma);
627 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
630 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
631 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
633 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
635 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
636 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
637 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
638 mempool_free(ctx1, ha->ctx_mempool);
643 qla2x00_rel_sp(sp->fcport->vha, sp);
647 qla2x00_sp_compl(void *data, void *ptr, int res)
649 struct qla_hw_data *ha = (struct qla_hw_data *)data;
650 srb_t *sp = (srb_t *)ptr;
651 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
655 if (atomic_read(&sp->ref_count) == 0) {
656 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
657 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
659 if (ql2xextended_error_logging & ql_dbg_io)
663 if (!atomic_dec_and_test(&sp->ref_count))
666 qla2x00_sp_free_dma(ha, sp);
670 /* If we are SP1 here, we need to still take and release the host_lock as SP1
671 * does not have the changes necessary to avoid taking host->host_lock.
674 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
676 scsi_qla_host_t *vha = shost_priv(host);
677 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
678 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
679 struct qla_hw_data *ha = vha->hw;
680 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
684 if (ha->flags.eeh_busy) {
685 if (ha->flags.pci_channel_io_perm_failure) {
686 ql_dbg(ql_dbg_aer, vha, 0x9010,
687 "PCI Channel IO permanent failure, exiting "
689 cmd->result = DID_NO_CONNECT << 16;
691 ql_dbg(ql_dbg_aer, vha, 0x9011,
692 "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
693 cmd->result = DID_REQUEUE << 16;
695 goto qc24_fail_command;
698 rval = fc_remote_port_chkready(rport);
701 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
702 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
704 goto qc24_fail_command;
707 if (!vha->flags.difdix_supported &&
708 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
709 ql_dbg(ql_dbg_io, vha, 0x3004,
710 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
712 cmd->result = DID_NO_CONNECT << 16;
713 goto qc24_fail_command;
717 cmd->result = DID_NO_CONNECT << 16;
718 goto qc24_fail_command;
721 if (atomic_read(&fcport->state) != FCS_ONLINE) {
722 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
723 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
724 ql_dbg(ql_dbg_io, vha, 0x3005,
725 "Returning DNC, fcport_state=%d loop_state=%d.\n",
726 atomic_read(&fcport->state),
727 atomic_read(&base_vha->loop_state));
728 cmd->result = DID_NO_CONNECT << 16;
729 goto qc24_fail_command;
731 goto qc24_target_busy;
734 sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
736 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
740 sp->u.scmd.cmd = cmd;
741 sp->type = SRB_SCSI_CMD;
742 atomic_set(&sp->ref_count, 1);
743 CMD_SP(cmd) = (void *)sp;
744 sp->free = qla2x00_sp_free_dma;
745 sp->done = qla2x00_sp_compl;
747 rval = ha->isp_ops->start_scsi(sp);
748 if (rval != QLA_SUCCESS) {
749 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
750 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
751 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
752 goto qc24_host_busy_free_sp;
757 qc24_host_busy_free_sp:
758 qla2x00_sp_free_dma(ha, sp);
761 return SCSI_MLQUEUE_HOST_BUSY;
764 return SCSI_MLQUEUE_TARGET_BUSY;
773 * qla2x00_eh_wait_on_command
774 * Waits for the command to be returned by the Firmware for some
778 * cmd = Scsi Command to wait on.
785 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
787 #define ABORT_POLLING_PERIOD 1000
788 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
789 unsigned long wait_iter = ABORT_WAIT_ITER;
790 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
791 struct qla_hw_data *ha = vha->hw;
792 int ret = QLA_SUCCESS;
794 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
795 ql_dbg(ql_dbg_taskm, vha, 0x8005,
796 "Return:eh_wait.\n");
800 while (CMD_SP(cmd) && wait_iter--) {
801 msleep(ABORT_POLLING_PERIOD);
804 ret = QLA_FUNCTION_FAILED;
810 * qla2x00_wait_for_hba_online
811 * Wait till the HBA is online after going through
812 * <= MAX_RETRIES_OF_ISP_ABORT or
813 * finally HBA is disabled ie marked offline
816 * ha - pointer to host adapter structure
819 * Does context switching-Release SPIN_LOCK
820 * (if any) before calling this routine.
823 * Success (Adapter is online) : 0
824 * Failed (Adapter is offline/disabled) : 1
827 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
830 unsigned long wait_online;
831 struct qla_hw_data *ha = vha->hw;
832 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
834 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
835 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
836 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
837 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
838 ha->dpc_active) && time_before(jiffies, wait_online)) {
842 if (base_vha->flags.online)
843 return_status = QLA_SUCCESS;
845 return_status = QLA_FUNCTION_FAILED;
847 return (return_status);
851 * qla2x00_wait_for_reset_ready
852 * Wait till the HBA is online after going through
853 * <= MAX_RETRIES_OF_ISP_ABORT or
854 * finally HBA is disabled ie marked offline or flash
855 * operations are in progress.
858 * ha - pointer to host adapter structure
861 * Does context switching-Release SPIN_LOCK
862 * (if any) before calling this routine.
865 * Success (Adapter is online/no flash ops) : 0
866 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
869 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
872 unsigned long wait_online;
873 struct qla_hw_data *ha = vha->hw;
874 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
876 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
877 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
878 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
879 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
880 ha->optrom_state != QLA_SWAITING ||
881 ha->dpc_active) && time_before(jiffies, wait_online))
884 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
885 return_status = QLA_SUCCESS;
887 return_status = QLA_FUNCTION_FAILED;
889 ql_dbg(ql_dbg_taskm, vha, 0x8019,
890 "%s return status=%d.\n", __func__, return_status);
892 return return_status;
896 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
899 unsigned long wait_reset;
900 struct qla_hw_data *ha = vha->hw;
901 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
903 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
904 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
905 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
906 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
907 ha->dpc_active) && time_before(jiffies, wait_reset)) {
911 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
912 ha->flags.chip_reset_done)
915 if (ha->flags.chip_reset_done)
916 return_status = QLA_SUCCESS;
918 return_status = QLA_FUNCTION_FAILED;
920 return return_status;
924 sp_get(struct srb *sp)
926 atomic_inc(&sp->ref_count);
929 /**************************************************************************
933 * The abort function will abort the specified command.
936 * cmd = Linux SCSI command packet to be aborted.
939 * Either SUCCESS or FAILED.
942 * Only return FAILED if command not returned by firmware.
943 **************************************************************************/
945 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
947 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
950 unsigned int id, lun;
953 struct qla_hw_data *ha = vha->hw;
958 ret = fc_block_scsi_eh(cmd);
963 id = cmd->device->id;
964 lun = cmd->device->lun;
966 spin_lock_irqsave(&ha->hardware_lock, flags);
967 sp = (srb_t *) CMD_SP(cmd);
969 spin_unlock_irqrestore(&ha->hardware_lock, flags);
973 ql_dbg(ql_dbg_taskm, vha, 0x8002,
974 "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
975 vha->host_no, id, lun, sp, cmd);
977 /* Get a reference to the sp and drop the lock.*/
980 spin_unlock_irqrestore(&ha->hardware_lock, flags);
981 if (ha->isp_ops->abort_command(sp)) {
983 ql_dbg(ql_dbg_taskm, vha, 0x8003,
984 "Abort command mbx failed cmd=%p.\n", cmd);
986 ql_dbg(ql_dbg_taskm, vha, 0x8004,
987 "Abort command mbx success cmd=%p.\n", cmd);
991 spin_lock_irqsave(&ha->hardware_lock, flags);
993 spin_unlock_irqrestore(&ha->hardware_lock, flags);
995 /* Did the command return during mailbox execution? */
996 if (ret == FAILED && !CMD_SP(cmd))
999 /* Wait for the command to be returned. */
1001 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1002 ql_log(ql_log_warn, vha, 0x8006,
1003 "Abort handler timed out cmd=%p.\n", cmd);
1008 ql_log(ql_log_info, vha, 0x801c,
1009 "Abort command issued nexus=%ld:%d:%d -- %d %x.\n",
1010 vha->host_no, id, lun, wait, ret);
1016 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1017 unsigned int l, enum nexus_wait_type type)
1019 int cnt, match, status;
1020 unsigned long flags;
1021 struct qla_hw_data *ha = vha->hw;
1022 struct req_que *req;
1024 struct scsi_cmnd *cmd;
1026 status = QLA_SUCCESS;
1028 spin_lock_irqsave(&ha->hardware_lock, flags);
1030 for (cnt = 1; status == QLA_SUCCESS &&
1031 cnt < req->num_outstanding_cmds; cnt++) {
1032 sp = req->outstanding_cmds[cnt];
1035 if (sp->type != SRB_SCSI_CMD)
1037 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1040 cmd = GET_CMD_SP(sp);
1046 match = cmd->device->id == t;
1049 match = (cmd->device->id == t &&
1050 cmd->device->lun == l);
1056 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1057 status = qla2x00_eh_wait_on_command(cmd);
1058 spin_lock_irqsave(&ha->hardware_lock, flags);
1060 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1065 static char *reset_errors[] = {
1068 "Task management failed",
1069 "Waiting for command completions",
1073 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1074 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1076 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1077 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1084 err = fc_block_scsi_eh(cmd);
1088 ql_log(ql_log_info, vha, 0x8009,
1089 "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1090 cmd->device->id, cmd->device->lun, cmd);
1093 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1094 ql_log(ql_log_warn, vha, 0x800a,
1095 "Wait for hba online failed for cmd=%p.\n", cmd);
1096 goto eh_reset_failed;
1099 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1101 ql_log(ql_log_warn, vha, 0x800c,
1102 "do_reset failed for cmd=%p.\n", cmd);
1103 goto eh_reset_failed;
1106 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1107 cmd->device->lun, type) != QLA_SUCCESS) {
1108 ql_log(ql_log_warn, vha, 0x800d,
1109 "wait for pending cmds failed for cmd=%p.\n", cmd);
1110 goto eh_reset_failed;
1113 ql_log(ql_log_info, vha, 0x800e,
1114 "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1115 vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1120 ql_log(ql_log_info, vha, 0x800f,
1121 "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1122 reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1128 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1130 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1131 struct qla_hw_data *ha = vha->hw;
1133 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1134 ha->isp_ops->lun_reset);
1138 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1140 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1141 struct qla_hw_data *ha = vha->hw;
1143 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1144 ha->isp_ops->target_reset);
1147 /**************************************************************************
1148 * qla2xxx_eh_bus_reset
1151 * The bus reset function will reset the bus and abort any executing
1155 * cmd = Linux SCSI command packet of the command that cause the
1159 * SUCCESS/FAILURE (defined as macro in scsi.h).
1161 **************************************************************************/
1163 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1165 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1166 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1168 unsigned int id, lun;
1170 id = cmd->device->id;
1171 lun = cmd->device->lun;
1177 ret = fc_block_scsi_eh(cmd);
1182 ql_log(ql_log_info, vha, 0x8012,
1183 "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1185 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1186 ql_log(ql_log_fatal, vha, 0x8013,
1187 "Wait for hba online failed board disabled.\n");
1188 goto eh_bus_reset_done;
1191 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1195 goto eh_bus_reset_done;
1197 /* Flush outstanding commands. */
1198 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1200 ql_log(ql_log_warn, vha, 0x8014,
1201 "Wait for pending commands failed.\n");
1206 ql_log(ql_log_warn, vha, 0x802b,
1207 "BUS RESET %s nexus=%ld:%d:%d.\n",
1208 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1213 /**************************************************************************
1214 * qla2xxx_eh_host_reset
1217 * The reset function will reset the Adapter.
1220 * cmd = Linux SCSI command packet of the command that cause the
1224 * Either SUCCESS or FAILED.
1227 **************************************************************************/
1229 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1231 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1232 struct qla_hw_data *ha = vha->hw;
1234 unsigned int id, lun;
1235 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1237 id = cmd->device->id;
1238 lun = cmd->device->lun;
1240 ql_log(ql_log_info, vha, 0x8018,
1241 "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1243 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1244 goto eh_host_reset_lock;
1246 if (vha != base_vha) {
1247 if (qla2x00_vp_abort_isp(vha))
1248 goto eh_host_reset_lock;
1250 if (IS_QLA82XX(vha->hw)) {
1251 if (!qla82xx_fcoe_ctx_reset(vha)) {
1252 /* Ctx reset success */
1254 goto eh_host_reset_lock;
1256 /* fall thru if ctx reset failed */
1259 flush_workqueue(ha->wq);
1261 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1262 if (ha->isp_ops->abort_isp(base_vha)) {
1263 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1264 /* failed. schedule dpc to try */
1265 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1267 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1268 ql_log(ql_log_warn, vha, 0x802a,
1269 "wait for hba online failed.\n");
1270 goto eh_host_reset_lock;
1273 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1276 /* Waiting for command to be returned to OS.*/
1277 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1282 ql_log(ql_log_info, vha, 0x8017,
1283 "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1284 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1290 * qla2x00_loop_reset
1294 * ha = adapter block pointer.
1300 qla2x00_loop_reset(scsi_qla_host_t *vha)
1303 struct fc_port *fcport;
1304 struct qla_hw_data *ha = vha->hw;
1306 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1307 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1308 if (fcport->port_type != FCT_TARGET)
1311 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1312 if (ret != QLA_SUCCESS) {
1313 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1314 "Bus Reset failed: Target Reset=%d "
1315 "d_id=%x.\n", ret, fcport->d_id.b24);
1323 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1324 atomic_set(&vha->loop_state, LOOP_DOWN);
1325 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1326 qla2x00_mark_all_devices_lost(vha, 0);
1327 ret = qla2x00_full_login_lip(vha);
1328 if (ret != QLA_SUCCESS) {
1329 ql_dbg(ql_dbg_taskm, vha, 0x802d,
1330 "full_login_lip=%d.\n", ret);
1334 if (ha->flags.enable_lip_reset) {
1335 ret = qla2x00_lip_reset(vha);
1336 if (ret != QLA_SUCCESS)
1337 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1338 "lip_reset failed (%d).\n", ret);
1341 /* Issue marker command only when we are going to start the I/O */
1342 vha->marker_needed = 1;
1348 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1351 unsigned long flags;
1353 struct qla_hw_data *ha = vha->hw;
1354 struct req_que *req;
1356 spin_lock_irqsave(&ha->hardware_lock, flags);
1357 for (que = 0; que < ha->max_req_queues; que++) {
1358 req = ha->req_q_map[que];
1361 if (!req->outstanding_cmds)
1363 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1364 sp = req->outstanding_cmds[cnt];
1366 req->outstanding_cmds[cnt] = NULL;
1367 sp->done(vha, sp, res);
1371 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1375 qla2xxx_slave_alloc(struct scsi_device *sdev)
1377 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1379 if (!rport || fc_remote_port_chkready(rport))
1382 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1388 qla2xxx_slave_configure(struct scsi_device *sdev)
1390 scsi_qla_host_t *vha = shost_priv(sdev->host);
1391 struct req_que *req = vha->req;
1393 if (IS_T10_PI_CAPABLE(vha->hw))
1394 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1396 if (sdev->tagged_supported)
1397 scsi_activate_tcq(sdev, req->max_q_depth);
1399 scsi_deactivate_tcq(sdev, req->max_q_depth);
1404 qla2xxx_slave_destroy(struct scsi_device *sdev)
1406 sdev->hostdata = NULL;
1409 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1411 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1413 if (!scsi_track_queue_full(sdev, qdepth))
1416 ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1417 "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1418 sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1421 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1423 fc_port_t *fcport = sdev->hostdata;
1424 struct scsi_qla_host *vha = fcport->vha;
1425 struct req_que *req = NULL;
1431 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1434 if (sdev->ordered_tags)
1435 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1437 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1439 ql_dbg(ql_dbg_io, vha, 0x302a,
1440 "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1441 sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1445 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1448 case SCSI_QDEPTH_DEFAULT:
1449 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1451 case SCSI_QDEPTH_QFULL:
1452 qla2x00_handle_queue_full(sdev, qdepth);
1454 case SCSI_QDEPTH_RAMP_UP:
1455 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1461 return sdev->queue_depth;
1465 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1467 if (sdev->tagged_supported) {
1468 scsi_set_tag_type(sdev, tag_type);
1470 scsi_activate_tcq(sdev, sdev->queue_depth);
1472 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1480 qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t *vha)
1482 scsi_qla_host_t *vp;
1483 struct Scsi_Host *shost;
1484 struct scsi_device *sdev;
1485 struct qla_hw_data *ha = vha->hw;
1486 unsigned long flags;
1488 ha->host_last_rampdown_time = jiffies;
1490 if (ha->cfg_lun_q_depth <= vha->host->cmd_per_lun)
1493 if ((ha->cfg_lun_q_depth / 2) < vha->host->cmd_per_lun)
1494 ha->cfg_lun_q_depth = vha->host->cmd_per_lun;
1496 ha->cfg_lun_q_depth = ha->cfg_lun_q_depth / 2;
1499 * Geometrically ramp down the queue depth for all devices on this
1502 spin_lock_irqsave(&ha->vport_slock, flags);
1503 list_for_each_entry(vp, &ha->vp_list, list) {
1505 shost_for_each_device(sdev, shost) {
1506 if (sdev->queue_depth > shost->cmd_per_lun) {
1507 if (sdev->queue_depth < ha->cfg_lun_q_depth)
1509 ql_log(ql_log_warn, vp, 0x3031,
1510 "%ld:%d:%d: Ramping down queue depth to %d",
1511 vp->host_no, sdev->id, sdev->lun,
1512 ha->cfg_lun_q_depth);
1513 qla2x00_change_queue_depth(sdev,
1514 ha->cfg_lun_q_depth, SCSI_QDEPTH_DEFAULT);
1518 spin_unlock_irqrestore(&ha->vport_slock, flags);
1524 qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t *vha)
1526 scsi_qla_host_t *vp;
1527 struct Scsi_Host *shost;
1528 struct scsi_device *sdev;
1529 struct qla_hw_data *ha = vha->hw;
1530 unsigned long flags;
1532 ha->host_last_rampup_time = jiffies;
1533 ha->cfg_lun_q_depth++;
1536 * Linearly ramp up the queue depth for all devices on this
1539 spin_lock_irqsave(&ha->vport_slock, flags);
1540 list_for_each_entry(vp, &ha->vp_list, list) {
1542 shost_for_each_device(sdev, shost) {
1543 if (sdev->queue_depth > ha->cfg_lun_q_depth)
1545 qla2x00_change_queue_depth(sdev, ha->cfg_lun_q_depth,
1546 SCSI_QDEPTH_RAMP_UP);
1549 spin_unlock_irqrestore(&ha->vport_slock, flags);
1555 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1558 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1559 * supported addressing method.
1562 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1564 /* Assume a 32bit DMA mask. */
1565 ha->flags.enable_64bit_addressing = 0;
1567 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1568 /* Any upper-dword bits set? */
1569 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1570 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1571 /* Ok, a 64bit DMA mask is applicable. */
1572 ha->flags.enable_64bit_addressing = 1;
1573 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1574 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1579 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1580 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1584 qla2x00_enable_intrs(struct qla_hw_data *ha)
1586 unsigned long flags = 0;
1587 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1589 spin_lock_irqsave(&ha->hardware_lock, flags);
1590 ha->interrupts_on = 1;
1591 /* enable risc and host interrupts */
1592 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
1593 RD_REG_WORD(®->ictrl);
1594 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1599 qla2x00_disable_intrs(struct qla_hw_data *ha)
1601 unsigned long flags = 0;
1602 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1604 spin_lock_irqsave(&ha->hardware_lock, flags);
1605 ha->interrupts_on = 0;
1606 /* disable risc and host interrupts */
1607 WRT_REG_WORD(®->ictrl, 0);
1608 RD_REG_WORD(®->ictrl);
1609 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1613 qla24xx_enable_intrs(struct qla_hw_data *ha)
1615 unsigned long flags = 0;
1616 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1618 spin_lock_irqsave(&ha->hardware_lock, flags);
1619 ha->interrupts_on = 1;
1620 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT);
1621 RD_REG_DWORD(®->ictrl);
1622 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1626 qla24xx_disable_intrs(struct qla_hw_data *ha)
1628 unsigned long flags = 0;
1629 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1631 if (IS_NOPOLLING_TYPE(ha))
1633 spin_lock_irqsave(&ha->hardware_lock, flags);
1634 ha->interrupts_on = 0;
1635 WRT_REG_DWORD(®->ictrl, 0);
1636 RD_REG_DWORD(®->ictrl);
1637 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1641 qla2x00_iospace_config(struct qla_hw_data *ha)
1643 resource_size_t pio;
1647 if (pci_request_selected_regions(ha->pdev, ha->bars,
1648 QLA2XXX_DRIVER_NAME)) {
1649 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1650 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1651 pci_name(ha->pdev));
1652 goto iospace_error_exit;
1654 if (!(ha->bars & 1))
1657 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1658 pio = pci_resource_start(ha->pdev, 0);
1659 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1660 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1661 ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1662 "Invalid pci I/O region size (%s).\n",
1663 pci_name(ha->pdev));
1667 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1668 "Region #0 no a PIO resource (%s).\n",
1669 pci_name(ha->pdev));
1672 ha->pio_address = pio;
1673 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1674 "PIO address=%llu.\n",
1675 (unsigned long long)ha->pio_address);
1678 /* Use MMIO operations for all accesses. */
1679 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1680 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1681 "Region #1 not an MMIO resource (%s), aborting.\n",
1682 pci_name(ha->pdev));
1683 goto iospace_error_exit;
1685 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1686 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1687 "Invalid PCI mem region size (%s), aborting.\n",
1688 pci_name(ha->pdev));
1689 goto iospace_error_exit;
1692 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1694 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1695 "Cannot remap MMIO (%s), aborting.\n",
1696 pci_name(ha->pdev));
1697 goto iospace_error_exit;
1700 /* Determine queue resources */
1701 ha->max_req_queues = ha->max_rsp_queues = 1;
1702 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1703 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1704 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1707 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1708 pci_resource_len(ha->pdev, 3));
1710 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1711 "MQIO Base=%p.\n", ha->mqiobase);
1712 /* Read MSIX vector size of the board */
1713 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1714 ha->msix_count = msix;
1715 /* Max queues are bounded by available msix vectors */
1716 /* queue 0 uses two msix vectors */
1717 if (ql2xmultique_tag) {
1718 cpus = num_online_cpus();
1719 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1720 (cpus + 1) : (ha->msix_count - 1);
1721 ha->max_req_queues = 2;
1722 } else if (ql2xmaxqueues > 1) {
1723 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1724 QLA_MQ_SIZE : ql2xmaxqueues;
1725 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1726 "QoS mode set, max no of request queues:%d.\n",
1727 ha->max_req_queues);
1728 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1729 "QoS mode set, max no of request queues:%d.\n",
1730 ha->max_req_queues);
1732 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1733 "MSI-X vector count: %d.\n", msix);
1735 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1736 "BAR 3 not enabled.\n");
1739 ha->msix_count = ha->max_rsp_queues + 1;
1740 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1741 "MSIX Count:%d.\n", ha->msix_count);
1750 qla83xx_iospace_config(struct qla_hw_data *ha)
1755 if (pci_request_selected_regions(ha->pdev, ha->bars,
1756 QLA2XXX_DRIVER_NAME)) {
1757 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1758 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1759 pci_name(ha->pdev));
1761 goto iospace_error_exit;
1764 /* Use MMIO operations for all accesses. */
1765 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1766 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1767 "Invalid pci I/O region size (%s).\n",
1768 pci_name(ha->pdev));
1769 goto iospace_error_exit;
1771 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1772 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1773 "Invalid PCI mem region size (%s), aborting\n",
1774 pci_name(ha->pdev));
1775 goto iospace_error_exit;
1778 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1780 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1781 "Cannot remap MMIO (%s), aborting.\n",
1782 pci_name(ha->pdev));
1783 goto iospace_error_exit;
1786 /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1787 /* 83XX 26XX always use MQ type access for queues
1788 * - mbar 2, a.k.a region 4 */
1789 ha->max_req_queues = ha->max_rsp_queues = 1;
1790 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1791 pci_resource_len(ha->pdev, 4));
1793 if (!ha->mqiobase) {
1794 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1795 "BAR2/region4 not enabled\n");
1799 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1800 pci_resource_len(ha->pdev, 2));
1802 /* Read MSIX vector size of the board */
1803 pci_read_config_word(ha->pdev,
1804 QLA_83XX_PCI_MSIX_CONTROL, &msix);
1805 ha->msix_count = msix;
1806 /* Max queues are bounded by available msix vectors */
1807 /* queue 0 uses two msix vectors */
1808 if (ql2xmultique_tag) {
1809 cpus = num_online_cpus();
1810 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1811 (cpus + 1) : (ha->msix_count - 1);
1812 ha->max_req_queues = 2;
1813 } else if (ql2xmaxqueues > 1) {
1814 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1815 QLA_MQ_SIZE : ql2xmaxqueues;
1816 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1817 "QoS mode set, max no of request queues:%d.\n",
1818 ha->max_req_queues);
1819 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1820 "QoS mode set, max no of request queues:%d.\n",
1821 ha->max_req_queues);
1823 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1824 "MSI-X vector count: %d.\n", msix);
1826 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1827 "BAR 1 not enabled.\n");
1830 ha->msix_count = ha->max_rsp_queues + 1;
1832 qlt_83xx_iospace_config(ha);
1834 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1835 "MSIX Count:%d.\n", ha->msix_count);
1842 static struct isp_operations qla2100_isp_ops = {
1843 .pci_config = qla2100_pci_config,
1844 .reset_chip = qla2x00_reset_chip,
1845 .chip_diag = qla2x00_chip_diag,
1846 .config_rings = qla2x00_config_rings,
1847 .reset_adapter = qla2x00_reset_adapter,
1848 .nvram_config = qla2x00_nvram_config,
1849 .update_fw_options = qla2x00_update_fw_options,
1850 .load_risc = qla2x00_load_risc,
1851 .pci_info_str = qla2x00_pci_info_str,
1852 .fw_version_str = qla2x00_fw_version_str,
1853 .intr_handler = qla2100_intr_handler,
1854 .enable_intrs = qla2x00_enable_intrs,
1855 .disable_intrs = qla2x00_disable_intrs,
1856 .abort_command = qla2x00_abort_command,
1857 .target_reset = qla2x00_abort_target,
1858 .lun_reset = qla2x00_lun_reset,
1859 .fabric_login = qla2x00_login_fabric,
1860 .fabric_logout = qla2x00_fabric_logout,
1861 .calc_req_entries = qla2x00_calc_iocbs_32,
1862 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1863 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1864 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1865 .read_nvram = qla2x00_read_nvram_data,
1866 .write_nvram = qla2x00_write_nvram_data,
1867 .fw_dump = qla2100_fw_dump,
1870 .beacon_blink = NULL,
1871 .read_optrom = qla2x00_read_optrom_data,
1872 .write_optrom = qla2x00_write_optrom_data,
1873 .get_flash_version = qla2x00_get_flash_version,
1874 .start_scsi = qla2x00_start_scsi,
1875 .abort_isp = qla2x00_abort_isp,
1876 .iospace_config = qla2x00_iospace_config,
1877 .initialize_adapter = qla2x00_initialize_adapter,
1880 static struct isp_operations qla2300_isp_ops = {
1881 .pci_config = qla2300_pci_config,
1882 .reset_chip = qla2x00_reset_chip,
1883 .chip_diag = qla2x00_chip_diag,
1884 .config_rings = qla2x00_config_rings,
1885 .reset_adapter = qla2x00_reset_adapter,
1886 .nvram_config = qla2x00_nvram_config,
1887 .update_fw_options = qla2x00_update_fw_options,
1888 .load_risc = qla2x00_load_risc,
1889 .pci_info_str = qla2x00_pci_info_str,
1890 .fw_version_str = qla2x00_fw_version_str,
1891 .intr_handler = qla2300_intr_handler,
1892 .enable_intrs = qla2x00_enable_intrs,
1893 .disable_intrs = qla2x00_disable_intrs,
1894 .abort_command = qla2x00_abort_command,
1895 .target_reset = qla2x00_abort_target,
1896 .lun_reset = qla2x00_lun_reset,
1897 .fabric_login = qla2x00_login_fabric,
1898 .fabric_logout = qla2x00_fabric_logout,
1899 .calc_req_entries = qla2x00_calc_iocbs_32,
1900 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1901 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1902 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1903 .read_nvram = qla2x00_read_nvram_data,
1904 .write_nvram = qla2x00_write_nvram_data,
1905 .fw_dump = qla2300_fw_dump,
1906 .beacon_on = qla2x00_beacon_on,
1907 .beacon_off = qla2x00_beacon_off,
1908 .beacon_blink = qla2x00_beacon_blink,
1909 .read_optrom = qla2x00_read_optrom_data,
1910 .write_optrom = qla2x00_write_optrom_data,
1911 .get_flash_version = qla2x00_get_flash_version,
1912 .start_scsi = qla2x00_start_scsi,
1913 .abort_isp = qla2x00_abort_isp,
1914 .iospace_config = qla2x00_iospace_config,
1915 .initialize_adapter = qla2x00_initialize_adapter,
1918 static struct isp_operations qla24xx_isp_ops = {
1919 .pci_config = qla24xx_pci_config,
1920 .reset_chip = qla24xx_reset_chip,
1921 .chip_diag = qla24xx_chip_diag,
1922 .config_rings = qla24xx_config_rings,
1923 .reset_adapter = qla24xx_reset_adapter,
1924 .nvram_config = qla24xx_nvram_config,
1925 .update_fw_options = qla24xx_update_fw_options,
1926 .load_risc = qla24xx_load_risc,
1927 .pci_info_str = qla24xx_pci_info_str,
1928 .fw_version_str = qla24xx_fw_version_str,
1929 .intr_handler = qla24xx_intr_handler,
1930 .enable_intrs = qla24xx_enable_intrs,
1931 .disable_intrs = qla24xx_disable_intrs,
1932 .abort_command = qla24xx_abort_command,
1933 .target_reset = qla24xx_abort_target,
1934 .lun_reset = qla24xx_lun_reset,
1935 .fabric_login = qla24xx_login_fabric,
1936 .fabric_logout = qla24xx_fabric_logout,
1937 .calc_req_entries = NULL,
1938 .build_iocbs = NULL,
1939 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1940 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1941 .read_nvram = qla24xx_read_nvram_data,
1942 .write_nvram = qla24xx_write_nvram_data,
1943 .fw_dump = qla24xx_fw_dump,
1944 .beacon_on = qla24xx_beacon_on,
1945 .beacon_off = qla24xx_beacon_off,
1946 .beacon_blink = qla24xx_beacon_blink,
1947 .read_optrom = qla24xx_read_optrom_data,
1948 .write_optrom = qla24xx_write_optrom_data,
1949 .get_flash_version = qla24xx_get_flash_version,
1950 .start_scsi = qla24xx_start_scsi,
1951 .abort_isp = qla2x00_abort_isp,
1952 .iospace_config = qla2x00_iospace_config,
1953 .initialize_adapter = qla2x00_initialize_adapter,
1956 static struct isp_operations qla25xx_isp_ops = {
1957 .pci_config = qla25xx_pci_config,
1958 .reset_chip = qla24xx_reset_chip,
1959 .chip_diag = qla24xx_chip_diag,
1960 .config_rings = qla24xx_config_rings,
1961 .reset_adapter = qla24xx_reset_adapter,
1962 .nvram_config = qla24xx_nvram_config,
1963 .update_fw_options = qla24xx_update_fw_options,
1964 .load_risc = qla24xx_load_risc,
1965 .pci_info_str = qla24xx_pci_info_str,
1966 .fw_version_str = qla24xx_fw_version_str,
1967 .intr_handler = qla24xx_intr_handler,
1968 .enable_intrs = qla24xx_enable_intrs,
1969 .disable_intrs = qla24xx_disable_intrs,
1970 .abort_command = qla24xx_abort_command,
1971 .target_reset = qla24xx_abort_target,
1972 .lun_reset = qla24xx_lun_reset,
1973 .fabric_login = qla24xx_login_fabric,
1974 .fabric_logout = qla24xx_fabric_logout,
1975 .calc_req_entries = NULL,
1976 .build_iocbs = NULL,
1977 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1978 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1979 .read_nvram = qla25xx_read_nvram_data,
1980 .write_nvram = qla25xx_write_nvram_data,
1981 .fw_dump = qla25xx_fw_dump,
1982 .beacon_on = qla24xx_beacon_on,
1983 .beacon_off = qla24xx_beacon_off,
1984 .beacon_blink = qla24xx_beacon_blink,
1985 .read_optrom = qla25xx_read_optrom_data,
1986 .write_optrom = qla24xx_write_optrom_data,
1987 .get_flash_version = qla24xx_get_flash_version,
1988 .start_scsi = qla24xx_dif_start_scsi,
1989 .abort_isp = qla2x00_abort_isp,
1990 .iospace_config = qla2x00_iospace_config,
1991 .initialize_adapter = qla2x00_initialize_adapter,
1994 static struct isp_operations qla81xx_isp_ops = {
1995 .pci_config = qla25xx_pci_config,
1996 .reset_chip = qla24xx_reset_chip,
1997 .chip_diag = qla24xx_chip_diag,
1998 .config_rings = qla24xx_config_rings,
1999 .reset_adapter = qla24xx_reset_adapter,
2000 .nvram_config = qla81xx_nvram_config,
2001 .update_fw_options = qla81xx_update_fw_options,
2002 .load_risc = qla81xx_load_risc,
2003 .pci_info_str = qla24xx_pci_info_str,
2004 .fw_version_str = qla24xx_fw_version_str,
2005 .intr_handler = qla24xx_intr_handler,
2006 .enable_intrs = qla24xx_enable_intrs,
2007 .disable_intrs = qla24xx_disable_intrs,
2008 .abort_command = qla24xx_abort_command,
2009 .target_reset = qla24xx_abort_target,
2010 .lun_reset = qla24xx_lun_reset,
2011 .fabric_login = qla24xx_login_fabric,
2012 .fabric_logout = qla24xx_fabric_logout,
2013 .calc_req_entries = NULL,
2014 .build_iocbs = NULL,
2015 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2016 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2018 .write_nvram = NULL,
2019 .fw_dump = qla81xx_fw_dump,
2020 .beacon_on = qla24xx_beacon_on,
2021 .beacon_off = qla24xx_beacon_off,
2022 .beacon_blink = qla83xx_beacon_blink,
2023 .read_optrom = qla25xx_read_optrom_data,
2024 .write_optrom = qla24xx_write_optrom_data,
2025 .get_flash_version = qla24xx_get_flash_version,
2026 .start_scsi = qla24xx_dif_start_scsi,
2027 .abort_isp = qla2x00_abort_isp,
2028 .iospace_config = qla2x00_iospace_config,
2029 .initialize_adapter = qla2x00_initialize_adapter,
2032 static struct isp_operations qla82xx_isp_ops = {
2033 .pci_config = qla82xx_pci_config,
2034 .reset_chip = qla82xx_reset_chip,
2035 .chip_diag = qla24xx_chip_diag,
2036 .config_rings = qla82xx_config_rings,
2037 .reset_adapter = qla24xx_reset_adapter,
2038 .nvram_config = qla81xx_nvram_config,
2039 .update_fw_options = qla24xx_update_fw_options,
2040 .load_risc = qla82xx_load_risc,
2041 .pci_info_str = qla24xx_pci_info_str,
2042 .fw_version_str = qla24xx_fw_version_str,
2043 .intr_handler = qla82xx_intr_handler,
2044 .enable_intrs = qla82xx_enable_intrs,
2045 .disable_intrs = qla82xx_disable_intrs,
2046 .abort_command = qla24xx_abort_command,
2047 .target_reset = qla24xx_abort_target,
2048 .lun_reset = qla24xx_lun_reset,
2049 .fabric_login = qla24xx_login_fabric,
2050 .fabric_logout = qla24xx_fabric_logout,
2051 .calc_req_entries = NULL,
2052 .build_iocbs = NULL,
2053 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2054 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2055 .read_nvram = qla24xx_read_nvram_data,
2056 .write_nvram = qla24xx_write_nvram_data,
2057 .fw_dump = qla24xx_fw_dump,
2058 .beacon_on = qla82xx_beacon_on,
2059 .beacon_off = qla82xx_beacon_off,
2060 .beacon_blink = NULL,
2061 .read_optrom = qla82xx_read_optrom_data,
2062 .write_optrom = qla82xx_write_optrom_data,
2063 .get_flash_version = qla24xx_get_flash_version,
2064 .start_scsi = qla82xx_start_scsi,
2065 .abort_isp = qla82xx_abort_isp,
2066 .iospace_config = qla82xx_iospace_config,
2067 .initialize_adapter = qla2x00_initialize_adapter,
2070 static struct isp_operations qla83xx_isp_ops = {
2071 .pci_config = qla25xx_pci_config,
2072 .reset_chip = qla24xx_reset_chip,
2073 .chip_diag = qla24xx_chip_diag,
2074 .config_rings = qla24xx_config_rings,
2075 .reset_adapter = qla24xx_reset_adapter,
2076 .nvram_config = qla81xx_nvram_config,
2077 .update_fw_options = qla81xx_update_fw_options,
2078 .load_risc = qla81xx_load_risc,
2079 .pci_info_str = qla24xx_pci_info_str,
2080 .fw_version_str = qla24xx_fw_version_str,
2081 .intr_handler = qla24xx_intr_handler,
2082 .enable_intrs = qla24xx_enable_intrs,
2083 .disable_intrs = qla24xx_disable_intrs,
2084 .abort_command = qla24xx_abort_command,
2085 .target_reset = qla24xx_abort_target,
2086 .lun_reset = qla24xx_lun_reset,
2087 .fabric_login = qla24xx_login_fabric,
2088 .fabric_logout = qla24xx_fabric_logout,
2089 .calc_req_entries = NULL,
2090 .build_iocbs = NULL,
2091 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2092 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2094 .write_nvram = NULL,
2095 .fw_dump = qla83xx_fw_dump,
2096 .beacon_on = qla24xx_beacon_on,
2097 .beacon_off = qla24xx_beacon_off,
2098 .beacon_blink = qla83xx_beacon_blink,
2099 .read_optrom = qla25xx_read_optrom_data,
2100 .write_optrom = qla24xx_write_optrom_data,
2101 .get_flash_version = qla24xx_get_flash_version,
2102 .start_scsi = qla24xx_dif_start_scsi,
2103 .abort_isp = qla2x00_abort_isp,
2104 .iospace_config = qla83xx_iospace_config,
2105 .initialize_adapter = qla2x00_initialize_adapter,
2108 static struct isp_operations qlafx00_isp_ops = {
2109 .pci_config = qlafx00_pci_config,
2110 .reset_chip = qlafx00_soft_reset,
2111 .chip_diag = qlafx00_chip_diag,
2112 .config_rings = qlafx00_config_rings,
2113 .reset_adapter = qlafx00_soft_reset,
2114 .nvram_config = NULL,
2115 .update_fw_options = NULL,
2117 .pci_info_str = qlafx00_pci_info_str,
2118 .fw_version_str = qlafx00_fw_version_str,
2119 .intr_handler = qlafx00_intr_handler,
2120 .enable_intrs = qlafx00_enable_intrs,
2121 .disable_intrs = qlafx00_disable_intrs,
2122 .abort_command = qlafx00_abort_command,
2123 .target_reset = qlafx00_abort_target,
2124 .lun_reset = qlafx00_lun_reset,
2125 .fabric_login = NULL,
2126 .fabric_logout = NULL,
2127 .calc_req_entries = NULL,
2128 .build_iocbs = NULL,
2129 .prep_ms_iocb = qla24xx_prep_ms_iocb,
2130 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
2131 .read_nvram = qla24xx_read_nvram_data,
2132 .write_nvram = qla24xx_write_nvram_data,
2134 .beacon_on = qla24xx_beacon_on,
2135 .beacon_off = qla24xx_beacon_off,
2136 .beacon_blink = NULL,
2137 .read_optrom = qla24xx_read_optrom_data,
2138 .write_optrom = qla24xx_write_optrom_data,
2139 .get_flash_version = qla24xx_get_flash_version,
2140 .start_scsi = qlafx00_start_scsi,
2141 .abort_isp = qlafx00_abort_isp,
2142 .iospace_config = qlafx00_iospace_config,
2143 .initialize_adapter = qlafx00_initialize_adapter,
2147 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2149 ha->device_type = DT_EXTENDED_IDS;
2150 switch (ha->pdev->device) {
2151 case PCI_DEVICE_ID_QLOGIC_ISP2100:
2152 ha->device_type |= DT_ISP2100;
2153 ha->device_type &= ~DT_EXTENDED_IDS;
2154 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2156 case PCI_DEVICE_ID_QLOGIC_ISP2200:
2157 ha->device_type |= DT_ISP2200;
2158 ha->device_type &= ~DT_EXTENDED_IDS;
2159 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2161 case PCI_DEVICE_ID_QLOGIC_ISP2300:
2162 ha->device_type |= DT_ISP2300;
2163 ha->device_type |= DT_ZIO_SUPPORTED;
2164 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2166 case PCI_DEVICE_ID_QLOGIC_ISP2312:
2167 ha->device_type |= DT_ISP2312;
2168 ha->device_type |= DT_ZIO_SUPPORTED;
2169 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2171 case PCI_DEVICE_ID_QLOGIC_ISP2322:
2172 ha->device_type |= DT_ISP2322;
2173 ha->device_type |= DT_ZIO_SUPPORTED;
2174 if (ha->pdev->subsystem_vendor == 0x1028 &&
2175 ha->pdev->subsystem_device == 0x0170)
2176 ha->device_type |= DT_OEM_001;
2177 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2179 case PCI_DEVICE_ID_QLOGIC_ISP6312:
2180 ha->device_type |= DT_ISP6312;
2181 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2183 case PCI_DEVICE_ID_QLOGIC_ISP6322:
2184 ha->device_type |= DT_ISP6322;
2185 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2187 case PCI_DEVICE_ID_QLOGIC_ISP2422:
2188 ha->device_type |= DT_ISP2422;
2189 ha->device_type |= DT_ZIO_SUPPORTED;
2190 ha->device_type |= DT_FWI2;
2191 ha->device_type |= DT_IIDMA;
2192 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2194 case PCI_DEVICE_ID_QLOGIC_ISP2432:
2195 ha->device_type |= DT_ISP2432;
2196 ha->device_type |= DT_ZIO_SUPPORTED;
2197 ha->device_type |= DT_FWI2;
2198 ha->device_type |= DT_IIDMA;
2199 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2201 case PCI_DEVICE_ID_QLOGIC_ISP8432:
2202 ha->device_type |= DT_ISP8432;
2203 ha->device_type |= DT_ZIO_SUPPORTED;
2204 ha->device_type |= DT_FWI2;
2205 ha->device_type |= DT_IIDMA;
2206 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2208 case PCI_DEVICE_ID_QLOGIC_ISP5422:
2209 ha->device_type |= DT_ISP5422;
2210 ha->device_type |= DT_FWI2;
2211 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2213 case PCI_DEVICE_ID_QLOGIC_ISP5432:
2214 ha->device_type |= DT_ISP5432;
2215 ha->device_type |= DT_FWI2;
2216 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2218 case PCI_DEVICE_ID_QLOGIC_ISP2532:
2219 ha->device_type |= DT_ISP2532;
2220 ha->device_type |= DT_ZIO_SUPPORTED;
2221 ha->device_type |= DT_FWI2;
2222 ha->device_type |= DT_IIDMA;
2223 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2225 case PCI_DEVICE_ID_QLOGIC_ISP8001:
2226 ha->device_type |= DT_ISP8001;
2227 ha->device_type |= DT_ZIO_SUPPORTED;
2228 ha->device_type |= DT_FWI2;
2229 ha->device_type |= DT_IIDMA;
2230 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2232 case PCI_DEVICE_ID_QLOGIC_ISP8021:
2233 ha->device_type |= DT_ISP8021;
2234 ha->device_type |= DT_ZIO_SUPPORTED;
2235 ha->device_type |= DT_FWI2;
2236 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2237 /* Initialize 82XX ISP flags */
2238 qla82xx_init_flags(ha);
2240 case PCI_DEVICE_ID_QLOGIC_ISP2031:
2241 ha->device_type |= DT_ISP2031;
2242 ha->device_type |= DT_ZIO_SUPPORTED;
2243 ha->device_type |= DT_FWI2;
2244 ha->device_type |= DT_IIDMA;
2245 ha->device_type |= DT_T10_PI;
2246 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2248 case PCI_DEVICE_ID_QLOGIC_ISP8031:
2249 ha->device_type |= DT_ISP8031;
2250 ha->device_type |= DT_ZIO_SUPPORTED;
2251 ha->device_type |= DT_FWI2;
2252 ha->device_type |= DT_IIDMA;
2253 ha->device_type |= DT_T10_PI;
2254 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2256 case PCI_DEVICE_ID_QLOGIC_ISPF001:
2257 ha->device_type |= DT_ISPFX00;
2262 ha->port_no = !(ha->portnum & 1);
2264 /* Get adapter physical port no from interrupt pin register. */
2265 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2267 if (ha->port_no & 1)
2268 ha->flags.port0 = 1;
2270 ha->flags.port0 = 0;
2271 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2272 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2273 ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2277 qla2xxx_scan_start(struct Scsi_Host *shost)
2279 scsi_qla_host_t *vha = shost_priv(shost);
2281 if (vha->hw->flags.running_gold_fw)
2284 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2285 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2286 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2287 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2291 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2293 scsi_qla_host_t *vha = shost_priv(shost);
2297 if (time > vha->hw->loop_reset_delay * HZ)
2300 return atomic_read(&vha->loop_state) == LOOP_READY;
2304 * PCI driver interface
2307 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2310 struct Scsi_Host *host;
2311 scsi_qla_host_t *base_vha = NULL;
2312 struct qla_hw_data *ha;
2314 char fw_str[30], wq_name[30];
2315 struct scsi_host_template *sht;
2316 int bars, mem_only = 0;
2317 uint16_t req_length = 0, rsp_length = 0;
2318 struct req_que *req = NULL;
2319 struct rsp_que *rsp = NULL;
2321 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2322 sht = &qla2xxx_driver_template;
2323 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2324 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2325 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2326 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2327 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2328 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2329 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2330 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2331 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2332 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2333 pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001) {
2334 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2336 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2337 "Mem only adapter.\n");
2339 ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2340 "Bars=%d.\n", bars);
2343 if (pci_enable_device_mem(pdev))
2346 if (pci_enable_device(pdev))
2350 /* This may fail but that's ok */
2351 pci_enable_pcie_error_reporting(pdev);
2353 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2355 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2356 "Unable to allocate memory for ha.\n");
2359 ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2360 "Memory allocated for ha=%p.\n", ha);
2362 ha->tgt.enable_class_2 = ql2xenableclass2;
2364 /* Clear our data area */
2366 ha->mem_only = mem_only;
2367 spin_lock_init(&ha->hardware_lock);
2368 spin_lock_init(&ha->vport_slock);
2369 mutex_init(&ha->selflogin_lock);
2371 /* Set ISP-type information. */
2372 qla2x00_set_isp_flags(ha);
2374 /* Set EEH reset type to fundamental if required by hba */
2375 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2377 pdev->needs_freset = 1;
2379 ha->prev_topology = 0;
2380 ha->init_cb_size = sizeof(init_cb_t);
2381 ha->link_data_rate = PORT_SPEED_UNKNOWN;
2382 ha->optrom_size = OPTROM_SIZE_2300;
2383 ha->cfg_lun_q_depth = ql2xmaxqdepth;
2385 /* Assign ISP specific operations. */
2386 if (IS_QLA2100(ha)) {
2387 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2388 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2389 req_length = REQUEST_ENTRY_CNT_2100;
2390 rsp_length = RESPONSE_ENTRY_CNT_2100;
2391 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2392 ha->gid_list_info_size = 4;
2393 ha->flash_conf_off = ~0;
2394 ha->flash_data_off = ~0;
2395 ha->nvram_conf_off = ~0;
2396 ha->nvram_data_off = ~0;
2397 ha->isp_ops = &qla2100_isp_ops;
2398 } else if (IS_QLA2200(ha)) {
2399 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2400 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2401 req_length = REQUEST_ENTRY_CNT_2200;
2402 rsp_length = RESPONSE_ENTRY_CNT_2100;
2403 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2404 ha->gid_list_info_size = 4;
2405 ha->flash_conf_off = ~0;
2406 ha->flash_data_off = ~0;
2407 ha->nvram_conf_off = ~0;
2408 ha->nvram_data_off = ~0;
2409 ha->isp_ops = &qla2100_isp_ops;
2410 } else if (IS_QLA23XX(ha)) {
2411 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2412 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2413 req_length = REQUEST_ENTRY_CNT_2200;
2414 rsp_length = RESPONSE_ENTRY_CNT_2300;
2415 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2416 ha->gid_list_info_size = 6;
2417 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2418 ha->optrom_size = OPTROM_SIZE_2322;
2419 ha->flash_conf_off = ~0;
2420 ha->flash_data_off = ~0;
2421 ha->nvram_conf_off = ~0;
2422 ha->nvram_data_off = ~0;
2423 ha->isp_ops = &qla2300_isp_ops;
2424 } else if (IS_QLA24XX_TYPE(ha)) {
2425 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2426 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2427 req_length = REQUEST_ENTRY_CNT_24XX;
2428 rsp_length = RESPONSE_ENTRY_CNT_2300;
2429 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2430 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2431 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2432 ha->gid_list_info_size = 8;
2433 ha->optrom_size = OPTROM_SIZE_24XX;
2434 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2435 ha->isp_ops = &qla24xx_isp_ops;
2436 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2437 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2438 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2439 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2440 } else if (IS_QLA25XX(ha)) {
2441 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2442 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2443 req_length = REQUEST_ENTRY_CNT_24XX;
2444 rsp_length = RESPONSE_ENTRY_CNT_2300;
2445 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2446 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2447 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2448 ha->gid_list_info_size = 8;
2449 ha->optrom_size = OPTROM_SIZE_25XX;
2450 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2451 ha->isp_ops = &qla25xx_isp_ops;
2452 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2453 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2454 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2455 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2456 } else if (IS_QLA81XX(ha)) {
2457 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2458 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2459 req_length = REQUEST_ENTRY_CNT_24XX;
2460 rsp_length = RESPONSE_ENTRY_CNT_2300;
2461 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2462 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2463 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2464 ha->gid_list_info_size = 8;
2465 ha->optrom_size = OPTROM_SIZE_81XX;
2466 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2467 ha->isp_ops = &qla81xx_isp_ops;
2468 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2469 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2470 ha->nvram_conf_off = ~0;
2471 ha->nvram_data_off = ~0;
2472 } else if (IS_QLA82XX(ha)) {
2473 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2474 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2475 req_length = REQUEST_ENTRY_CNT_82XX;
2476 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2477 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2478 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2479 ha->gid_list_info_size = 8;
2480 ha->optrom_size = OPTROM_SIZE_82XX;
2481 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2482 ha->isp_ops = &qla82xx_isp_ops;
2483 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2484 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2485 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2486 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2487 } else if (IS_QLA83XX(ha)) {
2488 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2489 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2490 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2491 req_length = REQUEST_ENTRY_CNT_24XX;
2492 rsp_length = RESPONSE_ENTRY_CNT_2300;
2493 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2494 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2495 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2496 ha->gid_list_info_size = 8;
2497 ha->optrom_size = OPTROM_SIZE_83XX;
2498 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2499 ha->isp_ops = &qla83xx_isp_ops;
2500 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2501 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2502 ha->nvram_conf_off = ~0;
2503 ha->nvram_data_off = ~0;
2504 } else if (IS_QLAFX00(ha)) {
2505 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2506 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2507 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2508 req_length = REQUEST_ENTRY_CNT_FX00;
2509 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2510 ha->init_cb_size = sizeof(struct init_cb_fx);
2511 ha->isp_ops = &qlafx00_isp_ops;
2512 ha->port_down_retry_count = 30; /* default value */
2513 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2514 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2515 ha->mr.fw_hbt_en = 1;
2518 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2519 "mbx_count=%d, req_length=%d, "
2520 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2521 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2522 "max_fibre_devices=%d.\n",
2523 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2524 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2525 ha->nvram_npiv_size, ha->max_fibre_devices);
2526 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2527 "isp_ops=%p, flash_conf_off=%d, "
2528 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2529 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2530 ha->nvram_conf_off, ha->nvram_data_off);
2532 /* Configure PCI I/O space */
2533 ret = ha->isp_ops->iospace_config(ha);
2535 goto iospace_config_failed;
2537 ql_log_pci(ql_log_info, pdev, 0x001d,
2538 "Found an ISP%04X irq %d iobase 0x%p.\n",
2539 pdev->device, pdev->irq, ha->iobase);
2540 mutex_init(&ha->vport_lock);
2541 init_completion(&ha->mbx_cmd_comp);
2542 complete(&ha->mbx_cmd_comp);
2543 init_completion(&ha->mbx_intr_comp);
2544 init_completion(&ha->dcbx_comp);
2545 init_completion(&ha->lb_portup_comp);
2547 set_bit(0, (unsigned long *) ha->vp_idx_map);
2549 qla2x00_config_dma_addressing(ha);
2550 ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2551 "64 Bit addressing is %s.\n",
2552 ha->flags.enable_64bit_addressing ? "enable" :
2554 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2556 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2557 "Failed to allocate memory for adapter, aborting.\n");
2559 goto probe_hw_failed;
2562 req->max_q_depth = MAX_Q_DEPTH;
2563 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2564 req->max_q_depth = ql2xmaxqdepth;
2567 base_vha = qla2x00_create_host(sht, ha);
2570 qla2x00_mem_free(ha);
2571 qla2x00_free_req_que(ha, req);
2572 qla2x00_free_rsp_que(ha, rsp);
2573 goto probe_hw_failed;
2576 pci_set_drvdata(pdev, base_vha);
2578 host = base_vha->host;
2579 base_vha->req = req;
2581 host->can_queue = 1024;
2583 host->can_queue = req->length + 128;
2584 if (IS_QLA2XXX_MIDTYPE(ha))
2585 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2587 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2590 /* Setup fcport template structure. */
2591 ha->mr.fcport.vha = base_vha;
2592 ha->mr.fcport.port_type = FCT_UNKNOWN;
2593 ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2594 qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2595 ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2596 ha->mr.fcport.scan_state = 1;
2598 /* Set the SG table size based on ISP type */
2599 if (!IS_FWI2_CAPABLE(ha)) {
2601 host->sg_tablesize = 32;
2603 if (!IS_QLA82XX(ha))
2604 host->sg_tablesize = QLA_SG_ALL;
2606 ql_dbg(ql_dbg_init, base_vha, 0x0032,
2607 "can_queue=%d, req=%p, "
2608 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2609 host->can_queue, base_vha->req,
2610 base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2611 host->max_id = ha->max_fibre_devices;
2612 host->cmd_per_lun = 3;
2613 host->unique_id = host->host_no;
2614 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2615 host->max_cmd_len = 32;
2617 host->max_cmd_len = MAX_CMDSZ;
2618 host->max_channel = MAX_BUSES - 1;
2619 host->max_lun = ql2xmaxlun;
2620 host->transportt = qla2xxx_transport_template;
2621 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2623 ql_dbg(ql_dbg_init, base_vha, 0x0033,
2624 "max_id=%d this_id=%d "
2625 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2626 "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2627 host->this_id, host->cmd_per_lun, host->unique_id,
2628 host->max_cmd_len, host->max_channel, host->max_lun,
2629 host->transportt, sht->vendor_id);
2632 /* Alloc arrays of request and response ring ptrs */
2633 if (!qla2x00_alloc_queues(ha, req, rsp)) {
2634 ql_log(ql_log_fatal, base_vha, 0x003d,
2635 "Failed to allocate memory for queue pointers..."
2637 goto probe_init_failed;
2640 qlt_probe_one_stage1(base_vha, ha);
2642 /* Set up the irqs */
2643 ret = qla2x00_request_irqs(ha, rsp);
2645 goto probe_init_failed;
2647 pci_save_state(pdev);
2649 /* Assign back pointers */
2653 if (IS_QLAFX00(ha)) {
2654 ha->rsp_q_map[0] = rsp;
2655 ha->req_q_map[0] = req;
2656 set_bit(0, ha->req_qid_map);
2657 set_bit(0, ha->rsp_qid_map);
2660 /* FWI2-capable only. */
2661 req->req_q_in = &ha->iobase->isp24.req_q_in;
2662 req->req_q_out = &ha->iobase->isp24.req_q_out;
2663 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2664 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2665 if (ha->mqenable || IS_QLA83XX(ha)) {
2666 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2667 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2668 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2669 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
2672 if (IS_QLAFX00(ha)) {
2673 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2674 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2675 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2676 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2679 if (IS_QLA82XX(ha)) {
2680 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2681 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2682 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2685 ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2686 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2687 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2688 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2689 "req->req_q_in=%p req->req_q_out=%p "
2690 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2691 req->req_q_in, req->req_q_out,
2692 rsp->rsp_q_in, rsp->rsp_q_out);
2693 ql_dbg(ql_dbg_init, base_vha, 0x003e,
2694 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2695 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2696 ql_dbg(ql_dbg_init, base_vha, 0x003f,
2697 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2698 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2700 if (ha->isp_ops->initialize_adapter(base_vha)) {
2701 ql_log(ql_log_fatal, base_vha, 0x00d6,
2702 "Failed to initialize adapter - Adapter flags %x.\n",
2703 base_vha->device_flags);
2705 if (IS_QLA82XX(ha)) {
2706 qla82xx_idc_lock(ha);
2707 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2708 QLA8XXX_DEV_FAILED);
2709 qla82xx_idc_unlock(ha);
2710 ql_log(ql_log_fatal, base_vha, 0x00d7,
2711 "HW State: FAILED.\n");
2719 if (qla25xx_setup_mode(base_vha)) {
2720 ql_log(ql_log_warn, base_vha, 0x00ec,
2721 "Failed to create queues, falling back to single queue mode.\n");
2726 if (ha->flags.running_gold_fw)
2730 * Startup the kernel thread for this host adapter
2732 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2733 "%s_dpc", base_vha->host_str);
2734 if (IS_ERR(ha->dpc_thread)) {
2735 ql_log(ql_log_fatal, base_vha, 0x00ed,
2736 "Failed to start DPC thread.\n");
2737 ret = PTR_ERR(ha->dpc_thread);
2740 ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2741 "DPC thread started successfully.\n");
2744 * If we're not coming up in initiator mode, we might sit for
2745 * a while without waking up the dpc thread, which leads to a
2746 * stuck process warning. So just kick the dpc once here and
2747 * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2749 qla2xxx_wake_dpc(base_vha);
2751 if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2752 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2753 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2754 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2756 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2757 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2758 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2759 INIT_WORK(&ha->idc_state_handler,
2760 qla83xx_idc_state_handler_work);
2761 INIT_WORK(&ha->nic_core_unrecoverable,
2762 qla83xx_nic_core_unrecoverable_work);
2766 list_add_tail(&base_vha->list, &ha->vp_list);
2767 base_vha->host->irq = ha->pdev->irq;
2769 /* Initialized the timer */
2770 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2771 ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2772 "Started qla2x00_timer with "
2773 "interval=%d.\n", WATCH_INTERVAL);
2774 ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2775 "Detected hba at address=%p.\n",
2778 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2779 if (ha->fw_attributes & BIT_4) {
2780 int prot = 0, guard;
2781 base_vha->flags.difdix_supported = 1;
2782 ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2783 "Registering for DIF/DIX type 1 and 3 protection.\n");
2784 if (ql2xenabledif == 1)
2785 prot = SHOST_DIX_TYPE0_PROTECTION;
2786 scsi_host_set_prot(host,
2787 prot | SHOST_DIF_TYPE1_PROTECTION
2788 | SHOST_DIF_TYPE2_PROTECTION
2789 | SHOST_DIF_TYPE3_PROTECTION
2790 | SHOST_DIX_TYPE1_PROTECTION
2791 | SHOST_DIX_TYPE2_PROTECTION
2792 | SHOST_DIX_TYPE3_PROTECTION);
2794 guard = SHOST_DIX_GUARD_CRC;
2796 if (IS_PI_IPGUARD_CAPABLE(ha) &&
2797 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2798 guard |= SHOST_DIX_GUARD_IP;
2800 scsi_host_set_guard(host, guard);
2802 base_vha->flags.difdix_supported = 0;
2805 ha->isp_ops->enable_intrs(ha);
2807 ret = scsi_add_host(host, &pdev->dev);
2811 base_vha->flags.init_done = 1;
2812 base_vha->flags.online = 1;
2814 ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2815 "Init done and hba is online.\n");
2817 if (qla_ini_mode_enabled(base_vha))
2818 scsi_scan_host(host);
2820 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2821 "skipping scsi_scan_host() for non-initiator port\n");
2823 qla2x00_alloc_sysfs_attr(base_vha);
2825 if (IS_QLAFX00(ha)) {
2826 ret = qlafx00_fx_disc(base_vha,
2827 &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2829 ret = qlafx00_fx_disc(base_vha,
2830 &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2832 /* Register system information */
2833 ret = qlafx00_fx_disc(base_vha,
2834 &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2837 qla2x00_init_host_attr(base_vha);
2839 qla2x00_dfs_setup(base_vha);
2841 ql_log(ql_log_info, base_vha, 0x00fb,
2842 "QLogic %s - %s.\n",
2843 ha->model_number, ha->model_desc ? ha->model_desc : "");
2844 ql_log(ql_log_info, base_vha, 0x00fc,
2845 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2846 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2847 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2849 ha->isp_ops->fw_version_str(base_vha, fw_str));
2851 qlt_add_target(ha, base_vha);
2856 qla2x00_free_req_que(ha, req);
2857 ha->req_q_map[0] = NULL;
2858 clear_bit(0, ha->req_qid_map);
2859 qla2x00_free_rsp_que(ha, rsp);
2860 ha->rsp_q_map[0] = NULL;
2861 clear_bit(0, ha->rsp_qid_map);
2862 ha->max_req_queues = ha->max_rsp_queues = 0;
2865 if (base_vha->timer_active)
2866 qla2x00_stop_timer(base_vha);
2867 base_vha->flags.online = 0;
2868 if (ha->dpc_thread) {
2869 struct task_struct *t = ha->dpc_thread;
2871 ha->dpc_thread = NULL;
2875 qla2x00_free_device(base_vha);
2877 scsi_host_put(base_vha->host);
2880 if (IS_QLA82XX(ha)) {
2881 qla82xx_idc_lock(ha);
2882 qla82xx_clear_drv_active(ha);
2883 qla82xx_idc_unlock(ha);
2885 iospace_config_failed:
2886 if (IS_QLA82XX(ha)) {
2887 if (!ha->nx_pcibase)
2888 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2890 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2893 iounmap(ha->iobase);
2895 iounmap(ha->cregbase);
2897 pci_release_selected_regions(ha->pdev, ha->bars);
2902 pci_disable_device(pdev);
2907 qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
2909 struct qla_hw_data *ha = vha->hw;
2910 struct task_struct *t = ha->dpc_thread;
2912 if (ha->dpc_thread == NULL)
2915 * qla2xxx_wake_dpc checks for ->dpc_thread
2916 * so we need to zero it out.
2918 ha->dpc_thread = NULL;
2923 qla2x00_shutdown(struct pci_dev *pdev)
2925 scsi_qla_host_t *vha;
2926 struct qla_hw_data *ha;
2928 if (!atomic_read(&pdev->enable_cnt))
2931 vha = pci_get_drvdata(pdev);
2934 /* Turn-off FCE trace */
2935 if (ha->flags.fce_enabled) {
2936 qla2x00_disable_fce_trace(vha, NULL, NULL);
2937 ha->flags.fce_enabled = 0;
2940 /* Turn-off EFT trace */
2942 qla2x00_disable_eft_trace(vha);
2944 /* Stop currently executing firmware. */
2945 qla2x00_try_to_stop_firmware(vha);
2947 /* Turn adapter off line */
2948 vha->flags.online = 0;
2950 /* turn-off interrupts on the card */
2951 if (ha->interrupts_on) {
2952 vha->flags.init_done = 0;
2953 ha->isp_ops->disable_intrs(ha);
2956 qla2x00_free_irqs(vha);
2958 qla2x00_free_fw_dump(ha);
2962 qla2x00_remove_one(struct pci_dev *pdev)
2964 scsi_qla_host_t *base_vha, *vha;
2965 struct qla_hw_data *ha;
2966 unsigned long flags;
2969 * If the PCI device is disabled that means that probe failed and any
2970 * resources should be have cleaned up on probe exit.
2972 if (!atomic_read(&pdev->enable_cnt))
2975 base_vha = pci_get_drvdata(pdev);
2978 ha->flags.host_shutting_down = 1;
2980 set_bit(UNLOADING, &base_vha->dpc_flags);
2981 mutex_lock(&ha->vport_lock);
2982 while (ha->cur_vport_count) {
2983 struct Scsi_Host *scsi_host;
2985 spin_lock_irqsave(&ha->vport_slock, flags);
2987 BUG_ON(base_vha->list.next == &ha->vp_list);
2988 /* This assumes first entry in ha->vp_list is always base vha */
2989 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2990 scsi_host = scsi_host_get(vha->host);
2992 spin_unlock_irqrestore(&ha->vport_slock, flags);
2993 mutex_unlock(&ha->vport_lock);
2995 fc_vport_terminate(vha->fc_vport);
2996 scsi_host_put(vha->host);
2998 mutex_lock(&ha->vport_lock);
3000 mutex_unlock(&ha->vport_lock);
3002 if (IS_QLA8031(ha)) {
3003 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3004 "Clearing fcoe driver presence.\n");
3005 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3006 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3007 "Error while clearing DRV-Presence.\n");
3010 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3012 qla2x00_dfs_remove(base_vha);
3014 qla84xx_put_chip(base_vha);
3017 if (base_vha->timer_active)
3018 qla2x00_stop_timer(base_vha);
3020 base_vha->flags.online = 0;
3022 /* Flush the work queue and remove it */
3024 flush_workqueue(ha->wq);
3025 destroy_workqueue(ha->wq);
3029 /* Cancel all work and destroy DPC workqueues */
3030 if (ha->dpc_lp_wq) {
3031 cancel_work_sync(&ha->idc_aen);
3032 destroy_workqueue(ha->dpc_lp_wq);
3033 ha->dpc_lp_wq = NULL;
3036 if (ha->dpc_hp_wq) {
3037 cancel_work_sync(&ha->nic_core_reset);
3038 cancel_work_sync(&ha->idc_state_handler);
3039 cancel_work_sync(&ha->nic_core_unrecoverable);
3040 destroy_workqueue(ha->dpc_hp_wq);
3041 ha->dpc_hp_wq = NULL;
3044 /* Kill the kernel thread for this host */
3045 if (ha->dpc_thread) {
3046 struct task_struct *t = ha->dpc_thread;
3049 * qla2xxx_wake_dpc checks for ->dpc_thread
3050 * so we need to zero it out.
3052 ha->dpc_thread = NULL;
3055 qlt_remove_target(ha, base_vha);
3057 qla2x00_free_sysfs_attr(base_vha);
3059 fc_remove_host(base_vha->host);
3061 scsi_remove_host(base_vha->host);
3063 qla2x00_free_device(base_vha);
3065 scsi_host_put(base_vha->host);
3067 if (IS_QLA82XX(ha)) {
3068 qla82xx_idc_lock(ha);
3069 qla82xx_clear_drv_active(ha);
3070 qla82xx_idc_unlock(ha);
3072 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
3074 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
3077 iounmap(ha->iobase);
3080 iounmap(ha->cregbase);
3083 iounmap(ha->mqiobase);
3085 if (IS_QLA83XX(ha) && ha->msixbase)
3086 iounmap(ha->msixbase);
3089 pci_release_selected_regions(ha->pdev, ha->bars);
3093 pci_disable_pcie_error_reporting(pdev);
3095 pci_disable_device(pdev);
3096 pci_set_drvdata(pdev, NULL);
3100 qla2x00_free_device(scsi_qla_host_t *vha)
3102 struct qla_hw_data *ha = vha->hw;
3104 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3107 if (vha->timer_active)
3108 qla2x00_stop_timer(vha);
3110 qla2x00_stop_dpc_thread(vha);
3112 qla25xx_delete_queues(vha);
3113 if (ha->flags.fce_enabled)
3114 qla2x00_disable_fce_trace(vha, NULL, NULL);
3117 qla2x00_disable_eft_trace(vha);
3119 /* Stop currently executing firmware. */
3120 qla2x00_try_to_stop_firmware(vha);
3122 vha->flags.online = 0;
3124 /* turn-off interrupts on the card */
3125 if (ha->interrupts_on) {
3126 vha->flags.init_done = 0;
3127 ha->isp_ops->disable_intrs(ha);
3130 qla2x00_free_irqs(vha);
3132 qla2x00_free_fcports(vha);
3134 qla2x00_mem_free(ha);
3136 qla82xx_md_free(vha);
3138 qla2x00_free_queues(ha);
3141 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3143 fc_port_t *fcport, *tfcport;
3145 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3146 list_del(&fcport->list);
3147 qla2x00_clear_loop_id(fcport);
3154 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3157 struct fc_rport *rport;
3158 scsi_qla_host_t *base_vha;
3159 unsigned long flags;
3164 rport = fcport->rport;
3166 base_vha = pci_get_drvdata(vha->hw->pdev);
3167 spin_lock_irqsave(vha->host->host_lock, flags);
3168 fcport->drport = rport;
3169 spin_unlock_irqrestore(vha->host->host_lock, flags);
3170 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3171 qla2xxx_wake_dpc(base_vha);
3173 fc_remote_port_delete(rport);
3174 qlt_fc_port_deleted(vha, fcport);
3179 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3181 * Input: ha = adapter block pointer. fcport = port structure pointer.
3187 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3188 int do_login, int defer)
3190 if (IS_QLAFX00(vha->hw)) {
3191 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3192 qla2x00_schedule_rport_del(vha, fcport, defer);
3196 if (atomic_read(&fcport->state) == FCS_ONLINE &&
3197 vha->vp_idx == fcport->vha->vp_idx) {
3198 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3199 qla2x00_schedule_rport_del(vha, fcport, defer);
3202 * We may need to retry the login, so don't change the state of the
3203 * port but do the retries.
3205 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3206 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3211 if (fcport->login_retry == 0) {
3212 fcport->login_retry = vha->hw->login_retry_count;
3213 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3215 ql_dbg(ql_dbg_disc, vha, 0x2067,
3217 "%02x%02x%02x%02x%02x%02x%02x%02x, "
3218 "id = 0x%04x retry cnt=%d.\n",
3219 fcport->port_name[0], fcport->port_name[1],
3220 fcport->port_name[2], fcport->port_name[3],
3221 fcport->port_name[4], fcport->port_name[5],
3222 fcport->port_name[6], fcport->port_name[7],
3223 fcport->loop_id, fcport->login_retry);
3228 * qla2x00_mark_all_devices_lost
3229 * Updates fcport state when device goes offline.
3232 * ha = adapter block pointer.
3233 * fcport = port structure pointer.
3241 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3245 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3246 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3250 * No point in marking the device as lost, if the device is
3253 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3255 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3256 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3258 qla2x00_schedule_rport_del(vha, fcport, defer);
3259 else if (vha->vp_idx == fcport->vha->vp_idx)
3260 qla2x00_schedule_rport_del(vha, fcport, defer);
3267 * Allocates adapter memory.
3274 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3275 struct req_que **req, struct rsp_que **rsp)
3279 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3280 &ha->init_cb_dma, GFP_KERNEL);
3284 if (qlt_mem_alloc(ha) < 0)
3285 goto fail_free_init_cb;
3287 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3288 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3290 goto fail_free_tgt_mem;
3292 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3293 if (!ha->srb_mempool)
3294 goto fail_free_gid_list;
3296 if (IS_QLA82XX(ha)) {
3297 /* Allocate cache for CT6 Ctx. */
3299 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3300 sizeof(struct ct6_dsd), 0,
3301 SLAB_HWCACHE_ALIGN, NULL);
3303 goto fail_free_gid_list;
3305 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3307 if (!ha->ctx_mempool)
3308 goto fail_free_srb_mempool;
3309 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3310 "ctx_cachep=%p ctx_mempool=%p.\n",
3311 ctx_cachep, ha->ctx_mempool);
3314 /* Get memory for cached NVRAM */
3315 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3317 goto fail_free_ctx_mempool;
3319 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3321 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3322 DMA_POOL_SIZE, 8, 0);
3323 if (!ha->s_dma_pool)
3324 goto fail_free_nvram;
3326 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3327 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3328 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3330 if (IS_QLA82XX(ha) || ql2xenabledif) {
3331 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3332 DSD_LIST_DMA_POOL_SIZE, 8, 0);
3333 if (!ha->dl_dma_pool) {
3334 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3335 "Failed to allocate memory for dl_dma_pool.\n");
3336 goto fail_s_dma_pool;
3339 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3340 FCP_CMND_DMA_POOL_SIZE, 8, 0);
3341 if (!ha->fcp_cmnd_dma_pool) {
3342 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3343 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3344 goto fail_dl_dma_pool;
3346 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3347 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3348 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3351 /* Allocate memory for SNS commands */
3352 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3353 /* Get consistent memory allocated for SNS commands */
3354 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3355 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3358 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3359 "sns_cmd: %p.\n", ha->sns_cmd);
3361 /* Get consistent memory allocated for MS IOCB */
3362 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3366 /* Get consistent memory allocated for CT SNS commands */
3367 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3368 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3370 goto fail_free_ms_iocb;
3371 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3372 "ms_iocb=%p ct_sns=%p.\n",
3373 ha->ms_iocb, ha->ct_sns);
3376 /* Allocate memory for request ring */
3377 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3379 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3380 "Failed to allocate memory for req.\n");
3383 (*req)->length = req_len;
3384 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3385 ((*req)->length + 1) * sizeof(request_t),
3386 &(*req)->dma, GFP_KERNEL);
3387 if (!(*req)->ring) {
3388 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3389 "Failed to allocate memory for req_ring.\n");
3392 /* Allocate memory for response ring */
3393 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3395 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3396 "Failed to allocate memory for rsp.\n");
3400 (*rsp)->length = rsp_len;
3401 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3402 ((*rsp)->length + 1) * sizeof(response_t),
3403 &(*rsp)->dma, GFP_KERNEL);
3404 if (!(*rsp)->ring) {
3405 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3406 "Failed to allocate memory for rsp_ring.\n");
3411 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3412 "req=%p req->length=%d req->ring=%p rsp=%p "
3413 "rsp->length=%d rsp->ring=%p.\n",
3414 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3416 /* Allocate memory for NVRAM data for vports */
3417 if (ha->nvram_npiv_size) {
3418 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3419 ha->nvram_npiv_size, GFP_KERNEL);
3420 if (!ha->npiv_info) {
3421 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3422 "Failed to allocate memory for npiv_info.\n");
3423 goto fail_npiv_info;
3426 ha->npiv_info = NULL;
3428 /* Get consistent memory allocated for EX-INIT-CB. */
3429 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3430 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3431 &ha->ex_init_cb_dma);
3432 if (!ha->ex_init_cb)
3433 goto fail_ex_init_cb;
3434 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3435 "ex_init_cb=%p.\n", ha->ex_init_cb);
3438 INIT_LIST_HEAD(&ha->gbl_dsd_list);
3440 /* Get consistent memory allocated for Async Port-Database. */
3441 if (!IS_FWI2_CAPABLE(ha)) {
3442 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3446 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3447 "async_pd=%p.\n", ha->async_pd);
3450 INIT_LIST_HEAD(&ha->vp_list);
3452 /* Allocate memory for our loop_id bitmap */
3453 ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3455 if (!ha->loop_id_map)
3458 qla2x00_set_reserved_loop_ids(ha);
3459 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3460 "loop_id_map=%p. \n", ha->loop_id_map);
3466 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3468 kfree(ha->npiv_info);
3470 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3471 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3472 (*rsp)->ring = NULL;
3477 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3478 sizeof(request_t), (*req)->ring, (*req)->dma);
3479 (*req)->ring = NULL;
3484 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3485 ha->ct_sns, ha->ct_sns_dma);
3489 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3491 ha->ms_iocb_dma = 0;
3493 if (IS_QLA82XX(ha) || ql2xenabledif) {
3494 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3495 ha->fcp_cmnd_dma_pool = NULL;
3498 if (IS_QLA82XX(ha) || ql2xenabledif) {
3499 dma_pool_destroy(ha->dl_dma_pool);
3500 ha->dl_dma_pool = NULL;
3503 dma_pool_destroy(ha->s_dma_pool);
3504 ha->s_dma_pool = NULL;
3508 fail_free_ctx_mempool:
3509 mempool_destroy(ha->ctx_mempool);
3510 ha->ctx_mempool = NULL;
3511 fail_free_srb_mempool:
3512 mempool_destroy(ha->srb_mempool);
3513 ha->srb_mempool = NULL;
3515 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3518 ha->gid_list = NULL;
3519 ha->gid_list_dma = 0;
3523 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3526 ha->init_cb_dma = 0;
3528 ql_log(ql_log_fatal, NULL, 0x0030,
3529 "Memory allocation failure.\n");
3534 * qla2x00_free_fw_dump
3535 * Frees fw dump stuff.
3538 * ha = adapter block pointer.
3541 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3544 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3549 dma_free_coherent(&ha->pdev->dev,
3550 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3559 ha->fw_dump_reading = 0;
3564 * Frees all adapter allocated memory.
3567 * ha = adapter block pointer.
3570 qla2x00_mem_free(struct qla_hw_data *ha)
3572 qla2x00_free_fw_dump(ha);
3575 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3578 if (ha->srb_mempool)
3579 mempool_destroy(ha->srb_mempool);
3582 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3583 ha->dcbx_tlv, ha->dcbx_tlv_dma);
3586 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3587 ha->xgmac_data, ha->xgmac_data_dma);
3590 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3591 ha->sns_cmd, ha->sns_cmd_dma);
3594 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3595 ha->ct_sns, ha->ct_sns_dma);
3598 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3601 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3604 dma_pool_free(ha->s_dma_pool,
3605 ha->ex_init_cb, ha->ex_init_cb_dma);
3608 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3611 dma_pool_destroy(ha->s_dma_pool);
3614 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3615 ha->gid_list, ha->gid_list_dma);
3617 if (IS_QLA82XX(ha)) {
3618 if (!list_empty(&ha->gbl_dsd_list)) {
3619 struct dsd_dma *dsd_ptr, *tdsd_ptr;
3621 /* clean up allocated prev pool */
3622 list_for_each_entry_safe(dsd_ptr,
3623 tdsd_ptr, &ha->gbl_dsd_list, list) {
3624 dma_pool_free(ha->dl_dma_pool,
3625 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3626 list_del(&dsd_ptr->list);
3632 if (ha->dl_dma_pool)
3633 dma_pool_destroy(ha->dl_dma_pool);
3635 if (ha->fcp_cmnd_dma_pool)
3636 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3638 if (ha->ctx_mempool)
3639 mempool_destroy(ha->ctx_mempool);
3644 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3645 ha->init_cb, ha->init_cb_dma);
3646 vfree(ha->optrom_buffer);
3648 kfree(ha->npiv_info);
3650 kfree(ha->loop_id_map);
3652 ha->srb_mempool = NULL;
3653 ha->ctx_mempool = NULL;
3655 ha->sns_cmd_dma = 0;
3659 ha->ms_iocb_dma = 0;
3661 ha->init_cb_dma = 0;
3662 ha->ex_init_cb = NULL;
3663 ha->ex_init_cb_dma = 0;
3664 ha->async_pd = NULL;
3665 ha->async_pd_dma = 0;
3667 ha->s_dma_pool = NULL;
3668 ha->dl_dma_pool = NULL;
3669 ha->fcp_cmnd_dma_pool = NULL;
3671 ha->gid_list = NULL;
3672 ha->gid_list_dma = 0;
3674 ha->tgt.atio_ring = NULL;
3675 ha->tgt.atio_dma = 0;
3676 ha->tgt.tgt_vp_map = NULL;
3679 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3680 struct qla_hw_data *ha)
3682 struct Scsi_Host *host;
3683 struct scsi_qla_host *vha = NULL;
3685 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3687 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3688 "Failed to allocate host from the scsi layer, aborting.\n");
3692 /* Clear our data area */
3693 vha = shost_priv(host);
3694 memset(vha, 0, sizeof(scsi_qla_host_t));
3697 vha->host_no = host->host_no;
3700 INIT_LIST_HEAD(&vha->vp_fcports);
3701 INIT_LIST_HEAD(&vha->work_list);
3702 INIT_LIST_HEAD(&vha->list);
3704 spin_lock_init(&vha->work_lock);
3706 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3707 ql_dbg(ql_dbg_init, vha, 0x0041,
3708 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3709 vha->host, vha->hw, vha,
3710 dev_name(&(ha->pdev->dev)));
3718 static struct qla_work_evt *
3719 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3721 struct qla_work_evt *e;
3724 QLA_VHA_MARK_BUSY(vha, bail);
3728 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3730 QLA_VHA_MARK_NOT_BUSY(vha);
3734 INIT_LIST_HEAD(&e->list);
3736 e->flags = QLA_EVT_FLAG_FREE;
3741 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3743 unsigned long flags;
3745 spin_lock_irqsave(&vha->work_lock, flags);
3746 list_add_tail(&e->list, &vha->work_list);
3747 spin_unlock_irqrestore(&vha->work_lock, flags);
3748 qla2xxx_wake_dpc(vha);
3754 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3757 struct qla_work_evt *e;
3759 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3761 return QLA_FUNCTION_FAILED;
3763 e->u.aen.code = code;
3764 e->u.aen.data = data;
3765 return qla2x00_post_work(vha, e);
3769 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3771 struct qla_work_evt *e;
3773 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3775 return QLA_FUNCTION_FAILED;
3777 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3778 return qla2x00_post_work(vha, e);
3781 #define qla2x00_post_async_work(name, type) \
3782 int qla2x00_post_async_##name##_work( \
3783 struct scsi_qla_host *vha, \
3784 fc_port_t *fcport, uint16_t *data) \
3786 struct qla_work_evt *e; \
3788 e = qla2x00_alloc_work(vha, type); \
3790 return QLA_FUNCTION_FAILED; \
3792 e->u.logio.fcport = fcport; \
3794 e->u.logio.data[0] = data[0]; \
3795 e->u.logio.data[1] = data[1]; \
3797 return qla2x00_post_work(vha, e); \
3800 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3801 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3802 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3803 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3804 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3805 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3808 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3810 struct qla_work_evt *e;
3812 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3814 return QLA_FUNCTION_FAILED;
3816 e->u.uevent.code = code;
3817 return qla2x00_post_work(vha, e);
3821 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3823 char event_string[40];
3824 char *envp[] = { event_string, NULL };
3827 case QLA_UEVENT_CODE_FW_DUMP:
3828 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3835 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3839 qlafx00_post_aenfx_work(struct scsi_qla_host *vha, uint32_t evtcode,
3840 uint32_t *data, int cnt)
3842 struct qla_work_evt *e;
3844 e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3846 return QLA_FUNCTION_FAILED;
3848 e->u.aenfx.evtcode = evtcode;
3849 e->u.aenfx.count = cnt;
3850 memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3851 return qla2x00_post_work(vha, e);
3855 qla2x00_do_work(struct scsi_qla_host *vha)
3857 struct qla_work_evt *e, *tmp;
3858 unsigned long flags;
3861 spin_lock_irqsave(&vha->work_lock, flags);
3862 list_splice_init(&vha->work_list, &work);
3863 spin_unlock_irqrestore(&vha->work_lock, flags);
3865 list_for_each_entry_safe(e, tmp, &work, list) {
3866 list_del_init(&e->list);
3870 fc_host_post_event(vha->host, fc_get_event_number(),
3871 e->u.aen.code, e->u.aen.data);
3873 case QLA_EVT_IDC_ACK:
3874 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3876 case QLA_EVT_ASYNC_LOGIN:
3877 qla2x00_async_login(vha, e->u.logio.fcport,
3880 case QLA_EVT_ASYNC_LOGIN_DONE:
3881 qla2x00_async_login_done(vha, e->u.logio.fcport,
3884 case QLA_EVT_ASYNC_LOGOUT:
3885 qla2x00_async_logout(vha, e->u.logio.fcport);
3887 case QLA_EVT_ASYNC_LOGOUT_DONE:
3888 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3891 case QLA_EVT_ASYNC_ADISC:
3892 qla2x00_async_adisc(vha, e->u.logio.fcport,
3895 case QLA_EVT_ASYNC_ADISC_DONE:
3896 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3899 case QLA_EVT_UEVENT:
3900 qla2x00_uevent_emit(vha, e->u.uevent.code);
3903 qlafx00_process_aen(vha, e);
3906 if (e->flags & QLA_EVT_FLAG_FREE)
3909 /* For each work completed decrement vha ref count */
3910 QLA_VHA_MARK_NOT_BUSY(vha);
3914 /* Relogins all the fcports of a vport
3915 * Context: dpc thread
3917 void qla2x00_relogin(struct scsi_qla_host *vha)
3921 uint16_t next_loopid = 0;
3922 struct qla_hw_data *ha = vha->hw;
3925 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3927 * If the port is not ONLINE then try to login
3928 * to it if we haven't run out of retries.
3930 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3931 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3932 fcport->login_retry--;
3933 if (fcport->flags & FCF_FABRIC_DEVICE) {
3934 if (fcport->flags & FCF_FCP2_DEVICE)
3935 ha->isp_ops->fabric_logout(vha,
3937 fcport->d_id.b.domain,
3938 fcport->d_id.b.area,
3939 fcport->d_id.b.al_pa);
3941 if (fcport->loop_id == FC_NO_LOOP_ID) {
3942 fcport->loop_id = next_loopid =
3943 ha->min_external_loopid;
3944 status = qla2x00_find_new_loop_id(
3946 if (status != QLA_SUCCESS) {
3947 /* Ran out of IDs to use */
3952 if (IS_ALOGIO_CAPABLE(ha)) {
3953 fcport->flags |= FCF_ASYNC_SENT;
3955 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3956 status = qla2x00_post_async_login_work(
3958 if (status == QLA_SUCCESS)
3960 /* Attempt a retry. */
3963 status = qla2x00_fabric_login(vha,
3964 fcport, &next_loopid);
3965 if (status == QLA_SUCCESS) {
3974 qla2x00_get_port_database(
3976 if (status2 != QLA_SUCCESS)
3981 status = qla2x00_local_device_login(vha,
3984 if (status == QLA_SUCCESS) {
3985 fcport->old_loop_id = fcport->loop_id;
3987 ql_dbg(ql_dbg_disc, vha, 0x2003,
3988 "Port login OK: logged in ID 0x%x.\n",
3991 qla2x00_update_fcport(vha, fcport);
3993 } else if (status == 1) {
3994 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3995 /* retry the login again */
3996 ql_dbg(ql_dbg_disc, vha, 0x2007,
3997 "Retrying %d login again loop_id 0x%x.\n",
3998 fcport->login_retry, fcport->loop_id);
4000 fcport->login_retry = 0;
4003 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4004 qla2x00_clear_loop_id(fcport);
4006 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4011 /* Schedule work on any of the dpc-workqueues */
4013 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4015 struct qla_hw_data *ha = base_vha->hw;
4017 switch (work_code) {
4018 case MBA_IDC_AEN: /* 0x8200 */
4020 queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4023 case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4024 if (!ha->flags.nic_core_reset_hdlr_active) {
4026 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4028 ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4029 "NIC Core reset is already active. Skip "
4030 "scheduling it again.\n");
4032 case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4034 queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4036 case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4038 queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4041 ql_log(ql_log_warn, base_vha, 0xb05f,
4042 "Unknow work-code=0x%x.\n", work_code);
4048 /* Work: Perform NIC Core Unrecoverable state handling */
4050 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4052 struct qla_hw_data *ha =
4053 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4054 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4055 uint32_t dev_state = 0;
4057 qla83xx_idc_lock(base_vha, 0);
4058 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4059 qla83xx_reset_ownership(base_vha);
4060 if (ha->flags.nic_core_reset_owner) {
4061 ha->flags.nic_core_reset_owner = 0;
4062 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4063 QLA8XXX_DEV_FAILED);
4064 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4065 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4067 qla83xx_idc_unlock(base_vha, 0);
4070 /* Work: Execute IDC state handler */
4072 qla83xx_idc_state_handler_work(struct work_struct *work)
4074 struct qla_hw_data *ha =
4075 container_of(work, struct qla_hw_data, idc_state_handler);
4076 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4077 uint32_t dev_state = 0;
4079 qla83xx_idc_lock(base_vha, 0);
4080 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4081 if (dev_state == QLA8XXX_DEV_FAILED ||
4082 dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4083 qla83xx_idc_state_handler(base_vha);
4084 qla83xx_idc_unlock(base_vha, 0);
4088 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4090 int rval = QLA_SUCCESS;
4091 unsigned long heart_beat_wait = jiffies + (1 * HZ);
4092 uint32_t heart_beat_counter1, heart_beat_counter2;
4095 if (time_after(jiffies, heart_beat_wait)) {
4096 ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4097 "Nic Core f/w is not alive.\n");
4098 rval = QLA_FUNCTION_FAILED;
4102 qla83xx_idc_lock(base_vha, 0);
4103 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4104 &heart_beat_counter1);
4105 qla83xx_idc_unlock(base_vha, 0);
4107 qla83xx_idc_lock(base_vha, 0);
4108 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4109 &heart_beat_counter2);
4110 qla83xx_idc_unlock(base_vha, 0);
4111 } while (heart_beat_counter1 == heart_beat_counter2);
4116 /* Work: Perform NIC Core Reset handling */
4118 qla83xx_nic_core_reset_work(struct work_struct *work)
4120 struct qla_hw_data *ha =
4121 container_of(work, struct qla_hw_data, nic_core_reset);
4122 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4123 uint32_t dev_state = 0;
4125 if (IS_QLA2031(ha)) {
4126 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4127 ql_log(ql_log_warn, base_vha, 0xb081,
4128 "Failed to dump mctp\n");
4132 if (!ha->flags.nic_core_reset_hdlr_active) {
4133 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4134 qla83xx_idc_lock(base_vha, 0);
4135 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4137 qla83xx_idc_unlock(base_vha, 0);
4138 if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4139 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4140 "Nic Core f/w is alive.\n");
4145 ha->flags.nic_core_reset_hdlr_active = 1;
4146 if (qla83xx_nic_core_reset(base_vha)) {
4147 /* NIC Core reset failed. */
4148 ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4149 "NIC Core reset failed.\n");
4151 ha->flags.nic_core_reset_hdlr_active = 0;
4155 /* Work: Handle 8200 IDC aens */
4157 qla83xx_service_idc_aen(struct work_struct *work)
4159 struct qla_hw_data *ha =
4160 container_of(work, struct qla_hw_data, idc_aen);
4161 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4162 uint32_t dev_state, idc_control;
4164 qla83xx_idc_lock(base_vha, 0);
4165 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4166 qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4167 qla83xx_idc_unlock(base_vha, 0);
4168 if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4169 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4170 ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4171 "Application requested NIC Core Reset.\n");
4172 qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4173 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4175 ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4176 "Other protocol driver requested NIC Core Reset.\n");
4177 qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4179 } else if (dev_state == QLA8XXX_DEV_FAILED ||
4180 dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4181 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4186 qla83xx_wait_logic(void)
4191 if (!in_interrupt()) {
4193 * Wait about 200ms before retrying again.
4194 * This controls the number of retries for single
4200 for (i = 0; i < 20; i++)
4201 cpu_relax(); /* This a nop instr on i386 */
4206 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4210 uint32_t idc_lck_rcvry_stage_mask = 0x3;
4211 uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4212 struct qla_hw_data *ha = base_vha->hw;
4213 ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4214 "Trying force recovery of the IDC lock.\n");
4216 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4220 if ((data & idc_lck_rcvry_stage_mask) > 0) {
4223 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4224 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4231 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4236 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4237 data &= (IDC_LOCK_RECOVERY_STAGE2 |
4238 ~(idc_lck_rcvry_stage_mask));
4239 rval = qla83xx_wr_reg(base_vha,
4240 QLA83XX_IDC_LOCK_RECOVERY, data);
4244 /* Forcefully perform IDC UnLock */
4245 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4249 /* Clear lock-id by setting 0xff */
4250 rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4254 /* Clear lock-recovery by setting 0x0 */
4255 rval = qla83xx_wr_reg(base_vha,
4256 QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4267 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4269 int rval = QLA_SUCCESS;
4270 uint32_t o_drv_lockid, n_drv_lockid;
4271 unsigned long lock_recovery_timeout;
4273 lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4275 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4279 /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4280 if (time_after_eq(jiffies, lock_recovery_timeout)) {
4281 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4284 return QLA_FUNCTION_FAILED;
4287 rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4291 if (o_drv_lockid == n_drv_lockid) {
4292 qla83xx_wait_logic();
4302 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4304 uint16_t options = (requester_id << 15) | BIT_6;
4306 uint32_t lock_owner;
4307 struct qla_hw_data *ha = base_vha->hw;
4309 /* IDC-lock implementation using driver-lock/lock-id remote registers */
4311 if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4314 /* Setting lock-id to our function-number */
4315 qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4318 qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4320 ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4321 "Failed to acquire IDC lock, acquired by %d, "
4322 "retrying...\n", lock_owner);
4324 /* Retry/Perform IDC-Lock recovery */
4325 if (qla83xx_idc_lock_recovery(base_vha)
4327 qla83xx_wait_logic();
4330 ql_log(ql_log_warn, base_vha, 0xb075,
4331 "IDC Lock recovery FAILED.\n");
4338 /* XXX: IDC-lock implementation using access-control mbx */
4340 if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4341 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4342 "Failed to acquire IDC lock. retrying...\n");
4343 /* Retry/Perform IDC-Lock recovery */
4344 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4345 qla83xx_wait_logic();
4348 ql_log(ql_log_warn, base_vha, 0xb076,
4349 "IDC Lock recovery FAILED.\n");
4356 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4358 uint16_t options = (requester_id << 15) | BIT_7, retry;
4360 struct qla_hw_data *ha = base_vha->hw;
4362 /* IDC-unlock implementation using driver-unlock/lock-id
4367 if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4369 if (data == ha->portnum) {
4370 qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4371 /* Clearing lock-id by setting 0xff */
4372 qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4373 } else if (retry < 10) {
4374 /* SV: XXX: IDC unlock retrying needed here? */
4376 /* Retry for IDC-unlock */
4377 qla83xx_wait_logic();
4379 ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4380 "Failed to release IDC lock, retyring=%d\n", retry);
4383 } else if (retry < 10) {
4384 /* Retry for IDC-unlock */
4385 qla83xx_wait_logic();
4387 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4388 "Failed to read drv-lockid, retyring=%d\n", retry);
4394 /* XXX: IDC-unlock implementation using access-control mbx */
4397 if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4399 /* Retry for IDC-unlock */
4400 qla83xx_wait_logic();
4402 ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4403 "Failed to release IDC lock, retyring=%d\n", retry);
4412 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4414 int rval = QLA_SUCCESS;
4415 struct qla_hw_data *ha = vha->hw;
4416 uint32_t drv_presence;
4418 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4419 if (rval == QLA_SUCCESS) {
4420 drv_presence |= (1 << ha->portnum);
4421 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4429 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4431 int rval = QLA_SUCCESS;
4433 qla83xx_idc_lock(vha, 0);
4434 rval = __qla83xx_set_drv_presence(vha);
4435 qla83xx_idc_unlock(vha, 0);
4441 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4443 int rval = QLA_SUCCESS;
4444 struct qla_hw_data *ha = vha->hw;
4445 uint32_t drv_presence;
4447 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4448 if (rval == QLA_SUCCESS) {
4449 drv_presence &= ~(1 << ha->portnum);
4450 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4458 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4460 int rval = QLA_SUCCESS;
4462 qla83xx_idc_lock(vha, 0);
4463 rval = __qla83xx_clear_drv_presence(vha);
4464 qla83xx_idc_unlock(vha, 0);
4470 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4472 struct qla_hw_data *ha = vha->hw;
4473 uint32_t drv_ack, drv_presence;
4474 unsigned long ack_timeout;
4476 /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4477 ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4479 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4480 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4481 if ((drv_ack & drv_presence) == drv_presence)
4484 if (time_after_eq(jiffies, ack_timeout)) {
4485 ql_log(ql_log_warn, vha, 0xb067,
4486 "RESET ACK TIMEOUT! drv_presence=0x%x "
4487 "drv_ack=0x%x\n", drv_presence, drv_ack);
4489 * The function(s) which did not ack in time are forced
4490 * to withdraw any further participation in the IDC
4493 if (drv_ack != drv_presence)
4494 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4499 qla83xx_idc_unlock(vha, 0);
4501 qla83xx_idc_lock(vha, 0);
4504 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4505 ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4509 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4511 int rval = QLA_SUCCESS;
4512 uint32_t idc_control;
4514 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4515 ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4517 /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4518 __qla83xx_get_idc_control(vha, &idc_control);
4519 idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4520 __qla83xx_set_idc_control(vha, 0);
4522 qla83xx_idc_unlock(vha, 0);
4523 rval = qla83xx_restart_nic_firmware(vha);
4524 qla83xx_idc_lock(vha, 0);
4526 if (rval != QLA_SUCCESS) {
4527 ql_log(ql_log_fatal, vha, 0xb06a,
4528 "Failed to restart NIC f/w.\n");
4529 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4530 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4532 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4533 "Success in restarting nic f/w.\n");
4534 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4535 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4541 /* Assumes idc_lock always held on entry */
4543 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4545 struct qla_hw_data *ha = base_vha->hw;
4546 int rval = QLA_SUCCESS;
4547 unsigned long dev_init_timeout;
4550 /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4551 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4555 if (time_after_eq(jiffies, dev_init_timeout)) {
4556 ql_log(ql_log_warn, base_vha, 0xb06e,
4557 "Initialization TIMEOUT!\n");
4558 /* Init timeout. Disable further NIC Core
4561 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4562 QLA8XXX_DEV_FAILED);
4563 ql_log(ql_log_info, base_vha, 0xb06f,
4564 "HW State: FAILED.\n");
4567 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4568 switch (dev_state) {
4569 case QLA8XXX_DEV_READY:
4570 if (ha->flags.nic_core_reset_owner)
4571 qla83xx_idc_audit(base_vha,
4572 IDC_AUDIT_COMPLETION);
4573 ha->flags.nic_core_reset_owner = 0;
4574 ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4575 "Reset_owner reset by 0x%x.\n",
4578 case QLA8XXX_DEV_COLD:
4579 if (ha->flags.nic_core_reset_owner)
4580 rval = qla83xx_device_bootstrap(base_vha);
4582 /* Wait for AEN to change device-state */
4583 qla83xx_idc_unlock(base_vha, 0);
4585 qla83xx_idc_lock(base_vha, 0);
4588 case QLA8XXX_DEV_INITIALIZING:
4589 /* Wait for AEN to change device-state */
4590 qla83xx_idc_unlock(base_vha, 0);
4592 qla83xx_idc_lock(base_vha, 0);
4594 case QLA8XXX_DEV_NEED_RESET:
4595 if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4596 qla83xx_need_reset_handler(base_vha);
4598 /* Wait for AEN to change device-state */
4599 qla83xx_idc_unlock(base_vha, 0);
4601 qla83xx_idc_lock(base_vha, 0);
4603 /* reset timeout value after need reset handler */
4604 dev_init_timeout = jiffies +
4605 (ha->fcoe_dev_init_timeout * HZ);
4607 case QLA8XXX_DEV_NEED_QUIESCENT:
4608 /* XXX: DEBUG for now */
4609 qla83xx_idc_unlock(base_vha, 0);
4611 qla83xx_idc_lock(base_vha, 0);
4613 case QLA8XXX_DEV_QUIESCENT:
4614 /* XXX: DEBUG for now */
4615 if (ha->flags.quiesce_owner)
4618 qla83xx_idc_unlock(base_vha, 0);
4620 qla83xx_idc_lock(base_vha, 0);
4621 dev_init_timeout = jiffies +
4622 (ha->fcoe_dev_init_timeout * HZ);
4624 case QLA8XXX_DEV_FAILED:
4625 if (ha->flags.nic_core_reset_owner)
4626 qla83xx_idc_audit(base_vha,
4627 IDC_AUDIT_COMPLETION);
4628 ha->flags.nic_core_reset_owner = 0;
4629 __qla83xx_clear_drv_presence(base_vha);
4630 qla83xx_idc_unlock(base_vha, 0);
4631 qla8xxx_dev_failed_handler(base_vha);
4632 rval = QLA_FUNCTION_FAILED;
4633 qla83xx_idc_lock(base_vha, 0);
4635 case QLA8XXX_BAD_VALUE:
4636 qla83xx_idc_unlock(base_vha, 0);
4638 qla83xx_idc_lock(base_vha, 0);
4641 ql_log(ql_log_warn, base_vha, 0xb071,
4642 "Unknow Device State: %x.\n", dev_state);
4643 qla83xx_idc_unlock(base_vha, 0);
4644 qla8xxx_dev_failed_handler(base_vha);
4645 rval = QLA_FUNCTION_FAILED;
4646 qla83xx_idc_lock(base_vha, 0);
4655 /**************************************************************************
4657 * This kernel thread is a task that is schedule by the interrupt handler
4658 * to perform the background processing for interrupts.
4661 * This task always run in the context of a kernel thread. It
4662 * is kick-off by the driver's detect code and starts up
4663 * up one per adapter. It immediately goes to sleep and waits for
4664 * some fibre event. When either the interrupt handler or
4665 * the timer routine detects a event it will one of the task
4666 * bits then wake us up.
4667 **************************************************************************/
4669 qla2x00_do_dpc(void *data)
4672 scsi_qla_host_t *base_vha;
4673 struct qla_hw_data *ha;
4675 ha = (struct qla_hw_data *)data;
4676 base_vha = pci_get_drvdata(ha->pdev);
4678 set_user_nice(current, -20);
4680 set_current_state(TASK_INTERRUPTIBLE);
4681 while (!kthread_should_stop()) {
4682 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4683 "DPC handler sleeping.\n");
4686 __set_current_state(TASK_RUNNING);
4688 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4691 if (ha->flags.eeh_busy) {
4692 ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4693 "eeh_busy=%d.\n", ha->flags.eeh_busy);
4699 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4700 "DPC handler waking up, dpc_flags=0x%lx.\n",
4701 base_vha->dpc_flags);
4703 qla2x00_do_work(base_vha);
4705 if (IS_QLA82XX(ha)) {
4706 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4707 &base_vha->dpc_flags)) {
4708 qla82xx_idc_lock(ha);
4709 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4710 QLA8XXX_DEV_FAILED);
4711 qla82xx_idc_unlock(ha);
4712 ql_log(ql_log_info, base_vha, 0x4004,
4713 "HW State: FAILED.\n");
4714 qla82xx_device_state_handler(base_vha);
4718 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4719 &base_vha->dpc_flags)) {
4721 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4722 "FCoE context reset scheduled.\n");
4723 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4724 &base_vha->dpc_flags))) {
4725 if (qla82xx_fcoe_ctx_reset(base_vha)) {
4726 /* FCoE-ctx reset failed.
4727 * Escalate to chip-reset
4729 set_bit(ISP_ABORT_NEEDED,
4730 &base_vha->dpc_flags);
4732 clear_bit(ABORT_ISP_ACTIVE,
4733 &base_vha->dpc_flags);
4736 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4737 "FCoE context reset end.\n");
4739 } else if (IS_QLAFX00(ha)) {
4740 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4741 &base_vha->dpc_flags)) {
4742 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4743 "Firmware Reset Recovery\n");
4744 if (qlafx00_reset_initialize(base_vha)) {
4745 /* Failed. Abort isp later. */
4746 if (!test_bit(UNLOADING,
4747 &base_vha->dpc_flags))
4748 set_bit(ISP_UNRECOVERABLE,
4749 &base_vha->dpc_flags);
4750 ql_dbg(ql_dbg_dpc, base_vha,
4752 "Reset Recovery Failed\n");
4756 if (test_and_clear_bit(FX00_TARGET_SCAN,
4757 &base_vha->dpc_flags)) {
4758 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4759 "ISPFx00 Target Scan scheduled\n");
4760 if (qlafx00_rescan_isp(base_vha)) {
4761 if (!test_bit(UNLOADING,
4762 &base_vha->dpc_flags))
4763 set_bit(ISP_UNRECOVERABLE,
4764 &base_vha->dpc_flags);
4765 ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4766 "ISPFx00 Target Scan Failed\n");
4768 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4769 "ISPFx00 Target Scan End\n");
4773 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4774 &base_vha->dpc_flags)) {
4776 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4777 "ISP abort scheduled.\n");
4778 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4779 &base_vha->dpc_flags))) {
4781 if (ha->isp_ops->abort_isp(base_vha)) {
4782 /* failed. retry later */
4783 set_bit(ISP_ABORT_NEEDED,
4784 &base_vha->dpc_flags);
4786 clear_bit(ABORT_ISP_ACTIVE,
4787 &base_vha->dpc_flags);
4790 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4791 "ISP abort end.\n");
4794 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4795 &base_vha->dpc_flags)) {
4796 qla2x00_update_fcports(base_vha);
4799 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4801 ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4802 if (ret != QLA_SUCCESS)
4803 ql_log(ql_log_warn, base_vha, 0x121,
4804 "Failed to enable receiving of RSCN "
4805 "requests: 0x%x.\n", ret);
4806 clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4810 goto loop_resync_check;
4812 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4813 ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4814 "Quiescence mode scheduled.\n");
4815 if (IS_QLA82XX(ha)) {
4816 qla82xx_device_state_handler(base_vha);
4817 clear_bit(ISP_QUIESCE_NEEDED,
4818 &base_vha->dpc_flags);
4819 if (!ha->flags.quiesce_owner) {
4820 qla2x00_perform_loop_resync(base_vha);
4822 qla82xx_idc_lock(ha);
4823 qla82xx_clear_qsnt_ready(base_vha);
4824 qla82xx_idc_unlock(ha);
4827 clear_bit(ISP_QUIESCE_NEEDED,
4828 &base_vha->dpc_flags);
4829 qla2x00_quiesce_io(base_vha);
4831 ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4832 "Quiescence mode end.\n");
4835 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4836 &base_vha->dpc_flags) &&
4837 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4839 ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4840 "Reset marker scheduled.\n");
4841 qla2x00_rst_aen(base_vha);
4842 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4843 ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4844 "Reset marker end.\n");
4847 /* Retry each device up to login retry count */
4848 if ((test_and_clear_bit(RELOGIN_NEEDED,
4849 &base_vha->dpc_flags)) &&
4850 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
4851 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
4853 ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
4854 "Relogin scheduled.\n");
4855 qla2x00_relogin(base_vha);
4856 ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
4860 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4861 &base_vha->dpc_flags)) {
4863 ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
4864 "Loop resync scheduled.\n");
4866 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4867 &base_vha->dpc_flags))) {
4869 rval = qla2x00_loop_resync(base_vha);
4871 clear_bit(LOOP_RESYNC_ACTIVE,
4872 &base_vha->dpc_flags);
4875 ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
4876 "Loop resync end.\n");
4882 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
4883 atomic_read(&base_vha->loop_state) == LOOP_READY) {
4884 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
4885 qla2xxx_flash_npiv_conf(base_vha);
4888 if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH,
4889 &base_vha->dpc_flags)) {
4890 /* Prevents simultaneous ramp up and down */
4891 clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
4892 &base_vha->dpc_flags);
4893 qla2x00_host_ramp_down_queuedepth(base_vha);
4896 if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
4897 &base_vha->dpc_flags))
4898 qla2x00_host_ramp_up_queuedepth(base_vha);
4900 if (!ha->interrupts_on)
4901 ha->isp_ops->enable_intrs(ha);
4903 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
4904 &base_vha->dpc_flags))
4905 ha->isp_ops->beacon_blink(base_vha);
4907 if (!IS_QLAFX00(ha))
4908 qla2x00_do_dpc_all_vps(base_vha);
4912 set_current_state(TASK_INTERRUPTIBLE);
4913 } /* End of while(1) */
4914 __set_current_state(TASK_RUNNING);
4916 ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
4917 "DPC handler exiting.\n");
4920 * Make sure that nobody tries to wake us up again.
4924 /* Cleanup any residual CTX SRBs. */
4925 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4931 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4933 struct qla_hw_data *ha = vha->hw;
4934 struct task_struct *t = ha->dpc_thread;
4936 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4942 * Processes asynchronous reset.
4945 * ha = adapter block pointer.
4948 qla2x00_rst_aen(scsi_qla_host_t *vha)
4950 if (vha->flags.online && !vha->flags.reset_active &&
4951 !atomic_read(&vha->loop_down_timer) &&
4952 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
4954 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4957 * Issue marker command only when we are going to start
4960 vha->marker_needed = 1;
4961 } while (!atomic_read(&vha->loop_down_timer) &&
4962 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
4966 /**************************************************************************
4972 * Context: Interrupt
4973 ***************************************************************************/
4975 qla2x00_timer(scsi_qla_host_t *vha)
4977 unsigned long cpu_flags = 0;
4982 struct qla_hw_data *ha = vha->hw;
4983 struct req_que *req;
4985 if (ha->flags.eeh_busy) {
4986 ql_dbg(ql_dbg_timer, vha, 0x6000,
4987 "EEH = %d, restarting timer.\n",
4988 ha->flags.eeh_busy);
4989 qla2x00_restart_timer(vha, WATCH_INTERVAL);
4993 /* Hardware read to raise pending EEH errors during mailbox waits. */
4994 if (!pci_channel_offline(ha->pdev))
4995 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
4997 /* Make sure qla82xx_watchdog is run only for physical port */
4998 if (!vha->vp_idx && IS_QLA82XX(ha)) {
4999 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5001 qla82xx_watchdog(vha);
5004 if (!vha->vp_idx && IS_QLAFX00(ha))
5005 qlafx00_timer_routine(vha);
5007 /* Loop down handler. */
5008 if (atomic_read(&vha->loop_down_timer) > 0 &&
5009 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5010 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5011 && vha->flags.online) {
5013 if (atomic_read(&vha->loop_down_timer) ==
5014 vha->loop_down_abort_time) {
5016 ql_log(ql_log_info, vha, 0x6008,
5017 "Loop down - aborting the queues before time expires.\n");
5019 if (!IS_QLA2100(ha) && vha->link_down_timeout)
5020 atomic_set(&vha->loop_state, LOOP_DEAD);
5023 * Schedule an ISP abort to return any FCP2-device
5026 /* NPIV - scan physical port only */
5028 spin_lock_irqsave(&ha->hardware_lock,
5030 req = ha->req_q_map[0];
5032 index < req->num_outstanding_cmds;
5036 sp = req->outstanding_cmds[index];
5039 if (sp->type != SRB_SCSI_CMD)
5042 if (!(sfcp->flags & FCF_FCP2_DEVICE))
5046 set_bit(FCOE_CTX_RESET_NEEDED,
5049 set_bit(ISP_ABORT_NEEDED,
5053 spin_unlock_irqrestore(&ha->hardware_lock,
5059 /* if the loop has been down for 4 minutes, reinit adapter */
5060 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5061 if (!(vha->device_flags & DFLG_NO_CABLE)) {
5062 ql_log(ql_log_warn, vha, 0x6009,
5063 "Loop down - aborting ISP.\n");
5066 set_bit(FCOE_CTX_RESET_NEEDED,
5069 set_bit(ISP_ABORT_NEEDED,
5073 ql_dbg(ql_dbg_timer, vha, 0x600a,
5074 "Loop down - seconds remaining %d.\n",
5075 atomic_read(&vha->loop_down_timer));
5078 /* Check if beacon LED needs to be blinked for physical host only */
5079 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5080 /* There is no beacon_blink function for ISP82xx */
5081 if (!IS_QLA82XX(ha)) {
5082 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5087 /* Process any deferred work. */
5088 if (!list_empty(&vha->work_list))
5091 /* Schedule the DPC routine if needed */
5092 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5093 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5094 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5096 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5097 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5098 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5099 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5100 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5101 test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
5102 test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags) ||
5103 test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags))) {
5104 ql_dbg(ql_dbg_timer, vha, 0x600b,
5105 "isp_abort_needed=%d loop_resync_needed=%d "
5106 "fcport_update_needed=%d start_dpc=%d "
5107 "reset_marker_needed=%d",
5108 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5109 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5110 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5112 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5113 ql_dbg(ql_dbg_timer, vha, 0x600c,
5114 "beacon_blink_needed=%d isp_unrecoverable=%d "
5115 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5116 "relogin_needed=%d, host_ramp_down_needed=%d "
5117 "host_ramp_up_needed=%d.\n",
5118 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5119 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5120 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5121 test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5122 test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
5123 test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags),
5124 test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags));
5125 qla2xxx_wake_dpc(vha);
5128 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5131 /* Firmware interface routines. */
5134 #define FW_ISP21XX 0
5135 #define FW_ISP22XX 1
5136 #define FW_ISP2300 2
5137 #define FW_ISP2322 3
5138 #define FW_ISP24XX 4
5139 #define FW_ISP25XX 5
5140 #define FW_ISP81XX 6
5141 #define FW_ISP82XX 7
5142 #define FW_ISP2031 8
5143 #define FW_ISP8031 9
5145 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5146 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5147 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5148 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5149 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5150 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5151 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5152 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5153 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5154 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5156 static DEFINE_MUTEX(qla_fw_lock);
5158 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5159 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5160 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5161 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5162 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5163 { .name = FW_FILE_ISP24XX, },
5164 { .name = FW_FILE_ISP25XX, },
5165 { .name = FW_FILE_ISP81XX, },
5166 { .name = FW_FILE_ISP82XX, },
5167 { .name = FW_FILE_ISP2031, },
5168 { .name = FW_FILE_ISP8031, },
5172 qla2x00_request_firmware(scsi_qla_host_t *vha)
5174 struct qla_hw_data *ha = vha->hw;
5175 struct fw_blob *blob;
5177 if (IS_QLA2100(ha)) {
5178 blob = &qla_fw_blobs[FW_ISP21XX];
5179 } else if (IS_QLA2200(ha)) {
5180 blob = &qla_fw_blobs[FW_ISP22XX];
5181 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5182 blob = &qla_fw_blobs[FW_ISP2300];
5183 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5184 blob = &qla_fw_blobs[FW_ISP2322];
5185 } else if (IS_QLA24XX_TYPE(ha)) {
5186 blob = &qla_fw_blobs[FW_ISP24XX];
5187 } else if (IS_QLA25XX(ha)) {
5188 blob = &qla_fw_blobs[FW_ISP25XX];
5189 } else if (IS_QLA81XX(ha)) {
5190 blob = &qla_fw_blobs[FW_ISP81XX];
5191 } else if (IS_QLA82XX(ha)) {
5192 blob = &qla_fw_blobs[FW_ISP82XX];
5193 } else if (IS_QLA2031(ha)) {
5194 blob = &qla_fw_blobs[FW_ISP2031];
5195 } else if (IS_QLA8031(ha)) {
5196 blob = &qla_fw_blobs[FW_ISP8031];
5201 mutex_lock(&qla_fw_lock);
5205 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5206 ql_log(ql_log_warn, vha, 0x0063,
5207 "Failed to load firmware image (%s).\n", blob->name);
5214 mutex_unlock(&qla_fw_lock);
5219 qla2x00_release_firmware(void)
5223 mutex_lock(&qla_fw_lock);
5224 for (idx = 0; idx < FW_BLOBS; idx++)
5225 release_firmware(qla_fw_blobs[idx].fw);
5226 mutex_unlock(&qla_fw_lock);
5229 static pci_ers_result_t
5230 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5232 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5233 struct qla_hw_data *ha = vha->hw;
5235 ql_dbg(ql_dbg_aer, vha, 0x9000,
5236 "PCI error detected, state %x.\n", state);
5239 case pci_channel_io_normal:
5240 ha->flags.eeh_busy = 0;
5241 return PCI_ERS_RESULT_CAN_RECOVER;
5242 case pci_channel_io_frozen:
5243 ha->flags.eeh_busy = 1;
5244 /* For ISP82XX complete any pending mailbox cmd */
5245 if (IS_QLA82XX(ha)) {
5246 ha->flags.isp82xx_fw_hung = 1;
5247 ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5248 qla82xx_clear_pending_mbx(vha);
5250 qla2x00_free_irqs(vha);
5251 pci_disable_device(pdev);
5252 /* Return back all IOs */
5253 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5254 return PCI_ERS_RESULT_NEED_RESET;
5255 case pci_channel_io_perm_failure:
5256 ha->flags.pci_channel_io_perm_failure = 1;
5257 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5258 return PCI_ERS_RESULT_DISCONNECT;
5260 return PCI_ERS_RESULT_NEED_RESET;
5263 static pci_ers_result_t
5264 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5266 int risc_paused = 0;
5268 unsigned long flags;
5269 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5270 struct qla_hw_data *ha = base_vha->hw;
5271 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5272 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5275 return PCI_ERS_RESULT_RECOVERED;
5277 spin_lock_irqsave(&ha->hardware_lock, flags);
5278 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5279 stat = RD_REG_DWORD(®->hccr);
5280 if (stat & HCCR_RISC_PAUSE)
5282 } else if (IS_QLA23XX(ha)) {
5283 stat = RD_REG_DWORD(®->u.isp2300.host_status);
5284 if (stat & HSR_RISC_PAUSED)
5286 } else if (IS_FWI2_CAPABLE(ha)) {
5287 stat = RD_REG_DWORD(®24->host_status);
5288 if (stat & HSRX_RISC_PAUSED)
5291 spin_unlock_irqrestore(&ha->hardware_lock, flags);
5294 ql_log(ql_log_info, base_vha, 0x9003,
5295 "RISC paused -- mmio_enabled, Dumping firmware.\n");
5296 ha->isp_ops->fw_dump(base_vha, 0);
5298 return PCI_ERS_RESULT_NEED_RESET;
5300 return PCI_ERS_RESULT_RECOVERED;
5304 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5306 uint32_t rval = QLA_FUNCTION_FAILED;
5307 uint32_t drv_active = 0;
5308 struct qla_hw_data *ha = base_vha->hw;
5310 struct pci_dev *other_pdev = NULL;
5312 ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5313 "Entered %s.\n", __func__);
5315 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5317 if (base_vha->flags.online) {
5318 /* Abort all outstanding commands,
5319 * so as to be requeued later */
5320 qla2x00_abort_isp_cleanup(base_vha);
5324 fn = PCI_FUNC(ha->pdev->devfn);
5327 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5328 "Finding pci device at function = 0x%x.\n", fn);
5330 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5331 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5336 if (atomic_read(&other_pdev->enable_cnt)) {
5337 ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5338 "Found PCI func available and enable at 0x%x.\n",
5340 pci_dev_put(other_pdev);
5343 pci_dev_put(other_pdev);
5348 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5349 "This devfn is reset owner = 0x%x.\n",
5351 qla82xx_idc_lock(ha);
5353 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5354 QLA8XXX_DEV_INITIALIZING);
5356 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5357 QLA82XX_IDC_VERSION);
5359 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5360 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5361 "drv_active = 0x%x.\n", drv_active);
5363 qla82xx_idc_unlock(ha);
5364 /* Reset if device is not already reset
5365 * drv_active would be 0 if a reset has already been done
5368 rval = qla82xx_start_firmware(base_vha);
5371 qla82xx_idc_lock(ha);
5373 if (rval != QLA_SUCCESS) {
5374 ql_log(ql_log_info, base_vha, 0x900b,
5375 "HW State: FAILED.\n");
5376 qla82xx_clear_drv_active(ha);
5377 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5378 QLA8XXX_DEV_FAILED);
5380 ql_log(ql_log_info, base_vha, 0x900c,
5381 "HW State: READY.\n");
5382 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5384 qla82xx_idc_unlock(ha);
5385 ha->flags.isp82xx_fw_hung = 0;
5386 rval = qla82xx_restart_isp(base_vha);
5387 qla82xx_idc_lock(ha);
5388 /* Clear driver state register */
5389 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5390 qla82xx_set_drv_active(base_vha);
5392 qla82xx_idc_unlock(ha);
5394 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5395 "This devfn is not reset owner = 0x%x.\n",
5397 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5398 QLA8XXX_DEV_READY)) {
5399 ha->flags.isp82xx_fw_hung = 0;
5400 rval = qla82xx_restart_isp(base_vha);
5401 qla82xx_idc_lock(ha);
5402 qla82xx_set_drv_active(base_vha);
5403 qla82xx_idc_unlock(ha);
5406 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5411 static pci_ers_result_t
5412 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5414 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5415 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5416 struct qla_hw_data *ha = base_vha->hw;
5417 struct rsp_que *rsp;
5418 int rc, retries = 10;
5420 ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5423 /* Workaround: qla2xxx driver which access hardware earlier
5424 * needs error state to be pci_channel_io_online.
5425 * Otherwise mailbox command timesout.
5427 pdev->error_state = pci_channel_io_normal;
5429 pci_restore_state(pdev);
5431 /* pci_restore_state() clears the saved_state flag of the device
5432 * save restored state which resets saved_state flag
5434 pci_save_state(pdev);
5437 rc = pci_enable_device_mem(pdev);
5439 rc = pci_enable_device(pdev);
5442 ql_log(ql_log_warn, base_vha, 0x9005,
5443 "Can't re-enable PCI device after reset.\n");
5444 goto exit_slot_reset;
5447 rsp = ha->rsp_q_map[0];
5448 if (qla2x00_request_irqs(ha, rsp))
5449 goto exit_slot_reset;
5451 if (ha->isp_ops->pci_config(base_vha))
5452 goto exit_slot_reset;
5454 if (IS_QLA82XX(ha)) {
5455 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5456 ret = PCI_ERS_RESULT_RECOVERED;
5457 goto exit_slot_reset;
5459 goto exit_slot_reset;
5462 while (ha->flags.mbox_busy && retries--)
5465 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5466 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5467 ret = PCI_ERS_RESULT_RECOVERED;
5468 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5472 ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5473 "slot_reset return %x.\n", ret);
5479 qla2xxx_pci_resume(struct pci_dev *pdev)
5481 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5482 struct qla_hw_data *ha = base_vha->hw;
5485 ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5488 ret = qla2x00_wait_for_hba_online(base_vha);
5489 if (ret != QLA_SUCCESS) {
5490 ql_log(ql_log_fatal, base_vha, 0x9002,
5491 "The device failed to resume I/O from slot/link_reset.\n");
5494 pci_cleanup_aer_uncorrect_error_status(pdev);
5496 ha->flags.eeh_busy = 0;
5499 static const struct pci_error_handlers qla2xxx_err_handler = {
5500 .error_detected = qla2xxx_pci_error_detected,
5501 .mmio_enabled = qla2xxx_pci_mmio_enabled,
5502 .slot_reset = qla2xxx_pci_slot_reset,
5503 .resume = qla2xxx_pci_resume,
5506 static struct pci_device_id qla2xxx_pci_tbl[] = {
5507 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5508 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5509 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5510 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5511 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5512 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5513 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5514 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5515 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5516 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5517 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5518 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5519 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5520 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5521 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5522 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5523 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5524 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5527 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5529 static struct pci_driver qla2xxx_pci_driver = {
5530 .name = QLA2XXX_DRIVER_NAME,
5532 .owner = THIS_MODULE,
5534 .id_table = qla2xxx_pci_tbl,
5535 .probe = qla2x00_probe_one,
5536 .remove = qla2x00_remove_one,
5537 .shutdown = qla2x00_shutdown,
5538 .err_handler = &qla2xxx_err_handler,
5541 static const struct file_operations apidev_fops = {
5542 .owner = THIS_MODULE,
5543 .llseek = noop_llseek,
5547 * qla2x00_module_init - Module initialization.
5550 qla2x00_module_init(void)
5554 /* Allocate cache for SRBs. */
5555 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5556 SLAB_HWCACHE_ALIGN, NULL);
5557 if (srb_cachep == NULL) {
5558 ql_log(ql_log_fatal, NULL, 0x0001,
5559 "Unable to allocate SRB cache...Failing load!.\n");
5563 /* Initialize target kmem_cache and mem_pools */
5566 kmem_cache_destroy(srb_cachep);
5568 } else if (ret > 0) {
5570 * If initiator mode is explictly disabled by qlt_init(),
5571 * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5572 * performing scsi_scan_target() during LOOP UP event.
5574 qla2xxx_transport_functions.disable_target_scan = 1;
5575 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5578 /* Derive version string. */
5579 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5580 if (ql2xextended_error_logging)
5581 strcat(qla2x00_version_str, "-debug");
5583 qla2xxx_transport_template =
5584 fc_attach_transport(&qla2xxx_transport_functions);
5585 if (!qla2xxx_transport_template) {
5586 kmem_cache_destroy(srb_cachep);
5587 ql_log(ql_log_fatal, NULL, 0x0002,
5588 "fc_attach_transport failed...Failing load!.\n");
5593 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5594 if (apidev_major < 0) {
5595 ql_log(ql_log_fatal, NULL, 0x0003,
5596 "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5599 qla2xxx_transport_vport_template =
5600 fc_attach_transport(&qla2xxx_transport_vport_functions);
5601 if (!qla2xxx_transport_vport_template) {
5602 kmem_cache_destroy(srb_cachep);
5604 fc_release_transport(qla2xxx_transport_template);
5605 ql_log(ql_log_fatal, NULL, 0x0004,
5606 "fc_attach_transport vport failed...Failing load!.\n");
5609 ql_log(ql_log_info, NULL, 0x0005,
5610 "QLogic Fibre Channel HBA Driver: %s.\n",
5611 qla2x00_version_str);
5612 ret = pci_register_driver(&qla2xxx_pci_driver);
5614 kmem_cache_destroy(srb_cachep);
5616 fc_release_transport(qla2xxx_transport_template);
5617 fc_release_transport(qla2xxx_transport_vport_template);
5618 ql_log(ql_log_fatal, NULL, 0x0006,
5619 "pci_register_driver failed...ret=%d Failing load!.\n",
5626 * qla2x00_module_exit - Module cleanup.
5629 qla2x00_module_exit(void)
5631 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5632 pci_unregister_driver(&qla2xxx_pci_driver);
5633 qla2x00_release_firmware();
5634 kmem_cache_destroy(srb_cachep);
5637 kmem_cache_destroy(ctx_cachep);
5638 fc_release_transport(qla2xxx_transport_template);
5639 fc_release_transport(qla2xxx_transport_vport_template);
5642 module_init(qla2x00_module_init);
5643 module_exit(qla2x00_module_exit);
5645 MODULE_AUTHOR("QLogic Corporation");
5646 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5647 MODULE_LICENSE("GPL");
5648 MODULE_VERSION(QLA2XXX_VERSION);
5649 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5650 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5651 MODULE_FIRMWARE(FW_FILE_ISP2300);
5652 MODULE_FIRMWARE(FW_FILE_ISP2322);
5653 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5654 MODULE_FIRMWARE(FW_FILE_ISP25XX);