drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2012 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50 int ql2xlogintimeout = 20;
  51 module_param(ql2xlogintimeout, int, S_IRUGO);
  52 MODULE_PARM_DESC(ql2xlogintimeout,
  53                 "Login timeout value in seconds.");
  54
  55 int qlport_down_retry;
  56 module_param(qlport_down_retry, int, S_IRUGO);
  57 MODULE_PARM_DESC(qlport_down_retry,
  58                 "Maximum number of command retries to a port that returns "
  59                 "a PORT-DOWN status.");
  60
  61 int ql2xplogiabsentdevice;
  62 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  63 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  64                 "Option to enable PLOGI to devices that are not present after "
  65                 "a Fabric scan.  This is needed for several broken switches. "
  66                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  67
  68 int ql2xloginretrycount = 0;
  69 module_param(ql2xloginretrycount, int, S_IRUGO);
  70 MODULE_PARM_DESC(ql2xloginretrycount,
  71                 "Specify an alternate value for the NVRAM login retry count.");
  72
  73 int ql2xallocfwdump = 1;
  74 module_param(ql2xallocfwdump, int, S_IRUGO);
  75 MODULE_PARM_DESC(ql2xallocfwdump,
  76                 "Option to enable allocation of memory for a firmware dump "
  77                 "during HBA initialization.  Memory allocation requirements "
  78                 "vary by ISP type.  Default is 1 - allocate memory.");
  79
  80 int ql2xextended_error_logging;
  81 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  82 MODULE_PARM_DESC(ql2xextended_error_logging,
  83                 "Option to enable extended error logging,\n"
  84                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  85                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  86                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  87                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  88                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  89                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  90                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  91                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  92                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  93                 "\t\t0x1e400000 - Preferred value for capturing essential "
  94                 "debug information (equivalent to old "
  95                 "ql2xextended_error_logging=1).\n"
  96                 "\t\tDo LOGICAL OR of the value to enable more than one level");
  97
  98 int ql2xshiftctondsd = 6;
  99 module_param(ql2xshiftctondsd, int, S_IRUGO);
 100 MODULE_PARM_DESC(ql2xshiftctondsd,
 101                 "Set to control shifting of command type processing "
 102                 "based on total number of SG elements.");
 103
 104 static void qla2x00_free_device(scsi_qla_host_t *);
 105
 106 int ql2xfdmienable=1;
 107 module_param(ql2xfdmienable, int, S_IRUGO);
 108 MODULE_PARM_DESC(ql2xfdmienable,
 109                 "Enables FDMI registrations. "
 110                 "0 - no FDMI. Default is 1 - perform FDMI.");
 111
 112 #define MAX_Q_DEPTH    32
 113 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 114 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 115 MODULE_PARM_DESC(ql2xmaxqdepth,
 116                 "Maximum queue depth to report for target devices.");
 117
 118 /* Do not change the value of this after module load */
 119 int ql2xenabledif = 0;
 120 module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
 121 MODULE_PARM_DESC(ql2xenabledif,
 122                 " Enable T10-CRC-DIF "
 123                 " Default is 0 - No DIF Support. 1 - Enable it"
 124                 ", 2 - Enable DIF for all types, except Type 0.");
 125
 126 int ql2xenablehba_err_chk = 2;
 127 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 128 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 129                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 130                 " Default is 1.\n"
 131                 "  0 -- Error isolation disabled\n"
 132                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 133                 "  2 -- Error isolation enabled for all Types\n");
 134
 135 int ql2xiidmaenable=1;
 136 module_param(ql2xiidmaenable, int, S_IRUGO);
 137 MODULE_PARM_DESC(ql2xiidmaenable,
 138                 "Enables iIDMA settings "
 139                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 140
 141 int ql2xmaxqueues = 1;
 142 module_param(ql2xmaxqueues, int, S_IRUGO);
 143 MODULE_PARM_DESC(ql2xmaxqueues,
 144                 "Enables MQ settings "
 145                 "Default is 1 for single queue. Set it to number "
 146                 "of queues in MQ mode.");
 147
 148 int ql2xmultique_tag;
 149 module_param(ql2xmultique_tag, int, S_IRUGO);
 150 MODULE_PARM_DESC(ql2xmultique_tag,
 151                 "Enables CPU affinity settings for the driver "
 152                 "Default is 0 for no affinity of request and response IO. "
 153                 "Set it to 1 to turn on the cpu affinity.");
 154
 155 int ql2xfwloadbin;
 156 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 157 MODULE_PARM_DESC(ql2xfwloadbin,
 158                 "Option to specify location from which to load ISP firmware:.\n"
 159                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 160                 "      interface.\n"
 161                 " 1 -- load firmware from flash.\n"
 162                 " 0 -- use default semantics.\n");
 163
 164 int ql2xetsenable;
 165 module_param(ql2xetsenable, int, S_IRUGO);
 166 MODULE_PARM_DESC(ql2xetsenable,
 167                 "Enables firmware ETS burst."
 168                 "Default is 0 - skip ETS enablement.");
 169
 170 int ql2xdbwr = 1;
 171 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 172 MODULE_PARM_DESC(ql2xdbwr,
 173                 "Option to specify scheme for request queue posting.\n"
 174                 " 0 -- Regular doorbell.\n"
 175                 " 1 -- CAMRAM doorbell (faster).\n");
 176
 177 int ql2xtargetreset = 1;
 178 module_param(ql2xtargetreset, int, S_IRUGO);
 179 MODULE_PARM_DESC(ql2xtargetreset,
 180                  "Enable target reset."
 181                  "Default is 1 - use hw defaults.");
 182
 183 int ql2xgffidenable;
 184 module_param(ql2xgffidenable, int, S_IRUGO);
 185 MODULE_PARM_DESC(ql2xgffidenable,
 186                 "Enables GFF_ID checks of port type. "
 187                 "Default is 0 - Do not use GFF_ID information.");
 188
 189 int ql2xasynctmfenable;
 190 module_param(ql2xasynctmfenable, int, S_IRUGO);
 191 MODULE_PARM_DESC(ql2xasynctmfenable,
 192                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 193                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 194
 195 int ql2xdontresethba;
 196 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 197 MODULE_PARM_DESC(ql2xdontresethba,
 198                 "Option to specify reset behaviour.\n"
 199                 " 0 (Default) -- Reset on failure.\n"
 200                 " 1 -- Do not reset on failure.\n");
 201
 202 uint ql2xmaxlun = MAX_LUNS;
 203 module_param(ql2xmaxlun, uint, S_IRUGO);
 204 MODULE_PARM_DESC(ql2xmaxlun,
 205                 "Defines the maximum LU number to register with the SCSI "
 206                 "midlayer. Default is 65535.");
 207
 208 int ql2xmdcapmask = 0x1F;
 209 module_param(ql2xmdcapmask, int, S_IRUGO);
 210 MODULE_PARM_DESC(ql2xmdcapmask,
 211                 "Set the Minidump driver capture mask level. "
 212                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 213
 214 int ql2xmdenable = 1;
 215 module_param(ql2xmdenable, int, S_IRUGO);
 216 MODULE_PARM_DESC(ql2xmdenable,
 217                 "Enable/disable MiniDump. "
 218                 "0 - MiniDump disabled. "
 219                 "1 (Default) - MiniDump enabled.");
 220
 221 /*
 222  * SCSI host template entry points
 223  */
 224 static int qla2xxx_slave_configure(struct scsi_device * device);
 225 static int qla2xxx_slave_alloc(struct scsi_device *);
 226 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 227 static void qla2xxx_scan_start(struct Scsi_Host *);
 228 static void qla2xxx_slave_destroy(struct scsi_device *);
 229 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 230 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 231 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 232 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 233 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 234 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 235
 236 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 237 static int qla2x00_change_queue_type(struct scsi_device *, int);
 238
 239 struct scsi_host_template qla2xxx_driver_template = {
 240         .module                 = THIS_MODULE,
 241         .name                   = QLA2XXX_DRIVER_NAME,
 242         .queuecommand           = qla2xxx_queuecommand,
 243
 244         .eh_abort_handler       = qla2xxx_eh_abort,
 245         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 246         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 247         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 248         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 249
 250         .slave_configure        = qla2xxx_slave_configure,
 251
 252         .slave_alloc            = qla2xxx_slave_alloc,
 253         .slave_destroy          = qla2xxx_slave_destroy,
 254         .scan_finished          = qla2xxx_scan_finished,
 255         .scan_start             = qla2xxx_scan_start,
 256         .change_queue_depth     = qla2x00_change_queue_depth,
 257         .change_queue_type      = qla2x00_change_queue_type,
 258         .this_id                = -1,
 259         .cmd_per_lun            = 3,
 260         .use_clustering         = ENABLE_CLUSTERING,
 261         .sg_tablesize           = SG_ALL,
 262
 263         .max_sectors            = 0xFFFF,
 264         .shost_attrs            = qla2x00_host_attrs,
 265
 266         .supported_mode         = MODE_INITIATOR,
 267 };
 268
 269 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 270 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 271
 272 /* TODO Convert to inlines
 273  *
 274  * Timer routines
 275  */
 276
 277 __inline__ void
 278 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 279 {
 280         init_timer(&vha->timer);
 281         vha->timer.expires = jiffies + interval * HZ;
 282         vha->timer.data = (unsigned long)vha;
 283         vha->timer.function = (void (*)(unsigned long))func;
 284         add_timer(&vha->timer);
 285         vha->timer_active = 1;
 286 }
 287
 288 static inline void
 289 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 290 {
 291         /* Currently used for 82XX only. */
 292         if (vha->device_flags & DFLG_DEV_FAILED) {
 293                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 294                     "Device in a failed state, returning.\n");
 295                 return;
 296         }
 297
 298         mod_timer(&vha->timer, jiffies + interval * HZ);
 299 }
 300
 301 static __inline__ void
 302 qla2x00_stop_timer(scsi_qla_host_t *vha)
 303 {
 304         del_timer_sync(&vha->timer);
 305         vha->timer_active = 0;
 306 }
 307
 308 static int qla2x00_do_dpc(void *data);
 309
 310 static void qla2x00_rst_aen(scsi_qla_host_t *);
 311
 312 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 313         struct req_que **, struct rsp_que **);
 314 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 315 static void qla2x00_mem_free(struct qla_hw_data *);
 316
 317 /* -------------------------------------------------------------------------- */
 318 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 319                                 struct rsp_que *rsp)
 320 {
 321         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 322         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 323                                 GFP_KERNEL);
 324         if (!ha->req_q_map) {
 325                 ql_log(ql_log_fatal, vha, 0x003b,
 326                     "Unable to allocate memory for request queue ptrs.\n");
 327                 goto fail_req_map;
 328         }
 329
 330         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 331                                 GFP_KERNEL);
 332         if (!ha->rsp_q_map) {
 333                 ql_log(ql_log_fatal, vha, 0x003c,
 334                     "Unable to allocate memory for response queue ptrs.\n");
 335                 goto fail_rsp_map;
 336         }
 337         /*
 338          * Make sure we record at least the request and response queue zero in
 339          * case we need to free them if part of the probe fails.
 340          */
 341         ha->rsp_q_map[0] = rsp;
 342         ha->req_q_map[0] = req;
 343         set_bit(0, ha->rsp_qid_map);
 344         set_bit(0, ha->req_qid_map);
 345         return 1;
 346
 347 fail_rsp_map:
 348         kfree(ha->req_q_map);
 349         ha->req_q_map = NULL;
 350 fail_req_map:
 351         return -ENOMEM;
 352 }
 353
 354 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 355 {
 356         if (req && req->ring)
 357                 dma_free_coherent(&ha->pdev->dev,
 358                 (req->length + 1) * sizeof(request_t),
 359                 req->ring, req->dma);
 360
 361         kfree(req);
 362         req = NULL;
 363 }
 364
 365 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 366 {
 367         if (rsp && rsp->ring)
 368                 dma_free_coherent(&ha->pdev->dev,
 369                 (rsp->length + 1) * sizeof(response_t),
 370                 rsp->ring, rsp->dma);
 371
 372         kfree(rsp);
 373         rsp = NULL;
 374 }
 375
 376 static void qla2x00_free_queues(struct qla_hw_data *ha)
 377 {
 378         struct req_que *req;
 379         struct rsp_que *rsp;
 380         int cnt;
 381
 382         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 383                 req = ha->req_q_map[cnt];
 384                 qla2x00_free_req_que(ha, req);
 385         }
 386         kfree(ha->req_q_map);
 387         ha->req_q_map = NULL;
 388
 389         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 390                 rsp = ha->rsp_q_map[cnt];
 391                 qla2x00_free_rsp_que(ha, rsp);
 392         }
 393         kfree(ha->rsp_q_map);
 394         ha->rsp_q_map = NULL;
 395 }
 396
 397 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 398 {
 399         uint16_t options = 0;
 400         int ques, req, ret;
 401         struct qla_hw_data *ha = vha->hw;
 402
 403         if (!(ha->fw_attributes & BIT_6)) {
 404                 ql_log(ql_log_warn, vha, 0x00d8,
 405                     "Firmware is not multi-queue capable.\n");
 406                 goto fail;
 407         }
 408         if (ql2xmultique_tag) {
 409                 /* create a request queue for IO */
 410                 options |= BIT_7;
 411                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 412                         QLA_DEFAULT_QUE_QOS);
 413                 if (!req) {
 414                         ql_log(ql_log_warn, vha, 0x00e0,
 415                             "Failed to create request queue.\n");
 416                         goto fail;
 417                 }
 418                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 419                 vha->req = ha->req_q_map[req];
 420                 options |= BIT_1;
 421                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 422                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 423                         if (!ret) {
 424                                 ql_log(ql_log_warn, vha, 0x00e8,
 425                                     "Failed to create response queue.\n");
 426                                 goto fail2;
 427                         }
 428                 }
 429                 ha->flags.cpu_affinity_enabled = 1;
 430                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 431                     "CPU affinity mode enalbed, "
 432                     "no. of response queues:%d no. of request queues:%d.\n",
 433                     ha->max_rsp_queues, ha->max_req_queues);
 434                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 435                     "CPU affinity mode enalbed, "
 436                     "no. of response queues:%d no. of request queues:%d.\n",
 437                     ha->max_rsp_queues, ha->max_req_queues);
 438         }
 439         return 0;
 440 fail2:
 441         qla25xx_delete_queues(vha);
 442         destroy_workqueue(ha->wq);
 443         ha->wq = NULL;
 444         vha->req = ha->req_q_map[0];
 445 fail:
 446         ha->mqenable = 0;
 447         kfree(ha->req_q_map);
 448         kfree(ha->rsp_q_map);
 449         ha->max_req_queues = ha->max_rsp_queues = 1;
 450         return 1;
 451 }
 452
 453 static char *
 454 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 455 {
 456         struct qla_hw_data *ha = vha->hw;
 457         static char *pci_bus_modes[] = {
 458                 "33", "66", "100", "133",
 459         };
 460         uint16_t pci_bus;
 461
 462         strcpy(str, "PCI");
 463         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 464         if (pci_bus) {
 465                 strcat(str, "-X (");
 466                 strcat(str, pci_bus_modes[pci_bus]);
 467         } else {
 468                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 469                 strcat(str, " (");
 470                 strcat(str, pci_bus_modes[pci_bus]);
 471         }
 472         strcat(str, " MHz)");
 473
 474         return (str);
 475 }
 476
 477 static char *
 478 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 479 {
 480         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 481         struct qla_hw_data *ha = vha->hw;
 482         uint32_t pci_bus;
 483         int pcie_reg;
 484
 485         pcie_reg = pci_pcie_cap(ha->pdev);
 486         if (pcie_reg) {
 487                 char lwstr[6];
 488                 uint16_t pcie_lstat, lspeed, lwidth;
 489
 490                 pcie_reg += PCI_EXP_LNKCAP;
 491                 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
 492                 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
 493                 lwidth = (pcie_lstat &
 494                     (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
 495
 496                 strcpy(str, "PCIe (");
 497                 if (lspeed == 1)
 498                         strcat(str, "2.5GT/s ");
 499                 else if (lspeed == 2)
 500                         strcat(str, "5.0GT/s ");
 501                 else
 502                         strcat(str, "<unknown> ");
 503                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 504                 strcat(str, lwstr);
 505
 506                 return str;
 507         }
 508
 509         strcpy(str, "PCI");
 510         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 511         if (pci_bus == 0 || pci_bus == 8) {
 512                 strcat(str, " (");
 513                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 514         } else {
 515                 strcat(str, "-X ");
 516                 if (pci_bus & BIT_2)
 517                         strcat(str, "Mode 2");
 518                 else
 519                         strcat(str, "Mode 1");
 520                 strcat(str, " (");
 521                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 522         }
 523         strcat(str, " MHz)");
 524
 525         return str;
 526 }
 527
 528 static char *
 529 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 530 {
 531         char un_str[10];
 532         struct qla_hw_data *ha = vha->hw;
 533
 534         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 535             ha->fw_minor_version,
 536             ha->fw_subminor_version);
 537
 538         if (ha->fw_attributes & BIT_9) {
 539                 strcat(str, "FLX");
 540                 return (str);
 541         }
 542
 543         switch (ha->fw_attributes & 0xFF) {
 544         case 0x7:
 545                 strcat(str, "EF");
 546                 break;
 547         case 0x17:
 548                 strcat(str, "TP");
 549                 break;
 550         case 0x37:
 551                 strcat(str, "IP");
 552                 break;
 553         case 0x77:
 554                 strcat(str, "VI");
 555                 break;
 556         default:
 557                 sprintf(un_str, "(%x)", ha->fw_attributes);
 558                 strcat(str, un_str);
 559                 break;
 560         }
 561         if (ha->fw_attributes & 0x100)
 562                 strcat(str, "X");
 563
 564         return (str);
 565 }
 566
 567 static char *
 568 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 569 {
 570         struct qla_hw_data *ha = vha->hw;
 571
 572         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 573             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 574         return str;
 575 }
 576
 577 void
 578 qla2x00_sp_free_dma(void *vha, void *ptr)
 579 {
 580         srb_t *sp = (srb_t *)ptr;
 581         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 582         struct qla_hw_data *ha = sp->fcport->vha->hw;
 583         void *ctx = GET_CMD_CTX_SP(sp);
 584
 585         if (sp->flags & SRB_DMA_VALID) {
 586                 scsi_dma_unmap(cmd);
 587                 sp->flags &= ~SRB_DMA_VALID;
 588         }
 589
 590         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 591                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 592                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 593                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 594         }
 595
 596         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 597                 /* List assured to be having elements */
 598                 qla2x00_clean_dsd_pool(ha, sp);
 599                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 600         }
 601
 602         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 603                 dma_pool_free(ha->dl_dma_pool, ctx,
 604                     ((struct crc_context *)ctx)->crc_ctx_dma);
 605                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 606         }
 607
 608         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 609                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 610
 611                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 612                         ctx1->fcp_cmnd_dma);
 613                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 614                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 615                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 616                 mempool_free(ctx1, ha->ctx_mempool);
 617                 ctx1 = NULL;
 618         }
 619
 620         CMD_SP(cmd) = NULL;
 621         mempool_free(sp, ha->srb_mempool);
 622 }
 623
 624 static void
 625 qla2x00_sp_compl(void *data, void *ptr, int res)
 626 {
 627         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 628         srb_t *sp = (srb_t *)ptr;
 629         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 630
 631         cmd->result = res;
 632
 633         if (atomic_read(&sp->ref_count) == 0) {
 634                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 635                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 636                     sp, GET_CMD_SP(sp));
 637                 if (ql2xextended_error_logging & ql_dbg_io)
 638                         BUG();
 639                 return;
 640         }
 641         if (!atomic_dec_and_test(&sp->ref_count))
 642                 return;
 643
 644         qla2x00_sp_free_dma(ha, sp);
 645         cmd->scsi_done(cmd);
 646 }
 647
 648 static int
 649 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 650 {
 651         scsi_qla_host_t *vha = shost_priv(host);
 652         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 653         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 654         struct qla_hw_data *ha = vha->hw;
 655         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 656         srb_t *sp;
 657         int rval;
 658
 659         if (ha->flags.eeh_busy) {
 660                 if (ha->flags.pci_channel_io_perm_failure) {
 661                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 662                             "PCI Channel IO permanent failure, exiting "
 663                             "cmd=%p.\n", cmd);
 664                         cmd->result = DID_NO_CONNECT << 16;
 665                 } else {
 666                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 667                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 668                         cmd->result = DID_REQUEUE << 16;
 669                 }
 670                 goto qc24_fail_command;
 671         }
 672
 673         rval = fc_remote_port_chkready(rport);
 674         if (rval) {
 675                 cmd->result = rval;
 676                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 677                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 678                     cmd, rval);
 679                 goto qc24_fail_command;
 680         }
 681
 682         if (!vha->flags.difdix_supported &&
 683                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 684                         ql_dbg(ql_dbg_io, vha, 0x3004,
 685                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 686                             cmd);
 687                         cmd->result = DID_NO_CONNECT << 16;
 688                         goto qc24_fail_command;
 689         }
 690
 691         if (!fcport) {
 692                 cmd->result = DID_NO_CONNECT << 16;
 693                 goto qc24_fail_command;
 694         }
 695
 696         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 697                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 698                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 699                         ql_dbg(ql_dbg_io, vha, 0x3005,
 700                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 701                             atomic_read(&fcport->state),
 702                             atomic_read(&base_vha->loop_state));
 703                         cmd->result = DID_NO_CONNECT << 16;
 704                         goto qc24_fail_command;
 705                 }
 706                 goto qc24_target_busy;
 707         }
 708
 709         sp = qla2x00_get_sp(base_vha, fcport, GFP_ATOMIC);
 710         if (!sp)
 711                 goto qc24_host_busy;
 712
 713         sp->u.scmd.cmd = cmd;
 714         sp->type = SRB_SCSI_CMD;
 715         atomic_set(&sp->ref_count, 1);
 716         CMD_SP(cmd) = (void *)sp;
 717         sp->free = qla2x00_sp_free_dma;
 718         sp->done = qla2x00_sp_compl;
 719
 720         rval = ha->isp_ops->start_scsi(sp);
 721         if (rval != QLA_SUCCESS) {
 722                 ql_dbg(ql_dbg_io, vha, 0x3013,
 723                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 724                 goto qc24_host_busy_free_sp;
 725         }
 726
 727         return 0;
 728
 729 qc24_host_busy_free_sp:
 730         qla2x00_sp_free_dma(ha, sp);
 731
 732 qc24_host_busy:
 733         return SCSI_MLQUEUE_HOST_BUSY;
 734
 735 qc24_target_busy:
 736         return SCSI_MLQUEUE_TARGET_BUSY;
 737
 738 qc24_fail_command:
 739         cmd->scsi_done(cmd);
 740
 741         return 0;
 742 }
 743
 744 /*
 745  * qla2x00_eh_wait_on_command
 746  *    Waits for the command to be returned by the Firmware for some
 747  *    max time.
 748  *
 749  * Input:
 750  *    cmd = Scsi Command to wait on.
 751  *
 752  * Return:
 753  *    Not Found : 0
 754  *    Found : 1
 755  */
 756 static int
 757 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 758 {
 759 #define ABORT_POLLING_PERIOD    1000
 760 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 761         unsigned long wait_iter = ABORT_WAIT_ITER;
 762         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 763         struct qla_hw_data *ha = vha->hw;
 764         int ret = QLA_SUCCESS;
 765
 766         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 767                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 768                     "Return:eh_wait.\n");
 769                 return ret;
 770         }
 771
 772         while (CMD_SP(cmd) && wait_iter--) {
 773                 msleep(ABORT_POLLING_PERIOD);
 774         }
 775         if (CMD_SP(cmd))
 776                 ret = QLA_FUNCTION_FAILED;
 777
 778         return ret;
 779 }
 780
 781 /*
 782  * qla2x00_wait_for_hba_online
 783  *    Wait till the HBA is online after going through
 784  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 785  *    finally HBA is disabled ie marked offline
 786  *
 787  * Input:
 788  *     ha - pointer to host adapter structure
 789  *
 790  * Note:
 791  *    Does context switching-Release SPIN_LOCK
 792  *    (if any) before calling this routine.
 793  *
 794  * Return:
 795  *    Success (Adapter is online) : 0
 796  *    Failed  (Adapter is offline/disabled) : 1
 797  */
 798 int
 799 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 800 {
 801         int             return_status;
 802         unsigned long   wait_online;
 803         struct qla_hw_data *ha = vha->hw;
 804         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 805
 806         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 807         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 808             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 809             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 810             ha->dpc_active) && time_before(jiffies, wait_online)) {
 811
 812                 msleep(1000);
 813         }
 814         if (base_vha->flags.online)
 815                 return_status = QLA_SUCCESS;
 816         else
 817                 return_status = QLA_FUNCTION_FAILED;
 818
 819         return (return_status);
 820 }
 821
 822 /*
 823  * qla2x00_wait_for_reset_ready
 824  *    Wait till the HBA is online after going through
 825  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 826  *    finally HBA is disabled ie marked offline or flash
 827  *    operations are in progress.
 828  *
 829  * Input:
 830  *     ha - pointer to host adapter structure
 831  *
 832  * Note:
 833  *    Does context switching-Release SPIN_LOCK
 834  *    (if any) before calling this routine.
 835  *
 836  * Return:
 837  *    Success (Adapter is online/no flash ops) : 0
 838  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 839  */
 840 static int
 841 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 842 {
 843         int             return_status;
 844         unsigned long   wait_online;
 845         struct qla_hw_data *ha = vha->hw;
 846         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 847
 848         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 849         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 850             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 851             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 852             ha->optrom_state != QLA_SWAITING ||
 853             ha->dpc_active) && time_before(jiffies, wait_online))
 854                 msleep(1000);
 855
 856         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 857                 return_status = QLA_SUCCESS;
 858         else
 859                 return_status = QLA_FUNCTION_FAILED;
 860
 861         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 862             "%s return status=%d.\n", __func__, return_status);
 863
 864         return return_status;
 865 }
 866
 867 int
 868 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 869 {
 870         int             return_status;
 871         unsigned long   wait_reset;
 872         struct qla_hw_data *ha = vha->hw;
 873         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 874
 875         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 876         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 877             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 878             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 879             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 880
 881                 msleep(1000);
 882
 883                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 884                     ha->flags.chip_reset_done)
 885                         break;
 886         }
 887         if (ha->flags.chip_reset_done)
 888                 return_status = QLA_SUCCESS;
 889         else
 890                 return_status = QLA_FUNCTION_FAILED;
 891
 892         return return_status;
 893 }
 894
 895 static void
 896 sp_get(struct srb *sp)
 897 {
 898         atomic_inc(&sp->ref_count);
 899 }
 900
 901 /**************************************************************************
 902 * qla2xxx_eh_abort
 903 *
 904 * Description:
 905 *    The abort function will abort the specified command.
 906 *
 907 * Input:
 908 *    cmd = Linux SCSI command packet to be aborted.
 909 *
 910 * Returns:
 911 *    Either SUCCESS or FAILED.
 912 *
 913 * Note:
 914 *    Only return FAILED if command not returned by firmware.
 915 **************************************************************************/
 916 static int
 917 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 918 {
 919         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 920         srb_t *sp;
 921         int ret;
 922         unsigned int id, lun;
 923         unsigned long flags;
 924         int wait = 0;
 925         struct qla_hw_data *ha = vha->hw;
 926
 927         if (!CMD_SP(cmd))
 928                 return SUCCESS;
 929
 930         ret = fc_block_scsi_eh(cmd);
 931         if (ret != 0)
 932                 return ret;
 933         ret = SUCCESS;
 934
 935         id = cmd->device->id;
 936         lun = cmd->device->lun;
 937
 938         spin_lock_irqsave(&ha->hardware_lock, flags);
 939         sp = (srb_t *) CMD_SP(cmd);
 940         if (!sp) {
 941                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 942                 return SUCCESS;
 943         }
 944
 945         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 946             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 947             vha->host_no, id, lun, sp, cmd);
 948
 949         /* Get a reference to the sp and drop the lock.*/
 950         sp_get(sp);
 951
 952         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 953         if (ha->isp_ops->abort_command(sp)) {
 954                 ret = FAILED;
 955                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 956                     "Abort command mbx failed cmd=%p.\n", cmd);
 957         } else {
 958                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 959                     "Abort command mbx success cmd=%p.\n", cmd);
 960                 wait = 1;
 961         }
 962
 963         spin_lock_irqsave(&ha->hardware_lock, flags);
 964         sp->done(ha, sp, 0);
 965         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 966
 967         /* Did the command return during mailbox execution? */
 968         if (ret == FAILED && !CMD_SP(cmd))
 969                 ret = SUCCESS;
 970
 971         /* Wait for the command to be returned. */
 972         if (wait) {
 973                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
 974                         ql_log(ql_log_warn, vha, 0x8006,
 975                             "Abort handler timed out cmd=%p.\n", cmd);
 976                         ret = FAILED;
 977                 }
 978         }
 979
 980         ql_log(ql_log_info, vha, 0x801c,
 981             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
 982             vha->host_no, id, lun, wait, ret);
 983
 984         return ret;
 985 }
 986
 987 int
 988 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
 989         unsigned int l, enum nexus_wait_type type)
 990 {
 991         int cnt, match, status;
 992         unsigned long flags;
 993         struct qla_hw_data *ha = vha->hw;
 994         struct req_que *req;
 995         srb_t *sp;
 996         struct scsi_cmnd *cmd;
 997
 998         status = QLA_SUCCESS;
 999
1000         spin_lock_irqsave(&ha->hardware_lock, flags);
1001         req = vha->req;
1002         for (cnt = 1; status == QLA_SUCCESS &&
1003                 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1004                 sp = req->outstanding_cmds[cnt];
1005                 if (!sp)
1006                         continue;
1007                 if (sp->type != SRB_SCSI_CMD)
1008                         continue;
1009                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1010                         continue;
1011                 match = 0;
1012                 cmd = GET_CMD_SP(sp);
1013                 switch (type) {
1014                 case WAIT_HOST:
1015                         match = 1;
1016                         break;
1017                 case WAIT_TARGET:
1018                         match = cmd->device->id == t;
1019                         break;
1020                 case WAIT_LUN:
1021                         match = (cmd->device->id == t &&
1022                                 cmd->device->lun == l);
1023                         break;
1024                 }
1025                 if (!match)
1026                         continue;
1027
1028                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1029                 status = qla2x00_eh_wait_on_command(cmd);
1030                 spin_lock_irqsave(&ha->hardware_lock, flags);
1031         }
1032         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1033
1034         return status;
1035 }
1036
1037 static char *reset_errors[] = {
1038         "HBA not online",
1039         "HBA not ready",
1040         "Task management failed",
1041         "Waiting for command completions",
1042 };
1043
1044 static int
1045 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1046     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1047 {
1048         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1049         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1050         int err;
1051
1052         if (!fcport) {
1053                 return FAILED;
1054         }
1055
1056         err = fc_block_scsi_eh(cmd);
1057         if (err != 0)
1058                 return err;
1059
1060         ql_log(ql_log_info, vha, 0x8009,
1061             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1062             cmd->device->id, cmd->device->lun, cmd);
1063
1064         err = 0;
1065         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1066                 ql_log(ql_log_warn, vha, 0x800a,
1067                     "Wait for hba online failed for cmd=%p.\n", cmd);
1068                 goto eh_reset_failed;
1069         }
1070         err = 2;
1071         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1072                 != QLA_SUCCESS) {
1073                 ql_log(ql_log_warn, vha, 0x800c,
1074                     "do_reset failed for cmd=%p.\n", cmd);
1075                 goto eh_reset_failed;
1076         }
1077         err = 3;
1078         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1079             cmd->device->lun, type) != QLA_SUCCESS) {
1080                 ql_log(ql_log_warn, vha, 0x800d,
1081                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1082                 goto eh_reset_failed;
1083         }
1084
1085         ql_log(ql_log_info, vha, 0x800e,
1086             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1087             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1088
1089         return SUCCESS;
1090
1091 eh_reset_failed:
1092         ql_log(ql_log_info, vha, 0x800f,
1093             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1094             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1095             cmd);
1096         return FAILED;
1097 }
1098
1099 static int
1100 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1101 {
1102         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1103         struct qla_hw_data *ha = vha->hw;
1104
1105         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1106             ha->isp_ops->lun_reset);
1107 }
1108
1109 static int
1110 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1111 {
1112         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1113         struct qla_hw_data *ha = vha->hw;
1114
1115         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1116             ha->isp_ops->target_reset);
1117 }
1118
1119 /**************************************************************************
1120 * qla2xxx_eh_bus_reset
1121 *
1122 * Description:
1123 *    The bus reset function will reset the bus and abort any executing
1124 *    commands.
1125 *
1126 * Input:
1127 *    cmd = Linux SCSI command packet of the command that cause the
1128 *          bus reset.
1129 *
1130 * Returns:
1131 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1132 *
1133 **************************************************************************/
1134 static int
1135 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1136 {
1137         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1138         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1139         int ret = FAILED;
1140         unsigned int id, lun;
1141
1142         id = cmd->device->id;
1143         lun = cmd->device->lun;
1144
1145         if (!fcport) {
1146                 return ret;
1147         }
1148
1149         ret = fc_block_scsi_eh(cmd);
1150         if (ret != 0)
1151                 return ret;
1152         ret = FAILED;
1153
1154         ql_log(ql_log_info, vha, 0x8012,
1155             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1156
1157         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1158                 ql_log(ql_log_fatal, vha, 0x8013,
1159                     "Wait for hba online failed board disabled.\n");
1160                 goto eh_bus_reset_done;
1161         }
1162
1163         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1164                 ret = SUCCESS;
1165
1166         if (ret == FAILED)
1167                 goto eh_bus_reset_done;
1168
1169         /* Flush outstanding commands. */
1170         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1171             QLA_SUCCESS) {
1172                 ql_log(ql_log_warn, vha, 0x8014,
1173                     "Wait for pending commands failed.\n");
1174                 ret = FAILED;
1175         }
1176
1177 eh_bus_reset_done:
1178         ql_log(ql_log_warn, vha, 0x802b,
1179             "BUS RESET %s nexus=%ld:%d:%d.\n",
1180             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1181
1182         return ret;
1183 }
1184
1185 /**************************************************************************
1186 * qla2xxx_eh_host_reset
1187 *
1188 * Description:
1189 *    The reset function will reset the Adapter.
1190 *
1191 * Input:
1192 *      cmd = Linux SCSI command packet of the command that cause the
1193 *            adapter reset.
1194 *
1195 * Returns:
1196 *      Either SUCCESS or FAILED.
1197 *
1198 * Note:
1199 **************************************************************************/
1200 static int
1201 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1202 {
1203         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1204         struct qla_hw_data *ha = vha->hw;
1205         int ret = FAILED;
1206         unsigned int id, lun;
1207         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1208
1209         id = cmd->device->id;
1210         lun = cmd->device->lun;
1211
1212         ql_log(ql_log_info, vha, 0x8018,
1213             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1214
1215         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1216                 goto eh_host_reset_lock;
1217
1218         if (vha != base_vha) {
1219                 if (qla2x00_vp_abort_isp(vha))
1220                         goto eh_host_reset_lock;
1221         } else {
1222                 if (IS_QLA82XX(vha->hw)) {
1223                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1224                                 /* Ctx reset success */
1225                                 ret = SUCCESS;
1226                                 goto eh_host_reset_lock;
1227                         }
1228                         /* fall thru if ctx reset failed */
1229                 }
1230                 if (ha->wq)
1231                         flush_workqueue(ha->wq);
1232
1233                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1234                 if (ha->isp_ops->abort_isp(base_vha)) {
1235                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1236                         /* failed. schedule dpc to try */
1237                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1238
1239                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1240                                 ql_log(ql_log_warn, vha, 0x802a,
1241                                     "wait for hba online failed.\n");
1242                                 goto eh_host_reset_lock;
1243                         }
1244                 }
1245                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1246         }
1247
1248         /* Waiting for command to be returned to OS.*/
1249         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1250                 QLA_SUCCESS)
1251                 ret = SUCCESS;
1252
1253 eh_host_reset_lock:
1254         ql_log(ql_log_info, vha, 0x8017,
1255             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1256             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1257
1258         return ret;
1259 }
1260
1261 /*
1262 * qla2x00_loop_reset
1263 *      Issue loop reset.
1264 *
1265 * Input:
1266 *      ha = adapter block pointer.
1267 *
1268 * Returns:
1269 *      0 = success
1270 */
1271 int
1272 qla2x00_loop_reset(scsi_qla_host_t *vha)
1273 {
1274         int ret;
1275         struct fc_port *fcport;
1276         struct qla_hw_data *ha = vha->hw;
1277
1278         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1279                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1280                         if (fcport->port_type != FCT_TARGET)
1281                                 continue;
1282
1283                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1284                         if (ret != QLA_SUCCESS) {
1285                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1286                                     "Bus Reset failed: Target Reset=%d "
1287                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1288                         }
1289                 }
1290         }
1291
1292         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1293                 ret = qla2x00_full_login_lip(vha);
1294                 if (ret != QLA_SUCCESS) {
1295                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1296                             "full_login_lip=%d.\n", ret);
1297                 }
1298                 atomic_set(&vha->loop_state, LOOP_DOWN);
1299                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1300                 qla2x00_mark_all_devices_lost(vha, 0);
1301         }
1302
1303         if (ha->flags.enable_lip_reset) {
1304                 ret = qla2x00_lip_reset(vha);
1305                 if (ret != QLA_SUCCESS)
1306                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1307                             "lip_reset failed (%d).\n", ret);
1308         }
1309
1310         /* Issue marker command only when we are going to start the I/O */
1311         vha->marker_needed = 1;
1312
1313         return QLA_SUCCESS;
1314 }
1315
1316 void
1317 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1318 {
1319         int que, cnt;
1320         unsigned long flags;
1321         srb_t *sp;
1322         struct qla_hw_data *ha = vha->hw;
1323         struct req_que *req;
1324
1325         spin_lock_irqsave(&ha->hardware_lock, flags);
1326         for (que = 0; que < ha->max_req_queues; que++) {
1327                 req = ha->req_q_map[que];
1328                 if (!req)
1329                         continue;
1330                 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1331                         sp = req->outstanding_cmds[cnt];
1332                         if (sp) {
1333                                 req->outstanding_cmds[cnt] = NULL;
1334                                 sp->done(vha, sp, res);
1335                         }
1336                 }
1337         }
1338         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1339 }
1340
1341 static int
1342 qla2xxx_slave_alloc(struct scsi_device *sdev)
1343 {
1344         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1345
1346         if (!rport || fc_remote_port_chkready(rport))
1347                 return -ENXIO;
1348
1349         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1350
1351         return 0;
1352 }
1353
1354 static int
1355 qla2xxx_slave_configure(struct scsi_device *sdev)
1356 {
1357         scsi_qla_host_t *vha = shost_priv(sdev->host);
1358         struct req_que *req = vha->req;
1359
1360         if (sdev->tagged_supported)
1361                 scsi_activate_tcq(sdev, req->max_q_depth);
1362         else
1363                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1364         return 0;
1365 }
1366
1367 static void
1368 qla2xxx_slave_destroy(struct scsi_device *sdev)
1369 {
1370         sdev->hostdata = NULL;
1371 }
1372
1373 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1374 {
1375         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1376
1377         if (!scsi_track_queue_full(sdev, qdepth))
1378                 return;
1379
1380         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1381             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1382             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1383 }
1384
1385 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1386 {
1387         fc_port_t *fcport = sdev->hostdata;
1388         struct scsi_qla_host *vha = fcport->vha;
1389         struct req_que *req = NULL;
1390
1391         req = vha->req;
1392         if (!req)
1393                 return;
1394
1395         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1396                 return;
1397
1398         if (sdev->ordered_tags)
1399                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1400         else
1401                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1402
1403         ql_dbg(ql_dbg_io, vha, 0x302a,
1404             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1405             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1406 }
1407
1408 static int
1409 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1410 {
1411         switch (reason) {
1412         case SCSI_QDEPTH_DEFAULT:
1413                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1414                 break;
1415         case SCSI_QDEPTH_QFULL:
1416                 qla2x00_handle_queue_full(sdev, qdepth);
1417                 break;
1418         case SCSI_QDEPTH_RAMP_UP:
1419                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1420                 break;
1421         default:
1422                 return -EOPNOTSUPP;
1423         }
1424
1425         return sdev->queue_depth;
1426 }
1427
1428 static int
1429 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1430 {
1431         if (sdev->tagged_supported) {
1432                 scsi_set_tag_type(sdev, tag_type);
1433                 if (tag_type)
1434                         scsi_activate_tcq(sdev, sdev->queue_depth);
1435                 else
1436                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1437         } else
1438                 tag_type = 0;
1439
1440         return tag_type;
1441 }
1442
1443 /**
1444  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1445  * @ha: HA context
1446  *
1447  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1448  * supported addressing method.
1449  */
1450 static void
1451 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1452 {
1453         /* Assume a 32bit DMA mask. */
1454         ha->flags.enable_64bit_addressing = 0;
1455
1456         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1457                 /* Any upper-dword bits set? */
1458                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1459                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1460                         /* Ok, a 64bit DMA mask is applicable. */
1461                         ha->flags.enable_64bit_addressing = 1;
1462                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1463                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1464                         return;
1465                 }
1466         }
1467
1468         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1469         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1470 }
1471
1472 static void
1473 qla2x00_enable_intrs(struct qla_hw_data *ha)
1474 {
1475         unsigned long flags = 0;
1476         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1477
1478         spin_lock_irqsave(&ha->hardware_lock, flags);
1479         ha->interrupts_on = 1;
1480         /* enable risc and host interrupts */
1481         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1482         RD_REG_WORD(&reg->ictrl);
1483         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1484
1485 }
1486
1487 static void
1488 qla2x00_disable_intrs(struct qla_hw_data *ha)
1489 {
1490         unsigned long flags = 0;
1491         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1492
1493         spin_lock_irqsave(&ha->hardware_lock, flags);
1494         ha->interrupts_on = 0;
1495         /* disable risc and host interrupts */
1496         WRT_REG_WORD(&reg->ictrl, 0);
1497         RD_REG_WORD(&reg->ictrl);
1498         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1499 }
1500
1501 static void
1502 qla24xx_enable_intrs(struct qla_hw_data *ha)
1503 {
1504         unsigned long flags = 0;
1505         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1506
1507         spin_lock_irqsave(&ha->hardware_lock, flags);
1508         ha->interrupts_on = 1;
1509         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1510         RD_REG_DWORD(&reg->ictrl);
1511         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1512 }
1513
1514 static void
1515 qla24xx_disable_intrs(struct qla_hw_data *ha)
1516 {
1517         unsigned long flags = 0;
1518         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1519
1520         if (IS_NOPOLLING_TYPE(ha))
1521                 return;
1522         spin_lock_irqsave(&ha->hardware_lock, flags);
1523         ha->interrupts_on = 0;
1524         WRT_REG_DWORD(&reg->ictrl, 0);
1525         RD_REG_DWORD(&reg->ictrl);
1526         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1527 }
1528
1529 static int
1530 qla2x00_iospace_config(struct qla_hw_data *ha)
1531 {
1532         resource_size_t pio;
1533         uint16_t msix;
1534         int cpus;
1535
1536         if (pci_request_selected_regions(ha->pdev, ha->bars,
1537             QLA2XXX_DRIVER_NAME)) {
1538                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1539                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1540                     pci_name(ha->pdev));
1541                 goto iospace_error_exit;
1542         }
1543         if (!(ha->bars & 1))
1544                 goto skip_pio;
1545
1546         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1547         pio = pci_resource_start(ha->pdev, 0);
1548         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1549                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1550                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1551                             "Invalid pci I/O region size (%s).\n",
1552                             pci_name(ha->pdev));
1553                         pio = 0;
1554                 }
1555         } else {
1556                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1557                     "Region #0 no a PIO resource (%s).\n",
1558                     pci_name(ha->pdev));
1559                 pio = 0;
1560         }
1561         ha->pio_address = pio;
1562         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1563             "PIO address=%llu.\n",
1564             (unsigned long long)ha->pio_address);
1565
1566 skip_pio:
1567         /* Use MMIO operations for all accesses. */
1568         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1569                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1570                     "Region #1 not an MMIO resource (%s), aborting.\n",
1571                     pci_name(ha->pdev));
1572                 goto iospace_error_exit;
1573         }
1574         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1575                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1576                     "Invalid PCI mem region size (%s), aborting.\n",
1577                     pci_name(ha->pdev));
1578                 goto iospace_error_exit;
1579         }
1580
1581         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1582         if (!ha->iobase) {
1583                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1584                     "Cannot remap MMIO (%s), aborting.\n",
1585                     pci_name(ha->pdev));
1586                 goto iospace_error_exit;
1587         }
1588
1589         /* Determine queue resources */
1590         ha->max_req_queues = ha->max_rsp_queues = 1;
1591         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1592                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1593                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1594                 goto mqiobase_exit;
1595
1596         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1597                         pci_resource_len(ha->pdev, 3));
1598         if (ha->mqiobase) {
1599                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1600                     "MQIO Base=%p.\n", ha->mqiobase);
1601                 /* Read MSIX vector size of the board */
1602                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1603                 ha->msix_count = msix;
1604                 /* Max queues are bounded by available msix vectors */
1605                 /* queue 0 uses two msix vectors */
1606                 if (ql2xmultique_tag) {
1607                         cpus = num_online_cpus();
1608                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1609                                 (cpus + 1) : (ha->msix_count - 1);
1610                         ha->max_req_queues = 2;
1611                 } else if (ql2xmaxqueues > 1) {
1612                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1613                             QLA_MQ_SIZE : ql2xmaxqueues;
1614                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1615                             "QoS mode set, max no of request queues:%d.\n",
1616                             ha->max_req_queues);
1617                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1618                             "QoS mode set, max no of request queues:%d.\n",
1619                             ha->max_req_queues);
1620                 }
1621                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1622                     "MSI-X vector count: %d.\n", msix);
1623         } else
1624                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1625                     "BAR 3 not enabled.\n");
1626
1627 mqiobase_exit:
1628         ha->msix_count = ha->max_rsp_queues + 1;
1629         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1630             "MSIX Count:%d.\n", ha->msix_count);
1631         return (0);
1632
1633 iospace_error_exit:
1634         return (-ENOMEM);
1635 }
1636
1637
1638 static int
1639 qla83xx_iospace_config(struct qla_hw_data *ha)
1640 {
1641         uint16_t msix;
1642         int cpus;
1643
1644         if (pci_request_selected_regions(ha->pdev, ha->bars,
1645             QLA2XXX_DRIVER_NAME)) {
1646                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1647                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1648                     pci_name(ha->pdev));
1649
1650                 goto iospace_error_exit;
1651         }
1652
1653         /* Use MMIO operations for all accesses. */
1654         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1655                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1656                     "Invalid pci I/O region size (%s).\n",
1657                     pci_name(ha->pdev));
1658                 goto iospace_error_exit;
1659         }
1660         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1661                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1662                     "Invalid PCI mem region size (%s), aborting\n",
1663                         pci_name(ha->pdev));
1664                 goto iospace_error_exit;
1665         }
1666
1667         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1668         if (!ha->iobase) {
1669                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1670                     "Cannot remap MMIO (%s), aborting.\n",
1671                     pci_name(ha->pdev));
1672                 goto iospace_error_exit;
1673         }
1674
1675         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1676         /* 83XX 26XX always use MQ type access for queues
1677          * - mbar 2, a.k.a region 4 */
1678         ha->max_req_queues = ha->max_rsp_queues = 1;
1679         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1680                         pci_resource_len(ha->pdev, 4));
1681
1682         if (!ha->mqiobase) {
1683                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1684                     "BAR2/region4 not enabled\n");
1685                 goto mqiobase_exit;
1686         }
1687
1688         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1689                         pci_resource_len(ha->pdev, 2));
1690         if (ha->msixbase) {
1691                 /* Read MSIX vector size of the board */
1692                 pci_read_config_word(ha->pdev,
1693                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1694                 ha->msix_count = msix;
1695                 /* Max queues are bounded by available msix vectors */
1696                 /* queue 0 uses two msix vectors */
1697                 if (ql2xmultique_tag) {
1698                         cpus = num_online_cpus();
1699                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1700                                 (cpus + 1) : (ha->msix_count - 1);
1701                         ha->max_req_queues = 2;
1702                 } else if (ql2xmaxqueues > 1) {
1703                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1704                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1705                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1706                             "QoS mode set, max no of request queues:%d.\n",
1707                             ha->max_req_queues);
1708                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1709                             "QoS mode set, max no of request queues:%d.\n",
1710                             ha->max_req_queues);
1711                 }
1712                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1713                     "MSI-X vector count: %d.\n", msix);
1714         } else
1715                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1716                     "BAR 1 not enabled.\n");
1717
1718 mqiobase_exit:
1719         ha->msix_count = ha->max_rsp_queues + 1;
1720         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1721             "MSIX Count:%d.\n", ha->msix_count);
1722         return 0;
1723
1724 iospace_error_exit:
1725         return -ENOMEM;
1726 }
1727
1728 static struct isp_operations qla2100_isp_ops = {
1729         .pci_config             = qla2100_pci_config,
1730         .reset_chip             = qla2x00_reset_chip,
1731         .chip_diag              = qla2x00_chip_diag,
1732         .config_rings           = qla2x00_config_rings,
1733         .reset_adapter          = qla2x00_reset_adapter,
1734         .nvram_config           = qla2x00_nvram_config,
1735         .update_fw_options      = qla2x00_update_fw_options,
1736         .load_risc              = qla2x00_load_risc,
1737         .pci_info_str           = qla2x00_pci_info_str,
1738         .fw_version_str         = qla2x00_fw_version_str,
1739         .intr_handler           = qla2100_intr_handler,
1740         .enable_intrs           = qla2x00_enable_intrs,
1741         .disable_intrs          = qla2x00_disable_intrs,
1742         .abort_command          = qla2x00_abort_command,
1743         .target_reset           = qla2x00_abort_target,
1744         .lun_reset              = qla2x00_lun_reset,
1745         .fabric_login           = qla2x00_login_fabric,
1746         .fabric_logout          = qla2x00_fabric_logout,
1747         .calc_req_entries       = qla2x00_calc_iocbs_32,
1748         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1749         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1750         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1751         .read_nvram             = qla2x00_read_nvram_data,
1752         .write_nvram            = qla2x00_write_nvram_data,
1753         .fw_dump                = qla2100_fw_dump,
1754         .beacon_on              = NULL,
1755         .beacon_off             = NULL,
1756         .beacon_blink           = NULL,
1757         .read_optrom            = qla2x00_read_optrom_data,
1758         .write_optrom           = qla2x00_write_optrom_data,
1759         .get_flash_version      = qla2x00_get_flash_version,
1760         .start_scsi             = qla2x00_start_scsi,
1761         .abort_isp              = qla2x00_abort_isp,
1762         .iospace_config         = qla2x00_iospace_config,
1763 };
1764
1765 static struct isp_operations qla2300_isp_ops = {
1766         .pci_config             = qla2300_pci_config,
1767         .reset_chip             = qla2x00_reset_chip,
1768         .chip_diag              = qla2x00_chip_diag,
1769         .config_rings           = qla2x00_config_rings,
1770         .reset_adapter          = qla2x00_reset_adapter,
1771         .nvram_config           = qla2x00_nvram_config,
1772         .update_fw_options      = qla2x00_update_fw_options,
1773         .load_risc              = qla2x00_load_risc,
1774         .pci_info_str           = qla2x00_pci_info_str,
1775         .fw_version_str         = qla2x00_fw_version_str,
1776         .intr_handler           = qla2300_intr_handler,
1777         .enable_intrs           = qla2x00_enable_intrs,
1778         .disable_intrs          = qla2x00_disable_intrs,
1779         .abort_command          = qla2x00_abort_command,
1780         .target_reset           = qla2x00_abort_target,
1781         .lun_reset              = qla2x00_lun_reset,
1782         .fabric_login           = qla2x00_login_fabric,
1783         .fabric_logout          = qla2x00_fabric_logout,
1784         .calc_req_entries       = qla2x00_calc_iocbs_32,
1785         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1786         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1787         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1788         .read_nvram             = qla2x00_read_nvram_data,
1789         .write_nvram            = qla2x00_write_nvram_data,
1790         .fw_dump                = qla2300_fw_dump,
1791         .beacon_on              = qla2x00_beacon_on,
1792         .beacon_off             = qla2x00_beacon_off,
1793         .beacon_blink           = qla2x00_beacon_blink,
1794         .read_optrom            = qla2x00_read_optrom_data,
1795         .write_optrom           = qla2x00_write_optrom_data,
1796         .get_flash_version      = qla2x00_get_flash_version,
1797         .start_scsi             = qla2x00_start_scsi,
1798         .abort_isp              = qla2x00_abort_isp,
1799         .iospace_config         = qla2x00_iospace_config,
1800 };
1801
1802 static struct isp_operations qla24xx_isp_ops = {
1803         .pci_config             = qla24xx_pci_config,
1804         .reset_chip             = qla24xx_reset_chip,
1805         .chip_diag              = qla24xx_chip_diag,
1806         .config_rings           = qla24xx_config_rings,
1807         .reset_adapter          = qla24xx_reset_adapter,
1808         .nvram_config           = qla24xx_nvram_config,
1809         .update_fw_options      = qla24xx_update_fw_options,
1810         .load_risc              = qla24xx_load_risc,
1811         .pci_info_str           = qla24xx_pci_info_str,
1812         .fw_version_str         = qla24xx_fw_version_str,
1813         .intr_handler           = qla24xx_intr_handler,
1814         .enable_intrs           = qla24xx_enable_intrs,
1815         .disable_intrs          = qla24xx_disable_intrs,
1816         .abort_command          = qla24xx_abort_command,
1817         .target_reset           = qla24xx_abort_target,
1818         .lun_reset              = qla24xx_lun_reset,
1819         .fabric_login           = qla24xx_login_fabric,
1820         .fabric_logout          = qla24xx_fabric_logout,
1821         .calc_req_entries       = NULL,
1822         .build_iocbs            = NULL,
1823         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1824         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1825         .read_nvram             = qla24xx_read_nvram_data,
1826         .write_nvram            = qla24xx_write_nvram_data,
1827         .fw_dump                = qla24xx_fw_dump,
1828         .beacon_on              = qla24xx_beacon_on,
1829         .beacon_off             = qla24xx_beacon_off,
1830         .beacon_blink           = qla24xx_beacon_blink,
1831         .read_optrom            = qla24xx_read_optrom_data,
1832         .write_optrom           = qla24xx_write_optrom_data,
1833         .get_flash_version      = qla24xx_get_flash_version,
1834         .start_scsi             = qla24xx_start_scsi,
1835         .abort_isp              = qla2x00_abort_isp,
1836         .iospace_config         = qla2x00_iospace_config,
1837 };
1838
1839 static struct isp_operations qla25xx_isp_ops = {
1840         .pci_config             = qla25xx_pci_config,
1841         .reset_chip             = qla24xx_reset_chip,
1842         .chip_diag              = qla24xx_chip_diag,
1843         .config_rings           = qla24xx_config_rings,
1844         .reset_adapter          = qla24xx_reset_adapter,
1845         .nvram_config           = qla24xx_nvram_config,
1846         .update_fw_options      = qla24xx_update_fw_options,
1847         .load_risc              = qla24xx_load_risc,
1848         .pci_info_str           = qla24xx_pci_info_str,
1849         .fw_version_str         = qla24xx_fw_version_str,
1850         .intr_handler           = qla24xx_intr_handler,
1851         .enable_intrs           = qla24xx_enable_intrs,
1852         .disable_intrs          = qla24xx_disable_intrs,
1853         .abort_command          = qla24xx_abort_command,
1854         .target_reset           = qla24xx_abort_target,
1855         .lun_reset              = qla24xx_lun_reset,
1856         .fabric_login           = qla24xx_login_fabric,
1857         .fabric_logout          = qla24xx_fabric_logout,
1858         .calc_req_entries       = NULL,
1859         .build_iocbs            = NULL,
1860         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1861         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1862         .read_nvram             = qla25xx_read_nvram_data,
1863         .write_nvram            = qla25xx_write_nvram_data,
1864         .fw_dump                = qla25xx_fw_dump,
1865         .beacon_on              = qla24xx_beacon_on,
1866         .beacon_off             = qla24xx_beacon_off,
1867         .beacon_blink           = qla24xx_beacon_blink,
1868         .read_optrom            = qla25xx_read_optrom_data,
1869         .write_optrom           = qla24xx_write_optrom_data,
1870         .get_flash_version      = qla24xx_get_flash_version,
1871         .start_scsi             = qla24xx_dif_start_scsi,
1872         .abort_isp              = qla2x00_abort_isp,
1873         .iospace_config         = qla2x00_iospace_config,
1874 };
1875
1876 static struct isp_operations qla81xx_isp_ops = {
1877         .pci_config             = qla25xx_pci_config,
1878         .reset_chip             = qla24xx_reset_chip,
1879         .chip_diag              = qla24xx_chip_diag,
1880         .config_rings           = qla24xx_config_rings,
1881         .reset_adapter          = qla24xx_reset_adapter,
1882         .nvram_config           = qla81xx_nvram_config,
1883         .update_fw_options      = qla81xx_update_fw_options,
1884         .load_risc              = qla81xx_load_risc,
1885         .pci_info_str           = qla24xx_pci_info_str,
1886         .fw_version_str         = qla24xx_fw_version_str,
1887         .intr_handler           = qla24xx_intr_handler,
1888         .enable_intrs           = qla24xx_enable_intrs,
1889         .disable_intrs          = qla24xx_disable_intrs,
1890         .abort_command          = qla24xx_abort_command,
1891         .target_reset           = qla24xx_abort_target,
1892         .lun_reset              = qla24xx_lun_reset,
1893         .fabric_login           = qla24xx_login_fabric,
1894         .fabric_logout          = qla24xx_fabric_logout,
1895         .calc_req_entries       = NULL,
1896         .build_iocbs            = NULL,
1897         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1898         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1899         .read_nvram             = NULL,
1900         .write_nvram            = NULL,
1901         .fw_dump                = qla81xx_fw_dump,
1902         .beacon_on              = qla24xx_beacon_on,
1903         .beacon_off             = qla24xx_beacon_off,
1904         .beacon_blink           = qla83xx_beacon_blink,
1905         .read_optrom            = qla25xx_read_optrom_data,
1906         .write_optrom           = qla24xx_write_optrom_data,
1907         .get_flash_version      = qla24xx_get_flash_version,
1908         .start_scsi             = qla24xx_dif_start_scsi,
1909         .abort_isp              = qla2x00_abort_isp,
1910         .iospace_config         = qla2x00_iospace_config,
1911 };
1912
1913 static struct isp_operations qla82xx_isp_ops = {
1914         .pci_config             = qla82xx_pci_config,
1915         .reset_chip             = qla82xx_reset_chip,
1916         .chip_diag              = qla24xx_chip_diag,
1917         .config_rings           = qla82xx_config_rings,
1918         .reset_adapter          = qla24xx_reset_adapter,
1919         .nvram_config           = qla81xx_nvram_config,
1920         .update_fw_options      = qla24xx_update_fw_options,
1921         .load_risc              = qla82xx_load_risc,
1922         .pci_info_str           = qla82xx_pci_info_str,
1923         .fw_version_str         = qla24xx_fw_version_str,
1924         .intr_handler           = qla82xx_intr_handler,
1925         .enable_intrs           = qla82xx_enable_intrs,
1926         .disable_intrs          = qla82xx_disable_intrs,
1927         .abort_command          = qla24xx_abort_command,
1928         .target_reset           = qla24xx_abort_target,
1929         .lun_reset              = qla24xx_lun_reset,
1930         .fabric_login           = qla24xx_login_fabric,
1931         .fabric_logout          = qla24xx_fabric_logout,
1932         .calc_req_entries       = NULL,
1933         .build_iocbs            = NULL,
1934         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1935         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1936         .read_nvram             = qla24xx_read_nvram_data,
1937         .write_nvram            = qla24xx_write_nvram_data,
1938         .fw_dump                = qla24xx_fw_dump,
1939         .beacon_on              = qla82xx_beacon_on,
1940         .beacon_off             = qla82xx_beacon_off,
1941         .beacon_blink           = NULL,
1942         .read_optrom            = qla82xx_read_optrom_data,
1943         .write_optrom           = qla82xx_write_optrom_data,
1944         .get_flash_version      = qla24xx_get_flash_version,
1945         .start_scsi             = qla82xx_start_scsi,
1946         .abort_isp              = qla82xx_abort_isp,
1947         .iospace_config         = qla82xx_iospace_config,
1948 };
1949
1950 static struct isp_operations qla83xx_isp_ops = {
1951         .pci_config             = qla25xx_pci_config,
1952         .reset_chip             = qla24xx_reset_chip,
1953         .chip_diag              = qla24xx_chip_diag,
1954         .config_rings           = qla24xx_config_rings,
1955         .reset_adapter          = qla24xx_reset_adapter,
1956         .nvram_config           = qla81xx_nvram_config,
1957         .update_fw_options      = qla81xx_update_fw_options,
1958         .load_risc              = qla81xx_load_risc,
1959         .pci_info_str           = qla24xx_pci_info_str,
1960         .fw_version_str         = qla24xx_fw_version_str,
1961         .intr_handler           = qla24xx_intr_handler,
1962         .enable_intrs           = qla24xx_enable_intrs,
1963         .disable_intrs          = qla24xx_disable_intrs,
1964         .abort_command          = qla24xx_abort_command,
1965         .target_reset           = qla24xx_abort_target,
1966         .lun_reset              = qla24xx_lun_reset,
1967         .fabric_login           = qla24xx_login_fabric,
1968         .fabric_logout          = qla24xx_fabric_logout,
1969         .calc_req_entries       = NULL,
1970         .build_iocbs            = NULL,
1971         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1972         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1973         .read_nvram             = NULL,
1974         .write_nvram            = NULL,
1975         .fw_dump                = qla83xx_fw_dump,
1976         .beacon_on              = qla24xx_beacon_on,
1977         .beacon_off             = qla24xx_beacon_off,
1978         .beacon_blink           = qla83xx_beacon_blink,
1979         .read_optrom            = qla25xx_read_optrom_data,
1980         .write_optrom           = qla24xx_write_optrom_data,
1981         .get_flash_version      = qla24xx_get_flash_version,
1982         .start_scsi             = qla24xx_dif_start_scsi,
1983         .abort_isp              = qla2x00_abort_isp,
1984         .iospace_config         = qla83xx_iospace_config,
1985 };
1986
1987 static inline void
1988 qla2x00_set_isp_flags(struct qla_hw_data *ha)
1989 {
1990         ha->device_type = DT_EXTENDED_IDS;
1991         switch (ha->pdev->device) {
1992         case PCI_DEVICE_ID_QLOGIC_ISP2100:
1993                 ha->device_type |= DT_ISP2100;
1994                 ha->device_type &= ~DT_EXTENDED_IDS;
1995                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1996                 break;
1997         case PCI_DEVICE_ID_QLOGIC_ISP2200:
1998                 ha->device_type |= DT_ISP2200;
1999                 ha->device_type &= ~DT_EXTENDED_IDS;
2000                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2001                 break;
2002         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2003                 ha->device_type |= DT_ISP2300;
2004                 ha->device_type |= DT_ZIO_SUPPORTED;
2005                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2006                 break;
2007         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2008                 ha->device_type |= DT_ISP2312;
2009                 ha->device_type |= DT_ZIO_SUPPORTED;
2010                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2011                 break;
2012         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2013                 ha->device_type |= DT_ISP2322;
2014                 ha->device_type |= DT_ZIO_SUPPORTED;
2015                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2016                     ha->pdev->subsystem_device == 0x0170)
2017                         ha->device_type |= DT_OEM_001;
2018                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2019                 break;
2020         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2021                 ha->device_type |= DT_ISP6312;
2022                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2023                 break;
2024         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2025                 ha->device_type |= DT_ISP6322;
2026                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2027                 break;
2028         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2029                 ha->device_type |= DT_ISP2422;
2030                 ha->device_type |= DT_ZIO_SUPPORTED;
2031                 ha->device_type |= DT_FWI2;
2032                 ha->device_type |= DT_IIDMA;
2033                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2034                 break;
2035         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2036                 ha->device_type |= DT_ISP2432;
2037                 ha->device_type |= DT_ZIO_SUPPORTED;
2038                 ha->device_type |= DT_FWI2;
2039                 ha->device_type |= DT_IIDMA;
2040                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2041                 break;
2042         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2043                 ha->device_type |= DT_ISP8432;
2044                 ha->device_type |= DT_ZIO_SUPPORTED;
2045                 ha->device_type |= DT_FWI2;
2046                 ha->device_type |= DT_IIDMA;
2047                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2048                 break;
2049         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2050                 ha->device_type |= DT_ISP5422;
2051                 ha->device_type |= DT_FWI2;
2052                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2053                 break;
2054         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2055                 ha->device_type |= DT_ISP5432;
2056                 ha->device_type |= DT_FWI2;
2057                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2058                 break;
2059         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2060                 ha->device_type |= DT_ISP2532;
2061                 ha->device_type |= DT_ZIO_SUPPORTED;
2062                 ha->device_type |= DT_FWI2;
2063                 ha->device_type |= DT_IIDMA;
2064                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2065                 break;
2066         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2067                 ha->device_type |= DT_ISP8001;
2068                 ha->device_type |= DT_ZIO_SUPPORTED;
2069                 ha->device_type |= DT_FWI2;
2070                 ha->device_type |= DT_IIDMA;
2071                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2072                 break;
2073         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2074                 ha->device_type |= DT_ISP8021;
2075                 ha->device_type |= DT_ZIO_SUPPORTED;
2076                 ha->device_type |= DT_FWI2;
2077                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2078                 /* Initialize 82XX ISP flags */
2079                 qla82xx_init_flags(ha);
2080                 break;
2081         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2082                 ha->device_type |= DT_ISP2031;
2083                 ha->device_type |= DT_ZIO_SUPPORTED;
2084                 ha->device_type |= DT_FWI2;
2085                 ha->device_type |= DT_IIDMA;
2086                 ha->device_type |= DT_T10_PI;
2087                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2088                 break;
2089         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2090                 ha->device_type |= DT_ISP8031;
2091                 ha->device_type |= DT_ZIO_SUPPORTED;
2092                 ha->device_type |= DT_FWI2;
2093                 ha->device_type |= DT_IIDMA;
2094                 ha->device_type |= DT_T10_PI;
2095                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2096                 break;
2097         }
2098
2099         if (IS_QLA82XX(ha))
2100                 ha->port_no = !(ha->portnum & 1);
2101         else
2102                 /* Get adapter physical port no from interrupt pin register. */
2103                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2104
2105         if (ha->port_no & 1)
2106                 ha->flags.port0 = 1;
2107         else
2108                 ha->flags.port0 = 0;
2109         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2110             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2111             ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2112 }
2113
2114 static void
2115 qla2xxx_scan_start(struct Scsi_Host *shost)
2116 {
2117         scsi_qla_host_t *vha = shost_priv(shost);
2118
2119         if (vha->hw->flags.running_gold_fw)
2120                 return;
2121
2122         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2123         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2124         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2125         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2126 }
2127
2128 static int
2129 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2130 {
2131         scsi_qla_host_t *vha = shost_priv(shost);
2132
2133         if (!vha->host)
2134                 return 1;
2135         if (time > vha->hw->loop_reset_delay * HZ)
2136                 return 1;
2137
2138         return atomic_read(&vha->loop_state) == LOOP_READY;
2139 }
2140
2141 /*
2142  * PCI driver interface
2143  */
2144 static int __devinit
2145 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2146 {
2147         int     ret = -ENODEV;
2148         struct Scsi_Host *host;
2149         scsi_qla_host_t *base_vha = NULL;
2150         struct qla_hw_data *ha;
2151         char pci_info[30];
2152         char fw_str[30], wq_name[30];
2153         struct scsi_host_template *sht;
2154         int bars, mem_only = 0;
2155         uint16_t req_length = 0, rsp_length = 0;
2156         struct req_que *req = NULL;
2157         struct rsp_que *rsp = NULL;
2158
2159         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2160         sht = &qla2xxx_driver_template;
2161         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2162             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2163             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2164             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2165             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2166             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2167             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2168             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2169             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2170             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031) {
2171                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2172                 mem_only = 1;
2173                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2174                     "Mem only adapter.\n");
2175         }
2176         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2177             "Bars=%d.\n", bars);
2178
2179         if (mem_only) {
2180                 if (pci_enable_device_mem(pdev))
2181                         goto probe_out;
2182         } else {
2183                 if (pci_enable_device(pdev))
2184                         goto probe_out;
2185         }
2186
2187         /* This may fail but that's ok */
2188         pci_enable_pcie_error_reporting(pdev);
2189
2190         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2191         if (!ha) {
2192                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2193                     "Unable to allocate memory for ha.\n");
2194                 goto probe_out;
2195         }
2196         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2197             "Memory allocated for ha=%p.\n", ha);
2198         ha->pdev = pdev;
2199         ha->tgt.enable_class_2 = ql2xenableclass2;
2200
2201         /* Clear our data area */
2202         ha->bars = bars;
2203         ha->mem_only = mem_only;
2204         spin_lock_init(&ha->hardware_lock);
2205         spin_lock_init(&ha->vport_slock);
2206         mutex_init(&ha->selflogin_lock);
2207
2208         /* Set ISP-type information. */
2209         qla2x00_set_isp_flags(ha);
2210
2211         /* Set EEH reset type to fundamental if required by hba */
2212         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha))
2213                 pdev->needs_freset = 1;
2214
2215         ha->prev_topology = 0;
2216         ha->init_cb_size = sizeof(init_cb_t);
2217         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2218         ha->optrom_size = OPTROM_SIZE_2300;
2219
2220         /* Assign ISP specific operations. */
2221         if (IS_QLA2100(ha)) {
2222                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2223                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2224                 req_length = REQUEST_ENTRY_CNT_2100;
2225                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2226                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2227                 ha->gid_list_info_size = 4;
2228                 ha->flash_conf_off = ~0;
2229                 ha->flash_data_off = ~0;
2230                 ha->nvram_conf_off = ~0;
2231                 ha->nvram_data_off = ~0;
2232                 ha->isp_ops = &qla2100_isp_ops;
2233         } else if (IS_QLA2200(ha)) {
2234                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2235                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2236                 req_length = REQUEST_ENTRY_CNT_2200;
2237                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2238                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2239                 ha->gid_list_info_size = 4;
2240                 ha->flash_conf_off = ~0;
2241                 ha->flash_data_off = ~0;
2242                 ha->nvram_conf_off = ~0;
2243                 ha->nvram_data_off = ~0;
2244                 ha->isp_ops = &qla2100_isp_ops;
2245         } else if (IS_QLA23XX(ha)) {
2246                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2247                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2248                 req_length = REQUEST_ENTRY_CNT_2200;
2249                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2250                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2251                 ha->gid_list_info_size = 6;
2252                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2253                         ha->optrom_size = OPTROM_SIZE_2322;
2254                 ha->flash_conf_off = ~0;
2255                 ha->flash_data_off = ~0;
2256                 ha->nvram_conf_off = ~0;
2257                 ha->nvram_data_off = ~0;
2258                 ha->isp_ops = &qla2300_isp_ops;
2259         } else if (IS_QLA24XX_TYPE(ha)) {
2260                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2261                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2262                 req_length = REQUEST_ENTRY_CNT_24XX;
2263                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2264                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2265                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2266                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2267                 ha->gid_list_info_size = 8;
2268                 ha->optrom_size = OPTROM_SIZE_24XX;
2269                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2270                 ha->isp_ops = &qla24xx_isp_ops;
2271                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2272                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2273                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2274                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2275         } else if (IS_QLA25XX(ha)) {
2276                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2277                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2278                 req_length = REQUEST_ENTRY_CNT_24XX;
2279                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2280                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2281                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2282                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2283                 ha->gid_list_info_size = 8;
2284                 ha->optrom_size = OPTROM_SIZE_25XX;
2285                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2286                 ha->isp_ops = &qla25xx_isp_ops;
2287                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2288                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2289                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2290                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2291         } else if (IS_QLA81XX(ha)) {
2292                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2293                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2294                 req_length = REQUEST_ENTRY_CNT_24XX;
2295                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2296                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2297                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2298                 ha->gid_list_info_size = 8;
2299                 ha->optrom_size = OPTROM_SIZE_81XX;
2300                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2301                 ha->isp_ops = &qla81xx_isp_ops;
2302                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2303                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2304                 ha->nvram_conf_off = ~0;
2305                 ha->nvram_data_off = ~0;
2306         } else if (IS_QLA82XX(ha)) {
2307                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2308                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2309                 req_length = REQUEST_ENTRY_CNT_82XX;
2310                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2311                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2312                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2313                 ha->gid_list_info_size = 8;
2314                 ha->optrom_size = OPTROM_SIZE_82XX;
2315                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2316                 ha->isp_ops = &qla82xx_isp_ops;
2317                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2318                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2319                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2320                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2321         } else if (IS_QLA83XX(ha)) {
2322                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2323                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2324                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2325                 req_length = REQUEST_ENTRY_CNT_24XX;
2326                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2327                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2328                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2329                 ha->gid_list_info_size = 8;
2330                 ha->optrom_size = OPTROM_SIZE_83XX;
2331                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2332                 ha->isp_ops = &qla83xx_isp_ops;
2333                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2334                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2335                 ha->nvram_conf_off = ~0;
2336                 ha->nvram_data_off = ~0;
2337         }
2338
2339         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2340             "mbx_count=%d, req_length=%d, "
2341             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2342             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2343             "max_fibre_devices=%d.\n",
2344             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2345             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2346             ha->nvram_npiv_size, ha->max_fibre_devices);
2347         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2348             "isp_ops=%p, flash_conf_off=%d, "
2349             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2350             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2351             ha->nvram_conf_off, ha->nvram_data_off);
2352
2353         /* Configure PCI I/O space */
2354         ret = ha->isp_ops->iospace_config(ha);
2355         if (ret)
2356                 goto probe_hw_failed;
2357
2358         ql_log_pci(ql_log_info, pdev, 0x001d,
2359             "Found an ISP%04X irq %d iobase 0x%p.\n",
2360             pdev->device, pdev->irq, ha->iobase);
2361         mutex_init(&ha->vport_lock);
2362         init_completion(&ha->mbx_cmd_comp);
2363         complete(&ha->mbx_cmd_comp);
2364         init_completion(&ha->mbx_intr_comp);
2365         init_completion(&ha->dcbx_comp);
2366
2367         set_bit(0, (unsigned long *) ha->vp_idx_map);
2368
2369         qla2x00_config_dma_addressing(ha);
2370         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2371             "64 Bit addressing is %s.\n",
2372             ha->flags.enable_64bit_addressing ? "enable" :
2373             "disable");
2374         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2375         if (!ret) {
2376                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2377                     "Failed to allocate memory for adapter, aborting.\n");
2378
2379                 goto probe_hw_failed;
2380         }
2381
2382         req->max_q_depth = MAX_Q_DEPTH;
2383         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2384                 req->max_q_depth = ql2xmaxqdepth;
2385
2386
2387         base_vha = qla2x00_create_host(sht, ha);
2388         if (!base_vha) {
2389                 ret = -ENOMEM;
2390                 qla2x00_mem_free(ha);
2391                 qla2x00_free_req_que(ha, req);
2392                 qla2x00_free_rsp_que(ha, rsp);
2393                 goto probe_hw_failed;
2394         }
2395
2396         pci_set_drvdata(pdev, base_vha);
2397
2398         host = base_vha->host;
2399         base_vha->req = req;
2400         host->can_queue = req->length + 128;
2401         if (IS_QLA2XXX_MIDTYPE(ha))
2402                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2403         else
2404                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2405                                                 base_vha->vp_idx;
2406
2407         /* Set the SG table size based on ISP type */
2408         if (!IS_FWI2_CAPABLE(ha)) {
2409                 if (IS_QLA2100(ha))
2410                         host->sg_tablesize = 32;
2411         } else {
2412                 if (!IS_QLA82XX(ha))
2413                         host->sg_tablesize = QLA_SG_ALL;
2414         }
2415         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2416             "can_queue=%d, req=%p, "
2417             "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2418             host->can_queue, base_vha->req,
2419             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2420         host->max_id = ha->max_fibre_devices;
2421         host->this_id = 255;
2422         host->cmd_per_lun = 3;
2423         host->unique_id = host->host_no;
2424         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2425                 host->max_cmd_len = 32;
2426         else
2427                 host->max_cmd_len = MAX_CMDSZ;
2428         host->max_channel = MAX_BUSES - 1;
2429         host->max_lun = ql2xmaxlun;
2430         host->transportt = qla2xxx_transport_template;
2431         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2432
2433         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2434             "max_id=%d this_id=%d "
2435             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2436             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2437             host->this_id, host->cmd_per_lun, host->unique_id,
2438             host->max_cmd_len, host->max_channel, host->max_lun,
2439             host->transportt, sht->vendor_id);
2440
2441 que_init:
2442         /* Alloc arrays of request and response ring ptrs */
2443         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2444                 ql_log(ql_log_fatal, base_vha, 0x003d,
2445                     "Failed to allocate memory for queue pointers..."
2446                     "aborting.\n");
2447                 goto probe_init_failed;
2448         }
2449
2450         qlt_probe_one_stage1(base_vha, ha);
2451
2452         /* Set up the irqs */
2453         ret = qla2x00_request_irqs(ha, rsp);
2454         if (ret)
2455                 goto probe_init_failed;
2456
2457         pci_save_state(pdev);
2458
2459         /* Assign back pointers */
2460         rsp->req = req;
2461         req->rsp = rsp;
2462
2463         /* FWI2-capable only. */
2464         req->req_q_in = &ha->iobase->isp24.req_q_in;
2465         req->req_q_out = &ha->iobase->isp24.req_q_out;
2466         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2467         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2468         if (ha->mqenable || IS_QLA83XX(ha)) {
2469                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2470                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2471                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2472                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2473         }
2474
2475         if (IS_QLA82XX(ha)) {
2476                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2477                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2478                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2479         }
2480
2481         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2482             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2483             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2484         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2485             "req->req_q_in=%p req->req_q_out=%p "
2486             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2487             req->req_q_in, req->req_q_out,
2488             rsp->rsp_q_in, rsp->rsp_q_out);
2489         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2490             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2491             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2492         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2493             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2494             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2495
2496         if (qla2x00_initialize_adapter(base_vha)) {
2497                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2498                     "Failed to initialize adapter - Adapter flags %x.\n",
2499                     base_vha->device_flags);
2500
2501                 if (IS_QLA82XX(ha)) {
2502                         qla82xx_idc_lock(ha);
2503                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2504                                 QLA8XXX_DEV_FAILED);
2505                         qla82xx_idc_unlock(ha);
2506                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2507                             "HW State: FAILED.\n");
2508                 }
2509
2510                 ret = -ENODEV;
2511                 goto probe_failed;
2512         }
2513
2514         if (ha->mqenable) {
2515                 if (qla25xx_setup_mode(base_vha)) {
2516                         ql_log(ql_log_warn, base_vha, 0x00ec,
2517                             "Failed to create queues, falling back to single queue mode.\n");
2518                         goto que_init;
2519                 }
2520         }
2521
2522         if (ha->flags.running_gold_fw)
2523                 goto skip_dpc;
2524
2525         /*
2526          * Startup the kernel thread for this host adapter
2527          */
2528         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2529             "%s_dpc", base_vha->host_str);
2530         if (IS_ERR(ha->dpc_thread)) {
2531                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2532                     "Failed to start DPC thread.\n");
2533                 ret = PTR_ERR(ha->dpc_thread);
2534                 goto probe_failed;
2535         }
2536         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2537             "DPC thread started successfully.\n");
2538
2539         /*
2540          * If we're not coming up in initiator mode, we might sit for
2541          * a while without waking up the dpc thread, which leads to a
2542          * stuck process warning.  So just kick the dpc once here and
2543          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2544          */
2545         qla2xxx_wake_dpc(base_vha);
2546
2547         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2548                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2549                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2550                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2551
2552                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2553                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2554                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2555                 INIT_WORK(&ha->idc_state_handler,
2556                     qla83xx_idc_state_handler_work);
2557                 INIT_WORK(&ha->nic_core_unrecoverable,
2558                     qla83xx_nic_core_unrecoverable_work);
2559         }
2560
2561 skip_dpc:
2562         list_add_tail(&base_vha->list, &ha->vp_list);
2563         base_vha->host->irq = ha->pdev->irq;
2564
2565         /* Initialized the timer */
2566         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2567         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2568             "Started qla2x00_timer with "
2569             "interval=%d.\n", WATCH_INTERVAL);
2570         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2571             "Detected hba at address=%p.\n",
2572             ha);
2573
2574         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2575                 if (ha->fw_attributes & BIT_4) {
2576                         int prot = 0;
2577                         base_vha->flags.difdix_supported = 1;
2578                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2579                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2580                         if (ql2xenabledif == 1)
2581                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2582                         scsi_host_set_prot(host,
2583                             prot | SHOST_DIF_TYPE1_PROTECTION
2584                             | SHOST_DIF_TYPE2_PROTECTION
2585                             | SHOST_DIF_TYPE3_PROTECTION
2586                             | SHOST_DIX_TYPE1_PROTECTION
2587                             | SHOST_DIX_TYPE2_PROTECTION
2588                             | SHOST_DIX_TYPE3_PROTECTION);
2589                         scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2590                 } else
2591                         base_vha->flags.difdix_supported = 0;
2592         }
2593
2594         ha->isp_ops->enable_intrs(ha);
2595
2596         ret = scsi_add_host(host, &pdev->dev);
2597         if (ret)
2598                 goto probe_failed;
2599
2600         base_vha->flags.init_done = 1;
2601         base_vha->flags.online = 1;
2602
2603         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2604             "Init done and hba is online.\n");
2605
2606         if (qla_ini_mode_enabled(base_vha))
2607                 scsi_scan_host(host);
2608         else
2609                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2610                         "skipping scsi_scan_host() for non-initiator port\n");
2611
2612         qla2x00_alloc_sysfs_attr(base_vha);
2613
2614         qla2x00_init_host_attr(base_vha);
2615
2616         qla2x00_dfs_setup(base_vha);
2617
2618         ql_log(ql_log_info, base_vha, 0x00fb,
2619             "QLogic %s - %s.\n",
2620             ha->model_number, ha->model_desc ? ha->model_desc : "");
2621         ql_log(ql_log_info, base_vha, 0x00fc,
2622             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2623             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2624             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2625             base_vha->host_no,
2626             ha->isp_ops->fw_version_str(base_vha, fw_str));
2627
2628         qlt_add_target(ha, base_vha);
2629
2630         return 0;
2631
2632 probe_init_failed:
2633         qla2x00_free_req_que(ha, req);
2634         ha->req_q_map[0] = NULL;
2635         clear_bit(0, ha->req_qid_map);
2636         qla2x00_free_rsp_que(ha, rsp);
2637         ha->rsp_q_map[0] = NULL;
2638         clear_bit(0, ha->rsp_qid_map);
2639         ha->max_req_queues = ha->max_rsp_queues = 0;
2640
2641 probe_failed:
2642         if (base_vha->timer_active)
2643                 qla2x00_stop_timer(base_vha);
2644         base_vha->flags.online = 0;
2645         if (ha->dpc_thread) {
2646                 struct task_struct *t = ha->dpc_thread;
2647
2648                 ha->dpc_thread = NULL;
2649                 kthread_stop(t);
2650         }
2651
2652         qla2x00_free_device(base_vha);
2653
2654         scsi_host_put(base_vha->host);
2655
2656 probe_hw_failed:
2657         if (IS_QLA82XX(ha)) {
2658                 qla82xx_idc_lock(ha);
2659                 qla82xx_clear_drv_active(ha);
2660                 qla82xx_idc_unlock(ha);
2661                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2662                 if (!ql2xdbwr)
2663                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2664         } else {
2665                 if (ha->iobase)
2666                         iounmap(ha->iobase);
2667         }
2668         pci_release_selected_regions(ha->pdev, ha->bars);
2669         kfree(ha);
2670         ha = NULL;
2671
2672 probe_out:
2673         pci_disable_device(pdev);
2674         return ret;
2675 }
2676
2677 static void
2678 qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
2679 {
2680         struct qla_hw_data *ha = vha->hw;
2681         struct task_struct *t = ha->dpc_thread;
2682
2683         if (ha->dpc_thread == NULL)
2684                 return;
2685         /*
2686          * qla2xxx_wake_dpc checks for ->dpc_thread
2687          * so we need to zero it out.
2688          */
2689         ha->dpc_thread = NULL;
2690         kthread_stop(t);
2691 }
2692
2693 static void
2694 qla2x00_shutdown(struct pci_dev *pdev)
2695 {
2696         scsi_qla_host_t *vha;
2697         struct qla_hw_data  *ha;
2698
2699         vha = pci_get_drvdata(pdev);
2700         ha = vha->hw;
2701
2702         /* Turn-off FCE trace */
2703         if (ha->flags.fce_enabled) {
2704                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2705                 ha->flags.fce_enabled = 0;
2706         }
2707
2708         /* Turn-off EFT trace */
2709         if (ha->eft)
2710                 qla2x00_disable_eft_trace(vha);
2711
2712         /* Stop currently executing firmware. */
2713         qla2x00_try_to_stop_firmware(vha);
2714
2715         /* Turn adapter off line */
2716         vha->flags.online = 0;
2717
2718         /* turn-off interrupts on the card */
2719         if (ha->interrupts_on) {
2720                 vha->flags.init_done = 0;
2721                 ha->isp_ops->disable_intrs(ha);
2722         }
2723
2724         qla2x00_free_irqs(vha);
2725
2726         qla2x00_free_fw_dump(ha);
2727 }
2728
2729 static void
2730 qla2x00_remove_one(struct pci_dev *pdev)
2731 {
2732         scsi_qla_host_t *base_vha, *vha;
2733         struct qla_hw_data  *ha;
2734         unsigned long flags;
2735
2736         /*
2737          * If the PCI device is disabled that means that probe failed and any
2738          * resources should be have cleaned up on probe exit.
2739          */
2740         if (!atomic_read(&pdev->enable_cnt))
2741                 return;
2742
2743         base_vha = pci_get_drvdata(pdev);
2744         ha = base_vha->hw;
2745
2746         ha->flags.host_shutting_down = 1;
2747
2748         mutex_lock(&ha->vport_lock);
2749         while (ha->cur_vport_count) {
2750                 struct Scsi_Host *scsi_host;
2751
2752                 spin_lock_irqsave(&ha->vport_slock, flags);
2753
2754                 BUG_ON(base_vha->list.next == &ha->vp_list);
2755                 /* This assumes first entry in ha->vp_list is always base vha */
2756                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2757                 scsi_host = scsi_host_get(vha->host);
2758
2759                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2760                 mutex_unlock(&ha->vport_lock);
2761
2762                 fc_vport_terminate(vha->fc_vport);
2763                 scsi_host_put(vha->host);
2764
2765                 mutex_lock(&ha->vport_lock);
2766         }
2767         mutex_unlock(&ha->vport_lock);
2768
2769         if (IS_QLA8031(ha)) {
2770                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
2771                     "Clearing fcoe driver presence.\n");
2772                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
2773                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
2774                             "Error while clearing DRV-Presence.\n");
2775         }
2776
2777         set_bit(UNLOADING, &base_vha->dpc_flags);
2778
2779         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2780
2781         qla2x00_dfs_remove(base_vha);
2782
2783         qla84xx_put_chip(base_vha);
2784
2785         /* Disable timer */
2786         if (base_vha->timer_active)
2787                 qla2x00_stop_timer(base_vha);
2788
2789         base_vha->flags.online = 0;
2790
2791         /* Flush the work queue and remove it */
2792         if (ha->wq) {
2793                 flush_workqueue(ha->wq);
2794                 destroy_workqueue(ha->wq);
2795                 ha->wq = NULL;
2796         }
2797
2798         /* Cancel all work and destroy DPC workqueues */
2799         if (ha->dpc_lp_wq) {
2800                 cancel_work_sync(&ha->idc_aen);
2801                 destroy_workqueue(ha->dpc_lp_wq);
2802                 ha->dpc_lp_wq = NULL;
2803         }
2804
2805         if (ha->dpc_hp_wq) {
2806                 cancel_work_sync(&ha->nic_core_reset);
2807                 cancel_work_sync(&ha->idc_state_handler);
2808                 cancel_work_sync(&ha->nic_core_unrecoverable);
2809                 destroy_workqueue(ha->dpc_hp_wq);
2810                 ha->dpc_hp_wq = NULL;
2811         }
2812
2813         /* Kill the kernel thread for this host */
2814         if (ha->dpc_thread) {
2815                 struct task_struct *t = ha->dpc_thread;
2816
2817                 /*
2818                  * qla2xxx_wake_dpc checks for ->dpc_thread
2819                  * so we need to zero it out.
2820                  */
2821                 ha->dpc_thread = NULL;
2822                 kthread_stop(t);
2823         }
2824         qlt_remove_target(ha, base_vha);
2825
2826         qla2x00_free_sysfs_attr(base_vha);
2827
2828         fc_remove_host(base_vha->host);
2829
2830         scsi_remove_host(base_vha->host);
2831
2832         qla2x00_free_device(base_vha);
2833
2834         scsi_host_put(base_vha->host);
2835
2836         if (IS_QLA82XX(ha)) {
2837                 qla82xx_idc_lock(ha);
2838                 qla82xx_clear_drv_active(ha);
2839                 qla82xx_idc_unlock(ha);
2840
2841                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2842                 if (!ql2xdbwr)
2843                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2844         } else {
2845                 if (ha->iobase)
2846                         iounmap(ha->iobase);
2847
2848                 if (ha->mqiobase)
2849                         iounmap(ha->mqiobase);
2850
2851                 if (IS_QLA83XX(ha) && ha->msixbase)
2852                         iounmap(ha->msixbase);
2853         }
2854
2855         pci_release_selected_regions(ha->pdev, ha->bars);
2856         kfree(ha);
2857         ha = NULL;
2858
2859         pci_disable_pcie_error_reporting(pdev);
2860
2861         pci_disable_device(pdev);
2862         pci_set_drvdata(pdev, NULL);
2863 }
2864
2865 static void
2866 qla2x00_free_device(scsi_qla_host_t *vha)
2867 {
2868         struct qla_hw_data *ha = vha->hw;
2869
2870         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2871
2872         /* Disable timer */
2873         if (vha->timer_active)
2874                 qla2x00_stop_timer(vha);
2875
2876         qla2x00_stop_dpc_thread(vha);
2877
2878         qla25xx_delete_queues(vha);
2879         if (ha->flags.fce_enabled)
2880                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2881
2882         if (ha->eft)
2883                 qla2x00_disable_eft_trace(vha);
2884
2885         /* Stop currently executing firmware. */
2886         qla2x00_try_to_stop_firmware(vha);
2887
2888         vha->flags.online = 0;
2889
2890         /* turn-off interrupts on the card */
2891         if (ha->interrupts_on) {
2892                 vha->flags.init_done = 0;
2893                 ha->isp_ops->disable_intrs(ha);
2894         }
2895
2896         qla2x00_free_irqs(vha);
2897
2898         qla2x00_free_fcports(vha);
2899
2900         qla2x00_mem_free(ha);
2901
2902         qla82xx_md_free(vha);
2903
2904         qla2x00_free_queues(ha);
2905 }
2906
2907 void qla2x00_free_fcports(struct scsi_qla_host *vha)
2908 {
2909         fc_port_t *fcport, *tfcport;
2910
2911         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2912                 list_del(&fcport->list);
2913                 qla2x00_clear_loop_id(fcport);
2914                 kfree(fcport);
2915                 fcport = NULL;
2916         }
2917 }
2918
2919 static inline void
2920 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
2921     int defer)
2922 {
2923         struct fc_rport *rport;
2924         scsi_qla_host_t *base_vha;
2925         unsigned long flags;
2926
2927         if (!fcport->rport)
2928                 return;
2929
2930         rport = fcport->rport;
2931         if (defer) {
2932                 base_vha = pci_get_drvdata(vha->hw->pdev);
2933                 spin_lock_irqsave(vha->host->host_lock, flags);
2934                 fcport->drport = rport;
2935                 spin_unlock_irqrestore(vha->host->host_lock, flags);
2936                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2937                 qla2xxx_wake_dpc(base_vha);
2938         } else {
2939                 fc_remote_port_delete(rport);
2940                 qlt_fc_port_deleted(vha, fcport);
2941         }
2942 }
2943
2944 /*
2945  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2946  *
2947  * Input: ha = adapter block pointer.  fcport = port structure pointer.
2948  *
2949  * Return: None.
2950  *
2951  * Context:
2952  */
2953 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
2954     int do_login, int defer)
2955 {
2956         if (atomic_read(&fcport->state) == FCS_ONLINE &&
2957             vha->vp_idx == fcport->vha->vp_idx) {
2958                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2959                 qla2x00_schedule_rport_del(vha, fcport, defer);
2960         }
2961         /*
2962          * We may need to retry the login, so don't change the state of the
2963          * port but do the retries.
2964          */
2965         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2966                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2967
2968         if (!do_login)
2969                 return;
2970
2971         if (fcport->login_retry == 0) {
2972                 fcport->login_retry = vha->hw->login_retry_count;
2973                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2974
2975                 ql_dbg(ql_dbg_disc, vha, 0x2067,
2976                     "Port login retry "
2977                     "%02x%02x%02x%02x%02x%02x%02x%02x, "
2978                     "id = 0x%04x retry cnt=%d.\n",
2979                     fcport->port_name[0], fcport->port_name[1],
2980                     fcport->port_name[2], fcport->port_name[3],
2981                     fcport->port_name[4], fcport->port_name[5],
2982                     fcport->port_name[6], fcport->port_name[7],
2983                     fcport->loop_id, fcport->login_retry);
2984         }
2985 }
2986
2987 /*
2988  * qla2x00_mark_all_devices_lost
2989  *      Updates fcport state when device goes offline.
2990  *
2991  * Input:
2992  *      ha = adapter block pointer.
2993  *      fcport = port structure pointer.
2994  *
2995  * Return:
2996  *      None.
2997  *
2998  * Context:
2999  */
3000 void
3001 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3002 {
3003         fc_port_t *fcport;
3004
3005         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3006                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3007                         continue;
3008
3009                 /*
3010                  * No point in marking the device as lost, if the device is
3011                  * already DEAD.
3012                  */
3013                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3014                         continue;
3015                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3016                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3017                         if (defer)
3018                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3019                         else if (vha->vp_idx == fcport->vha->vp_idx)
3020                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3021                 }
3022         }
3023 }
3024
3025 /*
3026 * qla2x00_mem_alloc
3027 *      Allocates adapter memory.
3028 *
3029 * Returns:
3030 *      0  = success.
3031 *      !0  = failure.
3032 */
3033 static int
3034 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3035         struct req_que **req, struct rsp_que **rsp)
3036 {
3037         char    name[16];
3038
3039         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3040                 &ha->init_cb_dma, GFP_KERNEL);
3041         if (!ha->init_cb)
3042                 goto fail;
3043
3044         if (qlt_mem_alloc(ha) < 0)
3045                 goto fail_free_init_cb;
3046
3047         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3048                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3049         if (!ha->gid_list)
3050                 goto fail_free_tgt_mem;
3051
3052         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3053         if (!ha->srb_mempool)
3054                 goto fail_free_gid_list;
3055
3056         if (IS_QLA82XX(ha)) {
3057                 /* Allocate cache for CT6 Ctx. */
3058                 if (!ctx_cachep) {
3059                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3060                                 sizeof(struct ct6_dsd), 0,
3061                                 SLAB_HWCACHE_ALIGN, NULL);
3062                         if (!ctx_cachep)
3063                                 goto fail_free_gid_list;
3064                 }
3065                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3066                         ctx_cachep);
3067                 if (!ha->ctx_mempool)
3068                         goto fail_free_srb_mempool;
3069                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3070                     "ctx_cachep=%p ctx_mempool=%p.\n",
3071                     ctx_cachep, ha->ctx_mempool);
3072         }
3073
3074         /* Get memory for cached NVRAM */
3075         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3076         if (!ha->nvram)
3077                 goto fail_free_ctx_mempool;
3078
3079         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3080                 ha->pdev->device);
3081         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3082                 DMA_POOL_SIZE, 8, 0);
3083         if (!ha->s_dma_pool)
3084                 goto fail_free_nvram;
3085
3086         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3087             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3088             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3089
3090         if (IS_QLA82XX(ha) || ql2xenabledif) {
3091                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3092                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3093                 if (!ha->dl_dma_pool) {
3094                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3095                             "Failed to allocate memory for dl_dma_pool.\n");
3096                         goto fail_s_dma_pool;
3097                 }
3098
3099                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3100                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3101                 if (!ha->fcp_cmnd_dma_pool) {
3102                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3103                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3104                         goto fail_dl_dma_pool;
3105                 }
3106                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3107                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3108                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3109         }
3110
3111         /* Allocate memory for SNS commands */
3112         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3113         /* Get consistent memory allocated for SNS commands */
3114                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3115                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3116                 if (!ha->sns_cmd)
3117                         goto fail_dma_pool;
3118                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3119                     "sns_cmd: %p.\n", ha->sns_cmd);
3120         } else {
3121         /* Get consistent memory allocated for MS IOCB */
3122                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3123                         &ha->ms_iocb_dma);
3124                 if (!ha->ms_iocb)
3125                         goto fail_dma_pool;
3126         /* Get consistent memory allocated for CT SNS commands */
3127                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3128                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3129                 if (!ha->ct_sns)
3130                         goto fail_free_ms_iocb;
3131                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3132                     "ms_iocb=%p ct_sns=%p.\n",
3133                     ha->ms_iocb, ha->ct_sns);
3134         }
3135
3136         /* Allocate memory for request ring */
3137         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3138         if (!*req) {
3139                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3140                     "Failed to allocate memory for req.\n");
3141                 goto fail_req;
3142         }
3143         (*req)->length = req_len;
3144         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3145                 ((*req)->length + 1) * sizeof(request_t),
3146                 &(*req)->dma, GFP_KERNEL);
3147         if (!(*req)->ring) {
3148                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3149                     "Failed to allocate memory for req_ring.\n");
3150                 goto fail_req_ring;
3151         }
3152         /* Allocate memory for response ring */
3153         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3154         if (!*rsp) {
3155                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3156                     "Failed to allocate memory for rsp.\n");
3157                 goto fail_rsp;
3158         }
3159         (*rsp)->hw = ha;
3160         (*rsp)->length = rsp_len;
3161         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3162                 ((*rsp)->length + 1) * sizeof(response_t),
3163                 &(*rsp)->dma, GFP_KERNEL);
3164         if (!(*rsp)->ring) {
3165                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3166                     "Failed to allocate memory for rsp_ring.\n");
3167                 goto fail_rsp_ring;
3168         }
3169         (*req)->rsp = *rsp;
3170         (*rsp)->req = *req;
3171         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3172             "req=%p req->length=%d req->ring=%p rsp=%p "
3173             "rsp->length=%d rsp->ring=%p.\n",
3174             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3175             (*rsp)->ring);
3176         /* Allocate memory for NVRAM data for vports */
3177         if (ha->nvram_npiv_size) {
3178                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3179                     ha->nvram_npiv_size, GFP_KERNEL);
3180                 if (!ha->npiv_info) {
3181                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3182                             "Failed to allocate memory for npiv_info.\n");
3183                         goto fail_npiv_info;
3184                 }
3185         } else
3186                 ha->npiv_info = NULL;
3187
3188         /* Get consistent memory allocated for EX-INIT-CB. */
3189         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3190                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3191                     &ha->ex_init_cb_dma);
3192                 if (!ha->ex_init_cb)
3193                         goto fail_ex_init_cb;
3194                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3195                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3196         }
3197
3198         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3199
3200         /* Get consistent memory allocated for Async Port-Database. */
3201         if (!IS_FWI2_CAPABLE(ha)) {
3202                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3203                         &ha->async_pd_dma);
3204                 if (!ha->async_pd)
3205                         goto fail_async_pd;
3206                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3207                     "async_pd=%p.\n", ha->async_pd);
3208         }
3209
3210         INIT_LIST_HEAD(&ha->vp_list);
3211
3212         /* Allocate memory for our loop_id bitmap */
3213         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3214             GFP_KERNEL);
3215         if (!ha->loop_id_map)
3216                 goto fail_async_pd;
3217         else {
3218                 qla2x00_set_reserved_loop_ids(ha);
3219                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3220                     "loop_id_map=%p. \n", ha->loop_id_map);
3221         }
3222
3223         return 1;
3224
3225 fail_async_pd:
3226         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3227 fail_ex_init_cb:
3228         kfree(ha->npiv_info);
3229 fail_npiv_info:
3230         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3231                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3232         (*rsp)->ring = NULL;
3233         (*rsp)->dma = 0;
3234 fail_rsp_ring:
3235         kfree(*rsp);
3236 fail_rsp:
3237         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3238                 sizeof(request_t), (*req)->ring, (*req)->dma);
3239         (*req)->ring = NULL;
3240         (*req)->dma = 0;
3241 fail_req_ring:
3242         kfree(*req);
3243 fail_req:
3244         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3245                 ha->ct_sns, ha->ct_sns_dma);
3246         ha->ct_sns = NULL;
3247         ha->ct_sns_dma = 0;
3248 fail_free_ms_iocb:
3249         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3250         ha->ms_iocb = NULL;
3251         ha->ms_iocb_dma = 0;
3252 fail_dma_pool:
3253         if (IS_QLA82XX(ha) || ql2xenabledif) {
3254                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3255                 ha->fcp_cmnd_dma_pool = NULL;
3256         }
3257 fail_dl_dma_pool:
3258         if (IS_QLA82XX(ha) || ql2xenabledif) {
3259                 dma_pool_destroy(ha->dl_dma_pool);
3260                 ha->dl_dma_pool = NULL;
3261         }
3262 fail_s_dma_pool:
3263         dma_pool_destroy(ha->s_dma_pool);
3264         ha->s_dma_pool = NULL;
3265 fail_free_nvram:
3266         kfree(ha->nvram);
3267         ha->nvram = NULL;
3268 fail_free_ctx_mempool:
3269         mempool_destroy(ha->ctx_mempool);
3270         ha->ctx_mempool = NULL;
3271 fail_free_srb_mempool:
3272         mempool_destroy(ha->srb_mempool);
3273         ha->srb_mempool = NULL;
3274 fail_free_gid_list:
3275         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3276         ha->gid_list,
3277         ha->gid_list_dma);
3278         ha->gid_list = NULL;
3279         ha->gid_list_dma = 0;
3280 fail_free_tgt_mem:
3281         qlt_mem_free(ha);
3282 fail_free_init_cb:
3283         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3284         ha->init_cb_dma);
3285         ha->init_cb = NULL;
3286         ha->init_cb_dma = 0;
3287 fail:
3288         ql_log(ql_log_fatal, NULL, 0x0030,
3289             "Memory allocation failure.\n");
3290         return -ENOMEM;
3291 }
3292
3293 /*
3294 * qla2x00_free_fw_dump
3295 *       Frees fw dump stuff.
3296 *
3297 * Input:
3298 *       ha = adapter block pointer.
3299 */
3300 static void
3301 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3302 {
3303         if (ha->fce)
3304                 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3305                     ha->fce_dma);
3306
3307         if (ha->fw_dump) {
3308                 if (ha->eft)
3309                         dma_free_coherent(&ha->pdev->dev,
3310                             ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3311                 vfree(ha->fw_dump);
3312         }
3313         ha->fce = NULL;
3314         ha->fce_dma = 0;
3315         ha->eft = NULL;
3316         ha->eft_dma = 0;
3317         ha->fw_dump = NULL;
3318         ha->fw_dumped = 0;
3319         ha->fw_dump_reading = 0;
3320 }
3321
3322 /*
3323 * qla2x00_mem_free
3324 *      Frees all adapter allocated memory.
3325 *
3326 * Input:
3327 *      ha = adapter block pointer.
3328 */
3329 static void
3330 qla2x00_mem_free(struct qla_hw_data *ha)
3331 {
3332         qla2x00_free_fw_dump(ha);
3333
3334         if (ha->mctp_dump)
3335                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3336                     ha->mctp_dump_dma);
3337
3338         if (ha->srb_mempool)
3339                 mempool_destroy(ha->srb_mempool);
3340
3341         if (ha->dcbx_tlv)
3342                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3343                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3344
3345         if (ha->xgmac_data)
3346                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3347                     ha->xgmac_data, ha->xgmac_data_dma);
3348
3349         if (ha->sns_cmd)
3350                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3351                 ha->sns_cmd, ha->sns_cmd_dma);
3352
3353         if (ha->ct_sns)
3354                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3355                 ha->ct_sns, ha->ct_sns_dma);
3356
3357         if (ha->sfp_data)
3358                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3359
3360         if (ha->ms_iocb)
3361                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3362
3363         if (ha->ex_init_cb)
3364                 dma_pool_free(ha->s_dma_pool,
3365                         ha->ex_init_cb, ha->ex_init_cb_dma);
3366
3367         if (ha->async_pd)
3368                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3369
3370         if (ha->s_dma_pool)
3371                 dma_pool_destroy(ha->s_dma_pool);
3372
3373         if (ha->gid_list)
3374                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3375                 ha->gid_list, ha->gid_list_dma);
3376
3377         if (IS_QLA82XX(ha)) {
3378                 if (!list_empty(&ha->gbl_dsd_list)) {
3379                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3380
3381                         /* clean up allocated prev pool */
3382                         list_for_each_entry_safe(dsd_ptr,
3383                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3384                                 dma_pool_free(ha->dl_dma_pool,
3385                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3386                                 list_del(&dsd_ptr->list);
3387                                 kfree(dsd_ptr);
3388                         }
3389                 }
3390         }
3391
3392         if (ha->dl_dma_pool)
3393                 dma_pool_destroy(ha->dl_dma_pool);
3394
3395         if (ha->fcp_cmnd_dma_pool)
3396                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3397
3398         if (ha->ctx_mempool)
3399                 mempool_destroy(ha->ctx_mempool);
3400
3401         qlt_mem_free(ha);
3402
3403         if (ha->init_cb)
3404                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3405                         ha->init_cb, ha->init_cb_dma);
3406         vfree(ha->optrom_buffer);
3407         kfree(ha->nvram);
3408         kfree(ha->npiv_info);
3409         kfree(ha->swl);
3410         kfree(ha->loop_id_map);
3411
3412         ha->srb_mempool = NULL;
3413         ha->ctx_mempool = NULL;
3414         ha->sns_cmd = NULL;
3415         ha->sns_cmd_dma = 0;
3416         ha->ct_sns = NULL;
3417         ha->ct_sns_dma = 0;
3418         ha->ms_iocb = NULL;
3419         ha->ms_iocb_dma = 0;
3420         ha->init_cb = NULL;
3421         ha->init_cb_dma = 0;
3422         ha->ex_init_cb = NULL;
3423         ha->ex_init_cb_dma = 0;
3424         ha->async_pd = NULL;
3425         ha->async_pd_dma = 0;
3426
3427         ha->s_dma_pool = NULL;
3428         ha->dl_dma_pool = NULL;
3429         ha->fcp_cmnd_dma_pool = NULL;
3430
3431         ha->gid_list = NULL;
3432         ha->gid_list_dma = 0;
3433
3434         ha->tgt.atio_ring = NULL;
3435         ha->tgt.atio_dma = 0;
3436         ha->tgt.tgt_vp_map = NULL;
3437 }
3438
3439 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3440                                                 struct qla_hw_data *ha)
3441 {
3442         struct Scsi_Host *host;
3443         struct scsi_qla_host *vha = NULL;
3444
3445         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3446         if (host == NULL) {
3447                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3448                     "Failed to allocate host from the scsi layer, aborting.\n");
3449                 goto fail;
3450         }
3451
3452         /* Clear our data area */
3453         vha = shost_priv(host);
3454         memset(vha, 0, sizeof(scsi_qla_host_t));
3455
3456         vha->host = host;
3457         vha->host_no = host->host_no;
3458         vha->hw = ha;
3459
3460         INIT_LIST_HEAD(&vha->vp_fcports);
3461         INIT_LIST_HEAD(&vha->work_list);
3462         INIT_LIST_HEAD(&vha->list);
3463
3464         spin_lock_init(&vha->work_lock);
3465
3466         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3467         ql_dbg(ql_dbg_init, vha, 0x0041,
3468             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3469             vha->host, vha->hw, vha,
3470             dev_name(&(ha->pdev->dev)));
3471
3472         return vha;
3473
3474 fail:
3475         return vha;
3476 }
3477
3478 static struct qla_work_evt *
3479 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3480 {
3481         struct qla_work_evt *e;
3482         uint8_t bail;
3483
3484         QLA_VHA_MARK_BUSY(vha, bail);
3485         if (bail)
3486                 return NULL;
3487
3488         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3489         if (!e) {
3490                 QLA_VHA_MARK_NOT_BUSY(vha);
3491                 return NULL;
3492         }
3493
3494         INIT_LIST_HEAD(&e->list);
3495         e->type = type;
3496         e->flags = QLA_EVT_FLAG_FREE;
3497         return e;
3498 }
3499
3500 static int
3501 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3502 {
3503         unsigned long flags;
3504
3505         spin_lock_irqsave(&vha->work_lock, flags);
3506         list_add_tail(&e->list, &vha->work_list);
3507         spin_unlock_irqrestore(&vha->work_lock, flags);
3508         qla2xxx_wake_dpc(vha);
3509
3510         return QLA_SUCCESS;
3511 }
3512
3513 int
3514 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3515     u32 data)
3516 {
3517         struct qla_work_evt *e;
3518
3519         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3520         if (!e)
3521                 return QLA_FUNCTION_FAILED;
3522
3523         e->u.aen.code = code;
3524         e->u.aen.data = data;
3525         return qla2x00_post_work(vha, e);
3526 }
3527
3528 int
3529 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3530 {
3531         struct qla_work_evt *e;
3532
3533         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3534         if (!e)
3535                 return QLA_FUNCTION_FAILED;
3536
3537         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3538         return qla2x00_post_work(vha, e);
3539 }
3540
3541 #define qla2x00_post_async_work(name, type)     \
3542 int qla2x00_post_async_##name##_work(           \
3543     struct scsi_qla_host *vha,                  \
3544     fc_port_t *fcport, uint16_t *data)          \
3545 {                                               \
3546         struct qla_work_evt *e;                 \
3547                                                 \
3548         e = qla2x00_alloc_work(vha, type);      \
3549         if (!e)                                 \
3550                 return QLA_FUNCTION_FAILED;     \
3551                                                 \
3552         e->u.logio.fcport = fcport;             \
3553         if (data) {                             \
3554                 e->u.logio.data[0] = data[0];   \
3555                 e->u.logio.data[1] = data[1];   \
3556         }                                       \
3557         return qla2x00_post_work(vha, e);       \
3558 }
3559
3560 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3561 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3562 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3563 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3564 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3565 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3566
3567 int
3568 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3569 {
3570         struct qla_work_evt *e;
3571
3572         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3573         if (!e)
3574                 return QLA_FUNCTION_FAILED;
3575
3576         e->u.uevent.code = code;
3577         return qla2x00_post_work(vha, e);
3578 }
3579
3580 static void
3581 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3582 {
3583         char event_string[40];
3584         char *envp[] = { event_string, NULL };
3585
3586         switch (code) {
3587         case QLA_UEVENT_CODE_FW_DUMP:
3588                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3589                     vha->host_no);
3590                 break;
3591         default:
3592                 /* do nothing */
3593                 break;
3594         }
3595         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3596 }
3597
3598 void
3599 qla2x00_do_work(struct scsi_qla_host *vha)
3600 {
3601         struct qla_work_evt *e, *tmp;
3602         unsigned long flags;
3603         LIST_HEAD(work);
3604
3605         spin_lock_irqsave(&vha->work_lock, flags);
3606         list_splice_init(&vha->work_list, &work);
3607         spin_unlock_irqrestore(&vha->work_lock, flags);
3608
3609         list_for_each_entry_safe(e, tmp, &work, list) {
3610                 list_del_init(&e->list);
3611
3612                 switch (e->type) {
3613                 case QLA_EVT_AEN:
3614                         fc_host_post_event(vha->host, fc_get_event_number(),
3615                             e->u.aen.code, e->u.aen.data);
3616                         break;
3617                 case QLA_EVT_IDC_ACK:
3618                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3619                         break;
3620                 case QLA_EVT_ASYNC_LOGIN:
3621                         qla2x00_async_login(vha, e->u.logio.fcport,
3622                             e->u.logio.data);
3623                         break;
3624                 case QLA_EVT_ASYNC_LOGIN_DONE:
3625                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3626                             e->u.logio.data);
3627                         break;
3628                 case QLA_EVT_ASYNC_LOGOUT:
3629                         qla2x00_async_logout(vha, e->u.logio.fcport);
3630                         break;
3631                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3632                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3633                             e->u.logio.data);
3634                         break;
3635                 case QLA_EVT_ASYNC_ADISC:
3636                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3637                             e->u.logio.data);
3638                         break;
3639                 case QLA_EVT_ASYNC_ADISC_DONE:
3640                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3641                             e->u.logio.data);
3642                         break;
3643                 case QLA_EVT_UEVENT:
3644                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3645                         break;
3646                 }
3647                 if (e->flags & QLA_EVT_FLAG_FREE)
3648                         kfree(e);
3649
3650                 /* For each work completed decrement vha ref count */
3651                 QLA_VHA_MARK_NOT_BUSY(vha);
3652         }
3653 }
3654
3655 /* Relogins all the fcports of a vport
3656  * Context: dpc thread
3657  */
3658 void qla2x00_relogin(struct scsi_qla_host *vha)
3659 {
3660         fc_port_t       *fcport;
3661         int status;
3662         uint16_t        next_loopid = 0;
3663         struct qla_hw_data *ha = vha->hw;
3664         uint16_t data[2];
3665
3666         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3667         /*
3668          * If the port is not ONLINE then try to login
3669          * to it if we haven't run out of retries.
3670          */
3671                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3672                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3673                         fcport->login_retry--;
3674                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3675                                 if (fcport->flags & FCF_FCP2_DEVICE)
3676                                         ha->isp_ops->fabric_logout(vha,
3677                                                         fcport->loop_id,
3678                                                         fcport->d_id.b.domain,
3679                                                         fcport->d_id.b.area,
3680                                                         fcport->d_id.b.al_pa);
3681
3682                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
3683                                         fcport->loop_id = next_loopid =
3684                                             ha->min_external_loopid;
3685                                         status = qla2x00_find_new_loop_id(
3686                                             vha, fcport);
3687                                         if (status != QLA_SUCCESS) {
3688                                                 /* Ran out of IDs to use */
3689                                                 break;
3690                                         }
3691                                 }
3692
3693                                 if (IS_ALOGIO_CAPABLE(ha)) {
3694                                         fcport->flags |= FCF_ASYNC_SENT;
3695                                         data[0] = 0;
3696                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
3697                                         status = qla2x00_post_async_login_work(
3698                                             vha, fcport, data);
3699                                         if (status == QLA_SUCCESS)
3700                                                 continue;
3701                                         /* Attempt a retry. */
3702                                         status = 1;
3703                                 } else {
3704                                         status = qla2x00_fabric_login(vha,
3705                                             fcport, &next_loopid);
3706                                         if (status ==  QLA_SUCCESS) {
3707                                                 int status2;
3708                                                 uint8_t opts;
3709
3710                                                 opts = 0;
3711                                                 if (fcport->flags &
3712                                                     FCF_FCP2_DEVICE)
3713                                                         opts |= BIT_1;
3714                                                         status2 =
3715                                                             qla2x00_get_port_database(
3716                                                                 vha, fcport,
3717                                                                 opts);
3718                                                 if (status2 != QLA_SUCCESS)
3719                                                         status = 1;
3720                                         }
3721                                 }
3722                         } else
3723                                 status = qla2x00_local_device_login(vha,
3724                                                                 fcport);
3725
3726                         if (status == QLA_SUCCESS) {
3727                                 fcport->old_loop_id = fcport->loop_id;
3728
3729                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
3730                                     "Port login OK: logged in ID 0x%x.\n",
3731                                     fcport->loop_id);
3732
3733                                 qla2x00_update_fcport(vha, fcport);
3734
3735                         } else if (status == 1) {
3736                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3737                                 /* retry the login again */
3738                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
3739                                     "Retrying %d login again loop_id 0x%x.\n",
3740                                     fcport->login_retry, fcport->loop_id);
3741                         } else {
3742                                 fcport->login_retry = 0;
3743                         }
3744
3745                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3746                                 qla2x00_clear_loop_id(fcport);
3747                 }
3748                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3749                         break;
3750         }
3751 }
3752
3753 /* Schedule work on any of the dpc-workqueues */
3754 void
3755 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
3756 {
3757         struct qla_hw_data *ha = base_vha->hw;
3758
3759         switch (work_code) {
3760         case MBA_IDC_AEN: /* 0x8200 */
3761                 if (ha->dpc_lp_wq)
3762                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
3763                 break;
3764
3765         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
3766                 if (!ha->flags.nic_core_reset_hdlr_active) {
3767                         if (ha->dpc_hp_wq)
3768                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
3769                 } else
3770                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
3771                             "NIC Core reset is already active. Skip "
3772                             "scheduling it again.\n");
3773                 break;
3774         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
3775                 if (ha->dpc_hp_wq)
3776                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
3777                 break;
3778         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
3779                 if (ha->dpc_hp_wq)
3780                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
3781                 break;
3782         default:
3783                 ql_log(ql_log_warn, base_vha, 0xb05f,
3784                     "Unknow work-code=0x%x.\n", work_code);
3785         }
3786
3787         return;
3788 }
3789
3790 /* Work: Perform NIC Core Unrecoverable state handling */
3791 void
3792 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
3793 {
3794         struct qla_hw_data *ha =
3795                 container_of(work, struct qla_hw_data, nic_core_reset);
3796         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3797         uint32_t dev_state = 0;
3798
3799         qla83xx_idc_lock(base_vha, 0);
3800         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
3801         qla83xx_reset_ownership(base_vha);
3802         if (ha->flags.nic_core_reset_owner) {
3803                 ha->flags.nic_core_reset_owner = 0;
3804                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
3805                     QLA8XXX_DEV_FAILED);
3806                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
3807                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
3808         }
3809         qla83xx_idc_unlock(base_vha, 0);
3810 }
3811
3812 /* Work: Execute IDC state handler */
3813 void
3814 qla83xx_idc_state_handler_work(struct work_struct *work)
3815 {
3816         struct qla_hw_data *ha =
3817                 container_of(work, struct qla_hw_data, nic_core_reset);
3818         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3819         uint32_t dev_state = 0;
3820
3821         qla83xx_idc_lock(base_vha, 0);
3822         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
3823         if (dev_state == QLA8XXX_DEV_FAILED ||
3824                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
3825                 qla83xx_idc_state_handler(base_vha);
3826         qla83xx_idc_unlock(base_vha, 0);
3827 }
3828
3829 int
3830 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
3831 {
3832         int rval = QLA_SUCCESS;
3833         unsigned long heart_beat_wait = jiffies + (1 * HZ);
3834         uint32_t heart_beat_counter1, heart_beat_counter2;
3835
3836         do {
3837                 if (time_after(jiffies, heart_beat_wait)) {
3838                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
3839                             "Nic Core f/w is not alive.\n");
3840                         rval = QLA_FUNCTION_FAILED;
3841                         break;
3842                 }
3843
3844                 qla83xx_idc_lock(base_vha, 0);
3845                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
3846                     &heart_beat_counter1);
3847                 qla83xx_idc_unlock(base_vha, 0);
3848                 msleep(100);
3849                 qla83xx_idc_lock(base_vha, 0);
3850                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
3851                     &heart_beat_counter2);
3852                 qla83xx_idc_unlock(base_vha, 0);
3853         } while (heart_beat_counter1 == heart_beat_counter2);
3854
3855         return rval;
3856 }
3857
3858 /* Work: Perform NIC Core Reset handling */
3859 void
3860 qla83xx_nic_core_reset_work(struct work_struct *work)
3861 {
3862         struct qla_hw_data *ha =
3863                 container_of(work, struct qla_hw_data, nic_core_reset);
3864         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3865         uint32_t dev_state = 0;
3866
3867         if (IS_QLA2031(ha)) {
3868                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
3869                         ql_log(ql_log_warn, base_vha, 0xb081,
3870                             "Failed to dump mctp\n");
3871                 return;
3872         }
3873
3874         if (!ha->flags.nic_core_reset_hdlr_active) {
3875                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
3876                         qla83xx_idc_lock(base_vha, 0);
3877                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
3878                             &dev_state);
3879                         qla83xx_idc_unlock(base_vha, 0);
3880                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
3881                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
3882                                     "Nic Core f/w is alive.\n");
3883                                 return;
3884                         }
3885                 }
3886
3887                 ha->flags.nic_core_reset_hdlr_active = 1;
3888                 if (qla83xx_nic_core_reset(base_vha)) {
3889                         /* NIC Core reset failed. */
3890                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
3891                             "NIC Core reset failed.\n");
3892                 }
3893                 ha->flags.nic_core_reset_hdlr_active = 0;
3894         }
3895 }
3896
3897 /* Work: Handle 8200 IDC aens */
3898 void
3899 qla83xx_service_idc_aen(struct work_struct *work)
3900 {
3901         struct qla_hw_data *ha =
3902                 container_of(work, struct qla_hw_data, idc_aen);
3903         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3904         uint32_t dev_state, idc_control;
3905
3906         qla83xx_idc_lock(base_vha, 0);
3907         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
3908         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
3909         qla83xx_idc_unlock(base_vha, 0);
3910         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
3911                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
3912                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
3913                             "Application requested NIC Core Reset.\n");
3914                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
3915                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
3916                     QLA_SUCCESS) {
3917                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
3918                             "Other protocol driver requested NIC Core Reset.\n");
3919                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
3920                 }
3921         } else if (dev_state == QLA8XXX_DEV_FAILED ||
3922                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
3923                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
3924         }
3925 }
3926
3927 static void
3928 qla83xx_wait_logic(void)
3929 {
3930         int i;
3931
3932         /* Yield CPU */
3933         if (!in_interrupt()) {
3934                 /*
3935                  * Wait about 200ms before retrying again.
3936                  * This controls the number of retries for single
3937                  * lock operation.
3938                  */
3939                 msleep(100);
3940                 schedule();
3941         } else {
3942                 for (i = 0; i < 20; i++)
3943                         cpu_relax(); /* This a nop instr on i386 */
3944         }
3945 }
3946
3947 int
3948 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
3949 {
3950         int rval;
3951         uint32_t data;
3952         uint32_t idc_lck_rcvry_stage_mask = 0x3;
3953         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
3954         struct qla_hw_data *ha = base_vha->hw;
3955
3956         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
3957         if (rval)
3958                 return rval;
3959
3960         if ((data & idc_lck_rcvry_stage_mask) > 0) {
3961                 return QLA_SUCCESS;
3962         } else {
3963                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
3964                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
3965                     data);
3966                 if (rval)
3967                         return rval;
3968
3969                 msleep(200);
3970
3971                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
3972                     &data);
3973                 if (rval)
3974                         return rval;
3975
3976                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
3977                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
3978                                         ~(idc_lck_rcvry_stage_mask));
3979                         rval = qla83xx_wr_reg(base_vha,
3980                             QLA83XX_IDC_LOCK_RECOVERY, data);
3981                         if (rval)
3982                                 return rval;
3983
3984                         /* Forcefully perform IDC UnLock */
3985                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
3986                             &data);
3987                         if (rval)
3988                                 return rval;
3989                         /* Clear lock-id by setting 0xff */
3990                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
3991                             0xff);
3992                         if (rval)
3993                                 return rval;
3994                         /* Clear lock-recovery by setting 0x0 */
3995                         rval = qla83xx_wr_reg(base_vha,
3996                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
3997                         if (rval)
3998                                 return rval;
3999                 } else
4000                         return QLA_SUCCESS;
4001         }
4002
4003         return rval;
4004 }
4005
4006 int
4007 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4008 {
4009         int rval = QLA_SUCCESS;
4010         uint32_t o_drv_lockid, n_drv_lockid;
4011         unsigned long lock_recovery_timeout;
4012
4013         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4014 retry_lockid:
4015         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4016         if (rval)
4017                 goto exit;
4018
4019         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4020         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4021                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4022                         return QLA_SUCCESS;
4023                 else
4024                         return QLA_FUNCTION_FAILED;
4025         }
4026
4027         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4028         if (rval)
4029                 goto exit;
4030
4031         if (o_drv_lockid == n_drv_lockid) {
4032                 qla83xx_wait_logic();
4033                 goto retry_lockid;
4034         } else
4035                 return QLA_SUCCESS;
4036
4037 exit:
4038         return rval;
4039 }
4040
4041 void
4042 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4043 {
4044         uint16_t options = (requester_id << 15) | BIT_6;
4045         uint32_t data;
4046         struct qla_hw_data *ha = base_vha->hw;
4047
4048         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4049 retry_lock:
4050         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4051             == QLA_SUCCESS) {
4052                 if (data) {
4053                         /* Setting lock-id to our function-number */
4054                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4055                             ha->portnum);
4056                 } else {
4057                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4058                             "Failed to acquire IDC lock. retrying...\n");
4059
4060                         /* Retry/Perform IDC-Lock recovery */
4061                         if (qla83xx_idc_lock_recovery(base_vha)
4062                             == QLA_SUCCESS) {
4063                                 qla83xx_wait_logic();
4064                                 goto retry_lock;
4065                         } else
4066                                 ql_log(ql_log_warn, base_vha, 0xb075,
4067                                     "IDC Lock recovery FAILED.\n");
4068                 }
4069
4070         }
4071
4072         return;
4073
4074         /* XXX: IDC-lock implementation using access-control mbx */
4075 retry_lock2:
4076         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4077                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4078                     "Failed to acquire IDC lock. retrying...\n");
4079                 /* Retry/Perform IDC-Lock recovery */
4080                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4081                         qla83xx_wait_logic();
4082                         goto retry_lock2;
4083                 } else
4084                         ql_log(ql_log_warn, base_vha, 0xb076,
4085                             "IDC Lock recovery FAILED.\n");
4086         }
4087
4088         return;
4089 }
4090
4091 void
4092 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4093 {
4094         uint16_t options = (requester_id << 15) | BIT_7, retry;
4095         uint32_t data;
4096         struct qla_hw_data *ha = base_vha->hw;
4097
4098         /* IDC-unlock implementation using driver-unlock/lock-id
4099          * remote registers
4100          */
4101         retry = 0;
4102 retry_unlock:
4103         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4104             == QLA_SUCCESS) {
4105                 if (data == ha->portnum) {
4106                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4107                         /* Clearing lock-id by setting 0xff */
4108                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4109                 } else if (retry < 10) {
4110                         /* SV: XXX: IDC unlock retrying needed here? */
4111
4112                         /* Retry for IDC-unlock */
4113                         qla83xx_wait_logic();
4114                         retry++;
4115                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4116                             "Failed to release IDC lock, retyring=%d\n", retry);
4117                         goto retry_unlock;
4118                 }
4119         } else if (retry < 10) {
4120                 /* Retry for IDC-unlock */
4121                 qla83xx_wait_logic();
4122                 retry++;
4123                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4124                     "Failed to read drv-lockid, retyring=%d\n", retry);
4125                 goto retry_unlock;
4126         }
4127
4128         return;
4129
4130         /* XXX: IDC-unlock implementation using access-control mbx */
4131         retry = 0;
4132 retry_unlock2:
4133         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4134                 if (retry < 10) {
4135                         /* Retry for IDC-unlock */
4136                         qla83xx_wait_logic();
4137                         retry++;
4138                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4139                             "Failed to release IDC lock, retyring=%d\n", retry);
4140                         goto retry_unlock2;
4141                 }
4142         }
4143
4144         return;
4145 }
4146
4147 int
4148 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4149 {
4150         int rval = QLA_SUCCESS;
4151         struct qla_hw_data *ha = vha->hw;
4152         uint32_t drv_presence;
4153
4154         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4155         if (rval == QLA_SUCCESS) {
4156                 drv_presence |= (1 << ha->portnum);
4157                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4158                     drv_presence);
4159         }
4160
4161         return rval;
4162 }
4163
4164 int
4165 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4166 {
4167         int rval = QLA_SUCCESS;
4168
4169         qla83xx_idc_lock(vha, 0);
4170         rval = __qla83xx_set_drv_presence(vha);
4171         qla83xx_idc_unlock(vha, 0);
4172
4173         return rval;
4174 }
4175
4176 int
4177 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4178 {
4179         int rval = QLA_SUCCESS;
4180         struct qla_hw_data *ha = vha->hw;
4181         uint32_t drv_presence;
4182
4183         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4184         if (rval == QLA_SUCCESS) {
4185                 drv_presence &= ~(1 << ha->portnum);
4186                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4187                     drv_presence);
4188         }
4189
4190         return rval;
4191 }
4192
4193 int
4194 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4195 {
4196         int rval = QLA_SUCCESS;
4197
4198         qla83xx_idc_lock(vha, 0);
4199         rval = __qla83xx_clear_drv_presence(vha);
4200         qla83xx_idc_unlock(vha, 0);
4201
4202         return rval;
4203 }
4204
4205 void
4206 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4207 {
4208         struct qla_hw_data *ha = vha->hw;
4209         uint32_t drv_ack, drv_presence;
4210         unsigned long ack_timeout;
4211
4212         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4213         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4214         while (1) {
4215                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4216                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4217                 if (drv_ack == drv_presence)
4218                         break;
4219
4220                 if (time_after_eq(jiffies, ack_timeout)) {
4221                         ql_log(ql_log_warn, vha, 0xb067,
4222                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4223                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4224                         /*
4225                          * The function(s) which did not ack in time are forced
4226                          * to withdraw any further participation in the IDC
4227                          * reset.
4228                          */
4229                         if (drv_ack != drv_presence)
4230                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4231                                     drv_ack);
4232                         break;
4233                 }
4234
4235                 qla83xx_idc_unlock(vha, 0);
4236                 msleep(1000);
4237                 qla83xx_idc_lock(vha, 0);
4238         }
4239
4240         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4241         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4242 }
4243
4244 int
4245 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4246 {
4247         int rval = QLA_SUCCESS;
4248         uint32_t idc_control;
4249
4250         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4251         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4252
4253         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4254         __qla83xx_get_idc_control(vha, &idc_control);
4255         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4256         __qla83xx_set_idc_control(vha, 0);
4257
4258         qla83xx_idc_unlock(vha, 0);
4259         rval = qla83xx_restart_nic_firmware(vha);
4260         qla83xx_idc_lock(vha, 0);
4261
4262         if (rval != QLA_SUCCESS) {
4263                 ql_log(ql_log_fatal, vha, 0xb06a,
4264                     "Failed to restart NIC f/w.\n");
4265                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4266                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4267         } else {
4268                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4269                     "Success in restarting nic f/w.\n");
4270                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4271                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4272         }
4273
4274         return rval;
4275 }
4276
4277 /* Assumes idc_lock always held on entry */
4278 int
4279 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4280 {
4281         struct qla_hw_data *ha = base_vha->hw;
4282         int rval = QLA_SUCCESS;
4283         unsigned long dev_init_timeout;
4284         uint32_t dev_state;
4285
4286         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4287         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4288
4289         while (1) {
4290
4291                 if (time_after_eq(jiffies, dev_init_timeout)) {
4292                         ql_log(ql_log_warn, base_vha, 0xb06e,
4293                             "Initialization TIMEOUT!\n");
4294                         /* Init timeout. Disable further NIC Core
4295                          * communication.
4296                          */
4297                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4298                                 QLA8XXX_DEV_FAILED);
4299                         ql_log(ql_log_info, base_vha, 0xb06f,
4300                             "HW State: FAILED.\n");
4301                 }
4302
4303                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4304                 switch (dev_state) {
4305                 case QLA8XXX_DEV_READY:
4306                         if (ha->flags.nic_core_reset_owner)
4307                                 qla83xx_idc_audit(base_vha,
4308                                     IDC_AUDIT_COMPLETION);
4309                         ha->flags.nic_core_reset_owner = 0;
4310                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4311                             "Reset_owner reset by 0x%x.\n",
4312                             ha->portnum);
4313                         goto exit;
4314                 case QLA8XXX_DEV_COLD:
4315                         if (ha->flags.nic_core_reset_owner)
4316                                 rval = qla83xx_device_bootstrap(base_vha);
4317                         else {
4318                         /* Wait for AEN to change device-state */
4319                                 qla83xx_idc_unlock(base_vha, 0);
4320                                 msleep(1000);
4321                                 qla83xx_idc_lock(base_vha, 0);
4322                         }
4323                         break;
4324                 case QLA8XXX_DEV_INITIALIZING:
4325                         /* Wait for AEN to change device-state */
4326                         qla83xx_idc_unlock(base_vha, 0);
4327                         msleep(1000);
4328                         qla83xx_idc_lock(base_vha, 0);
4329                         break;
4330                 case QLA8XXX_DEV_NEED_RESET:
4331                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4332                                 qla83xx_need_reset_handler(base_vha);
4333                         else {
4334                                 /* Wait for AEN to change device-state */
4335                                 qla83xx_idc_unlock(base_vha, 0);
4336                                 msleep(1000);
4337                                 qla83xx_idc_lock(base_vha, 0);
4338                         }
4339                         /* reset timeout value after need reset handler */
4340                         dev_init_timeout = jiffies +
4341                             (ha->fcoe_dev_init_timeout * HZ);
4342                         break;
4343                 case QLA8XXX_DEV_NEED_QUIESCENT:
4344                         /* XXX: DEBUG for now */
4345                         qla83xx_idc_unlock(base_vha, 0);
4346                         msleep(1000);
4347                         qla83xx_idc_lock(base_vha, 0);
4348                         break;
4349                 case QLA8XXX_DEV_QUIESCENT:
4350                         /* XXX: DEBUG for now */
4351                         if (ha->flags.quiesce_owner)
4352                                 goto exit;
4353
4354                         qla83xx_idc_unlock(base_vha, 0);
4355                         msleep(1000);
4356                         qla83xx_idc_lock(base_vha, 0);
4357                         dev_init_timeout = jiffies +
4358                             (ha->fcoe_dev_init_timeout * HZ);
4359                         break;
4360                 case QLA8XXX_DEV_FAILED:
4361                         if (ha->flags.nic_core_reset_owner)
4362                                 qla83xx_idc_audit(base_vha,
4363                                     IDC_AUDIT_COMPLETION);
4364                         ha->flags.nic_core_reset_owner = 0;
4365                         __qla83xx_clear_drv_presence(base_vha);
4366                         qla83xx_idc_unlock(base_vha, 0);
4367                         qla8xxx_dev_failed_handler(base_vha);
4368                         rval = QLA_FUNCTION_FAILED;
4369                         qla83xx_idc_lock(base_vha, 0);
4370                         goto exit;
4371                 case QLA8XXX_BAD_VALUE:
4372                         qla83xx_idc_unlock(base_vha, 0);
4373                         msleep(1000);
4374                         qla83xx_idc_lock(base_vha, 0);
4375                         break;
4376                 default:
4377                         ql_log(ql_log_warn, base_vha, 0xb071,
4378                             "Unknow Device State: %x.\n", dev_state);
4379                         qla83xx_idc_unlock(base_vha, 0);
4380                         qla8xxx_dev_failed_handler(base_vha);
4381                         rval = QLA_FUNCTION_FAILED;
4382                         qla83xx_idc_lock(base_vha, 0);
4383                         goto exit;
4384                 }
4385         }
4386
4387 exit:
4388         return rval;
4389 }
4390
4391 /**************************************************************************
4392 * qla2x00_do_dpc
4393 *   This kernel thread is a task that is schedule by the interrupt handler
4394 *   to perform the background processing for interrupts.
4395 *
4396 * Notes:
4397 * This task always run in the context of a kernel thread.  It
4398 * is kick-off by the driver's detect code and starts up
4399 * up one per adapter. It immediately goes to sleep and waits for
4400 * some fibre event.  When either the interrupt handler or
4401 * the timer routine detects a event it will one of the task
4402 * bits then wake us up.
4403 **************************************************************************/
4404 static int
4405 qla2x00_do_dpc(void *data)
4406 {
4407         int             rval;
4408         scsi_qla_host_t *base_vha;
4409         struct qla_hw_data *ha;
4410
4411         ha = (struct qla_hw_data *)data;
4412         base_vha = pci_get_drvdata(ha->pdev);
4413
4414         set_user_nice(current, -20);
4415
4416         set_current_state(TASK_INTERRUPTIBLE);
4417         while (!kthread_should_stop()) {
4418                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4419                     "DPC handler sleeping.\n");
4420
4421                 schedule();
4422                 __set_current_state(TASK_RUNNING);
4423
4424                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4425                         goto end_loop;
4426
4427                 if (ha->flags.eeh_busy) {
4428                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4429                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4430                         goto end_loop;
4431                 }
4432
4433                 ha->dpc_active = 1;
4434
4435                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4436                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4437                     base_vha->dpc_flags);
4438
4439                 qla2x00_do_work(base_vha);
4440
4441                 if (IS_QLA82XX(ha)) {
4442                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4443                                 &base_vha->dpc_flags)) {
4444                                 qla82xx_idc_lock(ha);
4445                                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4446                                         QLA8XXX_DEV_FAILED);
4447                                 qla82xx_idc_unlock(ha);
4448                                 ql_log(ql_log_info, base_vha, 0x4004,
4449                                     "HW State: FAILED.\n");
4450                                 qla82xx_device_state_handler(base_vha);
4451                                 continue;
4452                         }
4453
4454                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4455                                 &base_vha->dpc_flags)) {
4456
4457                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4458                                     "FCoE context reset scheduled.\n");
4459                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4460                                         &base_vha->dpc_flags))) {
4461                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4462                                                 /* FCoE-ctx reset failed.
4463                                                  * Escalate to chip-reset
4464                                                  */
4465                                                 set_bit(ISP_ABORT_NEEDED,
4466                                                         &base_vha->dpc_flags);
4467                                         }
4468                                         clear_bit(ABORT_ISP_ACTIVE,
4469                                                 &base_vha->dpc_flags);
4470                                 }
4471
4472                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4473                                     "FCoE context reset end.\n");
4474                         }
4475                 }
4476
4477                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4478                                                 &base_vha->dpc_flags)) {
4479
4480                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4481                             "ISP abort scheduled.\n");
4482                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4483                             &base_vha->dpc_flags))) {
4484
4485                                 if (ha->isp_ops->abort_isp(base_vha)) {
4486                                         /* failed. retry later */
4487                                         set_bit(ISP_ABORT_NEEDED,
4488                                             &base_vha->dpc_flags);
4489                                 }
4490                                 clear_bit(ABORT_ISP_ACTIVE,
4491                                                 &base_vha->dpc_flags);
4492                         }
4493
4494                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4495                             "ISP abort end.\n");
4496                 }
4497
4498                 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
4499                         qla2x00_update_fcports(base_vha);
4500                         clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
4501                 }
4502
4503                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4504                         int ret;
4505                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4506                         if (ret != QLA_SUCCESS)
4507                                 ql_log(ql_log_warn, base_vha, 0x121,
4508                                     "Failed to enable receiving of RSCN "
4509                                     "requests: 0x%x.\n", ret);
4510                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4511                 }
4512
4513                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4514                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4515                             "Quiescence mode scheduled.\n");
4516                         if (IS_QLA82XX(ha)) {
4517                                 qla82xx_device_state_handler(base_vha);
4518                                 clear_bit(ISP_QUIESCE_NEEDED,
4519                                     &base_vha->dpc_flags);
4520                                 if (!ha->flags.quiesce_owner) {
4521                                         qla2x00_perform_loop_resync(base_vha);
4522
4523                                         qla82xx_idc_lock(ha);
4524                                         qla82xx_clear_qsnt_ready(base_vha);
4525                                         qla82xx_idc_unlock(ha);
4526                                 }
4527                         } else {
4528                                 clear_bit(ISP_QUIESCE_NEEDED,
4529                                     &base_vha->dpc_flags);
4530                                 qla2x00_quiesce_io(base_vha);
4531                         }
4532                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4533                             "Quiescence mode end.\n");
4534                 }
4535
4536                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4537                                                         &base_vha->dpc_flags) &&
4538                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4539
4540                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4541                             "Reset marker scheduled.\n");
4542                         qla2x00_rst_aen(base_vha);
4543                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4544                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4545                             "Reset marker end.\n");
4546                 }
4547
4548                 /* Retry each device up to login retry count */
4549                 if ((test_and_clear_bit(RELOGIN_NEEDED,
4550                                                 &base_vha->dpc_flags)) &&
4551                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
4552                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
4553
4554                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
4555                             "Relogin scheduled.\n");
4556                         qla2x00_relogin(base_vha);
4557                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
4558                             "Relogin end.\n");
4559                 }
4560
4561                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4562                                                         &base_vha->dpc_flags)) {
4563
4564                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
4565                             "Loop resync scheduled.\n");
4566
4567                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4568                             &base_vha->dpc_flags))) {
4569
4570                                 rval = qla2x00_loop_resync(base_vha);
4571
4572                                 clear_bit(LOOP_RESYNC_ACTIVE,
4573                                                 &base_vha->dpc_flags);
4574                         }
4575
4576                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
4577                             "Loop resync end.\n");
4578                 }
4579
4580                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
4581                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
4582                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
4583                         qla2xxx_flash_npiv_conf(base_vha);
4584                 }
4585
4586                 if (!ha->interrupts_on)
4587                         ha->isp_ops->enable_intrs(ha);
4588
4589                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
4590                                         &base_vha->dpc_flags))
4591                         ha->isp_ops->beacon_blink(base_vha);
4592
4593                 qla2x00_do_dpc_all_vps(base_vha);
4594
4595                 ha->dpc_active = 0;
4596 end_loop:
4597                 set_current_state(TASK_INTERRUPTIBLE);
4598         } /* End of while(1) */
4599         __set_current_state(TASK_RUNNING);
4600
4601         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
4602             "DPC handler exiting.\n");
4603
4604         /*
4605          * Make sure that nobody tries to wake us up again.
4606          */
4607         ha->dpc_active = 0;
4608
4609         /* Cleanup any residual CTX SRBs. */
4610         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4611
4612         return 0;
4613 }
4614
4615 void
4616 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4617 {
4618         struct qla_hw_data *ha = vha->hw;
4619         struct task_struct *t = ha->dpc_thread;
4620
4621         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4622                 wake_up_process(t);
4623 }
4624
4625 /*
4626 *  qla2x00_rst_aen
4627 *      Processes asynchronous reset.
4628 *
4629 * Input:
4630 *      ha  = adapter block pointer.
4631 */
4632 static void
4633 qla2x00_rst_aen(scsi_qla_host_t *vha)
4634 {
4635         if (vha->flags.online && !vha->flags.reset_active &&
4636             !atomic_read(&vha->loop_down_timer) &&
4637             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
4638                 do {
4639                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4640
4641                         /*
4642                          * Issue marker command only when we are going to start
4643                          * the I/O.
4644                          */
4645                         vha->marker_needed = 1;
4646                 } while (!atomic_read(&vha->loop_down_timer) &&
4647                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
4648         }
4649 }
4650
4651 /**************************************************************************
4652 *   qla2x00_timer
4653 *
4654 * Description:
4655 *   One second timer
4656 *
4657 * Context: Interrupt
4658 ***************************************************************************/
4659 void
4660 qla2x00_timer(scsi_qla_host_t *vha)
4661 {
4662         unsigned long   cpu_flags = 0;
4663         int             start_dpc = 0;
4664         int             index;
4665         srb_t           *sp;
4666         uint16_t        w;
4667         struct qla_hw_data *ha = vha->hw;
4668         struct req_que *req;
4669
4670         if (ha->flags.eeh_busy) {
4671                 ql_dbg(ql_dbg_timer, vha, 0x6000,
4672                     "EEH = %d, restarting timer.\n",
4673                     ha->flags.eeh_busy);
4674                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
4675                 return;
4676         }
4677
4678         /* Hardware read to raise pending EEH errors during mailbox waits. */
4679         if (!pci_channel_offline(ha->pdev))
4680                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
4681
4682         /* Make sure qla82xx_watchdog is run only for physical port */
4683         if (!vha->vp_idx && IS_QLA82XX(ha)) {
4684                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
4685                         start_dpc++;
4686                 qla82xx_watchdog(vha);
4687         }
4688
4689         /* Loop down handler. */
4690         if (atomic_read(&vha->loop_down_timer) > 0 &&
4691             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
4692             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
4693                 && vha->flags.online) {
4694
4695                 if (atomic_read(&vha->loop_down_timer) ==
4696                     vha->loop_down_abort_time) {
4697
4698                         ql_log(ql_log_info, vha, 0x6008,
4699                             "Loop down - aborting the queues before time expires.\n");
4700
4701                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
4702                                 atomic_set(&vha->loop_state, LOOP_DEAD);
4703
4704                         /*
4705                          * Schedule an ISP abort to return any FCP2-device
4706                          * commands.
4707                          */
4708                         /* NPIV - scan physical port only */
4709                         if (!vha->vp_idx) {
4710                                 spin_lock_irqsave(&ha->hardware_lock,
4711                                     cpu_flags);
4712                                 req = ha->req_q_map[0];
4713                                 for (index = 1;
4714                                     index < MAX_OUTSTANDING_COMMANDS;
4715                                     index++) {
4716                                         fc_port_t *sfcp;
4717
4718                                         sp = req->outstanding_cmds[index];
4719                                         if (!sp)
4720                                                 continue;
4721                                         if (sp->type != SRB_SCSI_CMD)
4722                                                 continue;
4723                                         sfcp = sp->fcport;
4724                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
4725                                                 continue;
4726
4727                                         if (IS_QLA82XX(ha))
4728                                                 set_bit(FCOE_CTX_RESET_NEEDED,
4729                                                         &vha->dpc_flags);
4730                                         else
4731                                                 set_bit(ISP_ABORT_NEEDED,
4732                                                         &vha->dpc_flags);
4733                                         break;
4734                                 }
4735                                 spin_unlock_irqrestore(&ha->hardware_lock,
4736                                                                 cpu_flags);
4737                         }
4738                         start_dpc++;
4739                 }
4740
4741                 /* if the loop has been down for 4 minutes, reinit adapter */
4742                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
4743                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
4744                                 ql_log(ql_log_warn, vha, 0x6009,
4745                                     "Loop down - aborting ISP.\n");
4746
4747                                 if (IS_QLA82XX(ha))
4748                                         set_bit(FCOE_CTX_RESET_NEEDED,
4749                                                 &vha->dpc_flags);
4750                                 else
4751                                         set_bit(ISP_ABORT_NEEDED,
4752                                                 &vha->dpc_flags);
4753                         }
4754                 }
4755                 ql_dbg(ql_dbg_timer, vha, 0x600a,
4756                     "Loop down - seconds remaining %d.\n",
4757                     atomic_read(&vha->loop_down_timer));
4758         }
4759
4760         /* Check if beacon LED needs to be blinked for physical host only */
4761         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
4762                 /* There is no beacon_blink function for ISP82xx */
4763                 if (!IS_QLA82XX(ha)) {
4764                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
4765                         start_dpc++;
4766                 }
4767         }
4768
4769         /* Process any deferred work. */
4770         if (!list_empty(&vha->work_list))
4771                 start_dpc++;
4772
4773         /* Schedule the DPC routine if needed */
4774         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
4775             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
4776             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
4777             start_dpc ||
4778             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
4779             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
4780             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
4781             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
4782             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
4783             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
4784                 ql_dbg(ql_dbg_timer, vha, 0x600b,
4785                     "isp_abort_needed=%d loop_resync_needed=%d "
4786                     "fcport_update_needed=%d start_dpc=%d "
4787                     "reset_marker_needed=%d",
4788                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
4789                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
4790                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
4791                     start_dpc,
4792                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
4793                 ql_dbg(ql_dbg_timer, vha, 0x600c,
4794                     "beacon_blink_needed=%d isp_unrecoverable=%d "
4795                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
4796                     "relogin_needed=%d.\n",
4797                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
4798                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
4799                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
4800                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
4801                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
4802                 qla2xxx_wake_dpc(vha);
4803         }
4804
4805         qla2x00_restart_timer(vha, WATCH_INTERVAL);
4806 }
4807
4808 /* Firmware interface routines. */
4809
4810 #define FW_BLOBS        10
4811 #define FW_ISP21XX      0
4812 #define FW_ISP22XX      1
4813 #define FW_ISP2300      2
4814 #define FW_ISP2322      3
4815 #define FW_ISP24XX      4
4816 #define FW_ISP25XX      5
4817 #define FW_ISP81XX      6
4818 #define FW_ISP82XX      7
4819 #define FW_ISP2031      8
4820 #define FW_ISP8031      9
4821
4822 #define FW_FILE_ISP21XX "ql2100_fw.bin"
4823 #define FW_FILE_ISP22XX "ql2200_fw.bin"
4824 #define FW_FILE_ISP2300 "ql2300_fw.bin"
4825 #define FW_FILE_ISP2322 "ql2322_fw.bin"
4826 #define FW_FILE_ISP24XX "ql2400_fw.bin"
4827 #define FW_FILE_ISP25XX "ql2500_fw.bin"
4828 #define FW_FILE_ISP81XX "ql8100_fw.bin"
4829 #define FW_FILE_ISP82XX "ql8200_fw.bin"
4830 #define FW_FILE_ISP2031 "ql2600_fw.bin"
4831 #define FW_FILE_ISP8031 "ql8300_fw.bin"
4832
4833 static DEFINE_MUTEX(qla_fw_lock);
4834
4835 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
4836         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
4837         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
4838         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
4839         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
4840         { .name = FW_FILE_ISP24XX, },
4841         { .name = FW_FILE_ISP25XX, },
4842         { .name = FW_FILE_ISP81XX, },
4843         { .name = FW_FILE_ISP82XX, },
4844         { .name = FW_FILE_ISP2031, },
4845         { .name = FW_FILE_ISP8031, },
4846 };
4847
4848 struct fw_blob *
4849 qla2x00_request_firmware(scsi_qla_host_t *vha)
4850 {
4851         struct qla_hw_data *ha = vha->hw;
4852         struct fw_blob *blob;
4853
4854         if (IS_QLA2100(ha)) {
4855                 blob = &qla_fw_blobs[FW_ISP21XX];
4856         } else if (IS_QLA2200(ha)) {
4857                 blob = &qla_fw_blobs[FW_ISP22XX];
4858         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4859                 blob = &qla_fw_blobs[FW_ISP2300];
4860         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
4861                 blob = &qla_fw_blobs[FW_ISP2322];
4862         } else if (IS_QLA24XX_TYPE(ha)) {
4863                 blob = &qla_fw_blobs[FW_ISP24XX];
4864         } else if (IS_QLA25XX(ha)) {
4865                 blob = &qla_fw_blobs[FW_ISP25XX];
4866         } else if (IS_QLA81XX(ha)) {
4867                 blob = &qla_fw_blobs[FW_ISP81XX];
4868         } else if (IS_QLA82XX(ha)) {
4869                 blob = &qla_fw_blobs[FW_ISP82XX];
4870         } else if (IS_QLA2031(ha)) {
4871                 blob = &qla_fw_blobs[FW_ISP2031];
4872         } else if (IS_QLA8031(ha)) {
4873                 blob = &qla_fw_blobs[FW_ISP8031];
4874         } else {
4875                 return NULL;
4876         }
4877
4878         mutex_lock(&qla_fw_lock);
4879         if (blob->fw)
4880                 goto out;
4881
4882         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
4883                 ql_log(ql_log_warn, vha, 0x0063,
4884                     "Failed to load firmware image (%s).\n", blob->name);
4885                 blob->fw = NULL;
4886                 blob = NULL;
4887                 goto out;
4888         }
4889
4890 out:
4891         mutex_unlock(&qla_fw_lock);
4892         return blob;
4893 }
4894
4895 static void
4896 qla2x00_release_firmware(void)
4897 {
4898         int idx;
4899
4900         mutex_lock(&qla_fw_lock);
4901         for (idx = 0; idx < FW_BLOBS; idx++)
4902                 release_firmware(qla_fw_blobs[idx].fw);
4903         mutex_unlock(&qla_fw_lock);
4904 }
4905
4906 static pci_ers_result_t
4907 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4908 {
4909         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
4910         struct qla_hw_data *ha = vha->hw;
4911
4912         ql_dbg(ql_dbg_aer, vha, 0x9000,
4913             "PCI error detected, state %x.\n", state);
4914
4915         switch (state) {
4916         case pci_channel_io_normal:
4917                 ha->flags.eeh_busy = 0;
4918                 return PCI_ERS_RESULT_CAN_RECOVER;
4919         case pci_channel_io_frozen:
4920                 ha->flags.eeh_busy = 1;
4921                 /* For ISP82XX complete any pending mailbox cmd */
4922                 if (IS_QLA82XX(ha)) {
4923                         ha->flags.isp82xx_fw_hung = 1;
4924                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
4925                         qla82xx_clear_pending_mbx(vha);
4926                 }
4927                 qla2x00_free_irqs(vha);
4928                 pci_disable_device(pdev);
4929                 /* Return back all IOs */
4930                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4931                 return PCI_ERS_RESULT_NEED_RESET;
4932         case pci_channel_io_perm_failure:
4933                 ha->flags.pci_channel_io_perm_failure = 1;
4934                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
4935                 return PCI_ERS_RESULT_DISCONNECT;
4936         }
4937         return PCI_ERS_RESULT_NEED_RESET;
4938 }
4939
4940 static pci_ers_result_t
4941 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
4942 {
4943         int risc_paused = 0;
4944         uint32_t stat;
4945         unsigned long flags;
4946         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4947         struct qla_hw_data *ha = base_vha->hw;
4948         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4949         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
4950
4951         if (IS_QLA82XX(ha))
4952                 return PCI_ERS_RESULT_RECOVERED;
4953
4954         spin_lock_irqsave(&ha->hardware_lock, flags);
4955         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
4956                 stat = RD_REG_DWORD(&reg->hccr);
4957                 if (stat & HCCR_RISC_PAUSE)
4958                         risc_paused = 1;
4959         } else if (IS_QLA23XX(ha)) {
4960                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
4961                 if (stat & HSR_RISC_PAUSED)
4962                         risc_paused = 1;
4963         } else if (IS_FWI2_CAPABLE(ha)) {
4964                 stat = RD_REG_DWORD(&reg24->host_status);
4965                 if (stat & HSRX_RISC_PAUSED)
4966                         risc_paused = 1;
4967         }
4968         spin_unlock_irqrestore(&ha->hardware_lock, flags);
4969
4970         if (risc_paused) {
4971                 ql_log(ql_log_info, base_vha, 0x9003,
4972                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
4973                 ha->isp_ops->fw_dump(base_vha, 0);
4974
4975                 return PCI_ERS_RESULT_NEED_RESET;
4976         } else
4977                 return PCI_ERS_RESULT_RECOVERED;
4978 }
4979
4980 uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
4981 {
4982         uint32_t rval = QLA_FUNCTION_FAILED;
4983         uint32_t drv_active = 0;
4984         struct qla_hw_data *ha = base_vha->hw;
4985         int fn;
4986         struct pci_dev *other_pdev = NULL;
4987
4988         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
4989             "Entered %s.\n", __func__);
4990
4991         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4992
4993         if (base_vha->flags.online) {
4994                 /* Abort all outstanding commands,
4995                  * so as to be requeued later */
4996                 qla2x00_abort_isp_cleanup(base_vha);
4997         }
4998
4999
5000         fn = PCI_FUNC(ha->pdev->devfn);
5001         while (fn > 0) {
5002                 fn--;
5003                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5004                     "Finding pci device at function = 0x%x.\n", fn);
5005                 other_pdev =
5006                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5007                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5008                     fn));
5009
5010                 if (!other_pdev)
5011                         continue;
5012                 if (atomic_read(&other_pdev->enable_cnt)) {
5013                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5014                             "Found PCI func available and enable at 0x%x.\n",
5015                             fn);
5016                         pci_dev_put(other_pdev);
5017                         break;
5018                 }
5019                 pci_dev_put(other_pdev);
5020         }
5021
5022         if (!fn) {
5023                 /* Reset owner */
5024                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5025                     "This devfn is reset owner = 0x%x.\n",
5026                     ha->pdev->devfn);
5027                 qla82xx_idc_lock(ha);
5028
5029                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5030                     QLA8XXX_DEV_INITIALIZING);
5031
5032                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5033                     QLA82XX_IDC_VERSION);
5034
5035                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5036                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5037                     "drv_active = 0x%x.\n", drv_active);
5038
5039                 qla82xx_idc_unlock(ha);
5040                 /* Reset if device is not already reset
5041                  * drv_active would be 0 if a reset has already been done
5042                  */
5043                 if (drv_active)
5044                         rval = qla82xx_start_firmware(base_vha);
5045                 else
5046                         rval = QLA_SUCCESS;
5047                 qla82xx_idc_lock(ha);
5048
5049                 if (rval != QLA_SUCCESS) {
5050                         ql_log(ql_log_info, base_vha, 0x900b,
5051                             "HW State: FAILED.\n");
5052                         qla82xx_clear_drv_active(ha);
5053                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5054                             QLA8XXX_DEV_FAILED);
5055                 } else {
5056                         ql_log(ql_log_info, base_vha, 0x900c,
5057                             "HW State: READY.\n");
5058                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5059                             QLA8XXX_DEV_READY);
5060                         qla82xx_idc_unlock(ha);
5061                         ha->flags.isp82xx_fw_hung = 0;
5062                         rval = qla82xx_restart_isp(base_vha);
5063                         qla82xx_idc_lock(ha);
5064                         /* Clear driver state register */
5065                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5066                         qla82xx_set_drv_active(base_vha);
5067                 }
5068                 qla82xx_idc_unlock(ha);
5069         } else {
5070                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5071                     "This devfn is not reset owner = 0x%x.\n",
5072                     ha->pdev->devfn);
5073                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5074                     QLA8XXX_DEV_READY)) {
5075                         ha->flags.isp82xx_fw_hung = 0;
5076                         rval = qla82xx_restart_isp(base_vha);
5077                         qla82xx_idc_lock(ha);
5078                         qla82xx_set_drv_active(base_vha);
5079                         qla82xx_idc_unlock(ha);
5080                 }
5081         }
5082         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5083
5084         return rval;
5085 }
5086
5087 static pci_ers_result_t
5088 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5089 {
5090         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5091         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5092         struct qla_hw_data *ha = base_vha->hw;
5093         struct rsp_que *rsp;
5094         int rc, retries = 10;
5095
5096         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5097             "Slot Reset.\n");
5098
5099         /* Workaround: qla2xxx driver which access hardware earlier
5100          * needs error state to be pci_channel_io_online.
5101          * Otherwise mailbox command timesout.
5102          */
5103         pdev->error_state = pci_channel_io_normal;
5104
5105         pci_restore_state(pdev);
5106
5107         /* pci_restore_state() clears the saved_state flag of the device
5108          * save restored state which resets saved_state flag
5109          */
5110         pci_save_state(pdev);
5111
5112         if (ha->mem_only)
5113                 rc = pci_enable_device_mem(pdev);
5114         else
5115                 rc = pci_enable_device(pdev);
5116
5117         if (rc) {
5118                 ql_log(ql_log_warn, base_vha, 0x9005,
5119                     "Can't re-enable PCI device after reset.\n");
5120                 goto exit_slot_reset;
5121         }
5122
5123         rsp = ha->rsp_q_map[0];
5124         if (qla2x00_request_irqs(ha, rsp))
5125                 goto exit_slot_reset;
5126
5127         if (ha->isp_ops->pci_config(base_vha))
5128                 goto exit_slot_reset;
5129
5130         if (IS_QLA82XX(ha)) {
5131                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5132                         ret = PCI_ERS_RESULT_RECOVERED;
5133                         goto exit_slot_reset;
5134                 } else
5135                         goto exit_slot_reset;
5136         }
5137
5138         while (ha->flags.mbox_busy && retries--)
5139                 msleep(1000);
5140
5141         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5142         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5143                 ret =  PCI_ERS_RESULT_RECOVERED;
5144         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5145
5146
5147 exit_slot_reset:
5148         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5149             "slot_reset return %x.\n", ret);
5150
5151         return ret;
5152 }
5153
5154 static void
5155 qla2xxx_pci_resume(struct pci_dev *pdev)
5156 {
5157         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5158         struct qla_hw_data *ha = base_vha->hw;
5159         int ret;
5160
5161         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5162             "pci_resume.\n");
5163
5164         ret = qla2x00_wait_for_hba_online(base_vha);
5165         if (ret != QLA_SUCCESS) {
5166                 ql_log(ql_log_fatal, base_vha, 0x9002,
5167                     "The device failed to resume I/O from slot/link_reset.\n");
5168         }
5169
5170         pci_cleanup_aer_uncorrect_error_status(pdev);
5171
5172         ha->flags.eeh_busy = 0;
5173 }
5174
5175 static struct pci_error_handlers qla2xxx_err_handler = {
5176         .error_detected = qla2xxx_pci_error_detected,
5177         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5178         .slot_reset = qla2xxx_pci_slot_reset,
5179         .resume = qla2xxx_pci_resume,
5180 };
5181
5182 static struct pci_device_id qla2xxx_pci_tbl[] = {
5183         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5184         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5185         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5186         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5187         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5188         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5189         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5190         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5191         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5192         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5193         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5194         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5195         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5196         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5197         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5198         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5199         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5200         { 0 },
5201 };
5202 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5203
5204 static struct pci_driver qla2xxx_pci_driver = {
5205         .name           = QLA2XXX_DRIVER_NAME,
5206         .driver         = {
5207                 .owner          = THIS_MODULE,
5208         },
5209         .id_table       = qla2xxx_pci_tbl,
5210         .probe          = qla2x00_probe_one,
5211         .remove         = qla2x00_remove_one,
5212         .shutdown       = qla2x00_shutdown,
5213         .err_handler    = &qla2xxx_err_handler,
5214 };
5215
5216 static struct file_operations apidev_fops = {
5217         .owner = THIS_MODULE,
5218         .llseek = noop_llseek,
5219 };
5220
5221 /**
5222  * qla2x00_module_init - Module initialization.
5223  **/
5224 static int __init
5225 qla2x00_module_init(void)
5226 {
5227         int ret = 0;
5228
5229         /* Allocate cache for SRBs. */
5230         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5231             SLAB_HWCACHE_ALIGN, NULL);
5232         if (srb_cachep == NULL) {
5233                 ql_log(ql_log_fatal, NULL, 0x0001,
5234                     "Unable to allocate SRB cache...Failing load!.\n");
5235                 return -ENOMEM;
5236         }
5237
5238         /* Initialize target kmem_cache and mem_pools */
5239         ret = qlt_init();
5240         if (ret < 0) {
5241                 kmem_cache_destroy(srb_cachep);
5242                 return ret;
5243         } else if (ret > 0) {
5244                 /*
5245                  * If initiator mode is explictly disabled by qlt_init(),
5246                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5247                  * performing scsi_scan_target() during LOOP UP event.
5248                  */
5249                 qla2xxx_transport_functions.disable_target_scan = 1;
5250                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5251         }
5252
5253         /* Derive version string. */
5254         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5255         if (ql2xextended_error_logging)
5256                 strcat(qla2x00_version_str, "-debug");
5257
5258         qla2xxx_transport_template =
5259             fc_attach_transport(&qla2xxx_transport_functions);
5260         if (!qla2xxx_transport_template) {
5261                 kmem_cache_destroy(srb_cachep);
5262                 ql_log(ql_log_fatal, NULL, 0x0002,
5263                     "fc_attach_transport failed...Failing load!.\n");
5264                 qlt_exit();
5265                 return -ENODEV;
5266         }
5267
5268         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5269         if (apidev_major < 0) {
5270                 ql_log(ql_log_fatal, NULL, 0x0003,
5271                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5272         }
5273
5274         qla2xxx_transport_vport_template =
5275             fc_attach_transport(&qla2xxx_transport_vport_functions);
5276         if (!qla2xxx_transport_vport_template) {
5277                 kmem_cache_destroy(srb_cachep);
5278                 qlt_exit();
5279                 fc_release_transport(qla2xxx_transport_template);
5280                 ql_log(ql_log_fatal, NULL, 0x0004,
5281                     "fc_attach_transport vport failed...Failing load!.\n");
5282                 return -ENODEV;
5283         }
5284         ql_log(ql_log_info, NULL, 0x0005,
5285             "QLogic Fibre Channel HBA Driver: %s.\n",
5286             qla2x00_version_str);
5287         ret = pci_register_driver(&qla2xxx_pci_driver);
5288         if (ret) {
5289                 kmem_cache_destroy(srb_cachep);
5290                 qlt_exit();
5291                 fc_release_transport(qla2xxx_transport_template);
5292                 fc_release_transport(qla2xxx_transport_vport_template);
5293                 ql_log(ql_log_fatal, NULL, 0x0006,
5294                     "pci_register_driver failed...ret=%d Failing load!.\n",
5295                     ret);
5296         }
5297         return ret;
5298 }
5299
5300 /**
5301  * qla2x00_module_exit - Module cleanup.
5302  **/
5303 static void __exit
5304 qla2x00_module_exit(void)
5305 {
5306         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5307         pci_unregister_driver(&qla2xxx_pci_driver);
5308         qla2x00_release_firmware();
5309         kmem_cache_destroy(srb_cachep);
5310         qlt_exit();
5311         if (ctx_cachep)
5312                 kmem_cache_destroy(ctx_cachep);
5313         fc_release_transport(qla2xxx_transport_template);
5314         fc_release_transport(qla2xxx_transport_vport_template);
5315 }
5316
5317 module_init(qla2x00_module_init);
5318 module_exit(qla2x00_module_exit);
5319
5320 MODULE_AUTHOR("QLogic Corporation");
5321 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5322 MODULE_LICENSE("GPL");
5323 MODULE_VERSION(QLA2XXX_VERSION);
5324 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5325 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5326 MODULE_FIRMWARE(FW_FILE_ISP2300);
5327 MODULE_FIRMWARE(FW_FILE_ISP2322);
5328 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5329 MODULE_FIRMWARE(FW_FILE_ISP25XX);