2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2011 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
9 #include <linux/moduleparam.h>
10 #include <linux/vmalloc.h>
11 #include <linux/delay.h>
12 #include <linux/kthread.h>
13 #include <linux/mutex.h>
14 #include <linux/kobject.h>
15 #include <linux/slab.h>
17 #include <scsi/scsi_tcq.h>
18 #include <scsi/scsicam.h>
19 #include <scsi/scsi_transport.h>
20 #include <scsi/scsi_transport_fc.h>
25 char qla2x00_version_str[40];
27 static int apidev_major;
30 * SRB allocation cache
32 static struct kmem_cache *srb_cachep;
35 * CT6 CTX allocation cache
37 static struct kmem_cache *ctx_cachep;
39 * error level for logging
41 int ql_errlev = ql_log_all;
43 int ql2xlogintimeout = 20;
44 module_param(ql2xlogintimeout, int, S_IRUGO);
45 MODULE_PARM_DESC(ql2xlogintimeout,
46 "Login timeout value in seconds.");
48 int qlport_down_retry;
49 module_param(qlport_down_retry, int, S_IRUGO);
50 MODULE_PARM_DESC(qlport_down_retry,
51 "Maximum number of command retries to a port that returns "
52 "a PORT-DOWN status.");
54 int ql2xplogiabsentdevice;
55 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
56 MODULE_PARM_DESC(ql2xplogiabsentdevice,
57 "Option to enable PLOGI to devices that are not present after "
58 "a Fabric scan. This is needed for several broken switches. "
59 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
61 int ql2xloginretrycount = 0;
62 module_param(ql2xloginretrycount, int, S_IRUGO);
63 MODULE_PARM_DESC(ql2xloginretrycount,
64 "Specify an alternate value for the NVRAM login retry count.");
66 int ql2xallocfwdump = 1;
67 module_param(ql2xallocfwdump, int, S_IRUGO);
68 MODULE_PARM_DESC(ql2xallocfwdump,
69 "Option to enable allocation of memory for a firmware dump "
70 "during HBA initialization. Memory allocation requirements "
71 "vary by ISP type. Default is 1 - allocate memory.");
73 int ql2xextended_error_logging;
74 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
75 MODULE_PARM_DESC(ql2xextended_error_logging,
76 "Option to enable extended error logging,\n"
77 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
78 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
79 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
80 "\t\t0x02000000 - Async events. 0x01000000 - Timer routines.\n"
81 "\t\t0x00800000 - User space. 0x00400000 - Task Management.\n"
82 "\t\t0x00200000 - AER/EEH. 0x00100000 - Multi Q.\n"
83 "\t\t0x00080000 - P3P Specific. 0x00040000 - Virtual Port.\n"
84 "\t\t0x00020000 - Buffer Dump. 0x00010000 - Misc.\n"
85 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
86 "\t\t0x1e400000 - Preferred value for capturing essential "
87 "debug information (equivalent to old "
88 "ql2xextended_error_logging=1).\n"
89 "\t\tDo LOGICAL OR of the value to enable more than one level");
91 int ql2xshiftctondsd = 6;
92 module_param(ql2xshiftctondsd, int, S_IRUGO);
93 MODULE_PARM_DESC(ql2xshiftctondsd,
94 "Set to control shifting of command type processing "
95 "based on total number of SG elements.");
97 static void qla2x00_free_device(scsi_qla_host_t *);
100 module_param(ql2xfdmienable, int, S_IRUGO);
101 MODULE_PARM_DESC(ql2xfdmienable,
102 "Enables FDMI registrations. "
103 "0 - no FDMI. Default is 1 - perform FDMI.");
105 #define MAX_Q_DEPTH 32
106 static int ql2xmaxqdepth = MAX_Q_DEPTH;
107 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
108 MODULE_PARM_DESC(ql2xmaxqdepth,
109 "Maximum queue depth to report for target devices.");
111 /* Do not change the value of this after module load */
112 int ql2xenabledif = 0;
113 module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
114 MODULE_PARM_DESC(ql2xenabledif,
115 " Enable T10-CRC-DIF "
116 " Default is 0 - No DIF Support. 1 - Enable it"
117 ", 2 - Enable DIF for all types, except Type 0.");
119 int ql2xenablehba_err_chk = 2;
120 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
121 MODULE_PARM_DESC(ql2xenablehba_err_chk,
122 " Enable T10-CRC-DIF Error isolation by HBA:\n"
124 " 0 -- Error isolation disabled\n"
125 " 1 -- Error isolation enabled only for DIX Type 0\n"
126 " 2 -- Error isolation enabled for all Types\n");
128 int ql2xiidmaenable=1;
129 module_param(ql2xiidmaenable, int, S_IRUGO);
130 MODULE_PARM_DESC(ql2xiidmaenable,
131 "Enables iIDMA settings "
132 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
134 int ql2xmaxqueues = 1;
135 module_param(ql2xmaxqueues, int, S_IRUGO);
136 MODULE_PARM_DESC(ql2xmaxqueues,
137 "Enables MQ settings "
138 "Default is 1 for single queue. Set it to number "
139 "of queues in MQ mode.");
141 int ql2xmultique_tag;
142 module_param(ql2xmultique_tag, int, S_IRUGO);
143 MODULE_PARM_DESC(ql2xmultique_tag,
144 "Enables CPU affinity settings for the driver "
145 "Default is 0 for no affinity of request and response IO. "
146 "Set it to 1 to turn on the cpu affinity.");
149 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
150 MODULE_PARM_DESC(ql2xfwloadbin,
151 "Option to specify location from which to load ISP firmware:.\n"
152 " 2 -- load firmware via the request_firmware() (hotplug).\n"
154 " 1 -- load firmware from flash.\n"
155 " 0 -- use default semantics.\n");
158 module_param(ql2xetsenable, int, S_IRUGO);
159 MODULE_PARM_DESC(ql2xetsenable,
160 "Enables firmware ETS burst."
161 "Default is 0 - skip ETS enablement.");
164 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
165 MODULE_PARM_DESC(ql2xdbwr,
166 "Option to specify scheme for request queue posting.\n"
167 " 0 -- Regular doorbell.\n"
168 " 1 -- CAMRAM doorbell (faster).\n");
170 int ql2xtargetreset = 1;
171 module_param(ql2xtargetreset, int, S_IRUGO);
172 MODULE_PARM_DESC(ql2xtargetreset,
173 "Enable target reset."
174 "Default is 1 - use hw defaults.");
177 module_param(ql2xgffidenable, int, S_IRUGO);
178 MODULE_PARM_DESC(ql2xgffidenable,
179 "Enables GFF_ID checks of port type. "
180 "Default is 0 - Do not use GFF_ID information.");
182 int ql2xasynctmfenable;
183 module_param(ql2xasynctmfenable, int, S_IRUGO);
184 MODULE_PARM_DESC(ql2xasynctmfenable,
185 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
186 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
188 int ql2xdontresethba;
189 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
190 MODULE_PARM_DESC(ql2xdontresethba,
191 "Option to specify reset behaviour.\n"
192 " 0 (Default) -- Reset on failure.\n"
193 " 1 -- Do not reset on failure.\n");
195 uint ql2xmaxlun = MAX_LUNS;
196 module_param(ql2xmaxlun, uint, S_IRUGO);
197 MODULE_PARM_DESC(ql2xmaxlun,
198 "Defines the maximum LU number to register with the SCSI "
199 "midlayer. Default is 65535.");
201 int ql2xmdcapmask = 0x1F;
202 module_param(ql2xmdcapmask, int, S_IRUGO);
203 MODULE_PARM_DESC(ql2xmdcapmask,
204 "Set the Minidump driver capture mask level. "
205 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
207 int ql2xmdenable = 1;
208 module_param(ql2xmdenable, int, S_IRUGO);
209 MODULE_PARM_DESC(ql2xmdenable,
210 "Enable/disable MiniDump. "
211 "0 - MiniDump disabled. "
212 "1 (Default) - MiniDump enabled.");
215 * SCSI host template entry points
217 static int qla2xxx_slave_configure(struct scsi_device * device);
218 static int qla2xxx_slave_alloc(struct scsi_device *);
219 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
220 static void qla2xxx_scan_start(struct Scsi_Host *);
221 static void qla2xxx_slave_destroy(struct scsi_device *);
222 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
223 static int qla2xxx_eh_abort(struct scsi_cmnd *);
224 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
225 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
226 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
227 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
229 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
230 static int qla2x00_change_queue_type(struct scsi_device *, int);
232 struct scsi_host_template qla2xxx_driver_template = {
233 .module = THIS_MODULE,
234 .name = QLA2XXX_DRIVER_NAME,
235 .queuecommand = qla2xxx_queuecommand,
237 .eh_abort_handler = qla2xxx_eh_abort,
238 .eh_device_reset_handler = qla2xxx_eh_device_reset,
239 .eh_target_reset_handler = qla2xxx_eh_target_reset,
240 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
241 .eh_host_reset_handler = qla2xxx_eh_host_reset,
243 .slave_configure = qla2xxx_slave_configure,
245 .slave_alloc = qla2xxx_slave_alloc,
246 .slave_destroy = qla2xxx_slave_destroy,
247 .scan_finished = qla2xxx_scan_finished,
248 .scan_start = qla2xxx_scan_start,
249 .change_queue_depth = qla2x00_change_queue_depth,
250 .change_queue_type = qla2x00_change_queue_type,
253 .use_clustering = ENABLE_CLUSTERING,
254 .sg_tablesize = SG_ALL,
256 .max_sectors = 0xFFFF,
257 .shost_attrs = qla2x00_host_attrs,
260 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
261 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
263 /* TODO Convert to inlines
269 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
271 init_timer(&vha->timer);
272 vha->timer.expires = jiffies + interval * HZ;
273 vha->timer.data = (unsigned long)vha;
274 vha->timer.function = (void (*)(unsigned long))func;
275 add_timer(&vha->timer);
276 vha->timer_active = 1;
280 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
282 /* Currently used for 82XX only. */
283 if (vha->device_flags & DFLG_DEV_FAILED) {
284 ql_dbg(ql_dbg_timer, vha, 0x600d,
285 "Device in a failed state, returning.\n");
289 mod_timer(&vha->timer, jiffies + interval * HZ);
292 static __inline__ void
293 qla2x00_stop_timer(scsi_qla_host_t *vha)
295 del_timer_sync(&vha->timer);
296 vha->timer_active = 0;
299 static int qla2x00_do_dpc(void *data);
301 static void qla2x00_rst_aen(scsi_qla_host_t *);
303 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
304 struct req_que **, struct rsp_que **);
305 static void qla2x00_free_fw_dump(struct qla_hw_data *);
306 static void qla2x00_mem_free(struct qla_hw_data *);
307 static void qla2x00_sp_free_dma(srb_t *);
309 /* -------------------------------------------------------------------------- */
310 static int qla2x00_alloc_queues(struct qla_hw_data *ha)
312 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
313 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
315 if (!ha->req_q_map) {
316 ql_log(ql_log_fatal, vha, 0x003b,
317 "Unable to allocate memory for request queue ptrs.\n");
321 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
323 if (!ha->rsp_q_map) {
324 ql_log(ql_log_fatal, vha, 0x003c,
325 "Unable to allocate memory for response queue ptrs.\n");
328 set_bit(0, ha->rsp_qid_map);
329 set_bit(0, ha->req_qid_map);
333 kfree(ha->req_q_map);
334 ha->req_q_map = NULL;
339 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
341 if (req && req->ring)
342 dma_free_coherent(&ha->pdev->dev,
343 (req->length + 1) * sizeof(request_t),
344 req->ring, req->dma);
350 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
352 if (rsp && rsp->ring)
353 dma_free_coherent(&ha->pdev->dev,
354 (rsp->length + 1) * sizeof(response_t),
355 rsp->ring, rsp->dma);
361 static void qla2x00_free_queues(struct qla_hw_data *ha)
367 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
368 req = ha->req_q_map[cnt];
369 qla2x00_free_req_que(ha, req);
371 kfree(ha->req_q_map);
372 ha->req_q_map = NULL;
374 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
375 rsp = ha->rsp_q_map[cnt];
376 qla2x00_free_rsp_que(ha, rsp);
378 kfree(ha->rsp_q_map);
379 ha->rsp_q_map = NULL;
382 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
384 uint16_t options = 0;
386 struct qla_hw_data *ha = vha->hw;
388 if (!(ha->fw_attributes & BIT_6)) {
389 ql_log(ql_log_warn, vha, 0x00d8,
390 "Firmware is not multi-queue capable.\n");
393 if (ql2xmultique_tag) {
394 /* create a request queue for IO */
396 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
397 QLA_DEFAULT_QUE_QOS);
399 ql_log(ql_log_warn, vha, 0x00e0,
400 "Failed to create request queue.\n");
403 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
404 vha->req = ha->req_q_map[req];
406 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
407 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
409 ql_log(ql_log_warn, vha, 0x00e8,
410 "Failed to create response queue.\n");
414 ha->flags.cpu_affinity_enabled = 1;
415 ql_dbg(ql_dbg_multiq, vha, 0xc007,
416 "CPU affinity mode enalbed, "
417 "no. of response queues:%d no. of request queues:%d.\n",
418 ha->max_rsp_queues, ha->max_req_queues);
419 ql_dbg(ql_dbg_init, vha, 0x00e9,
420 "CPU affinity mode enalbed, "
421 "no. of response queues:%d no. of request queues:%d.\n",
422 ha->max_rsp_queues, ha->max_req_queues);
426 qla25xx_delete_queues(vha);
427 destroy_workqueue(ha->wq);
429 vha->req = ha->req_q_map[0];
432 kfree(ha->req_q_map);
433 kfree(ha->rsp_q_map);
434 ha->max_req_queues = ha->max_rsp_queues = 1;
439 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
441 struct qla_hw_data *ha = vha->hw;
442 static char *pci_bus_modes[] = {
443 "33", "66", "100", "133",
448 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
451 strcat(str, pci_bus_modes[pci_bus]);
453 pci_bus = (ha->pci_attr & BIT_8) >> 8;
455 strcat(str, pci_bus_modes[pci_bus]);
457 strcat(str, " MHz)");
463 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
465 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
466 struct qla_hw_data *ha = vha->hw;
470 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
473 uint16_t pcie_lstat, lspeed, lwidth;
476 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
477 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
478 lwidth = (pcie_lstat &
479 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
481 strcpy(str, "PCIe (");
483 strcat(str, "2.5GT/s ");
484 else if (lspeed == 2)
485 strcat(str, "5.0GT/s ");
487 strcat(str, "<unknown> ");
488 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
495 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
496 if (pci_bus == 0 || pci_bus == 8) {
498 strcat(str, pci_bus_modes[pci_bus >> 3]);
502 strcat(str, "Mode 2");
504 strcat(str, "Mode 1");
506 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
508 strcat(str, " MHz)");
514 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
517 struct qla_hw_data *ha = vha->hw;
519 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
520 ha->fw_minor_version,
521 ha->fw_subminor_version);
523 if (ha->fw_attributes & BIT_9) {
528 switch (ha->fw_attributes & 0xFF) {
542 sprintf(un_str, "(%x)", ha->fw_attributes);
546 if (ha->fw_attributes & 0x100)
553 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
555 struct qla_hw_data *ha = vha->hw;
557 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
558 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
562 static inline srb_t *
563 qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
564 struct scsi_cmnd *cmd)
567 struct qla_hw_data *ha = vha->hw;
569 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
571 ql_log(ql_log_warn, vha, 0x3006,
572 "Memory allocation failed for sp.\n");
576 atomic_set(&sp->ref_count, 1);
580 CMD_SP(cmd) = (void *)sp;
587 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
589 scsi_qla_host_t *vha = shost_priv(host);
590 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
591 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
592 struct qla_hw_data *ha = vha->hw;
593 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
597 if (ha->flags.eeh_busy) {
598 if (ha->flags.pci_channel_io_perm_failure) {
599 ql_dbg(ql_dbg_io, vha, 0x3001,
600 "PCI Channel IO permanent failure, exiting "
602 cmd->result = DID_NO_CONNECT << 16;
604 ql_dbg(ql_dbg_io, vha, 0x3002,
605 "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
606 cmd->result = DID_REQUEUE << 16;
608 goto qc24_fail_command;
611 rval = fc_remote_port_chkready(rport);
614 ql_dbg(ql_dbg_io, vha, 0x3003,
615 "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
617 goto qc24_fail_command;
620 if (!vha->flags.difdix_supported &&
621 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
622 ql_dbg(ql_dbg_io, vha, 0x3004,
623 "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
625 cmd->result = DID_NO_CONNECT << 16;
626 goto qc24_fail_command;
630 cmd->result = DID_NO_CONNECT << 16;
631 goto qc24_fail_command;
634 if (atomic_read(&fcport->state) != FCS_ONLINE) {
635 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
636 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
637 ql_dbg(ql_dbg_io, vha, 0x3005,
638 "Returning DNC, fcport_state=%d loop_state=%d.\n",
639 atomic_read(&fcport->state),
640 atomic_read(&base_vha->loop_state));
641 cmd->result = DID_NO_CONNECT << 16;
642 goto qc24_fail_command;
644 goto qc24_target_busy;
647 sp = qla2x00_get_new_sp(base_vha, fcport, cmd);
651 rval = ha->isp_ops->start_scsi(sp);
652 if (rval != QLA_SUCCESS) {
653 ql_dbg(ql_dbg_io, vha, 0x3013,
654 "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
655 goto qc24_host_busy_free_sp;
660 qc24_host_busy_free_sp:
661 qla2x00_sp_free_dma(sp);
662 mempool_free(sp, ha->srb_mempool);
665 return SCSI_MLQUEUE_HOST_BUSY;
668 return SCSI_MLQUEUE_TARGET_BUSY;
677 * qla2x00_eh_wait_on_command
678 * Waits for the command to be returned by the Firmware for some
682 * cmd = Scsi Command to wait on.
689 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
691 #define ABORT_POLLING_PERIOD 1000
692 #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
693 unsigned long wait_iter = ABORT_WAIT_ITER;
694 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
695 struct qla_hw_data *ha = vha->hw;
696 int ret = QLA_SUCCESS;
698 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
699 ql_dbg(ql_dbg_taskm, vha, 0x8005,
700 "Return:eh_wait.\n");
704 while (CMD_SP(cmd) && wait_iter--) {
705 msleep(ABORT_POLLING_PERIOD);
708 ret = QLA_FUNCTION_FAILED;
714 * qla2x00_wait_for_hba_online
715 * Wait till the HBA is online after going through
716 * <= MAX_RETRIES_OF_ISP_ABORT or
717 * finally HBA is disabled ie marked offline
720 * ha - pointer to host adapter structure
723 * Does context switching-Release SPIN_LOCK
724 * (if any) before calling this routine.
727 * Success (Adapter is online) : 0
728 * Failed (Adapter is offline/disabled) : 1
731 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
734 unsigned long wait_online;
735 struct qla_hw_data *ha = vha->hw;
736 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
738 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
739 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
740 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
741 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
742 ha->dpc_active) && time_before(jiffies, wait_online)) {
746 if (base_vha->flags.online)
747 return_status = QLA_SUCCESS;
749 return_status = QLA_FUNCTION_FAILED;
751 return (return_status);
755 * qla2x00_wait_for_reset_ready
756 * Wait till the HBA is online after going through
757 * <= MAX_RETRIES_OF_ISP_ABORT or
758 * finally HBA is disabled ie marked offline or flash
759 * operations are in progress.
762 * ha - pointer to host adapter structure
765 * Does context switching-Release SPIN_LOCK
766 * (if any) before calling this routine.
769 * Success (Adapter is online/no flash ops) : 0
770 * Failed (Adapter is offline/disabled/flash ops in progress) : 1
773 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
776 unsigned long wait_online;
777 struct qla_hw_data *ha = vha->hw;
778 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
780 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
781 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
782 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
783 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
784 ha->optrom_state != QLA_SWAITING ||
785 ha->dpc_active) && time_before(jiffies, wait_online))
788 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
789 return_status = QLA_SUCCESS;
791 return_status = QLA_FUNCTION_FAILED;
793 ql_dbg(ql_dbg_taskm, vha, 0x8019,
794 "%s return status=%d.\n", __func__, return_status);
796 return return_status;
800 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
803 unsigned long wait_reset;
804 struct qla_hw_data *ha = vha->hw;
805 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
807 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
808 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
809 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
810 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
811 ha->dpc_active) && time_before(jiffies, wait_reset)) {
815 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
816 ha->flags.chip_reset_done)
819 if (ha->flags.chip_reset_done)
820 return_status = QLA_SUCCESS;
822 return_status = QLA_FUNCTION_FAILED;
824 return return_status;
828 sp_get(struct srb *sp)
830 atomic_inc(&sp->ref_count);
833 /**************************************************************************
837 * The abort function will abort the specified command.
840 * cmd = Linux SCSI command packet to be aborted.
843 * Either SUCCESS or FAILED.
846 * Only return FAILED if command not returned by firmware.
847 **************************************************************************/
849 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
851 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
854 unsigned int id, lun;
857 struct qla_hw_data *ha = vha->hw;
862 ret = fc_block_scsi_eh(cmd);
867 id = cmd->device->id;
868 lun = cmd->device->lun;
870 spin_lock_irqsave(&ha->hardware_lock, flags);
871 sp = (srb_t *) CMD_SP(cmd);
873 spin_unlock_irqrestore(&ha->hardware_lock, flags);
877 ql_dbg(ql_dbg_taskm, vha, 0x8002,
878 "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
879 vha->host_no, id, lun, sp, cmd);
881 /* Get a reference to the sp and drop the lock.*/
884 spin_unlock_irqrestore(&ha->hardware_lock, flags);
885 if (ha->isp_ops->abort_command(sp)) {
887 ql_dbg(ql_dbg_taskm, vha, 0x8003,
888 "Abort command mbx failed cmd=%p.\n", cmd);
890 ql_dbg(ql_dbg_taskm, vha, 0x8004,
891 "Abort command mbx success cmd=%p.\n", cmd);
895 spin_lock_irqsave(&ha->hardware_lock, flags);
896 qla2x00_sp_compl(ha, sp);
897 spin_unlock_irqrestore(&ha->hardware_lock, flags);
899 /* Did the command return during mailbox execution? */
900 if (ret == FAILED && !CMD_SP(cmd))
903 /* Wait for the command to be returned. */
905 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
906 ql_log(ql_log_warn, vha, 0x8006,
907 "Abort handler timed out cmd=%p.\n", cmd);
912 ql_log(ql_log_info, vha, 0x801c,
913 "Abort command issued nexus=%ld:%d:%d -- %d %x.\n",
914 vha->host_no, id, lun, wait, ret);
920 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
921 unsigned int l, enum nexus_wait_type type)
923 int cnt, match, status;
925 struct qla_hw_data *ha = vha->hw;
929 status = QLA_SUCCESS;
931 spin_lock_irqsave(&ha->hardware_lock, flags);
933 for (cnt = 1; status == QLA_SUCCESS &&
934 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
935 sp = req->outstanding_cmds[cnt];
938 if ((sp->ctx) && !IS_PROT_IO(sp))
940 if (vha->vp_idx != sp->fcport->vha->vp_idx)
948 match = sp->cmd->device->id == t;
951 match = (sp->cmd->device->id == t &&
952 sp->cmd->device->lun == l);
958 spin_unlock_irqrestore(&ha->hardware_lock, flags);
959 status = qla2x00_eh_wait_on_command(sp->cmd);
960 spin_lock_irqsave(&ha->hardware_lock, flags);
962 spin_unlock_irqrestore(&ha->hardware_lock, flags);
967 static char *reset_errors[] = {
970 "Task management failed",
971 "Waiting for command completions",
975 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
976 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
978 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
979 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
986 err = fc_block_scsi_eh(cmd);
990 ql_log(ql_log_info, vha, 0x8009,
991 "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
992 cmd->device->id, cmd->device->lun, cmd);
995 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
996 ql_log(ql_log_warn, vha, 0x800a,
997 "Wait for hba online failed for cmd=%p.\n", cmd);
998 goto eh_reset_failed;
1001 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1003 ql_log(ql_log_warn, vha, 0x800c,
1004 "do_reset failed for cmd=%p.\n", cmd);
1005 goto eh_reset_failed;
1008 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1009 cmd->device->lun, type) != QLA_SUCCESS) {
1010 ql_log(ql_log_warn, vha, 0x800d,
1011 "wait for peding cmds failed for cmd=%p.\n", cmd);
1012 goto eh_reset_failed;
1015 ql_log(ql_log_info, vha, 0x800e,
1016 "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1017 vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1022 ql_log(ql_log_info, vha, 0x800f,
1023 "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1024 reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1030 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1032 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1033 struct qla_hw_data *ha = vha->hw;
1035 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1036 ha->isp_ops->lun_reset);
1040 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1042 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1043 struct qla_hw_data *ha = vha->hw;
1045 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1046 ha->isp_ops->target_reset);
1049 /**************************************************************************
1050 * qla2xxx_eh_bus_reset
1053 * The bus reset function will reset the bus and abort any executing
1057 * cmd = Linux SCSI command packet of the command that cause the
1061 * SUCCESS/FAILURE (defined as macro in scsi.h).
1063 **************************************************************************/
1065 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1067 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1068 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1070 unsigned int id, lun;
1072 id = cmd->device->id;
1073 lun = cmd->device->lun;
1079 ret = fc_block_scsi_eh(cmd);
1084 ql_log(ql_log_info, vha, 0x8012,
1085 "BUS RESET ISSUED nexus=%ld:%d%d.\n", vha->host_no, id, lun);
1087 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1088 ql_log(ql_log_fatal, vha, 0x8013,
1089 "Wait for hba online failed board disabled.\n");
1090 goto eh_bus_reset_done;
1093 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1097 goto eh_bus_reset_done;
1099 /* Flush outstanding commands. */
1100 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1102 ql_log(ql_log_warn, vha, 0x8014,
1103 "Wait for pending commands failed.\n");
1108 ql_log(ql_log_warn, vha, 0x802b,
1109 "BUS RESET %s nexus=%ld:%d:%d.\n",
1110 (ret == FAILED) ? "FAILED" : "SUCCEDED", vha->host_no, id, lun);
1115 /**************************************************************************
1116 * qla2xxx_eh_host_reset
1119 * The reset function will reset the Adapter.
1122 * cmd = Linux SCSI command packet of the command that cause the
1126 * Either SUCCESS or FAILED.
1129 **************************************************************************/
1131 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1133 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1134 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1135 struct qla_hw_data *ha = vha->hw;
1137 unsigned int id, lun;
1138 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1140 id = cmd->device->id;
1141 lun = cmd->device->lun;
1147 ret = fc_block_scsi_eh(cmd);
1152 ql_log(ql_log_info, vha, 0x8018,
1153 "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1155 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1156 goto eh_host_reset_lock;
1158 if (vha != base_vha) {
1159 if (qla2x00_vp_abort_isp(vha))
1160 goto eh_host_reset_lock;
1162 if (IS_QLA82XX(vha->hw)) {
1163 if (!qla82xx_fcoe_ctx_reset(vha)) {
1164 /* Ctx reset success */
1166 goto eh_host_reset_lock;
1168 /* fall thru if ctx reset failed */
1171 flush_workqueue(ha->wq);
1173 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1174 if (ha->isp_ops->abort_isp(base_vha)) {
1175 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1176 /* failed. schedule dpc to try */
1177 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1179 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1180 ql_log(ql_log_warn, vha, 0x802a,
1181 "wait for hba online failed.\n");
1182 goto eh_host_reset_lock;
1185 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1188 /* Waiting for command to be returned to OS.*/
1189 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1194 ql_log(ql_log_info, vha, 0x8017,
1195 "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1196 (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1202 * qla2x00_loop_reset
1206 * ha = adapter block pointer.
1212 qla2x00_loop_reset(scsi_qla_host_t *vha)
1215 struct fc_port *fcport;
1216 struct qla_hw_data *ha = vha->hw;
1218 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1219 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1220 if (fcport->port_type != FCT_TARGET)
1223 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1224 if (ret != QLA_SUCCESS) {
1225 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1226 "Bus Reset failed: Target Reset=%d "
1227 "d_id=%x.\n", ret, fcport->d_id.b24);
1232 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
1233 ret = qla2x00_full_login_lip(vha);
1234 if (ret != QLA_SUCCESS) {
1235 ql_dbg(ql_dbg_taskm, vha, 0x802d,
1236 "full_login_lip=%d.\n", ret);
1238 atomic_set(&vha->loop_state, LOOP_DOWN);
1239 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1240 qla2x00_mark_all_devices_lost(vha, 0);
1243 if (ha->flags.enable_lip_reset) {
1244 ret = qla2x00_lip_reset(vha);
1245 if (ret != QLA_SUCCESS)
1246 ql_dbg(ql_dbg_taskm, vha, 0x802e,
1247 "lip_reset failed (%d).\n", ret);
1250 /* Issue marker command only when we are going to start the I/O */
1251 vha->marker_needed = 1;
1257 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1260 unsigned long flags;
1262 struct srb_ctx *ctx;
1263 struct qla_hw_data *ha = vha->hw;
1264 struct req_que *req;
1266 spin_lock_irqsave(&ha->hardware_lock, flags);
1267 for (que = 0; que < ha->max_req_queues; que++) {
1268 req = ha->req_q_map[que];
1271 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1272 sp = req->outstanding_cmds[cnt];
1274 req->outstanding_cmds[cnt] = NULL;
1276 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1278 sp->cmd->result = res;
1279 qla2x00_sp_compl(ha, sp);
1282 if (ctx->type == SRB_ELS_CMD_RPT ||
1283 ctx->type == SRB_ELS_CMD_HST ||
1284 ctx->type == SRB_CT_CMD) {
1285 struct fc_bsg_job *bsg_job =
1287 if (bsg_job->request->msgcode
1290 bsg_job->req->errors = 0;
1291 bsg_job->reply->result = res;
1292 bsg_job->job_done(bsg_job);
1297 ctx->u.iocb_cmd->free(sp);
1303 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1307 qla2xxx_slave_alloc(struct scsi_device *sdev)
1309 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1311 if (!rport || fc_remote_port_chkready(rport))
1314 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1320 qla2xxx_slave_configure(struct scsi_device *sdev)
1322 scsi_qla_host_t *vha = shost_priv(sdev->host);
1323 struct req_que *req = vha->req;
1325 if (sdev->tagged_supported)
1326 scsi_activate_tcq(sdev, req->max_q_depth);
1328 scsi_deactivate_tcq(sdev, req->max_q_depth);
1333 qla2xxx_slave_destroy(struct scsi_device *sdev)
1335 sdev->hostdata = NULL;
1338 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1340 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1342 if (!scsi_track_queue_full(sdev, qdepth))
1345 ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1346 "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1347 sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1350 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1352 fc_port_t *fcport = sdev->hostdata;
1353 struct scsi_qla_host *vha = fcport->vha;
1354 struct req_que *req = NULL;
1360 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1363 if (sdev->ordered_tags)
1364 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1366 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1368 ql_dbg(ql_dbg_io, vha, 0x302a,
1369 "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1370 sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1374 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1377 case SCSI_QDEPTH_DEFAULT:
1378 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1380 case SCSI_QDEPTH_QFULL:
1381 qla2x00_handle_queue_full(sdev, qdepth);
1383 case SCSI_QDEPTH_RAMP_UP:
1384 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1390 return sdev->queue_depth;
1394 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1396 if (sdev->tagged_supported) {
1397 scsi_set_tag_type(sdev, tag_type);
1399 scsi_activate_tcq(sdev, sdev->queue_depth);
1401 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1409 * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1412 * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1413 * supported addressing method.
1416 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1418 /* Assume a 32bit DMA mask. */
1419 ha->flags.enable_64bit_addressing = 0;
1421 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1422 /* Any upper-dword bits set? */
1423 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1424 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1425 /* Ok, a 64bit DMA mask is applicable. */
1426 ha->flags.enable_64bit_addressing = 1;
1427 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1428 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1433 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1434 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1438 qla2x00_enable_intrs(struct qla_hw_data *ha)
1440 unsigned long flags = 0;
1441 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1443 spin_lock_irqsave(&ha->hardware_lock, flags);
1444 ha->interrupts_on = 1;
1445 /* enable risc and host interrupts */
1446 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
1447 RD_REG_WORD(®->ictrl);
1448 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1453 qla2x00_disable_intrs(struct qla_hw_data *ha)
1455 unsigned long flags = 0;
1456 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1458 spin_lock_irqsave(&ha->hardware_lock, flags);
1459 ha->interrupts_on = 0;
1460 /* disable risc and host interrupts */
1461 WRT_REG_WORD(®->ictrl, 0);
1462 RD_REG_WORD(®->ictrl);
1463 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1467 qla24xx_enable_intrs(struct qla_hw_data *ha)
1469 unsigned long flags = 0;
1470 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1472 spin_lock_irqsave(&ha->hardware_lock, flags);
1473 ha->interrupts_on = 1;
1474 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT);
1475 RD_REG_DWORD(®->ictrl);
1476 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1480 qla24xx_disable_intrs(struct qla_hw_data *ha)
1482 unsigned long flags = 0;
1483 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1485 if (IS_NOPOLLING_TYPE(ha))
1487 spin_lock_irqsave(&ha->hardware_lock, flags);
1488 ha->interrupts_on = 0;
1489 WRT_REG_DWORD(®->ictrl, 0);
1490 RD_REG_DWORD(®->ictrl);
1491 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1495 qla2x00_iospace_config(struct qla_hw_data *ha)
1497 resource_size_t pio;
1502 return qla82xx_iospace_config(ha);
1504 if (pci_request_selected_regions(ha->pdev, ha->bars,
1505 QLA2XXX_DRIVER_NAME)) {
1506 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1507 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1508 pci_name(ha->pdev));
1509 goto iospace_error_exit;
1511 if (!(ha->bars & 1))
1514 /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1515 pio = pci_resource_start(ha->pdev, 0);
1516 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1517 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1518 ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1519 "Invalid pci I/O region size (%s).\n",
1520 pci_name(ha->pdev));
1524 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1525 "Region #0 no a PIO resource (%s).\n",
1526 pci_name(ha->pdev));
1529 ha->pio_address = pio;
1530 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1531 "PIO address=%llu.\n",
1532 (unsigned long long)ha->pio_address);
1535 /* Use MMIO operations for all accesses. */
1536 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1537 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1538 "Region #1 not an MMIO resource (%s), aborting.\n",
1539 pci_name(ha->pdev));
1540 goto iospace_error_exit;
1542 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1543 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1544 "Invalid PCI mem region size (%s), aborting.\n",
1545 pci_name(ha->pdev));
1546 goto iospace_error_exit;
1549 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1551 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1552 "Cannot remap MMIO (%s), aborting.\n",
1553 pci_name(ha->pdev));
1554 goto iospace_error_exit;
1557 /* Determine queue resources */
1558 ha->max_req_queues = ha->max_rsp_queues = 1;
1559 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1560 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1561 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1564 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1565 pci_resource_len(ha->pdev, 3));
1567 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1568 "MQIO Base=%p.\n", ha->mqiobase);
1569 /* Read MSIX vector size of the board */
1570 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1571 ha->msix_count = msix;
1572 /* Max queues are bounded by available msix vectors */
1573 /* queue 0 uses two msix vectors */
1574 if (ql2xmultique_tag) {
1575 cpus = num_online_cpus();
1576 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1577 (cpus + 1) : (ha->msix_count - 1);
1578 ha->max_req_queues = 2;
1579 } else if (ql2xmaxqueues > 1) {
1580 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1581 QLA_MQ_SIZE : ql2xmaxqueues;
1582 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1583 "QoS mode set, max no of request queues:%d.\n",
1584 ha->max_req_queues);
1585 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1586 "QoS mode set, max no of request queues:%d.\n",
1587 ha->max_req_queues);
1589 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1590 "MSI-X vector count: %d.\n", msix);
1592 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1593 "BAR 3 not enabled.\n");
1596 ha->msix_count = ha->max_rsp_queues + 1;
1597 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1598 "MSIX Count:%d.\n", ha->msix_count);
1606 static struct isp_operations qla2100_isp_ops = {
1607 .pci_config = qla2100_pci_config,
1608 .reset_chip = qla2x00_reset_chip,
1609 .chip_diag = qla2x00_chip_diag,
1610 .config_rings = qla2x00_config_rings,
1611 .reset_adapter = qla2x00_reset_adapter,
1612 .nvram_config = qla2x00_nvram_config,
1613 .update_fw_options = qla2x00_update_fw_options,
1614 .load_risc = qla2x00_load_risc,
1615 .pci_info_str = qla2x00_pci_info_str,
1616 .fw_version_str = qla2x00_fw_version_str,
1617 .intr_handler = qla2100_intr_handler,
1618 .enable_intrs = qla2x00_enable_intrs,
1619 .disable_intrs = qla2x00_disable_intrs,
1620 .abort_command = qla2x00_abort_command,
1621 .target_reset = qla2x00_abort_target,
1622 .lun_reset = qla2x00_lun_reset,
1623 .fabric_login = qla2x00_login_fabric,
1624 .fabric_logout = qla2x00_fabric_logout,
1625 .calc_req_entries = qla2x00_calc_iocbs_32,
1626 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1627 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1628 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1629 .read_nvram = qla2x00_read_nvram_data,
1630 .write_nvram = qla2x00_write_nvram_data,
1631 .fw_dump = qla2100_fw_dump,
1634 .beacon_blink = NULL,
1635 .read_optrom = qla2x00_read_optrom_data,
1636 .write_optrom = qla2x00_write_optrom_data,
1637 .get_flash_version = qla2x00_get_flash_version,
1638 .start_scsi = qla2x00_start_scsi,
1639 .abort_isp = qla2x00_abort_isp,
1640 .iospace_config = qla2x00_iospace_config,
1643 static struct isp_operations qla2300_isp_ops = {
1644 .pci_config = qla2300_pci_config,
1645 .reset_chip = qla2x00_reset_chip,
1646 .chip_diag = qla2x00_chip_diag,
1647 .config_rings = qla2x00_config_rings,
1648 .reset_adapter = qla2x00_reset_adapter,
1649 .nvram_config = qla2x00_nvram_config,
1650 .update_fw_options = qla2x00_update_fw_options,
1651 .load_risc = qla2x00_load_risc,
1652 .pci_info_str = qla2x00_pci_info_str,
1653 .fw_version_str = qla2x00_fw_version_str,
1654 .intr_handler = qla2300_intr_handler,
1655 .enable_intrs = qla2x00_enable_intrs,
1656 .disable_intrs = qla2x00_disable_intrs,
1657 .abort_command = qla2x00_abort_command,
1658 .target_reset = qla2x00_abort_target,
1659 .lun_reset = qla2x00_lun_reset,
1660 .fabric_login = qla2x00_login_fabric,
1661 .fabric_logout = qla2x00_fabric_logout,
1662 .calc_req_entries = qla2x00_calc_iocbs_32,
1663 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1664 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1665 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1666 .read_nvram = qla2x00_read_nvram_data,
1667 .write_nvram = qla2x00_write_nvram_data,
1668 .fw_dump = qla2300_fw_dump,
1669 .beacon_on = qla2x00_beacon_on,
1670 .beacon_off = qla2x00_beacon_off,
1671 .beacon_blink = qla2x00_beacon_blink,
1672 .read_optrom = qla2x00_read_optrom_data,
1673 .write_optrom = qla2x00_write_optrom_data,
1674 .get_flash_version = qla2x00_get_flash_version,
1675 .start_scsi = qla2x00_start_scsi,
1676 .abort_isp = qla2x00_abort_isp,
1677 .iospace_config = qla2x00_iospace_config,
1680 static struct isp_operations qla24xx_isp_ops = {
1681 .pci_config = qla24xx_pci_config,
1682 .reset_chip = qla24xx_reset_chip,
1683 .chip_diag = qla24xx_chip_diag,
1684 .config_rings = qla24xx_config_rings,
1685 .reset_adapter = qla24xx_reset_adapter,
1686 .nvram_config = qla24xx_nvram_config,
1687 .update_fw_options = qla24xx_update_fw_options,
1688 .load_risc = qla24xx_load_risc,
1689 .pci_info_str = qla24xx_pci_info_str,
1690 .fw_version_str = qla24xx_fw_version_str,
1691 .intr_handler = qla24xx_intr_handler,
1692 .enable_intrs = qla24xx_enable_intrs,
1693 .disable_intrs = qla24xx_disable_intrs,
1694 .abort_command = qla24xx_abort_command,
1695 .target_reset = qla24xx_abort_target,
1696 .lun_reset = qla24xx_lun_reset,
1697 .fabric_login = qla24xx_login_fabric,
1698 .fabric_logout = qla24xx_fabric_logout,
1699 .calc_req_entries = NULL,
1700 .build_iocbs = NULL,
1701 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1702 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1703 .read_nvram = qla24xx_read_nvram_data,
1704 .write_nvram = qla24xx_write_nvram_data,
1705 .fw_dump = qla24xx_fw_dump,
1706 .beacon_on = qla24xx_beacon_on,
1707 .beacon_off = qla24xx_beacon_off,
1708 .beacon_blink = qla24xx_beacon_blink,
1709 .read_optrom = qla24xx_read_optrom_data,
1710 .write_optrom = qla24xx_write_optrom_data,
1711 .get_flash_version = qla24xx_get_flash_version,
1712 .start_scsi = qla24xx_start_scsi,
1713 .abort_isp = qla2x00_abort_isp,
1714 .iospace_config = qla2x00_iospace_config,
1717 static struct isp_operations qla25xx_isp_ops = {
1718 .pci_config = qla25xx_pci_config,
1719 .reset_chip = qla24xx_reset_chip,
1720 .chip_diag = qla24xx_chip_diag,
1721 .config_rings = qla24xx_config_rings,
1722 .reset_adapter = qla24xx_reset_adapter,
1723 .nvram_config = qla24xx_nvram_config,
1724 .update_fw_options = qla24xx_update_fw_options,
1725 .load_risc = qla24xx_load_risc,
1726 .pci_info_str = qla24xx_pci_info_str,
1727 .fw_version_str = qla24xx_fw_version_str,
1728 .intr_handler = qla24xx_intr_handler,
1729 .enable_intrs = qla24xx_enable_intrs,
1730 .disable_intrs = qla24xx_disable_intrs,
1731 .abort_command = qla24xx_abort_command,
1732 .target_reset = qla24xx_abort_target,
1733 .lun_reset = qla24xx_lun_reset,
1734 .fabric_login = qla24xx_login_fabric,
1735 .fabric_logout = qla24xx_fabric_logout,
1736 .calc_req_entries = NULL,
1737 .build_iocbs = NULL,
1738 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1739 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1740 .read_nvram = qla25xx_read_nvram_data,
1741 .write_nvram = qla25xx_write_nvram_data,
1742 .fw_dump = qla25xx_fw_dump,
1743 .beacon_on = qla24xx_beacon_on,
1744 .beacon_off = qla24xx_beacon_off,
1745 .beacon_blink = qla24xx_beacon_blink,
1746 .read_optrom = qla25xx_read_optrom_data,
1747 .write_optrom = qla24xx_write_optrom_data,
1748 .get_flash_version = qla24xx_get_flash_version,
1749 .start_scsi = qla24xx_dif_start_scsi,
1750 .abort_isp = qla2x00_abort_isp,
1751 .iospace_config = qla2x00_iospace_config,
1754 static struct isp_operations qla81xx_isp_ops = {
1755 .pci_config = qla25xx_pci_config,
1756 .reset_chip = qla24xx_reset_chip,
1757 .chip_diag = qla24xx_chip_diag,
1758 .config_rings = qla24xx_config_rings,
1759 .reset_adapter = qla24xx_reset_adapter,
1760 .nvram_config = qla81xx_nvram_config,
1761 .update_fw_options = qla81xx_update_fw_options,
1762 .load_risc = qla81xx_load_risc,
1763 .pci_info_str = qla24xx_pci_info_str,
1764 .fw_version_str = qla24xx_fw_version_str,
1765 .intr_handler = qla24xx_intr_handler,
1766 .enable_intrs = qla24xx_enable_intrs,
1767 .disable_intrs = qla24xx_disable_intrs,
1768 .abort_command = qla24xx_abort_command,
1769 .target_reset = qla24xx_abort_target,
1770 .lun_reset = qla24xx_lun_reset,
1771 .fabric_login = qla24xx_login_fabric,
1772 .fabric_logout = qla24xx_fabric_logout,
1773 .calc_req_entries = NULL,
1774 .build_iocbs = NULL,
1775 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1776 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1778 .write_nvram = NULL,
1779 .fw_dump = qla81xx_fw_dump,
1780 .beacon_on = qla24xx_beacon_on,
1781 .beacon_off = qla24xx_beacon_off,
1782 .beacon_blink = qla24xx_beacon_blink,
1783 .read_optrom = qla25xx_read_optrom_data,
1784 .write_optrom = qla24xx_write_optrom_data,
1785 .get_flash_version = qla24xx_get_flash_version,
1786 .start_scsi = qla24xx_dif_start_scsi,
1787 .abort_isp = qla2x00_abort_isp,
1788 .iospace_config = qla2x00_iospace_config,
1791 static struct isp_operations qla82xx_isp_ops = {
1792 .pci_config = qla82xx_pci_config,
1793 .reset_chip = qla82xx_reset_chip,
1794 .chip_diag = qla24xx_chip_diag,
1795 .config_rings = qla82xx_config_rings,
1796 .reset_adapter = qla24xx_reset_adapter,
1797 .nvram_config = qla81xx_nvram_config,
1798 .update_fw_options = qla24xx_update_fw_options,
1799 .load_risc = qla82xx_load_risc,
1800 .pci_info_str = qla82xx_pci_info_str,
1801 .fw_version_str = qla24xx_fw_version_str,
1802 .intr_handler = qla82xx_intr_handler,
1803 .enable_intrs = qla82xx_enable_intrs,
1804 .disable_intrs = qla82xx_disable_intrs,
1805 .abort_command = qla24xx_abort_command,
1806 .target_reset = qla24xx_abort_target,
1807 .lun_reset = qla24xx_lun_reset,
1808 .fabric_login = qla24xx_login_fabric,
1809 .fabric_logout = qla24xx_fabric_logout,
1810 .calc_req_entries = NULL,
1811 .build_iocbs = NULL,
1812 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1813 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1814 .read_nvram = qla24xx_read_nvram_data,
1815 .write_nvram = qla24xx_write_nvram_data,
1816 .fw_dump = qla24xx_fw_dump,
1817 .beacon_on = qla82xx_beacon_on,
1818 .beacon_off = qla82xx_beacon_off,
1819 .beacon_blink = NULL,
1820 .read_optrom = qla82xx_read_optrom_data,
1821 .write_optrom = qla82xx_write_optrom_data,
1822 .get_flash_version = qla24xx_get_flash_version,
1823 .start_scsi = qla82xx_start_scsi,
1824 .abort_isp = qla82xx_abort_isp,
1825 .iospace_config = qla82xx_iospace_config,
1829 qla2x00_set_isp_flags(struct qla_hw_data *ha)
1831 ha->device_type = DT_EXTENDED_IDS;
1832 switch (ha->pdev->device) {
1833 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1834 ha->device_type |= DT_ISP2100;
1835 ha->device_type &= ~DT_EXTENDED_IDS;
1836 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1838 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1839 ha->device_type |= DT_ISP2200;
1840 ha->device_type &= ~DT_EXTENDED_IDS;
1841 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1843 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1844 ha->device_type |= DT_ISP2300;
1845 ha->device_type |= DT_ZIO_SUPPORTED;
1846 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1848 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1849 ha->device_type |= DT_ISP2312;
1850 ha->device_type |= DT_ZIO_SUPPORTED;
1851 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1853 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1854 ha->device_type |= DT_ISP2322;
1855 ha->device_type |= DT_ZIO_SUPPORTED;
1856 if (ha->pdev->subsystem_vendor == 0x1028 &&
1857 ha->pdev->subsystem_device == 0x0170)
1858 ha->device_type |= DT_OEM_001;
1859 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1861 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1862 ha->device_type |= DT_ISP6312;
1863 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1865 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1866 ha->device_type |= DT_ISP6322;
1867 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1869 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1870 ha->device_type |= DT_ISP2422;
1871 ha->device_type |= DT_ZIO_SUPPORTED;
1872 ha->device_type |= DT_FWI2;
1873 ha->device_type |= DT_IIDMA;
1874 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1876 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1877 ha->device_type |= DT_ISP2432;
1878 ha->device_type |= DT_ZIO_SUPPORTED;
1879 ha->device_type |= DT_FWI2;
1880 ha->device_type |= DT_IIDMA;
1881 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1883 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1884 ha->device_type |= DT_ISP8432;
1885 ha->device_type |= DT_ZIO_SUPPORTED;
1886 ha->device_type |= DT_FWI2;
1887 ha->device_type |= DT_IIDMA;
1888 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1890 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1891 ha->device_type |= DT_ISP5422;
1892 ha->device_type |= DT_FWI2;
1893 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1895 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1896 ha->device_type |= DT_ISP5432;
1897 ha->device_type |= DT_FWI2;
1898 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1900 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1901 ha->device_type |= DT_ISP2532;
1902 ha->device_type |= DT_ZIO_SUPPORTED;
1903 ha->device_type |= DT_FWI2;
1904 ha->device_type |= DT_IIDMA;
1905 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1907 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1908 ha->device_type |= DT_ISP8001;
1909 ha->device_type |= DT_ZIO_SUPPORTED;
1910 ha->device_type |= DT_FWI2;
1911 ha->device_type |= DT_IIDMA;
1912 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1914 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1915 ha->device_type |= DT_ISP8021;
1916 ha->device_type |= DT_ZIO_SUPPORTED;
1917 ha->device_type |= DT_FWI2;
1918 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1919 /* Initialize 82XX ISP flags */
1920 qla82xx_init_flags(ha);
1925 ha->port_no = !(ha->portnum & 1);
1927 /* Get adapter physical port no from interrupt pin register. */
1928 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1930 if (ha->port_no & 1)
1931 ha->flags.port0 = 1;
1933 ha->flags.port0 = 0;
1934 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
1935 "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
1936 ha->device_type, ha->flags.port0, ha->fw_srisc_address);
1940 qla2xxx_scan_start(struct Scsi_Host *shost)
1942 scsi_qla_host_t *vha = shost_priv(shost);
1944 if (vha->hw->flags.running_gold_fw)
1947 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1948 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1949 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1950 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1954 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1956 scsi_qla_host_t *vha = shost_priv(shost);
1960 if (time > vha->hw->loop_reset_delay * HZ)
1963 return atomic_read(&vha->loop_state) == LOOP_READY;
1967 * PCI driver interface
1969 static int __devinit
1970 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1973 struct Scsi_Host *host;
1974 scsi_qla_host_t *base_vha = NULL;
1975 struct qla_hw_data *ha;
1978 struct scsi_host_template *sht;
1979 int bars, max_id, mem_only = 0;
1980 uint16_t req_length = 0, rsp_length = 0;
1981 struct req_que *req = NULL;
1982 struct rsp_que *rsp = NULL;
1984 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1985 sht = &qla2xxx_driver_template;
1986 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
1987 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
1988 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
1989 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
1990 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
1991 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
1992 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1993 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
1994 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1996 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
1997 "Mem only adapter.\n");
1999 ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2000 "Bars=%d.\n", bars);
2003 if (pci_enable_device_mem(pdev))
2006 if (pci_enable_device(pdev))
2010 /* This may fail but that's ok */
2011 pci_enable_pcie_error_reporting(pdev);
2013 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2015 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2016 "Unable to allocate memory for ha.\n");
2019 ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2020 "Memory allocated for ha=%p.\n", ha);
2023 /* Clear our data area */
2025 ha->mem_only = mem_only;
2026 spin_lock_init(&ha->hardware_lock);
2027 spin_lock_init(&ha->vport_slock);
2029 /* Set ISP-type information. */
2030 qla2x00_set_isp_flags(ha);
2032 /* Set EEH reset type to fundamental if required by hba */
2033 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
2034 pdev->needs_freset = 1;
2037 ha->prev_topology = 0;
2038 ha->init_cb_size = sizeof(init_cb_t);
2039 ha->link_data_rate = PORT_SPEED_UNKNOWN;
2040 ha->optrom_size = OPTROM_SIZE_2300;
2042 /* Assign ISP specific operations. */
2043 max_id = MAX_TARGETS_2200;
2044 if (IS_QLA2100(ha)) {
2045 max_id = MAX_TARGETS_2100;
2046 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2047 req_length = REQUEST_ENTRY_CNT_2100;
2048 rsp_length = RESPONSE_ENTRY_CNT_2100;
2049 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2050 ha->gid_list_info_size = 4;
2051 ha->flash_conf_off = ~0;
2052 ha->flash_data_off = ~0;
2053 ha->nvram_conf_off = ~0;
2054 ha->nvram_data_off = ~0;
2055 ha->isp_ops = &qla2100_isp_ops;
2056 } else if (IS_QLA2200(ha)) {
2057 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2058 req_length = REQUEST_ENTRY_CNT_2200;
2059 rsp_length = RESPONSE_ENTRY_CNT_2100;
2060 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2061 ha->gid_list_info_size = 4;
2062 ha->flash_conf_off = ~0;
2063 ha->flash_data_off = ~0;
2064 ha->nvram_conf_off = ~0;
2065 ha->nvram_data_off = ~0;
2066 ha->isp_ops = &qla2100_isp_ops;
2067 } else if (IS_QLA23XX(ha)) {
2068 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2069 req_length = REQUEST_ENTRY_CNT_2200;
2070 rsp_length = RESPONSE_ENTRY_CNT_2300;
2071 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2072 ha->gid_list_info_size = 6;
2073 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2074 ha->optrom_size = OPTROM_SIZE_2322;
2075 ha->flash_conf_off = ~0;
2076 ha->flash_data_off = ~0;
2077 ha->nvram_conf_off = ~0;
2078 ha->nvram_data_off = ~0;
2079 ha->isp_ops = &qla2300_isp_ops;
2080 } else if (IS_QLA24XX_TYPE(ha)) {
2081 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2082 req_length = REQUEST_ENTRY_CNT_24XX;
2083 rsp_length = RESPONSE_ENTRY_CNT_2300;
2084 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2085 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2086 ha->gid_list_info_size = 8;
2087 ha->optrom_size = OPTROM_SIZE_24XX;
2088 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2089 ha->isp_ops = &qla24xx_isp_ops;
2090 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2091 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2092 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2093 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2094 } else if (IS_QLA25XX(ha)) {
2095 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2096 req_length = REQUEST_ENTRY_CNT_24XX;
2097 rsp_length = RESPONSE_ENTRY_CNT_2300;
2098 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2099 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2100 ha->gid_list_info_size = 8;
2101 ha->optrom_size = OPTROM_SIZE_25XX;
2102 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2103 ha->isp_ops = &qla25xx_isp_ops;
2104 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2105 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2106 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2107 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2108 } else if (IS_QLA81XX(ha)) {
2109 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2110 req_length = REQUEST_ENTRY_CNT_24XX;
2111 rsp_length = RESPONSE_ENTRY_CNT_2300;
2112 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2113 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2114 ha->gid_list_info_size = 8;
2115 ha->optrom_size = OPTROM_SIZE_81XX;
2116 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2117 ha->isp_ops = &qla81xx_isp_ops;
2118 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2119 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2120 ha->nvram_conf_off = ~0;
2121 ha->nvram_data_off = ~0;
2122 } else if (IS_QLA82XX(ha)) {
2123 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2124 req_length = REQUEST_ENTRY_CNT_82XX;
2125 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2126 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2127 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2128 ha->gid_list_info_size = 8;
2129 ha->optrom_size = OPTROM_SIZE_82XX;
2130 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2131 ha->isp_ops = &qla82xx_isp_ops;
2132 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2133 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2134 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2135 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2137 ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2138 "mbx_count=%d, req_length=%d, "
2139 "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2140 "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, .\n",
2141 ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2142 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2143 ha->nvram_npiv_size);
2144 ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2145 "isp_ops=%p, flash_conf_off=%d, "
2146 "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2147 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2148 ha->nvram_conf_off, ha->nvram_data_off);
2150 /* Configure PCI I/O space */
2151 ret = ha->isp_ops->iospace_config(ha);
2153 goto probe_hw_failed;
2155 ql_log_pci(ql_log_info, pdev, 0x001d,
2156 "Found an ISP%04X irq %d iobase 0x%p.\n",
2157 pdev->device, pdev->irq, ha->iobase);
2158 mutex_init(&ha->vport_lock);
2159 init_completion(&ha->mbx_cmd_comp);
2160 complete(&ha->mbx_cmd_comp);
2161 init_completion(&ha->mbx_intr_comp);
2162 init_completion(&ha->dcbx_comp);
2164 set_bit(0, (unsigned long *) ha->vp_idx_map);
2166 qla2x00_config_dma_addressing(ha);
2167 ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2168 "64 Bit addressing is %s.\n",
2169 ha->flags.enable_64bit_addressing ? "enable" :
2171 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2173 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2174 "Failed to allocate memory for adapter, aborting.\n");
2176 goto probe_hw_failed;
2179 req->max_q_depth = MAX_Q_DEPTH;
2180 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2181 req->max_q_depth = ql2xmaxqdepth;
2184 base_vha = qla2x00_create_host(sht, ha);
2187 qla2x00_mem_free(ha);
2188 qla2x00_free_req_que(ha, req);
2189 qla2x00_free_rsp_que(ha, rsp);
2190 goto probe_hw_failed;
2193 pci_set_drvdata(pdev, base_vha);
2195 host = base_vha->host;
2196 base_vha->req = req;
2197 host->can_queue = req->length + 128;
2198 if (IS_QLA2XXX_MIDTYPE(ha))
2199 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2201 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2204 /* Set the SG table size based on ISP type */
2205 if (!IS_FWI2_CAPABLE(ha)) {
2207 host->sg_tablesize = 32;
2209 if (!IS_QLA82XX(ha))
2210 host->sg_tablesize = QLA_SG_ALL;
2212 ql_dbg(ql_dbg_init, base_vha, 0x0032,
2213 "can_queue=%d, req=%p, "
2214 "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2215 host->can_queue, base_vha->req,
2216 base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2217 host->max_id = max_id;
2218 host->this_id = 255;
2219 host->cmd_per_lun = 3;
2220 host->unique_id = host->host_no;
2221 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2222 host->max_cmd_len = 32;
2224 host->max_cmd_len = MAX_CMDSZ;
2225 host->max_channel = MAX_BUSES - 1;
2226 host->max_lun = ql2xmaxlun;
2227 host->transportt = qla2xxx_transport_template;
2228 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2230 ql_dbg(ql_dbg_init, base_vha, 0x0033,
2231 "max_id=%d this_id=%d "
2232 "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2233 "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2234 host->this_id, host->cmd_per_lun, host->unique_id,
2235 host->max_cmd_len, host->max_channel, host->max_lun,
2236 host->transportt, sht->vendor_id);
2238 /* Set up the irqs */
2239 ret = qla2x00_request_irqs(ha, rsp);
2241 goto probe_init_failed;
2243 pci_save_state(pdev);
2245 /* Alloc arrays of request and response ring ptrs */
2247 if (!qla2x00_alloc_queues(ha)) {
2248 ql_log(ql_log_fatal, base_vha, 0x003d,
2249 "Failed to allocate memory for queue pointers.. aborting.\n");
2250 goto probe_init_failed;
2253 ha->rsp_q_map[0] = rsp;
2254 ha->req_q_map[0] = req;
2257 set_bit(0, ha->req_qid_map);
2258 set_bit(0, ha->rsp_qid_map);
2259 /* FWI2-capable only. */
2260 req->req_q_in = &ha->iobase->isp24.req_q_in;
2261 req->req_q_out = &ha->iobase->isp24.req_q_out;
2262 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2263 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2265 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2266 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2267 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2268 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
2271 if (IS_QLA82XX(ha)) {
2272 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2273 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2274 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2277 ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2278 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2279 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2280 ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2281 "req->req_q_in=%p req->req_q_out=%p "
2282 "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2283 req->req_q_in, req->req_q_out,
2284 rsp->rsp_q_in, rsp->rsp_q_out);
2285 ql_dbg(ql_dbg_init, base_vha, 0x003e,
2286 "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2287 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2288 ql_dbg(ql_dbg_init, base_vha, 0x003f,
2289 "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2290 req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2292 if (qla2x00_initialize_adapter(base_vha)) {
2293 ql_log(ql_log_fatal, base_vha, 0x00d6,
2294 "Failed to initialize adapter - Adapter flags %x.\n",
2295 base_vha->device_flags);
2297 if (IS_QLA82XX(ha)) {
2298 qla82xx_idc_lock(ha);
2299 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2300 QLA82XX_DEV_FAILED);
2301 qla82xx_idc_unlock(ha);
2302 ql_log(ql_log_fatal, base_vha, 0x00d7,
2303 "HW State: FAILED.\n");
2311 if (qla25xx_setup_mode(base_vha)) {
2312 ql_log(ql_log_warn, base_vha, 0x00ec,
2313 "Failed to create queues, falling back to single queue mode.\n");
2318 if (ha->flags.running_gold_fw)
2322 * Startup the kernel thread for this host adapter
2324 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2325 "%s_dpc", base_vha->host_str);
2326 if (IS_ERR(ha->dpc_thread)) {
2327 ql_log(ql_log_fatal, base_vha, 0x00ed,
2328 "Failed to start DPC thread.\n");
2329 ret = PTR_ERR(ha->dpc_thread);
2332 ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2333 "DPC thread started successfully.\n");
2336 list_add_tail(&base_vha->list, &ha->vp_list);
2337 base_vha->host->irq = ha->pdev->irq;
2339 /* Initialized the timer */
2340 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2341 ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2342 "Started qla2x00_timer with "
2343 "interval=%d.\n", WATCH_INTERVAL);
2344 ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2345 "Detected hba at address=%p.\n",
2348 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2349 if (ha->fw_attributes & BIT_4) {
2351 base_vha->flags.difdix_supported = 1;
2352 ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2353 "Registering for DIF/DIX type 1 and 3 protection.\n");
2354 if (ql2xenabledif == 1)
2355 prot = SHOST_DIX_TYPE0_PROTECTION;
2356 scsi_host_set_prot(host,
2357 prot | SHOST_DIF_TYPE1_PROTECTION
2358 | SHOST_DIF_TYPE2_PROTECTION
2359 | SHOST_DIF_TYPE3_PROTECTION
2360 | SHOST_DIX_TYPE1_PROTECTION
2361 | SHOST_DIX_TYPE2_PROTECTION
2362 | SHOST_DIX_TYPE3_PROTECTION);
2363 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2365 base_vha->flags.difdix_supported = 0;
2368 ha->isp_ops->enable_intrs(ha);
2370 ret = scsi_add_host(host, &pdev->dev);
2374 base_vha->flags.init_done = 1;
2375 base_vha->flags.online = 1;
2377 ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2378 "Init done and hba is online.\n");
2380 scsi_scan_host(host);
2382 qla2x00_alloc_sysfs_attr(base_vha);
2384 qla2x00_init_host_attr(base_vha);
2386 qla2x00_dfs_setup(base_vha);
2388 ql_log(ql_log_info, base_vha, 0x00fb,
2389 "QLogic %s - %s.\n",
2390 ha->model_number, ha->model_desc ? ha->model_desc : "");
2391 ql_log(ql_log_info, base_vha, 0x00fc,
2392 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2393 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2394 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2396 ha->isp_ops->fw_version_str(base_vha, fw_str));
2401 qla2x00_free_req_que(ha, req);
2402 qla2x00_free_rsp_que(ha, rsp);
2403 ha->max_req_queues = ha->max_rsp_queues = 0;
2406 if (base_vha->timer_active)
2407 qla2x00_stop_timer(base_vha);
2408 base_vha->flags.online = 0;
2409 if (ha->dpc_thread) {
2410 struct task_struct *t = ha->dpc_thread;
2412 ha->dpc_thread = NULL;
2416 qla2x00_free_device(base_vha);
2418 scsi_host_put(base_vha->host);
2421 if (IS_QLA82XX(ha)) {
2422 qla82xx_idc_lock(ha);
2423 qla82xx_clear_drv_active(ha);
2424 qla82xx_idc_unlock(ha);
2425 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2427 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2430 iounmap(ha->iobase);
2432 pci_release_selected_regions(ha->pdev, ha->bars);
2437 pci_disable_device(pdev);
2442 qla2x00_shutdown(struct pci_dev *pdev)
2444 scsi_qla_host_t *vha;
2445 struct qla_hw_data *ha;
2447 vha = pci_get_drvdata(pdev);
2450 /* Turn-off FCE trace */
2451 if (ha->flags.fce_enabled) {
2452 qla2x00_disable_fce_trace(vha, NULL, NULL);
2453 ha->flags.fce_enabled = 0;
2456 /* Turn-off EFT trace */
2458 qla2x00_disable_eft_trace(vha);
2460 /* Stop currently executing firmware. */
2461 qla2x00_try_to_stop_firmware(vha);
2463 /* Turn adapter off line */
2464 vha->flags.online = 0;
2466 /* turn-off interrupts on the card */
2467 if (ha->interrupts_on) {
2468 vha->flags.init_done = 0;
2469 ha->isp_ops->disable_intrs(ha);
2472 qla2x00_free_irqs(vha);
2474 qla2x00_free_fw_dump(ha);
2478 qla2x00_remove_one(struct pci_dev *pdev)
2480 scsi_qla_host_t *base_vha, *vha;
2481 struct qla_hw_data *ha;
2482 unsigned long flags;
2484 base_vha = pci_get_drvdata(pdev);
2487 mutex_lock(&ha->vport_lock);
2488 while (ha->cur_vport_count) {
2489 struct Scsi_Host *scsi_host;
2491 spin_lock_irqsave(&ha->vport_slock, flags);
2493 BUG_ON(base_vha->list.next == &ha->vp_list);
2494 /* This assumes first entry in ha->vp_list is always base vha */
2495 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2496 scsi_host = scsi_host_get(vha->host);
2498 spin_unlock_irqrestore(&ha->vport_slock, flags);
2499 mutex_unlock(&ha->vport_lock);
2501 fc_vport_terminate(vha->fc_vport);
2502 scsi_host_put(vha->host);
2504 mutex_lock(&ha->vport_lock);
2506 mutex_unlock(&ha->vport_lock);
2508 set_bit(UNLOADING, &base_vha->dpc_flags);
2510 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2512 qla2x00_dfs_remove(base_vha);
2514 qla84xx_put_chip(base_vha);
2517 if (base_vha->timer_active)
2518 qla2x00_stop_timer(base_vha);
2520 base_vha->flags.online = 0;
2522 /* Flush the work queue and remove it */
2524 flush_workqueue(ha->wq);
2525 destroy_workqueue(ha->wq);
2529 /* Kill the kernel thread for this host */
2530 if (ha->dpc_thread) {
2531 struct task_struct *t = ha->dpc_thread;
2534 * qla2xxx_wake_dpc checks for ->dpc_thread
2535 * so we need to zero it out.
2537 ha->dpc_thread = NULL;
2541 qla2x00_free_sysfs_attr(base_vha);
2543 fc_remove_host(base_vha->host);
2545 scsi_remove_host(base_vha->host);
2547 qla2x00_free_device(base_vha);
2549 scsi_host_put(base_vha->host);
2551 if (IS_QLA82XX(ha)) {
2552 qla82xx_idc_lock(ha);
2553 qla82xx_clear_drv_active(ha);
2554 qla82xx_idc_unlock(ha);
2556 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2558 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2561 iounmap(ha->iobase);
2564 iounmap(ha->mqiobase);
2567 pci_release_selected_regions(ha->pdev, ha->bars);
2571 pci_disable_pcie_error_reporting(pdev);
2573 pci_disable_device(pdev);
2574 pci_set_drvdata(pdev, NULL);
2578 qla2x00_free_device(scsi_qla_host_t *vha)
2580 struct qla_hw_data *ha = vha->hw;
2582 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2585 if (vha->timer_active)
2586 qla2x00_stop_timer(vha);
2588 /* Kill the kernel thread for this host */
2589 if (ha->dpc_thread) {
2590 struct task_struct *t = ha->dpc_thread;
2593 * qla2xxx_wake_dpc checks for ->dpc_thread
2594 * so we need to zero it out.
2596 ha->dpc_thread = NULL;
2600 qla25xx_delete_queues(vha);
2602 if (ha->flags.fce_enabled)
2603 qla2x00_disable_fce_trace(vha, NULL, NULL);
2606 qla2x00_disable_eft_trace(vha);
2608 /* Stop currently executing firmware. */
2609 qla2x00_try_to_stop_firmware(vha);
2611 vha->flags.online = 0;
2613 /* turn-off interrupts on the card */
2614 if (ha->interrupts_on) {
2615 vha->flags.init_done = 0;
2616 ha->isp_ops->disable_intrs(ha);
2619 qla2x00_free_irqs(vha);
2621 qla2x00_free_fcports(vha);
2623 qla2x00_mem_free(ha);
2625 qla82xx_md_free(vha);
2627 qla2x00_free_queues(ha);
2630 void qla2x00_free_fcports(struct scsi_qla_host *vha)
2632 fc_port_t *fcport, *tfcport;
2634 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2635 list_del(&fcport->list);
2642 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
2645 struct fc_rport *rport;
2646 scsi_qla_host_t *base_vha;
2647 unsigned long flags;
2652 rport = fcport->rport;
2654 base_vha = pci_get_drvdata(vha->hw->pdev);
2655 spin_lock_irqsave(vha->host->host_lock, flags);
2656 fcport->drport = rport;
2657 spin_unlock_irqrestore(vha->host->host_lock, flags);
2658 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2659 qla2xxx_wake_dpc(base_vha);
2661 fc_remote_port_delete(rport);
2665 * qla2x00_mark_device_lost Updates fcport state when device goes offline.
2667 * Input: ha = adapter block pointer. fcport = port structure pointer.
2673 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
2674 int do_login, int defer)
2676 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2677 vha->vp_idx == fcport->vp_idx) {
2678 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2679 qla2x00_schedule_rport_del(vha, fcport, defer);
2682 * We may need to retry the login, so don't change the state of the
2683 * port but do the retries.
2685 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2686 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2691 if (fcport->login_retry == 0) {
2692 fcport->login_retry = vha->hw->login_retry_count;
2693 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2695 ql_dbg(ql_dbg_disc, vha, 0x2067,
2697 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2698 "id = 0x%04x retry cnt=%d.\n",
2699 fcport->port_name[0], fcport->port_name[1],
2700 fcport->port_name[2], fcport->port_name[3],
2701 fcport->port_name[4], fcport->port_name[5],
2702 fcport->port_name[6], fcport->port_name[7],
2703 fcport->loop_id, fcport->login_retry);
2708 * qla2x00_mark_all_devices_lost
2709 * Updates fcport state when device goes offline.
2712 * ha = adapter block pointer.
2713 * fcport = port structure pointer.
2721 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
2725 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2726 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
2730 * No point in marking the device as lost, if the device is
2733 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2735 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2736 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2738 qla2x00_schedule_rport_del(vha, fcport, defer);
2739 else if (vha->vp_idx == fcport->vp_idx)
2740 qla2x00_schedule_rport_del(vha, fcport, defer);
2747 * Allocates adapter memory.
2754 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2755 struct req_que **req, struct rsp_que **rsp)
2759 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
2760 &ha->init_cb_dma, GFP_KERNEL);
2764 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2765 &ha->gid_list_dma, GFP_KERNEL);
2767 goto fail_free_init_cb;
2769 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2770 if (!ha->srb_mempool)
2771 goto fail_free_gid_list;
2773 if (IS_QLA82XX(ha)) {
2774 /* Allocate cache for CT6 Ctx. */
2776 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2777 sizeof(struct ct6_dsd), 0,
2778 SLAB_HWCACHE_ALIGN, NULL);
2780 goto fail_free_gid_list;
2782 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2784 if (!ha->ctx_mempool)
2785 goto fail_free_srb_mempool;
2786 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
2787 "ctx_cachep=%p ctx_mempool=%p.\n",
2788 ctx_cachep, ha->ctx_mempool);
2791 /* Get memory for cached NVRAM */
2792 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2794 goto fail_free_ctx_mempool;
2796 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2798 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2799 DMA_POOL_SIZE, 8, 0);
2800 if (!ha->s_dma_pool)
2801 goto fail_free_nvram;
2803 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
2804 "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
2805 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
2807 if (IS_QLA82XX(ha) || ql2xenabledif) {
2808 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2809 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2810 if (!ha->dl_dma_pool) {
2811 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
2812 "Failed to allocate memory for dl_dma_pool.\n");
2813 goto fail_s_dma_pool;
2816 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2817 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2818 if (!ha->fcp_cmnd_dma_pool) {
2819 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
2820 "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
2821 goto fail_dl_dma_pool;
2823 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
2824 "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
2825 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
2828 /* Allocate memory for SNS commands */
2829 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2830 /* Get consistent memory allocated for SNS commands */
2831 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
2832 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
2835 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
2836 "sns_cmd: %p.\n", ha->sns_cmd);
2838 /* Get consistent memory allocated for MS IOCB */
2839 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2843 /* Get consistent memory allocated for CT SNS commands */
2844 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
2845 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
2847 goto fail_free_ms_iocb;
2848 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
2849 "ms_iocb=%p ct_sns=%p.\n",
2850 ha->ms_iocb, ha->ct_sns);
2853 /* Allocate memory for request ring */
2854 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2856 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
2857 "Failed to allocate memory for req.\n");
2860 (*req)->length = req_len;
2861 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2862 ((*req)->length + 1) * sizeof(request_t),
2863 &(*req)->dma, GFP_KERNEL);
2864 if (!(*req)->ring) {
2865 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
2866 "Failed to allocate memory for req_ring.\n");
2869 /* Allocate memory for response ring */
2870 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2872 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
2873 "Failed to allocate memory for rsp.\n");
2877 (*rsp)->length = rsp_len;
2878 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2879 ((*rsp)->length + 1) * sizeof(response_t),
2880 &(*rsp)->dma, GFP_KERNEL);
2881 if (!(*rsp)->ring) {
2882 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
2883 "Failed to allocate memory for rsp_ring.\n");
2888 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
2889 "req=%p req->length=%d req->ring=%p rsp=%p "
2890 "rsp->length=%d rsp->ring=%p.\n",
2891 *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
2893 /* Allocate memory for NVRAM data for vports */
2894 if (ha->nvram_npiv_size) {
2895 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2896 ha->nvram_npiv_size, GFP_KERNEL);
2897 if (!ha->npiv_info) {
2898 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
2899 "Failed to allocate memory for npiv_info.\n");
2900 goto fail_npiv_info;
2903 ha->npiv_info = NULL;
2905 /* Get consistent memory allocated for EX-INIT-CB. */
2906 if (IS_QLA8XXX_TYPE(ha)) {
2907 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2908 &ha->ex_init_cb_dma);
2909 if (!ha->ex_init_cb)
2910 goto fail_ex_init_cb;
2911 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
2912 "ex_init_cb=%p.\n", ha->ex_init_cb);
2915 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2917 /* Get consistent memory allocated for Async Port-Database. */
2918 if (!IS_FWI2_CAPABLE(ha)) {
2919 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2923 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
2924 "async_pd=%p.\n", ha->async_pd);
2927 INIT_LIST_HEAD(&ha->vp_list);
2931 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
2933 kfree(ha->npiv_info);
2935 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2936 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2937 (*rsp)->ring = NULL;
2942 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2943 sizeof(request_t), (*req)->ring, (*req)->dma);
2944 (*req)->ring = NULL;
2949 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2950 ha->ct_sns, ha->ct_sns_dma);
2954 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2956 ha->ms_iocb_dma = 0;
2958 if (IS_QLA82XX(ha) || ql2xenabledif) {
2959 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2960 ha->fcp_cmnd_dma_pool = NULL;
2963 if (IS_QLA82XX(ha) || ql2xenabledif) {
2964 dma_pool_destroy(ha->dl_dma_pool);
2965 ha->dl_dma_pool = NULL;
2968 dma_pool_destroy(ha->s_dma_pool);
2969 ha->s_dma_pool = NULL;
2973 fail_free_ctx_mempool:
2974 mempool_destroy(ha->ctx_mempool);
2975 ha->ctx_mempool = NULL;
2976 fail_free_srb_mempool:
2977 mempool_destroy(ha->srb_mempool);
2978 ha->srb_mempool = NULL;
2980 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
2982 ha->gid_list = NULL;
2983 ha->gid_list_dma = 0;
2985 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2988 ha->init_cb_dma = 0;
2990 ql_log(ql_log_fatal, NULL, 0x0030,
2991 "Memory allocation failure.\n");
2996 * qla2x00_free_fw_dump
2997 * Frees fw dump stuff.
3000 * ha = adapter block pointer.
3003 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3006 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3011 dma_free_coherent(&ha->pdev->dev,
3012 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3021 ha->fw_dump_reading = 0;
3026 * Frees all adapter allocated memory.
3029 * ha = adapter block pointer.
3032 qla2x00_mem_free(struct qla_hw_data *ha)
3034 qla2x00_free_fw_dump(ha);
3036 if (ha->srb_mempool)
3037 mempool_destroy(ha->srb_mempool);
3040 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3041 ha->dcbx_tlv, ha->dcbx_tlv_dma);
3044 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3045 ha->xgmac_data, ha->xgmac_data_dma);
3048 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3049 ha->sns_cmd, ha->sns_cmd_dma);
3052 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3053 ha->ct_sns, ha->ct_sns_dma);
3056 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3059 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
3062 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3065 dma_pool_free(ha->s_dma_pool,
3066 ha->ex_init_cb, ha->ex_init_cb_dma);
3069 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3072 dma_pool_destroy(ha->s_dma_pool);
3075 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
3078 if (IS_QLA82XX(ha)) {
3079 if (!list_empty(&ha->gbl_dsd_list)) {
3080 struct dsd_dma *dsd_ptr, *tdsd_ptr;
3082 /* clean up allocated prev pool */
3083 list_for_each_entry_safe(dsd_ptr,
3084 tdsd_ptr, &ha->gbl_dsd_list, list) {
3085 dma_pool_free(ha->dl_dma_pool,
3086 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3087 list_del(&dsd_ptr->list);
3093 if (ha->dl_dma_pool)
3094 dma_pool_destroy(ha->dl_dma_pool);
3096 if (ha->fcp_cmnd_dma_pool)
3097 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3099 if (ha->ctx_mempool)
3100 mempool_destroy(ha->ctx_mempool);
3103 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3104 ha->init_cb, ha->init_cb_dma);
3105 vfree(ha->optrom_buffer);
3107 kfree(ha->npiv_info);
3109 ha->srb_mempool = NULL;
3110 ha->ctx_mempool = NULL;
3112 ha->sns_cmd_dma = 0;
3116 ha->ms_iocb_dma = 0;
3118 ha->init_cb_dma = 0;
3119 ha->ex_init_cb = NULL;
3120 ha->ex_init_cb_dma = 0;
3121 ha->async_pd = NULL;
3122 ha->async_pd_dma = 0;
3124 ha->s_dma_pool = NULL;
3125 ha->dl_dma_pool = NULL;
3126 ha->fcp_cmnd_dma_pool = NULL;
3128 ha->gid_list = NULL;
3129 ha->gid_list_dma = 0;
3132 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3133 struct qla_hw_data *ha)
3135 struct Scsi_Host *host;
3136 struct scsi_qla_host *vha = NULL;
3138 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3140 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3141 "Failed to allocate host from the scsi layer, aborting.\n");
3145 /* Clear our data area */
3146 vha = shost_priv(host);
3147 memset(vha, 0, sizeof(scsi_qla_host_t));
3150 vha->host_no = host->host_no;
3153 INIT_LIST_HEAD(&vha->vp_fcports);
3154 INIT_LIST_HEAD(&vha->work_list);
3155 INIT_LIST_HEAD(&vha->list);
3157 spin_lock_init(&vha->work_lock);
3159 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3160 ql_dbg(ql_dbg_init, vha, 0x0041,
3161 "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3162 vha->host, vha->hw, vha,
3163 dev_name(&(ha->pdev->dev)));
3171 static struct qla_work_evt *
3172 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3174 struct qla_work_evt *e;
3177 QLA_VHA_MARK_BUSY(vha, bail);
3181 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3183 QLA_VHA_MARK_NOT_BUSY(vha);
3187 INIT_LIST_HEAD(&e->list);
3189 e->flags = QLA_EVT_FLAG_FREE;
3194 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3196 unsigned long flags;
3198 spin_lock_irqsave(&vha->work_lock, flags);
3199 list_add_tail(&e->list, &vha->work_list);
3200 spin_unlock_irqrestore(&vha->work_lock, flags);
3201 qla2xxx_wake_dpc(vha);
3207 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3210 struct qla_work_evt *e;
3212 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3214 return QLA_FUNCTION_FAILED;
3216 e->u.aen.code = code;
3217 e->u.aen.data = data;
3218 return qla2x00_post_work(vha, e);
3222 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3224 struct qla_work_evt *e;
3226 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3228 return QLA_FUNCTION_FAILED;
3230 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3231 return qla2x00_post_work(vha, e);
3234 #define qla2x00_post_async_work(name, type) \
3235 int qla2x00_post_async_##name##_work( \
3236 struct scsi_qla_host *vha, \
3237 fc_port_t *fcport, uint16_t *data) \
3239 struct qla_work_evt *e; \
3241 e = qla2x00_alloc_work(vha, type); \
3243 return QLA_FUNCTION_FAILED; \
3245 e->u.logio.fcport = fcport; \
3247 e->u.logio.data[0] = data[0]; \
3248 e->u.logio.data[1] = data[1]; \
3250 return qla2x00_post_work(vha, e); \
3253 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3254 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3255 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3256 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3257 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3258 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3261 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3263 struct qla_work_evt *e;
3265 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3267 return QLA_FUNCTION_FAILED;
3269 e->u.uevent.code = code;
3270 return qla2x00_post_work(vha, e);
3274 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3276 char event_string[40];
3277 char *envp[] = { event_string, NULL };
3280 case QLA_UEVENT_CODE_FW_DUMP:
3281 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3288 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3292 qla2x00_do_work(struct scsi_qla_host *vha)
3294 struct qla_work_evt *e, *tmp;
3295 unsigned long flags;
3298 spin_lock_irqsave(&vha->work_lock, flags);
3299 list_splice_init(&vha->work_list, &work);
3300 spin_unlock_irqrestore(&vha->work_lock, flags);
3302 list_for_each_entry_safe(e, tmp, &work, list) {
3303 list_del_init(&e->list);
3307 fc_host_post_event(vha->host, fc_get_event_number(),
3308 e->u.aen.code, e->u.aen.data);
3310 case QLA_EVT_IDC_ACK:
3311 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3313 case QLA_EVT_ASYNC_LOGIN:
3314 qla2x00_async_login(vha, e->u.logio.fcport,
3317 case QLA_EVT_ASYNC_LOGIN_DONE:
3318 qla2x00_async_login_done(vha, e->u.logio.fcport,
3321 case QLA_EVT_ASYNC_LOGOUT:
3322 qla2x00_async_logout(vha, e->u.logio.fcport);
3324 case QLA_EVT_ASYNC_LOGOUT_DONE:
3325 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3328 case QLA_EVT_ASYNC_ADISC:
3329 qla2x00_async_adisc(vha, e->u.logio.fcport,
3332 case QLA_EVT_ASYNC_ADISC_DONE:
3333 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3336 case QLA_EVT_UEVENT:
3337 qla2x00_uevent_emit(vha, e->u.uevent.code);
3340 if (e->flags & QLA_EVT_FLAG_FREE)
3343 /* For each work completed decrement vha ref count */
3344 QLA_VHA_MARK_NOT_BUSY(vha);
3348 /* Relogins all the fcports of a vport
3349 * Context: dpc thread
3351 void qla2x00_relogin(struct scsi_qla_host *vha)
3355 uint16_t next_loopid = 0;
3356 struct qla_hw_data *ha = vha->hw;
3359 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3361 * If the port is not ONLINE then try to login
3362 * to it if we haven't run out of retries.
3364 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3365 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3366 fcport->login_retry--;
3367 if (fcport->flags & FCF_FABRIC_DEVICE) {
3368 if (fcport->flags & FCF_FCP2_DEVICE)
3369 ha->isp_ops->fabric_logout(vha,
3371 fcport->d_id.b.domain,
3372 fcport->d_id.b.area,
3373 fcport->d_id.b.al_pa);
3375 if (fcport->loop_id == FC_NO_LOOP_ID) {
3376 fcport->loop_id = next_loopid =
3377 ha->min_external_loopid;
3378 status = qla2x00_find_new_loop_id(
3380 if (status != QLA_SUCCESS) {
3381 /* Ran out of IDs to use */
3386 if (IS_ALOGIO_CAPABLE(ha)) {
3387 fcport->flags |= FCF_ASYNC_SENT;
3389 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3390 status = qla2x00_post_async_login_work(
3392 if (status == QLA_SUCCESS)
3394 /* Attempt a retry. */
3397 status = qla2x00_fabric_login(vha,
3398 fcport, &next_loopid);
3400 status = qla2x00_local_device_login(vha,
3403 if (status == QLA_SUCCESS) {
3404 fcport->old_loop_id = fcport->loop_id;
3406 ql_dbg(ql_dbg_disc, vha, 0x2003,
3407 "Port login OK: logged in ID 0x%x.\n",
3410 qla2x00_update_fcport(vha, fcport);
3412 } else if (status == 1) {
3413 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3414 /* retry the login again */
3415 ql_dbg(ql_dbg_disc, vha, 0x2007,
3416 "Retrying %d login again loop_id 0x%x.\n",
3417 fcport->login_retry, fcport->loop_id);
3419 fcport->login_retry = 0;
3422 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3423 fcport->loop_id = FC_NO_LOOP_ID;
3425 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3430 /**************************************************************************
3432 * This kernel thread is a task that is schedule by the interrupt handler
3433 * to perform the background processing for interrupts.
3436 * This task always run in the context of a kernel thread. It
3437 * is kick-off by the driver's detect code and starts up
3438 * up one per adapter. It immediately goes to sleep and waits for
3439 * some fibre event. When either the interrupt handler or
3440 * the timer routine detects a event it will one of the task
3441 * bits then wake us up.
3442 **************************************************************************/
3444 qla2x00_do_dpc(void *data)
3447 scsi_qla_host_t *base_vha;
3448 struct qla_hw_data *ha;
3450 ha = (struct qla_hw_data *)data;
3451 base_vha = pci_get_drvdata(ha->pdev);
3453 set_user_nice(current, -20);
3455 set_current_state(TASK_INTERRUPTIBLE);
3456 while (!kthread_should_stop()) {
3457 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
3458 "DPC handler sleeping.\n");
3461 __set_current_state(TASK_RUNNING);
3463 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
3466 if (ha->flags.eeh_busy) {
3467 ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
3468 "eeh_busy=%d.\n", ha->flags.eeh_busy);
3474 ql_dbg(ql_dbg_dpc, base_vha, 0x4001,
3475 "DPC handler waking up.\n");
3476 ql_dbg(ql_dbg_dpc, base_vha, 0x4002,
3477 "dpc_flags=0x%lx.\n", base_vha->dpc_flags);
3479 qla2x00_do_work(base_vha);
3481 if (IS_QLA82XX(ha)) {
3482 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3483 &base_vha->dpc_flags)) {
3484 qla82xx_idc_lock(ha);
3485 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3486 QLA82XX_DEV_FAILED);
3487 qla82xx_idc_unlock(ha);
3488 ql_log(ql_log_info, base_vha, 0x4004,
3489 "HW State: FAILED.\n");
3490 qla82xx_device_state_handler(base_vha);
3494 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3495 &base_vha->dpc_flags)) {
3497 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
3498 "FCoE context reset scheduled.\n");
3499 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3500 &base_vha->dpc_flags))) {
3501 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3502 /* FCoE-ctx reset failed.
3503 * Escalate to chip-reset
3505 set_bit(ISP_ABORT_NEEDED,
3506 &base_vha->dpc_flags);
3508 clear_bit(ABORT_ISP_ACTIVE,
3509 &base_vha->dpc_flags);
3512 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
3513 "FCoE context reset end.\n");
3517 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3518 &base_vha->dpc_flags)) {
3520 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
3521 "ISP abort scheduled.\n");
3522 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3523 &base_vha->dpc_flags))) {
3525 if (ha->isp_ops->abort_isp(base_vha)) {
3526 /* failed. retry later */
3527 set_bit(ISP_ABORT_NEEDED,
3528 &base_vha->dpc_flags);
3530 clear_bit(ABORT_ISP_ACTIVE,
3531 &base_vha->dpc_flags);
3534 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
3535 "ISP abort end.\n");
3538 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3539 qla2x00_update_fcports(base_vha);
3540 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3543 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3544 ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
3545 "Quiescence mode scheduled.\n");
3546 qla82xx_device_state_handler(base_vha);
3547 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3548 if (!ha->flags.quiesce_owner) {
3549 qla2x00_perform_loop_resync(base_vha);
3551 qla82xx_idc_lock(ha);
3552 qla82xx_clear_qsnt_ready(base_vha);
3553 qla82xx_idc_unlock(ha);
3555 ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
3556 "Quiescence mode end.\n");
3559 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3560 &base_vha->dpc_flags) &&
3561 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
3563 ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
3564 "Reset marker scheduled.\n");
3565 qla2x00_rst_aen(base_vha);
3566 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
3567 ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
3568 "Reset marker end.\n");
3571 /* Retry each device up to login retry count */
3572 if ((test_and_clear_bit(RELOGIN_NEEDED,
3573 &base_vha->dpc_flags)) &&
3574 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3575 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
3577 ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
3578 "Relogin scheduled.\n");
3579 qla2x00_relogin(base_vha);
3580 ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
3584 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3585 &base_vha->dpc_flags)) {
3587 ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
3588 "Loop resync scheduled.\n");
3590 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
3591 &base_vha->dpc_flags))) {
3593 rval = qla2x00_loop_resync(base_vha);
3595 clear_bit(LOOP_RESYNC_ACTIVE,
3596 &base_vha->dpc_flags);
3599 ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
3600 "Loop resync end.\n");
3603 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3604 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3605 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3606 qla2xxx_flash_npiv_conf(base_vha);
3609 if (!ha->interrupts_on)
3610 ha->isp_ops->enable_intrs(ha);
3612 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3613 &base_vha->dpc_flags))
3614 ha->isp_ops->beacon_blink(base_vha);
3616 qla2x00_do_dpc_all_vps(base_vha);
3620 set_current_state(TASK_INTERRUPTIBLE);
3621 } /* End of while(1) */
3622 __set_current_state(TASK_RUNNING);
3624 ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
3625 "DPC handler exiting.\n");
3628 * Make sure that nobody tries to wake us up again.
3632 /* Cleanup any residual CTX SRBs. */
3633 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3639 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
3641 struct qla_hw_data *ha = vha->hw;
3642 struct task_struct *t = ha->dpc_thread;
3644 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
3650 * Processes asynchronous reset.
3653 * ha = adapter block pointer.
3656 qla2x00_rst_aen(scsi_qla_host_t *vha)
3658 if (vha->flags.online && !vha->flags.reset_active &&
3659 !atomic_read(&vha->loop_down_timer) &&
3660 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
3662 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
3665 * Issue marker command only when we are going to start
3668 vha->marker_needed = 1;
3669 } while (!atomic_read(&vha->loop_down_timer) &&
3670 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
3675 qla2x00_sp_free_dma(srb_t *sp)
3677 struct scsi_cmnd *cmd = sp->cmd;
3678 struct qla_hw_data *ha = sp->fcport->vha->hw;
3680 if (sp->flags & SRB_DMA_VALID) {
3681 scsi_dma_unmap(cmd);
3682 sp->flags &= ~SRB_DMA_VALID;
3685 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3686 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3687 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3688 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3691 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3692 /* List assured to be having elements */
3693 qla2x00_clean_dsd_pool(ha, sp);
3694 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3697 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3698 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3699 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3700 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3703 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3704 struct ct6_dsd *ctx = sp->ctx;
3705 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3707 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3708 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3709 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3710 mempool_free(sp->ctx, ha->ctx_mempool);
3718 qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
3720 struct scsi_cmnd *cmd = sp->cmd;
3722 qla2x00_sp_free_dma(sp);
3723 mempool_free(sp, ha->srb_mempool);
3724 cmd->scsi_done(cmd);
3728 qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3730 if (atomic_read(&sp->ref_count) == 0) {
3731 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
3732 "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
3734 if (ql2xextended_error_logging & ql_dbg_io)
3738 if (!atomic_dec_and_test(&sp->ref_count))
3740 qla2x00_sp_final_compl(ha, sp);
3743 /**************************************************************************
3749 * Context: Interrupt
3750 ***************************************************************************/
3752 qla2x00_timer(scsi_qla_host_t *vha)
3754 unsigned long cpu_flags = 0;
3759 struct qla_hw_data *ha = vha->hw;
3760 struct req_que *req;
3762 if (ha->flags.eeh_busy) {
3763 ql_dbg(ql_dbg_timer, vha, 0x6000,
3764 "EEH = %d, restarting timer.\n",
3765 ha->flags.eeh_busy);
3766 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3770 /* Hardware read to raise pending EEH errors during mailbox waits. */
3771 if (!pci_channel_offline(ha->pdev))
3772 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
3774 /* Make sure qla82xx_watchdog is run only for physical port */
3775 if (!vha->vp_idx && IS_QLA82XX(ha)) {
3776 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3778 qla82xx_watchdog(vha);
3781 /* Loop down handler. */
3782 if (atomic_read(&vha->loop_down_timer) > 0 &&
3783 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
3784 !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
3785 && vha->flags.online) {
3787 if (atomic_read(&vha->loop_down_timer) ==
3788 vha->loop_down_abort_time) {
3790 ql_log(ql_log_info, vha, 0x6008,
3791 "Loop down - aborting the queues before time expires.\n");
3793 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3794 atomic_set(&vha->loop_state, LOOP_DEAD);
3797 * Schedule an ISP abort to return any FCP2-device
3800 /* NPIV - scan physical port only */
3802 spin_lock_irqsave(&ha->hardware_lock,
3804 req = ha->req_q_map[0];
3806 index < MAX_OUTSTANDING_COMMANDS;
3810 sp = req->outstanding_cmds[index];
3813 if (sp->ctx && !IS_PROT_IO(sp))
3816 if (!(sfcp->flags & FCF_FCP2_DEVICE))
3820 set_bit(FCOE_CTX_RESET_NEEDED,
3823 set_bit(ISP_ABORT_NEEDED,
3827 spin_unlock_irqrestore(&ha->hardware_lock,
3833 /* if the loop has been down for 4 minutes, reinit adapter */
3834 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
3835 if (!(vha->device_flags & DFLG_NO_CABLE)) {
3836 ql_log(ql_log_warn, vha, 0x6009,
3837 "Loop down - aborting ISP.\n");
3840 set_bit(FCOE_CTX_RESET_NEEDED,
3843 set_bit(ISP_ABORT_NEEDED,
3847 ql_dbg(ql_dbg_timer, vha, 0x600a,
3848 "Loop down - seconds remaining %d.\n",
3849 atomic_read(&vha->loop_down_timer));
3852 /* Check if beacon LED needs to be blinked for physical host only */
3853 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
3854 /* There is no beacon_blink function for ISP82xx */
3855 if (!IS_QLA82XX(ha)) {
3856 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
3861 /* Process any deferred work. */
3862 if (!list_empty(&vha->work_list))
3865 /* Schedule the DPC routine if needed */
3866 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3867 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3868 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
3870 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3871 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
3872 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3873 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
3874 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3875 test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
3876 ql_dbg(ql_dbg_timer, vha, 0x600b,
3877 "isp_abort_needed=%d loop_resync_needed=%d "
3878 "fcport_update_needed=%d start_dpc=%d "
3879 "reset_marker_needed=%d",
3880 test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
3881 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
3882 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
3884 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
3885 ql_dbg(ql_dbg_timer, vha, 0x600c,
3886 "beacon_blink_needed=%d isp_unrecoverable=%d "
3887 "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
3888 "relogin_needed=%d.\n",
3889 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
3890 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
3891 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
3892 test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
3893 test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
3894 qla2xxx_wake_dpc(vha);
3897 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3900 /* Firmware interface routines. */
3903 #define FW_ISP21XX 0
3904 #define FW_ISP22XX 1
3905 #define FW_ISP2300 2
3906 #define FW_ISP2322 3
3907 #define FW_ISP24XX 4
3908 #define FW_ISP25XX 5
3909 #define FW_ISP81XX 6
3910 #define FW_ISP82XX 7
3912 #define FW_FILE_ISP21XX "ql2100_fw.bin"
3913 #define FW_FILE_ISP22XX "ql2200_fw.bin"
3914 #define FW_FILE_ISP2300 "ql2300_fw.bin"
3915 #define FW_FILE_ISP2322 "ql2322_fw.bin"
3916 #define FW_FILE_ISP24XX "ql2400_fw.bin"
3917 #define FW_FILE_ISP25XX "ql2500_fw.bin"
3918 #define FW_FILE_ISP81XX "ql8100_fw.bin"
3919 #define FW_FILE_ISP82XX "ql8200_fw.bin"
3921 static DEFINE_MUTEX(qla_fw_lock);
3923 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
3924 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3925 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3926 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3927 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3928 { .name = FW_FILE_ISP24XX, },
3929 { .name = FW_FILE_ISP25XX, },
3930 { .name = FW_FILE_ISP81XX, },
3931 { .name = FW_FILE_ISP82XX, },
3935 qla2x00_request_firmware(scsi_qla_host_t *vha)
3937 struct qla_hw_data *ha = vha->hw;
3938 struct fw_blob *blob;
3941 if (IS_QLA2100(ha)) {
3942 blob = &qla_fw_blobs[FW_ISP21XX];
3943 } else if (IS_QLA2200(ha)) {
3944 blob = &qla_fw_blobs[FW_ISP22XX];
3945 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3946 blob = &qla_fw_blobs[FW_ISP2300];
3947 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
3948 blob = &qla_fw_blobs[FW_ISP2322];
3949 } else if (IS_QLA24XX_TYPE(ha)) {
3950 blob = &qla_fw_blobs[FW_ISP24XX];
3951 } else if (IS_QLA25XX(ha)) {
3952 blob = &qla_fw_blobs[FW_ISP25XX];
3953 } else if (IS_QLA81XX(ha)) {
3954 blob = &qla_fw_blobs[FW_ISP81XX];
3955 } else if (IS_QLA82XX(ha)) {
3956 blob = &qla_fw_blobs[FW_ISP82XX];
3959 mutex_lock(&qla_fw_lock);
3963 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3964 ql_log(ql_log_warn, vha, 0x0063,
3965 "Failed to load firmware image (%s).\n", blob->name);
3972 mutex_unlock(&qla_fw_lock);
3977 qla2x00_release_firmware(void)
3981 mutex_lock(&qla_fw_lock);
3982 for (idx = 0; idx < FW_BLOBS; idx++)
3983 if (qla_fw_blobs[idx].fw)
3984 release_firmware(qla_fw_blobs[idx].fw);
3985 mutex_unlock(&qla_fw_lock);
3988 static pci_ers_result_t
3989 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3991 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3992 struct qla_hw_data *ha = vha->hw;
3994 ql_dbg(ql_dbg_aer, vha, 0x9000,
3995 "PCI error detected, state %x.\n", state);
3998 case pci_channel_io_normal:
3999 ha->flags.eeh_busy = 0;
4000 return PCI_ERS_RESULT_CAN_RECOVER;
4001 case pci_channel_io_frozen:
4002 ha->flags.eeh_busy = 1;
4003 /* For ISP82XX complete any pending mailbox cmd */
4004 if (IS_QLA82XX(ha)) {
4005 ha->flags.isp82xx_fw_hung = 1;
4006 ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
4007 qla82xx_clear_pending_mbx(vha);
4009 qla2x00_free_irqs(vha);
4010 pci_disable_device(pdev);
4011 /* Return back all IOs */
4012 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4013 return PCI_ERS_RESULT_NEED_RESET;
4014 case pci_channel_io_perm_failure:
4015 ha->flags.pci_channel_io_perm_failure = 1;
4016 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
4017 return PCI_ERS_RESULT_DISCONNECT;
4019 return PCI_ERS_RESULT_NEED_RESET;
4022 static pci_ers_result_t
4023 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
4025 int risc_paused = 0;
4027 unsigned long flags;
4028 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4029 struct qla_hw_data *ha = base_vha->hw;
4030 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4031 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
4034 return PCI_ERS_RESULT_RECOVERED;
4036 spin_lock_irqsave(&ha->hardware_lock, flags);
4037 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
4038 stat = RD_REG_DWORD(®->hccr);
4039 if (stat & HCCR_RISC_PAUSE)
4041 } else if (IS_QLA23XX(ha)) {
4042 stat = RD_REG_DWORD(®->u.isp2300.host_status);
4043 if (stat & HSR_RISC_PAUSED)
4045 } else if (IS_FWI2_CAPABLE(ha)) {
4046 stat = RD_REG_DWORD(®24->host_status);
4047 if (stat & HSRX_RISC_PAUSED)
4050 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4053 ql_log(ql_log_info, base_vha, 0x9003,
4054 "RISC paused -- mmio_enabled, Dumping firmware.\n");
4055 ha->isp_ops->fw_dump(base_vha, 0);
4057 return PCI_ERS_RESULT_NEED_RESET;
4059 return PCI_ERS_RESULT_RECOVERED;
4062 uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
4064 uint32_t rval = QLA_FUNCTION_FAILED;
4065 uint32_t drv_active = 0;
4066 struct qla_hw_data *ha = base_vha->hw;
4068 struct pci_dev *other_pdev = NULL;
4070 ql_dbg(ql_dbg_aer, base_vha, 0x9006,
4071 "Entered %s.\n", __func__);
4073 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4075 if (base_vha->flags.online) {
4076 /* Abort all outstanding commands,
4077 * so as to be requeued later */
4078 qla2x00_abort_isp_cleanup(base_vha);
4082 fn = PCI_FUNC(ha->pdev->devfn);
4085 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
4086 "Finding pci device at function = 0x%x.\n", fn);
4088 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
4089 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
4094 if (atomic_read(&other_pdev->enable_cnt)) {
4095 ql_dbg(ql_dbg_aer, base_vha, 0x9008,
4096 "Found PCI func available and enable at 0x%x.\n",
4098 pci_dev_put(other_pdev);
4101 pci_dev_put(other_pdev);
4106 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
4107 "This devfn is reset owner = 0x%x.\n",
4109 qla82xx_idc_lock(ha);
4111 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4112 QLA82XX_DEV_INITIALIZING);
4114 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
4115 QLA82XX_IDC_VERSION);
4117 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
4118 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
4119 "drv_active = 0x%x.\n", drv_active);
4121 qla82xx_idc_unlock(ha);
4122 /* Reset if device is not already reset
4123 * drv_active would be 0 if a reset has already been done
4126 rval = qla82xx_start_firmware(base_vha);
4129 qla82xx_idc_lock(ha);
4131 if (rval != QLA_SUCCESS) {
4132 ql_log(ql_log_info, base_vha, 0x900b,
4133 "HW State: FAILED.\n");
4134 qla82xx_clear_drv_active(ha);
4135 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4136 QLA82XX_DEV_FAILED);
4138 ql_log(ql_log_info, base_vha, 0x900c,
4139 "HW State: READY.\n");
4140 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4142 qla82xx_idc_unlock(ha);
4143 ha->flags.isp82xx_fw_hung = 0;
4144 rval = qla82xx_restart_isp(base_vha);
4145 qla82xx_idc_lock(ha);
4146 /* Clear driver state register */
4147 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
4148 qla82xx_set_drv_active(base_vha);
4150 qla82xx_idc_unlock(ha);
4152 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
4153 "This devfn is not reset owner = 0x%x.\n",
4155 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
4156 QLA82XX_DEV_READY)) {
4157 ha->flags.isp82xx_fw_hung = 0;
4158 rval = qla82xx_restart_isp(base_vha);
4159 qla82xx_idc_lock(ha);
4160 qla82xx_set_drv_active(base_vha);
4161 qla82xx_idc_unlock(ha);
4164 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4169 static pci_ers_result_t
4170 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
4172 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
4173 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4174 struct qla_hw_data *ha = base_vha->hw;
4175 struct rsp_que *rsp;
4176 int rc, retries = 10;
4178 ql_dbg(ql_dbg_aer, base_vha, 0x9004,
4181 /* Workaround: qla2xxx driver which access hardware earlier
4182 * needs error state to be pci_channel_io_online.
4183 * Otherwise mailbox command timesout.
4185 pdev->error_state = pci_channel_io_normal;
4187 pci_restore_state(pdev);
4189 /* pci_restore_state() clears the saved_state flag of the device
4190 * save restored state which resets saved_state flag
4192 pci_save_state(pdev);
4195 rc = pci_enable_device_mem(pdev);
4197 rc = pci_enable_device(pdev);
4200 ql_log(ql_log_warn, base_vha, 0x9005,
4201 "Can't re-enable PCI device after reset.\n");
4202 goto exit_slot_reset;
4205 rsp = ha->rsp_q_map[0];
4206 if (qla2x00_request_irqs(ha, rsp))
4207 goto exit_slot_reset;
4209 if (ha->isp_ops->pci_config(base_vha))
4210 goto exit_slot_reset;
4212 if (IS_QLA82XX(ha)) {
4213 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4214 ret = PCI_ERS_RESULT_RECOVERED;
4215 goto exit_slot_reset;
4217 goto exit_slot_reset;
4220 while (ha->flags.mbox_busy && retries--)
4223 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4224 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
4225 ret = PCI_ERS_RESULT_RECOVERED;
4226 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4230 ql_dbg(ql_dbg_aer, base_vha, 0x900e,
4231 "slot_reset return %x.\n", ret);
4237 qla2xxx_pci_resume(struct pci_dev *pdev)
4239 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4240 struct qla_hw_data *ha = base_vha->hw;
4243 ql_dbg(ql_dbg_aer, base_vha, 0x900f,
4246 ret = qla2x00_wait_for_hba_online(base_vha);
4247 if (ret != QLA_SUCCESS) {
4248 ql_log(ql_log_fatal, base_vha, 0x9002,
4249 "The device failed to resume I/O from slot/link_reset.\n");
4252 pci_cleanup_aer_uncorrect_error_status(pdev);
4254 ha->flags.eeh_busy = 0;
4257 static struct pci_error_handlers qla2xxx_err_handler = {
4258 .error_detected = qla2xxx_pci_error_detected,
4259 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4260 .slot_reset = qla2xxx_pci_slot_reset,
4261 .resume = qla2xxx_pci_resume,
4264 static struct pci_device_id qla2xxx_pci_tbl[] = {
4265 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4266 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4267 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4268 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4269 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4270 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4271 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4272 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4273 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4274 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
4275 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4276 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
4277 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
4278 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
4279 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
4282 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4284 static struct pci_driver qla2xxx_pci_driver = {
4285 .name = QLA2XXX_DRIVER_NAME,
4287 .owner = THIS_MODULE,
4289 .id_table = qla2xxx_pci_tbl,
4290 .probe = qla2x00_probe_one,
4291 .remove = qla2x00_remove_one,
4292 .shutdown = qla2x00_shutdown,
4293 .err_handler = &qla2xxx_err_handler,
4296 static struct file_operations apidev_fops = {
4297 .owner = THIS_MODULE,
4298 .llseek = noop_llseek,
4302 * qla2x00_module_init - Module initialization.
4305 qla2x00_module_init(void)
4309 /* Allocate cache for SRBs. */
4310 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
4311 SLAB_HWCACHE_ALIGN, NULL);
4312 if (srb_cachep == NULL) {
4313 ql_log(ql_log_fatal, NULL, 0x0001,
4314 "Unable to allocate SRB cache...Failing load!.\n");
4318 /* Derive version string. */
4319 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
4320 if (ql2xextended_error_logging)
4321 strcat(qla2x00_version_str, "-debug");
4323 qla2xxx_transport_template =
4324 fc_attach_transport(&qla2xxx_transport_functions);
4325 if (!qla2xxx_transport_template) {
4326 kmem_cache_destroy(srb_cachep);
4327 ql_log(ql_log_fatal, NULL, 0x0002,
4328 "fc_attach_transport failed...Failing load!.\n");
4332 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4333 if (apidev_major < 0) {
4334 ql_log(ql_log_fatal, NULL, 0x0003,
4335 "Unable to register char device %s.\n", QLA2XXX_APIDEV);
4338 qla2xxx_transport_vport_template =
4339 fc_attach_transport(&qla2xxx_transport_vport_functions);
4340 if (!qla2xxx_transport_vport_template) {
4341 kmem_cache_destroy(srb_cachep);
4342 fc_release_transport(qla2xxx_transport_template);
4343 ql_log(ql_log_fatal, NULL, 0x0004,
4344 "fc_attach_transport vport failed...Failing load!.\n");
4347 ql_log(ql_log_info, NULL, 0x0005,
4348 "QLogic Fibre Channel HBA Driver: %s.\n",
4349 qla2x00_version_str);
4350 ret = pci_register_driver(&qla2xxx_pci_driver);
4352 kmem_cache_destroy(srb_cachep);
4353 fc_release_transport(qla2xxx_transport_template);
4354 fc_release_transport(qla2xxx_transport_vport_template);
4355 ql_log(ql_log_fatal, NULL, 0x0006,
4356 "pci_register_driver failed...ret=%d Failing load!.\n",
4363 * qla2x00_module_exit - Module cleanup.
4366 qla2x00_module_exit(void)
4368 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
4369 pci_unregister_driver(&qla2xxx_pci_driver);
4370 qla2x00_release_firmware();
4371 kmem_cache_destroy(srb_cachep);
4373 kmem_cache_destroy(ctx_cachep);
4374 fc_release_transport(qla2xxx_transport_template);
4375 fc_release_transport(qla2xxx_transport_vport_template);
4378 module_init(qla2x00_module_init);
4379 module_exit(qla2x00_module_exit);
4381 MODULE_AUTHOR("QLogic Corporation");
4382 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4383 MODULE_LICENSE("GPL");
4384 MODULE_VERSION(QLA2XXX_VERSION);
4385 MODULE_FIRMWARE(FW_FILE_ISP21XX);
4386 MODULE_FIRMWARE(FW_FILE_ISP22XX);
4387 MODULE_FIRMWARE(FW_FILE_ISP2300);
4388 MODULE_FIRMWARE(FW_FILE_ISP2322);
4389 MODULE_FIRMWARE(FW_FILE_ISP24XX);
4390 MODULE_FIRMWARE(FW_FILE_ISP25XX);