2 * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
4 * Copyright (c) 2008-2009 USI Co., Ltd.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
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12 * without modification.
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16 * including a substantially similar Disclaimer requirement for further
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19 * of any contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
22 * Alternatively, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2 as published by the Free
24 * Software Foundation.
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41 #include <linux/slab.h>
42 #include "pm8001_sas.h"
43 #include "pm8001_chips.h"
45 static struct scsi_transport_template *pm8001_stt;
48 * chip info structure to identify chip key functionality as
49 * encryption available/not, no of ports, hw specific function ref
51 static const struct pm8001_chip_info pm8001_chips[] = {
52 [chip_8001] = {0, 8, &pm8001_8001_dispatch,},
53 [chip_8008] = {0, 8, &pm8001_80xx_dispatch,},
54 [chip_8009] = {1, 8, &pm8001_80xx_dispatch,},
55 [chip_8018] = {0, 16, &pm8001_80xx_dispatch,},
56 [chip_8019] = {1, 16, &pm8001_80xx_dispatch,},
62 struct workqueue_struct *pm8001_wq;
65 * The main structure which LLDD must register for scsi core.
67 static struct scsi_host_template pm8001_sht = {
68 .module = THIS_MODULE,
70 .queuecommand = sas_queuecommand,
71 .target_alloc = sas_target_alloc,
72 .slave_configure = sas_slave_configure,
73 .scan_finished = pm8001_scan_finished,
74 .scan_start = pm8001_scan_start,
75 .change_queue_depth = sas_change_queue_depth,
76 .change_queue_type = sas_change_queue_type,
77 .bios_param = sas_bios_param,
81 .sg_tablesize = SG_ALL,
82 .max_sectors = SCSI_DEFAULT_MAX_SECTORS,
83 .use_clustering = ENABLE_CLUSTERING,
84 .eh_device_reset_handler = sas_eh_device_reset_handler,
85 .eh_bus_reset_handler = sas_eh_bus_reset_handler,
86 .target_destroy = sas_target_destroy,
88 .shost_attrs = pm8001_host_attrs,
92 * Sas layer call this function to execute specific task.
94 static struct sas_domain_function_template pm8001_transport_ops = {
95 .lldd_dev_found = pm8001_dev_found,
96 .lldd_dev_gone = pm8001_dev_gone,
98 .lldd_execute_task = pm8001_queue_command,
99 .lldd_control_phy = pm8001_phy_control,
101 .lldd_abort_task = pm8001_abort_task,
102 .lldd_abort_task_set = pm8001_abort_task_set,
103 .lldd_clear_aca = pm8001_clear_aca,
104 .lldd_clear_task_set = pm8001_clear_task_set,
105 .lldd_I_T_nexus_reset = pm8001_I_T_nexus_reset,
106 .lldd_lu_reset = pm8001_lu_reset,
107 .lldd_query_task = pm8001_query_task,
111 *pm8001_phy_init - initiate our adapter phys
112 *@pm8001_ha: our hba structure.
115 static void pm8001_phy_init(struct pm8001_hba_info *pm8001_ha, int phy_id)
117 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
118 struct asd_sas_phy *sas_phy = &phy->sas_phy;
120 phy->pm8001_ha = pm8001_ha;
121 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0;
122 sas_phy->class = SAS;
123 sas_phy->iproto = SAS_PROTOCOL_ALL;
125 sas_phy->type = PHY_TYPE_PHYSICAL;
126 sas_phy->role = PHY_ROLE_INITIATOR;
127 sas_phy->oob_mode = OOB_NOT_CONNECTED;
128 sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
129 sas_phy->id = phy_id;
130 sas_phy->sas_addr = &pm8001_ha->sas_addr[0];
131 sas_phy->frame_rcvd = &phy->frame_rcvd[0];
132 sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata;
133 sas_phy->lldd_phy = phy;
137 *pm8001_free - free hba
138 *@pm8001_ha: our hba structure.
141 static void pm8001_free(struct pm8001_hba_info *pm8001_ha)
148 for (i = 0; i < USI_MAX_MEMCNT; i++) {
149 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) {
150 pci_free_consistent(pm8001_ha->pdev,
151 (pm8001_ha->memoryMap.region[i].total_len +
152 pm8001_ha->memoryMap.region[i].alignment),
153 pm8001_ha->memoryMap.region[i].virt_ptr,
154 pm8001_ha->memoryMap.region[i].phys_addr);
157 PM8001_CHIP_DISP->chip_iounmap(pm8001_ha);
158 if (pm8001_ha->shost)
159 scsi_host_put(pm8001_ha->shost);
160 flush_workqueue(pm8001_wq);
161 kfree(pm8001_ha->tags);
165 #ifdef PM8001_USE_TASKLET
168 * tasklet for 64 msi-x interrupt handler
169 * @opaque: the passed general host adapter struct
170 * Note: pm8001_tasklet is common for pm8001 & pm80xx
172 static void pm8001_tasklet(unsigned long opaque)
174 struct pm8001_hba_info *pm8001_ha;
176 pm8001_ha = (struct pm8001_hba_info *)opaque;
177 if (unlikely(!pm8001_ha))
179 vec = pm8001_ha->int_vector;
180 PM8001_CHIP_DISP->isr(pm8001_ha, vec);
184 static struct pm8001_hba_info *outq_to_hba(u8 *outq)
186 return container_of((outq - *outq), struct pm8001_hba_info, outq[0]);
190 * pm8001_interrupt_handler_msix - main MSIX interrupt handler.
191 * It obtains the vector number and calls the equivalent bottom
192 * half or services directly.
193 * @opaque: the passed outbound queue/vector. Host structure is
194 * retrieved from the same.
196 static irqreturn_t pm8001_interrupt_handler_msix(int irq, void *opaque)
198 struct pm8001_hba_info *pm8001_ha = outq_to_hba(opaque);
199 u8 outq = *(u8 *)opaque;
200 irqreturn_t ret = IRQ_HANDLED;
201 if (unlikely(!pm8001_ha))
203 if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
205 pm8001_ha->int_vector = outq;
206 #ifdef PM8001_USE_TASKLET
207 tasklet_schedule(&pm8001_ha->tasklet);
209 ret = PM8001_CHIP_DISP->isr(pm8001_ha, outq);
215 * pm8001_interrupt_handler_intx - main INTx interrupt handler.
216 * @dev_id: sas_ha structure. The HBA is retrieved from sas_has structure.
219 static irqreturn_t pm8001_interrupt_handler_intx(int irq, void *dev_id)
221 struct pm8001_hba_info *pm8001_ha;
222 irqreturn_t ret = IRQ_HANDLED;
223 struct sas_ha_struct *sha = dev_id;
224 pm8001_ha = sha->lldd_ha;
225 if (unlikely(!pm8001_ha))
227 if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
230 pm8001_ha->int_vector = 0;
231 #ifdef PM8001_USE_TASKLET
232 tasklet_schedule(&pm8001_ha->tasklet);
234 ret = PM8001_CHIP_DISP->isr(pm8001_ha, 0);
240 * pm8001_alloc - initiate our hba structure and 6 DMAs area.
241 * @pm8001_ha:our hba structure.
244 static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
245 const struct pci_device_id *ent)
248 spin_lock_init(&pm8001_ha->lock);
249 PM8001_INIT_DBG(pm8001_ha,
250 pm8001_printk("pm8001_alloc: PHY:%x\n",
251 pm8001_ha->chip->n_phy));
252 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
253 pm8001_phy_init(pm8001_ha, i);
254 pm8001_ha->port[i].wide_port_phymap = 0;
255 pm8001_ha->port[i].port_attached = 0;
256 pm8001_ha->port[i].port_state = 0;
257 INIT_LIST_HEAD(&pm8001_ha->port[i].list);
260 pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL);
261 if (!pm8001_ha->tags)
263 /* MPI Memory region 1 for AAP Event Log for fw */
264 pm8001_ha->memoryMap.region[AAP1].num_elements = 1;
265 pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE;
266 pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE;
267 pm8001_ha->memoryMap.region[AAP1].alignment = 32;
269 /* MPI Memory region 2 for IOP Event Log for fw */
270 pm8001_ha->memoryMap.region[IOP].num_elements = 1;
271 pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE;
272 pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE;
273 pm8001_ha->memoryMap.region[IOP].alignment = 32;
275 for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) {
276 /* MPI Memory region 3 for consumer Index of inbound queues */
277 pm8001_ha->memoryMap.region[CI+i].num_elements = 1;
278 pm8001_ha->memoryMap.region[CI+i].element_size = 4;
279 pm8001_ha->memoryMap.region[CI+i].total_len = 4;
280 pm8001_ha->memoryMap.region[CI+i].alignment = 4;
282 if ((ent->driver_data) != chip_8001) {
283 /* MPI Memory region 5 inbound queues */
284 pm8001_ha->memoryMap.region[IB+i].num_elements =
286 pm8001_ha->memoryMap.region[IB+i].element_size = 128;
287 pm8001_ha->memoryMap.region[IB+i].total_len =
288 PM8001_MPI_QUEUE * 128;
289 pm8001_ha->memoryMap.region[IB+i].alignment = 128;
291 pm8001_ha->memoryMap.region[IB+i].num_elements =
293 pm8001_ha->memoryMap.region[IB+i].element_size = 64;
294 pm8001_ha->memoryMap.region[IB+i].total_len =
295 PM8001_MPI_QUEUE * 64;
296 pm8001_ha->memoryMap.region[IB+i].alignment = 64;
300 for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) {
301 /* MPI Memory region 4 for producer Index of outbound queues */
302 pm8001_ha->memoryMap.region[PI+i].num_elements = 1;
303 pm8001_ha->memoryMap.region[PI+i].element_size = 4;
304 pm8001_ha->memoryMap.region[PI+i].total_len = 4;
305 pm8001_ha->memoryMap.region[PI+i].alignment = 4;
307 if (ent->driver_data != chip_8001) {
308 /* MPI Memory region 6 Outbound queues */
309 pm8001_ha->memoryMap.region[OB+i].num_elements =
311 pm8001_ha->memoryMap.region[OB+i].element_size = 128;
312 pm8001_ha->memoryMap.region[OB+i].total_len =
313 PM8001_MPI_QUEUE * 128;
314 pm8001_ha->memoryMap.region[OB+i].alignment = 128;
316 /* MPI Memory region 6 Outbound queues */
317 pm8001_ha->memoryMap.region[OB+i].num_elements =
319 pm8001_ha->memoryMap.region[OB+i].element_size = 64;
320 pm8001_ha->memoryMap.region[OB+i].total_len =
321 PM8001_MPI_QUEUE * 64;
322 pm8001_ha->memoryMap.region[OB+i].alignment = 64;
326 /* Memory region write DMA*/
327 pm8001_ha->memoryMap.region[NVMD].num_elements = 1;
328 pm8001_ha->memoryMap.region[NVMD].element_size = 4096;
329 pm8001_ha->memoryMap.region[NVMD].total_len = 4096;
330 /* Memory region for devices*/
331 pm8001_ha->memoryMap.region[DEV_MEM].num_elements = 1;
332 pm8001_ha->memoryMap.region[DEV_MEM].element_size = PM8001_MAX_DEVICES *
333 sizeof(struct pm8001_device);
334 pm8001_ha->memoryMap.region[DEV_MEM].total_len = PM8001_MAX_DEVICES *
335 sizeof(struct pm8001_device);
337 /* Memory region for ccb_info*/
338 pm8001_ha->memoryMap.region[CCB_MEM].num_elements = 1;
339 pm8001_ha->memoryMap.region[CCB_MEM].element_size = PM8001_MAX_CCB *
340 sizeof(struct pm8001_ccb_info);
341 pm8001_ha->memoryMap.region[CCB_MEM].total_len = PM8001_MAX_CCB *
342 sizeof(struct pm8001_ccb_info);
344 /* Memory region for fw flash */
345 pm8001_ha->memoryMap.region[FW_FLASH].total_len = 4096;
347 for (i = 0; i < USI_MAX_MEMCNT; i++) {
348 if (pm8001_mem_alloc(pm8001_ha->pdev,
349 &pm8001_ha->memoryMap.region[i].virt_ptr,
350 &pm8001_ha->memoryMap.region[i].phys_addr,
351 &pm8001_ha->memoryMap.region[i].phys_addr_hi,
352 &pm8001_ha->memoryMap.region[i].phys_addr_lo,
353 pm8001_ha->memoryMap.region[i].total_len,
354 pm8001_ha->memoryMap.region[i].alignment) != 0) {
355 PM8001_FAIL_DBG(pm8001_ha,
356 pm8001_printk("Mem%d alloc failed\n",
362 pm8001_ha->devices = pm8001_ha->memoryMap.region[DEV_MEM].virt_ptr;
363 for (i = 0; i < PM8001_MAX_DEVICES; i++) {
364 pm8001_ha->devices[i].dev_type = SAS_PHY_UNUSED;
365 pm8001_ha->devices[i].id = i;
366 pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES;
367 pm8001_ha->devices[i].running_req = 0;
369 pm8001_ha->ccb_info = pm8001_ha->memoryMap.region[CCB_MEM].virt_ptr;
370 for (i = 0; i < PM8001_MAX_CCB; i++) {
371 pm8001_ha->ccb_info[i].ccb_dma_handle =
372 pm8001_ha->memoryMap.region[CCB_MEM].phys_addr +
373 i * sizeof(struct pm8001_ccb_info);
374 pm8001_ha->ccb_info[i].task = NULL;
375 pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff;
376 pm8001_ha->ccb_info[i].device = NULL;
377 ++pm8001_ha->tags_num;
379 pm8001_ha->flags = PM8001F_INIT_TIME;
380 /* Initialize tags */
381 pm8001_tag_init(pm8001_ha);
388 * pm8001_ioremap - remap the pci high physical address to kernal virtual
389 * address so that we can access them.
390 * @pm8001_ha:our hba structure.
392 static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha)
396 struct pci_dev *pdev;
398 pdev = pm8001_ha->pdev;
399 /* map pci mem (PMC pci base 0-3)*/
400 for (bar = 0; bar < 6; bar++) {
402 ** logical BARs for SPC:
403 ** bar 0 and 1 - logical BAR0
404 ** bar 2 and 3 - logical BAR1
405 ** bar4 - logical BAR2
406 ** bar5 - logical BAR3
407 ** Skip the appropriate assignments:
409 if ((bar == 1) || (bar == 3))
411 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
412 pm8001_ha->io_mem[logicalBar].membase =
413 pci_resource_start(pdev, bar);
414 pm8001_ha->io_mem[logicalBar].membase &=
415 (u32)PCI_BASE_ADDRESS_MEM_MASK;
416 pm8001_ha->io_mem[logicalBar].memsize =
417 pci_resource_len(pdev, bar);
418 pm8001_ha->io_mem[logicalBar].memvirtaddr =
419 ioremap(pm8001_ha->io_mem[logicalBar].membase,
420 pm8001_ha->io_mem[logicalBar].memsize);
421 PM8001_INIT_DBG(pm8001_ha,
422 pm8001_printk("PCI: bar %d, logicalBar %d ",
424 PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
425 "base addr %llx virt_addr=%llx len=%d\n",
426 (u64)pm8001_ha->io_mem[logicalBar].membase,
427 (u64)pm8001_ha->io_mem[logicalBar].memvirtaddr,
428 pm8001_ha->io_mem[logicalBar].memsize));
430 pm8001_ha->io_mem[logicalBar].membase = 0;
431 pm8001_ha->io_mem[logicalBar].memsize = 0;
432 pm8001_ha->io_mem[logicalBar].memvirtaddr = 0;
440 * pm8001_pci_alloc - initialize our ha card structure
443 * @shost: scsi host struct which has been initialized before.
445 static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev,
446 const struct pci_device_id *ent,
447 struct Scsi_Host *shost)
450 struct pm8001_hba_info *pm8001_ha;
451 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
454 pm8001_ha = sha->lldd_ha;
458 pm8001_ha->pdev = pdev;
459 pm8001_ha->dev = &pdev->dev;
460 pm8001_ha->chip_id = ent->driver_data;
461 pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id];
462 pm8001_ha->irq = pdev->irq;
463 pm8001_ha->sas = sha;
464 pm8001_ha->shost = shost;
465 pm8001_ha->id = pm8001_id++;
466 pm8001_ha->logging_level = 0x01;
467 sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id);
468 /* IOMB size is 128 for 8088/89 controllers */
469 if (pm8001_ha->chip_id != chip_8001)
470 pm8001_ha->iomb_size = IOMB_SIZE_SPCV;
472 pm8001_ha->iomb_size = IOMB_SIZE_SPC;
474 #ifdef PM8001_USE_TASKLET
476 * default tasklet for non msi-x interrupt handler/first msi-x
479 tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet,
480 (unsigned long)pm8001_ha);
482 pm8001_ioremap(pm8001_ha);
483 if (!pm8001_alloc(pm8001_ha, ent))
485 pm8001_free(pm8001_ha);
490 * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit
493 static int pci_go_44(struct pci_dev *pdev)
497 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(44))) {
498 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(44));
500 rc = pci_set_consistent_dma_mask(pdev,
503 dev_printk(KERN_ERR, &pdev->dev,
504 "44-bit DMA enable failed\n");
509 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
511 dev_printk(KERN_ERR, &pdev->dev,
512 "32-bit DMA enable failed\n");
515 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
517 dev_printk(KERN_ERR, &pdev->dev,
518 "32-bit consistent DMA enable failed\n");
526 * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them.
527 * @shost: scsi host which has been allocated outside.
528 * @chip_info: our ha struct.
530 static int pm8001_prep_sas_ha_init(struct Scsi_Host *shost,
531 const struct pm8001_chip_info *chip_info)
534 struct asd_sas_phy **arr_phy;
535 struct asd_sas_port **arr_port;
536 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
538 phy_nr = chip_info->n_phy;
540 memset(sha, 0x00, sizeof(*sha));
541 arr_phy = kcalloc(phy_nr, sizeof(void *), GFP_KERNEL);
544 arr_port = kcalloc(port_nr, sizeof(void *), GFP_KERNEL);
548 sha->sas_phy = arr_phy;
549 sha->sas_port = arr_port;
550 sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL);
554 shost->transportt = pm8001_stt;
555 shost->max_id = PM8001_MAX_DEVICES;
557 shost->max_channel = 0;
558 shost->unique_id = pm8001_id;
559 shost->max_cmd_len = 16;
560 shost->can_queue = PM8001_CAN_QUEUE;
561 shost->cmd_per_lun = 32;
572 * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas
573 * @shost: scsi host which has been allocated outside
574 * @chip_info: our ha struct.
576 static void pm8001_post_sas_ha_init(struct Scsi_Host *shost,
577 const struct pm8001_chip_info *chip_info)
580 struct pm8001_hba_info *pm8001_ha;
581 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
583 pm8001_ha = sha->lldd_ha;
584 for (i = 0; i < chip_info->n_phy; i++) {
585 sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy;
586 sha->sas_port[i] = &pm8001_ha->port[i].sas_port;
588 sha->sas_ha_name = DRV_NAME;
589 sha->dev = pm8001_ha->dev;
591 sha->lldd_module = THIS_MODULE;
592 sha->sas_addr = &pm8001_ha->sas_addr[0];
593 sha->num_phys = chip_info->n_phy;
594 sha->lldd_max_execute_num = 1;
595 sha->lldd_queue_size = PM8001_CAN_QUEUE;
596 sha->core.shost = shost;
600 * pm8001_init_sas_add - initialize sas address
601 * @chip_info: our ha struct.
603 * Currently we just set the fixed SAS address to our HBA,for manufacture,
604 * it should read from the EEPROM
606 static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
609 #ifdef PM8001_READ_VPD
610 /* For new SPC controllers WWN is stored in flash vpd
611 * For SPC/SPCve controllers WWN is stored in EEPROM
612 * For Older SPC WWN is stored in NVMD
614 DECLARE_COMPLETION_ONSTACK(completion);
615 struct pm8001_ioctl_payload payload;
617 pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid);
618 pm8001_ha->nvmd_completion = &completion;
620 if (pm8001_ha->chip_id == chip_8001) {
621 if (deviceid == 0x8081) {
622 payload.minor_function = 4;
623 payload.length = 4096;
625 payload.minor_function = 0;
626 payload.length = 128;
629 payload.minor_function = 1;
630 payload.length = 4096;
633 payload.func_specific = kzalloc(payload.length, GFP_KERNEL);
634 PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
635 wait_for_completion(&completion);
637 for (i = 0, j = 0; i <= 7; i++, j++) {
638 if (pm8001_ha->chip_id == chip_8001) {
639 if (deviceid == 0x8081)
640 pm8001_ha->sas_addr[j] =
641 payload.func_specific[0x704 + i];
643 pm8001_ha->sas_addr[j] =
644 payload.func_specific[0x804 + i];
647 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
648 memcpy(&pm8001_ha->phy[i].dev_sas_addr,
649 pm8001_ha->sas_addr, SAS_ADDR_SIZE);
650 PM8001_INIT_DBG(pm8001_ha,
651 pm8001_printk("phy %d sas_addr = %016llx\n", i,
652 pm8001_ha->phy[i].dev_sas_addr));
655 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
656 pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
657 pm8001_ha->phy[i].dev_sas_addr =
659 (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
661 memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
666 #ifdef PM8001_USE_MSIX
668 * pm8001_setup_msix - enable MSI-X interrupt
669 * @chip_info: our ha struct.
670 * @irq_handler: irq_handler
672 static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha)
679 static char intr_drvname[PM8001_MAX_MSIX_VEC][sizeof(DRV_NAME)+3];
681 /* SPCv controllers supports 64 msi-x */
682 if (pm8001_ha->chip_id == chip_8001) {
684 flag |= IRQF_DISABLED;
686 number_of_intr = PM8001_MAX_MSIX_VEC;
687 flag &= ~IRQF_SHARED;
688 flag |= IRQF_DISABLED;
691 max_entry = sizeof(pm8001_ha->msix_entries) /
692 sizeof(pm8001_ha->msix_entries[0]);
693 for (i = 0; i < max_entry ; i++)
694 pm8001_ha->msix_entries[i].entry = i;
695 rc = pci_enable_msix(pm8001_ha->pdev, pm8001_ha->msix_entries,
697 pm8001_ha->number_of_intr = number_of_intr;
699 PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
700 "pci_enable_msix request ret:%d no of intr %d\n",
701 rc, pm8001_ha->number_of_intr));
703 for (i = 0; i < number_of_intr; i++)
704 pm8001_ha->outq[i] = i;
706 for (i = 0; i < number_of_intr; i++) {
707 snprintf(intr_drvname[i], sizeof(intr_drvname[0]),
709 if (request_irq(pm8001_ha->msix_entries[i].vector,
710 pm8001_interrupt_handler_msix, flag,
711 intr_drvname[i], &pm8001_ha->outq[i])) {
712 for (j = 0; j < i; j++)
714 pm8001_ha->msix_entries[j].vector,
715 &pm8001_ha->outq[j]);
716 pci_disable_msix(pm8001_ha->pdev);
726 * pm8001_request_irq - register interrupt
727 * @chip_info: our ha struct.
729 static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
731 struct pci_dev *pdev;
734 pdev = pm8001_ha->pdev;
736 #ifdef PM8001_USE_MSIX
737 if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
738 return pm8001_setup_msix(pm8001_ha);
740 PM8001_INIT_DBG(pm8001_ha,
741 pm8001_printk("MSIX not supported!!!\n"));
747 /* initialize the INT-X interrupt */
748 rc = request_irq(pdev->irq, pm8001_interrupt_handler_intx, IRQF_SHARED,
749 DRV_NAME, SHOST_TO_SAS_HA(pm8001_ha->shost));
754 * pm8001_pci_probe - probe supported device
755 * @pdev: pci device which kernel has been prepared for.
756 * @ent: pci device id
758 * This function is the main initialization function, when register a new
759 * pci driver it is invoked, all struct an hardware initilization should be done
760 * here, also, register interrupt
762 static int pm8001_pci_probe(struct pci_dev *pdev,
763 const struct pci_device_id *ent)
768 struct pm8001_hba_info *pm8001_ha;
769 struct Scsi_Host *shost = NULL;
770 const struct pm8001_chip_info *chip;
772 dev_printk(KERN_INFO, &pdev->dev,
773 "pm80xx: driver version %s\n", DRV_VERSION);
774 rc = pci_enable_device(pdev);
777 pci_set_master(pdev);
779 * Enable pci slot busmaster by setting pci command register.
780 * This is required by FW for Cyclone card.
783 pci_read_config_dword(pdev, PCI_COMMAND, &pci_reg);
785 pci_write_config_dword(pdev, PCI_COMMAND, pci_reg);
786 rc = pci_request_regions(pdev, DRV_NAME);
788 goto err_out_disable;
789 rc = pci_go_44(pdev);
791 goto err_out_regions;
793 shost = scsi_host_alloc(&pm8001_sht, sizeof(void *));
796 goto err_out_regions;
798 chip = &pm8001_chips[ent->driver_data];
799 SHOST_TO_SAS_HA(shost) =
800 kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL);
801 if (!SHOST_TO_SAS_HA(shost)) {
803 goto err_out_free_host;
806 rc = pm8001_prep_sas_ha_init(shost, chip);
811 pci_set_drvdata(pdev, SHOST_TO_SAS_HA(shost));
812 /* ent->driver variable is used to differentiate between controllers */
813 pm8001_ha = pm8001_pci_alloc(pdev, ent, shost);
818 list_add_tail(&pm8001_ha->list, &hba_list);
819 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
820 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
822 PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
823 "chip_init failed [ret: %d]\n", rc));
824 goto err_out_ha_free;
827 rc = scsi_add_host(shost, &pdev->dev);
829 goto err_out_ha_free;
830 rc = pm8001_request_irq(pm8001_ha);
832 PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
833 "pm8001_request_irq failed [ret: %d]\n", rc));
837 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
838 if (pm8001_ha->chip_id != chip_8001) {
839 for (i = 1; i < pm8001_ha->number_of_intr; i++)
840 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i);
841 /* setup thermal configuration. */
842 pm80xx_set_thermal_config(pm8001_ha);
845 pm8001_init_sas_add(pm8001_ha);
846 pm8001_post_sas_ha_init(shost, chip);
847 rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
850 scsi_scan_host(pm8001_ha->shost);
854 scsi_remove_host(pm8001_ha->shost);
856 pm8001_free(pm8001_ha);
858 kfree(SHOST_TO_SAS_HA(shost));
862 pci_release_regions(pdev);
864 pci_disable_device(pdev);
869 static void pm8001_pci_remove(struct pci_dev *pdev)
871 struct sas_ha_struct *sha = pci_get_drvdata(pdev);
872 struct pm8001_hba_info *pm8001_ha;
874 pm8001_ha = sha->lldd_ha;
875 pci_set_drvdata(pdev, NULL);
876 sas_unregister_ha(sha);
877 sas_remove_host(pm8001_ha->shost);
878 list_del(&pm8001_ha->list);
879 scsi_remove_host(pm8001_ha->shost);
880 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
881 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
883 #ifdef PM8001_USE_MSIX
884 for (i = 0; i < pm8001_ha->number_of_intr; i++)
885 synchronize_irq(pm8001_ha->msix_entries[i].vector);
886 for (i = 0; i < pm8001_ha->number_of_intr; i++)
887 free_irq(pm8001_ha->msix_entries[i].vector,
888 &pm8001_ha->outq[i]);
889 pci_disable_msix(pdev);
891 free_irq(pm8001_ha->irq, sha);
893 #ifdef PM8001_USE_TASKLET
894 tasklet_kill(&pm8001_ha->tasklet);
896 pm8001_free(pm8001_ha);
898 kfree(sha->sas_port);
900 pci_release_regions(pdev);
901 pci_disable_device(pdev);
905 * pm8001_pci_suspend - power management suspend main entry point
906 * @pdev: PCI device struct
907 * @state: PM state change to (usually PCI_D3)
909 * Returns 0 success, anything else error.
911 static int pm8001_pci_suspend(struct pci_dev *pdev, pm_message_t state)
913 struct sas_ha_struct *sha = pci_get_drvdata(pdev);
914 struct pm8001_hba_info *pm8001_ha;
917 pm8001_ha = sha->lldd_ha;
918 flush_workqueue(pm8001_wq);
919 scsi_block_requests(pm8001_ha->shost);
920 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
922 printk(KERN_ERR " PCI PM not supported\n");
925 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
926 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
927 #ifdef PM8001_USE_MSIX
928 for (i = 0; i < pm8001_ha->number_of_intr; i++)
929 synchronize_irq(pm8001_ha->msix_entries[i].vector);
930 for (i = 0; i < pm8001_ha->number_of_intr; i++)
931 free_irq(pm8001_ha->msix_entries[i].vector,
932 &pm8001_ha->outq[i]);
933 pci_disable_msix(pdev);
935 free_irq(pm8001_ha->irq, sha);
937 #ifdef PM8001_USE_TASKLET
938 tasklet_kill(&pm8001_ha->tasklet);
940 device_state = pci_choose_state(pdev, state);
941 pm8001_printk("pdev=0x%p, slot=%s, entering "
942 "operating state [D%d]\n", pdev,
943 pm8001_ha->name, device_state);
944 pci_save_state(pdev);
945 pci_disable_device(pdev);
946 pci_set_power_state(pdev, device_state);
951 * pm8001_pci_resume - power management resume main entry point
952 * @pdev: PCI device struct
954 * Returns 0 success, anything else error.
956 static int pm8001_pci_resume(struct pci_dev *pdev)
958 struct sas_ha_struct *sha = pci_get_drvdata(pdev);
959 struct pm8001_hba_info *pm8001_ha;
963 pm8001_ha = sha->lldd_ha;
964 device_state = pdev->current_state;
966 pm8001_printk("pdev=0x%p, slot=%s, resuming from previous "
967 "operating state [D%d]\n", pdev, pm8001_ha->name, device_state);
969 pci_set_power_state(pdev, PCI_D0);
970 pci_enable_wake(pdev, PCI_D0, 0);
971 pci_restore_state(pdev);
972 rc = pci_enable_device(pdev);
974 pm8001_printk("slot=%s Enable device failed during resume\n",
979 pci_set_master(pdev);
980 rc = pci_go_44(pdev);
982 goto err_out_disable;
984 /* chip soft rst only for spc */
985 if (pm8001_ha->chip_id == chip_8001) {
986 PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
987 PM8001_INIT_DBG(pm8001_ha,
988 pm8001_printk("chip soft reset successful\n"));
990 rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
992 goto err_out_disable;
994 /* disable all the interrupt bits */
995 PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
997 rc = pm8001_request_irq(pm8001_ha);
999 goto err_out_disable;
1000 #ifdef PM8001_USE_TASKLET
1001 /* default tasklet for non msi-x interrupt handler/first msi-x
1002 * interrupt handler */
1003 tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet,
1004 (unsigned long)pm8001_ha);
1006 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
1007 if (pm8001_ha->chip_id != chip_8001) {
1008 for (i = 1; i < pm8001_ha->number_of_intr; i++)
1009 PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i);
1011 scsi_unblock_requests(pm8001_ha->shost);
1015 scsi_remove_host(pm8001_ha->shost);
1016 pci_disable_device(pdev);
1021 /* update of pci device, vendor id and driver data with
1022 * unique value for each of the controller
1024 static struct pci_device_id pm8001_pci_table[] = {
1025 { PCI_VDEVICE(PMC_Sierra, 0x8001), chip_8001 },
1027 PCI_DEVICE(0x117c, 0x0042),
1028 .driver_data = chip_8001
1030 /* Support for SPC/SPCv/SPCve controllers */
1031 { PCI_VDEVICE(ADAPTEC2, 0x8001), chip_8001 },
1032 { PCI_VDEVICE(PMC_Sierra, 0x8008), chip_8008 },
1033 { PCI_VDEVICE(ADAPTEC2, 0x8008), chip_8008 },
1034 { PCI_VDEVICE(PMC_Sierra, 0x8018), chip_8018 },
1035 { PCI_VDEVICE(ADAPTEC2, 0x8018), chip_8018 },
1036 { PCI_VDEVICE(PMC_Sierra, 0x8009), chip_8009 },
1037 { PCI_VDEVICE(ADAPTEC2, 0x8009), chip_8009 },
1038 { PCI_VDEVICE(PMC_Sierra, 0x8019), chip_8019 },
1039 { PCI_VDEVICE(ADAPTEC2, 0x8019), chip_8019 },
1040 { PCI_VENDOR_ID_ADAPTEC2, 0x8081,
1041 PCI_VENDOR_ID_ADAPTEC2, 0x0400, 0, 0, chip_8001 },
1042 { PCI_VENDOR_ID_ADAPTEC2, 0x8081,
1043 PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8001 },
1044 { PCI_VENDOR_ID_ADAPTEC2, 0x8088,
1045 PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8008 },
1046 { PCI_VENDOR_ID_ADAPTEC2, 0x8088,
1047 PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8008 },
1048 { PCI_VENDOR_ID_ADAPTEC2, 0x8089,
1049 PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8009 },
1050 { PCI_VENDOR_ID_ADAPTEC2, 0x8089,
1051 PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8009 },
1052 { PCI_VENDOR_ID_ADAPTEC2, 0x8088,
1053 PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8018 },
1054 { PCI_VENDOR_ID_ADAPTEC2, 0x8088,
1055 PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8018 },
1056 { PCI_VENDOR_ID_ADAPTEC2, 0x8089,
1057 PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8019 },
1058 { PCI_VENDOR_ID_ADAPTEC2, 0x8089,
1059 PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8019 },
1060 {} /* terminate list */
1063 static struct pci_driver pm8001_pci_driver = {
1065 .id_table = pm8001_pci_table,
1066 .probe = pm8001_pci_probe,
1067 .remove = pm8001_pci_remove,
1068 .suspend = pm8001_pci_suspend,
1069 .resume = pm8001_pci_resume,
1073 * pm8001_init - initialize scsi transport template
1075 static int __init pm8001_init(void)
1079 pm8001_wq = alloc_workqueue("pm80xx", 0, 0);
1084 pm8001_stt = sas_domain_attach_transport(&pm8001_transport_ops);
1087 rc = pci_register_driver(&pm8001_pci_driver);
1093 sas_release_transport(pm8001_stt);
1095 destroy_workqueue(pm8001_wq);
1100 static void __exit pm8001_exit(void)
1102 pci_unregister_driver(&pm8001_pci_driver);
1103 sas_release_transport(pm8001_stt);
1104 destroy_workqueue(pm8001_wq);
1107 module_init(pm8001_init);
1108 module_exit(pm8001_exit);
1110 MODULE_AUTHOR("Jack Wang <jack_wang@usish.com>");
1112 "PMC-Sierra PM8001/8081/8088/8089 SAS/SATA controller driver");
1113 MODULE_VERSION(DRV_VERSION);
1114 MODULE_LICENSE("GPL");
1115 MODULE_DEVICE_TABLE(pci, pm8001_pci_table);