drivers/scsi/pm8001/pm8001_init.c

   1 /*
   2  * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
   3  *
   4  * Copyright (c) 2008-2009 USI Co., Ltd.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14  *    substantially similar to the "NO WARRANTY" disclaimer below
  15  *    ("Disclaimer") and any redistribution must be conditioned upon
  16  *    including a substantially similar Disclaimer requirement for further
  17  *    binary redistribution.
  18  * 3. Neither the names of the above-listed copyright holders nor the names
  19  *    of any contributors may be used to endorse or promote products derived
  20  *    from this software without specific prior written permission.
  21  *
  22  * Alternatively, this software may be distributed under the terms of the
  23  * GNU General Public License ("GPL") version 2 as published by the Free
  24  * Software Foundation.
  25  *
  26  * NO WARRANTY
  27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37  * POSSIBILITY OF SUCH DAMAGES.
  38  *
  39  */
  40
  41 #include <linux/slab.h>
  42 #include "pm8001_sas.h"
  43 #include "pm8001_chips.h"
  44
  45 static struct scsi_transport_template *pm8001_stt;
  46
  47 /**
  48  * chip info structure to identify chip key functionality as
  49  * encryption available/not, no of ports, hw specific function ref
  50  */
  51 static const struct pm8001_chip_info pm8001_chips[] = {
  52         [chip_8001] = {0,  8, &pm8001_8001_dispatch,},
  53 };
  54 static int pm8001_id;
  55
  56 LIST_HEAD(hba_list);
  57
  58 struct workqueue_struct *pm8001_wq;
  59
  60 /**
  61  * The main structure which LLDD must register for scsi core.
  62  */
  63 static struct scsi_host_template pm8001_sht = {
  64         .module                 = THIS_MODULE,
  65         .name                   = DRV_NAME,
  66         .queuecommand           = sas_queuecommand,
  67         .target_alloc           = sas_target_alloc,
  68         .slave_configure        = sas_slave_configure,
  69         .scan_finished          = pm8001_scan_finished,
  70         .scan_start             = pm8001_scan_start,
  71         .change_queue_depth     = sas_change_queue_depth,
  72         .change_queue_type      = sas_change_queue_type,
  73         .bios_param             = sas_bios_param,
  74         .can_queue              = 1,
  75         .cmd_per_lun            = 1,
  76         .this_id                = -1,
  77         .sg_tablesize           = SG_ALL,
  78         .max_sectors            = SCSI_DEFAULT_MAX_SECTORS,
  79         .use_clustering         = ENABLE_CLUSTERING,
  80         .eh_device_reset_handler = sas_eh_device_reset_handler,
  81         .eh_bus_reset_handler   = sas_eh_bus_reset_handler,
  82         .target_destroy         = sas_target_destroy,
  83         .ioctl                  = sas_ioctl,
  84         .shost_attrs            = pm8001_host_attrs,
  85 };
  86
  87 /**
  88  * Sas layer call this function to execute specific task.
  89  */
  90 static struct sas_domain_function_template pm8001_transport_ops = {
  91         .lldd_dev_found         = pm8001_dev_found,
  92         .lldd_dev_gone          = pm8001_dev_gone,
  93
  94         .lldd_execute_task      = pm8001_queue_command,
  95         .lldd_control_phy       = pm8001_phy_control,
  96
  97         .lldd_abort_task        = pm8001_abort_task,
  98         .lldd_abort_task_set    = pm8001_abort_task_set,
  99         .lldd_clear_aca         = pm8001_clear_aca,
 100         .lldd_clear_task_set    = pm8001_clear_task_set,
 101         .lldd_I_T_nexus_reset   = pm8001_I_T_nexus_reset,
 102         .lldd_lu_reset          = pm8001_lu_reset,
 103         .lldd_query_task        = pm8001_query_task,
 104 };
 105
 106 /**
 107  *pm8001_phy_init - initiate our adapter phys
 108  *@pm8001_ha: our hba structure.
 109  *@phy_id: phy id.
 110  */
 111 static void pm8001_phy_init(struct pm8001_hba_info *pm8001_ha, int phy_id)
 112 {
 113         struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
 114         struct asd_sas_phy *sas_phy = &phy->sas_phy;
 115         phy->phy_state = 0;
 116         phy->pm8001_ha = pm8001_ha;
 117         sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0;
 118         sas_phy->class = SAS;
 119         sas_phy->iproto = SAS_PROTOCOL_ALL;
 120         sas_phy->tproto = 0;
 121         sas_phy->type = PHY_TYPE_PHYSICAL;
 122         sas_phy->role = PHY_ROLE_INITIATOR;
 123         sas_phy->oob_mode = OOB_NOT_CONNECTED;
 124         sas_phy->linkrate = SAS_LINK_RATE_UNKNOWN;
 125         sas_phy->id = phy_id;
 126         sas_phy->sas_addr = &pm8001_ha->sas_addr[0];
 127         sas_phy->frame_rcvd = &phy->frame_rcvd[0];
 128         sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata;
 129         sas_phy->lldd_phy = phy;
 130 }
 131
 132 /**
 133  *pm8001_free - free hba
 134  *@pm8001_ha:   our hba structure.
 135  *
 136  */
 137 static void pm8001_free(struct pm8001_hba_info *pm8001_ha)
 138 {
 139         int i;
 140
 141         if (!pm8001_ha)
 142                 return;
 143
 144         for (i = 0; i < USI_MAX_MEMCNT; i++) {
 145                 if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) {
 146                         pci_free_consistent(pm8001_ha->pdev,
 147                                 (pm8001_ha->memoryMap.region[i].total_len +
 148                                 pm8001_ha->memoryMap.region[i].alignment),
 149                                 pm8001_ha->memoryMap.region[i].virt_ptr,
 150                                 pm8001_ha->memoryMap.region[i].phys_addr);
 151                         }
 152         }
 153         PM8001_CHIP_DISP->chip_iounmap(pm8001_ha);
 154         if (pm8001_ha->shost)
 155                 scsi_host_put(pm8001_ha->shost);
 156         flush_workqueue(pm8001_wq);
 157         kfree(pm8001_ha->tags);
 158         kfree(pm8001_ha);
 159 }
 160
 161 #ifdef PM8001_USE_TASKLET
 162
 163 /**
 164  * tasklet for 64 msi-x interrupt handler
 165  * @opaque: the passed general host adapter struct
 166  * Note: pm8001_tasklet is common for pm8001 & pm80xx
 167  */
 168 static void pm8001_tasklet(unsigned long opaque)
 169 {
 170         struct pm8001_hba_info *pm8001_ha;
 171         u32 vec;
 172         pm8001_ha = (struct pm8001_hba_info *)opaque;
 173         if (unlikely(!pm8001_ha))
 174                 BUG_ON(1);
 175         vec = pm8001_ha->int_vector;
 176         PM8001_CHIP_DISP->isr(pm8001_ha, vec);
 177 }
 178 #endif
 179
 180 static struct  pm8001_hba_info *outq_to_hba(u8 *outq)
 181 {
 182         return container_of((outq - *outq), struct pm8001_hba_info, outq[0]);
 183 }
 184
 185 /**
 186  * pm8001_interrupt_handler_msix - main MSIX interrupt handler.
 187  * It obtains the vector number and calls the equivalent bottom
 188  * half or services directly.
 189  * @opaque: the passed outbound queue/vector. Host structure is
 190  * retrieved from the same.
 191  */
 192 static irqreturn_t pm8001_interrupt_handler_msix(int irq, void *opaque)
 193 {
 194         struct pm8001_hba_info *pm8001_ha = outq_to_hba(opaque);
 195         u8 outq = *(u8 *)opaque;
 196         irqreturn_t ret = IRQ_HANDLED;
 197         if (unlikely(!pm8001_ha))
 198                 return IRQ_NONE;
 199         if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
 200                 return IRQ_NONE;
 201         pm8001_ha->int_vector = outq;
 202 #ifdef PM8001_USE_TASKLET
 203         tasklet_schedule(&pm8001_ha->tasklet);
 204 #else
 205         ret = PM8001_CHIP_DISP->isr(pm8001_ha, outq);
 206 #endif
 207         return ret;
 208 }
 209
 210 /**
 211  * pm8001_interrupt_handler_intx - main INTx interrupt handler.
 212  * @dev_id: sas_ha structure. The HBA is retrieved from sas_has structure.
 213  */
 214
 215 static irqreturn_t pm8001_interrupt_handler_intx(int irq, void *dev_id)
 216 {
 217         struct pm8001_hba_info *pm8001_ha;
 218         irqreturn_t ret = IRQ_HANDLED;
 219         struct sas_ha_struct *sha = dev_id;
 220         pm8001_ha = sha->lldd_ha;
 221         if (unlikely(!pm8001_ha))
 222                 return IRQ_NONE;
 223         if (!PM8001_CHIP_DISP->is_our_interupt(pm8001_ha))
 224                 return IRQ_NONE;
 225
 226         pm8001_ha->int_vector = 0;
 227 #ifdef PM8001_USE_TASKLET
 228         tasklet_schedule(&pm8001_ha->tasklet);
 229 #else
 230         ret = PM8001_CHIP_DISP->isr(pm8001_ha, 0);
 231 #endif
 232         return ret;
 233 }
 234
 235 /**
 236  * pm8001_alloc - initiate our hba structure and 6 DMAs area.
 237  * @pm8001_ha:our hba structure.
 238  *
 239  */
 240 static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
 241                         const struct pci_device_id *ent)
 242 {
 243         int i;
 244         spin_lock_init(&pm8001_ha->lock);
 245         PM8001_INIT_DBG(pm8001_ha,
 246                 pm8001_printk("pm8001_alloc: PHY:%x\n",
 247                                 pm8001_ha->chip->n_phy));
 248         for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
 249                 pm8001_phy_init(pm8001_ha, i);
 250                 pm8001_ha->port[i].wide_port_phymap = 0;
 251                 pm8001_ha->port[i].port_attached = 0;
 252                 pm8001_ha->port[i].port_state = 0;
 253                 INIT_LIST_HEAD(&pm8001_ha->port[i].list);
 254         }
 255
 256         pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL);
 257         if (!pm8001_ha->tags)
 258                 goto err_out;
 259         /* MPI Memory region 1 for AAP Event Log for fw */
 260         pm8001_ha->memoryMap.region[AAP1].num_elements = 1;
 261         pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE;
 262         pm8001_ha->memoryMap.region[AAP1].total_len = PM8001_EVENT_LOG_SIZE;
 263         pm8001_ha->memoryMap.region[AAP1].alignment = 32;
 264
 265         /* MPI Memory region 2 for IOP Event Log for fw */
 266         pm8001_ha->memoryMap.region[IOP].num_elements = 1;
 267         pm8001_ha->memoryMap.region[IOP].element_size = PM8001_EVENT_LOG_SIZE;
 268         pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE;
 269         pm8001_ha->memoryMap.region[IOP].alignment = 32;
 270
 271         for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) {
 272                 /* MPI Memory region 3 for consumer Index of inbound queues */
 273                 pm8001_ha->memoryMap.region[CI+i].num_elements = 1;
 274                 pm8001_ha->memoryMap.region[CI+i].element_size = 4;
 275                 pm8001_ha->memoryMap.region[CI+i].total_len = 4;
 276                 pm8001_ha->memoryMap.region[CI+i].alignment = 4;
 277
 278                 if ((ent->driver_data) != chip_8001) {
 279                         /* MPI Memory region 5 inbound queues */
 280                         pm8001_ha->memoryMap.region[IB+i].num_elements =
 281                                                 PM8001_MPI_QUEUE;
 282                         pm8001_ha->memoryMap.region[IB+i].element_size = 128;
 283                         pm8001_ha->memoryMap.region[IB+i].total_len =
 284                                                 PM8001_MPI_QUEUE * 128;
 285                         pm8001_ha->memoryMap.region[IB+i].alignment = 128;
 286                 } else {
 287                         pm8001_ha->memoryMap.region[IB+i].num_elements =
 288                                                 PM8001_MPI_QUEUE;
 289                         pm8001_ha->memoryMap.region[IB+i].element_size = 64;
 290                         pm8001_ha->memoryMap.region[IB+i].total_len =
 291                                                 PM8001_MPI_QUEUE * 64;
 292                         pm8001_ha->memoryMap.region[IB+i].alignment = 64;
 293                 }
 294         }
 295
 296         for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) {
 297                 /* MPI Memory region 4 for producer Index of outbound queues */
 298                 pm8001_ha->memoryMap.region[PI+i].num_elements = 1;
 299                 pm8001_ha->memoryMap.region[PI+i].element_size = 4;
 300                 pm8001_ha->memoryMap.region[PI+i].total_len = 4;
 301                 pm8001_ha->memoryMap.region[PI+i].alignment = 4;
 302
 303                 if (ent->driver_data != chip_8001) {
 304                         /* MPI Memory region 6 Outbound queues */
 305                         pm8001_ha->memoryMap.region[OB+i].num_elements =
 306                                                 PM8001_MPI_QUEUE;
 307                         pm8001_ha->memoryMap.region[OB+i].element_size = 128;
 308                         pm8001_ha->memoryMap.region[OB+i].total_len =
 309                                                 PM8001_MPI_QUEUE * 128;
 310                         pm8001_ha->memoryMap.region[OB+i].alignment = 128;
 311                 } else {
 312                         /* MPI Memory region 6 Outbound queues */
 313                         pm8001_ha->memoryMap.region[OB+i].num_elements =
 314                                                 PM8001_MPI_QUEUE;
 315                         pm8001_ha->memoryMap.region[OB+i].element_size = 64;
 316                         pm8001_ha->memoryMap.region[OB+i].total_len =
 317                                                 PM8001_MPI_QUEUE * 64;
 318                         pm8001_ha->memoryMap.region[OB+i].alignment = 64;
 319                 }
 320
 321         }
 322         /* Memory region write DMA*/
 323         pm8001_ha->memoryMap.region[NVMD].num_elements = 1;
 324         pm8001_ha->memoryMap.region[NVMD].element_size = 4096;
 325         pm8001_ha->memoryMap.region[NVMD].total_len = 4096;
 326         /* Memory region for devices*/
 327         pm8001_ha->memoryMap.region[DEV_MEM].num_elements = 1;
 328         pm8001_ha->memoryMap.region[DEV_MEM].element_size = PM8001_MAX_DEVICES *
 329                 sizeof(struct pm8001_device);
 330         pm8001_ha->memoryMap.region[DEV_MEM].total_len = PM8001_MAX_DEVICES *
 331                 sizeof(struct pm8001_device);
 332
 333         /* Memory region for ccb_info*/
 334         pm8001_ha->memoryMap.region[CCB_MEM].num_elements = 1;
 335         pm8001_ha->memoryMap.region[CCB_MEM].element_size = PM8001_MAX_CCB *
 336                 sizeof(struct pm8001_ccb_info);
 337         pm8001_ha->memoryMap.region[CCB_MEM].total_len = PM8001_MAX_CCB *
 338                 sizeof(struct pm8001_ccb_info);
 339
 340         for (i = 0; i < USI_MAX_MEMCNT; i++) {
 341                 if (pm8001_mem_alloc(pm8001_ha->pdev,
 342                         &pm8001_ha->memoryMap.region[i].virt_ptr,
 343                         &pm8001_ha->memoryMap.region[i].phys_addr,
 344                         &pm8001_ha->memoryMap.region[i].phys_addr_hi,
 345                         &pm8001_ha->memoryMap.region[i].phys_addr_lo,
 346                         pm8001_ha->memoryMap.region[i].total_len,
 347                         pm8001_ha->memoryMap.region[i].alignment) != 0) {
 348                                 PM8001_FAIL_DBG(pm8001_ha,
 349                                         pm8001_printk("Mem%d alloc failed\n",
 350                                         i));
 351                                 goto err_out;
 352                 }
 353         }
 354
 355         pm8001_ha->devices = pm8001_ha->memoryMap.region[DEV_MEM].virt_ptr;
 356         for (i = 0; i < PM8001_MAX_DEVICES; i++) {
 357                 pm8001_ha->devices[i].dev_type = NO_DEVICE;
 358                 pm8001_ha->devices[i].id = i;
 359                 pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES;
 360                 pm8001_ha->devices[i].running_req = 0;
 361         }
 362         pm8001_ha->ccb_info = pm8001_ha->memoryMap.region[CCB_MEM].virt_ptr;
 363         for (i = 0; i < PM8001_MAX_CCB; i++) {
 364                 pm8001_ha->ccb_info[i].ccb_dma_handle =
 365                         pm8001_ha->memoryMap.region[CCB_MEM].phys_addr +
 366                         i * sizeof(struct pm8001_ccb_info);
 367                 pm8001_ha->ccb_info[i].task = NULL;
 368                 pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff;
 369                 pm8001_ha->ccb_info[i].device = NULL;
 370                 ++pm8001_ha->tags_num;
 371         }
 372         pm8001_ha->flags = PM8001F_INIT_TIME;
 373         /* Initialize tags */
 374         pm8001_tag_init(pm8001_ha);
 375         return 0;
 376 err_out:
 377         return 1;
 378 }
 379
 380 /**
 381  * pm8001_ioremap - remap the pci high physical address to kernal virtual
 382  * address so that we can access them.
 383  * @pm8001_ha:our hba structure.
 384  */
 385 static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha)
 386 {
 387         u32 bar;
 388         u32 logicalBar = 0;
 389         struct pci_dev *pdev;
 390
 391         pdev = pm8001_ha->pdev;
 392         /* map pci mem (PMC pci base 0-3)*/
 393         for (bar = 0; bar < 6; bar++) {
 394                 /*
 395                 ** logical BARs for SPC:
 396                 ** bar 0 and 1 - logical BAR0
 397                 ** bar 2 and 3 - logical BAR1
 398                 ** bar4 - logical BAR2
 399                 ** bar5 - logical BAR3
 400                 ** Skip the appropriate assignments:
 401                 */
 402                 if ((bar == 1) || (bar == 3))
 403                         continue;
 404                 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
 405                         pm8001_ha->io_mem[logicalBar].membase =
 406                                 pci_resource_start(pdev, bar);
 407                         pm8001_ha->io_mem[logicalBar].membase &=
 408                                 (u32)PCI_BASE_ADDRESS_MEM_MASK;
 409                         pm8001_ha->io_mem[logicalBar].memsize =
 410                                 pci_resource_len(pdev, bar);
 411                         pm8001_ha->io_mem[logicalBar].memvirtaddr =
 412                                 ioremap(pm8001_ha->io_mem[logicalBar].membase,
 413                                 pm8001_ha->io_mem[logicalBar].memsize);
 414                         PM8001_INIT_DBG(pm8001_ha,
 415                                 pm8001_printk("PCI: bar %d, logicalBar %d ",
 416                                 bar, logicalBar));
 417                         PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
 418                                 "base addr %llx virt_addr=%llx len=%d\n",
 419                                 (u64)pm8001_ha->io_mem[logicalBar].membase,
 420                                 (u64)pm8001_ha->io_mem[logicalBar].memvirtaddr,
 421                                 pm8001_ha->io_mem[logicalBar].memsize));
 422                 } else {
 423                         pm8001_ha->io_mem[logicalBar].membase   = 0;
 424                         pm8001_ha->io_mem[logicalBar].memsize   = 0;
 425                         pm8001_ha->io_mem[logicalBar].memvirtaddr = 0;
 426                 }
 427                 logicalBar++;
 428         }
 429         return 0;
 430 }
 431
 432 /**
 433  * pm8001_pci_alloc - initialize our ha card structure
 434  * @pdev: pci device.
 435  * @ent: ent
 436  * @shost: scsi host struct which has been initialized before.
 437  */
 438 static struct pm8001_hba_info *pm8001_pci_alloc(struct pci_dev *pdev,
 439                                  const struct pci_device_id *ent,
 440                                 struct Scsi_Host *shost)
 441
 442 {
 443         struct pm8001_hba_info *pm8001_ha;
 444         struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
 445
 446
 447         pm8001_ha = sha->lldd_ha;
 448         if (!pm8001_ha)
 449                 return NULL;
 450
 451         pm8001_ha->pdev = pdev;
 452         pm8001_ha->dev = &pdev->dev;
 453         pm8001_ha->chip_id = ent->driver_data;
 454         pm8001_ha->chip = &pm8001_chips[pm8001_ha->chip_id];
 455         pm8001_ha->irq = pdev->irq;
 456         pm8001_ha->sas = sha;
 457         pm8001_ha->shost = shost;
 458         pm8001_ha->id = pm8001_id++;
 459         pm8001_ha->logging_level = 0x01;
 460         sprintf(pm8001_ha->name, "%s%d", DRV_NAME, pm8001_ha->id);
 461         /* IOMB size is 128 for 8088/89 controllers */
 462         if (pm8001_ha->chip_id != chip_8001)
 463                 pm8001_ha->iomb_size = IOMB_SIZE_SPCV;
 464         else
 465                 pm8001_ha->iomb_size = IOMB_SIZE_SPC;
 466
 467 #ifdef PM8001_USE_TASKLET
 468         /**
 469         * default tasklet for non msi-x interrupt handler/first msi-x
 470         * interrupt handler
 471         **/
 472         tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet,
 473                         (unsigned long)pm8001_ha);
 474 #endif
 475         pm8001_ioremap(pm8001_ha);
 476         if (!pm8001_alloc(pm8001_ha, ent))
 477                 return pm8001_ha;
 478         pm8001_free(pm8001_ha);
 479         return NULL;
 480 }
 481
 482 /**
 483  * pci_go_44 - pm8001 specified, its DMA is 44 bit rather than 64 bit
 484  * @pdev: pci device.
 485  */
 486 static int pci_go_44(struct pci_dev *pdev)
 487 {
 488         int rc;
 489
 490         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(44))) {
 491                 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(44));
 492                 if (rc) {
 493                         rc = pci_set_consistent_dma_mask(pdev,
 494                                 DMA_BIT_MASK(32));
 495                         if (rc) {
 496                                 dev_printk(KERN_ERR, &pdev->dev,
 497                                         "44-bit DMA enable failed\n");
 498                                 return rc;
 499                         }
 500                 }
 501         } else {
 502                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 503                 if (rc) {
 504                         dev_printk(KERN_ERR, &pdev->dev,
 505                                 "32-bit DMA enable failed\n");
 506                         return rc;
 507                 }
 508                 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
 509                 if (rc) {
 510                         dev_printk(KERN_ERR, &pdev->dev,
 511                                 "32-bit consistent DMA enable failed\n");
 512                         return rc;
 513                 }
 514         }
 515         return rc;
 516 }
 517
 518 /**
 519  * pm8001_prep_sas_ha_init - allocate memory in general hba struct && init them.
 520  * @shost: scsi host which has been allocated outside.
 521  * @chip_info: our ha struct.
 522  */
 523 static int pm8001_prep_sas_ha_init(struct Scsi_Host *shost,
 524                                    const struct pm8001_chip_info *chip_info)
 525 {
 526         int phy_nr, port_nr;
 527         struct asd_sas_phy **arr_phy;
 528         struct asd_sas_port **arr_port;
 529         struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
 530
 531         phy_nr = chip_info->n_phy;
 532         port_nr = phy_nr;
 533         memset(sha, 0x00, sizeof(*sha));
 534         arr_phy = kcalloc(phy_nr, sizeof(void *), GFP_KERNEL);
 535         if (!arr_phy)
 536                 goto exit;
 537         arr_port = kcalloc(port_nr, sizeof(void *), GFP_KERNEL);
 538         if (!arr_port)
 539                 goto exit_free2;
 540
 541         sha->sas_phy = arr_phy;
 542         sha->sas_port = arr_port;
 543         sha->lldd_ha = kzalloc(sizeof(struct pm8001_hba_info), GFP_KERNEL);
 544         if (!sha->lldd_ha)
 545                 goto exit_free1;
 546
 547         shost->transportt = pm8001_stt;
 548         shost->max_id = PM8001_MAX_DEVICES;
 549         shost->max_lun = 8;
 550         shost->max_channel = 0;
 551         shost->unique_id = pm8001_id;
 552         shost->max_cmd_len = 16;
 553         shost->can_queue = PM8001_CAN_QUEUE;
 554         shost->cmd_per_lun = 32;
 555         return 0;
 556 exit_free1:
 557         kfree(arr_port);
 558 exit_free2:
 559         kfree(arr_phy);
 560 exit:
 561         return -1;
 562 }
 563
 564 /**
 565  * pm8001_post_sas_ha_init - initialize general hba struct defined in libsas
 566  * @shost: scsi host which has been allocated outside
 567  * @chip_info: our ha struct.
 568  */
 569 static void  pm8001_post_sas_ha_init(struct Scsi_Host *shost,
 570                                      const struct pm8001_chip_info *chip_info)
 571 {
 572         int i = 0;
 573         struct pm8001_hba_info *pm8001_ha;
 574         struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
 575
 576         pm8001_ha = sha->lldd_ha;
 577         for (i = 0; i < chip_info->n_phy; i++) {
 578                 sha->sas_phy[i] = &pm8001_ha->phy[i].sas_phy;
 579                 sha->sas_port[i] = &pm8001_ha->port[i].sas_port;
 580         }
 581         sha->sas_ha_name = DRV_NAME;
 582         sha->dev = pm8001_ha->dev;
 583
 584         sha->lldd_module = THIS_MODULE;
 585         sha->sas_addr = &pm8001_ha->sas_addr[0];
 586         sha->num_phys = chip_info->n_phy;
 587         sha->lldd_max_execute_num = 1;
 588         sha->lldd_queue_size = PM8001_CAN_QUEUE;
 589         sha->core.shost = shost;
 590 }
 591
 592 /**
 593  * pm8001_init_sas_add - initialize sas address
 594  * @chip_info: our ha struct.
 595  *
 596  * Currently we just set the fixed SAS address to our HBA,for manufacture,
 597  * it should read from the EEPROM
 598  */
 599 static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
 600 {
 601         u8 i;
 602 #ifdef PM8001_READ_VPD
 603         DECLARE_COMPLETION_ONSTACK(completion);
 604         struct pm8001_ioctl_payload payload;
 605         pm8001_ha->nvmd_completion = &completion;
 606         payload.minor_function = 0;
 607         payload.length = 128;
 608         payload.func_specific = kzalloc(128, GFP_KERNEL);
 609         PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
 610         wait_for_completion(&completion);
 611         for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
 612                 memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr,
 613                         SAS_ADDR_SIZE);
 614                 PM8001_INIT_DBG(pm8001_ha,
 615                         pm8001_printk("phy %d sas_addr = %016llx \n", i,
 616                         pm8001_ha->phy[i].dev_sas_addr));
 617         }
 618 #else
 619         for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
 620                 pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
 621                 pm8001_ha->phy[i].dev_sas_addr =
 622                         cpu_to_be64((u64)
 623                                 (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
 624         }
 625         memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
 626                 SAS_ADDR_SIZE);
 627 #endif
 628 }
 629
 630 #ifdef PM8001_USE_MSIX
 631 /**
 632  * pm8001_setup_msix - enable MSI-X interrupt
 633  * @chip_info: our ha struct.
 634  * @irq_handler: irq_handler
 635  */
 636 static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha)
 637 {
 638         u32 i = 0, j = 0;
 639         u32 number_of_intr;
 640         int flag = 0;
 641         u32 max_entry;
 642         int rc;
 643         static char intr_drvname[PM8001_MAX_MSIX_VEC][sizeof(DRV_NAME)+3];
 644
 645         /* SPCv controllers supports 64 msi-x */
 646         if (pm8001_ha->chip_id == chip_8001) {
 647                 number_of_intr = 1;
 648                 flag |= IRQF_DISABLED;
 649         } else {
 650                 number_of_intr = PM8001_MAX_MSIX_VEC;
 651                 flag &= ~IRQF_SHARED;
 652                 flag |= IRQF_DISABLED;
 653         }
 654
 655         max_entry = sizeof(pm8001_ha->msix_entries) /
 656                 sizeof(pm8001_ha->msix_entries[0]);
 657         for (i = 0; i < max_entry ; i++)
 658                 pm8001_ha->msix_entries[i].entry = i;
 659         rc = pci_enable_msix(pm8001_ha->pdev, pm8001_ha->msix_entries,
 660                 number_of_intr);
 661         pm8001_ha->number_of_intr = number_of_intr;
 662         if (!rc) {
 663                 PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
 664                         "pci_enable_msix request ret:%d no of intr %d\n",
 665                                         rc, pm8001_ha->number_of_intr));
 666
 667                 for (i = 0; i < number_of_intr; i++)
 668                         pm8001_ha->outq[i] = i;
 669
 670                 for (i = 0; i < number_of_intr; i++) {
 671                         snprintf(intr_drvname[i], sizeof(intr_drvname[0]),
 672                                         DRV_NAME"%d", i);
 673                         if (request_irq(pm8001_ha->msix_entries[i].vector,
 674                                 pm8001_interrupt_handler_msix, flag,
 675                                 intr_drvname[i], &pm8001_ha->outq[i])) {
 676                                 for (j = 0; j < i; j++)
 677                                         free_irq(
 678                                         pm8001_ha->msix_entries[j].vector,
 679                                         &pm8001_ha->outq[j]);
 680                                 pci_disable_msix(pm8001_ha->pdev);
 681                                 break;
 682                         }
 683                 }
 684         }
 685         return rc;
 686 }
 687 #endif
 688
 689 /**
 690  * pm8001_request_irq - register interrupt
 691  * @chip_info: our ha struct.
 692  */
 693 static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
 694 {
 695         struct pci_dev *pdev;
 696         int rc;
 697
 698         pdev = pm8001_ha->pdev;
 699
 700 #ifdef PM8001_USE_MSIX
 701         if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
 702                 return pm8001_setup_msix(pm8001_ha);
 703         else {
 704                 PM8001_INIT_DBG(pm8001_ha,
 705                         pm8001_printk("MSIX not supported!!!\n"));
 706                 goto intx;
 707         }
 708 #endif
 709
 710 intx:
 711         /* initialize the INT-X interrupt */
 712         rc = request_irq(pdev->irq, pm8001_interrupt_handler_intx, IRQF_SHARED,
 713                 DRV_NAME, SHOST_TO_SAS_HA(pm8001_ha->shost));
 714         return rc;
 715 }
 716
 717 /**
 718  * pm8001_pci_probe - probe supported device
 719  * @pdev: pci device which kernel has been prepared for.
 720  * @ent: pci device id
 721  *
 722  * This function is the main initialization function, when register a new
 723  * pci driver it is invoked, all struct an hardware initilization should be done
 724  * here, also, register interrupt
 725  */
 726 static int pm8001_pci_probe(struct pci_dev *pdev,
 727                             const struct pci_device_id *ent)
 728 {
 729         unsigned int rc;
 730         u32     pci_reg;
 731         u8      i = 0;
 732         struct pm8001_hba_info *pm8001_ha;
 733         struct Scsi_Host *shost = NULL;
 734         const struct pm8001_chip_info *chip;
 735
 736         dev_printk(KERN_INFO, &pdev->dev,
 737                 "pm8001: driver version %s\n", DRV_VERSION);
 738         rc = pci_enable_device(pdev);
 739         if (rc)
 740                 goto err_out_enable;
 741         pci_set_master(pdev);
 742         /*
 743          * Enable pci slot busmaster by setting pci command register.
 744          * This is required by FW for Cyclone card.
 745          */
 746
 747         pci_read_config_dword(pdev, PCI_COMMAND, &pci_reg);
 748         pci_reg |= 0x157;
 749         pci_write_config_dword(pdev, PCI_COMMAND, pci_reg);
 750         rc = pci_request_regions(pdev, DRV_NAME);
 751         if (rc)
 752                 goto err_out_disable;
 753         rc = pci_go_44(pdev);
 754         if (rc)
 755                 goto err_out_regions;
 756
 757         shost = scsi_host_alloc(&pm8001_sht, sizeof(void *));
 758         if (!shost) {
 759                 rc = -ENOMEM;
 760                 goto err_out_regions;
 761         }
 762         chip = &pm8001_chips[ent->driver_data];
 763         SHOST_TO_SAS_HA(shost) =
 764                 kzalloc(sizeof(struct sas_ha_struct), GFP_KERNEL);
 765         if (!SHOST_TO_SAS_HA(shost)) {
 766                 rc = -ENOMEM;
 767                 goto err_out_free_host;
 768         }
 769
 770         rc = pm8001_prep_sas_ha_init(shost, chip);
 771         if (rc) {
 772                 rc = -ENOMEM;
 773                 goto err_out_free;
 774         }
 775         pci_set_drvdata(pdev, SHOST_TO_SAS_HA(shost));
 776         /* ent->driver variable is used to differentiate between controllers */
 777         pm8001_ha = pm8001_pci_alloc(pdev, ent, shost);
 778         if (!pm8001_ha) {
 779                 rc = -ENOMEM;
 780                 goto err_out_free;
 781         }
 782         list_add_tail(&pm8001_ha->list, &hba_list);
 783         PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
 784         rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
 785         if (rc)
 786                 goto err_out_ha_free;
 787
 788         rc = scsi_add_host(shost, &pdev->dev);
 789         if (rc)
 790                 goto err_out_ha_free;
 791         rc = pm8001_request_irq(pm8001_ha);
 792         if (rc)
 793                 goto err_out_shost;
 794
 795         PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
 796         if (pm8001_ha->chip_id != chip_8001) {
 797                 for (i = 1; i < pm8001_ha->number_of_intr; i++)
 798                         PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i);
 799         }
 800
 801         pm8001_init_sas_add(pm8001_ha);
 802         pm8001_post_sas_ha_init(shost, chip);
 803         rc = sas_register_ha(SHOST_TO_SAS_HA(shost));
 804         if (rc)
 805                 goto err_out_shost;
 806         scsi_scan_host(pm8001_ha->shost);
 807         return 0;
 808
 809 err_out_shost:
 810         scsi_remove_host(pm8001_ha->shost);
 811 err_out_ha_free:
 812         pm8001_free(pm8001_ha);
 813 err_out_free:
 814         kfree(SHOST_TO_SAS_HA(shost));
 815 err_out_free_host:
 816         kfree(shost);
 817 err_out_regions:
 818         pci_release_regions(pdev);
 819 err_out_disable:
 820         pci_disable_device(pdev);
 821 err_out_enable:
 822         return rc;
 823 }
 824
 825 static void pm8001_pci_remove(struct pci_dev *pdev)
 826 {
 827         struct sas_ha_struct *sha = pci_get_drvdata(pdev);
 828         struct pm8001_hba_info *pm8001_ha;
 829         int i;
 830         pm8001_ha = sha->lldd_ha;
 831         pci_set_drvdata(pdev, NULL);
 832         sas_unregister_ha(sha);
 833         sas_remove_host(pm8001_ha->shost);
 834         list_del(&pm8001_ha->list);
 835         scsi_remove_host(pm8001_ha->shost);
 836         PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
 837         PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
 838
 839 #ifdef PM8001_USE_MSIX
 840         for (i = 0; i < pm8001_ha->number_of_intr; i++)
 841                 synchronize_irq(pm8001_ha->msix_entries[i].vector);
 842         for (i = 0; i < pm8001_ha->number_of_intr; i++)
 843                 free_irq(pm8001_ha->msix_entries[i].vector,
 844                                 &pm8001_ha->outq[i]);
 845         pci_disable_msix(pdev);
 846 #else
 847         free_irq(pm8001_ha->irq, sha);
 848 #endif
 849 #ifdef PM8001_USE_TASKLET
 850         tasklet_kill(&pm8001_ha->tasklet);
 851 #endif
 852         pm8001_free(pm8001_ha);
 853         kfree(sha->sas_phy);
 854         kfree(sha->sas_port);
 855         kfree(sha);
 856         pci_release_regions(pdev);
 857         pci_disable_device(pdev);
 858 }
 859
 860 /**
 861  * pm8001_pci_suspend - power management suspend main entry point
 862  * @pdev: PCI device struct
 863  * @state: PM state change to (usually PCI_D3)
 864  *
 865  * Returns 0 success, anything else error.
 866  */
 867 static int pm8001_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 868 {
 869         struct sas_ha_struct *sha = pci_get_drvdata(pdev);
 870         struct pm8001_hba_info *pm8001_ha;
 871         int i , pos;
 872         u32 device_state;
 873         pm8001_ha = sha->lldd_ha;
 874         flush_workqueue(pm8001_wq);
 875         scsi_block_requests(pm8001_ha->shost);
 876         pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
 877         if (pos == 0) {
 878                 printk(KERN_ERR " PCI PM not supported\n");
 879                 return -ENODEV;
 880         }
 881         PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
 882         PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
 883 #ifdef PM8001_USE_MSIX
 884         for (i = 0; i < pm8001_ha->number_of_intr; i++)
 885                 synchronize_irq(pm8001_ha->msix_entries[i].vector);
 886         for (i = 0; i < pm8001_ha->number_of_intr; i++)
 887                 free_irq(pm8001_ha->msix_entries[i].vector,
 888                                 &pm8001_ha->outq[i]);
 889         pci_disable_msix(pdev);
 890 #else
 891         free_irq(pm8001_ha->irq, sha);
 892 #endif
 893 #ifdef PM8001_USE_TASKLET
 894         tasklet_kill(&pm8001_ha->tasklet);
 895 #endif
 896         device_state = pci_choose_state(pdev, state);
 897         pm8001_printk("pdev=0x%p, slot=%s, entering "
 898                       "operating state [D%d]\n", pdev,
 899                       pm8001_ha->name, device_state);
 900         pci_save_state(pdev);
 901         pci_disable_device(pdev);
 902         pci_set_power_state(pdev, device_state);
 903         return 0;
 904 }
 905
 906 /**
 907  * pm8001_pci_resume - power management resume main entry point
 908  * @pdev: PCI device struct
 909  *
 910  * Returns 0 success, anything else error.
 911  */
 912 static int pm8001_pci_resume(struct pci_dev *pdev)
 913 {
 914         struct sas_ha_struct *sha = pci_get_drvdata(pdev);
 915         struct pm8001_hba_info *pm8001_ha;
 916         int rc;
 917         u8 i = 0;
 918         u32 device_state;
 919         pm8001_ha = sha->lldd_ha;
 920         device_state = pdev->current_state;
 921
 922         pm8001_printk("pdev=0x%p, slot=%s, resuming from previous "
 923                 "operating state [D%d]\n", pdev, pm8001_ha->name, device_state);
 924
 925         pci_set_power_state(pdev, PCI_D0);
 926         pci_enable_wake(pdev, PCI_D0, 0);
 927         pci_restore_state(pdev);
 928         rc = pci_enable_device(pdev);
 929         if (rc) {
 930                 pm8001_printk("slot=%s Enable device failed during resume\n",
 931                               pm8001_ha->name);
 932                 goto err_out_enable;
 933         }
 934
 935         pci_set_master(pdev);
 936         rc = pci_go_44(pdev);
 937         if (rc)
 938                 goto err_out_disable;
 939
 940         PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha, 0x252acbcd);
 941         rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
 942         if (rc)
 943                 goto err_out_disable;
 944
 945         /* disable all the interrupt bits */
 946         PM8001_CHIP_DISP->interrupt_disable(pm8001_ha, 0xFF);
 947
 948         rc = pm8001_request_irq(pm8001_ha);
 949         if (rc)
 950                 goto err_out_disable;
 951 #ifdef PM8001_USE_TASKLET
 952         /* default tasklet for non msi-x interrupt handler/first msi-x
 953         * interrupt handler */
 954         tasklet_init(&pm8001_ha->tasklet, pm8001_tasklet,
 955                         (unsigned long)pm8001_ha);
 956 #endif
 957         PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
 958         if (pm8001_ha->chip_id != chip_8001) {
 959                 for (i = 1; i < pm8001_ha->number_of_intr; i++)
 960                         PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, i);
 961         }
 962         scsi_unblock_requests(pm8001_ha->shost);
 963         return 0;
 964
 965 err_out_disable:
 966         scsi_remove_host(pm8001_ha->shost);
 967         pci_disable_device(pdev);
 968 err_out_enable:
 969         return rc;
 970 }
 971
 972 /* update of pci device, vendor id and driver data with
 973  * unique value for each of the controller
 974  */
 975 static struct pci_device_id pm8001_pci_table[] = {
 976         { PCI_VDEVICE(PMC_Sierra, 0x8001), chip_8001 },
 977         {
 978                 PCI_DEVICE(0x117c, 0x0042),
 979                 .driver_data = chip_8001
 980         },
 981         /* Support for SPC/SPCv/SPCve controllers */
 982         { PCI_VDEVICE(ADAPTEC2, 0x8001), chip_8001 },
 983         { PCI_VDEVICE(PMC_Sierra, 0x8008), chip_8008 },
 984         { PCI_VDEVICE(ADAPTEC2, 0x8008), chip_8008 },
 985         { PCI_VDEVICE(PMC_Sierra, 0x8018), chip_8018 },
 986         { PCI_VDEVICE(ADAPTEC2, 0x8018), chip_8018 },
 987         { PCI_VDEVICE(PMC_Sierra, 0x8009), chip_8009 },
 988         { PCI_VDEVICE(ADAPTEC2, 0x8009), chip_8009 },
 989         { PCI_VDEVICE(PMC_Sierra, 0x8019), chip_8019 },
 990         { PCI_VDEVICE(ADAPTEC2, 0x8019), chip_8019 },
 991         { PCI_VENDOR_ID_ADAPTEC2, 0x8081,
 992                 PCI_VENDOR_ID_ADAPTEC2, 0x0400, 0, 0, chip_8001 },
 993         { PCI_VENDOR_ID_ADAPTEC2, 0x8081,
 994                 PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8001 },
 995         { PCI_VENDOR_ID_ADAPTEC2, 0x8088,
 996                 PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8008 },
 997         { PCI_VENDOR_ID_ADAPTEC2, 0x8088,
 998                 PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8008 },
 999         { PCI_VENDOR_ID_ADAPTEC2, 0x8089,
1000                 PCI_VENDOR_ID_ADAPTEC2, 0x0008, 0, 0, chip_8009 },
1001         { PCI_VENDOR_ID_ADAPTEC2, 0x8089,
1002                 PCI_VENDOR_ID_ADAPTEC2, 0x0800, 0, 0, chip_8009 },
1003         { PCI_VENDOR_ID_ADAPTEC2, 0x8088,
1004                 PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8018 },
1005         { PCI_VENDOR_ID_ADAPTEC2, 0x8088,
1006                 PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8018 },
1007         { PCI_VENDOR_ID_ADAPTEC2, 0x8089,
1008                 PCI_VENDOR_ID_ADAPTEC2, 0x0016, 0, 0, chip_8019 },
1009         { PCI_VENDOR_ID_ADAPTEC2, 0x8089,
1010                 PCI_VENDOR_ID_ADAPTEC2, 0x1600, 0, 0, chip_8019 },
1011         {} /* terminate list */
1012 };
1013
1014 static struct pci_driver pm8001_pci_driver = {
1015         .name           = DRV_NAME,
1016         .id_table       = pm8001_pci_table,
1017         .probe          = pm8001_pci_probe,
1018         .remove         = pm8001_pci_remove,
1019         .suspend        = pm8001_pci_suspend,
1020         .resume         = pm8001_pci_resume,
1021 };
1022
1023 /**
1024  *      pm8001_init - initialize scsi transport template
1025  */
1026 static int __init pm8001_init(void)
1027 {
1028         int rc = -ENOMEM;
1029
1030         pm8001_wq = alloc_workqueue("pm8001", 0, 0);
1031         if (!pm8001_wq)
1032                 goto err;
1033
1034         pm8001_id = 0;
1035         pm8001_stt = sas_domain_attach_transport(&pm8001_transport_ops);
1036         if (!pm8001_stt)
1037                 goto err_wq;
1038         rc = pci_register_driver(&pm8001_pci_driver);
1039         if (rc)
1040                 goto err_tp;
1041         return 0;
1042
1043 err_tp:
1044         sas_release_transport(pm8001_stt);
1045 err_wq:
1046         destroy_workqueue(pm8001_wq);
1047 err:
1048         return rc;
1049 }
1050
1051 static void __exit pm8001_exit(void)
1052 {
1053         pci_unregister_driver(&pm8001_pci_driver);
1054         sas_release_transport(pm8001_stt);
1055         destroy_workqueue(pm8001_wq);
1056 }
1057
1058 module_init(pm8001_init);
1059 module_exit(pm8001_exit);
1060
1061 MODULE_AUTHOR("Jack Wang <jack_wang@usish.com>");
1062 MODULE_DESCRIPTION(
1063                 "PMC-Sierra PM8001/8081/8088/8089 SAS/SATA controller driver");
1064 MODULE_VERSION(DRV_VERSION);
1065 MODULE_LICENSE("GPL");
1066 MODULE_DEVICE_TABLE(pci, pm8001_pci_table);
1067