1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2023 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
24 #include <scsi/scsi_host.h>
25 #include <linux/hashtable.h>
26 #include <linux/ktime.h>
27 #include <linux/workqueue.h>
29 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
30 #define CONFIG_SCSI_LPFC_DEBUG_FS
33 struct lpfc_sli2_slim;
35 #define ELX_MODEL_NAME_SIZE 80
37 #define LPFC_PCI_DEV_LP 0x1
38 #define LPFC_PCI_DEV_OC 0x2
40 #define LPFC_SLI_REV2 2
41 #define LPFC_SLI_REV3 3
42 #define LPFC_SLI_REV4 4
44 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */
45 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
47 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
48 the NameServer before giving up. */
49 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
50 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
52 #define LPFC_DEFAULT_XPSGL_SIZE 256
53 #define LPFC_MAX_SG_TABLESIZE 0xffff
54 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
55 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */
56 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
57 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
58 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */
59 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
60 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
61 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */
63 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
64 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
65 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
66 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */
67 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
68 #define LPFC_MIN_TGT_QDEPTH 10
69 #define LPFC_MAX_TGT_QDEPTH 0xFFFF
72 * Following time intervals are used of adjusting SCSI device
73 * queue depths when there are driver resource error or Firmware
77 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
79 /* Number of exchanges reserved for discovery to complete */
80 #define LPFC_DISC_IOCB_BUFF_COUNT 20
82 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
83 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
85 /* Error Attention event polling interval */
86 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
88 /* Define macros for 64 bit support */
89 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
90 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
91 #define getPaddr(high, low) ((dma_addr_t)( \
92 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
93 /* Provide maximum configuration definitions. */
94 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
95 #define FC_MAX_ADPTMSG 64
98 #define MAX_HBAS_NO_RESET 16
100 /* Number of MSI-X vectors the driver uses */
101 #define LPFC_MSIX_VECTORS 2
103 /* lpfc wait event data ready flag */
104 #define LPFC_DATA_READY 0 /* bit 0 */
106 /* queue dump line buffer size */
107 #define LPFC_LBUF_SZ 128
109 /* mailbox system shutdown options */
110 #define LPFC_MBX_NO_WAIT 0
111 #define LPFC_MBX_WAIT 1
113 #define LPFC_CFG_PARAM_MAGIC_NUM 0xFEAA0005
114 #define LPFC_PORT_CFG_NAME "/cfg/port.cfg"
116 #define lpfc_rangecheck(val, min, max) \
117 ((uint)(val) >= (uint)(min) && (val) <= (max))
119 enum lpfc_polling_flags {
120 ENABLE_FCP_RING_POLLING = 0x1,
121 DISABLE_FCP_RING_INT = 0x2
125 uint16_t cmd_cpu[40];
126 uint16_t rsp_cpu[40];
132 * Provide for FC4 TYPE x28 - NVME. The
133 * bit mask for FCP and NVME is 0x8 identically
134 * because they are 32 bit positions distance.
136 #define LPFC_FC4_TYPE_BITMASK 0x00000100
138 /* Provide DMA memory definitions the driver uses per port instance. */
140 struct list_head list;
141 void *virt; /* virtual address ptr */
142 dma_addr_t phys; /* mapped address */
143 uint32_t buffer_tag; /* used for tagged queue ring */
146 struct lpfc_nvmet_ctxbuf {
147 struct list_head list;
148 struct lpfc_async_xchg_ctx *context;
149 struct lpfc_iocbq *iocbq;
150 struct lpfc_sglq *sglq;
151 struct work_struct defer_work;
154 struct lpfc_dma_pool {
155 struct lpfc_dmabuf *elements;
157 uint32_t current_count;
161 struct lpfc_dmabuf hbuf;
162 struct lpfc_dmabuf dbuf;
166 struct lpfc_cq_event cq_event;
167 unsigned long time_stamp;
172 struct lpfc_dmabuf hbuf;
173 struct lpfc_dmabuf dbuf;
177 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
178 struct lpfc_queue *drq; /* ptr to associated Data RQ */
181 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */
182 #define MEM_PRI 0x100
185 /****************************************************************************/
186 /* Device VPD save area */
187 /****************************************************************************/
188 typedef struct lpfc_vpd {
189 uint32_t status; /* vpd status value */
190 uint32_t length; /* number of bytes actually returned */
192 uint32_t rsvd1; /* Revision numbers */
200 uint8_t feaLevelHigh;
202 uint32_t postKernRev;
204 uint8_t opFwName[16];
206 uint8_t sli1FwName[16];
208 uint8_t sli2FwName[16];
211 #ifdef __BIG_ENDIAN_BITFIELD
212 uint32_t rsvd3 :20; /* Reserved */
213 uint32_t rsvd2 : 3; /* Reserved */
214 uint32_t cbg : 1; /* Configure BlockGuard */
215 uint32_t cmv : 1; /* Configure Max VPIs */
216 uint32_t ccrp : 1; /* Config Command Ring Polling */
217 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
218 uint32_t chbs : 1; /* Cofigure Host Backing store */
219 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
220 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
221 uint32_t cmx : 1; /* Configure Max XRIs */
222 uint32_t cmr : 1; /* Configure Max RPIs */
223 #else /* __LITTLE_ENDIAN */
224 uint32_t cmr : 1; /* Configure Max RPIs */
225 uint32_t cmx : 1; /* Configure Max XRIs */
226 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
227 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
228 uint32_t chbs : 1; /* Cofigure Host Backing store */
229 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
230 uint32_t ccrp : 1; /* Config Command Ring Polling */
231 uint32_t cmv : 1; /* Configure Max VPIs */
232 uint32_t cbg : 1; /* Configure BlockGuard */
233 uint32_t rsvd2 : 3; /* Reserved */
234 uint32_t rsvd3 :20; /* Reserved */
244 /* Statistics for ELS commands */
246 uint32_t elsRetryExceeded;
247 uint32_t elsXmitRetry;
248 uint32_t elsDelayRetry;
250 uint32_t elsRcvFrame;
254 uint32_t elsRcvFARPR;
255 uint32_t elsRcvFLOGI;
256 uint32_t elsRcvPLOGI;
257 uint32_t elsRcvADISC;
258 uint32_t elsRcvPDISC;
272 uint32_t elsXmitFLOGI;
273 uint32_t elsXmitFDISC;
274 uint32_t elsXmitPLOGI;
275 uint32_t elsXmitPRLI;
276 uint32_t elsXmitADISC;
277 uint32_t elsXmitLOGO;
279 uint32_t elsXmitRSCN;
280 uint32_t elsXmitRNID;
281 uint32_t elsXmitFARP;
282 uint32_t elsXmitFARPR;
284 uint32_t elsXmitLSRJT;
286 uint32_t frameRcvBcast;
287 uint32_t frameRcvMulti;
288 uint32_t strayXmitCmpl;
289 uint32_t frameXmitDelay;
294 uint32_t LinkMultiEvent;
299 uint32_t fcpRemoteStop;
301 uint32_t fcpPortBusy;
303 uint32_t fcpLocalErr;
309 #define LPFC_VMID_TIMER 300 /* timer interval in seconds */
311 #define LPFC_MAX_VMID_SIZE 256
313 union lpfc_vmid_io_tag {
314 u32 app_id; /* App Id vmid */
315 u8 cs_ctl_vmid; /* Priority tag vmid */
318 #define JIFFIES_PER_HR (HZ * 60 * 60)
322 #define LPFC_VMID_SLOT_FREE 0x0
323 #define LPFC_VMID_SLOT_USED 0x1
324 #define LPFC_VMID_REQ_REGISTER 0x2
325 #define LPFC_VMID_REGISTERED 0x4
326 #define LPFC_VMID_DE_REGISTER 0x8
327 char host_vmid[LPFC_MAX_VMID_SIZE];
328 union lpfc_vmid_io_tag un;
329 struct hlist_node hnode;
333 u8 delete_inactive; /* Delete if inactive flag 0 = no, 1 = yes */
335 u64 __percpu *last_io_time;
338 #define lpfc_vmid_is_type_priority_tag(vport)\
339 (vport->vmid_priority_tagging ? 1 : 0)
341 #define LPFC_VMID_HASH_SIZE 256
342 #define LPFC_VMID_HASH_MASK 255
343 #define LPFC_VMID_HASH_SHIFT 6
345 struct lpfc_vmid_context {
346 struct lpfc_vmid *vmp;
347 struct lpfc_nodelist *nlp;
351 struct lpfc_vmid_priority_range {
357 struct lpfc_vmid_priority_info {
359 struct lpfc_vmid_priority_range *vmid_range;
362 #define QFPA_EVEN_ONLY 0x01
363 #define QFPA_ODD_ONLY 0x02
364 #define QFPA_EVEN_ODD 0x03
366 enum discovery_state {
367 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
368 LPFC_VPORT_FAILED = 1, /* vport has failed */
369 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
370 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
371 LPFC_FDISC = 8, /* FDISC sent for vport */
372 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
374 LPFC_NS_REG = 10, /* Register with NameServer */
375 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
376 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
377 * device authentication / discovery */
378 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
379 LPFC_VPORT_READY = 32,
383 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
384 LPFC_WARM_START = 1, /* HBA state after selective reset */
385 LPFC_INIT_START = 2, /* Initial state after board reset */
386 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
387 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
388 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
389 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
395 struct lpfc_trunk_link_state {
396 enum hba_state state;
400 struct lpfc_trunk_link {
401 struct lpfc_trunk_link_state link0,
408 /* Format of congestion module parameters */
409 struct lpfc_cgn_param {
410 uint32_t cgn_param_magic;
411 uint8_t cgn_param_version; /* version 1 */
412 uint8_t cgn_param_mode; /* 0=off 1=managed 2=monitor only */
413 #define LPFC_CFG_OFF 0
414 #define LPFC_CFG_MANAGED 1
415 #define LPFC_CFG_MONITOR 2
418 uint8_t cgn_param_level0;
419 uint8_t cgn_param_level1;
420 uint8_t cgn_param_level2;
428 /* Max number of days of congestion data */
429 #define LPFC_MAX_CGN_DAYS 10
440 /* Format of congestion buffer info
441 * This structure defines memory thats allocated and registered with
442 * the HBA firmware. When adding or removing fields from this structure
443 * the alignment must match the HBA firmware.
446 struct lpfc_cgn_info {
448 __le16 cgn_info_size; /* is sizeof(struct lpfc_cgn_info) */
449 uint8_t cgn_info_version; /* represents format of structure */
450 #define LPFC_CGN_INFO_V1 1
451 #define LPFC_CGN_INFO_V2 2
452 #define LPFC_CGN_INFO_V3 3
453 #define LPFC_CGN_INFO_V4 4
454 uint8_t cgn_info_mode; /* 0=off 1=managed 2=monitor only */
455 uint8_t cgn_info_detect;
456 uint8_t cgn_info_action;
457 uint8_t cgn_info_level0;
458 uint8_t cgn_info_level1;
459 uint8_t cgn_info_level2;
462 struct lpfc_cgn_ts base_time;
464 /* minute / hours / daily indices */
465 uint8_t cgn_index_minute;
466 uint8_t cgn_index_hour;
467 uint8_t cgn_index_day;
469 __le16 cgn_warn_freq;
470 __le16 cgn_alarm_freq;
474 /* Driver Information */
475 __le16 cgn_drvr_min[60];
476 __le32 cgn_drvr_hr[24];
477 __le32 cgn_drvr_day[LPFC_MAX_CGN_DAYS];
479 /* Congestion Warnings */
480 __le16 cgn_warn_min[60];
481 __le32 cgn_warn_hr[24];
482 __le32 cgn_warn_day[LPFC_MAX_CGN_DAYS];
484 /* Latency Information */
485 __le32 cgn_latency_min[60];
486 __le32 cgn_latency_hr[24];
487 __le32 cgn_latency_day[LPFC_MAX_CGN_DAYS];
489 /* Bandwidth Information */
490 __le16 cgn_bw_min[60];
491 __le16 cgn_bw_hr[24];
492 __le16 cgn_bw_day[LPFC_MAX_CGN_DAYS];
494 /* Congestion Alarms */
495 __le16 cgn_alarm_min[60];
496 __le32 cgn_alarm_hr[24];
497 __le32 cgn_alarm_day[LPFC_MAX_CGN_DAYS];
499 struct_group(cgn_stat,
500 uint8_t cgn_stat_npm; /* Notifications per minute */
503 struct lpfc_cgn_ts stat_start; /* Base time */
506 __le32 cgn_notification;
507 __le32 cgn_peer_notification;
508 __le32 link_integ_notification;
509 __le32 delivery_notification;
510 struct lpfc_cgn_ts stat_fpin; /* Last congestion notification FPIN */
511 struct lpfc_cgn_ts stat_peer; /* Last peer congestion FPIN */
512 struct lpfc_cgn_ts stat_lnk; /* Last link integrity FPIN */
513 struct lpfc_cgn_ts stat_delivery; /* Last delivery notification FPIN */
517 #define LPFC_CGN_CRC32_MAGIC_NUMBER 0x1EDC6F41
518 #define LPFC_CGN_CRC32_SEED 0xFFFFFFFF
521 #define LPFC_CGN_INFO_SZ (sizeof(struct lpfc_cgn_info) - \
524 struct lpfc_cgn_stat {
525 atomic64_t total_bytes;
526 atomic64_t rcv_bytes;
527 atomic64_t rx_latency;
528 #define LPFC_CGN_NOT_SENT 0xFFFFFFFFFFFFFFFFLL
532 struct lpfc_cgn_acqe_stat {
538 struct lpfc_hba *phba;
539 struct list_head listentry;
541 #define LPFC_PHYSICAL_PORT 1
542 #define LPFC_NPIV_PORT 2
543 #define LPFC_FABRIC_PORT 3
544 enum discovery_state port_state;
549 #define LPFC_VPI_REGISTERED 0x1
551 uint32_t fc_flag; /* FC flags */
552 /* Several of these flags are HBA centric and should be moved to
553 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
555 #define FC_PT2PT 0x1 /* pt2pt with no fabric */
556 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
557 #define FC_DISC_TMO 0x4 /* Discovery timer running */
558 #define FC_PUBLIC_LOOP 0x8 /* Public loop */
559 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
560 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
561 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */
562 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
563 #define FC_FABRIC 0x100 /* We are fabric attached */
564 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
565 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
566 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
567 #define FC_PT2PT_NO_NVME 0x1000 /* Don't send NVME PRLI */
568 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
569 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
570 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
571 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
572 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
573 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
574 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
575 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
576 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
577 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
578 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
581 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
582 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
583 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
584 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
585 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
586 #define FC_CT_RPRT_DEFER 0x20 /* Defer issuing FDMI RPRT */
588 struct list_head fc_nodes;
590 /* Keep counters for the number of entries in each list. */
591 uint16_t fc_plogi_cnt;
592 uint16_t fc_adisc_cnt;
593 uint16_t fc_reglogin_cnt;
594 uint16_t fc_prli_cnt;
595 uint16_t fc_unmap_cnt;
598 uint16_t fc_unused_cnt;
599 struct serv_parm fc_sparam; /* buffer for our service parameters */
601 uint32_t fc_myDID; /* fibre channel S_ID */
602 uint32_t fc_prevDID; /* previous fibre channel S_ID */
603 struct lpfc_name fabric_portname;
604 struct lpfc_name fabric_nodename;
606 int32_t stopped; /* HBA has not been restarted since last ERATT */
607 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
609 uint32_t num_disc_nodes; /* in addition to hba_state */
610 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
612 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
613 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
614 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
615 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
616 struct lpfc_name fc_nodename; /* fc nodename */
617 struct lpfc_name fc_portname; /* fc portname */
619 struct lpfc_work_evt disc_timeout_evt;
621 struct timer_list fc_disctmo; /* Discovery rescue timer */
622 uint8_t fc_ns_retry; /* retries for fabric nameserver */
623 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
625 spinlock_t work_port_lock;
626 uint32_t work_port_events; /* Timeout to be handled */
627 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
628 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
629 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
631 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
632 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
633 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
634 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
635 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
636 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
637 #define WORKER_CHECK_INACTIVE_VMID 0x4000 /* hba: check inactive vmids */
638 #define WORKER_CHECK_VMID_ISSUE_QFPA 0x8000 /* vport: Check if qfpa needs
641 struct timer_list els_tmofunc;
642 struct timer_list delayed_disc_tmo;
645 #define FC_LOADING 0x1 /* HBA in process of loading drvr */
646 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
647 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
648 #define FC_ALLOW_VMID 0x8 /* Allow VMID I/Os */
649 #define FC_DEREGISTER_ALL_APP_ID 0x10 /* Deregister all VMIDs */
650 /* Vport Config Parameters */
651 uint32_t cfg_scan_down;
652 uint32_t cfg_lun_queue_depth;
653 uint32_t cfg_nodev_tmo;
654 uint32_t cfg_devloss_tmo;
655 uint32_t cfg_restrict_login;
656 uint32_t cfg_peer_port_login;
657 uint32_t cfg_fcp_class;
658 uint32_t cfg_use_adisc;
659 uint32_t cfg_discovery_threads;
660 uint32_t cfg_log_verbose;
661 uint32_t cfg_enable_fc4_type;
662 uint32_t cfg_max_luns;
663 uint32_t cfg_enable_da_id;
664 uint32_t cfg_max_scsicmpl_time;
665 uint32_t cfg_tgt_queue_depth;
666 uint32_t cfg_first_burst_size;
667 uint32_t dev_loss_tmo_changed;
668 /* VMID parameters */
669 u8 lpfc_vmid_host_uuid[16];
670 u32 max_vmid; /* maximum VMIDs allowed per port */
671 u32 cur_vmid_cnt; /* Current VMID count */
672 #define LPFC_MIN_VMID 4
673 #define LPFC_MAX_VMID 255
674 u32 vmid_inactivity_timeout; /* Time after which the VMID */
675 /* deregisters from switch */
676 u32 vmid_priority_tagging;
677 #define LPFC_VMID_PRIO_TAG_DISABLE 0 /* Disable */
678 #define LPFC_VMID_PRIO_TAG_SUP_TARGETS 1 /* Allow supported targets only */
679 #define LPFC_VMID_PRIO_TAG_ALL_TARGETS 2 /* Allow all targets */
680 unsigned long *vmid_priority_range;
681 #define LPFC_VMID_MAX_PRIORITY_RANGE 256
682 #define LPFC_VMID_PRIORITY_BITMAP_SIZE 32
684 #define LPFC_VMID_IN_USE 0x1
685 #define LPFC_VMID_ISSUE_QFPA 0x2
686 #define LPFC_VMID_QFPA_CMPL 0x4
687 #define LPFC_VMID_QOS_ENABLED 0x8
688 #define LPFC_VMID_TIMER_ENBLD 0x10
689 #define LPFC_VMID_TYPE_PRIO 0x20
690 struct fc_qfpa_res *qfpa_res;
692 struct fc_vport *fc_vport;
694 struct lpfc_vmid *vmid;
695 DECLARE_HASHTABLE(hash_table, 8);
697 struct lpfc_vmid_priority_info vmid_priority;
699 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
700 struct dentry *debug_disc_trc;
701 struct dentry *debug_nodelist;
702 struct dentry *debug_nvmestat;
703 struct dentry *debug_scsistat;
704 struct dentry *debug_ioktime;
705 struct dentry *debug_hdwqstat;
706 struct dentry *vport_debugfs_root;
707 struct lpfc_debugfs_trc *disc_trc;
708 atomic_t disc_trc_cnt;
710 struct list_head rcv_buffer_list;
711 unsigned long rcv_buffer_time_stamp;
713 #define STATIC_VPORT 0x1
714 #define FAWWPN_PARAM_CHG 0x2
716 uint16_t fdmi_num_disc;
717 uint32_t fdmi_hba_mask;
718 uint32_t fdmi_port_mask;
720 /* There is a single nvme instance per vport. */
721 struct nvme_fc_local_port *localport;
722 uint8_t nvmei_support; /* driver supports NVME Initiator */
723 uint32_t last_fcp_wqidx;
724 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */
728 uint16_t entry_count; /* Current number of HBQ slots */
729 uint16_t buffer_count; /* Current number of buffers posted */
730 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
731 uint32_t hbqPutIdx; /* HBQ slot to use */
732 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
733 void *hbq_virt; /* Virtual ptr to this hbq */
734 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
735 /* Callback for HBQ buffer allocation */
736 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
737 /* Callback for HBQ buffer free */
738 void (*hbq_free_buffer) (struct lpfc_hba *,
739 struct hbq_dmabuf *);
742 /* this matches the position in the lpfc_hbq_defs array */
743 #define LPFC_ELS_HBQ 0
744 #define LPFC_MAX_HBQS 1
746 enum hba_temp_state {
758 #define LPFC_CT_CTX_MAX 64
759 struct unsol_rcv_ct_ctx {
763 #define UNSOL_INVALID 0
764 #define UNSOL_VALID 1
769 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
770 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
771 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
772 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
773 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
774 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
775 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
776 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
777 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */
778 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G
780 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64"
802 struct lpfc_mbox_ext_buf_ctx {
804 #define LPFC_BSG_MBOX_IDLE 0
805 #define LPFC_BSG_MBOX_HOST 1
806 #define LPFC_BSG_MBOX_PORT 2
807 #define LPFC_BSG_MBOX_DONE 3
808 #define LPFC_BSG_MBOX_ABTS 4
809 enum nemb_type nembType;
810 enum mbox_type mboxType;
814 struct lpfc_dmabuf *mbx_dmabuf;
815 struct list_head ext_dmabuf_list;
818 struct lpfc_epd_pool {
820 struct list_head list;
822 spinlock_t lock; /* lock for expedite pool */
831 struct lpfc_ras_fwlog {
833 uint32_t fw_buffcount; /* Buffer size posted to FW */
834 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */
835 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024)
836 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024)
837 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024)
838 uint32_t fw_loglevel; /* Log level set */
839 struct lpfc_dmabuf lwpd;
840 struct list_head fwlog_buff_list;
842 /* RAS support status on adapter */
843 bool ras_hwsupport; /* RAS Support available on HW or not */
844 bool ras_enabled; /* Ras Enabled for the function */
845 #define LPFC_RAS_DISABLE_LOGGING 0x00
846 #define LPFC_RAS_ENABLE_LOGGING 0x01
847 enum ras_state state; /* RAS logging running state */
850 #define DBG_LOG_STR_SZ 256
851 #define DBG_LOG_SZ 256
854 char log[DBG_LOG_STR_SZ];
858 enum lpfc_irq_chann_mode {
859 /* Assign IRQs to all possible cpus that have hardware queues */
862 /* Assign IRQs only to cpus on the same numa node as HBA */
865 /* Assign IRQs only on non-hyperthreaded CPUs. This is the
866 * same as normal_mode, but assign IRQS only on physical CPUs.
871 enum lpfc_hba_bit_flags {
872 FABRIC_COMANDS_BLOCKED,
878 /* SCSI interface function jump table entries */
879 struct lpfc_io_buf * (*lpfc_get_scsi_buf)
880 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
881 struct scsi_cmnd *cmnd);
882 int (*lpfc_scsi_prep_dma_buf)
883 (struct lpfc_hba *, struct lpfc_io_buf *);
884 void (*lpfc_scsi_unprep_dma_buf)
885 (struct lpfc_hba *, struct lpfc_io_buf *);
886 void (*lpfc_release_scsi_buf)
887 (struct lpfc_hba *, struct lpfc_io_buf *);
888 void (*lpfc_rampdown_queue_depth)
890 void (*lpfc_scsi_prep_cmnd)
891 (struct lpfc_vport *, struct lpfc_io_buf *,
892 struct lpfc_nodelist *);
893 int (*lpfc_scsi_prep_cmnd_buf)
894 (struct lpfc_vport *vport,
895 struct lpfc_io_buf *lpfc_cmd,
897 int (*lpfc_scsi_prep_task_mgmt_cmd)
898 (struct lpfc_vport *vport,
899 struct lpfc_io_buf *lpfc_cmd,
900 u64 lun, u8 task_mgmt_cmd);
902 /* IOCB interface function jump table entries */
903 int (*__lpfc_sli_issue_iocb)
904 (struct lpfc_hba *, uint32_t,
905 struct lpfc_iocbq *, uint32_t);
906 int (*__lpfc_sli_issue_fcp_io)
907 (struct lpfc_hba *phba, uint32_t ring_number,
908 struct lpfc_iocbq *piocb, uint32_t flag);
909 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
910 struct lpfc_iocbq *);
911 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
913 /* MBOX interface function jump table entries */
914 int (*lpfc_sli_issue_mbox)
915 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
917 /* Slow-path IOCB process function jump table entries */
918 void (*lpfc_sli_handle_slow_ring_event)
919 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
922 /* INIT device interface function jump table entries */
923 int (*lpfc_sli_hbq_to_firmware)
924 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
925 int (*lpfc_sli_brdrestart)
927 int (*lpfc_sli_brdready)
928 (struct lpfc_hba *, uint32_t);
929 void (*lpfc_handle_eratt)
931 void (*lpfc_stop_port)
933 int (*lpfc_hba_init_link)
934 (struct lpfc_hba *, uint32_t);
935 int (*lpfc_hba_down_link)
936 (struct lpfc_hba *, uint32_t);
937 int (*lpfc_selective_reset)
940 int (*lpfc_bg_scsi_prep_dma_buf)
941 (struct lpfc_hba *, struct lpfc_io_buf *);
943 /* Prep SLI WQE/IOCB jump table entries */
944 void (*__lpfc_sli_prep_els_req_rsp)(struct lpfc_iocbq *cmdiocbq,
945 struct lpfc_vport *vport,
946 struct lpfc_dmabuf *bmp,
947 u16 cmd_size, u32 did, u32 elscmd,
948 u8 tmo, u8 expect_rsp);
949 void (*__lpfc_sli_prep_gen_req)(struct lpfc_iocbq *cmdiocbq,
950 struct lpfc_dmabuf *bmp, u16 rpi,
951 u32 num_entry, u8 tmo);
952 void (*__lpfc_sli_prep_xmit_seq64)(struct lpfc_iocbq *cmdiocbq,
953 struct lpfc_dmabuf *bmp, u16 rpi,
954 u16 ox_id, u32 num_entry, u8 rctl,
955 u8 last_seq, u8 cr_cx_cmd);
956 void (*__lpfc_sli_prep_abort_xri)(struct lpfc_iocbq *cmdiocbq,
957 u16 ulp_context, u16 iotag,
958 u8 ulp_class, u16 cqid, bool ia,
962 struct lpfc_epd_pool epd_pool;
964 /* SLI4 specific HBA data structure */
965 struct lpfc_sli4_hba sli4_hba;
967 struct workqueue_struct *wq;
968 struct delayed_work eq_delay_work;
970 #define LPFC_IDLE_STAT_DELAY 1000
971 struct delayed_work idle_stat_delay_work;
974 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
975 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
976 uint32_t sli3_options; /* Mask of enabled SLI3 options */
977 #define LPFC_SLI3_HBQ_ENABLED 0x01
978 #define LPFC_SLI3_NPIV_ENABLED 0x02
979 #define LPFC_SLI3_VPORT_TEARDOWN 0x04
980 #define LPFC_SLI3_CRP_ENABLED 0x08
981 #define LPFC_SLI3_BG_ENABLED 0x20
982 #define LPFC_SLI3_DSS_ENABLED 0x40
983 #define LPFC_SLI4_PERFH_ENABLED 0x80
984 #define LPFC_SLI4_PHWQ_ENABLED 0x100
985 uint32_t iocb_cmd_size;
986 uint32_t iocb_rsp_size;
988 struct lpfc_trunk_link trunk_link;
989 enum hba_state link_state;
990 uint32_t link_flag; /* link state flags */
991 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
992 /* This flag is set while issuing */
993 /* INIT_LINK mailbox command */
994 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
995 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
996 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */
997 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */
998 #define LS_CT_VEN_RPA 0x20 /* Vendor RPA sent to switch */
999 #define LS_EXTERNAL_LOOPBACK 0x40 /* External loopback plug inserted */
1001 uint32_t hba_flag; /* hba generic flags */
1002 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
1003 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */
1004 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
1005 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
1006 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
1007 #define HBA_PERSISTENT_TOPO 0x20 /* Persistent topology support in hba */
1008 #define ELS_XRI_ABORT_EVENT 0x40 /* ELS_XRI abort event was queued */
1009 #define ASYNC_EVENT 0x80
1010 #define LINK_DISABLED 0x100 /* Link disabled by user */
1011 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
1012 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
1013 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
1014 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
1015 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
1016 #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */
1017 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
1018 #define HBA_FORCED_LINK_SPEED 0x40000 /*
1019 * Firmware supports Forced Link Speed
1022 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */
1023 #define HBA_DEFER_FLOGI 0x800000 /* Defer FLOGI till read_sparm cmpl */
1024 #define HBA_SETUP 0x1000000 /* Signifies HBA setup is completed */
1025 #define HBA_NEEDS_CFG_PORT 0x2000000 /* SLI3 - needs a CONFIG_PORT mbox */
1026 #define HBA_HBEAT_INP 0x4000000 /* mbox HBEAT is in progress */
1027 #define HBA_HBEAT_TMO 0x8000000 /* HBEAT initiated after timeout */
1028 #define HBA_FLOGI_OUTSTANDING 0x10000000 /* FLOGI is outstanding */
1029 #define HBA_RHBA_CMPL 0x20000000 /* RHBA FDMI command is successful */
1031 struct completion *fw_dump_cmpl; /* cmpl event tracker for fw_dump */
1032 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
1033 struct lpfc_dmabuf slim2p;
1037 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
1040 struct _IOCB *IOCBs;
1042 struct lpfc_dmabuf hbqslimp;
1044 uint16_t pci_cfg_value;
1046 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
1048 uint32_t fc_eventTag; /* event tag for link attention */
1049 uint32_t link_events;
1051 /* These fields used to be binfo */
1052 uint32_t fc_pref_DID; /* preferred D_ID */
1053 uint8_t fc_pref_ALPA; /* preferred AL_PA */
1054 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
1055 uint32_t fc_edtov; /* E_D_TOV timer value */
1056 uint32_t fc_arbtov; /* ARB_TOV timer value */
1057 uint32_t fc_ratov; /* R_A_TOV timer value */
1058 uint32_t fc_rttov; /* R_T_TOV timer value */
1059 uint32_t fc_altov; /* AL_TOV timer value */
1060 uint32_t fc_crtov; /* C_R_TOV timer value */
1062 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
1063 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
1067 uint32_t fc_topology; /* link topology, from LINK INIT */
1068 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
1070 struct lpfc_stats fc_stat;
1072 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
1073 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
1077 uint32_t RandomData[7];
1078 uint8_t fcp_embed_io;
1079 uint8_t nvmet_support; /* driver supports NVMET */
1080 #define LPFC_NVMET_MAX_PORTS 32
1081 uint8_t mds_diags_support;
1082 uint8_t bbcredit_support;
1083 uint8_t enab_exp_wqcq_pages;
1084 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */
1086 /* HBA Config Parameters */
1088 uint32_t cfg_xri_rebalancing;
1090 uint32_t cfg_enable_npiv;
1091 uint32_t cfg_enable_rrq;
1092 uint32_t cfg_topology;
1093 uint32_t cfg_link_speed;
1094 #define LPFC_FCF_FOV 1 /* Fast fcf failover */
1095 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
1096 uint32_t cfg_fcf_failover_policy;
1097 uint32_t cfg_fcp_io_sched;
1098 uint32_t cfg_ns_query;
1099 uint32_t cfg_fcp2_no_tgt_reset;
1100 uint32_t cfg_cr_delay;
1101 uint32_t cfg_cr_count;
1102 uint32_t cfg_multi_ring_support;
1103 uint32_t cfg_multi_ring_rctl;
1104 uint32_t cfg_multi_ring_type;
1106 uint32_t cfg_poll_tmo;
1107 uint32_t cfg_task_mgmt_tmo;
1108 uint32_t cfg_use_msi;
1109 uint32_t cfg_auto_imax;
1110 uint32_t cfg_fcp_imax;
1111 uint32_t cfg_force_rscn;
1112 uint32_t cfg_cq_poll_threshold;
1113 uint32_t cfg_cq_max_proc_limit;
1114 uint32_t cfg_fcp_cpu_map;
1115 uint32_t cfg_fcp_mq_threshold;
1116 uint32_t cfg_hdw_queue;
1117 uint32_t cfg_irq_chann;
1118 uint32_t cfg_suppress_rsp;
1119 uint32_t cfg_nvme_oas;
1120 uint32_t cfg_nvme_embed_cmd;
1121 uint32_t cfg_nvmet_mrq_post;
1122 uint32_t cfg_nvmet_mrq;
1123 uint32_t cfg_enable_nvmet;
1124 uint32_t cfg_nvme_enable_fb;
1125 uint32_t cfg_nvmet_fb_size;
1126 uint32_t cfg_total_seg_cnt;
1127 uint32_t cfg_sg_seg_cnt;
1128 uint32_t cfg_nvme_seg_cnt;
1129 uint32_t cfg_scsi_seg_cnt;
1130 uint32_t cfg_sg_dma_buf_size;
1131 uint32_t cfg_hba_queue_depth;
1132 uint32_t cfg_enable_hba_reset;
1133 uint32_t cfg_enable_hba_heartbeat;
1135 uint32_t cfg_EnableXLane;
1136 uint8_t cfg_oas_tgt_wwpn[8];
1137 uint8_t cfg_oas_vpt_wwpn[8];
1138 uint32_t cfg_oas_lun_state;
1139 #define OAS_LUN_ENABLE 1
1140 #define OAS_LUN_DISABLE 0
1141 uint32_t cfg_oas_lun_status;
1142 #define OAS_LUN_STATUS_EXISTS 0x01
1143 uint32_t cfg_oas_flags;
1144 #define OAS_FIND_ANY_VPORT 0x01
1145 #define OAS_FIND_ANY_TARGET 0x02
1146 #define OAS_LUN_VALID 0x04
1147 uint32_t cfg_oas_priority;
1148 uint32_t cfg_XLanePriority;
1149 uint32_t cfg_enable_bg;
1150 uint32_t cfg_prot_mask;
1151 uint32_t cfg_prot_guard;
1152 uint32_t cfg_hostmem_hgp;
1153 uint32_t cfg_log_verbose;
1154 uint32_t cfg_enable_fc4_type;
1155 #define LPFC_ENABLE_FCP 1
1156 #define LPFC_ENABLE_NVME 2
1157 #define LPFC_ENABLE_BOTH 3
1158 #if (IS_ENABLED(CONFIG_NVME_FC))
1159 #define LPFC_MAX_ENBL_FC4_TYPE LPFC_ENABLE_BOTH
1160 #define LPFC_DEF_ENBL_FC4_TYPE LPFC_ENABLE_BOTH
1162 #define LPFC_MAX_ENBL_FC4_TYPE LPFC_ENABLE_FCP
1163 #define LPFC_DEF_ENBL_FC4_TYPE LPFC_ENABLE_FCP
1165 uint32_t cfg_sriov_nr_virtfn;
1166 uint32_t cfg_request_firmware_upgrade;
1167 uint32_t cfg_suppress_link_up;
1168 uint32_t cfg_rrq_xri_bitmap_sz;
1169 u32 cfg_fcp_wait_abts_rsp;
1170 uint32_t cfg_delay_discovery;
1171 uint32_t cfg_sli_mode;
1172 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
1173 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
1174 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
1175 uint32_t cfg_fdmi_on;
1176 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
1177 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
1178 uint32_t cfg_enable_SmartSAN;
1179 uint32_t cfg_enable_mds_diags;
1180 uint32_t cfg_ras_fwlog_level;
1181 uint32_t cfg_ras_fwlog_buffsize;
1182 uint32_t cfg_ras_fwlog_func;
1183 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */
1184 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */
1185 uint32_t cfg_enable_pbde;
1186 uint32_t cfg_enable_mi;
1187 struct nvmet_fc_target_port *targetport;
1188 lpfc_vpd_t vpd; /* vital product data */
1190 u32 cfg_max_vmid; /* maximum VMIDs allowed per port */
1191 u32 cfg_vmid_app_header;
1192 #define LPFC_VMID_APP_HEADER_DISABLE 0
1193 #define LPFC_VMID_APP_HEADER_ENABLE 1
1194 u32 cfg_vmid_priority_tagging;
1195 u32 cfg_vmid_inactivity_timeout; /* Time after which the VMID */
1196 /* deregisters from switch */
1197 struct pci_dev *pcidev;
1198 struct list_head work_list;
1199 uint32_t work_ha; /* Host Attention Bits for WT */
1200 uint32_t work_ha_mask; /* HA Bits owned by WT */
1201 uint32_t work_hs; /* HS stored in case of ERRAT */
1202 uint32_t work_status[2]; /* Extra status from SLIM */
1204 wait_queue_head_t work_waitq;
1205 struct task_struct *worker_thread;
1206 unsigned long data_flags;
1207 uint32_t border_sge_num;
1209 uint32_t hbq_in_use; /* HBQs in use flag */
1210 uint32_t hbq_count; /* Count of configured HBQs */
1211 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
1213 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
1214 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
1216 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
1217 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
1218 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
1219 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
1221 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
1224 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
1225 PCI BAR0 with dual-ULP support */
1226 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
1227 PCI BAR2 with dual-ULP support */
1228 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
1229 PCI BAR4 with dual-ULP support */
1230 #define PCI_64BIT_BAR0 0
1231 #define PCI_64BIT_BAR2 2
1232 #define PCI_64BIT_BAR4 4
1233 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
1234 void __iomem *HAregaddr; /* virtual address for host attn reg */
1235 void __iomem *CAregaddr; /* virtual address for chip attn reg */
1236 void __iomem *HSregaddr; /* virtual address for host status
1238 void __iomem *HCregaddr; /* virtual address for host ctl reg */
1240 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
1241 struct lpfc_pgp *port_gp;
1242 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
1243 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
1245 int brd_no; /* FC board number */
1246 char SerialNumber[32]; /* adapter Serial Number */
1247 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
1248 char BIOSVersion[16]; /* Boot BIOS version */
1249 char ModelDesc[256]; /* Model Description */
1250 char ModelName[80]; /* Model Name */
1251 char ProgramType[256]; /* Program Type */
1252 char Port[20]; /* Port No */
1253 uint8_t vpd_flag; /* VPD data flag */
1255 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */
1256 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */
1257 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
1258 #define VPD_PORT 0x8 /* valid vpd port data */
1259 #define VPD_MASK 0xf /* mask for any vpd data */
1262 struct timer_list fcp_poll_timer;
1263 struct timer_list eratt_poll;
1264 uint32_t eratt_poll_interval;
1266 uint64_t bg_guard_err_cnt;
1267 uint64_t bg_apptag_err_cnt;
1268 uint64_t bg_reftag_err_cnt;
1270 /* fastpath list. */
1271 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
1272 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
1273 struct list_head lpfc_scsi_buf_list_get;
1274 struct list_head lpfc_scsi_buf_list_put;
1275 uint32_t total_scsi_bufs;
1276 struct list_head lpfc_iocb_list;
1277 uint32_t total_iocbq_bufs;
1278 struct list_head active_rrq_list;
1280 struct work_struct unblock_request_work; /* SCSI layer unblock IOs */
1283 struct dma_pool *lpfc_sg_dma_buf_pool;
1284 struct dma_pool *lpfc_mbuf_pool;
1285 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
1286 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
1287 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
1288 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
1289 struct dma_pool *lpfc_cmd_rsp_buf_pool;
1290 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
1292 mempool_t *mbox_mem_pool;
1293 mempool_t *nlp_mem_pool;
1294 mempool_t *rrq_pool;
1295 mempool_t *active_rrq_pool;
1297 struct fc_host_statistics link_stats;
1298 enum lpfc_irq_chann_mode irq_chann_mode;
1299 enum intr_type_t intr_type;
1301 #define LPFC_INTR_ERROR 0xFFFFFFFF
1302 struct list_head port_list;
1303 spinlock_t port_list_lock; /* lock for port_list mutations */
1304 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
1305 uint16_t max_vpi; /* Maximum virtual nports */
1306 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */
1307 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */
1308 uint16_t max_vports; /*
1309 * For IOV HBAs max_vpi can change
1310 * after a reset. max_vports is max
1311 * number of vports present. This can
1312 * be greater than max_vpi.
1316 unsigned long *vpi_bmask; /* vpi allocation table */
1319 struct list_head lpfc_vpi_blk_list;
1321 /* Data structure used by fabric iocb scheduler */
1322 struct list_head fabric_iocb_list;
1323 atomic_t fabric_iocb_count;
1324 struct timer_list fabric_block_timer;
1325 unsigned long bit_flags;
1326 atomic_t num_rsrc_err;
1327 atomic_t num_cmd_success;
1328 unsigned long last_rsrc_error_time;
1329 unsigned long last_ramp_down_time;
1330 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1331 struct dentry *hba_debugfs_root;
1332 atomic_t debugfs_vport_count;
1333 struct dentry *debug_multixri_pools;
1334 struct dentry *debug_hbqinfo;
1335 struct dentry *debug_dumpHostSlim;
1336 struct dentry *debug_dumpHBASlim;
1337 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
1338 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
1339 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
1340 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1341 struct dentry *debug_writeApp; /* inject write app_tag errors */
1342 struct dentry *debug_writeRef; /* inject write ref_tag errors */
1343 struct dentry *debug_readGuard; /* inject read guard_tag errors */
1344 struct dentry *debug_readApp; /* inject read app_tag errors */
1345 struct dentry *debug_readRef; /* inject read ref_tag errors */
1347 struct dentry *debug_nvmeio_trc;
1348 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1349 struct dentry *debug_hdwqinfo;
1350 #ifdef LPFC_HDWQ_LOCK_STAT
1351 struct dentry *debug_lockstat;
1353 struct dentry *debug_cgn_buffer;
1354 struct dentry *debug_rx_monitor;
1355 struct dentry *debug_ras_log;
1356 atomic_t nvmeio_trc_cnt;
1357 uint32_t nvmeio_trc_size;
1358 uint32_t nvmeio_trc_output_idx;
1360 /* T10 DIF error injection */
1361 uint32_t lpfc_injerr_wgrd_cnt;
1362 uint32_t lpfc_injerr_wapp_cnt;
1363 uint32_t lpfc_injerr_wref_cnt;
1364 uint32_t lpfc_injerr_rgrd_cnt;
1365 uint32_t lpfc_injerr_rapp_cnt;
1366 uint32_t lpfc_injerr_rref_cnt;
1367 uint32_t lpfc_injerr_nportid;
1368 struct lpfc_name lpfc_injerr_wwpn;
1369 sector_t lpfc_injerr_lba;
1370 #define LPFC_INJERR_LBA_OFF (sector_t)(-1)
1372 struct dentry *debug_slow_ring_trc;
1373 struct lpfc_debugfs_trc *slow_ring_trc;
1374 atomic_t slow_ring_trc_cnt;
1375 /* iDiag debugfs sub-directory */
1376 struct dentry *idiag_root;
1377 struct dentry *idiag_pci_cfg;
1378 struct dentry *idiag_bar_acc;
1379 struct dentry *idiag_que_info;
1380 struct dentry *idiag_que_acc;
1381 struct dentry *idiag_drb_acc;
1382 struct dentry *idiag_ctl_acc;
1383 struct dentry *idiag_mbx_acc;
1384 struct dentry *idiag_ext_acc;
1385 uint8_t lpfc_idiag_last_eq;
1387 uint16_t nvmeio_trc_on;
1389 /* Used for deferred freeing of ELS data buffers */
1390 struct list_head elsbuf;
1392 int elsbuf_prev_cnt;
1394 uint8_t temp_sensor_support;
1395 /* Fields used for heart beat. */
1396 unsigned long last_completion_time;
1397 unsigned long skipped_hb;
1398 struct timer_list hb_tmofunc;
1399 struct timer_list rrq_tmr;
1400 enum hba_temp_state over_temp_state;
1402 * Following bit will be set for all buffer tags which are not
1403 * associated with any HBQ.
1405 #define QUE_BUFTAG_BIT (1<<31)
1406 uint32_t buffer_tag_count;
1408 /* Maximum number of events that can be outstanding at any time*/
1409 #define LPFC_MAX_EVT_COUNT 512
1410 atomic_t fast_event_count;
1411 uint32_t fcoe_eventtag;
1412 uint32_t fcoe_eventtag_at_fcf_scan;
1413 uint32_t fcoe_cvl_eventtag;
1414 uint32_t fcoe_cvl_eventtag_attn;
1415 struct lpfc_fcf fcf;
1419 struct list_head fcf_conn_rec_list;
1421 bool defer_flogi_acc_flag;
1422 uint16_t defer_flogi_acc_rx_id;
1423 uint16_t defer_flogi_acc_ox_id;
1425 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1426 struct list_head ct_ev_waiters;
1427 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1429 struct timer_list inactive_vmid_poll;
1432 struct lpfc_ras_fwlog ras_fwlog;
1437 spinlock_t devicelock; /* lock for luns list */
1438 mempool_t *device_data_mem_pool;
1439 struct list_head luns;
1440 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1441 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1442 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1443 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1444 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1445 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1446 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1447 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1448 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1449 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1451 uint16_t sfp_warning;
1453 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1454 uint16_t hdwqstat_on;
1455 #define LPFC_CHECK_OFF 0
1456 #define LPFC_CHECK_NVME_IO 1
1457 #define LPFC_CHECK_NVMET_IO 2
1458 #define LPFC_CHECK_SCSI_IO 4
1460 uint64_t ktime_data_samples;
1461 uint64_t ktime_status_samples;
1462 uint64_t ktime_last_cmd;
1463 uint64_t ktime_seg1_total;
1464 uint64_t ktime_seg1_min;
1465 uint64_t ktime_seg1_max;
1466 uint64_t ktime_seg2_total;
1467 uint64_t ktime_seg2_min;
1468 uint64_t ktime_seg2_max;
1469 uint64_t ktime_seg3_total;
1470 uint64_t ktime_seg3_min;
1471 uint64_t ktime_seg3_max;
1472 uint64_t ktime_seg4_total;
1473 uint64_t ktime_seg4_min;
1474 uint64_t ktime_seg4_max;
1475 uint64_t ktime_seg5_total;
1476 uint64_t ktime_seg5_min;
1477 uint64_t ktime_seg5_max;
1478 uint64_t ktime_seg6_total;
1479 uint64_t ktime_seg6_min;
1480 uint64_t ktime_seg6_max;
1481 uint64_t ktime_seg7_total;
1482 uint64_t ktime_seg7_min;
1483 uint64_t ktime_seg7_max;
1484 uint64_t ktime_seg8_total;
1485 uint64_t ktime_seg8_min;
1486 uint64_t ktime_seg8_max;
1487 uint64_t ktime_seg9_total;
1488 uint64_t ktime_seg9_min;
1489 uint64_t ktime_seg9_max;
1490 uint64_t ktime_seg10_total;
1491 uint64_t ktime_seg10_min;
1492 uint64_t ktime_seg10_max;
1495 struct lpfc_cgn_stat __percpu *cmf_stat;
1496 uint32_t cmf_interval_rate; /* timer interval limit in ms */
1497 uint32_t cmf_timer_cnt;
1498 #define LPFC_CMF_INTERVAL 90
1499 uint64_t cmf_link_byte_count;
1500 uint64_t cmf_max_line_rate;
1501 uint64_t cmf_max_bytes_per_interval;
1502 uint64_t cmf_last_sync_bw;
1503 #define LPFC_CMF_BLK_SIZE 512
1504 struct hrtimer cmf_timer;
1505 struct hrtimer cmf_stats_timer; /* 1 minute stats timer */
1506 atomic_t cmf_bw_wait;
1508 atomic_t cmf_stop_io; /* To block request and stop IO's */
1509 uint32_t cmf_active_mode;
1510 uint32_t cmf_info_per_interval;
1511 #define LPFC_MAX_CMF_INFO 32
1512 struct timespec64 cmf_latency; /* Interval congestion timestamp */
1513 uint32_t cmf_last_ts; /* Interval congestion time (ms) */
1514 uint32_t cmf_active_info;
1516 /* Signal / FPIN handling for Congestion Mgmt */
1517 u8 cgn_reg_fpin; /* Negotiated value from RDF */
1518 u8 cgn_init_reg_fpin; /* Initial value from READ_CONFIG */
1519 #define LPFC_CGN_FPIN_NONE 0x0
1520 #define LPFC_CGN_FPIN_WARN 0x1
1521 #define LPFC_CGN_FPIN_ALARM 0x2
1522 #define LPFC_CGN_FPIN_BOTH (LPFC_CGN_FPIN_WARN | LPFC_CGN_FPIN_ALARM)
1524 u8 cgn_reg_signal; /* Negotiated value from EDC */
1525 u8 cgn_init_reg_signal; /* Initial value from READ_CONFIG */
1526 /* cgn_reg_signal and cgn_init_reg_signal use
1527 * enum fc_edc_cg_signal_cap_types
1529 u16 cgn_fpin_frequency; /* In units of msecs */
1530 #define LPFC_FPIN_INIT_FREQ 0xffff
1534 /* RX monitor handling for CMF */
1535 struct lpfc_rx_info_monitor *rx_monitor;
1536 atomic_t rx_max_read_cnt; /* Maximum read bytes */
1537 uint64_t rx_block_cnt;
1539 /* Congestion parameters from flash */
1540 struct lpfc_cgn_param cgn_p;
1542 /* Statistics counter for ACQE cgn alarms and warnings */
1543 struct lpfc_cgn_acqe_stat cgn_acqe_stat;
1545 /* Congestion buffer information */
1546 struct lpfc_dmabuf *cgn_i; /* Congestion Info buffer */
1547 atomic_t cgn_fabric_warn_cnt; /* Total warning cgn events for info */
1548 atomic_t cgn_fabric_alarm_cnt; /* Total alarm cgn events for info */
1549 atomic_t cgn_sync_warn_cnt; /* Total warning events for SYNC wqe */
1550 atomic_t cgn_sync_alarm_cnt; /* Total alarm events for SYNC wqe */
1551 atomic_t cgn_driver_evt_cnt; /* Total driver cgn events for fmw */
1552 atomic_t cgn_latency_evt_cnt;
1553 atomic64_t cgn_latency_evt; /* Avg latency per minute */
1554 unsigned long cgn_evt_timestamp;
1555 #define LPFC_CGN_TIMER_TO_MIN 60000 /* ms in a minute */
1556 uint32_t cgn_evt_minute;
1557 #define LPFC_SEC_MIN 60UL
1558 #define LPFC_MIN_HOUR 60
1559 #define LPFC_HOUR_DAY 24
1560 #define LPFC_MIN_DAY (LPFC_MIN_HOUR * LPFC_HOUR_DAY)
1562 struct hlist_node cpuhp; /* used for cpuhp per hba callback */
1563 struct timer_list cpuhp_poll_timer;
1564 struct list_head poll_list; /* slowpath eq polling list */
1565 #define LPFC_POLL_HB 1 /* slowpath heartbeat */
1567 char os_host_name[MAXHOSTNAMELEN];
1570 u32 degrade_activate_threshold;
1571 u32 degrade_deactivate_threshold;
1572 u32 fec_degrade_interval;
1574 atomic_t dbg_log_idx;
1575 atomic_t dbg_log_cnt;
1576 atomic_t dbg_log_dmping;
1577 struct dbg_log_ent dbg_log[DBG_LOG_SZ];
1580 #define LPFC_MAX_RXMONITOR_ENTRY 800
1581 #define LPFC_MAX_RXMONITOR_DUMP 32
1582 struct rx_info_entry {
1583 uint64_t cmf_bytes; /* Total no of read bytes for CMF_SYNC_WQE */
1584 uint64_t total_bytes; /* Total no of read bytes requested */
1585 uint64_t rcv_bytes; /* Total no of read bytes completed */
1586 uint64_t avg_io_size;
1587 uint64_t avg_io_latency;/* Average io latency in microseconds */
1588 uint64_t max_read_cnt; /* Maximum read bytes */
1589 uint64_t max_bytes_per_interval;
1591 uint32_t cmf_info; /* CMF_SYNC_WQE info */
1593 uint32_t timer_utilization;
1594 uint32_t timer_interval;
1597 struct lpfc_rx_info_monitor {
1598 struct rx_info_entry *ring; /* info organized in a circular buffer */
1599 u32 head_idx, tail_idx; /* index to head/tail of ring */
1600 spinlock_t lock; /* spinlock for ring */
1601 u32 entries; /* storing number entries/size of ring */
1604 static inline struct Scsi_Host *
1605 lpfc_shost_from_vport(struct lpfc_vport *vport)
1607 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1611 lpfc_set_loopback_flag(struct lpfc_hba *phba)
1613 if (phba->cfg_topology == FLAGS_LOCAL_LB)
1614 phba->link_flag |= LS_LOOPBACK_MODE;
1616 phba->link_flag &= ~LS_LOOPBACK_MODE;
1620 lpfc_is_link_up(struct lpfc_hba *phba)
1622 return phba->link_state == LPFC_LINK_UP ||
1623 phba->link_state == LPFC_CLEAR_LA ||
1624 phba->link_state == LPFC_HBA_READY;
1628 lpfc_worker_wake_up(struct lpfc_hba *phba)
1630 /* Set the lpfc data pending flag */
1631 set_bit(LPFC_DATA_READY, &phba->data_flags);
1633 /* Wake up worker thread */
1634 wake_up(&phba->work_waitq);
1639 lpfc_readl(void __iomem *addr, uint32_t *data)
1643 if (temp == 0xffffffff)
1650 lpfc_sli_read_hs(struct lpfc_hba *phba)
1653 * There was a link/board error. Read the status register to retrieve
1654 * the error event and process it.
1656 phba->sli.slistat.err_attn_event++;
1658 /* Save status info and check for unplug error */
1659 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1660 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1661 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1665 /* Clear chip Host Attention error bit */
1666 writel(HA_ERATT, phba->HAregaddr);
1667 readl(phba->HAregaddr); /* flush */
1668 phba->pport->stopped = 1;
1673 static inline struct lpfc_sli_ring *
1674 lpfc_phba_elsring(struct lpfc_hba *phba)
1676 /* Return NULL if sli_rev has become invalid due to bad fw */
1677 if (phba->sli_rev != LPFC_SLI_REV4 &&
1678 phba->sli_rev != LPFC_SLI_REV3 &&
1679 phba->sli_rev != LPFC_SLI_REV2)
1682 if (phba->sli_rev == LPFC_SLI_REV4) {
1683 if (phba->sli4_hba.els_wq)
1684 return phba->sli4_hba.els_wq->pring;
1688 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1692 * lpfc_next_online_cpu - Finds next online CPU on cpumask
1693 * @mask: Pointer to phba's cpumask member.
1694 * @start: starting cpu index
1696 * Note: If no valid cpu found, then nr_cpu_ids is returned.
1699 static inline unsigned int
1700 lpfc_next_online_cpu(const struct cpumask *mask, unsigned int start)
1702 unsigned int cpu_it;
1704 for_each_cpu_wrap(cpu_it, mask, start) {
1705 if (cpu_online(cpu_it))
1712 * lpfc_next_present_cpu - Finds next present CPU after n
1713 * @n: the cpu prior to search
1715 * Note: If no next present cpu, then fallback to first present cpu.
1718 static inline unsigned int lpfc_next_present_cpu(int n)
1722 cpu = cpumask_next(n, cpu_present_mask);
1724 if (cpu >= nr_cpu_ids)
1725 cpu = cpumask_first(cpu_present_mask);
1731 * lpfc_sli4_mod_hba_eq_delay - update EQ delay
1732 * @phba: Pointer to HBA context object.
1733 * @q: The Event Queue to update.
1734 * @delay: The delay value (in us) to be written.
1738 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq,
1741 struct lpfc_register reg_data;
1744 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id);
1745 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay);
1746 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr);
1752 * Macro that declares tables and a routine to perform enum type to
1753 * ascii string lookup.
1755 * Defines a <key,value> table for an enum. Uses xxx_INIT defines for
1756 * the enum to populate the table. Macro defines a routine (named
1757 * by caller) that will search all elements of the table for the key
1758 * and return the name string if found or "Unrecognized" if not found.
1760 #define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \
1762 enum enum_name value; \
1764 } fc_##enum_name##_e2str_names[] = enum_init; \
1765 static const char *routine(enum enum_name table_key) \
1768 char *name = "Unrecognized"; \
1770 for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\
1771 if (fc_##enum_name##_e2str_names[i].value == table_key) {\
1772 name = fc_##enum_name##_e2str_names[i].name; \
1780 * lpfc_is_vmid_enabled - returns if VMID is enabled for either switch types
1781 * @phba: Pointer to HBA context object.
1783 * Relationship between the enable, target support and if vmid tag is required
1784 * for the particular combination
1785 * ---------------------------------------------------
1786 * Switch Enable Flag Target Support VMID Needed
1787 * ---------------------------------------------------
1795 ---------------------------------------------------
1798 static inline int lpfc_is_vmid_enabled(struct lpfc_hba *phba)
1800 return phba->cfg_vmid_app_header || phba->cfg_vmid_priority_tagging;
1804 u8 get_job_ulpstatus(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1806 if (phba->sli_rev == LPFC_SLI_REV4)
1807 return bf_get(lpfc_wcqe_c_status, &iocbq->wcqe_cmpl);
1809 return iocbq->iocb.ulpStatus;
1813 u32 get_job_word4(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1815 if (phba->sli_rev == LPFC_SLI_REV4)
1816 return iocbq->wcqe_cmpl.parameter;
1818 return iocbq->iocb.un.ulpWord[4];
1822 u8 get_job_cmnd(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1824 if (phba->sli_rev == LPFC_SLI_REV4)
1825 return bf_get(wqe_cmnd, &iocbq->wqe.generic.wqe_com);
1827 return iocbq->iocb.ulpCommand;
1831 u16 get_job_ulpcontext(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1833 if (phba->sli_rev == LPFC_SLI_REV4)
1834 return bf_get(wqe_ctxt_tag, &iocbq->wqe.generic.wqe_com);
1836 return iocbq->iocb.ulpContext;
1840 u16 get_job_rcvoxid(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1842 if (phba->sli_rev == LPFC_SLI_REV4)
1843 return bf_get(wqe_rcvoxid, &iocbq->wqe.generic.wqe_com);
1845 return iocbq->iocb.unsli3.rcvsli3.ox_id;
1849 u32 get_job_data_placed(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1851 if (phba->sli_rev == LPFC_SLI_REV4)
1852 return iocbq->wcqe_cmpl.total_data_placed;
1854 return iocbq->iocb.un.genreq64.bdl.bdeSize;
1858 u32 get_job_abtsiotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1860 if (phba->sli_rev == LPFC_SLI_REV4)
1861 return iocbq->wqe.abort_cmd.wqe_com.abort_tag;
1863 return iocbq->iocb.un.acxri.abortIoTag;
1867 u32 get_job_els_rsp64_did(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
1869 if (phba->sli_rev == LPFC_SLI_REV4)
1870 return bf_get(wqe_els_did, &iocbq->wqe.els_req.wqe_dest);
1872 return iocbq->iocb.un.elsreq64.remoteID;