drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <scsi/scsi_eh.h>
  47 #include <linux/cciss_ioctl.h>
  48 #include <linux/string.h>
  49 #include <linux/bitmap.h>
  50 #include <linux/atomic.h>
  51 #include <linux/jiffies.h>
  52 #include <linux/percpu-defs.h>
  53 #include <linux/percpu.h>
  54 #include <asm/unaligned.h>
  55 #include <asm/div64.h>
  56 #include "hpsa_cmd.h"
  57 #include "hpsa.h"
  58
  59 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  60 #define HPSA_DRIVER_VERSION "3.4.4-1"
  61 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  62 #define HPSA "hpsa"
  63
  64 /* How long to wait for CISS doorbell communication */
  65 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
  66 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
  67 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
  68 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
  69 #define MAX_IOCTL_CONFIG_WAIT 1000
  70
  71 /*define how many times we will try a command because of bus resets */
  72 #define MAX_CMD_RETRIES 3
  73
  74 /* Embedded module documentation macros - see modules.h */
  75 MODULE_AUTHOR("Hewlett-Packard Company");
  76 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  77         HPSA_DRIVER_VERSION);
  78 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  79 MODULE_VERSION(HPSA_DRIVER_VERSION);
  80 MODULE_LICENSE("GPL");
  81
  82 static int hpsa_allow_any;
  83 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  84 MODULE_PARM_DESC(hpsa_allow_any,
  85                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  86 static int hpsa_simple_mode;
  87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  88 MODULE_PARM_DESC(hpsa_simple_mode,
  89         "Use 'simple mode' rather than 'performant mode'");
  90
  91 /* define the PCI info for the cards we can control */
  92 static const struct pci_device_id hpsa_pci_device_id[] = {
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 131         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 132         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 133         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 134         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 135         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 136         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 137         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 138         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 139                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 140         {0,}
 141 };
 142
 143 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 144
 145 /*  board_id = Subsystem Device ID & Vendor ID
 146  *  product = Marketing Name for the board
 147  *  access = Address of the struct of function pointers
 148  */
 149 static struct board_type products[] = {
 150         {0x3241103C, "Smart Array P212", &SA5_access},
 151         {0x3243103C, "Smart Array P410", &SA5_access},
 152         {0x3245103C, "Smart Array P410i", &SA5_access},
 153         {0x3247103C, "Smart Array P411", &SA5_access},
 154         {0x3249103C, "Smart Array P812", &SA5_access},
 155         {0x324A103C, "Smart Array P712m", &SA5_access},
 156         {0x324B103C, "Smart Array P711m", &SA5_access},
 157         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 158         {0x3350103C, "Smart Array P222", &SA5_access},
 159         {0x3351103C, "Smart Array P420", &SA5_access},
 160         {0x3352103C, "Smart Array P421", &SA5_access},
 161         {0x3353103C, "Smart Array P822", &SA5_access},
 162         {0x3354103C, "Smart Array P420i", &SA5_access},
 163         {0x3355103C, "Smart Array P220i", &SA5_access},
 164         {0x3356103C, "Smart Array P721m", &SA5_access},
 165         {0x1921103C, "Smart Array P830i", &SA5_access},
 166         {0x1922103C, "Smart Array P430", &SA5_access},
 167         {0x1923103C, "Smart Array P431", &SA5_access},
 168         {0x1924103C, "Smart Array P830", &SA5_access},
 169         {0x1926103C, "Smart Array P731m", &SA5_access},
 170         {0x1928103C, "Smart Array P230i", &SA5_access},
 171         {0x1929103C, "Smart Array P530", &SA5_access},
 172         {0x21BD103C, "Smart Array P244br", &SA5_access},
 173         {0x21BE103C, "Smart Array P741m", &SA5_access},
 174         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
 175         {0x21C0103C, "Smart Array P440ar", &SA5_access},
 176         {0x21C1103C, "Smart Array P840ar", &SA5_access},
 177         {0x21C2103C, "Smart Array P440", &SA5_access},
 178         {0x21C3103C, "Smart Array P441", &SA5_access},
 179         {0x21C4103C, "Smart Array", &SA5_access},
 180         {0x21C5103C, "Smart Array P841", &SA5_access},
 181         {0x21C6103C, "Smart HBA H244br", &SA5_access},
 182         {0x21C7103C, "Smart HBA H240", &SA5_access},
 183         {0x21C8103C, "Smart HBA H241", &SA5_access},
 184         {0x21C9103C, "Smart Array", &SA5_access},
 185         {0x21CA103C, "Smart Array P246br", &SA5_access},
 186         {0x21CB103C, "Smart Array P840", &SA5_access},
 187         {0x21CC103C, "Smart Array", &SA5_access},
 188         {0x21CD103C, "Smart Array", &SA5_access},
 189         {0x21CE103C, "Smart HBA", &SA5_access},
 190         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 191         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 192         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 193         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 194         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 195         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 196 };
 197
 198 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
 199 static const struct scsi_cmnd hpsa_cmd_busy;
 200 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
 201 static const struct scsi_cmnd hpsa_cmd_idle;
 202 static int number_of_controllers;
 203
 204 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 205 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 206 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 207
 208 #ifdef CONFIG_COMPAT
 209 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 210         void __user *arg);
 211 #endif
 212
 213 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 214 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 215 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 216         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 217         int cmd_type);
 218 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 219 #define VPD_PAGE (1 << 8)
 220
 221 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 222 static void hpsa_scan_start(struct Scsi_Host *);
 223 static int hpsa_scan_finished(struct Scsi_Host *sh,
 224         unsigned long elapsed_time);
 225 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 226
 227 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 228 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 229 static int hpsa_slave_alloc(struct scsi_device *sdev);
 230 static int hpsa_slave_configure(struct scsi_device *sdev);
 231 static void hpsa_slave_destroy(struct scsi_device *sdev);
 232
 233 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 234 static int check_for_unit_attention(struct ctlr_info *h,
 235         struct CommandList *c);
 236 static void check_ioctl_unit_attention(struct ctlr_info *h,
 237         struct CommandList *c);
 238 /* performant mode helper functions */
 239 static void calc_bucket_map(int *bucket, int num_buckets,
 240         int nsgs, int min_blocks, u32 *bucket_map);
 241 static void hpsa_free_performant_mode(struct ctlr_info *h);
 242 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 243 static inline u32 next_command(struct ctlr_info *h, u8 q);
 244 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 245                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 246                                u64 *cfg_offset);
 247 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 248                                     unsigned long *memory_bar);
 249 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 250 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 251                                      int wait_for_ready);
 252 static inline void finish_cmd(struct CommandList *c);
 253 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 254 #define BOARD_NOT_READY 0
 255 #define BOARD_READY 1
 256 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 257 static void hpsa_flush_cache(struct ctlr_info *h);
 258 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 259         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 260         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
 261 static void hpsa_command_resubmit_worker(struct work_struct *work);
 262 static u32 lockup_detected(struct ctlr_info *h);
 263 static int detect_controller_lockup(struct ctlr_info *h);
 264
 265 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 266 {
 267         unsigned long *priv = shost_priv(sdev->host);
 268         return (struct ctlr_info *) *priv;
 269 }
 270
 271 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 272 {
 273         unsigned long *priv = shost_priv(sh);
 274         return (struct ctlr_info *) *priv;
 275 }
 276
 277 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
 278 {
 279         return c->scsi_cmd == SCSI_CMD_IDLE;
 280 }
 281
 282 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
 283 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
 284                         u8 *sense_key, u8 *asc, u8 *ascq)
 285 {
 286         struct scsi_sense_hdr sshdr;
 287         bool rc;
 288
 289         *sense_key = -1;
 290         *asc = -1;
 291         *ascq = -1;
 292
 293         if (sense_data_len < 1)
 294                 return;
 295
 296         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
 297         if (rc) {
 298                 *sense_key = sshdr.sense_key;
 299                 *asc = sshdr.asc;
 300                 *ascq = sshdr.ascq;
 301         }
 302 }
 303
 304 static int check_for_unit_attention(struct ctlr_info *h,
 305         struct CommandList *c)
 306 {
 307         u8 sense_key, asc, ascq;
 308         int sense_len;
 309
 310         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
 311                 sense_len = sizeof(c->err_info->SenseInfo);
 312         else
 313                 sense_len = c->err_info->SenseLen;
 314
 315         decode_sense_data(c->err_info->SenseInfo, sense_len,
 316                                 &sense_key, &asc, &ascq);
 317         if (sense_key != UNIT_ATTENTION || asc == -1)
 318                 return 0;
 319
 320         switch (asc) {
 321         case STATE_CHANGED:
 322                 dev_warn(&h->pdev->dev,
 323                         HPSA "%d: a state change detected, command retried\n",
 324                         h->ctlr);
 325                 break;
 326         case LUN_FAILED:
 327                 dev_warn(&h->pdev->dev,
 328                         HPSA "%d: LUN failure detected\n", h->ctlr);
 329                 break;
 330         case REPORT_LUNS_CHANGED:
 331                 dev_warn(&h->pdev->dev,
 332                         HPSA "%d: report LUN data changed\n", h->ctlr);
 333         /*
 334          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 335          * target (array) devices.
 336          */
 337                 break;
 338         case POWER_OR_RESET:
 339                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 340                         "or device reset detected\n", h->ctlr);
 341                 break;
 342         case UNIT_ATTENTION_CLEARED:
 343                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 344                     "cleared by another initiator\n", h->ctlr);
 345                 break;
 346         default:
 347                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 348                         "unit attention detected\n", h->ctlr);
 349                 break;
 350         }
 351         return 1;
 352 }
 353
 354 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 355 {
 356         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 357                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 358                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 359                 return 0;
 360         dev_warn(&h->pdev->dev, HPSA "device busy");
 361         return 1;
 362 }
 363
 364 static u32 lockup_detected(struct ctlr_info *h);
 365 static ssize_t host_show_lockup_detected(struct device *dev,
 366                 struct device_attribute *attr, char *buf)
 367 {
 368         int ld;
 369         struct ctlr_info *h;
 370         struct Scsi_Host *shost = class_to_shost(dev);
 371
 372         h = shost_to_hba(shost);
 373         ld = lockup_detected(h);
 374
 375         return sprintf(buf, "ld=%d\n", ld);
 376 }
 377
 378 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 379                                          struct device_attribute *attr,
 380                                          const char *buf, size_t count)
 381 {
 382         int status, len;
 383         struct ctlr_info *h;
 384         struct Scsi_Host *shost = class_to_shost(dev);
 385         char tmpbuf[10];
 386
 387         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 388                 return -EACCES;
 389         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 390         strncpy(tmpbuf, buf, len);
 391         tmpbuf[len] = '\0';
 392         if (sscanf(tmpbuf, "%d", &status) != 1)
 393                 return -EINVAL;
 394         h = shost_to_hba(shost);
 395         h->acciopath_status = !!status;
 396         dev_warn(&h->pdev->dev,
 397                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 398                 h->acciopath_status ? "enabled" : "disabled");
 399         return count;
 400 }
 401
 402 static ssize_t host_store_raid_offload_debug(struct device *dev,
 403                                          struct device_attribute *attr,
 404                                          const char *buf, size_t count)
 405 {
 406         int debug_level, len;
 407         struct ctlr_info *h;
 408         struct Scsi_Host *shost = class_to_shost(dev);
 409         char tmpbuf[10];
 410
 411         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 412                 return -EACCES;
 413         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 414         strncpy(tmpbuf, buf, len);
 415         tmpbuf[len] = '\0';
 416         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 417                 return -EINVAL;
 418         if (debug_level < 0)
 419                 debug_level = 0;
 420         h = shost_to_hba(shost);
 421         h->raid_offload_debug = debug_level;
 422         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 423                 h->raid_offload_debug);
 424         return count;
 425 }
 426
 427 static ssize_t host_store_rescan(struct device *dev,
 428                                  struct device_attribute *attr,
 429                                  const char *buf, size_t count)
 430 {
 431         struct ctlr_info *h;
 432         struct Scsi_Host *shost = class_to_shost(dev);
 433         h = shost_to_hba(shost);
 434         hpsa_scan_start(h->scsi_host);
 435         return count;
 436 }
 437
 438 static ssize_t host_show_firmware_revision(struct device *dev,
 439              struct device_attribute *attr, char *buf)
 440 {
 441         struct ctlr_info *h;
 442         struct Scsi_Host *shost = class_to_shost(dev);
 443         unsigned char *fwrev;
 444
 445         h = shost_to_hba(shost);
 446         if (!h->hba_inquiry_data)
 447                 return 0;
 448         fwrev = &h->hba_inquiry_data[32];
 449         return snprintf(buf, 20, "%c%c%c%c\n",
 450                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 451 }
 452
 453 static ssize_t host_show_commands_outstanding(struct device *dev,
 454              struct device_attribute *attr, char *buf)
 455 {
 456         struct Scsi_Host *shost = class_to_shost(dev);
 457         struct ctlr_info *h = shost_to_hba(shost);
 458
 459         return snprintf(buf, 20, "%d\n",
 460                         atomic_read(&h->commands_outstanding));
 461 }
 462
 463 static ssize_t host_show_transport_mode(struct device *dev,
 464         struct device_attribute *attr, char *buf)
 465 {
 466         struct ctlr_info *h;
 467         struct Scsi_Host *shost = class_to_shost(dev);
 468
 469         h = shost_to_hba(shost);
 470         return snprintf(buf, 20, "%s\n",
 471                 h->transMethod & CFGTBL_Trans_Performant ?
 472                         "performant" : "simple");
 473 }
 474
 475 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 476         struct device_attribute *attr, char *buf)
 477 {
 478         struct ctlr_info *h;
 479         struct Scsi_Host *shost = class_to_shost(dev);
 480
 481         h = shost_to_hba(shost);
 482         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 483                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 484 }
 485
 486 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 487 static u32 unresettable_controller[] = {
 488         0x324a103C, /* Smart Array P712m */
 489         0x324b103C, /* Smart Array P711m */
 490         0x3223103C, /* Smart Array P800 */
 491         0x3234103C, /* Smart Array P400 */
 492         0x3235103C, /* Smart Array P400i */
 493         0x3211103C, /* Smart Array E200i */
 494         0x3212103C, /* Smart Array E200 */
 495         0x3213103C, /* Smart Array E200i */
 496         0x3214103C, /* Smart Array E200i */
 497         0x3215103C, /* Smart Array E200i */
 498         0x3237103C, /* Smart Array E500 */
 499         0x323D103C, /* Smart Array P700m */
 500         0x40800E11, /* Smart Array 5i */
 501         0x409C0E11, /* Smart Array 6400 */
 502         0x409D0E11, /* Smart Array 6400 EM */
 503         0x40700E11, /* Smart Array 5300 */
 504         0x40820E11, /* Smart Array 532 */
 505         0x40830E11, /* Smart Array 5312 */
 506         0x409A0E11, /* Smart Array 641 */
 507         0x409B0E11, /* Smart Array 642 */
 508         0x40910E11, /* Smart Array 6i */
 509 };
 510
 511 /* List of controllers which cannot even be soft reset */
 512 static u32 soft_unresettable_controller[] = {
 513         0x40800E11, /* Smart Array 5i */
 514         0x40700E11, /* Smart Array 5300 */
 515         0x40820E11, /* Smart Array 532 */
 516         0x40830E11, /* Smart Array 5312 */
 517         0x409A0E11, /* Smart Array 641 */
 518         0x409B0E11, /* Smart Array 642 */
 519         0x40910E11, /* Smart Array 6i */
 520         /* Exclude 640x boards.  These are two pci devices in one slot
 521          * which share a battery backed cache module.  One controls the
 522          * cache, the other accesses the cache through the one that controls
 523          * it.  If we reset the one controlling the cache, the other will
 524          * likely not be happy.  Just forbid resetting this conjoined mess.
 525          * The 640x isn't really supported by hpsa anyway.
 526          */
 527         0x409C0E11, /* Smart Array 6400 */
 528         0x409D0E11, /* Smart Array 6400 EM */
 529 };
 530
 531 static u32 needs_abort_tags_swizzled[] = {
 532         0x323D103C, /* Smart Array P700m */
 533         0x324a103C, /* Smart Array P712m */
 534         0x324b103C, /* SmartArray P711m */
 535 };
 536
 537 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
 538 {
 539         int i;
 540
 541         for (i = 0; i < nelems; i++)
 542                 if (a[i] == board_id)
 543                         return 1;
 544         return 0;
 545 }
 546
 547 static int ctlr_is_hard_resettable(u32 board_id)
 548 {
 549         return !board_id_in_array(unresettable_controller,
 550                         ARRAY_SIZE(unresettable_controller), board_id);
 551 }
 552
 553 static int ctlr_is_soft_resettable(u32 board_id)
 554 {
 555         return !board_id_in_array(soft_unresettable_controller,
 556                         ARRAY_SIZE(soft_unresettable_controller), board_id);
 557 }
 558
 559 static int ctlr_is_resettable(u32 board_id)
 560 {
 561         return ctlr_is_hard_resettable(board_id) ||
 562                 ctlr_is_soft_resettable(board_id);
 563 }
 564
 565 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
 566 {
 567         return board_id_in_array(needs_abort_tags_swizzled,
 568                         ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
 569 }
 570
 571 static ssize_t host_show_resettable(struct device *dev,
 572         struct device_attribute *attr, char *buf)
 573 {
 574         struct ctlr_info *h;
 575         struct Scsi_Host *shost = class_to_shost(dev);
 576
 577         h = shost_to_hba(shost);
 578         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 579 }
 580
 581 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 582 {
 583         return (scsi3addr[3] & 0xC0) == 0x40;
 584 }
 585
 586 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 587         "1(+0)ADM", "UNKNOWN"
 588 };
 589 #define HPSA_RAID_0     0
 590 #define HPSA_RAID_4     1
 591 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 592 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 593 #define HPSA_RAID_51    4
 594 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 595 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 596 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 597
 598 static ssize_t raid_level_show(struct device *dev,
 599              struct device_attribute *attr, char *buf)
 600 {
 601         ssize_t l = 0;
 602         unsigned char rlevel;
 603         struct ctlr_info *h;
 604         struct scsi_device *sdev;
 605         struct hpsa_scsi_dev_t *hdev;
 606         unsigned long flags;
 607
 608         sdev = to_scsi_device(dev);
 609         h = sdev_to_hba(sdev);
 610         spin_lock_irqsave(&h->lock, flags);
 611         hdev = sdev->hostdata;
 612         if (!hdev) {
 613                 spin_unlock_irqrestore(&h->lock, flags);
 614                 return -ENODEV;
 615         }
 616
 617         /* Is this even a logical drive? */
 618         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 619                 spin_unlock_irqrestore(&h->lock, flags);
 620                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 621                 return l;
 622         }
 623
 624         rlevel = hdev->raid_level;
 625         spin_unlock_irqrestore(&h->lock, flags);
 626         if (rlevel > RAID_UNKNOWN)
 627                 rlevel = RAID_UNKNOWN;
 628         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 629         return l;
 630 }
 631
 632 static ssize_t lunid_show(struct device *dev,
 633              struct device_attribute *attr, char *buf)
 634 {
 635         struct ctlr_info *h;
 636         struct scsi_device *sdev;
 637         struct hpsa_scsi_dev_t *hdev;
 638         unsigned long flags;
 639         unsigned char lunid[8];
 640
 641         sdev = to_scsi_device(dev);
 642         h = sdev_to_hba(sdev);
 643         spin_lock_irqsave(&h->lock, flags);
 644         hdev = sdev->hostdata;
 645         if (!hdev) {
 646                 spin_unlock_irqrestore(&h->lock, flags);
 647                 return -ENODEV;
 648         }
 649         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 650         spin_unlock_irqrestore(&h->lock, flags);
 651         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 652                 lunid[0], lunid[1], lunid[2], lunid[3],
 653                 lunid[4], lunid[5], lunid[6], lunid[7]);
 654 }
 655
 656 static ssize_t unique_id_show(struct device *dev,
 657              struct device_attribute *attr, char *buf)
 658 {
 659         struct ctlr_info *h;
 660         struct scsi_device *sdev;
 661         struct hpsa_scsi_dev_t *hdev;
 662         unsigned long flags;
 663         unsigned char sn[16];
 664
 665         sdev = to_scsi_device(dev);
 666         h = sdev_to_hba(sdev);
 667         spin_lock_irqsave(&h->lock, flags);
 668         hdev = sdev->hostdata;
 669         if (!hdev) {
 670                 spin_unlock_irqrestore(&h->lock, flags);
 671                 return -ENODEV;
 672         }
 673         memcpy(sn, hdev->device_id, sizeof(sn));
 674         spin_unlock_irqrestore(&h->lock, flags);
 675         return snprintf(buf, 16 * 2 + 2,
 676                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 677                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 678                         sn[0], sn[1], sn[2], sn[3],
 679                         sn[4], sn[5], sn[6], sn[7],
 680                         sn[8], sn[9], sn[10], sn[11],
 681                         sn[12], sn[13], sn[14], sn[15]);
 682 }
 683
 684 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 685              struct device_attribute *attr, char *buf)
 686 {
 687         struct ctlr_info *h;
 688         struct scsi_device *sdev;
 689         struct hpsa_scsi_dev_t *hdev;
 690         unsigned long flags;
 691         int offload_enabled;
 692
 693         sdev = to_scsi_device(dev);
 694         h = sdev_to_hba(sdev);
 695         spin_lock_irqsave(&h->lock, flags);
 696         hdev = sdev->hostdata;
 697         if (!hdev) {
 698                 spin_unlock_irqrestore(&h->lock, flags);
 699                 return -ENODEV;
 700         }
 701         offload_enabled = hdev->offload_enabled;
 702         spin_unlock_irqrestore(&h->lock, flags);
 703         return snprintf(buf, 20, "%d\n", offload_enabled);
 704 }
 705
 706 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 707 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 708 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 709 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 710 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 711                         host_show_hp_ssd_smart_path_enabled, NULL);
 712 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 713                 host_show_hp_ssd_smart_path_status,
 714                 host_store_hp_ssd_smart_path_status);
 715 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 716                         host_store_raid_offload_debug);
 717 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 718         host_show_firmware_revision, NULL);
 719 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 720         host_show_commands_outstanding, NULL);
 721 static DEVICE_ATTR(transport_mode, S_IRUGO,
 722         host_show_transport_mode, NULL);
 723 static DEVICE_ATTR(resettable, S_IRUGO,
 724         host_show_resettable, NULL);
 725 static DEVICE_ATTR(lockup_detected, S_IRUGO,
 726         host_show_lockup_detected, NULL);
 727
 728 static struct device_attribute *hpsa_sdev_attrs[] = {
 729         &dev_attr_raid_level,
 730         &dev_attr_lunid,
 731         &dev_attr_unique_id,
 732         &dev_attr_hp_ssd_smart_path_enabled,
 733         &dev_attr_lockup_detected,
 734         NULL,
 735 };
 736
 737 static struct device_attribute *hpsa_shost_attrs[] = {
 738         &dev_attr_rescan,
 739         &dev_attr_firmware_revision,
 740         &dev_attr_commands_outstanding,
 741         &dev_attr_transport_mode,
 742         &dev_attr_resettable,
 743         &dev_attr_hp_ssd_smart_path_status,
 744         &dev_attr_raid_offload_debug,
 745         NULL,
 746 };
 747
 748 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_ABORTS + \
 749                 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
 750
 751 static struct scsi_host_template hpsa_driver_template = {
 752         .module                 = THIS_MODULE,
 753         .name                   = HPSA,
 754         .proc_name              = HPSA,
 755         .queuecommand           = hpsa_scsi_queue_command,
 756         .scan_start             = hpsa_scan_start,
 757         .scan_finished          = hpsa_scan_finished,
 758         .change_queue_depth     = hpsa_change_queue_depth,
 759         .this_id                = -1,
 760         .use_clustering         = ENABLE_CLUSTERING,
 761         .eh_abort_handler       = hpsa_eh_abort_handler,
 762         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 763         .ioctl                  = hpsa_ioctl,
 764         .slave_alloc            = hpsa_slave_alloc,
 765         .slave_configure        = hpsa_slave_configure,
 766         .slave_destroy          = hpsa_slave_destroy,
 767 #ifdef CONFIG_COMPAT
 768         .compat_ioctl           = hpsa_compat_ioctl,
 769 #endif
 770         .sdev_attrs = hpsa_sdev_attrs,
 771         .shost_attrs = hpsa_shost_attrs,
 772         .max_sectors = 8192,
 773         .no_write_same = 1,
 774 };
 775
 776 static inline u32 next_command(struct ctlr_info *h, u8 q)
 777 {
 778         u32 a;
 779         struct reply_queue_buffer *rq = &h->reply_queue[q];
 780
 781         if (h->transMethod & CFGTBL_Trans_io_accel1)
 782                 return h->access.command_completed(h, q);
 783
 784         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 785                 return h->access.command_completed(h, q);
 786
 787         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 788                 a = rq->head[rq->current_entry];
 789                 rq->current_entry++;
 790                 atomic_dec(&h->commands_outstanding);
 791         } else {
 792                 a = FIFO_EMPTY;
 793         }
 794         /* Check for wraparound */
 795         if (rq->current_entry == h->max_commands) {
 796                 rq->current_entry = 0;
 797                 rq->wraparound ^= 1;
 798         }
 799         return a;
 800 }
 801
 802 /*
 803  * There are some special bits in the bus address of the
 804  * command that we have to set for the controller to know
 805  * how to process the command:
 806  *
 807  * Normal performant mode:
 808  * bit 0: 1 means performant mode, 0 means simple mode.
 809  * bits 1-3 = block fetch table entry
 810  * bits 4-6 = command type (== 0)
 811  *
 812  * ioaccel1 mode:
 813  * bit 0 = "performant mode" bit.
 814  * bits 1-3 = block fetch table entry
 815  * bits 4-6 = command type (== 110)
 816  * (command type is needed because ioaccel1 mode
 817  * commands are submitted through the same register as normal
 818  * mode commands, so this is how the controller knows whether
 819  * the command is normal mode or ioaccel1 mode.)
 820  *
 821  * ioaccel2 mode:
 822  * bit 0 = "performant mode" bit.
 823  * bits 1-4 = block fetch table entry (note extra bit)
 824  * bits 4-6 = not needed, because ioaccel2 mode has
 825  * a separate special register for submitting commands.
 826  */
 827
 828 /*
 829  * set_performant_mode: Modify the tag for cciss performant
 830  * set bit 0 for pull model, bits 3-1 for block fetch
 831  * register number
 832  */
 833 #define DEFAULT_REPLY_QUEUE (-1)
 834 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
 835                                         int reply_queue)
 836 {
 837         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 838                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 839                 if (unlikely(!h->msix_vector))
 840                         return;
 841                 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 842                         c->Header.ReplyQueue =
 843                                 raw_smp_processor_id() % h->nreply_queues;
 844                 else
 845                         c->Header.ReplyQueue = reply_queue % h->nreply_queues;
 846         }
 847 }
 848
 849 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 850                                                 struct CommandList *c,
 851                                                 int reply_queue)
 852 {
 853         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 854
 855         /*
 856          * Tell the controller to post the reply to the queue for this
 857          * processor.  This seems to give the best I/O throughput.
 858          */
 859         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 860                 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 861         else
 862                 cp->ReplyQueue = reply_queue % h->nreply_queues;
 863         /*
 864          * Set the bits in the address sent down to include:
 865          *  - performant mode bit (bit 0)
 866          *  - pull count (bits 1-3)
 867          *  - command type (bits 4-6)
 868          */
 869         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 870                                         IOACCEL1_BUSADDR_CMDTYPE;
 871 }
 872
 873 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
 874                                                 struct CommandList *c,
 875                                                 int reply_queue)
 876 {
 877         struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
 878                 &h->ioaccel2_cmd_pool[c->cmdindex];
 879
 880         /* Tell the controller to post the reply to the queue for this
 881          * processor.  This seems to give the best I/O throughput.
 882          */
 883         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 884                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
 885         else
 886                 cp->reply_queue = reply_queue % h->nreply_queues;
 887         /* Set the bits in the address sent down to include:
 888          *  - performant mode bit not used in ioaccel mode 2
 889          *  - pull count (bits 0-3)
 890          *  - command type isn't needed for ioaccel2
 891          */
 892         c->busaddr |= h->ioaccel2_blockFetchTable[0];
 893 }
 894
 895 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 896                                                 struct CommandList *c,
 897                                                 int reply_queue)
 898 {
 899         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 900
 901         /*
 902          * Tell the controller to post the reply to the queue for this
 903          * processor.  This seems to give the best I/O throughput.
 904          */
 905         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 906                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
 907         else
 908                 cp->reply_queue = reply_queue % h->nreply_queues;
 909         /*
 910          * Set the bits in the address sent down to include:
 911          *  - performant mode bit not used in ioaccel mode 2
 912          *  - pull count (bits 0-3)
 913          *  - command type isn't needed for ioaccel2
 914          */
 915         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 916 }
 917
 918 static int is_firmware_flash_cmd(u8 *cdb)
 919 {
 920         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 921 }
 922
 923 /*
 924  * During firmware flash, the heartbeat register may not update as frequently
 925  * as it should.  So we dial down lockup detection during firmware flash. and
 926  * dial it back up when firmware flash completes.
 927  */
 928 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 929 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 930 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 931                 struct CommandList *c)
 932 {
 933         if (!is_firmware_flash_cmd(c->Request.CDB))
 934                 return;
 935         atomic_inc(&h->firmware_flash_in_progress);
 936         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 937 }
 938
 939 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 940                 struct CommandList *c)
 941 {
 942         if (is_firmware_flash_cmd(c->Request.CDB) &&
 943                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 944                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 945 }
 946
 947 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
 948         struct CommandList *c, int reply_queue)
 949 {
 950         dial_down_lockup_detection_during_fw_flash(h, c);
 951         atomic_inc(&h->commands_outstanding);
 952         switch (c->cmd_type) {
 953         case CMD_IOACCEL1:
 954                 set_ioaccel1_performant_mode(h, c, reply_queue);
 955                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
 956                 break;
 957         case CMD_IOACCEL2:
 958                 set_ioaccel2_performant_mode(h, c, reply_queue);
 959                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
 960                 break;
 961         case IOACCEL2_TMF:
 962                 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
 963                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
 964                 break;
 965         default:
 966                 set_performant_mode(h, c, reply_queue);
 967                 h->access.submit_command(h, c);
 968         }
 969 }
 970
 971 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
 972 {
 973         if (unlikely(c->abort_pending))
 974                 return finish_cmd(c);
 975
 976         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
 977 }
 978
 979 static inline int is_hba_lunid(unsigned char scsi3addr[])
 980 {
 981         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 982 }
 983
 984 static inline int is_scsi_rev_5(struct ctlr_info *h)
 985 {
 986         if (!h->hba_inquiry_data)
 987                 return 0;
 988         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 989                 return 1;
 990         return 0;
 991 }
 992
 993 static int hpsa_find_target_lun(struct ctlr_info *h,
 994         unsigned char scsi3addr[], int bus, int *target, int *lun)
 995 {
 996         /* finds an unused bus, target, lun for a new physical device
 997          * assumes h->devlock is held
 998          */
 999         int i, found = 0;
1000         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1001
1002         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1003
1004         for (i = 0; i < h->ndevices; i++) {
1005                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1006                         __set_bit(h->dev[i]->target, lun_taken);
1007         }
1008
1009         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1010         if (i < HPSA_MAX_DEVICES) {
1011                 /* *bus = 1; */
1012                 *target = i;
1013                 *lun = 0;
1014                 found = 1;
1015         }
1016         return !found;
1017 }
1018
1019 static inline void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1020         struct hpsa_scsi_dev_t *dev, char *description)
1021 {
1022         dev_printk(level, &h->pdev->dev,
1023                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
1024                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1025                         description,
1026                         scsi_device_type(dev->devtype),
1027                         dev->vendor,
1028                         dev->model,
1029                         dev->raid_level > RAID_UNKNOWN ?
1030                                 "RAID-?" : raid_label[dev->raid_level],
1031                         dev->offload_config ? '+' : '-',
1032                         dev->offload_enabled ? '+' : '-',
1033                         dev->expose_state);
1034 }
1035
1036 /* Add an entry into h->dev[] array. */
1037 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
1038                 struct hpsa_scsi_dev_t *device,
1039                 struct hpsa_scsi_dev_t *added[], int *nadded)
1040 {
1041         /* assumes h->devlock is held */
1042         int n = h->ndevices;
1043         int i;
1044         unsigned char addr1[8], addr2[8];
1045         struct hpsa_scsi_dev_t *sd;
1046
1047         if (n >= HPSA_MAX_DEVICES) {
1048                 dev_err(&h->pdev->dev, "too many devices, some will be "
1049                         "inaccessible.\n");
1050                 return -1;
1051         }
1052
1053         /* physical devices do not have lun or target assigned until now. */
1054         if (device->lun != -1)
1055                 /* Logical device, lun is already assigned. */
1056                 goto lun_assigned;
1057
1058         /* If this device a non-zero lun of a multi-lun device
1059          * byte 4 of the 8-byte LUN addr will contain the logical
1060          * unit no, zero otherwise.
1061          */
1062         if (device->scsi3addr[4] == 0) {
1063                 /* This is not a non-zero lun of a multi-lun device */
1064                 if (hpsa_find_target_lun(h, device->scsi3addr,
1065                         device->bus, &device->target, &device->lun) != 0)
1066                         return -1;
1067                 goto lun_assigned;
1068         }
1069
1070         /* This is a non-zero lun of a multi-lun device.
1071          * Search through our list and find the device which
1072          * has the same 8 byte LUN address, excepting byte 4.
1073          * Assign the same bus and target for this new LUN.
1074          * Use the logical unit number from the firmware.
1075          */
1076         memcpy(addr1, device->scsi3addr, 8);
1077         addr1[4] = 0;
1078         for (i = 0; i < n; i++) {
1079                 sd = h->dev[i];
1080                 memcpy(addr2, sd->scsi3addr, 8);
1081                 addr2[4] = 0;
1082                 /* differ only in byte 4? */
1083                 if (memcmp(addr1, addr2, 8) == 0) {
1084                         device->bus = sd->bus;
1085                         device->target = sd->target;
1086                         device->lun = device->scsi3addr[4];
1087                         break;
1088                 }
1089         }
1090         if (device->lun == -1) {
1091                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1092                         " suspect firmware bug or unsupported hardware "
1093                         "configuration.\n");
1094                         return -1;
1095         }
1096
1097 lun_assigned:
1098
1099         h->dev[n] = device;
1100         h->ndevices++;
1101         added[*nadded] = device;
1102         (*nadded)++;
1103         hpsa_show_dev_msg(KERN_INFO, h, device,
1104                 device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1105         device->offload_to_be_enabled = device->offload_enabled;
1106         device->offload_enabled = 0;
1107         return 0;
1108 }
1109
1110 /* Update an entry in h->dev[] array. */
1111 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
1112         int entry, struct hpsa_scsi_dev_t *new_entry)
1113 {
1114         int offload_enabled;
1115         /* assumes h->devlock is held */
1116         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1117
1118         /* Raid level changed. */
1119         h->dev[entry]->raid_level = new_entry->raid_level;
1120
1121         /* Raid offload parameters changed.  Careful about the ordering. */
1122         if (new_entry->offload_config && new_entry->offload_enabled) {
1123                 /*
1124                  * if drive is newly offload_enabled, we want to copy the
1125                  * raid map data first.  If previously offload_enabled and
1126                  * offload_config were set, raid map data had better be
1127                  * the same as it was before.  if raid map data is changed
1128                  * then it had better be the case that
1129                  * h->dev[entry]->offload_enabled is currently 0.
1130                  */
1131                 h->dev[entry]->raid_map = new_entry->raid_map;
1132                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1133         }
1134         if (new_entry->hba_ioaccel_enabled) {
1135                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1136                 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1137         }
1138         h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1139         h->dev[entry]->offload_config = new_entry->offload_config;
1140         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1141         h->dev[entry]->queue_depth = new_entry->queue_depth;
1142
1143         /*
1144          * We can turn off ioaccel offload now, but need to delay turning
1145          * it on until we can update h->dev[entry]->phys_disk[], but we
1146          * can't do that until all the devices are updated.
1147          */
1148         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1149         if (!new_entry->offload_enabled)
1150                 h->dev[entry]->offload_enabled = 0;
1151
1152         offload_enabled = h->dev[entry]->offload_enabled;
1153         h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1154         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1155         h->dev[entry]->offload_enabled = offload_enabled;
1156 }
1157
1158 /* Replace an entry from h->dev[] array. */
1159 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1160         int entry, struct hpsa_scsi_dev_t *new_entry,
1161         struct hpsa_scsi_dev_t *added[], int *nadded,
1162         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1163 {
1164         /* assumes h->devlock is held */
1165         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1166         removed[*nremoved] = h->dev[entry];
1167         (*nremoved)++;
1168
1169         /*
1170          * New physical devices won't have target/lun assigned yet
1171          * so we need to preserve the values in the slot we are replacing.
1172          */
1173         if (new_entry->target == -1) {
1174                 new_entry->target = h->dev[entry]->target;
1175                 new_entry->lun = h->dev[entry]->lun;
1176         }
1177
1178         h->dev[entry] = new_entry;
1179         added[*nadded] = new_entry;
1180         (*nadded)++;
1181         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1182         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1183         new_entry->offload_enabled = 0;
1184 }
1185
1186 /* Remove an entry from h->dev[] array. */
1187 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1188         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1189 {
1190         /* assumes h->devlock is held */
1191         int i;
1192         struct hpsa_scsi_dev_t *sd;
1193
1194         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1195
1196         sd = h->dev[entry];
1197         removed[*nremoved] = h->dev[entry];
1198         (*nremoved)++;
1199
1200         for (i = entry; i < h->ndevices-1; i++)
1201                 h->dev[i] = h->dev[i+1];
1202         h->ndevices--;
1203         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1204 }
1205
1206 #define SCSI3ADDR_EQ(a, b) ( \
1207         (a)[7] == (b)[7] && \
1208         (a)[6] == (b)[6] && \
1209         (a)[5] == (b)[5] && \
1210         (a)[4] == (b)[4] && \
1211         (a)[3] == (b)[3] && \
1212         (a)[2] == (b)[2] && \
1213         (a)[1] == (b)[1] && \
1214         (a)[0] == (b)[0])
1215
1216 static void fixup_botched_add(struct ctlr_info *h,
1217         struct hpsa_scsi_dev_t *added)
1218 {
1219         /* called when scsi_add_device fails in order to re-adjust
1220          * h->dev[] to match the mid layer's view.
1221          */
1222         unsigned long flags;
1223         int i, j;
1224
1225         spin_lock_irqsave(&h->lock, flags);
1226         for (i = 0; i < h->ndevices; i++) {
1227                 if (h->dev[i] == added) {
1228                         for (j = i; j < h->ndevices-1; j++)
1229                                 h->dev[j] = h->dev[j+1];
1230                         h->ndevices--;
1231                         break;
1232                 }
1233         }
1234         spin_unlock_irqrestore(&h->lock, flags);
1235         kfree(added);
1236 }
1237
1238 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1239         struct hpsa_scsi_dev_t *dev2)
1240 {
1241         /* we compare everything except lun and target as these
1242          * are not yet assigned.  Compare parts likely
1243          * to differ first
1244          */
1245         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1246                 sizeof(dev1->scsi3addr)) != 0)
1247                 return 0;
1248         if (memcmp(dev1->device_id, dev2->device_id,
1249                 sizeof(dev1->device_id)) != 0)
1250                 return 0;
1251         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1252                 return 0;
1253         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1254                 return 0;
1255         if (dev1->devtype != dev2->devtype)
1256                 return 0;
1257         if (dev1->bus != dev2->bus)
1258                 return 0;
1259         return 1;
1260 }
1261
1262 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1263         struct hpsa_scsi_dev_t *dev2)
1264 {
1265         /* Device attributes that can change, but don't mean
1266          * that the device is a different device, nor that the OS
1267          * needs to be told anything about the change.
1268          */
1269         if (dev1->raid_level != dev2->raid_level)
1270                 return 1;
1271         if (dev1->offload_config != dev2->offload_config)
1272                 return 1;
1273         if (dev1->offload_enabled != dev2->offload_enabled)
1274                 return 1;
1275         if (dev1->queue_depth != dev2->queue_depth)
1276                 return 1;
1277         return 0;
1278 }
1279
1280 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1281  * and return needle location in *index.  If scsi3addr matches, but not
1282  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1283  * location in *index.
1284  * In the case of a minor device attribute change, such as RAID level, just
1285  * return DEVICE_UPDATED, along with the updated device's location in index.
1286  * If needle not found, return DEVICE_NOT_FOUND.
1287  */
1288 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1289         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1290         int *index)
1291 {
1292         int i;
1293 #define DEVICE_NOT_FOUND 0
1294 #define DEVICE_CHANGED 1
1295 #define DEVICE_SAME 2
1296 #define DEVICE_UPDATED 3
1297         for (i = 0; i < haystack_size; i++) {
1298                 if (haystack[i] == NULL) /* previously removed. */
1299                         continue;
1300                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1301                         *index = i;
1302                         if (device_is_the_same(needle, haystack[i])) {
1303                                 if (device_updated(needle, haystack[i]))
1304                                         return DEVICE_UPDATED;
1305                                 return DEVICE_SAME;
1306                         } else {
1307                                 /* Keep offline devices offline */
1308                                 if (needle->volume_offline)
1309                                         return DEVICE_NOT_FOUND;
1310                                 return DEVICE_CHANGED;
1311                         }
1312                 }
1313         }
1314         *index = -1;
1315         return DEVICE_NOT_FOUND;
1316 }
1317
1318 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1319                                         unsigned char scsi3addr[])
1320 {
1321         struct offline_device_entry *device;
1322         unsigned long flags;
1323
1324         /* Check to see if device is already on the list */
1325         spin_lock_irqsave(&h->offline_device_lock, flags);
1326         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1327                 if (memcmp(device->scsi3addr, scsi3addr,
1328                         sizeof(device->scsi3addr)) == 0) {
1329                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1330                         return;
1331                 }
1332         }
1333         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1334
1335         /* Device is not on the list, add it. */
1336         device = kmalloc(sizeof(*device), GFP_KERNEL);
1337         if (!device) {
1338                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1339                 return;
1340         }
1341         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1342         spin_lock_irqsave(&h->offline_device_lock, flags);
1343         list_add_tail(&device->offline_list, &h->offline_device_list);
1344         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1345 }
1346
1347 /* Print a message explaining various offline volume states */
1348 static void hpsa_show_volume_status(struct ctlr_info *h,
1349         struct hpsa_scsi_dev_t *sd)
1350 {
1351         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1352                 dev_info(&h->pdev->dev,
1353                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1354                         h->scsi_host->host_no,
1355                         sd->bus, sd->target, sd->lun);
1356         switch (sd->volume_offline) {
1357         case HPSA_LV_OK:
1358                 break;
1359         case HPSA_LV_UNDERGOING_ERASE:
1360                 dev_info(&h->pdev->dev,
1361                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1362                         h->scsi_host->host_no,
1363                         sd->bus, sd->target, sd->lun);
1364                 break;
1365         case HPSA_LV_UNDERGOING_RPI:
1366                 dev_info(&h->pdev->dev,
1367                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1368                         h->scsi_host->host_no,
1369                         sd->bus, sd->target, sd->lun);
1370                 break;
1371         case HPSA_LV_PENDING_RPI:
1372                 dev_info(&h->pdev->dev,
1373                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1374                                 h->scsi_host->host_no,
1375                                 sd->bus, sd->target, sd->lun);
1376                 break;
1377         case HPSA_LV_ENCRYPTED_NO_KEY:
1378                 dev_info(&h->pdev->dev,
1379                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1380                         h->scsi_host->host_no,
1381                         sd->bus, sd->target, sd->lun);
1382                 break;
1383         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1384                 dev_info(&h->pdev->dev,
1385                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1386                         h->scsi_host->host_no,
1387                         sd->bus, sd->target, sd->lun);
1388                 break;
1389         case HPSA_LV_UNDERGOING_ENCRYPTION:
1390                 dev_info(&h->pdev->dev,
1391                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1392                         h->scsi_host->host_no,
1393                         sd->bus, sd->target, sd->lun);
1394                 break;
1395         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1396                 dev_info(&h->pdev->dev,
1397                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1398                         h->scsi_host->host_no,
1399                         sd->bus, sd->target, sd->lun);
1400                 break;
1401         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1402                 dev_info(&h->pdev->dev,
1403                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1404                         h->scsi_host->host_no,
1405                         sd->bus, sd->target, sd->lun);
1406                 break;
1407         case HPSA_LV_PENDING_ENCRYPTION:
1408                 dev_info(&h->pdev->dev,
1409                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1410                         h->scsi_host->host_no,
1411                         sd->bus, sd->target, sd->lun);
1412                 break;
1413         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1414                 dev_info(&h->pdev->dev,
1415                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1416                         h->scsi_host->host_no,
1417                         sd->bus, sd->target, sd->lun);
1418                 break;
1419         }
1420 }
1421
1422 /*
1423  * Figure the list of physical drive pointers for a logical drive with
1424  * raid offload configured.
1425  */
1426 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1427                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1428                                 struct hpsa_scsi_dev_t *logical_drive)
1429 {
1430         struct raid_map_data *map = &logical_drive->raid_map;
1431         struct raid_map_disk_data *dd = &map->data[0];
1432         int i, j;
1433         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1434                                 le16_to_cpu(map->metadata_disks_per_row);
1435         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1436                                 le16_to_cpu(map->layout_map_count) *
1437                                 total_disks_per_row;
1438         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1439                                 total_disks_per_row;
1440         int qdepth;
1441
1442         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1443                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1444
1445         qdepth = 0;
1446         for (i = 0; i < nraid_map_entries; i++) {
1447                 logical_drive->phys_disk[i] = NULL;
1448                 if (!logical_drive->offload_config)
1449                         continue;
1450                 for (j = 0; j < ndevices; j++) {
1451                         if (dev[j]->devtype != TYPE_DISK)
1452                                 continue;
1453                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1454                                 continue;
1455                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1456                                 continue;
1457
1458                         logical_drive->phys_disk[i] = dev[j];
1459                         if (i < nphys_disk)
1460                                 qdepth = min(h->nr_cmds, qdepth +
1461                                     logical_drive->phys_disk[i]->queue_depth);
1462                         break;
1463                 }
1464
1465                 /*
1466                  * This can happen if a physical drive is removed and
1467                  * the logical drive is degraded.  In that case, the RAID
1468                  * map data will refer to a physical disk which isn't actually
1469                  * present.  And in that case offload_enabled should already
1470                  * be 0, but we'll turn it off here just in case
1471                  */
1472                 if (!logical_drive->phys_disk[i]) {
1473                         logical_drive->offload_enabled = 0;
1474                         logical_drive->offload_to_be_enabled = 0;
1475                         logical_drive->queue_depth = 8;
1476                 }
1477         }
1478         if (nraid_map_entries)
1479                 /*
1480                  * This is correct for reads, too high for full stripe writes,
1481                  * way too high for partial stripe writes
1482                  */
1483                 logical_drive->queue_depth = qdepth;
1484         else
1485                 logical_drive->queue_depth = h->nr_cmds;
1486 }
1487
1488 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1489                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1490 {
1491         int i;
1492
1493         for (i = 0; i < ndevices; i++) {
1494                 if (dev[i]->devtype != TYPE_DISK)
1495                         continue;
1496                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1497                         continue;
1498
1499                 /*
1500                  * If offload is currently enabled, the RAID map and
1501                  * phys_disk[] assignment *better* not be changing
1502                  * and since it isn't changing, we do not need to
1503                  * update it.
1504                  */
1505                 if (dev[i]->offload_enabled)
1506                         continue;
1507
1508                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1509         }
1510 }
1511
1512 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1513         struct hpsa_scsi_dev_t *sd[], int nsds)
1514 {
1515         /* sd contains scsi3 addresses and devtypes, and inquiry
1516          * data.  This function takes what's in sd to be the current
1517          * reality and updates h->dev[] to reflect that reality.
1518          */
1519         int i, entry, device_change, changes = 0;
1520         struct hpsa_scsi_dev_t *csd;
1521         unsigned long flags;
1522         struct hpsa_scsi_dev_t **added, **removed;
1523         int nadded, nremoved;
1524         struct Scsi_Host *sh = NULL;
1525
1526         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1527         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1528
1529         if (!added || !removed) {
1530                 dev_warn(&h->pdev->dev, "out of memory in "
1531                         "adjust_hpsa_scsi_table\n");
1532                 goto free_and_out;
1533         }
1534
1535         spin_lock_irqsave(&h->devlock, flags);
1536
1537         /* find any devices in h->dev[] that are not in
1538          * sd[] and remove them from h->dev[], and for any
1539          * devices which have changed, remove the old device
1540          * info and add the new device info.
1541          * If minor device attributes change, just update
1542          * the existing device structure.
1543          */
1544         i = 0;
1545         nremoved = 0;
1546         nadded = 0;
1547         while (i < h->ndevices) {
1548                 csd = h->dev[i];
1549                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1550                 if (device_change == DEVICE_NOT_FOUND) {
1551                         changes++;
1552                         hpsa_scsi_remove_entry(h, hostno, i,
1553                                 removed, &nremoved);
1554                         continue; /* remove ^^^, hence i not incremented */
1555                 } else if (device_change == DEVICE_CHANGED) {
1556                         changes++;
1557                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1558                                 added, &nadded, removed, &nremoved);
1559                         /* Set it to NULL to prevent it from being freed
1560                          * at the bottom of hpsa_update_scsi_devices()
1561                          */
1562                         sd[entry] = NULL;
1563                 } else if (device_change == DEVICE_UPDATED) {
1564                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1565                 }
1566                 i++;
1567         }
1568
1569         /* Now, make sure every device listed in sd[] is also
1570          * listed in h->dev[], adding them if they aren't found
1571          */
1572
1573         for (i = 0; i < nsds; i++) {
1574                 if (!sd[i]) /* if already added above. */
1575                         continue;
1576
1577                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1578                  * as the SCSI mid-layer does not handle such devices well.
1579                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1580                  * at 160Hz, and prevents the system from coming up.
1581                  */
1582                 if (sd[i]->volume_offline) {
1583                         hpsa_show_volume_status(h, sd[i]);
1584                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1585                         continue;
1586                 }
1587
1588                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1589                                         h->ndevices, &entry);
1590                 if (device_change == DEVICE_NOT_FOUND) {
1591                         changes++;
1592                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1593                                 added, &nadded) != 0)
1594                                 break;
1595                         sd[i] = NULL; /* prevent from being freed later. */
1596                 } else if (device_change == DEVICE_CHANGED) {
1597                         /* should never happen... */
1598                         changes++;
1599                         dev_warn(&h->pdev->dev,
1600                                 "device unexpectedly changed.\n");
1601                         /* but if it does happen, we just ignore that device */
1602                 }
1603         }
1604         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1605
1606         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1607          * any logical drives that need it enabled.
1608          */
1609         for (i = 0; i < h->ndevices; i++)
1610                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1611
1612         spin_unlock_irqrestore(&h->devlock, flags);
1613
1614         /* Monitor devices which are in one of several NOT READY states to be
1615          * brought online later. This must be done without holding h->devlock,
1616          * so don't touch h->dev[]
1617          */
1618         for (i = 0; i < nsds; i++) {
1619                 if (!sd[i]) /* if already added above. */
1620                         continue;
1621                 if (sd[i]->volume_offline)
1622                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1623         }
1624
1625         /* Don't notify scsi mid layer of any changes the first time through
1626          * (or if there are no changes) scsi_scan_host will do it later the
1627          * first time through.
1628          */
1629         if (hostno == -1 || !changes)
1630                 goto free_and_out;
1631
1632         sh = h->scsi_host;
1633         /* Notify scsi mid layer of any removed devices */
1634         for (i = 0; i < nremoved; i++) {
1635                 if (removed[i]->expose_state & HPSA_SCSI_ADD) {
1636                         struct scsi_device *sdev =
1637                                 scsi_device_lookup(sh, removed[i]->bus,
1638                                         removed[i]->target, removed[i]->lun);
1639                         if (sdev != NULL) {
1640                                 scsi_remove_device(sdev);
1641                                 scsi_device_put(sdev);
1642                         } else {
1643                                 /*
1644                                  * We don't expect to get here.
1645                                  * future cmds to this device will get selection
1646                                  * timeout as if the device was gone.
1647                                  */
1648                                 hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
1649                                         "didn't find device for removal.");
1650                         }
1651                 }
1652                 kfree(removed[i]);
1653                 removed[i] = NULL;
1654         }
1655
1656         /* Notify scsi mid layer of any added devices */
1657         for (i = 0; i < nadded; i++) {
1658                 if (!(added[i]->expose_state & HPSA_SCSI_ADD))
1659                         continue;
1660                 if (scsi_add_device(sh, added[i]->bus,
1661                         added[i]->target, added[i]->lun) == 0)
1662                         continue;
1663                 hpsa_show_dev_msg(KERN_WARNING, h, added[i],
1664                                         "addition failed, device not added.");
1665                 /* now we have to remove it from h->dev,
1666                  * since it didn't get added to scsi mid layer
1667                  */
1668                 fixup_botched_add(h, added[i]);
1669                 added[i] = NULL;
1670         }
1671
1672 free_and_out:
1673         kfree(added);
1674         kfree(removed);
1675 }
1676
1677 /*
1678  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1679  * Assume's h->devlock is held.
1680  */
1681 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1682         int bus, int target, int lun)
1683 {
1684         int i;
1685         struct hpsa_scsi_dev_t *sd;
1686
1687         for (i = 0; i < h->ndevices; i++) {
1688                 sd = h->dev[i];
1689                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1690                         return sd;
1691         }
1692         return NULL;
1693 }
1694
1695 static int hpsa_slave_alloc(struct scsi_device *sdev)
1696 {
1697         struct hpsa_scsi_dev_t *sd;
1698         unsigned long flags;
1699         struct ctlr_info *h;
1700
1701         h = sdev_to_hba(sdev);
1702         spin_lock_irqsave(&h->devlock, flags);
1703         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1704                 sdev_id(sdev), sdev->lun);
1705         if (likely(sd)) {
1706                 atomic_set(&sd->ioaccel_cmds_out, 0);
1707                 sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
1708         } else
1709                 sdev->hostdata = NULL;
1710         spin_unlock_irqrestore(&h->devlock, flags);
1711         return 0;
1712 }
1713
1714 /* configure scsi device based on internal per-device structure */
1715 static int hpsa_slave_configure(struct scsi_device *sdev)
1716 {
1717         struct hpsa_scsi_dev_t *sd;
1718         int queue_depth;
1719
1720         sd = sdev->hostdata;
1721         sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);
1722
1723         if (sd)
1724                 queue_depth = sd->queue_depth != 0 ?
1725                         sd->queue_depth : sdev->host->can_queue;
1726         else
1727                 queue_depth = sdev->host->can_queue;
1728
1729         scsi_change_queue_depth(sdev, queue_depth);
1730
1731         return 0;
1732 }
1733
1734 static void hpsa_slave_destroy(struct scsi_device *sdev)
1735 {
1736         /* nothing to do. */
1737 }
1738
1739 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1740 {
1741         int i;
1742
1743         if (!h->ioaccel2_cmd_sg_list)
1744                 return;
1745         for (i = 0; i < h->nr_cmds; i++) {
1746                 kfree(h->ioaccel2_cmd_sg_list[i]);
1747                 h->ioaccel2_cmd_sg_list[i] = NULL;
1748         }
1749         kfree(h->ioaccel2_cmd_sg_list);
1750         h->ioaccel2_cmd_sg_list = NULL;
1751 }
1752
1753 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
1754 {
1755         int i;
1756
1757         if (h->chainsize <= 0)
1758                 return 0;
1759
1760         h->ioaccel2_cmd_sg_list =
1761                 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
1762                                         GFP_KERNEL);
1763         if (!h->ioaccel2_cmd_sg_list)
1764                 return -ENOMEM;
1765         for (i = 0; i < h->nr_cmds; i++) {
1766                 h->ioaccel2_cmd_sg_list[i] =
1767                         kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
1768                                         h->maxsgentries, GFP_KERNEL);
1769                 if (!h->ioaccel2_cmd_sg_list[i])
1770                         goto clean;
1771         }
1772         return 0;
1773
1774 clean:
1775         hpsa_free_ioaccel2_sg_chain_blocks(h);
1776         return -ENOMEM;
1777 }
1778
1779 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1780 {
1781         int i;
1782
1783         if (!h->cmd_sg_list)
1784                 return;
1785         for (i = 0; i < h->nr_cmds; i++) {
1786                 kfree(h->cmd_sg_list[i]);
1787                 h->cmd_sg_list[i] = NULL;
1788         }
1789         kfree(h->cmd_sg_list);
1790         h->cmd_sg_list = NULL;
1791 }
1792
1793 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
1794 {
1795         int i;
1796
1797         if (h->chainsize <= 0)
1798                 return 0;
1799
1800         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1801                                 GFP_KERNEL);
1802         if (!h->cmd_sg_list) {
1803                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1804                 return -ENOMEM;
1805         }
1806         for (i = 0; i < h->nr_cmds; i++) {
1807                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1808                                                 h->chainsize, GFP_KERNEL);
1809                 if (!h->cmd_sg_list[i]) {
1810                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1811                         goto clean;
1812                 }
1813         }
1814         return 0;
1815
1816 clean:
1817         hpsa_free_sg_chain_blocks(h);
1818         return -ENOMEM;
1819 }
1820
1821 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
1822         struct io_accel2_cmd *cp, struct CommandList *c)
1823 {
1824         struct ioaccel2_sg_element *chain_block;
1825         u64 temp64;
1826         u32 chain_size;
1827
1828         chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
1829         chain_size = le32_to_cpu(cp->data_len);
1830         temp64 = pci_map_single(h->pdev, chain_block, chain_size,
1831                                 PCI_DMA_TODEVICE);
1832         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1833                 /* prevent subsequent unmapping */
1834                 cp->sg->address = 0;
1835                 return -1;
1836         }
1837         cp->sg->address = cpu_to_le64(temp64);
1838         return 0;
1839 }
1840
1841 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
1842         struct io_accel2_cmd *cp)
1843 {
1844         struct ioaccel2_sg_element *chain_sg;
1845         u64 temp64;
1846         u32 chain_size;
1847
1848         chain_sg = cp->sg;
1849         temp64 = le64_to_cpu(chain_sg->address);
1850         chain_size = le32_to_cpu(cp->data_len);
1851         pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
1852 }
1853
1854 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1855         struct CommandList *c)
1856 {
1857         struct SGDescriptor *chain_sg, *chain_block;
1858         u64 temp64;
1859         u32 chain_len;
1860
1861         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1862         chain_block = h->cmd_sg_list[c->cmdindex];
1863         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
1864         chain_len = sizeof(*chain_sg) *
1865                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1866         chain_sg->Len = cpu_to_le32(chain_len);
1867         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1868                                 PCI_DMA_TODEVICE);
1869         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1870                 /* prevent subsequent unmapping */
1871                 chain_sg->Addr = cpu_to_le64(0);
1872                 return -1;
1873         }
1874         chain_sg->Addr = cpu_to_le64(temp64);
1875         return 0;
1876 }
1877
1878 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1879         struct CommandList *c)
1880 {
1881         struct SGDescriptor *chain_sg;
1882
1883         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1884                 return;
1885
1886         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1887         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
1888                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1889 }
1890
1891
1892 /* Decode the various types of errors on ioaccel2 path.
1893  * Return 1 for any error that should generate a RAID path retry.
1894  * Return 0 for errors that don't require a RAID path retry.
1895  */
1896 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1897                                         struct CommandList *c,
1898                                         struct scsi_cmnd *cmd,
1899                                         struct io_accel2_cmd *c2)
1900 {
1901         int data_len;
1902         int retry = 0;
1903         u32 ioaccel2_resid = 0;
1904
1905         switch (c2->error_data.serv_response) {
1906         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1907                 switch (c2->error_data.status) {
1908                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1909                         break;
1910                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1911                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1912                         if (c2->error_data.data_present !=
1913                                         IOACCEL2_SENSE_DATA_PRESENT) {
1914                                 memset(cmd->sense_buffer, 0,
1915                                         SCSI_SENSE_BUFFERSIZE);
1916                                 break;
1917                         }
1918                         /* copy the sense data */
1919                         data_len = c2->error_data.sense_data_len;
1920                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1921                                 data_len = SCSI_SENSE_BUFFERSIZE;
1922                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1923                                 data_len =
1924                                         sizeof(c2->error_data.sense_data_buff);
1925                         memcpy(cmd->sense_buffer,
1926                                 c2->error_data.sense_data_buff, data_len);
1927                         retry = 1;
1928                         break;
1929                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1930                         retry = 1;
1931                         break;
1932                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1933                         retry = 1;
1934                         break;
1935                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1936                         retry = 1;
1937                         break;
1938                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1939                         retry = 1;
1940                         break;
1941                 default:
1942                         retry = 1;
1943                         break;
1944                 }
1945                 break;
1946         case IOACCEL2_SERV_RESPONSE_FAILURE:
1947                 switch (c2->error_data.status) {
1948                 case IOACCEL2_STATUS_SR_IO_ERROR:
1949                 case IOACCEL2_STATUS_SR_IO_ABORTED:
1950                 case IOACCEL2_STATUS_SR_OVERRUN:
1951                         retry = 1;
1952                         break;
1953                 case IOACCEL2_STATUS_SR_UNDERRUN:
1954                         cmd->result = (DID_OK << 16);           /* host byte */
1955                         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1956                         ioaccel2_resid = get_unaligned_le32(
1957                                                 &c2->error_data.resid_cnt[0]);
1958                         scsi_set_resid(cmd, ioaccel2_resid);
1959                         break;
1960                 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
1961                 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
1962                 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
1963                         /* We will get an event from ctlr to trigger rescan */
1964                         retry = 1;
1965                         break;
1966                 default:
1967                         retry = 1;
1968                 }
1969                 break;
1970         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1971                 break;
1972         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1973                 break;
1974         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1975                 retry = 1;
1976                 break;
1977         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1978                 break;
1979         default:
1980                 retry = 1;
1981                 break;
1982         }
1983
1984         return retry;   /* retry on raid path? */
1985 }
1986
1987 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
1988                 struct CommandList *c)
1989 {
1990         /*
1991          * Prevent the following race in the abort handler:
1992          *
1993          * 1. LLD is requested to abort a SCSI command
1994          * 2. The SCSI command completes
1995          * 3. The struct CommandList associated with step 2 is made available
1996          * 4. New I/O request to LLD to another LUN re-uses struct CommandList
1997          * 5. Abort handler follows scsi_cmnd->host_scribble and
1998          *    finds struct CommandList and tries to aborts it
1999          * Now we have aborted the wrong command.
2000          *
2001          * Clear c->scsi_cmd here so that the abort handler will know this
2002          * command has completed.  Then, check to see if the abort handler is
2003          * waiting for this command, and, if so, wake it.
2004          */
2005         c->scsi_cmd = SCSI_CMD_IDLE;
2006         mb(); /* Ensure c->scsi_cmd is set to SCSI_CMD_IDLE */
2007         if (c->abort_pending) {
2008                 c->abort_pending = false;
2009                 wake_up_all(&h->abort_sync_wait_queue);
2010         }
2011 }
2012
2013 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2014                 struct CommandList *c, struct scsi_cmnd *cmd)
2015 {
2016         hpsa_cmd_resolve_events(h, c);
2017         cmd_free(h, c);
2018         cmd->scsi_done(cmd);
2019 }
2020
2021 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2022 {
2023         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2024         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2025 }
2026
2027 static void hpsa_set_scsi_cmd_aborted(struct scsi_cmnd *cmd)
2028 {
2029         cmd->result = DID_ABORT << 16;
2030 }
2031
2032 static void hpsa_cmd_abort_and_free(struct ctlr_info *h, struct CommandList *c,
2033                                     struct scsi_cmnd *cmd)
2034 {
2035         hpsa_set_scsi_cmd_aborted(cmd);
2036         dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2037                          c->Request.CDB, c->err_info->ScsiStatus);
2038         hpsa_cmd_resolve_events(h, c);
2039         cmd_free(h, c);         /* FIX-ME:  change to cmd_tagged_free(h, c) */
2040 }
2041
2042 static void process_ioaccel2_completion(struct ctlr_info *h,
2043                 struct CommandList *c, struct scsi_cmnd *cmd,
2044                 struct hpsa_scsi_dev_t *dev)
2045 {
2046         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2047
2048         /* check for good status */
2049         if (likely(c2->error_data.serv_response == 0 &&
2050                         c2->error_data.status == 0))
2051                 return hpsa_cmd_free_and_done(h, c, cmd);
2052
2053         /* don't requeue a command which is being aborted */
2054         if (unlikely(c->abort_pending))
2055                 return hpsa_cmd_abort_and_free(h, c, cmd);
2056
2057         /*
2058          * Any RAID offload error results in retry which will use
2059          * the normal I/O path so the controller can handle whatever's
2060          * wrong.
2061          */
2062         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
2063                 c2->error_data.serv_response ==
2064                         IOACCEL2_SERV_RESPONSE_FAILURE) {
2065                 if (c2->error_data.status ==
2066                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
2067                         dev->offload_enabled = 0;
2068
2069                 return hpsa_retry_cmd(h, c);
2070         }
2071
2072         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
2073                 return hpsa_retry_cmd(h, c);
2074
2075         return hpsa_cmd_free_and_done(h, c, cmd);
2076 }
2077
2078 /* Returns 0 on success, < 0 otherwise. */
2079 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2080                                         struct CommandList *cp)
2081 {
2082         u8 tmf_status = cp->err_info->ScsiStatus;
2083
2084         switch (tmf_status) {
2085         case CISS_TMF_COMPLETE:
2086                 /*
2087                  * CISS_TMF_COMPLETE never happens, instead,
2088                  * ei->CommandStatus == 0 for this case.
2089                  */
2090         case CISS_TMF_SUCCESS:
2091                 return 0;
2092         case CISS_TMF_INVALID_FRAME:
2093         case CISS_TMF_NOT_SUPPORTED:
2094         case CISS_TMF_FAILED:
2095         case CISS_TMF_WRONG_LUN:
2096         case CISS_TMF_OVERLAPPED_TAG:
2097                 break;
2098         default:
2099                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2100                                 tmf_status);
2101                 break;
2102         }
2103         return -tmf_status;
2104 }
2105
2106 static void complete_scsi_command(struct CommandList *cp)
2107 {
2108         struct scsi_cmnd *cmd;
2109         struct ctlr_info *h;
2110         struct ErrorInfo *ei;
2111         struct hpsa_scsi_dev_t *dev;
2112         struct io_accel2_cmd *c2;
2113
2114         u8 sense_key;
2115         u8 asc;      /* additional sense code */
2116         u8 ascq;     /* additional sense code qualifier */
2117         unsigned long sense_data_size;
2118
2119         ei = cp->err_info;
2120         cmd = cp->scsi_cmd;
2121         h = cp->h;
2122         dev = cmd->device->hostdata;
2123         c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2124
2125         scsi_dma_unmap(cmd); /* undo the DMA mappings */
2126         if ((cp->cmd_type == CMD_SCSI) &&
2127                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2128                 hpsa_unmap_sg_chain_block(h, cp);
2129
2130         if ((cp->cmd_type == CMD_IOACCEL2) &&
2131                 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2132                 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2133
2134         cmd->result = (DID_OK << 16);           /* host byte */
2135         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2136
2137         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
2138                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2139
2140         /*
2141          * We check for lockup status here as it may be set for
2142          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2143          * fail_all_oustanding_cmds()
2144          */
2145         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2146                 /* DID_NO_CONNECT will prevent a retry */
2147                 cmd->result = DID_NO_CONNECT << 16;
2148                 return hpsa_cmd_free_and_done(h, cp, cmd);
2149         }
2150
2151         if (cp->cmd_type == CMD_IOACCEL2)
2152                 return process_ioaccel2_completion(h, cp, cmd, dev);
2153
2154         scsi_set_resid(cmd, ei->ResidualCnt);
2155         if (ei->CommandStatus == 0)
2156                 return hpsa_cmd_free_and_done(h, cp, cmd);
2157
2158         /* For I/O accelerator commands, copy over some fields to the normal
2159          * CISS header used below for error handling.
2160          */
2161         if (cp->cmd_type == CMD_IOACCEL1) {
2162                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2163                 cp->Header.SGList = scsi_sg_count(cmd);
2164                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2165                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2166                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
2167                 cp->Header.tag = c->tag;
2168                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2169                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2170
2171                 /* Any RAID offload error results in retry which will use
2172                  * the normal I/O path so the controller can handle whatever's
2173                  * wrong.
2174                  */
2175                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
2176                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2177                                 dev->offload_enabled = 0;
2178                         if (!cp->abort_pending)
2179                                 return hpsa_retry_cmd(h, cp);
2180                 }
2181         }
2182
2183         if (cp->abort_pending)
2184                 ei->CommandStatus = CMD_ABORTED;
2185
2186         /* an error has occurred */
2187         switch (ei->CommandStatus) {
2188
2189         case CMD_TARGET_STATUS:
2190                 cmd->result |= ei->ScsiStatus;
2191                 /* copy the sense data */
2192                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2193                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2194                 else
2195                         sense_data_size = sizeof(ei->SenseInfo);
2196                 if (ei->SenseLen < sense_data_size)
2197                         sense_data_size = ei->SenseLen;
2198                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2199                 if (ei->ScsiStatus)
2200                         decode_sense_data(ei->SenseInfo, sense_data_size,
2201                                 &sense_key, &asc, &ascq);
2202                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2203                         if (sense_key == ABORTED_COMMAND) {
2204                                 cmd->result |= DID_SOFT_ERROR << 16;
2205                                 break;
2206                         }
2207                         break;
2208                 }
2209                 /* Problem was not a check condition
2210                  * Pass it up to the upper layers...
2211                  */
2212                 if (ei->ScsiStatus) {
2213                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2214                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2215                                 "Returning result: 0x%x\n",
2216                                 cp, ei->ScsiStatus,
2217                                 sense_key, asc, ascq,
2218                                 cmd->result);
2219                 } else {  /* scsi status is zero??? How??? */
2220                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2221                                 "Returning no connection.\n", cp),
2222
2223                         /* Ordinarily, this case should never happen,
2224                          * but there is a bug in some released firmware
2225                          * revisions that allows it to happen if, for
2226                          * example, a 4100 backplane loses power and
2227                          * the tape drive is in it.  We assume that
2228                          * it's a fatal error of some kind because we
2229                          * can't show that it wasn't. We will make it
2230                          * look like selection timeout since that is
2231                          * the most common reason for this to occur,
2232                          * and it's severe enough.
2233                          */
2234
2235                         cmd->result = DID_NO_CONNECT << 16;
2236                 }
2237                 break;
2238
2239         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2240                 break;
2241         case CMD_DATA_OVERRUN:
2242                 dev_warn(&h->pdev->dev,
2243                         "CDB %16phN data overrun\n", cp->Request.CDB);
2244                 break;
2245         case CMD_INVALID: {
2246                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2247                 print_cmd(cp); */
2248                 /* We get CMD_INVALID if you address a non-existent device
2249                  * instead of a selection timeout (no response).  You will
2250                  * see this if you yank out a drive, then try to access it.
2251                  * This is kind of a shame because it means that any other
2252                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2253                  * missing target. */
2254                 cmd->result = DID_NO_CONNECT << 16;
2255         }
2256                 break;
2257         case CMD_PROTOCOL_ERR:
2258                 cmd->result = DID_ERROR << 16;
2259                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2260                                 cp->Request.CDB);
2261                 break;
2262         case CMD_HARDWARE_ERR:
2263                 cmd->result = DID_ERROR << 16;
2264                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2265                         cp->Request.CDB);
2266                 break;
2267         case CMD_CONNECTION_LOST:
2268                 cmd->result = DID_ERROR << 16;
2269                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2270                         cp->Request.CDB);
2271                 break;
2272         case CMD_ABORTED:
2273                 /* Return now to avoid calling scsi_done(). */
2274                 return hpsa_cmd_abort_and_free(h, cp, cmd);
2275         case CMD_ABORT_FAILED:
2276                 cmd->result = DID_ERROR << 16;
2277                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2278                         cp->Request.CDB);
2279                 break;
2280         case CMD_UNSOLICITED_ABORT:
2281                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2282                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2283                         cp->Request.CDB);
2284                 break;
2285         case CMD_TIMEOUT:
2286                 cmd->result = DID_TIME_OUT << 16;
2287                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2288                         cp->Request.CDB);
2289                 break;
2290         case CMD_UNABORTABLE:
2291                 cmd->result = DID_ERROR << 16;
2292                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2293                 break;
2294         case CMD_TMF_STATUS:
2295                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2296                         cmd->result = DID_ERROR << 16;
2297                 break;
2298         case CMD_IOACCEL_DISABLED:
2299                 /* This only handles the direct pass-through case since RAID
2300                  * offload is handled above.  Just attempt a retry.
2301                  */
2302                 cmd->result = DID_SOFT_ERROR << 16;
2303                 dev_warn(&h->pdev->dev,
2304                                 "cp %p had HP SSD Smart Path error\n", cp);
2305                 break;
2306         default:
2307                 cmd->result = DID_ERROR << 16;
2308                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2309                                 cp, ei->CommandStatus);
2310         }
2311
2312         return hpsa_cmd_free_and_done(h, cp, cmd);
2313 }
2314
2315 static void hpsa_pci_unmap(struct pci_dev *pdev,
2316         struct CommandList *c, int sg_used, int data_direction)
2317 {
2318         int i;
2319
2320         for (i = 0; i < sg_used; i++)
2321                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2322                                 le32_to_cpu(c->SG[i].Len),
2323                                 data_direction);
2324 }
2325
2326 static int hpsa_map_one(struct pci_dev *pdev,
2327                 struct CommandList *cp,
2328                 unsigned char *buf,
2329                 size_t buflen,
2330                 int data_direction)
2331 {
2332         u64 addr64;
2333
2334         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2335                 cp->Header.SGList = 0;
2336                 cp->Header.SGTotal = cpu_to_le16(0);
2337                 return 0;
2338         }
2339
2340         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2341         if (dma_mapping_error(&pdev->dev, addr64)) {
2342                 /* Prevent subsequent unmap of something never mapped */
2343                 cp->Header.SGList = 0;
2344                 cp->Header.SGTotal = cpu_to_le16(0);
2345                 return -1;
2346         }
2347         cp->SG[0].Addr = cpu_to_le64(addr64);
2348         cp->SG[0].Len = cpu_to_le32(buflen);
2349         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2350         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2351         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2352         return 0;
2353 }
2354
2355 #define NO_TIMEOUT ((unsigned long) -1)
2356 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2357 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2358         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2359 {
2360         DECLARE_COMPLETION_ONSTACK(wait);
2361
2362         c->waiting = &wait;
2363         __enqueue_cmd_and_start_io(h, c, reply_queue);
2364         if (timeout_msecs == NO_TIMEOUT) {
2365                 /* TODO: get rid of this no-timeout thing */
2366                 wait_for_completion_io(&wait);
2367                 return IO_OK;
2368         }
2369         if (!wait_for_completion_io_timeout(&wait,
2370                                         msecs_to_jiffies(timeout_msecs))) {
2371                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2372                 return -ETIMEDOUT;
2373         }
2374         return IO_OK;
2375 }
2376
2377 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2378                                    int reply_queue, unsigned long timeout_msecs)
2379 {
2380         if (unlikely(lockup_detected(h))) {
2381                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2382                 return IO_OK;
2383         }
2384         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2385 }
2386
2387 static u32 lockup_detected(struct ctlr_info *h)
2388 {
2389         int cpu;
2390         u32 rc, *lockup_detected;
2391
2392         cpu = get_cpu();
2393         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2394         rc = *lockup_detected;
2395         put_cpu();
2396         return rc;
2397 }
2398
2399 #define MAX_DRIVER_CMD_RETRIES 25
2400 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2401         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2402 {
2403         int backoff_time = 10, retry_count = 0;
2404         int rc;
2405
2406         do {
2407                 memset(c->err_info, 0, sizeof(*c->err_info));
2408                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2409                                                   timeout_msecs);
2410                 if (rc)
2411                         break;
2412                 retry_count++;
2413                 if (retry_count > 3) {
2414                         msleep(backoff_time);
2415                         if (backoff_time < 1000)
2416                                 backoff_time *= 2;
2417                 }
2418         } while ((check_for_unit_attention(h, c) ||
2419                         check_for_busy(h, c)) &&
2420                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2421         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2422         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2423                 rc = -EIO;
2424         return rc;
2425 }
2426
2427 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2428                                 struct CommandList *c)
2429 {
2430         const u8 *cdb = c->Request.CDB;
2431         const u8 *lun = c->Header.LUN.LunAddrBytes;
2432
2433         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2434         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2435                 txt, lun[0], lun[1], lun[2], lun[3],
2436                 lun[4], lun[5], lun[6], lun[7],
2437                 cdb[0], cdb[1], cdb[2], cdb[3],
2438                 cdb[4], cdb[5], cdb[6], cdb[7],
2439                 cdb[8], cdb[9], cdb[10], cdb[11],
2440                 cdb[12], cdb[13], cdb[14], cdb[15]);
2441 }
2442
2443 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2444                         struct CommandList *cp)
2445 {
2446         const struct ErrorInfo *ei = cp->err_info;
2447         struct device *d = &cp->h->pdev->dev;
2448         u8 sense_key, asc, ascq;
2449         int sense_len;
2450
2451         switch (ei->CommandStatus) {
2452         case CMD_TARGET_STATUS:
2453                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2454                         sense_len = sizeof(ei->SenseInfo);
2455                 else
2456                         sense_len = ei->SenseLen;
2457                 decode_sense_data(ei->SenseInfo, sense_len,
2458                                         &sense_key, &asc, &ascq);
2459                 hpsa_print_cmd(h, "SCSI status", cp);
2460                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2461                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2462                                 sense_key, asc, ascq);
2463                 else
2464                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2465                 if (ei->ScsiStatus == 0)
2466                         dev_warn(d, "SCSI status is abnormally zero.  "
2467                         "(probably indicates selection timeout "
2468                         "reported incorrectly due to a known "
2469                         "firmware bug, circa July, 2001.)\n");
2470                 break;
2471         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2472                 break;
2473         case CMD_DATA_OVERRUN:
2474                 hpsa_print_cmd(h, "overrun condition", cp);
2475                 break;
2476         case CMD_INVALID: {
2477                 /* controller unfortunately reports SCSI passthru's
2478                  * to non-existent targets as invalid commands.
2479                  */
2480                 hpsa_print_cmd(h, "invalid command", cp);
2481                 dev_warn(d, "probably means device no longer present\n");
2482                 }
2483                 break;
2484         case CMD_PROTOCOL_ERR:
2485                 hpsa_print_cmd(h, "protocol error", cp);
2486                 break;
2487         case CMD_HARDWARE_ERR:
2488                 hpsa_print_cmd(h, "hardware error", cp);
2489                 break;
2490         case CMD_CONNECTION_LOST:
2491                 hpsa_print_cmd(h, "connection lost", cp);
2492                 break;
2493         case CMD_ABORTED:
2494                 hpsa_print_cmd(h, "aborted", cp);
2495                 break;
2496         case CMD_ABORT_FAILED:
2497                 hpsa_print_cmd(h, "abort failed", cp);
2498                 break;
2499         case CMD_UNSOLICITED_ABORT:
2500                 hpsa_print_cmd(h, "unsolicited abort", cp);
2501                 break;
2502         case CMD_TIMEOUT:
2503                 hpsa_print_cmd(h, "timed out", cp);
2504                 break;
2505         case CMD_UNABORTABLE:
2506                 hpsa_print_cmd(h, "unabortable", cp);
2507                 break;
2508         case CMD_CTLR_LOCKUP:
2509                 hpsa_print_cmd(h, "controller lockup detected", cp);
2510                 break;
2511         default:
2512                 hpsa_print_cmd(h, "unknown status", cp);
2513                 dev_warn(d, "Unknown command status %x\n",
2514                                 ei->CommandStatus);
2515         }
2516 }
2517
2518 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2519                         u16 page, unsigned char *buf,
2520                         unsigned char bufsize)
2521 {
2522         int rc = IO_OK;
2523         struct CommandList *c;
2524         struct ErrorInfo *ei;
2525
2526         c = cmd_alloc(h);
2527
2528         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2529                         page, scsi3addr, TYPE_CMD)) {
2530                 rc = -1;
2531                 goto out;
2532         }
2533         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2534                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2535         if (rc)
2536                 goto out;
2537         ei = c->err_info;
2538         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2539                 hpsa_scsi_interpret_error(h, c);
2540                 rc = -1;
2541         }
2542 out:
2543         cmd_free(h, c);
2544         return rc;
2545 }
2546
2547 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2548                 unsigned char *scsi3addr, unsigned char page,
2549                 struct bmic_controller_parameters *buf, size_t bufsize)
2550 {
2551         int rc = IO_OK;
2552         struct CommandList *c;
2553         struct ErrorInfo *ei;
2554
2555         c = cmd_alloc(h);
2556         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2557                         page, scsi3addr, TYPE_CMD)) {
2558                 rc = -1;
2559                 goto out;
2560         }
2561         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2562                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2563         if (rc)
2564                 goto out;
2565         ei = c->err_info;
2566         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2567                 hpsa_scsi_interpret_error(h, c);
2568                 rc = -1;
2569         }
2570 out:
2571         cmd_free(h, c);
2572         return rc;
2573 }
2574
2575 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2576         u8 reset_type, int reply_queue)
2577 {
2578         int rc = IO_OK;
2579         struct CommandList *c;
2580         struct ErrorInfo *ei;
2581
2582         c = cmd_alloc(h);
2583
2584
2585         /* fill_cmd can't fail here, no data buffer to map. */
2586         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2587                         scsi3addr, TYPE_MSG);
2588         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2589         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2590         if (rc) {
2591                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2592                 goto out;
2593         }
2594         /* no unmap needed here because no data xfer. */
2595
2596         ei = c->err_info;
2597         if (ei->CommandStatus != 0) {
2598                 hpsa_scsi_interpret_error(h, c);
2599                 rc = -1;
2600         }
2601 out:
2602         cmd_free(h, c);
2603         return rc;
2604 }
2605
2606 static void hpsa_get_raid_level(struct ctlr_info *h,
2607         unsigned char *scsi3addr, unsigned char *raid_level)
2608 {
2609         int rc;
2610         unsigned char *buf;
2611
2612         *raid_level = RAID_UNKNOWN;
2613         buf = kzalloc(64, GFP_KERNEL);
2614         if (!buf)
2615                 return;
2616         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2617         if (rc == 0)
2618                 *raid_level = buf[8];
2619         if (*raid_level > RAID_UNKNOWN)
2620                 *raid_level = RAID_UNKNOWN;
2621         kfree(buf);
2622         return;
2623 }
2624
2625 #define HPSA_MAP_DEBUG
2626 #ifdef HPSA_MAP_DEBUG
2627 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2628                                 struct raid_map_data *map_buff)
2629 {
2630         struct raid_map_disk_data *dd = &map_buff->data[0];
2631         int map, row, col;
2632         u16 map_cnt, row_cnt, disks_per_row;
2633
2634         if (rc != 0)
2635                 return;
2636
2637         /* Show details only if debugging has been activated. */
2638         if (h->raid_offload_debug < 2)
2639                 return;
2640
2641         dev_info(&h->pdev->dev, "structure_size = %u\n",
2642                                 le32_to_cpu(map_buff->structure_size));
2643         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2644                         le32_to_cpu(map_buff->volume_blk_size));
2645         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2646                         le64_to_cpu(map_buff->volume_blk_cnt));
2647         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2648                         map_buff->phys_blk_shift);
2649         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2650                         map_buff->parity_rotation_shift);
2651         dev_info(&h->pdev->dev, "strip_size = %u\n",
2652                         le16_to_cpu(map_buff->strip_size));
2653         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2654                         le64_to_cpu(map_buff->disk_starting_blk));
2655         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2656                         le64_to_cpu(map_buff->disk_blk_cnt));
2657         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2658                         le16_to_cpu(map_buff->data_disks_per_row));
2659         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2660                         le16_to_cpu(map_buff->metadata_disks_per_row));
2661         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2662                         le16_to_cpu(map_buff->row_cnt));
2663         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2664                         le16_to_cpu(map_buff->layout_map_count));
2665         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2666                         le16_to_cpu(map_buff->flags));
2667         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2668                         le16_to_cpu(map_buff->flags) &
2669                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2670         dev_info(&h->pdev->dev, "dekindex = %u\n",
2671                         le16_to_cpu(map_buff->dekindex));
2672         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2673         for (map = 0; map < map_cnt; map++) {
2674                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2675                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2676                 for (row = 0; row < row_cnt; row++) {
2677                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2678                         disks_per_row =
2679                                 le16_to_cpu(map_buff->data_disks_per_row);
2680                         for (col = 0; col < disks_per_row; col++, dd++)
2681                                 dev_info(&h->pdev->dev,
2682                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2683                                         col, dd->ioaccel_handle,
2684                                         dd->xor_mult[0], dd->xor_mult[1]);
2685                         disks_per_row =
2686                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2687                         for (col = 0; col < disks_per_row; col++, dd++)
2688                                 dev_info(&h->pdev->dev,
2689                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2690                                         col, dd->ioaccel_handle,
2691                                         dd->xor_mult[0], dd->xor_mult[1]);
2692                 }
2693         }
2694 }
2695 #else
2696 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2697                         __attribute__((unused)) int rc,
2698                         __attribute__((unused)) struct raid_map_data *map_buff)
2699 {
2700 }
2701 #endif
2702
2703 static int hpsa_get_raid_map(struct ctlr_info *h,
2704         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2705 {
2706         int rc = 0;
2707         struct CommandList *c;
2708         struct ErrorInfo *ei;
2709
2710         c = cmd_alloc(h);
2711
2712         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2713                         sizeof(this_device->raid_map), 0,
2714                         scsi3addr, TYPE_CMD)) {
2715                 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
2716                 cmd_free(h, c);
2717                 return -1;
2718         }
2719         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2720                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2721         if (rc)
2722                 goto out;
2723         ei = c->err_info;
2724         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2725                 hpsa_scsi_interpret_error(h, c);
2726                 rc = -1;
2727                 goto out;
2728         }
2729         cmd_free(h, c);
2730
2731         /* @todo in the future, dynamically allocate RAID map memory */
2732         if (le32_to_cpu(this_device->raid_map.structure_size) >
2733                                 sizeof(this_device->raid_map)) {
2734                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2735                 rc = -1;
2736         }
2737         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2738         return rc;
2739 out:
2740         cmd_free(h, c);
2741         return rc;
2742 }
2743
2744 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
2745                 unsigned char scsi3addr[], u16 bmic_device_index,
2746                 struct bmic_identify_physical_device *buf, size_t bufsize)
2747 {
2748         int rc = IO_OK;
2749         struct CommandList *c;
2750         struct ErrorInfo *ei;
2751
2752         c = cmd_alloc(h);
2753         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
2754                 0, RAID_CTLR_LUNID, TYPE_CMD);
2755         if (rc)
2756                 goto out;
2757
2758         c->Request.CDB[2] = bmic_device_index & 0xff;
2759         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
2760
2761         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
2762                                                 NO_TIMEOUT);
2763         ei = c->err_info;
2764         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2765                 hpsa_scsi_interpret_error(h, c);
2766                 rc = -1;
2767         }
2768 out:
2769         cmd_free(h, c);
2770         return rc;
2771 }
2772
2773 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2774         unsigned char scsi3addr[], u8 page)
2775 {
2776         int rc;
2777         int i;
2778         int pages;
2779         unsigned char *buf, bufsize;
2780
2781         buf = kzalloc(256, GFP_KERNEL);
2782         if (!buf)
2783                 return 0;
2784
2785         /* Get the size of the page list first */
2786         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2787                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2788                                 buf, HPSA_VPD_HEADER_SZ);
2789         if (rc != 0)
2790                 goto exit_unsupported;
2791         pages = buf[3];
2792         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2793                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2794         else
2795                 bufsize = 255;
2796
2797         /* Get the whole VPD page list */
2798         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2799                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2800                                 buf, bufsize);
2801         if (rc != 0)
2802                 goto exit_unsupported;
2803
2804         pages = buf[3];
2805         for (i = 1; i <= pages; i++)
2806                 if (buf[3 + i] == page)
2807                         goto exit_supported;
2808 exit_unsupported:
2809         kfree(buf);
2810         return 0;
2811 exit_supported:
2812         kfree(buf);
2813         return 1;
2814 }
2815
2816 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2817         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2818 {
2819         int rc;
2820         unsigned char *buf;
2821         u8 ioaccel_status;
2822
2823         this_device->offload_config = 0;
2824         this_device->offload_enabled = 0;
2825         this_device->offload_to_be_enabled = 0;
2826
2827         buf = kzalloc(64, GFP_KERNEL);
2828         if (!buf)
2829                 return;
2830         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2831                 goto out;
2832         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2833                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2834         if (rc != 0)
2835                 goto out;
2836
2837 #define IOACCEL_STATUS_BYTE 4
2838 #define OFFLOAD_CONFIGURED_BIT 0x01
2839 #define OFFLOAD_ENABLED_BIT 0x02
2840         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2841         this_device->offload_config =
2842                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2843         if (this_device->offload_config) {
2844                 this_device->offload_enabled =
2845                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2846                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2847                         this_device->offload_enabled = 0;
2848         }
2849         this_device->offload_to_be_enabled = this_device->offload_enabled;
2850 out:
2851         kfree(buf);
2852         return;
2853 }
2854
2855 /* Get the device id from inquiry page 0x83 */
2856 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2857         unsigned char *device_id, int buflen)
2858 {
2859         int rc;
2860         unsigned char *buf;
2861
2862         if (buflen > 16)
2863                 buflen = 16;
2864         buf = kzalloc(64, GFP_KERNEL);
2865         if (!buf)
2866                 return -ENOMEM;
2867         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2868         if (rc == 0)
2869                 memcpy(device_id, &buf[8], buflen);
2870         kfree(buf);
2871         return rc != 0;
2872 }
2873
2874 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2875                 void *buf, int bufsize,
2876                 int extended_response)
2877 {
2878         int rc = IO_OK;
2879         struct CommandList *c;
2880         unsigned char scsi3addr[8];
2881         struct ErrorInfo *ei;
2882
2883         c = cmd_alloc(h);
2884
2885         /* address the controller */
2886         memset(scsi3addr, 0, sizeof(scsi3addr));
2887         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2888                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2889                 rc = -1;
2890                 goto out;
2891         }
2892         if (extended_response)
2893                 c->Request.CDB[1] = extended_response;
2894         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2895                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2896         if (rc)
2897                 goto out;
2898         ei = c->err_info;
2899         if (ei->CommandStatus != 0 &&
2900             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2901                 hpsa_scsi_interpret_error(h, c);
2902                 rc = -1;
2903         } else {
2904                 struct ReportLUNdata *rld = buf;
2905
2906                 if (rld->extended_response_flag != extended_response) {
2907                         dev_err(&h->pdev->dev,
2908                                 "report luns requested format %u, got %u\n",
2909                                 extended_response,
2910                                 rld->extended_response_flag);
2911                         rc = -1;
2912                 }
2913         }
2914 out:
2915         cmd_free(h, c);
2916         return rc;
2917 }
2918
2919 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2920                 struct ReportExtendedLUNdata *buf, int bufsize)
2921 {
2922         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
2923                                                 HPSA_REPORT_PHYS_EXTENDED);
2924 }
2925
2926 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2927                 struct ReportLUNdata *buf, int bufsize)
2928 {
2929         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2930 }
2931
2932 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2933         int bus, int target, int lun)
2934 {
2935         device->bus = bus;
2936         device->target = target;
2937         device->lun = lun;
2938 }
2939
2940 /* Use VPD inquiry to get details of volume status */
2941 static int hpsa_get_volume_status(struct ctlr_info *h,
2942                                         unsigned char scsi3addr[])
2943 {
2944         int rc;
2945         int status;
2946         int size;
2947         unsigned char *buf;
2948
2949         buf = kzalloc(64, GFP_KERNEL);
2950         if (!buf)
2951                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2952
2953         /* Does controller have VPD for logical volume status? */
2954         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2955                 goto exit_failed;
2956
2957         /* Get the size of the VPD return buffer */
2958         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2959                                         buf, HPSA_VPD_HEADER_SZ);
2960         if (rc != 0)
2961                 goto exit_failed;
2962         size = buf[3];
2963
2964         /* Now get the whole VPD buffer */
2965         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2966                                         buf, size + HPSA_VPD_HEADER_SZ);
2967         if (rc != 0)
2968                 goto exit_failed;
2969         status = buf[4]; /* status byte */
2970
2971         kfree(buf);
2972         return status;
2973 exit_failed:
2974         kfree(buf);
2975         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2976 }
2977
2978 /* Determine offline status of a volume.
2979  * Return either:
2980  *  0 (not offline)
2981  *  0xff (offline for unknown reasons)
2982  *  # (integer code indicating one of several NOT READY states
2983  *     describing why a volume is to be kept offline)
2984  */
2985 static int hpsa_volume_offline(struct ctlr_info *h,
2986                                         unsigned char scsi3addr[])
2987 {
2988         struct CommandList *c;
2989         unsigned char *sense;
2990         u8 sense_key, asc, ascq;
2991         int sense_len;
2992         int rc, ldstat = 0;
2993         u16 cmd_status;
2994         u8 scsi_status;
2995 #define ASC_LUN_NOT_READY 0x04
2996 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2997 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2998
2999         c = cmd_alloc(h);
3000
3001         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3002         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3003         if (rc) {
3004                 cmd_free(h, c);
3005                 return 0;
3006         }
3007         sense = c->err_info->SenseInfo;
3008         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3009                 sense_len = sizeof(c->err_info->SenseInfo);
3010         else
3011                 sense_len = c->err_info->SenseLen;
3012         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3013         cmd_status = c->err_info->CommandStatus;
3014         scsi_status = c->err_info->ScsiStatus;
3015         cmd_free(h, c);
3016         /* Is the volume 'not ready'? */
3017         if (cmd_status != CMD_TARGET_STATUS ||
3018                 scsi_status != SAM_STAT_CHECK_CONDITION ||
3019                 sense_key != NOT_READY ||
3020                 asc != ASC_LUN_NOT_READY)  {
3021                 return 0;
3022         }
3023
3024         /* Determine the reason for not ready state */
3025         ldstat = hpsa_get_volume_status(h, scsi3addr);
3026
3027         /* Keep volume offline in certain cases: */
3028         switch (ldstat) {
3029         case HPSA_LV_UNDERGOING_ERASE:
3030         case HPSA_LV_UNDERGOING_RPI:
3031         case HPSA_LV_PENDING_RPI:
3032         case HPSA_LV_ENCRYPTED_NO_KEY:
3033         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3034         case HPSA_LV_UNDERGOING_ENCRYPTION:
3035         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3036         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3037                 return ldstat;
3038         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3039                 /* If VPD status page isn't available,
3040                  * use ASC/ASCQ to determine state
3041                  */
3042                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3043                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3044                         return ldstat;
3045                 break;
3046         default:
3047                 break;
3048         }
3049         return 0;
3050 }
3051
3052 /*
3053  * Find out if a logical device supports aborts by simply trying one.
3054  * Smart Array may claim not to support aborts on logical drives, but
3055  * if a MSA2000 * is connected, the drives on that will be presented
3056  * by the Smart Array as logical drives, and aborts may be sent to
3057  * those devices successfully.  So the simplest way to find out is
3058  * to simply try an abort and see how the device responds.
3059  */
3060 static int hpsa_device_supports_aborts(struct ctlr_info *h,
3061                                         unsigned char *scsi3addr)
3062 {
3063         struct CommandList *c;
3064         struct ErrorInfo *ei;
3065         int rc = 0;
3066
3067         u64 tag = (u64) -1; /* bogus tag */
3068
3069         /* Assume that physical devices support aborts */
3070         if (!is_logical_dev_addr_mode(scsi3addr))
3071                 return 1;
3072
3073         c = cmd_alloc(h);
3074
3075         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
3076         (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
3077         /* no unmap needed here because no data xfer. */
3078         ei = c->err_info;
3079         switch (ei->CommandStatus) {
3080         case CMD_INVALID:
3081                 rc = 0;
3082                 break;
3083         case CMD_UNABORTABLE:
3084         case CMD_ABORT_FAILED:
3085                 rc = 1;
3086                 break;
3087         case CMD_TMF_STATUS:
3088                 rc = hpsa_evaluate_tmf_status(h, c);
3089                 break;
3090         default:
3091                 rc = 0;
3092                 break;
3093         }
3094         cmd_free(h, c);
3095         return rc;
3096 }
3097
3098 static int hpsa_update_device_info(struct ctlr_info *h,
3099         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3100         unsigned char *is_OBDR_device)
3101 {
3102
3103 #define OBDR_SIG_OFFSET 43
3104 #define OBDR_TAPE_SIG "$DR-10"
3105 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3106 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3107
3108         unsigned char *inq_buff;
3109         unsigned char *obdr_sig;
3110
3111         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3112         if (!inq_buff)
3113                 goto bail_out;
3114
3115         /* Do an inquiry to the device to see what it is. */
3116         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3117                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3118                 /* Inquiry failed (msg printed already) */
3119                 dev_err(&h->pdev->dev,
3120                         "hpsa_update_device_info: inquiry failed\n");
3121                 goto bail_out;
3122         }
3123
3124         this_device->devtype = (inq_buff[0] & 0x1f);
3125         memcpy(this_device->scsi3addr, scsi3addr, 8);
3126         memcpy(this_device->vendor, &inq_buff[8],
3127                 sizeof(this_device->vendor));
3128         memcpy(this_device->model, &inq_buff[16],
3129                 sizeof(this_device->model));
3130         memset(this_device->device_id, 0,
3131                 sizeof(this_device->device_id));
3132         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
3133                 sizeof(this_device->device_id));
3134
3135         if (this_device->devtype == TYPE_DISK &&
3136                 is_logical_dev_addr_mode(scsi3addr)) {
3137                 int volume_offline;
3138
3139                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3140                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3141                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3142                 volume_offline = hpsa_volume_offline(h, scsi3addr);
3143                 if (volume_offline < 0 || volume_offline > 0xff)
3144                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3145                 this_device->volume_offline = volume_offline & 0xff;
3146         } else {
3147                 this_device->raid_level = RAID_UNKNOWN;
3148                 this_device->offload_config = 0;
3149                 this_device->offload_enabled = 0;
3150                 this_device->offload_to_be_enabled = 0;
3151                 this_device->hba_ioaccel_enabled = 0;
3152                 this_device->volume_offline = 0;
3153                 this_device->queue_depth = h->nr_cmds;
3154         }
3155
3156         if (is_OBDR_device) {
3157                 /* See if this is a One-Button-Disaster-Recovery device
3158                  * by looking for "$DR-10" at offset 43 in inquiry data.
3159                  */
3160                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3161                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3162                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3163                                                 OBDR_SIG_LEN) == 0);
3164         }
3165         kfree(inq_buff);
3166         return 0;
3167
3168 bail_out:
3169         kfree(inq_buff);
3170         return 1;
3171 }
3172
3173 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3174                         struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3175 {
3176         unsigned long flags;
3177         int rc, entry;
3178         /*
3179          * See if this device supports aborts.  If we already know
3180          * the device, we already know if it supports aborts, otherwise
3181          * we have to find out if it supports aborts by trying one.
3182          */
3183         spin_lock_irqsave(&h->devlock, flags);
3184         rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3185         if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3186                 entry >= 0 && entry < h->ndevices) {
3187                 dev->supports_aborts = h->dev[entry]->supports_aborts;
3188                 spin_unlock_irqrestore(&h->devlock, flags);
3189         } else {
3190                 spin_unlock_irqrestore(&h->devlock, flags);
3191                 dev->supports_aborts =
3192                                 hpsa_device_supports_aborts(h, scsi3addr);
3193                 if (dev->supports_aborts < 0)
3194                         dev->supports_aborts = 0;
3195         }
3196 }
3197
3198 static unsigned char *ext_target_model[] = {
3199         "MSA2012",
3200         "MSA2024",
3201         "MSA2312",
3202         "MSA2324",
3203         "P2000 G3 SAS",
3204         "MSA 2040 SAS",
3205         NULL,
3206 };
3207
3208 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3209 {
3210         int i;
3211
3212         for (i = 0; ext_target_model[i]; i++)
3213                 if (strncmp(device->model, ext_target_model[i],
3214                         strlen(ext_target_model[i])) == 0)
3215                         return 1;
3216         return 0;
3217 }
3218
3219 /* Helper function to assign bus, target, lun mapping of devices.
3220  * Puts non-external target logical volumes on bus 0, external target logical
3221  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
3222  * Logical drive target and lun are assigned at this time, but
3223  * physical device lun and target assignment are deferred (assigned
3224  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3225  */
3226 static void figure_bus_target_lun(struct ctlr_info *h,
3227         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3228 {
3229         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
3230
3231         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3232                 /* physical device, target and lun filled in later */
3233                 if (is_hba_lunid(lunaddrbytes))
3234                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3235                 else
3236                         /* defer target, lun assignment for physical devices */
3237                         hpsa_set_bus_target_lun(device, 2, -1, -1);
3238                 return;
3239         }
3240         /* It's a logical device */
3241         if (is_ext_target(h, device)) {
3242                 /* external target way, put logicals on bus 1
3243                  * and match target/lun numbers box
3244                  * reports, other smart array, bus 0, target 0, match lunid
3245                  */
3246                 hpsa_set_bus_target_lun(device,
3247                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
3248                 return;
3249         }
3250         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3251 }
3252
3253 /*
3254  * If there is no lun 0 on a target, linux won't find any devices.
3255  * For the external targets (arrays), we have to manually detect the enclosure
3256  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
3257  * it for some reason.  *tmpdevice is the target we're adding,
3258  * this_device is a pointer into the current element of currentsd[]
3259  * that we're building up in update_scsi_devices(), below.
3260  * lunzerobits is a bitmap that tracks which targets already have a
3261  * lun 0 assigned.
3262  * Returns 1 if an enclosure was added, 0 if not.
3263  */
3264 static int add_ext_target_dev(struct ctlr_info *h,
3265         struct hpsa_scsi_dev_t *tmpdevice,
3266         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3267         unsigned long lunzerobits[], int *n_ext_target_devs)
3268 {
3269         unsigned char scsi3addr[8];
3270
3271         if (test_bit(tmpdevice->target, lunzerobits))
3272                 return 0; /* There is already a lun 0 on this target. */
3273
3274         if (!is_logical_dev_addr_mode(lunaddrbytes))
3275                 return 0; /* It's the logical targets that may lack lun 0. */
3276
3277         if (!is_ext_target(h, tmpdevice))
3278                 return 0; /* Only external target devices have this problem. */
3279
3280         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3281                 return 0;
3282
3283         memset(scsi3addr, 0, 8);
3284         scsi3addr[3] = tmpdevice->target;
3285         if (is_hba_lunid(scsi3addr))
3286                 return 0; /* Don't add the RAID controller here. */
3287
3288         if (is_scsi_rev_5(h))
3289                 return 0; /* p1210m doesn't need to do this. */
3290
3291         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3292                 dev_warn(&h->pdev->dev, "Maximum number of external "
3293                         "target devices exceeded.  Check your hardware "
3294                         "configuration.");
3295                 return 0;
3296         }
3297
3298         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3299                 return 0;
3300         (*n_ext_target_devs)++;
3301         hpsa_set_bus_target_lun(this_device,
3302                                 tmpdevice->bus, tmpdevice->target, 0);
3303         hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3304         set_bit(tmpdevice->target, lunzerobits);
3305         return 1;
3306 }
3307
3308 /*
3309  * Get address of physical disk used for an ioaccel2 mode command:
3310  *      1. Extract ioaccel2 handle from the command.
3311  *      2. Find a matching ioaccel2 handle from list of physical disks.
3312  *      3. Return:
3313  *              1 and set scsi3addr to address of matching physical
3314  *              0 if no matching physical disk was found.
3315  */
3316 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3317         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3318 {
3319         struct io_accel2_cmd *c2 =
3320                         &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3321         unsigned long flags;
3322         int i;
3323
3324         spin_lock_irqsave(&h->devlock, flags);
3325         for (i = 0; i < h->ndevices; i++)
3326                 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3327                         memcpy(scsi3addr, h->dev[i]->scsi3addr,
3328                                 sizeof(h->dev[i]->scsi3addr));
3329                         spin_unlock_irqrestore(&h->devlock, flags);
3330                         return 1;
3331                 }
3332         spin_unlock_irqrestore(&h->devlock, flags);
3333         return 0;
3334 }
3335
3336 /*
3337  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3338  * logdev.  The number of luns in physdev and logdev are returned in
3339  * *nphysicals and *nlogicals, respectively.
3340  * Returns 0 on success, -1 otherwise.
3341  */
3342 static int hpsa_gather_lun_info(struct ctlr_info *h,
3343         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3344         struct ReportLUNdata *logdev, u32 *nlogicals)
3345 {
3346         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3347                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3348                 return -1;
3349         }
3350         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3351         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3352                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3353                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3354                 *nphysicals = HPSA_MAX_PHYS_LUN;
3355         }
3356         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3357                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3358                 return -1;
3359         }
3360         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3361         /* Reject Logicals in excess of our max capability. */
3362         if (*nlogicals > HPSA_MAX_LUN) {
3363                 dev_warn(&h->pdev->dev,
3364                         "maximum logical LUNs (%d) exceeded.  "
3365                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3366                         *nlogicals - HPSA_MAX_LUN);
3367                         *nlogicals = HPSA_MAX_LUN;
3368         }
3369         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3370                 dev_warn(&h->pdev->dev,
3371                         "maximum logical + physical LUNs (%d) exceeded. "
3372                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3373                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3374                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3375         }
3376         return 0;
3377 }
3378
3379 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3380         int i, int nphysicals, int nlogicals,
3381         struct ReportExtendedLUNdata *physdev_list,
3382         struct ReportLUNdata *logdev_list)
3383 {
3384         /* Helper function, figure out where the LUN ID info is coming from
3385          * given index i, lists of physical and logical devices, where in
3386          * the list the raid controller is supposed to appear (first or last)
3387          */
3388
3389         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3390         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3391
3392         if (i == raid_ctlr_position)
3393                 return RAID_CTLR_LUNID;
3394
3395         if (i < logicals_start)
3396                 return &physdev_list->LUN[i -
3397                                 (raid_ctlr_position == 0)].lunid[0];
3398
3399         if (i < last_device)
3400                 return &logdev_list->LUN[i - nphysicals -
3401                         (raid_ctlr_position == 0)][0];
3402         BUG();
3403         return NULL;
3404 }
3405
3406 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
3407 {
3408         int rc;
3409         int hba_mode_enabled;
3410         struct bmic_controller_parameters *ctlr_params;
3411         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
3412                 GFP_KERNEL);
3413
3414         if (!ctlr_params)
3415                 return -ENOMEM;
3416         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
3417                 sizeof(struct bmic_controller_parameters));
3418         if (rc) {
3419                 kfree(ctlr_params);
3420                 return rc;
3421         }
3422
3423         hba_mode_enabled =
3424                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
3425         kfree(ctlr_params);
3426         return hba_mode_enabled;
3427 }
3428
3429 /* get physical drive ioaccel handle and queue depth */
3430 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3431                 struct hpsa_scsi_dev_t *dev,
3432                 u8 *lunaddrbytes,
3433                 struct bmic_identify_physical_device *id_phys)
3434 {
3435         int rc;
3436         struct ext_report_lun_entry *rle =
3437                 (struct ext_report_lun_entry *) lunaddrbytes;
3438
3439         dev->ioaccel_handle = rle->ioaccel_handle;
3440         if (PHYS_IOACCEL(lunaddrbytes) && dev->ioaccel_handle)
3441                 dev->hba_ioaccel_enabled = 1;
3442         memset(id_phys, 0, sizeof(*id_phys));
3443         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3444                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3445                         sizeof(*id_phys));
3446         if (!rc)
3447                 /* Reserve space for FW operations */
3448 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3449 #define DRIVE_QUEUE_DEPTH 7
3450                 dev->queue_depth =
3451                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3452                                 DRIVE_CMDS_RESERVED_FOR_FW;
3453         else
3454                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3455         atomic_set(&dev->ioaccel_cmds_out, 0);
3456 }
3457
3458 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
3459 {
3460         /* the idea here is we could get notified
3461          * that some devices have changed, so we do a report
3462          * physical luns and report logical luns cmd, and adjust
3463          * our list of devices accordingly.
3464          *
3465          * The scsi3addr's of devices won't change so long as the
3466          * adapter is not reset.  That means we can rescan and
3467          * tell which devices we already know about, vs. new
3468          * devices, vs.  disappearing devices.
3469          */
3470         struct ReportExtendedLUNdata *physdev_list = NULL;
3471         struct ReportLUNdata *logdev_list = NULL;
3472         struct bmic_identify_physical_device *id_phys = NULL;
3473         u32 nphysicals = 0;
3474         u32 nlogicals = 0;
3475         u32 ndev_allocated = 0;
3476         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3477         int ncurrent = 0;
3478         int i, n_ext_target_devs, ndevs_to_allocate;
3479         int raid_ctlr_position;
3480         int rescan_hba_mode;
3481         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3482
3483         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3484         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3485         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3486         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3487         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3488
3489         if (!currentsd || !physdev_list || !logdev_list ||
3490                 !tmpdevice || !id_phys) {
3491                 dev_err(&h->pdev->dev, "out of memory\n");
3492                 goto out;
3493         }
3494         memset(lunzerobits, 0, sizeof(lunzerobits));
3495
3496         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3497         if (rescan_hba_mode < 0)
3498                 goto out;
3499
3500         if (!h->hba_mode_enabled && rescan_hba_mode)
3501                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3502         else if (h->hba_mode_enabled && !rescan_hba_mode)
3503                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3504
3505         h->hba_mode_enabled = rescan_hba_mode;
3506
3507         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3508                         logdev_list, &nlogicals))
3509                 goto out;
3510
3511         /* We might see up to the maximum number of logical and physical disks
3512          * plus external target devices, and a device for the local RAID
3513          * controller.
3514          */
3515         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3516
3517         /* Allocate the per device structures */
3518         for (i = 0; i < ndevs_to_allocate; i++) {
3519                 if (i >= HPSA_MAX_DEVICES) {
3520                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3521                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3522                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3523                         break;
3524                 }
3525
3526                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3527                 if (!currentsd[i]) {
3528                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3529                                 __FILE__, __LINE__);
3530                         goto out;
3531                 }
3532                 ndev_allocated++;
3533         }
3534
3535         if (is_scsi_rev_5(h))
3536                 raid_ctlr_position = 0;
3537         else
3538                 raid_ctlr_position = nphysicals + nlogicals;
3539
3540         /* adjust our table of devices */
3541         n_ext_target_devs = 0;
3542         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3543                 u8 *lunaddrbytes, is_OBDR = 0;
3544
3545                 /* Figure out where the LUN ID info is coming from */
3546                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3547                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3548
3549                 /* skip masked non-disk devices */
3550                 if (MASKED_DEVICE(lunaddrbytes))
3551                         if (i < nphysicals + (raid_ctlr_position == 0) &&
3552                                 NON_DISK_PHYS_DEV(lunaddrbytes))
3553                                 continue;
3554
3555                 /* Get device type, vendor, model, device id */
3556                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3557                                                         &is_OBDR))
3558                         continue; /* skip it if we can't talk to it. */
3559                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3560                 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3561                 this_device = currentsd[ncurrent];
3562
3563                 /*
3564                  * For external target devices, we have to insert a LUN 0 which
3565                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3566                  * is nonetheless an enclosure device there.  We have to
3567                  * present that otherwise linux won't find anything if
3568                  * there is no lun 0.
3569                  */
3570                 if (add_ext_target_dev(h, tmpdevice, this_device,
3571                                 lunaddrbytes, lunzerobits,
3572                                 &n_ext_target_devs)) {
3573                         ncurrent++;
3574                         this_device = currentsd[ncurrent];
3575                 }
3576
3577                 *this_device = *tmpdevice;
3578
3579                 /* do not expose masked devices */
3580                 if (MASKED_DEVICE(lunaddrbytes) &&
3581                         i < nphysicals + (raid_ctlr_position == 0)) {
3582                         if (h->hba_mode_enabled)
3583                                 dev_warn(&h->pdev->dev,
3584                                         "Masked physical device detected\n");
3585                         this_device->expose_state = HPSA_DO_NOT_EXPOSE;
3586                 } else {
3587                         this_device->expose_state =
3588                                         HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
3589                 }
3590
3591                 switch (this_device->devtype) {
3592                 case TYPE_ROM:
3593                         /* We don't *really* support actual CD-ROM devices,
3594                          * just "One Button Disaster Recovery" tape drive
3595                          * which temporarily pretends to be a CD-ROM drive.
3596                          * So we check that the device is really an OBDR tape
3597                          * device by checking for "$DR-10" in bytes 43-48 of
3598                          * the inquiry data.
3599                          */
3600                         if (is_OBDR)
3601                                 ncurrent++;
3602                         break;
3603                 case TYPE_DISK:
3604                         if (i >= nphysicals) {
3605                                 ncurrent++;
3606                                 break;
3607                         }
3608
3609                         if (h->hba_mode_enabled)
3610                                 /* never use raid mapper in HBA mode */
3611                                 this_device->offload_enabled = 0;
3612                         else if (!(h->transMethod & CFGTBL_Trans_io_accel1 ||
3613                                 h->transMethod & CFGTBL_Trans_io_accel2))
3614                                 break;
3615
3616                         hpsa_get_ioaccel_drive_info(h, this_device,
3617                                                 lunaddrbytes, id_phys);
3618                         atomic_set(&this_device->ioaccel_cmds_out, 0);
3619                         ncurrent++;
3620                         break;
3621                 case TYPE_TAPE:
3622                 case TYPE_MEDIUM_CHANGER:
3623                         ncurrent++;
3624                         break;
3625                 case TYPE_ENCLOSURE:
3626                         if (h->hba_mode_enabled)
3627                                 ncurrent++;
3628                         break;
3629                 case TYPE_RAID:
3630                         /* Only present the Smartarray HBA as a RAID controller.
3631                          * If it's a RAID controller other than the HBA itself
3632                          * (an external RAID controller, MSA500 or similar)
3633                          * don't present it.
3634                          */
3635                         if (!is_hba_lunid(lunaddrbytes))
3636                                 break;
3637                         ncurrent++;
3638                         break;
3639                 default:
3640                         break;
3641                 }
3642                 if (ncurrent >= HPSA_MAX_DEVICES)
3643                         break;
3644         }
3645         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3646 out:
3647         kfree(tmpdevice);
3648         for (i = 0; i < ndev_allocated; i++)
3649                 kfree(currentsd[i]);
3650         kfree(currentsd);
3651         kfree(physdev_list);
3652         kfree(logdev_list);
3653         kfree(id_phys);
3654 }
3655
3656 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
3657                                    struct scatterlist *sg)
3658 {
3659         u64 addr64 = (u64) sg_dma_address(sg);
3660         unsigned int len = sg_dma_len(sg);
3661
3662         desc->Addr = cpu_to_le64(addr64);
3663         desc->Len = cpu_to_le32(len);
3664         desc->Ext = 0;
3665 }
3666
3667 /*
3668  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3669  * dma mapping  and fills in the scatter gather entries of the
3670  * hpsa command, cp.
3671  */
3672 static int hpsa_scatter_gather(struct ctlr_info *h,
3673                 struct CommandList *cp,
3674                 struct scsi_cmnd *cmd)
3675 {
3676         struct scatterlist *sg;
3677         int use_sg, i, sg_limit, chained, last_sg;
3678         struct SGDescriptor *curr_sg;
3679
3680         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3681
3682         use_sg = scsi_dma_map(cmd);
3683         if (use_sg < 0)
3684                 return use_sg;
3685
3686         if (!use_sg)
3687                 goto sglist_finished;
3688
3689         /*
3690          * If the number of entries is greater than the max for a single list,
3691          * then we have a chained list; we will set up all but one entry in the
3692          * first list (the last entry is saved for link information);
3693          * otherwise, we don't have a chained list and we'll set up at each of
3694          * the entries in the one list.
3695          */
3696         curr_sg = cp->SG;
3697         chained = use_sg > h->max_cmd_sg_entries;
3698         sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
3699         last_sg = scsi_sg_count(cmd) - 1;
3700         scsi_for_each_sg(cmd, sg, sg_limit, i) {
3701                 hpsa_set_sg_descriptor(curr_sg, sg);
3702                 curr_sg++;
3703         }
3704
3705         if (chained) {
3706                 /*
3707                  * Continue with the chained list.  Set curr_sg to the chained
3708                  * list.  Modify the limit to the total count less the entries
3709                  * we've already set up.  Resume the scan at the list entry
3710                  * where the previous loop left off.
3711                  */
3712                 curr_sg = h->cmd_sg_list[cp->cmdindex];
3713                 sg_limit = use_sg - sg_limit;
3714                 for_each_sg(sg, sg, sg_limit, i) {
3715                         hpsa_set_sg_descriptor(curr_sg, sg);
3716                         curr_sg++;
3717                 }
3718         }
3719
3720         /* Back the pointer up to the last entry and mark it as "last". */
3721         (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
3722
3723         if (use_sg + chained > h->maxSG)
3724                 h->maxSG = use_sg + chained;
3725
3726         if (chained) {
3727                 cp->Header.SGList = h->max_cmd_sg_entries;
3728                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3729                 if (hpsa_map_sg_chain_block(h, cp)) {
3730                         scsi_dma_unmap(cmd);
3731                         return -1;
3732                 }
3733                 return 0;
3734         }
3735
3736 sglist_finished:
3737
3738         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3739         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3740         return 0;
3741 }
3742
3743 #define IO_ACCEL_INELIGIBLE (1)
3744 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3745 {
3746         int is_write = 0;
3747         u32 block;
3748         u32 block_cnt;
3749
3750         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3751         switch (cdb[0]) {
3752         case WRITE_6:
3753         case WRITE_12:
3754                 is_write = 1;
3755         case READ_6:
3756         case READ_12:
3757                 if (*cdb_len == 6) {
3758                         block = (((u32) cdb[2]) << 8) | cdb[3];
3759                         block_cnt = cdb[4];
3760                 } else {
3761                         BUG_ON(*cdb_len != 12);
3762                         block = (((u32) cdb[2]) << 24) |
3763                                 (((u32) cdb[3]) << 16) |
3764                                 (((u32) cdb[4]) << 8) |
3765                                 cdb[5];
3766                         block_cnt =
3767                                 (((u32) cdb[6]) << 24) |
3768                                 (((u32) cdb[7]) << 16) |
3769                                 (((u32) cdb[8]) << 8) |
3770                                 cdb[9];
3771                 }
3772                 if (block_cnt > 0xffff)
3773                         return IO_ACCEL_INELIGIBLE;
3774
3775                 cdb[0] = is_write ? WRITE_10 : READ_10;
3776                 cdb[1] = 0;
3777                 cdb[2] = (u8) (block >> 24);
3778                 cdb[3] = (u8) (block >> 16);
3779                 cdb[4] = (u8) (block >> 8);
3780                 cdb[5] = (u8) (block);
3781                 cdb[6] = 0;
3782                 cdb[7] = (u8) (block_cnt >> 8);
3783                 cdb[8] = (u8) (block_cnt);
3784                 cdb[9] = 0;
3785                 *cdb_len = 10;
3786                 break;
3787         }
3788         return 0;
3789 }
3790
3791 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3792         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3793         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3794 {
3795         struct scsi_cmnd *cmd = c->scsi_cmd;
3796         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3797         unsigned int len;
3798         unsigned int total_len = 0;
3799         struct scatterlist *sg;
3800         u64 addr64;
3801         int use_sg, i;
3802         struct SGDescriptor *curr_sg;
3803         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3804
3805         /* TODO: implement chaining support */
3806         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3807                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3808                 return IO_ACCEL_INELIGIBLE;
3809         }
3810
3811         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3812
3813         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3814                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3815                 return IO_ACCEL_INELIGIBLE;
3816         }
3817
3818         c->cmd_type = CMD_IOACCEL1;
3819
3820         /* Adjust the DMA address to point to the accelerated command buffer */
3821         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3822                                 (c->cmdindex * sizeof(*cp));
3823         BUG_ON(c->busaddr & 0x0000007F);
3824
3825         use_sg = scsi_dma_map(cmd);
3826         if (use_sg < 0) {
3827                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3828                 return use_sg;
3829         }
3830
3831         if (use_sg) {
3832                 curr_sg = cp->SG;
3833                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3834                         addr64 = (u64) sg_dma_address(sg);
3835                         len  = sg_dma_len(sg);
3836                         total_len += len;
3837                         curr_sg->Addr = cpu_to_le64(addr64);
3838                         curr_sg->Len = cpu_to_le32(len);
3839                         curr_sg->Ext = cpu_to_le32(0);
3840                         curr_sg++;
3841                 }
3842                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3843
3844                 switch (cmd->sc_data_direction) {
3845                 case DMA_TO_DEVICE:
3846                         control |= IOACCEL1_CONTROL_DATA_OUT;
3847                         break;
3848                 case DMA_FROM_DEVICE:
3849                         control |= IOACCEL1_CONTROL_DATA_IN;
3850                         break;
3851                 case DMA_NONE:
3852                         control |= IOACCEL1_CONTROL_NODATAXFER;
3853                         break;
3854                 default:
3855                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3856                         cmd->sc_data_direction);
3857                         BUG();
3858                         break;
3859                 }
3860         } else {
3861                 control |= IOACCEL1_CONTROL_NODATAXFER;
3862         }
3863
3864         c->Header.SGList = use_sg;
3865         /* Fill out the command structure to submit */
3866         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
3867         cp->transfer_len = cpu_to_le32(total_len);
3868         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
3869                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
3870         cp->control = cpu_to_le32(control);
3871         memcpy(cp->CDB, cdb, cdb_len);
3872         memcpy(cp->CISS_LUN, scsi3addr, 8);
3873         /* Tag was already set at init time. */
3874         enqueue_cmd_and_start_io(h, c);
3875         return 0;
3876 }
3877
3878 /*
3879  * Queue a command directly to a device behind the controller using the
3880  * I/O accelerator path.
3881  */
3882 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3883         struct CommandList *c)
3884 {
3885         struct scsi_cmnd *cmd = c->scsi_cmd;
3886         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3887
3888         c->phys_disk = dev;
3889
3890         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3891                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
3892 }
3893
3894 /*
3895  * Set encryption parameters for the ioaccel2 request
3896  */
3897 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3898         struct CommandList *c, struct io_accel2_cmd *cp)
3899 {
3900         struct scsi_cmnd *cmd = c->scsi_cmd;
3901         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3902         struct raid_map_data *map = &dev->raid_map;
3903         u64 first_block;
3904
3905         /* Are we doing encryption on this device */
3906         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
3907                 return;
3908         /* Set the data encryption key index. */
3909         cp->dekindex = map->dekindex;
3910
3911         /* Set the encryption enable flag, encoded into direction field. */
3912         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3913
3914         /* Set encryption tweak values based on logical block address
3915          * If block size is 512, tweak value is LBA.
3916          * For other block sizes, tweak is (LBA * block size)/ 512)
3917          */
3918         switch (cmd->cmnd[0]) {
3919         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3920         case WRITE_6:
3921         case READ_6:
3922                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
3923                 break;
3924         case WRITE_10:
3925         case READ_10:
3926         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3927         case WRITE_12:
3928         case READ_12:
3929                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
3930                 break;
3931         case WRITE_16:
3932         case READ_16:
3933                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
3934                 break;
3935         default:
3936                 dev_err(&h->pdev->dev,
3937                         "ERROR: %s: size (0x%x) not supported for encryption\n",
3938                         __func__, cmd->cmnd[0]);
3939                 BUG();
3940                 break;
3941         }
3942
3943         if (le32_to_cpu(map->volume_blk_size) != 512)
3944                 first_block = first_block *
3945                                 le32_to_cpu(map->volume_blk_size)/512;
3946
3947         cp->tweak_lower = cpu_to_le32(first_block);
3948         cp->tweak_upper = cpu_to_le32(first_block >> 32);
3949 }
3950
3951 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3952         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3953         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3954 {
3955         struct scsi_cmnd *cmd = c->scsi_cmd;
3956         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3957         struct ioaccel2_sg_element *curr_sg;
3958         int use_sg, i;
3959         struct scatterlist *sg;
3960         u64 addr64;
3961         u32 len;
3962         u32 total_len = 0;
3963
3964         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3965
3966         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3967                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3968                 return IO_ACCEL_INELIGIBLE;
3969         }
3970
3971         c->cmd_type = CMD_IOACCEL2;
3972         /* Adjust the DMA address to point to the accelerated command buffer */
3973         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3974                                 (c->cmdindex * sizeof(*cp));
3975         BUG_ON(c->busaddr & 0x0000007F);
3976
3977         memset(cp, 0, sizeof(*cp));
3978         cp->IU_type = IOACCEL2_IU_TYPE;
3979
3980         use_sg = scsi_dma_map(cmd);
3981         if (use_sg < 0) {
3982                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3983                 return use_sg;
3984         }
3985
3986         if (use_sg) {
3987                 curr_sg = cp->sg;
3988                 if (use_sg > h->ioaccel_maxsg) {
3989                         addr64 = le64_to_cpu(
3990                                 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
3991                         curr_sg->address = cpu_to_le64(addr64);
3992                         curr_sg->length = 0;
3993                         curr_sg->reserved[0] = 0;
3994                         curr_sg->reserved[1] = 0;
3995                         curr_sg->reserved[2] = 0;
3996                         curr_sg->chain_indicator = 0x80;
3997
3998                         curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
3999                 }
4000                 scsi_for_each_sg(cmd, sg, use_sg, i) {
4001                         addr64 = (u64) sg_dma_address(sg);
4002                         len  = sg_dma_len(sg);
4003                         total_len += len;
4004                         curr_sg->address = cpu_to_le64(addr64);
4005                         curr_sg->length = cpu_to_le32(len);
4006                         curr_sg->reserved[0] = 0;
4007                         curr_sg->reserved[1] = 0;
4008                         curr_sg->reserved[2] = 0;
4009                         curr_sg->chain_indicator = 0;
4010                         curr_sg++;
4011                 }
4012
4013                 switch (cmd->sc_data_direction) {
4014                 case DMA_TO_DEVICE:
4015                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4016                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
4017                         break;
4018                 case DMA_FROM_DEVICE:
4019                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4020                         cp->direction |= IOACCEL2_DIR_DATA_IN;
4021                         break;
4022                 case DMA_NONE:
4023                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4024                         cp->direction |= IOACCEL2_DIR_NO_DATA;
4025                         break;
4026                 default:
4027                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4028                                 cmd->sc_data_direction);
4029                         BUG();
4030                         break;
4031                 }
4032         } else {
4033                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4034                 cp->direction |= IOACCEL2_DIR_NO_DATA;
4035         }
4036
4037         /* Set encryption parameters, if necessary */
4038         set_encrypt_ioaccel2(h, c, cp);
4039
4040         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4041         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4042         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4043
4044         cp->data_len = cpu_to_le32(total_len);
4045         cp->err_ptr = cpu_to_le64(c->busaddr +
4046                         offsetof(struct io_accel2_cmd, error_data));
4047         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4048
4049         /* fill in sg elements */
4050         if (use_sg > h->ioaccel_maxsg) {
4051                 cp->sg_count = 1;
4052                 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4053                         atomic_dec(&phys_disk->ioaccel_cmds_out);
4054                         scsi_dma_unmap(cmd);
4055                         return -1;
4056                 }
4057         } else
4058                 cp->sg_count = (u8) use_sg;
4059
4060         enqueue_cmd_and_start_io(h, c);
4061         return 0;
4062 }
4063
4064 /*
4065  * Queue a command to the correct I/O accelerator path.
4066  */
4067 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4068         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4069         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4070 {
4071         /* Try to honor the device's queue depth */
4072         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
4073                                         phys_disk->queue_depth) {
4074                 atomic_dec(&phys_disk->ioaccel_cmds_out);
4075                 return IO_ACCEL_INELIGIBLE;
4076         }
4077         if (h->transMethod & CFGTBL_Trans_io_accel1)
4078                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
4079                                                 cdb, cdb_len, scsi3addr,
4080                                                 phys_disk);
4081         else
4082                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
4083                                                 cdb, cdb_len, scsi3addr,
4084                                                 phys_disk);
4085 }
4086
4087 static void raid_map_helper(struct raid_map_data *map,
4088                 int offload_to_mirror, u32 *map_index, u32 *current_group)
4089 {
4090         if (offload_to_mirror == 0)  {
4091                 /* use physical disk in the first mirrored group. */
4092                 *map_index %= le16_to_cpu(map->data_disks_per_row);
4093                 return;
4094         }
4095         do {
4096                 /* determine mirror group that *map_index indicates */
4097                 *current_group = *map_index /
4098                         le16_to_cpu(map->data_disks_per_row);
4099                 if (offload_to_mirror == *current_group)
4100                         continue;
4101                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
4102                         /* select map index from next group */
4103                         *map_index += le16_to_cpu(map->data_disks_per_row);
4104                         (*current_group)++;
4105                 } else {
4106                         /* select map index from first group */
4107                         *map_index %= le16_to_cpu(map->data_disks_per_row);
4108                         *current_group = 0;
4109                 }
4110         } while (offload_to_mirror != *current_group);
4111 }
4112
4113 /*
4114  * Attempt to perform offload RAID mapping for a logical volume I/O.
4115  */
4116 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
4117         struct CommandList *c)
4118 {
4119         struct scsi_cmnd *cmd = c->scsi_cmd;
4120         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4121         struct raid_map_data *map = &dev->raid_map;
4122         struct raid_map_disk_data *dd = &map->data[0];
4123         int is_write = 0;
4124         u32 map_index;
4125         u64 first_block, last_block;
4126         u32 block_cnt;
4127         u32 blocks_per_row;
4128         u64 first_row, last_row;
4129         u32 first_row_offset, last_row_offset;
4130         u32 first_column, last_column;
4131         u64 r0_first_row, r0_last_row;
4132         u32 r5or6_blocks_per_row;
4133         u64 r5or6_first_row, r5or6_last_row;
4134         u32 r5or6_first_row_offset, r5or6_last_row_offset;
4135         u32 r5or6_first_column, r5or6_last_column;
4136         u32 total_disks_per_row;
4137         u32 stripesize;
4138         u32 first_group, last_group, current_group;
4139         u32 map_row;
4140         u32 disk_handle;
4141         u64 disk_block;
4142         u32 disk_block_cnt;
4143         u8 cdb[16];
4144         u8 cdb_len;
4145         u16 strip_size;
4146 #if BITS_PER_LONG == 32
4147         u64 tmpdiv;
4148 #endif
4149         int offload_to_mirror;
4150
4151         /* check for valid opcode, get LBA and block count */
4152         switch (cmd->cmnd[0]) {
4153         case WRITE_6:
4154                 is_write = 1;
4155         case READ_6:
4156                 first_block =
4157                         (((u64) cmd->cmnd[2]) << 8) |
4158                         cmd->cmnd[3];
4159                 block_cnt = cmd->cmnd[4];
4160                 if (block_cnt == 0)
4161                         block_cnt = 256;
4162                 break;
4163         case WRITE_10:
4164                 is_write = 1;
4165         case READ_10:
4166                 first_block =
4167                         (((u64) cmd->cmnd[2]) << 24) |
4168                         (((u64) cmd->cmnd[3]) << 16) |
4169                         (((u64) cmd->cmnd[4]) << 8) |
4170                         cmd->cmnd[5];
4171                 block_cnt =
4172                         (((u32) cmd->cmnd[7]) << 8) |
4173                         cmd->cmnd[8];
4174                 break;
4175         case WRITE_12:
4176                 is_write = 1;
4177         case READ_12:
4178                 first_block =
4179                         (((u64) cmd->cmnd[2]) << 24) |
4180                         (((u64) cmd->cmnd[3]) << 16) |
4181                         (((u64) cmd->cmnd[4]) << 8) |
4182                         cmd->cmnd[5];
4183                 block_cnt =
4184                         (((u32) cmd->cmnd[6]) << 24) |
4185                         (((u32) cmd->cmnd[7]) << 16) |
4186                         (((u32) cmd->cmnd[8]) << 8) |
4187                 cmd->cmnd[9];
4188                 break;
4189         case WRITE_16:
4190                 is_write = 1;
4191         case READ_16:
4192                 first_block =
4193                         (((u64) cmd->cmnd[2]) << 56) |
4194                         (((u64) cmd->cmnd[3]) << 48) |
4195                         (((u64) cmd->cmnd[4]) << 40) |
4196                         (((u64) cmd->cmnd[5]) << 32) |
4197                         (((u64) cmd->cmnd[6]) << 24) |
4198                         (((u64) cmd->cmnd[7]) << 16) |
4199                         (((u64) cmd->cmnd[8]) << 8) |
4200                         cmd->cmnd[9];
4201                 block_cnt =
4202                         (((u32) cmd->cmnd[10]) << 24) |
4203                         (((u32) cmd->cmnd[11]) << 16) |
4204                         (((u32) cmd->cmnd[12]) << 8) |
4205                         cmd->cmnd[13];
4206                 break;
4207         default:
4208                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4209         }
4210         last_block = first_block + block_cnt - 1;
4211
4212         /* check for write to non-RAID-0 */
4213         if (is_write && dev->raid_level != 0)
4214                 return IO_ACCEL_INELIGIBLE;
4215
4216         /* check for invalid block or wraparound */
4217         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4218                 last_block < first_block)
4219                 return IO_ACCEL_INELIGIBLE;
4220
4221         /* calculate stripe information for the request */
4222         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4223                                 le16_to_cpu(map->strip_size);
4224         strip_size = le16_to_cpu(map->strip_size);
4225 #if BITS_PER_LONG == 32
4226         tmpdiv = first_block;
4227         (void) do_div(tmpdiv, blocks_per_row);
4228         first_row = tmpdiv;
4229         tmpdiv = last_block;
4230         (void) do_div(tmpdiv, blocks_per_row);
4231         last_row = tmpdiv;
4232         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4233         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4234         tmpdiv = first_row_offset;
4235         (void) do_div(tmpdiv, strip_size);
4236         first_column = tmpdiv;
4237         tmpdiv = last_row_offset;
4238         (void) do_div(tmpdiv, strip_size);
4239         last_column = tmpdiv;
4240 #else
4241         first_row = first_block / blocks_per_row;
4242         last_row = last_block / blocks_per_row;
4243         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4244         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4245         first_column = first_row_offset / strip_size;
4246         last_column = last_row_offset / strip_size;
4247 #endif
4248
4249         /* if this isn't a single row/column then give to the controller */
4250         if ((first_row != last_row) || (first_column != last_column))
4251                 return IO_ACCEL_INELIGIBLE;
4252
4253         /* proceeding with driver mapping */
4254         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4255                                 le16_to_cpu(map->metadata_disks_per_row);
4256         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4257                                 le16_to_cpu(map->row_cnt);
4258         map_index = (map_row * total_disks_per_row) + first_column;
4259
4260         switch (dev->raid_level) {
4261         case HPSA_RAID_0:
4262                 break; /* nothing special to do */
4263         case HPSA_RAID_1:
4264                 /* Handles load balance across RAID 1 members.
4265                  * (2-drive R1 and R10 with even # of drives.)
4266                  * Appropriate for SSDs, not optimal for HDDs
4267                  */
4268                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4269                 if (dev->offload_to_mirror)
4270                         map_index += le16_to_cpu(map->data_disks_per_row);
4271                 dev->offload_to_mirror = !dev->offload_to_mirror;
4272                 break;
4273         case HPSA_RAID_ADM:
4274                 /* Handles N-way mirrors  (R1-ADM)
4275                  * and R10 with # of drives divisible by 3.)
4276                  */
4277                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4278
4279                 offload_to_mirror = dev->offload_to_mirror;
4280                 raid_map_helper(map, offload_to_mirror,
4281                                 &map_index, &current_group);
4282                 /* set mirror group to use next time */
4283                 offload_to_mirror =
4284                         (offload_to_mirror >=
4285                         le16_to_cpu(map->layout_map_count) - 1)
4286                         ? 0 : offload_to_mirror + 1;
4287                 dev->offload_to_mirror = offload_to_mirror;
4288                 /* Avoid direct use of dev->offload_to_mirror within this
4289                  * function since multiple threads might simultaneously
4290                  * increment it beyond the range of dev->layout_map_count -1.
4291                  */
4292                 break;
4293         case HPSA_RAID_5:
4294         case HPSA_RAID_6:
4295                 if (le16_to_cpu(map->layout_map_count) <= 1)
4296                         break;
4297
4298                 /* Verify first and last block are in same RAID group */
4299                 r5or6_blocks_per_row =
4300                         le16_to_cpu(map->strip_size) *
4301                         le16_to_cpu(map->data_disks_per_row);
4302                 BUG_ON(r5or6_blocks_per_row == 0);
4303                 stripesize = r5or6_blocks_per_row *
4304                         le16_to_cpu(map->layout_map_count);
4305 #if BITS_PER_LONG == 32
4306                 tmpdiv = first_block;
4307                 first_group = do_div(tmpdiv, stripesize);
4308                 tmpdiv = first_group;
4309                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4310                 first_group = tmpdiv;
4311                 tmpdiv = last_block;
4312                 last_group = do_div(tmpdiv, stripesize);
4313                 tmpdiv = last_group;
4314                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4315                 last_group = tmpdiv;
4316 #else
4317                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4318                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4319 #endif
4320                 if (first_group != last_group)
4321                         return IO_ACCEL_INELIGIBLE;
4322
4323                 /* Verify request is in a single row of RAID 5/6 */
4324 #if BITS_PER_LONG == 32
4325                 tmpdiv = first_block;
4326                 (void) do_div(tmpdiv, stripesize);
4327                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4328                 tmpdiv = last_block;
4329                 (void) do_div(tmpdiv, stripesize);
4330                 r5or6_last_row = r0_last_row = tmpdiv;
4331 #else
4332                 first_row = r5or6_first_row = r0_first_row =
4333                                                 first_block / stripesize;
4334                 r5or6_last_row = r0_last_row = last_block / stripesize;
4335 #endif
4336                 if (r5or6_first_row != r5or6_last_row)
4337                         return IO_ACCEL_INELIGIBLE;
4338
4339
4340                 /* Verify request is in a single column */
4341 #if BITS_PER_LONG == 32
4342                 tmpdiv = first_block;
4343                 first_row_offset = do_div(tmpdiv, stripesize);
4344                 tmpdiv = first_row_offset;
4345                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4346                 r5or6_first_row_offset = first_row_offset;
4347                 tmpdiv = last_block;
4348                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4349                 tmpdiv = r5or6_last_row_offset;
4350                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4351                 tmpdiv = r5or6_first_row_offset;
4352                 (void) do_div(tmpdiv, map->strip_size);
4353                 first_column = r5or6_first_column = tmpdiv;
4354                 tmpdiv = r5or6_last_row_offset;
4355                 (void) do_div(tmpdiv, map->strip_size);
4356                 r5or6_last_column = tmpdiv;
4357 #else
4358                 first_row_offset = r5or6_first_row_offset =
4359                         (u32)((first_block % stripesize) %
4360                                                 r5or6_blocks_per_row);
4361
4362                 r5or6_last_row_offset =
4363                         (u32)((last_block % stripesize) %
4364                                                 r5or6_blocks_per_row);
4365
4366                 first_column = r5or6_first_column =
4367                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4368                 r5or6_last_column =
4369                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4370 #endif
4371                 if (r5or6_first_column != r5or6_last_column)
4372                         return IO_ACCEL_INELIGIBLE;
4373
4374                 /* Request is eligible */
4375                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4376                         le16_to_cpu(map->row_cnt);
4377
4378                 map_index = (first_group *
4379                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4380                         (map_row * total_disks_per_row) + first_column;
4381                 break;
4382         default:
4383                 return IO_ACCEL_INELIGIBLE;
4384         }
4385
4386         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4387                 return IO_ACCEL_INELIGIBLE;
4388
4389         c->phys_disk = dev->phys_disk[map_index];
4390
4391         disk_handle = dd[map_index].ioaccel_handle;
4392         disk_block = le64_to_cpu(map->disk_starting_blk) +
4393                         first_row * le16_to_cpu(map->strip_size) +
4394                         (first_row_offset - first_column *
4395                         le16_to_cpu(map->strip_size));
4396         disk_block_cnt = block_cnt;
4397
4398         /* handle differing logical/physical block sizes */
4399         if (map->phys_blk_shift) {
4400                 disk_block <<= map->phys_blk_shift;
4401                 disk_block_cnt <<= map->phys_blk_shift;
4402         }
4403         BUG_ON(disk_block_cnt > 0xffff);
4404
4405         /* build the new CDB for the physical disk I/O */
4406         if (disk_block > 0xffffffff) {
4407                 cdb[0] = is_write ? WRITE_16 : READ_16;
4408                 cdb[1] = 0;
4409                 cdb[2] = (u8) (disk_block >> 56);
4410                 cdb[3] = (u8) (disk_block >> 48);
4411                 cdb[4] = (u8) (disk_block >> 40);
4412                 cdb[5] = (u8) (disk_block >> 32);
4413                 cdb[6] = (u8) (disk_block >> 24);
4414                 cdb[7] = (u8) (disk_block >> 16);
4415                 cdb[8] = (u8) (disk_block >> 8);
4416                 cdb[9] = (u8) (disk_block);
4417                 cdb[10] = (u8) (disk_block_cnt >> 24);
4418                 cdb[11] = (u8) (disk_block_cnt >> 16);
4419                 cdb[12] = (u8) (disk_block_cnt >> 8);
4420                 cdb[13] = (u8) (disk_block_cnt);
4421                 cdb[14] = 0;
4422                 cdb[15] = 0;
4423                 cdb_len = 16;
4424         } else {
4425                 cdb[0] = is_write ? WRITE_10 : READ_10;
4426                 cdb[1] = 0;
4427                 cdb[2] = (u8) (disk_block >> 24);
4428                 cdb[3] = (u8) (disk_block >> 16);
4429                 cdb[4] = (u8) (disk_block >> 8);
4430                 cdb[5] = (u8) (disk_block);
4431                 cdb[6] = 0;
4432                 cdb[7] = (u8) (disk_block_cnt >> 8);
4433                 cdb[8] = (u8) (disk_block_cnt);
4434                 cdb[9] = 0;
4435                 cdb_len = 10;
4436         }
4437         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4438                                                 dev->scsi3addr,
4439                                                 dev->phys_disk[map_index]);
4440 }
4441
4442 /*
4443  * Submit commands down the "normal" RAID stack path
4444  * All callers to hpsa_ciss_submit must check lockup_detected
4445  * beforehand, before (opt.) and after calling cmd_alloc
4446  */
4447 static int hpsa_ciss_submit(struct ctlr_info *h,
4448         struct CommandList *c, struct scsi_cmnd *cmd,
4449         unsigned char scsi3addr[])
4450 {
4451         cmd->host_scribble = (unsigned char *) c;
4452         c->cmd_type = CMD_SCSI;
4453         c->scsi_cmd = cmd;
4454         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4455         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4456         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4457
4458         /* Fill in the request block... */
4459
4460         c->Request.Timeout = 0;
4461         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4462         c->Request.CDBLen = cmd->cmd_len;
4463         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4464         switch (cmd->sc_data_direction) {
4465         case DMA_TO_DEVICE:
4466                 c->Request.type_attr_dir =
4467                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4468                 break;
4469         case DMA_FROM_DEVICE:
4470                 c->Request.type_attr_dir =
4471                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4472                 break;
4473         case DMA_NONE:
4474                 c->Request.type_attr_dir =
4475                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4476                 break;
4477         case DMA_BIDIRECTIONAL:
4478                 /* This can happen if a buggy application does a scsi passthru
4479                  * and sets both inlen and outlen to non-zero. ( see
4480                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4481                  */
4482
4483                 c->Request.type_attr_dir =
4484                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4485                 /* This is technically wrong, and hpsa controllers should
4486                  * reject it with CMD_INVALID, which is the most correct
4487                  * response, but non-fibre backends appear to let it
4488                  * slide by, and give the same results as if this field
4489                  * were set correctly.  Either way is acceptable for
4490                  * our purposes here.
4491                  */
4492
4493                 break;
4494
4495         default:
4496                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4497                         cmd->sc_data_direction);
4498                 BUG();
4499                 break;
4500         }
4501
4502         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4503                 cmd_free(h, c);
4504                 return SCSI_MLQUEUE_HOST_BUSY;
4505         }
4506         enqueue_cmd_and_start_io(h, c);
4507         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4508         return 0;
4509 }
4510
4511 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4512                                 struct CommandList *c)
4513 {
4514         dma_addr_t cmd_dma_handle, err_dma_handle;
4515
4516         /* Zero out all of commandlist except the last field, refcount */
4517         memset(c, 0, offsetof(struct CommandList, refcount));
4518         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4519         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4520         c->err_info = h->errinfo_pool + index;
4521         memset(c->err_info, 0, sizeof(*c->err_info));
4522         err_dma_handle = h->errinfo_pool_dhandle
4523             + index * sizeof(*c->err_info);
4524         c->cmdindex = index;
4525         c->busaddr = (u32) cmd_dma_handle;
4526         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4527         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4528         c->h = h;
4529         c->scsi_cmd = SCSI_CMD_IDLE;
4530 }
4531
4532 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4533 {
4534         int i;
4535
4536         for (i = 0; i < h->nr_cmds; i++) {
4537                 struct CommandList *c = h->cmd_pool + i;
4538
4539                 hpsa_cmd_init(h, i, c);
4540                 atomic_set(&c->refcount, 0);
4541         }
4542 }
4543
4544 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4545                                 struct CommandList *c)
4546 {
4547         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4548
4549         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4550         memset(c->err_info, 0, sizeof(*c->err_info));
4551         c->busaddr = (u32) cmd_dma_handle;
4552 }
4553
4554 static int hpsa_ioaccel_submit(struct ctlr_info *h,
4555                 struct CommandList *c, struct scsi_cmnd *cmd,
4556                 unsigned char *scsi3addr)
4557 {
4558         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4559         int rc = IO_ACCEL_INELIGIBLE;
4560
4561         cmd->host_scribble = (unsigned char *) c;
4562
4563         if (dev->offload_enabled) {
4564                 hpsa_cmd_init(h, c->cmdindex, c);
4565                 c->cmd_type = CMD_SCSI;
4566                 c->scsi_cmd = cmd;
4567                 rc = hpsa_scsi_ioaccel_raid_map(h, c);
4568                 if (rc < 0)     /* scsi_dma_map failed. */
4569                         rc = SCSI_MLQUEUE_HOST_BUSY;
4570         } else if (dev->hba_ioaccel_enabled) {
4571                 hpsa_cmd_init(h, c->cmdindex, c);
4572                 c->cmd_type = CMD_SCSI;
4573                 c->scsi_cmd = cmd;
4574                 rc = hpsa_scsi_ioaccel_direct_map(h, c);
4575                 if (rc < 0)     /* scsi_dma_map failed. */
4576                         rc = SCSI_MLQUEUE_HOST_BUSY;
4577         }
4578         return rc;
4579 }
4580
4581 static void hpsa_command_resubmit_worker(struct work_struct *work)
4582 {
4583         struct scsi_cmnd *cmd;
4584         struct hpsa_scsi_dev_t *dev;
4585         struct CommandList *c = container_of(work, struct CommandList, work);
4586
4587         cmd = c->scsi_cmd;
4588         dev = cmd->device->hostdata;
4589         if (!dev) {
4590                 cmd->result = DID_NO_CONNECT << 16;
4591                 return hpsa_cmd_free_and_done(c->h, c, cmd);
4592         }
4593         if (c->abort_pending)
4594                 return hpsa_cmd_abort_and_free(c->h, c, cmd);
4595         if (c->cmd_type == CMD_IOACCEL2) {
4596                 struct ctlr_info *h = c->h;
4597                 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
4598                 int rc;
4599
4600                 if (c2->error_data.serv_response ==
4601                                 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
4602                         rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
4603                         if (rc == 0)
4604                                 return;
4605                         if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4606                                 /*
4607                                  * If we get here, it means dma mapping failed.
4608                                  * Try again via scsi mid layer, which will
4609                                  * then get SCSI_MLQUEUE_HOST_BUSY.
4610                                  */
4611                                 cmd->result = DID_IMM_RETRY << 16;
4612                                 return hpsa_cmd_free_and_done(h, c, cmd);
4613                         }
4614                         /* else, fall thru and resubmit down CISS path */
4615                 }
4616         }
4617         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4618         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4619                 /*
4620                  * If we get here, it means dma mapping failed. Try
4621                  * again via scsi mid layer, which will then get
4622                  * SCSI_MLQUEUE_HOST_BUSY.
4623                  *
4624                  * hpsa_ciss_submit will have already freed c
4625                  * if it encountered a dma mapping failure.
4626                  */
4627                 cmd->result = DID_IMM_RETRY << 16;
4628                 cmd->scsi_done(cmd);
4629         }
4630 }
4631
4632 /* Running in struct Scsi_Host->host_lock less mode */
4633 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4634 {
4635         struct ctlr_info *h;
4636         struct hpsa_scsi_dev_t *dev;
4637         unsigned char scsi3addr[8];
4638         struct CommandList *c;
4639         int rc = 0;
4640
4641         /* Get the ptr to our adapter structure out of cmd->host. */
4642         h = sdev_to_hba(cmd->device);
4643         dev = cmd->device->hostdata;
4644         if (!dev) {
4645                 cmd->result = DID_NO_CONNECT << 16;
4646                 cmd->scsi_done(cmd);
4647                 return 0;
4648         }
4649         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4650
4651         if (unlikely(lockup_detected(h))) {
4652                 cmd->result = DID_NO_CONNECT << 16;
4653                 cmd->scsi_done(cmd);
4654                 return 0;
4655         }
4656         c = cmd_alloc(h);
4657
4658         if (unlikely(lockup_detected(h))) {
4659                 cmd->result = DID_NO_CONNECT << 16;
4660                 cmd_free(h, c);
4661                 cmd->scsi_done(cmd);
4662                 return 0;
4663         }
4664
4665         /*
4666          * Call alternate submit routine for I/O accelerated commands.
4667          * Retries always go down the normal I/O path.
4668          */
4669         if (likely(cmd->retries == 0 &&
4670                 cmd->request->cmd_type == REQ_TYPE_FS &&
4671                 h->acciopath_status)) {
4672                 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
4673                 if (rc == 0)
4674                         return 0;
4675                 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4676                         cmd_free(h, c);
4677                         return SCSI_MLQUEUE_HOST_BUSY;
4678                 }
4679         }
4680         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4681 }
4682
4683 static void hpsa_scan_complete(struct ctlr_info *h)
4684 {
4685         unsigned long flags;
4686
4687         spin_lock_irqsave(&h->scan_lock, flags);
4688         h->scan_finished = 1;
4689         wake_up_all(&h->scan_wait_queue);
4690         spin_unlock_irqrestore(&h->scan_lock, flags);
4691 }
4692
4693 static void hpsa_scan_start(struct Scsi_Host *sh)
4694 {
4695         struct ctlr_info *h = shost_to_hba(sh);
4696         unsigned long flags;
4697
4698         /*
4699          * Don't let rescans be initiated on a controller known to be locked
4700          * up.  If the controller locks up *during* a rescan, that thread is
4701          * probably hosed, but at least we can prevent new rescan threads from
4702          * piling up on a locked up controller.
4703          */
4704         if (unlikely(lockup_detected(h)))
4705                 return hpsa_scan_complete(h);
4706
4707         /* wait until any scan already in progress is finished. */
4708         while (1) {
4709                 spin_lock_irqsave(&h->scan_lock, flags);
4710                 if (h->scan_finished)
4711                         break;
4712                 spin_unlock_irqrestore(&h->scan_lock, flags);
4713                 wait_event(h->scan_wait_queue, h->scan_finished);
4714                 /* Note: We don't need to worry about a race between this
4715                  * thread and driver unload because the midlayer will
4716                  * have incremented the reference count, so unload won't
4717                  * happen if we're in here.
4718                  */
4719         }
4720         h->scan_finished = 0; /* mark scan as in progress */
4721         spin_unlock_irqrestore(&h->scan_lock, flags);
4722
4723         if (unlikely(lockup_detected(h)))
4724                 return hpsa_scan_complete(h);
4725
4726         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4727
4728         hpsa_scan_complete(h);
4729 }
4730
4731 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4732 {
4733         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4734
4735         if (!logical_drive)
4736                 return -ENODEV;
4737
4738         if (qdepth < 1)
4739                 qdepth = 1;
4740         else if (qdepth > logical_drive->queue_depth)
4741                 qdepth = logical_drive->queue_depth;
4742
4743         return scsi_change_queue_depth(sdev, qdepth);
4744 }
4745
4746 static int hpsa_scan_finished(struct Scsi_Host *sh,
4747         unsigned long elapsed_time)
4748 {
4749         struct ctlr_info *h = shost_to_hba(sh);
4750         unsigned long flags;
4751         int finished;
4752
4753         spin_lock_irqsave(&h->scan_lock, flags);
4754         finished = h->scan_finished;
4755         spin_unlock_irqrestore(&h->scan_lock, flags);
4756         return finished;
4757 }
4758
4759 static void hpsa_unregister_scsi(struct ctlr_info *h)
4760 {
4761         /* we are being forcibly unloaded, and may not refuse. */
4762         scsi_remove_host(h->scsi_host);
4763         scsi_host_put(h->scsi_host);
4764         h->scsi_host = NULL;
4765 }
4766
4767 static int hpsa_register_scsi(struct ctlr_info *h)
4768 {
4769         struct Scsi_Host *sh;
4770         int error;
4771
4772         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4773         if (sh == NULL)
4774                 goto fail;
4775
4776         sh->io_port = 0;
4777         sh->n_io_port = 0;
4778         sh->this_id = -1;
4779         sh->max_channel = 3;
4780         sh->max_cmd_len = MAX_COMMAND_SIZE;
4781         sh->max_lun = HPSA_MAX_LUN;
4782         sh->max_id = HPSA_MAX_LUN;
4783         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
4784         sh->cmd_per_lun = sh->can_queue;
4785         sh->sg_tablesize = h->maxsgentries;
4786         h->scsi_host = sh;
4787         sh->hostdata[0] = (unsigned long) h;
4788         sh->irq = h->intr[h->intr_mode];
4789         sh->unique_id = sh->irq;
4790         error = scsi_add_host(sh, &h->pdev->dev);
4791         if (error)
4792                 goto fail_host_put;
4793         scsi_scan_host(sh);
4794         return 0;
4795
4796  fail_host_put:
4797         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4798                 " failed for controller %d\n", __func__, h->ctlr);
4799         scsi_host_put(sh);
4800         return error;
4801  fail:
4802         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4803                 " failed for controller %d\n", __func__, h->ctlr);
4804         return -ENOMEM;
4805 }
4806
4807 /*
4808  * Send a TEST_UNIT_READY command to the specified LUN using the specified
4809  * reply queue; returns zero if the unit is ready, and non-zero otherwise.
4810  */
4811 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
4812                                 struct CommandList *c, unsigned char lunaddr[],
4813                                 int reply_queue)
4814 {
4815         int rc;
4816
4817         /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4818         (void) fill_cmd(c, TEST_UNIT_READY, h,
4819                         NULL, 0, 0, lunaddr, TYPE_CMD);
4820         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
4821         if (rc)
4822                 return rc;
4823         /* no unmap needed here because no data xfer. */
4824
4825         /* Check if the unit is already ready. */
4826         if (c->err_info->CommandStatus == CMD_SUCCESS)
4827                 return 0;
4828
4829         /*
4830          * The first command sent after reset will receive "unit attention" to
4831          * indicate that the LUN has been reset...this is actually what we're
4832          * looking for (but, success is good too).
4833          */
4834         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4835                 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4836                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4837                          c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4838                 return 0;
4839
4840         return 1;
4841 }
4842
4843 /*
4844  * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
4845  * returns zero when the unit is ready, and non-zero when giving up.
4846  */
4847 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
4848                                 struct CommandList *c,
4849                                 unsigned char lunaddr[], int reply_queue)
4850 {
4851         int rc;
4852         int count = 0;
4853         int waittime = 1; /* seconds */
4854
4855         /* Send test unit ready until device ready, or give up. */
4856         for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
4857
4858                 /*
4859                  * Wait for a bit.  do this first, because if we send
4860                  * the TUR right away, the reset will just abort it.
4861                  */
4862                 msleep(1000 * waittime);
4863
4864                 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
4865                 if (!rc)
4866                         break;
4867
4868                 /* Increase wait time with each try, up to a point. */
4869                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4870                         waittime *= 2;
4871
4872                 dev_warn(&h->pdev->dev,
4873                          "waiting %d secs for device to become ready.\n",
4874                          waittime);
4875         }
4876
4877         return rc;
4878 }
4879
4880 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4881                                            unsigned char lunaddr[],
4882                                            int reply_queue)
4883 {
4884         int first_queue;
4885         int last_queue;
4886         int rq;
4887         int rc = 0;
4888         struct CommandList *c;
4889
4890         c = cmd_alloc(h);
4891
4892         /*
4893          * If no specific reply queue was requested, then send the TUR
4894          * repeatedly, requesting a reply on each reply queue; otherwise execute
4895          * the loop exactly once using only the specified queue.
4896          */
4897         if (reply_queue == DEFAULT_REPLY_QUEUE) {
4898                 first_queue = 0;
4899                 last_queue = h->nreply_queues - 1;
4900         } else {
4901                 first_queue = reply_queue;
4902                 last_queue = reply_queue;
4903         }
4904
4905         for (rq = first_queue; rq <= last_queue; rq++) {
4906                 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
4907                 if (rc)
4908                         break;
4909         }
4910
4911         if (rc)
4912                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4913         else
4914                 dev_warn(&h->pdev->dev, "device is ready.\n");
4915
4916         cmd_free(h, c);
4917         return rc;
4918 }
4919
4920 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4921  * complaining.  Doing a host- or bus-reset can't do anything good here.
4922  */
4923 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4924 {
4925         int rc;
4926         struct ctlr_info *h;
4927         struct hpsa_scsi_dev_t *dev;
4928
4929         /* find the controller to which the command to be aborted was sent */
4930         h = sdev_to_hba(scsicmd->device);
4931         if (h == NULL) /* paranoia */
4932                 return FAILED;
4933
4934         if (lockup_detected(h))
4935                 return FAILED;
4936
4937         dev = scsicmd->device->hostdata;
4938         if (!dev) {
4939                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4940                         "device lookup failed.\n");
4941                 return FAILED;
4942         }
4943
4944         /* if controller locked up, we can guarantee command won't complete */
4945         if (lockup_detected(h)) {
4946                 dev_warn(&h->pdev->dev,
4947                         "scsi %d:%d:%d:%d RESET FAILED, lockup detected\n",
4948                         h->scsi_host->host_no, dev->bus, dev->target,
4949                         dev->lun);
4950                 return FAILED;
4951         }
4952
4953         /* this reset request might be the result of a lockup; check */
4954         if (detect_controller_lockup(h)) {
4955                 dev_warn(&h->pdev->dev,
4956                          "scsi %d:%d:%d:%d RESET FAILED, new lockup detected\n",
4957                          h->scsi_host->host_no, dev->bus, dev->target,
4958                          dev->lun);
4959                 return FAILED;
4960         }
4961
4962         hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");
4963
4964         /* send a reset to the SCSI LUN which the command was sent to */
4965         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
4966                              DEFAULT_REPLY_QUEUE);
4967         if (rc == 0)
4968                 return SUCCESS;
4969
4970         dev_warn(&h->pdev->dev,
4971                 "scsi %d:%d:%d:%d reset failed\n",
4972                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4973         return FAILED;
4974 }
4975
4976 static void swizzle_abort_tag(u8 *tag)
4977 {
4978         u8 original_tag[8];
4979
4980         memcpy(original_tag, tag, 8);
4981         tag[0] = original_tag[3];
4982         tag[1] = original_tag[2];
4983         tag[2] = original_tag[1];
4984         tag[3] = original_tag[0];
4985         tag[4] = original_tag[7];
4986         tag[5] = original_tag[6];
4987         tag[6] = original_tag[5];
4988         tag[7] = original_tag[4];
4989 }
4990
4991 static void hpsa_get_tag(struct ctlr_info *h,
4992         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
4993 {
4994         u64 tag;
4995         if (c->cmd_type == CMD_IOACCEL1) {
4996                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4997                         &h->ioaccel_cmd_pool[c->cmdindex];
4998                 tag = le64_to_cpu(cm1->tag);
4999                 *tagupper = cpu_to_le32(tag >> 32);
5000                 *taglower = cpu_to_le32(tag);
5001                 return;
5002         }
5003         if (c->cmd_type == CMD_IOACCEL2) {
5004                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
5005                         &h->ioaccel2_cmd_pool[c->cmdindex];
5006                 /* upper tag not used in ioaccel2 mode */
5007                 memset(tagupper, 0, sizeof(*tagupper));
5008                 *taglower = cm2->Tag;
5009                 return;
5010         }
5011         tag = le64_to_cpu(c->Header.tag);
5012         *tagupper = cpu_to_le32(tag >> 32);
5013         *taglower = cpu_to_le32(tag);
5014 }
5015
5016 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
5017         struct CommandList *abort, int reply_queue)
5018 {
5019         int rc = IO_OK;
5020         struct CommandList *c;
5021         struct ErrorInfo *ei;
5022         __le32 tagupper, taglower;
5023
5024         c = cmd_alloc(h);
5025
5026         /* fill_cmd can't fail here, no buffer to map */
5027         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
5028                 0, 0, scsi3addr, TYPE_MSG);
5029         if (h->needs_abort_tags_swizzled)
5030                 swizzle_abort_tag(&c->Request.CDB[4]);
5031         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5032         hpsa_get_tag(h, abort, &taglower, &tagupper);
5033         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
5034                 __func__, tagupper, taglower);
5035         /* no unmap needed here because no data xfer. */
5036
5037         ei = c->err_info;
5038         switch (ei->CommandStatus) {
5039         case CMD_SUCCESS:
5040                 break;
5041         case CMD_TMF_STATUS:
5042                 rc = hpsa_evaluate_tmf_status(h, c);
5043                 break;
5044         case CMD_UNABORTABLE: /* Very common, don't make noise. */
5045                 rc = -1;
5046                 break;
5047         default:
5048                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
5049                         __func__, tagupper, taglower);
5050                 hpsa_scsi_interpret_error(h, c);
5051                 rc = -1;
5052                 break;
5053         }
5054         cmd_free(h, c);
5055         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
5056                 __func__, tagupper, taglower);
5057         return rc;
5058 }
5059
5060 static void setup_ioaccel2_abort_cmd(struct CommandList *c, struct ctlr_info *h,
5061         struct CommandList *command_to_abort, int reply_queue)
5062 {
5063         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5064         struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
5065         struct io_accel2_cmd *c2a =
5066                 &h->ioaccel2_cmd_pool[command_to_abort->cmdindex];
5067         struct scsi_cmnd *scmd = command_to_abort->scsi_cmd;
5068         struct hpsa_scsi_dev_t *dev = scmd->device->hostdata;
5069
5070         /*
5071          * We're overlaying struct hpsa_tmf_struct on top of something which
5072          * was allocated as a struct io_accel2_cmd, so we better be sure it
5073          * actually fits, and doesn't overrun the error info space.
5074          */
5075         BUILD_BUG_ON(sizeof(struct hpsa_tmf_struct) >
5076                         sizeof(struct io_accel2_cmd));
5077         BUG_ON(offsetof(struct io_accel2_cmd, error_data) <
5078                         offsetof(struct hpsa_tmf_struct, error_len) +
5079                                 sizeof(ac->error_len));
5080
5081         c->cmd_type = IOACCEL2_TMF;
5082         c->scsi_cmd = SCSI_CMD_BUSY;
5083
5084         /* Adjust the DMA address to point to the accelerated command buffer */
5085         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
5086                                 (c->cmdindex * sizeof(struct io_accel2_cmd));
5087         BUG_ON(c->busaddr & 0x0000007F);
5088
5089         memset(ac, 0, sizeof(*c2)); /* yes this is correct */
5090         ac->iu_type = IOACCEL2_IU_TMF_TYPE;
5091         ac->reply_queue = reply_queue;
5092         ac->tmf = IOACCEL2_TMF_ABORT;
5093         ac->it_nexus = cpu_to_le32(dev->ioaccel_handle);
5094         memset(ac->lun_id, 0, sizeof(ac->lun_id));
5095         ac->tag = cpu_to_le64(c->cmdindex << DIRECT_LOOKUP_SHIFT);
5096         ac->abort_tag = cpu_to_le64(le32_to_cpu(c2a->Tag));
5097         ac->error_ptr = cpu_to_le64(c->busaddr +
5098                         offsetof(struct io_accel2_cmd, error_data));
5099         ac->error_len = cpu_to_le32(sizeof(c2->error_data));
5100 }
5101
5102 /* ioaccel2 path firmware cannot handle abort task requests.
5103  * Change abort requests to physical target reset, and send to the
5104  * address of the physical disk used for the ioaccel 2 command.
5105  * Return 0 on success (IO_OK)
5106  *       -1 on failure
5107  */
5108
5109 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
5110         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5111 {
5112         int rc = IO_OK;
5113         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
5114         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
5115         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
5116         unsigned char *psa = &phys_scsi3addr[0];
5117
5118         /* Get a pointer to the hpsa logical device. */
5119         scmd = abort->scsi_cmd;
5120         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
5121         if (dev == NULL) {
5122                 dev_warn(&h->pdev->dev,
5123                         "Cannot abort: no device pointer for command.\n");
5124                         return -1; /* not abortable */
5125         }
5126
5127         if (h->raid_offload_debug > 0)
5128                 dev_info(&h->pdev->dev,
5129                         "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5130                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
5131                         "Reset as abort",
5132                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
5133                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
5134
5135         if (!dev->offload_enabled) {
5136                 dev_warn(&h->pdev->dev,
5137                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
5138                 return -1; /* not abortable */
5139         }
5140
5141         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
5142         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
5143                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
5144                 return -1; /* not abortable */
5145         }
5146
5147         /* send the reset */
5148         if (h->raid_offload_debug > 0)
5149                 dev_info(&h->pdev->dev,
5150                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5151                         psa[0], psa[1], psa[2], psa[3],
5152                         psa[4], psa[5], psa[6], psa[7]);
5153         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
5154         if (rc != 0) {
5155                 dev_warn(&h->pdev->dev,
5156                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5157                         psa[0], psa[1], psa[2], psa[3],
5158                         psa[4], psa[5], psa[6], psa[7]);
5159                 return rc; /* failed to reset */
5160         }
5161
5162         /* wait for device to recover */
5163         if (wait_for_device_to_become_ready(h, psa, reply_queue) != 0) {
5164                 dev_warn(&h->pdev->dev,
5165                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5166                         psa[0], psa[1], psa[2], psa[3],
5167                         psa[4], psa[5], psa[6], psa[7]);
5168                 return -1;  /* failed to recover */
5169         }
5170
5171         /* device recovered */
5172         dev_info(&h->pdev->dev,
5173                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
5174                 psa[0], psa[1], psa[2], psa[3],
5175                 psa[4], psa[5], psa[6], psa[7]);
5176
5177         return rc; /* success */
5178 }
5179
5180 static int hpsa_send_abort_ioaccel2(struct ctlr_info *h,
5181         struct CommandList *abort, int reply_queue)
5182 {
5183         int rc = IO_OK;
5184         struct CommandList *c;
5185         __le32 taglower, tagupper;
5186         struct hpsa_scsi_dev_t *dev;
5187         struct io_accel2_cmd *c2;
5188
5189         dev = abort->scsi_cmd->device->hostdata;
5190         if (!dev->offload_enabled && !dev->hba_ioaccel_enabled)
5191                 return -1;
5192
5193         c = cmd_alloc(h);
5194         setup_ioaccel2_abort_cmd(c, h, abort, reply_queue);
5195         c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5196         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
5197         hpsa_get_tag(h, abort, &taglower, &tagupper);
5198         dev_dbg(&h->pdev->dev,
5199                 "%s: Tag:0x%08x:%08x: do_simple_cmd(ioaccel2 abort) completed.\n",
5200                 __func__, tagupper, taglower);
5201         /* no unmap needed here because no data xfer. */
5202
5203         dev_dbg(&h->pdev->dev,
5204                 "%s: Tag:0x%08x:%08x: abort service response = 0x%02x.\n",
5205                 __func__, tagupper, taglower, c2->error_data.serv_response);
5206         switch (c2->error_data.serv_response) {
5207         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
5208         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
5209                 rc = 0;
5210                 break;
5211         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
5212         case IOACCEL2_SERV_RESPONSE_FAILURE:
5213         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
5214                 rc = -1;
5215                 break;
5216         default:
5217                 dev_warn(&h->pdev->dev,
5218                         "%s: Tag:0x%08x:%08x: unknown abort service response 0x%02x\n",
5219                         __func__, tagupper, taglower,
5220                         c2->error_data.serv_response);
5221                 rc = -1;
5222         }
5223         cmd_free(h, c);
5224         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
5225                 tagupper, taglower);
5226         return rc;
5227 }
5228
5229 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
5230         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
5231 {
5232         /*
5233          * ioccelerator mode 2 commands should be aborted via the
5234          * accelerated path, since RAID path is unaware of these commands,
5235          * but not all underlying firmware can handle abort TMF.
5236          * Change abort to physical device reset when abort TMF is unsupported.
5237          */
5238         if (abort->cmd_type == CMD_IOACCEL2) {
5239                 if (HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)
5240                         return hpsa_send_abort_ioaccel2(h, abort,
5241                                                 reply_queue);
5242                 else
5243                         return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
5244                                                         abort, reply_queue);
5245         }
5246         return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
5247 }
5248
5249 /* Find out which reply queue a command was meant to return on */
5250 static int hpsa_extract_reply_queue(struct ctlr_info *h,
5251                                         struct CommandList *c)
5252 {
5253         if (c->cmd_type == CMD_IOACCEL2)
5254                 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
5255         return c->Header.ReplyQueue;
5256 }
5257
5258 /*
5259  * Limit concurrency of abort commands to prevent
5260  * over-subscription of commands
5261  */
5262 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
5263 {
5264 #define ABORT_CMD_WAIT_MSECS 5000
5265         return !wait_event_timeout(h->abort_cmd_wait_queue,
5266                         atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
5267                         msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
5268 }
5269
5270 /* Send an abort for the specified command.
5271  *      If the device and controller support it,
5272  *              send a task abort request.
5273  */
5274 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
5275 {
5276
5277         int rc;
5278         struct ctlr_info *h;
5279         struct hpsa_scsi_dev_t *dev;
5280         struct CommandList *abort; /* pointer to command to be aborted */
5281         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
5282         char msg[256];          /* For debug messaging. */
5283         int ml = 0;
5284         __le32 tagupper, taglower;
5285         int refcount, reply_queue;
5286
5287         if (sc == NULL)
5288                 return FAILED;
5289
5290         if (sc->device == NULL)
5291                 return FAILED;
5292
5293         /* Find the controller of the command to be aborted */
5294         h = sdev_to_hba(sc->device);
5295         if (h == NULL)
5296                 return FAILED;
5297
5298         /* Find the device of the command to be aborted */
5299         dev = sc->device->hostdata;
5300         if (!dev) {
5301                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
5302                                 msg);
5303                 return FAILED;
5304         }
5305
5306         /* If controller locked up, we can guarantee command won't complete */
5307         if (lockup_detected(h)) {
5308                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5309                                         "ABORT FAILED, lockup detected");
5310                 return FAILED;
5311         }
5312
5313         /* This is a good time to check if controller lockup has occurred */
5314         if (detect_controller_lockup(h)) {
5315                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5316                                         "ABORT FAILED, new lockup detected");
5317                 return FAILED;
5318         }
5319
5320         /* Check that controller supports some kind of task abort */
5321         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5322                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5323                 return FAILED;
5324
5325         memset(msg, 0, sizeof(msg));
5326         ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s %p",
5327                 h->scsi_host->host_no, sc->device->channel,
5328                 sc->device->id, sc->device->lun,
5329                 "Aborting command", sc);
5330
5331         /* Get SCSI command to be aborted */
5332         abort = (struct CommandList *) sc->host_scribble;
5333         if (abort == NULL) {
5334                 /* This can happen if the command already completed. */
5335                 return SUCCESS;
5336         }
5337         refcount = atomic_inc_return(&abort->refcount);
5338         if (refcount == 1) { /* Command is done already. */
5339                 cmd_free(h, abort);
5340                 return SUCCESS;
5341         }
5342
5343         /* Don't bother trying the abort if we know it won't work. */
5344         if (abort->cmd_type != CMD_IOACCEL2 &&
5345                 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5346                 cmd_free(h, abort);
5347                 return FAILED;
5348         }
5349
5350         /*
5351          * Check that we're aborting the right command.
5352          * It's possible the CommandList already completed and got re-used.
5353          */
5354         if (abort->scsi_cmd != sc) {
5355                 cmd_free(h, abort);
5356                 return SUCCESS;
5357         }
5358
5359         abort->abort_pending = true;
5360         hpsa_get_tag(h, abort, &taglower, &tagupper);
5361         reply_queue = hpsa_extract_reply_queue(h, abort);
5362         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5363         as  = abort->scsi_cmd;
5364         if (as != NULL)
5365                 ml += sprintf(msg+ml,
5366                         "CDBLen: %d CDB: 0x%02x%02x... SN: 0x%lx ",
5367                         as->cmd_len, as->cmnd[0], as->cmnd[1],
5368                         as->serial_number);
5369         dev_warn(&h->pdev->dev, "%s BEING SENT\n", msg);
5370         hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5371
5372         /*
5373          * Command is in flight, or possibly already completed
5374          * by the firmware (but not to the scsi mid layer) but we can't
5375          * distinguish which.  Send the abort down.
5376          */
5377         if (wait_for_available_abort_cmd(h)) {
5378                 dev_warn(&h->pdev->dev,
5379                         "%s FAILED, timeout waiting for an abort command to become available.\n",
5380                         msg);
5381                 cmd_free(h, abort);
5382                 return FAILED;
5383         }
5384         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5385         atomic_inc(&h->abort_cmds_available);
5386         wake_up_all(&h->abort_cmd_wait_queue);
5387         if (rc != 0) {
5388                 dev_warn(&h->pdev->dev, "%s SENT, FAILED\n", msg);
5389                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5390                                 "FAILED to abort command");
5391                 cmd_free(h, abort);
5392                 return FAILED;
5393         }
5394         dev_info(&h->pdev->dev, "%s SENT, SUCCESS\n", msg);
5395         wait_event(h->abort_sync_wait_queue,
5396                    abort->scsi_cmd != sc || lockup_detected(h));
5397         cmd_free(h, abort);
5398         return !lockup_detected(h) ? SUCCESS : FAILED;
5399 }
5400
5401 /*
5402  * For operations that cannot sleep, a command block is allocated at init,
5403  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5404  * which ones are free or in use.  Lock must be held when calling this.
5405  * cmd_free() is the complement.
5406  * This function never gives up and returns NULL.  If it hangs,
5407  * another thread must call cmd_free() to free some tags.
5408  */
5409
5410 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5411 {
5412         struct CommandList *c;
5413         int refcount, i;
5414         unsigned long offset;
5415
5416         /*
5417          * There is some *extremely* small but non-zero chance that that
5418          * multiple threads could get in here, and one thread could
5419          * be scanning through the list of bits looking for a free
5420          * one, but the free ones are always behind him, and other
5421          * threads sneak in behind him and eat them before he can
5422          * get to them, so that while there is always a free one, a
5423          * very unlucky thread might be starved anyway, never able to
5424          * beat the other threads.  In reality, this happens so
5425          * infrequently as to be indistinguishable from never.
5426          */
5427
5428         offset = h->last_allocation; /* benignly racy */
5429         for (;;) {
5430                 i = find_next_zero_bit(h->cmd_pool_bits, h->nr_cmds, offset);
5431                 if (unlikely(i == h->nr_cmds)) {
5432                         offset = 0;
5433                         continue;
5434                 }
5435                 c = h->cmd_pool + i;
5436                 refcount = atomic_inc_return(&c->refcount);
5437                 if (unlikely(refcount > 1)) {
5438                         cmd_free(h, c); /* already in use */
5439                         offset = (i + 1) % h->nr_cmds;
5440                         continue;
5441                 }
5442                 set_bit(i & (BITS_PER_LONG - 1),
5443                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5444                 break; /* it's ours now. */
5445         }
5446         h->last_allocation = i; /* benignly racy */
5447         hpsa_cmd_partial_init(h, i, c);
5448         return c;
5449 }
5450
5451 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5452 {
5453         if (atomic_dec_and_test(&c->refcount)) {
5454                 int i;
5455
5456                 i = c - h->cmd_pool;
5457                 clear_bit(i & (BITS_PER_LONG - 1),
5458                           h->cmd_pool_bits + (i / BITS_PER_LONG));
5459         }
5460 }
5461
5462 #ifdef CONFIG_COMPAT
5463
5464 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5465         void __user *arg)
5466 {
5467         IOCTL32_Command_struct __user *arg32 =
5468             (IOCTL32_Command_struct __user *) arg;
5469         IOCTL_Command_struct arg64;
5470         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5471         int err;
5472         u32 cp;
5473
5474         memset(&arg64, 0, sizeof(arg64));
5475         err = 0;
5476         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5477                            sizeof(arg64.LUN_info));
5478         err |= copy_from_user(&arg64.Request, &arg32->Request,
5479                            sizeof(arg64.Request));
5480         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5481                            sizeof(arg64.error_info));
5482         err |= get_user(arg64.buf_size, &arg32->buf_size);
5483         err |= get_user(cp, &arg32->buf);
5484         arg64.buf = compat_ptr(cp);
5485         err |= copy_to_user(p, &arg64, sizeof(arg64));
5486
5487         if (err)
5488                 return -EFAULT;
5489
5490         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5491         if (err)
5492                 return err;
5493         err |= copy_in_user(&arg32->error_info, &p->error_info,
5494                          sizeof(arg32->error_info));
5495         if (err)
5496                 return -EFAULT;
5497         return err;
5498 }
5499
5500 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5501         int cmd, void __user *arg)
5502 {
5503         BIG_IOCTL32_Command_struct __user *arg32 =
5504             (BIG_IOCTL32_Command_struct __user *) arg;
5505         BIG_IOCTL_Command_struct arg64;
5506         BIG_IOCTL_Command_struct __user *p =
5507             compat_alloc_user_space(sizeof(arg64));
5508         int err;
5509         u32 cp;
5510
5511         memset(&arg64, 0, sizeof(arg64));
5512         err = 0;
5513         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5514                            sizeof(arg64.LUN_info));
5515         err |= copy_from_user(&arg64.Request, &arg32->Request,
5516                            sizeof(arg64.Request));
5517         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5518                            sizeof(arg64.error_info));
5519         err |= get_user(arg64.buf_size, &arg32->buf_size);
5520         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5521         err |= get_user(cp, &arg32->buf);
5522         arg64.buf = compat_ptr(cp);
5523         err |= copy_to_user(p, &arg64, sizeof(arg64));
5524
5525         if (err)
5526                 return -EFAULT;
5527
5528         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5529         if (err)
5530                 return err;
5531         err |= copy_in_user(&arg32->error_info, &p->error_info,
5532                          sizeof(arg32->error_info));
5533         if (err)
5534                 return -EFAULT;
5535         return err;
5536 }
5537
5538 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5539 {
5540         switch (cmd) {
5541         case CCISS_GETPCIINFO:
5542         case CCISS_GETINTINFO:
5543         case CCISS_SETINTINFO:
5544         case CCISS_GETNODENAME:
5545         case CCISS_SETNODENAME:
5546         case CCISS_GETHEARTBEAT:
5547         case CCISS_GETBUSTYPES:
5548         case CCISS_GETFIRMVER:
5549         case CCISS_GETDRIVVER:
5550         case CCISS_REVALIDVOLS:
5551         case CCISS_DEREGDISK:
5552         case CCISS_REGNEWDISK:
5553         case CCISS_REGNEWD:
5554         case CCISS_RESCANDISK:
5555         case CCISS_GETLUNINFO:
5556                 return hpsa_ioctl(dev, cmd, arg);
5557
5558         case CCISS_PASSTHRU32:
5559                 return hpsa_ioctl32_passthru(dev, cmd, arg);
5560         case CCISS_BIG_PASSTHRU32:
5561                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
5562
5563         default:
5564                 return -ENOIOCTLCMD;
5565         }
5566 }
5567 #endif
5568
5569 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
5570 {
5571         struct hpsa_pci_info pciinfo;
5572
5573         if (!argp)
5574                 return -EINVAL;
5575         pciinfo.domain = pci_domain_nr(h->pdev->bus);
5576         pciinfo.bus = h->pdev->bus->number;
5577         pciinfo.dev_fn = h->pdev->devfn;
5578         pciinfo.board_id = h->board_id;
5579         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
5580                 return -EFAULT;
5581         return 0;
5582 }
5583
5584 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
5585 {
5586         DriverVer_type DriverVer;
5587         unsigned char vmaj, vmin, vsubmin;
5588         int rc;
5589
5590         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
5591                 &vmaj, &vmin, &vsubmin);
5592         if (rc != 3) {
5593                 dev_info(&h->pdev->dev, "driver version string '%s' "
5594                         "unrecognized.", HPSA_DRIVER_VERSION);
5595                 vmaj = 0;
5596                 vmin = 0;
5597                 vsubmin = 0;
5598         }
5599         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
5600         if (!argp)
5601                 return -EINVAL;
5602         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
5603                 return -EFAULT;
5604         return 0;
5605 }
5606
5607 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5608 {
5609         IOCTL_Command_struct iocommand;
5610         struct CommandList *c;
5611         char *buff = NULL;
5612         u64 temp64;
5613         int rc = 0;
5614
5615         if (!argp)
5616                 return -EINVAL;
5617         if (!capable(CAP_SYS_RAWIO))
5618                 return -EPERM;
5619         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
5620                 return -EFAULT;
5621         if ((iocommand.buf_size < 1) &&
5622             (iocommand.Request.Type.Direction != XFER_NONE)) {
5623                 return -EINVAL;
5624         }
5625         if (iocommand.buf_size > 0) {
5626                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
5627                 if (buff == NULL)
5628                         return -ENOMEM;
5629                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5630                         /* Copy the data into the buffer we created */
5631                         if (copy_from_user(buff, iocommand.buf,
5632                                 iocommand.buf_size)) {
5633                                 rc = -EFAULT;
5634                                 goto out_kfree;
5635                         }
5636                 } else {
5637                         memset(buff, 0, iocommand.buf_size);
5638                 }
5639         }
5640         c = cmd_alloc(h);
5641
5642         /* Fill in the command type */
5643         c->cmd_type = CMD_IOCTL_PEND;
5644         c->scsi_cmd = SCSI_CMD_BUSY;
5645         /* Fill in Command Header */
5646         c->Header.ReplyQueue = 0; /* unused in simple mode */
5647         if (iocommand.buf_size > 0) {   /* buffer to fill */
5648                 c->Header.SGList = 1;
5649                 c->Header.SGTotal = cpu_to_le16(1);
5650         } else  { /* no buffers to fill */
5651                 c->Header.SGList = 0;
5652                 c->Header.SGTotal = cpu_to_le16(0);
5653         }
5654         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
5655
5656         /* Fill in Request block */
5657         memcpy(&c->Request, &iocommand.Request,
5658                 sizeof(c->Request));
5659
5660         /* Fill in the scatter gather information */
5661         if (iocommand.buf_size > 0) {
5662                 temp64 = pci_map_single(h->pdev, buff,
5663                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
5664                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
5665                         c->SG[0].Addr = cpu_to_le64(0);
5666                         c->SG[0].Len = cpu_to_le32(0);
5667                         rc = -ENOMEM;
5668                         goto out;
5669                 }
5670                 c->SG[0].Addr = cpu_to_le64(temp64);
5671                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
5672                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
5673         }
5674         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5675         if (iocommand.buf_size > 0)
5676                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5677         check_ioctl_unit_attention(h, c);
5678         if (rc) {
5679                 rc = -EIO;
5680                 goto out;
5681         }
5682
5683         /* Copy the error information out */
5684         memcpy(&iocommand.error_info, c->err_info,
5685                 sizeof(iocommand.error_info));
5686         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5687                 rc = -EFAULT;
5688                 goto out;
5689         }
5690         if ((iocommand.Request.Type.Direction & XFER_READ) &&
5691                 iocommand.buf_size > 0) {
5692                 /* Copy the data out of the buffer we created */
5693                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
5694                         rc = -EFAULT;
5695                         goto out;
5696                 }
5697         }
5698 out:
5699         cmd_free(h, c);
5700 out_kfree:
5701         kfree(buff);
5702         return rc;
5703 }
5704
5705 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5706 {
5707         BIG_IOCTL_Command_struct *ioc;
5708         struct CommandList *c;
5709         unsigned char **buff = NULL;
5710         int *buff_size = NULL;
5711         u64 temp64;
5712         BYTE sg_used = 0;
5713         int status = 0;
5714         u32 left;
5715         u32 sz;
5716         BYTE __user *data_ptr;
5717
5718         if (!argp)
5719                 return -EINVAL;
5720         if (!capable(CAP_SYS_RAWIO))
5721                 return -EPERM;
5722         ioc = (BIG_IOCTL_Command_struct *)
5723             kmalloc(sizeof(*ioc), GFP_KERNEL);
5724         if (!ioc) {
5725                 status = -ENOMEM;
5726                 goto cleanup1;
5727         }
5728         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
5729                 status = -EFAULT;
5730                 goto cleanup1;
5731         }
5732         if ((ioc->buf_size < 1) &&
5733             (ioc->Request.Type.Direction != XFER_NONE)) {
5734                 status = -EINVAL;
5735                 goto cleanup1;
5736         }
5737         /* Check kmalloc limits  using all SGs */
5738         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5739                 status = -EINVAL;
5740                 goto cleanup1;
5741         }
5742         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5743                 status = -EINVAL;
5744                 goto cleanup1;
5745         }
5746         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5747         if (!buff) {
5748                 status = -ENOMEM;
5749                 goto cleanup1;
5750         }
5751         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5752         if (!buff_size) {
5753                 status = -ENOMEM;
5754                 goto cleanup1;
5755         }
5756         left = ioc->buf_size;
5757         data_ptr = ioc->buf;
5758         while (left) {
5759                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5760                 buff_size[sg_used] = sz;
5761                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5762                 if (buff[sg_used] == NULL) {
5763                         status = -ENOMEM;
5764                         goto cleanup1;
5765                 }
5766                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5767                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5768                                 status = -EFAULT;
5769                                 goto cleanup1;
5770                         }
5771                 } else
5772                         memset(buff[sg_used], 0, sz);
5773                 left -= sz;
5774                 data_ptr += sz;
5775                 sg_used++;
5776         }
5777         c = cmd_alloc(h);
5778
5779         c->cmd_type = CMD_IOCTL_PEND;
5780         c->scsi_cmd = SCSI_CMD_BUSY;
5781         c->Header.ReplyQueue = 0;
5782         c->Header.SGList = (u8) sg_used;
5783         c->Header.SGTotal = cpu_to_le16(sg_used);
5784         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5785         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5786         if (ioc->buf_size > 0) {
5787                 int i;
5788                 for (i = 0; i < sg_used; i++) {
5789                         temp64 = pci_map_single(h->pdev, buff[i],
5790                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5791                         if (dma_mapping_error(&h->pdev->dev,
5792                                                         (dma_addr_t) temp64)) {
5793                                 c->SG[i].Addr = cpu_to_le64(0);
5794                                 c->SG[i].Len = cpu_to_le32(0);
5795                                 hpsa_pci_unmap(h->pdev, c, i,
5796                                         PCI_DMA_BIDIRECTIONAL);
5797                                 status = -ENOMEM;
5798                                 goto cleanup0;
5799                         }
5800                         c->SG[i].Addr = cpu_to_le64(temp64);
5801                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
5802                         c->SG[i].Ext = cpu_to_le32(0);
5803                 }
5804                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5805         }
5806         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5807         if (sg_used)
5808                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5809         check_ioctl_unit_attention(h, c);
5810         if (status) {
5811                 status = -EIO;
5812                 goto cleanup0;
5813         }
5814
5815         /* Copy the error information out */
5816         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5817         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5818                 status = -EFAULT;
5819                 goto cleanup0;
5820         }
5821         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5822                 int i;
5823
5824                 /* Copy the data out of the buffer we created */
5825                 BYTE __user *ptr = ioc->buf;
5826                 for (i = 0; i < sg_used; i++) {
5827                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5828                                 status = -EFAULT;
5829                                 goto cleanup0;
5830                         }
5831                         ptr += buff_size[i];
5832                 }
5833         }
5834         status = 0;
5835 cleanup0:
5836         cmd_free(h, c);
5837 cleanup1:
5838         if (buff) {
5839                 int i;
5840
5841                 for (i = 0; i < sg_used; i++)
5842                         kfree(buff[i]);
5843                 kfree(buff);
5844         }
5845         kfree(buff_size);
5846         kfree(ioc);
5847         return status;
5848 }
5849
5850 static void check_ioctl_unit_attention(struct ctlr_info *h,
5851         struct CommandList *c)
5852 {
5853         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5854                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5855                 (void) check_for_unit_attention(h, c);
5856 }
5857
5858 /*
5859  * ioctl
5860  */
5861 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5862 {
5863         struct ctlr_info *h;
5864         void __user *argp = (void __user *)arg;
5865         int rc;
5866
5867         h = sdev_to_hba(dev);
5868
5869         switch (cmd) {
5870         case CCISS_DEREGDISK:
5871         case CCISS_REGNEWDISK:
5872         case CCISS_REGNEWD:
5873                 hpsa_scan_start(h->scsi_host);
5874                 return 0;
5875         case CCISS_GETPCIINFO:
5876                 return hpsa_getpciinfo_ioctl(h, argp);
5877         case CCISS_GETDRIVVER:
5878                 return hpsa_getdrivver_ioctl(h, argp);
5879         case CCISS_PASSTHRU:
5880                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5881                         return -EAGAIN;
5882                 rc = hpsa_passthru_ioctl(h, argp);
5883                 atomic_inc(&h->passthru_cmds_avail);
5884                 return rc;
5885         case CCISS_BIG_PASSTHRU:
5886                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5887                         return -EAGAIN;
5888                 rc = hpsa_big_passthru_ioctl(h, argp);
5889                 atomic_inc(&h->passthru_cmds_avail);
5890                 return rc;
5891         default:
5892                 return -ENOTTY;
5893         }
5894 }
5895
5896 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5897                                 u8 reset_type)
5898 {
5899         struct CommandList *c;
5900
5901         c = cmd_alloc(h);
5902
5903         /* fill_cmd can't fail here, no data buffer to map */
5904         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5905                 RAID_CTLR_LUNID, TYPE_MSG);
5906         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5907         c->waiting = NULL;
5908         enqueue_cmd_and_start_io(h, c);
5909         /* Don't wait for completion, the reset won't complete.  Don't free
5910          * the command either.  This is the last command we will send before
5911          * re-initializing everything, so it doesn't matter and won't leak.
5912          */
5913         return;
5914 }
5915
5916 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5917         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5918         int cmd_type)
5919 {
5920         int pci_dir = XFER_NONE;
5921         u64 tag; /* for commands to be aborted */
5922
5923         c->cmd_type = CMD_IOCTL_PEND;
5924         c->scsi_cmd = SCSI_CMD_BUSY;
5925         c->Header.ReplyQueue = 0;
5926         if (buff != NULL && size > 0) {
5927                 c->Header.SGList = 1;
5928                 c->Header.SGTotal = cpu_to_le16(1);
5929         } else {
5930                 c->Header.SGList = 0;
5931                 c->Header.SGTotal = cpu_to_le16(0);
5932         }
5933         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5934
5935         if (cmd_type == TYPE_CMD) {
5936                 switch (cmd) {
5937                 case HPSA_INQUIRY:
5938                         /* are we trying to read a vital product page */
5939                         if (page_code & VPD_PAGE) {
5940                                 c->Request.CDB[1] = 0x01;
5941                                 c->Request.CDB[2] = (page_code & 0xff);
5942                         }
5943                         c->Request.CDBLen = 6;
5944                         c->Request.type_attr_dir =
5945                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5946                         c->Request.Timeout = 0;
5947                         c->Request.CDB[0] = HPSA_INQUIRY;
5948                         c->Request.CDB[4] = size & 0xFF;
5949                         break;
5950                 case HPSA_REPORT_LOG:
5951                 case HPSA_REPORT_PHYS:
5952                         /* Talking to controller so It's a physical command
5953                            mode = 00 target = 0.  Nothing to write.
5954                          */
5955                         c->Request.CDBLen = 12;
5956                         c->Request.type_attr_dir =
5957                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5958                         c->Request.Timeout = 0;
5959                         c->Request.CDB[0] = cmd;
5960                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5961                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5962                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5963                         c->Request.CDB[9] = size & 0xFF;
5964                         break;
5965                 case HPSA_CACHE_FLUSH:
5966                         c->Request.CDBLen = 12;
5967                         c->Request.type_attr_dir =
5968                                         TYPE_ATTR_DIR(cmd_type,
5969                                                 ATTR_SIMPLE, XFER_WRITE);
5970                         c->Request.Timeout = 0;
5971                         c->Request.CDB[0] = BMIC_WRITE;
5972                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5973                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5974                         c->Request.CDB[8] = size & 0xFF;
5975                         break;
5976                 case TEST_UNIT_READY:
5977                         c->Request.CDBLen = 6;
5978                         c->Request.type_attr_dir =
5979                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5980                         c->Request.Timeout = 0;
5981                         break;
5982                 case HPSA_GET_RAID_MAP:
5983                         c->Request.CDBLen = 12;
5984                         c->Request.type_attr_dir =
5985                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5986                         c->Request.Timeout = 0;
5987                         c->Request.CDB[0] = HPSA_CISS_READ;
5988                         c->Request.CDB[1] = cmd;
5989                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5990                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5991                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5992                         c->Request.CDB[9] = size & 0xFF;
5993                         break;
5994                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5995                         c->Request.CDBLen = 10;
5996                         c->Request.type_attr_dir =
5997                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5998                         c->Request.Timeout = 0;
5999                         c->Request.CDB[0] = BMIC_READ;
6000                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6001                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6002                         c->Request.CDB[8] = (size >> 8) & 0xFF;
6003                         break;
6004                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6005                         c->Request.CDBLen = 10;
6006                         c->Request.type_attr_dir =
6007                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6008                         c->Request.Timeout = 0;
6009                         c->Request.CDB[0] = BMIC_READ;
6010                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6011                         c->Request.CDB[7] = (size >> 16) & 0xFF;
6012                         c->Request.CDB[8] = (size >> 8) & 0XFF;
6013                         break;
6014                 default:
6015                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6016                         BUG();
6017                         return -1;
6018                 }
6019         } else if (cmd_type == TYPE_MSG) {
6020                 switch (cmd) {
6021
6022                 case  HPSA_DEVICE_RESET_MSG:
6023                         c->Request.CDBLen = 16;
6024                         c->Request.type_attr_dir =
6025                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6026                         c->Request.Timeout = 0; /* Don't time out */
6027                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6028                         c->Request.CDB[0] =  cmd;
6029                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6030                         /* If bytes 4-7 are zero, it means reset the */
6031                         /* LunID device */
6032                         c->Request.CDB[4] = 0x00;
6033                         c->Request.CDB[5] = 0x00;
6034                         c->Request.CDB[6] = 0x00;
6035                         c->Request.CDB[7] = 0x00;
6036                         break;
6037                 case  HPSA_ABORT_MSG:
6038                         memcpy(&tag, buff, sizeof(tag));
6039                         dev_dbg(&h->pdev->dev,
6040                                 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
6041                                 tag, c->Header.tag);
6042                         c->Request.CDBLen = 16;
6043                         c->Request.type_attr_dir =
6044                                         TYPE_ATTR_DIR(cmd_type,
6045                                                 ATTR_SIMPLE, XFER_WRITE);
6046                         c->Request.Timeout = 0; /* Don't time out */
6047                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
6048                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
6049                         c->Request.CDB[2] = 0x00; /* reserved */
6050                         c->Request.CDB[3] = 0x00; /* reserved */
6051                         /* Tag to abort goes in CDB[4]-CDB[11] */
6052                         memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
6053                         c->Request.CDB[12] = 0x00; /* reserved */
6054                         c->Request.CDB[13] = 0x00; /* reserved */
6055                         c->Request.CDB[14] = 0x00; /* reserved */
6056                         c->Request.CDB[15] = 0x00; /* reserved */
6057                 break;
6058                 default:
6059                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
6060                                 cmd);
6061                         BUG();
6062                 }
6063         } else {
6064                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6065                 BUG();
6066         }
6067
6068         switch (GET_DIR(c->Request.type_attr_dir)) {
6069         case XFER_READ:
6070                 pci_dir = PCI_DMA_FROMDEVICE;
6071                 break;
6072         case XFER_WRITE:
6073                 pci_dir = PCI_DMA_TODEVICE;
6074                 break;
6075         case XFER_NONE:
6076                 pci_dir = PCI_DMA_NONE;
6077                 break;
6078         default:
6079                 pci_dir = PCI_DMA_BIDIRECTIONAL;
6080         }
6081         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6082                 return -1;
6083         return 0;
6084 }
6085
6086 /*
6087  * Map (physical) PCI mem into (virtual) kernel space
6088  */
6089 static void __iomem *remap_pci_mem(ulong base, ulong size)
6090 {
6091         ulong page_base = ((ulong) base) & PAGE_MASK;
6092         ulong page_offs = ((ulong) base) - page_base;
6093         void __iomem *page_remapped = ioremap_nocache(page_base,
6094                 page_offs + size);
6095
6096         return page_remapped ? (page_remapped + page_offs) : NULL;
6097 }
6098
6099 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6100 {
6101         return h->access.command_completed(h, q);
6102 }
6103
6104 static inline bool interrupt_pending(struct ctlr_info *h)
6105 {
6106         return h->access.intr_pending(h);
6107 }
6108
6109 static inline long interrupt_not_for_us(struct ctlr_info *h)
6110 {
6111         return (h->access.intr_pending(h) == 0) ||
6112                 (h->interrupts_enabled == 0);
6113 }
6114
6115 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6116         u32 raw_tag)
6117 {
6118         if (unlikely(tag_index >= h->nr_cmds)) {
6119                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6120                 return 1;
6121         }
6122         return 0;
6123 }
6124
6125 static inline void finish_cmd(struct CommandList *c)
6126 {
6127         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6128         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6129                         || c->cmd_type == CMD_IOACCEL2))
6130                 complete_scsi_command(c);
6131         else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6132                 complete(c->waiting);
6133 }
6134
6135
6136 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
6137 {
6138 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
6139 #define HPSA_SIMPLE_ERROR_BITS 0x03
6140         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
6141                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
6142         return tag & ~HPSA_PERF_ERROR_BITS;
6143 }
6144
6145 /* process completion of an indexed ("direct lookup") command */
6146 static inline void process_indexed_cmd(struct ctlr_info *h,
6147         u32 raw_tag)
6148 {
6149         u32 tag_index;
6150         struct CommandList *c;
6151
6152         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6153         if (!bad_tag(h, tag_index, raw_tag)) {
6154                 c = h->cmd_pool + tag_index;
6155                 finish_cmd(c);
6156         }
6157 }
6158
6159 /* Some controllers, like p400, will give us one interrupt
6160  * after a soft reset, even if we turned interrupts off.
6161  * Only need to check for this in the hpsa_xxx_discard_completions
6162  * functions.
6163  */
6164 static int ignore_bogus_interrupt(struct ctlr_info *h)
6165 {
6166         if (likely(!reset_devices))
6167                 return 0;
6168
6169         if (likely(h->interrupts_enabled))
6170                 return 0;
6171
6172         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6173                 "(known firmware bug.)  Ignoring.\n");
6174
6175         return 1;
6176 }
6177
6178 /*
6179  * Convert &h->q[x] (passed to interrupt handlers) back to h.
6180  * Relies on (h-q[x] == x) being true for x such that
6181  * 0 <= x < MAX_REPLY_QUEUES.
6182  */
6183 static struct ctlr_info *queue_to_hba(u8 *queue)
6184 {
6185         return container_of((queue - *queue), struct ctlr_info, q[0]);
6186 }
6187
6188 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6189 {
6190         struct ctlr_info *h = queue_to_hba(queue);
6191         u8 q = *(u8 *) queue;
6192         u32 raw_tag;
6193
6194         if (ignore_bogus_interrupt(h))
6195                 return IRQ_NONE;
6196
6197         if (interrupt_not_for_us(h))
6198                 return IRQ_NONE;
6199         h->last_intr_timestamp = get_jiffies_64();
6200         while (interrupt_pending(h)) {
6201                 raw_tag = get_next_completion(h, q);
6202                 while (raw_tag != FIFO_EMPTY)
6203                         raw_tag = next_command(h, q);
6204         }
6205         return IRQ_HANDLED;
6206 }
6207
6208 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6209 {
6210         struct ctlr_info *h = queue_to_hba(queue);
6211         u32 raw_tag;
6212         u8 q = *(u8 *) queue;
6213
6214         if (ignore_bogus_interrupt(h))
6215                 return IRQ_NONE;
6216
6217         h->last_intr_timestamp = get_jiffies_64();
6218         raw_tag = get_next_completion(h, q);
6219         while (raw_tag != FIFO_EMPTY)
6220                 raw_tag = next_command(h, q);
6221         return IRQ_HANDLED;
6222 }
6223
6224 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6225 {
6226         struct ctlr_info *h = queue_to_hba((u8 *) queue);
6227         u32 raw_tag;
6228         u8 q = *(u8 *) queue;
6229
6230         if (interrupt_not_for_us(h))
6231                 return IRQ_NONE;
6232         h->last_intr_timestamp = get_jiffies_64();
6233         while (interrupt_pending(h)) {
6234                 raw_tag = get_next_completion(h, q);
6235                 while (raw_tag != FIFO_EMPTY) {
6236                         process_indexed_cmd(h, raw_tag);
6237                         raw_tag = next_command(h, q);
6238                 }
6239         }
6240         return IRQ_HANDLED;
6241 }
6242
6243 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6244 {
6245         struct ctlr_info *h = queue_to_hba(queue);
6246         u32 raw_tag;
6247         u8 q = *(u8 *) queue;
6248
6249         h->last_intr_timestamp = get_jiffies_64();
6250         raw_tag = get_next_completion(h, q);
6251         while (raw_tag != FIFO_EMPTY) {
6252                 process_indexed_cmd(h, raw_tag);
6253                 raw_tag = next_command(h, q);
6254         }
6255         return IRQ_HANDLED;
6256 }
6257
6258 /* Send a message CDB to the firmware. Careful, this only works
6259  * in simple mode, not performant mode due to the tag lookup.
6260  * We only ever use this immediately after a controller reset.
6261  */
6262 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6263                         unsigned char type)
6264 {
6265         struct Command {
6266                 struct CommandListHeader CommandHeader;
6267                 struct RequestBlock Request;
6268                 struct ErrDescriptor ErrorDescriptor;
6269         };
6270         struct Command *cmd;
6271         static const size_t cmd_sz = sizeof(*cmd) +
6272                                         sizeof(cmd->ErrorDescriptor);
6273         dma_addr_t paddr64;
6274         __le32 paddr32;
6275         u32 tag;
6276         void __iomem *vaddr;
6277         int i, err;
6278
6279         vaddr = pci_ioremap_bar(pdev, 0);
6280         if (vaddr == NULL)
6281                 return -ENOMEM;
6282
6283         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6284          * CCISS commands, so they must be allocated from the lower 4GiB of
6285          * memory.
6286          */
6287         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6288         if (err) {
6289                 iounmap(vaddr);
6290                 return err;
6291         }
6292
6293         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
6294         if (cmd == NULL) {
6295                 iounmap(vaddr);
6296                 return -ENOMEM;
6297         }
6298
6299         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
6300          * although there's no guarantee, we assume that the address is at
6301          * least 4-byte aligned (most likely, it's page-aligned).
6302          */
6303         paddr32 = cpu_to_le32(paddr64);
6304
6305         cmd->CommandHeader.ReplyQueue = 0;
6306         cmd->CommandHeader.SGList = 0;
6307         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6308         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6309         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6310
6311         cmd->Request.CDBLen = 16;
6312         cmd->Request.type_attr_dir =
6313                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6314         cmd->Request.Timeout = 0; /* Don't time out */
6315         cmd->Request.CDB[0] = opcode;
6316         cmd->Request.CDB[1] = type;
6317         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6318         cmd->ErrorDescriptor.Addr =
6319                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6320         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6321
6322         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6323
6324         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6325                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6326                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6327                         break;
6328                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6329         }
6330
6331         iounmap(vaddr);
6332
6333         /* we leak the DMA buffer here ... no choice since the controller could
6334          *  still complete the command.
6335          */
6336         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6337                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6338                         opcode, type);
6339                 return -ETIMEDOUT;
6340         }
6341
6342         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6343
6344         if (tag & HPSA_ERROR_BIT) {
6345                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6346                         opcode, type);
6347                 return -EIO;
6348         }
6349
6350         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6351                 opcode, type);
6352         return 0;
6353 }
6354
6355 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6356
6357 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6358         void __iomem *vaddr, u32 use_doorbell)
6359 {
6360
6361         if (use_doorbell) {
6362                 /* For everything after the P600, the PCI power state method
6363                  * of resetting the controller doesn't work, so we have this
6364                  * other way using the doorbell register.
6365                  */
6366                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6367                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6368
6369                 /* PMC hardware guys tell us we need a 10 second delay after
6370                  * doorbell reset and before any attempt to talk to the board
6371                  * at all to ensure that this actually works and doesn't fall
6372                  * over in some weird corner cases.
6373                  */
6374                 msleep(10000);
6375         } else { /* Try to do it the PCI power state way */
6376
6377                 /* Quoting from the Open CISS Specification: "The Power
6378                  * Management Control/Status Register (CSR) controls the power
6379                  * state of the device.  The normal operating state is D0,
6380                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6381                  * the controller, place the interface device in D3 then to D0,
6382                  * this causes a secondary PCI reset which will reset the
6383                  * controller." */
6384
6385                 int rc = 0;
6386
6387                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6388
6389                 /* enter the D3hot power management state */
6390                 rc = pci_set_power_state(pdev, PCI_D3hot);
6391                 if (rc)
6392                         return rc;
6393
6394                 msleep(500);
6395
6396                 /* enter the D0 power management state */
6397                 rc = pci_set_power_state(pdev, PCI_D0);
6398                 if (rc)
6399                         return rc;
6400
6401                 /*
6402                  * The P600 requires a small delay when changing states.
6403                  * Otherwise we may think the board did not reset and we bail.
6404                  * This for kdump only and is particular to the P600.
6405                  */
6406                 msleep(500);
6407         }
6408         return 0;
6409 }
6410
6411 static void init_driver_version(char *driver_version, int len)
6412 {
6413         memset(driver_version, 0, len);
6414         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6415 }
6416
6417 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6418 {
6419         char *driver_version;
6420         int i, size = sizeof(cfgtable->driver_version);
6421
6422         driver_version = kmalloc(size, GFP_KERNEL);
6423         if (!driver_version)
6424                 return -ENOMEM;
6425
6426         init_driver_version(driver_version, size);
6427         for (i = 0; i < size; i++)
6428                 writeb(driver_version[i], &cfgtable->driver_version[i]);
6429         kfree(driver_version);
6430         return 0;
6431 }
6432
6433 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6434                                           unsigned char *driver_ver)
6435 {
6436         int i;
6437
6438         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6439                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6440 }
6441
6442 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6443 {
6444
6445         char *driver_ver, *old_driver_ver;
6446         int rc, size = sizeof(cfgtable->driver_version);
6447
6448         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6449         if (!old_driver_ver)
6450                 return -ENOMEM;
6451         driver_ver = old_driver_ver + size;
6452
6453         /* After a reset, the 32 bytes of "driver version" in the cfgtable
6454          * should have been changed, otherwise we know the reset failed.
6455          */
6456         init_driver_version(old_driver_ver, size);
6457         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6458         rc = !memcmp(driver_ver, old_driver_ver, size);
6459         kfree(old_driver_ver);
6460         return rc;
6461 }
6462 /* This does a hard reset of the controller using PCI power management
6463  * states or the using the doorbell register.
6464  */
6465 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6466 {
6467         u64 cfg_offset;
6468         u32 cfg_base_addr;
6469         u64 cfg_base_addr_index;
6470         void __iomem *vaddr;
6471         unsigned long paddr;
6472         u32 misc_fw_support;
6473         int rc;
6474         struct CfgTable __iomem *cfgtable;
6475         u32 use_doorbell;
6476         u16 command_register;
6477
6478         /* For controllers as old as the P600, this is very nearly
6479          * the same thing as
6480          *
6481          * pci_save_state(pci_dev);
6482          * pci_set_power_state(pci_dev, PCI_D3hot);
6483          * pci_set_power_state(pci_dev, PCI_D0);
6484          * pci_restore_state(pci_dev);
6485          *
6486          * For controllers newer than the P600, the pci power state
6487          * method of resetting doesn't work so we have another way
6488          * using the doorbell register.
6489          */
6490
6491         if (!ctlr_is_resettable(board_id)) {
6492                 dev_warn(&pdev->dev, "Controller not resettable\n");
6493                 return -ENODEV;
6494         }
6495
6496         /* if controller is soft- but not hard resettable... */
6497         if (!ctlr_is_hard_resettable(board_id))
6498                 return -ENOTSUPP; /* try soft reset later. */
6499
6500         /* Save the PCI command register */
6501         pci_read_config_word(pdev, 4, &command_register);
6502         pci_save_state(pdev);
6503
6504         /* find the first memory BAR, so we can find the cfg table */
6505         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6506         if (rc)
6507                 return rc;
6508         vaddr = remap_pci_mem(paddr, 0x250);
6509         if (!vaddr)
6510                 return -ENOMEM;
6511
6512         /* find cfgtable in order to check if reset via doorbell is supported */
6513         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
6514                                         &cfg_base_addr_index, &cfg_offset);
6515         if (rc)
6516                 goto unmap_vaddr;
6517         cfgtable = remap_pci_mem(pci_resource_start(pdev,
6518                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
6519         if (!cfgtable) {
6520                 rc = -ENOMEM;
6521                 goto unmap_vaddr;
6522         }
6523         rc = write_driver_ver_to_cfgtable(cfgtable);
6524         if (rc)
6525                 goto unmap_cfgtable;
6526
6527         /* If reset via doorbell register is supported, use that.
6528          * There are two such methods.  Favor the newest method.
6529          */
6530         misc_fw_support = readl(&cfgtable->misc_fw_support);
6531         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6532         if (use_doorbell) {
6533                 use_doorbell = DOORBELL_CTLR_RESET2;
6534         } else {
6535                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6536                 if (use_doorbell) {
6537                         dev_warn(&pdev->dev,
6538                                 "Soft reset not supported. Firmware update is required.\n");
6539                         rc = -ENOTSUPP; /* try soft reset */
6540                         goto unmap_cfgtable;
6541                 }
6542         }
6543
6544         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6545         if (rc)
6546                 goto unmap_cfgtable;
6547
6548         pci_restore_state(pdev);
6549         pci_write_config_word(pdev, 4, command_register);
6550
6551         /* Some devices (notably the HP Smart Array 5i Controller)
6552            need a little pause here */
6553         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6554
6555         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6556         if (rc) {
6557                 dev_warn(&pdev->dev,
6558                         "Failed waiting for board to become ready after hard reset\n");
6559                 goto unmap_cfgtable;
6560         }
6561
6562         rc = controller_reset_failed(vaddr);
6563         if (rc < 0)
6564                 goto unmap_cfgtable;
6565         if (rc) {
6566                 dev_warn(&pdev->dev, "Unable to successfully reset "
6567                         "controller. Will try soft reset.\n");
6568                 rc = -ENOTSUPP;
6569         } else {
6570                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6571         }
6572
6573 unmap_cfgtable:
6574         iounmap(cfgtable);
6575
6576 unmap_vaddr:
6577         iounmap(vaddr);
6578         return rc;
6579 }
6580
6581 /*
6582  *  We cannot read the structure directly, for portability we must use
6583  *   the io functions.
6584  *   This is for debug only.
6585  */
6586 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6587 {
6588 #ifdef HPSA_DEBUG
6589         int i;
6590         char temp_name[17];
6591
6592         dev_info(dev, "Controller Configuration information\n");
6593         dev_info(dev, "------------------------------------\n");
6594         for (i = 0; i < 4; i++)
6595                 temp_name[i] = readb(&(tb->Signature[i]));
6596         temp_name[4] = '\0';
6597         dev_info(dev, "   Signature = %s\n", temp_name);
6598         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6599         dev_info(dev, "   Transport methods supported = 0x%x\n",
6600                readl(&(tb->TransportSupport)));
6601         dev_info(dev, "   Transport methods active = 0x%x\n",
6602                readl(&(tb->TransportActive)));
6603         dev_info(dev, "   Requested transport Method = 0x%x\n",
6604                readl(&(tb->HostWrite.TransportRequest)));
6605         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6606                readl(&(tb->HostWrite.CoalIntDelay)));
6607         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6608                readl(&(tb->HostWrite.CoalIntCount)));
6609         dev_info(dev, "   Max outstanding commands = %d\n",
6610                readl(&(tb->CmdsOutMax)));
6611         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6612         for (i = 0; i < 16; i++)
6613                 temp_name[i] = readb(&(tb->ServerName[i]));
6614         temp_name[16] = '\0';
6615         dev_info(dev, "   Server Name = %s\n", temp_name);
6616         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6617                 readl(&(tb->HeartBeat)));
6618 #endif                          /* HPSA_DEBUG */
6619 }
6620
6621 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6622 {
6623         int i, offset, mem_type, bar_type;
6624
6625         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6626                 return 0;
6627         offset = 0;
6628         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6629                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6630                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6631                         offset += 4;
6632                 else {
6633                         mem_type = pci_resource_flags(pdev, i) &
6634                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6635                         switch (mem_type) {
6636                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6637                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6638                                 offset += 4;    /* 32 bit */
6639                                 break;
6640                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6641                                 offset += 8;
6642                                 break;
6643                         default:        /* reserved in PCI 2.2 */
6644                                 dev_warn(&pdev->dev,
6645                                        "base address is invalid\n");
6646                                 return -1;
6647                                 break;
6648                         }
6649                 }
6650                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6651                         return i + 1;
6652         }
6653         return -1;
6654 }
6655
6656 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
6657 {
6658         if (h->msix_vector) {
6659                 if (h->pdev->msix_enabled)
6660                         pci_disable_msix(h->pdev);
6661                 h->msix_vector = 0;
6662         } else if (h->msi_vector) {
6663                 if (h->pdev->msi_enabled)
6664                         pci_disable_msi(h->pdev);
6665                 h->msi_vector = 0;
6666         }
6667 }
6668
6669 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6670  * controllers that are capable. If not, we use legacy INTx mode.
6671  */
6672 static void hpsa_interrupt_mode(struct ctlr_info *h)
6673 {
6674 #ifdef CONFIG_PCI_MSI
6675         int err, i;
6676         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6677
6678         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6679                 hpsa_msix_entries[i].vector = 0;
6680                 hpsa_msix_entries[i].entry = i;
6681         }
6682
6683         /* Some boards advertise MSI but don't really support it */
6684         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6685             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6686                 goto default_int_mode;
6687         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6688                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
6689                 h->msix_vector = MAX_REPLY_QUEUES;
6690                 if (h->msix_vector > num_online_cpus())
6691                         h->msix_vector = num_online_cpus();
6692                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6693                                             1, h->msix_vector);
6694                 if (err < 0) {
6695                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6696                         h->msix_vector = 0;
6697                         goto single_msi_mode;
6698                 } else if (err < h->msix_vector) {
6699                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6700                                "available\n", err);
6701                 }
6702                 h->msix_vector = err;
6703                 for (i = 0; i < h->msix_vector; i++)
6704                         h->intr[i] = hpsa_msix_entries[i].vector;
6705                 return;
6706         }
6707 single_msi_mode:
6708         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6709                 dev_info(&h->pdev->dev, "MSI capable controller\n");
6710                 if (!pci_enable_msi(h->pdev))
6711                         h->msi_vector = 1;
6712                 else
6713                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6714         }
6715 default_int_mode:
6716 #endif                          /* CONFIG_PCI_MSI */
6717         /* if we get here we're going to use the default interrupt mode */
6718         h->intr[h->intr_mode] = h->pdev->irq;
6719 }
6720
6721 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6722 {
6723         int i;
6724         u32 subsystem_vendor_id, subsystem_device_id;
6725
6726         subsystem_vendor_id = pdev->subsystem_vendor;
6727         subsystem_device_id = pdev->subsystem_device;
6728         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6729                     subsystem_vendor_id;
6730
6731         for (i = 0; i < ARRAY_SIZE(products); i++)
6732                 if (*board_id == products[i].board_id)
6733                         return i;
6734
6735         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6736                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6737                 !hpsa_allow_any) {
6738                 dev_warn(&pdev->dev, "unrecognized board ID: "
6739                         "0x%08x, ignoring.\n", *board_id);
6740                         return -ENODEV;
6741         }
6742         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6743 }
6744
6745 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6746                                     unsigned long *memory_bar)
6747 {
6748         int i;
6749
6750         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6751                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6752                         /* addressing mode bits already removed */
6753                         *memory_bar = pci_resource_start(pdev, i);
6754                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6755                                 *memory_bar);
6756                         return 0;
6757                 }
6758         dev_warn(&pdev->dev, "no memory BAR found\n");
6759         return -ENODEV;
6760 }
6761
6762 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6763                                      int wait_for_ready)
6764 {
6765         int i, iterations;
6766         u32 scratchpad;
6767         if (wait_for_ready)
6768                 iterations = HPSA_BOARD_READY_ITERATIONS;
6769         else
6770                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6771
6772         for (i = 0; i < iterations; i++) {
6773                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6774                 if (wait_for_ready) {
6775                         if (scratchpad == HPSA_FIRMWARE_READY)
6776                                 return 0;
6777                 } else {
6778                         if (scratchpad != HPSA_FIRMWARE_READY)
6779                                 return 0;
6780                 }
6781                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6782         }
6783         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6784         return -ENODEV;
6785 }
6786
6787 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6788                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6789                                u64 *cfg_offset)
6790 {
6791         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6792         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6793         *cfg_base_addr &= (u32) 0x0000ffff;
6794         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6795         if (*cfg_base_addr_index == -1) {
6796                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6797                 return -ENODEV;
6798         }
6799         return 0;
6800 }
6801
6802 static void hpsa_free_cfgtables(struct ctlr_info *h)
6803 {
6804         if (h->transtable) {
6805                 iounmap(h->transtable);
6806                 h->transtable = NULL;
6807         }
6808         if (h->cfgtable) {
6809                 iounmap(h->cfgtable);
6810                 h->cfgtable = NULL;
6811         }
6812 }
6813
6814 /* Find and map CISS config table and transfer table
6815 + * several items must be unmapped (freed) later
6816 + * */
6817 static int hpsa_find_cfgtables(struct ctlr_info *h)
6818 {
6819         u64 cfg_offset;
6820         u32 cfg_base_addr;
6821         u64 cfg_base_addr_index;
6822         u32 trans_offset;
6823         int rc;
6824
6825         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6826                 &cfg_base_addr_index, &cfg_offset);
6827         if (rc)
6828                 return rc;
6829         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6830                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6831         if (!h->cfgtable) {
6832                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
6833                 return -ENOMEM;
6834         }
6835         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6836         if (rc)
6837                 return rc;
6838         /* Find performant mode table. */
6839         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6840         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6841                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6842                                 sizeof(*h->transtable));
6843         if (!h->transtable) {
6844                 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
6845                 hpsa_free_cfgtables(h);
6846                 return -ENOMEM;
6847         }
6848         return 0;
6849 }
6850
6851 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6852 {
6853 #define MIN_MAX_COMMANDS 16
6854         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
6855
6856         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
6857
6858         /* Limit commands in memory limited kdump scenario. */
6859         if (reset_devices && h->max_commands > 32)
6860                 h->max_commands = 32;
6861
6862         if (h->max_commands < MIN_MAX_COMMANDS) {
6863                 dev_warn(&h->pdev->dev,
6864                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
6865                         h->max_commands,
6866                         MIN_MAX_COMMANDS);
6867                 h->max_commands = MIN_MAX_COMMANDS;
6868         }
6869 }
6870
6871 /* If the controller reports that the total max sg entries is greater than 512,
6872  * then we know that chained SG blocks work.  (Original smart arrays did not
6873  * support chained SG blocks and would return zero for max sg entries.)
6874  */
6875 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
6876 {
6877         return h->maxsgentries > 512;
6878 }
6879
6880 /* Interrogate the hardware for some limits:
6881  * max commands, max SG elements without chaining, and with chaining,
6882  * SG chain block size, etc.
6883  */
6884 static void hpsa_find_board_params(struct ctlr_info *h)
6885 {
6886         hpsa_get_max_perf_mode_cmds(h);
6887         h->nr_cmds = h->max_commands;
6888         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6889         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6890         if (hpsa_supports_chained_sg_blocks(h)) {
6891                 /* Limit in-command s/g elements to 32 save dma'able memory. */
6892                 h->max_cmd_sg_entries = 32;
6893                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6894                 h->maxsgentries--; /* save one for chain pointer */
6895         } else {
6896                 /*
6897                  * Original smart arrays supported at most 31 s/g entries
6898                  * embedded inline in the command (trying to use more
6899                  * would lock up the controller)
6900                  */
6901                 h->max_cmd_sg_entries = 31;
6902                 h->maxsgentries = 31; /* default to traditional values */
6903                 h->chainsize = 0;
6904         }
6905
6906         /* Find out what task management functions are supported and cache */
6907         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6908         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6909                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6910         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6911                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6912         if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
6913                 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
6914 }
6915
6916 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6917 {
6918         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6919                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
6920                 return false;
6921         }
6922         return true;
6923 }
6924
6925 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6926 {
6927         u32 driver_support;
6928
6929         driver_support = readl(&(h->cfgtable->driver_support));
6930         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6931 #ifdef CONFIG_X86
6932         driver_support |= ENABLE_SCSI_PREFETCH;
6933 #endif
6934         driver_support |= ENABLE_UNIT_ATTN;
6935         writel(driver_support, &(h->cfgtable->driver_support));
6936 }
6937
6938 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6939  * in a prefetch beyond physical memory.
6940  */
6941 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6942 {
6943         u32 dma_prefetch;
6944
6945         if (h->board_id != 0x3225103C)
6946                 return;
6947         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6948         dma_prefetch |= 0x8000;
6949         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6950 }
6951
6952 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6953 {
6954         int i;
6955         u32 doorbell_value;
6956         unsigned long flags;
6957         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6958         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
6959                 spin_lock_irqsave(&h->lock, flags);
6960                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6961                 spin_unlock_irqrestore(&h->lock, flags);
6962                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6963                         goto done;
6964                 /* delay and try again */
6965                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
6966         }
6967         return -ENODEV;
6968 done:
6969         return 0;
6970 }
6971
6972 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6973 {
6974         int i;
6975         u32 doorbell_value;
6976         unsigned long flags;
6977
6978         /* under certain very rare conditions, this can take awhile.
6979          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6980          * as we enter this code.)
6981          */
6982         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
6983                 if (h->remove_in_progress)
6984                         goto done;
6985                 spin_lock_irqsave(&h->lock, flags);
6986                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6987                 spin_unlock_irqrestore(&h->lock, flags);
6988                 if (!(doorbell_value & CFGTBL_ChangeReq))
6989                         goto done;
6990                 /* delay and try again */
6991                 msleep(MODE_CHANGE_WAIT_INTERVAL);
6992         }
6993         return -ENODEV;
6994 done:
6995         return 0;
6996 }
6997
6998 /* return -ENODEV or other reason on error, 0 on success */
6999 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7000 {
7001         u32 trans_support;
7002
7003         trans_support = readl(&(h->cfgtable->TransportSupport));
7004         if (!(trans_support & SIMPLE_MODE))
7005                 return -ENOTSUPP;
7006
7007         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7008
7009         /* Update the field, and then ring the doorbell */
7010         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7011         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7012         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7013         if (hpsa_wait_for_mode_change_ack(h))
7014                 goto error;
7015         print_cfg_table(&h->pdev->dev, h->cfgtable);
7016         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7017                 goto error;
7018         h->transMethod = CFGTBL_Trans_Simple;
7019         return 0;
7020 error:
7021         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7022         return -ENODEV;
7023 }
7024
7025 /* free items allocated or mapped by hpsa_pci_init */
7026 static void hpsa_free_pci_init(struct ctlr_info *h)
7027 {
7028         hpsa_free_cfgtables(h);                 /* pci_init 4 */
7029         iounmap(h->vaddr);                      /* pci_init 3 */
7030         h->vaddr = NULL;
7031         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
7032         /*
7033          * call pci_disable_device before pci_release_regions per
7034          * Documentation/PCI/pci.txt
7035          */
7036         pci_disable_device(h->pdev);            /* pci_init 1 */
7037         pci_release_regions(h->pdev);           /* pci_init 2 */
7038 }
7039
7040 /* several items must be freed later */
7041 static int hpsa_pci_init(struct ctlr_info *h)
7042 {
7043         int prod_index, err;
7044
7045         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
7046         if (prod_index < 0)
7047                 return prod_index;
7048         h->product_name = products[prod_index].product_name;
7049         h->access = *(products[prod_index].access);
7050
7051         h->needs_abort_tags_swizzled =
7052                 ctlr_needs_abort_tags_swizzled(h->board_id);
7053
7054         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7055                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7056
7057         err = pci_enable_device(h->pdev);
7058         if (err) {
7059                 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7060                 pci_disable_device(h->pdev);
7061                 return err;
7062         }
7063
7064         err = pci_request_regions(h->pdev, HPSA);
7065         if (err) {
7066                 dev_err(&h->pdev->dev,
7067                         "failed to obtain PCI resources\n");
7068                 pci_disable_device(h->pdev);
7069                 return err;
7070         }
7071
7072         pci_set_master(h->pdev);
7073
7074         hpsa_interrupt_mode(h);
7075         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7076         if (err)
7077                 goto clean2;    /* intmode+region, pci */
7078         h->vaddr = remap_pci_mem(h->paddr, 0x250);
7079         if (!h->vaddr) {
7080                 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7081                 err = -ENOMEM;
7082                 goto clean2;    /* intmode+region, pci */
7083         }
7084         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7085         if (err)
7086                 goto clean3;    /* vaddr, intmode+region, pci */
7087         err = hpsa_find_cfgtables(h);
7088         if (err)
7089                 goto clean3;    /* vaddr, intmode+region, pci */
7090         hpsa_find_board_params(h);
7091
7092         if (!hpsa_CISS_signature_present(h)) {
7093                 err = -ENODEV;
7094                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7095         }
7096         hpsa_set_driver_support_bits(h);
7097         hpsa_p600_dma_prefetch_quirk(h);
7098         err = hpsa_enter_simple_mode(h);
7099         if (err)
7100                 goto clean4;    /* cfgtables, vaddr, intmode+region, pci */
7101         return 0;
7102
7103 clean4: /* cfgtables, vaddr, intmode+region, pci */
7104         hpsa_free_cfgtables(h);
7105 clean3: /* vaddr, intmode+region, pci */
7106         iounmap(h->vaddr);
7107         h->vaddr = NULL;
7108 clean2: /* intmode+region, pci */
7109         hpsa_disable_interrupt_mode(h);
7110         /*
7111          * call pci_disable_device before pci_release_regions per
7112          * Documentation/PCI/pci.txt
7113          */
7114         pci_disable_device(h->pdev);
7115         pci_release_regions(h->pdev);
7116         return err;
7117 }
7118
7119 static void hpsa_hba_inquiry(struct ctlr_info *h)
7120 {
7121         int rc;
7122
7123 #define HBA_INQUIRY_BYTE_COUNT 64
7124         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7125         if (!h->hba_inquiry_data)
7126                 return;
7127         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7128                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7129         if (rc != 0) {
7130                 kfree(h->hba_inquiry_data);
7131                 h->hba_inquiry_data = NULL;
7132         }
7133 }
7134
7135 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7136 {
7137         int rc, i;
7138         void __iomem *vaddr;
7139
7140         if (!reset_devices)
7141                 return 0;
7142
7143         /* kdump kernel is loading, we don't know in which state is
7144          * the pci interface. The dev->enable_cnt is equal zero
7145          * so we call enable+disable, wait a while and switch it on.
7146          */
7147         rc = pci_enable_device(pdev);
7148         if (rc) {
7149                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7150                 return -ENODEV;
7151         }
7152         pci_disable_device(pdev);
7153         msleep(260);                    /* a randomly chosen number */
7154         rc = pci_enable_device(pdev);
7155         if (rc) {
7156                 dev_warn(&pdev->dev, "failed to enable device.\n");
7157                 return -ENODEV;
7158         }
7159
7160         pci_set_master(pdev);
7161
7162         vaddr = pci_ioremap_bar(pdev, 0);
7163         if (vaddr == NULL) {
7164                 rc = -ENOMEM;
7165                 goto out_disable;
7166         }
7167         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7168         iounmap(vaddr);
7169
7170         /* Reset the controller with a PCI power-cycle or via doorbell */
7171         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7172
7173         /* -ENOTSUPP here means we cannot reset the controller
7174          * but it's already (and still) up and running in
7175          * "performant mode".  Or, it might be 640x, which can't reset
7176          * due to concerns about shared bbwc between 6402/6404 pair.
7177          */
7178         if (rc)
7179                 goto out_disable;
7180
7181         /* Now try to get the controller to respond to a no-op */
7182         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7183         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7184                 if (hpsa_noop(pdev) == 0)
7185                         break;
7186                 else
7187                         dev_warn(&pdev->dev, "no-op failed%s\n",
7188                                         (i < 11 ? "; re-trying" : ""));
7189         }
7190
7191 out_disable:
7192
7193         pci_disable_device(pdev);
7194         return rc;
7195 }
7196
7197 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7198 {
7199         kfree(h->cmd_pool_bits);
7200         h->cmd_pool_bits = NULL;
7201         if (h->cmd_pool) {
7202                 pci_free_consistent(h->pdev,
7203                                 h->nr_cmds * sizeof(struct CommandList),
7204                                 h->cmd_pool,
7205                                 h->cmd_pool_dhandle);
7206                 h->cmd_pool = NULL;
7207                 h->cmd_pool_dhandle = 0;
7208         }
7209         if (h->errinfo_pool) {
7210                 pci_free_consistent(h->pdev,
7211                                 h->nr_cmds * sizeof(struct ErrorInfo),
7212                                 h->errinfo_pool,
7213                                 h->errinfo_pool_dhandle);
7214                 h->errinfo_pool = NULL;
7215                 h->errinfo_pool_dhandle = 0;
7216         }
7217 }
7218
7219 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7220 {
7221         h->cmd_pool_bits = kzalloc(
7222                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7223                 sizeof(unsigned long), GFP_KERNEL);
7224         h->cmd_pool = pci_alloc_consistent(h->pdev,
7225                     h->nr_cmds * sizeof(*h->cmd_pool),
7226                     &(h->cmd_pool_dhandle));
7227         h->errinfo_pool = pci_alloc_consistent(h->pdev,
7228                     h->nr_cmds * sizeof(*h->errinfo_pool),
7229                     &(h->errinfo_pool_dhandle));
7230         if ((h->cmd_pool_bits == NULL)
7231             || (h->cmd_pool == NULL)
7232             || (h->errinfo_pool == NULL)) {
7233                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7234                 goto clean_up;
7235         }
7236         hpsa_preinitialize_commands(h);
7237         return 0;
7238 clean_up:
7239         hpsa_free_cmd_pool(h);
7240         return -ENOMEM;
7241 }
7242
7243 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
7244 {
7245         int i, cpu;
7246
7247         cpu = cpumask_first(cpu_online_mask);
7248         for (i = 0; i < h->msix_vector; i++) {
7249                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
7250                 cpu = cpumask_next(cpu, cpu_online_mask);
7251         }
7252 }
7253
7254 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7255 static void hpsa_free_irqs(struct ctlr_info *h)
7256 {
7257         int i;
7258
7259         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
7260                 /* Single reply queue, only one irq to free */
7261                 i = h->intr_mode;
7262                 irq_set_affinity_hint(h->intr[i], NULL);
7263                 free_irq(h->intr[i], &h->q[i]);
7264                 h->q[i] = 0;
7265                 return;
7266         }
7267
7268         for (i = 0; i < h->msix_vector; i++) {
7269                 irq_set_affinity_hint(h->intr[i], NULL);
7270                 free_irq(h->intr[i], &h->q[i]);
7271                 h->q[i] = 0;
7272         }
7273         for (; i < MAX_REPLY_QUEUES; i++)
7274                 h->q[i] = 0;
7275 }
7276
7277 /* returns 0 on success; cleans up and returns -Enn on error */
7278 static int hpsa_request_irqs(struct ctlr_info *h,
7279         irqreturn_t (*msixhandler)(int, void *),
7280         irqreturn_t (*intxhandler)(int, void *))
7281 {
7282         int rc, i;
7283
7284         /*
7285          * initialize h->q[x] = x so that interrupt handlers know which
7286          * queue to process.
7287          */
7288         for (i = 0; i < MAX_REPLY_QUEUES; i++)
7289                 h->q[i] = (u8) i;
7290
7291         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
7292                 /* If performant mode and MSI-X, use multiple reply queues */
7293                 for (i = 0; i < h->msix_vector; i++) {
7294                         sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7295                         rc = request_irq(h->intr[i], msixhandler,
7296                                         0, h->intrname[i],
7297                                         &h->q[i]);
7298                         if (rc) {
7299                                 int j;
7300
7301                                 dev_err(&h->pdev->dev,
7302                                         "failed to get irq %d for %s\n",
7303                                        h->intr[i], h->devname);
7304                                 for (j = 0; j < i; j++) {
7305                                         free_irq(h->intr[j], &h->q[j]);
7306                                         h->q[j] = 0;
7307                                 }
7308                                 for (; j < MAX_REPLY_QUEUES; j++)
7309                                         h->q[j] = 0;
7310                                 return rc;
7311                         }
7312                 }
7313                 hpsa_irq_affinity_hints(h);
7314         } else {
7315                 /* Use single reply pool */
7316                 if (h->msix_vector > 0 || h->msi_vector) {
7317                         if (h->msix_vector)
7318                                 sprintf(h->intrname[h->intr_mode],
7319                                         "%s-msix", h->devname);
7320                         else
7321                                 sprintf(h->intrname[h->intr_mode],
7322                                         "%s-msi", h->devname);
7323                         rc = request_irq(h->intr[h->intr_mode],
7324                                 msixhandler, 0,
7325                                 h->intrname[h->intr_mode],
7326                                 &h->q[h->intr_mode]);
7327                 } else {
7328                         sprintf(h->intrname[h->intr_mode],
7329                                 "%s-intx", h->devname);
7330                         rc = request_irq(h->intr[h->intr_mode],
7331                                 intxhandler, IRQF_SHARED,
7332                                 h->intrname[h->intr_mode],
7333                                 &h->q[h->intr_mode]);
7334                 }
7335                 irq_set_affinity_hint(h->intr[h->intr_mode], NULL);
7336         }
7337         if (rc) {
7338                 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
7339                        h->intr[h->intr_mode], h->devname);
7340                 hpsa_free_irqs(h);
7341                 return -ENODEV;
7342         }
7343         return 0;
7344 }
7345
7346 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
7347 {
7348         hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
7349
7350         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
7351         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
7352                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
7353                 return -1;
7354         }
7355
7356         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
7357         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
7358                 dev_warn(&h->pdev->dev, "Board failed to become ready "
7359                         "after soft reset.\n");
7360                 return -1;
7361         }
7362
7363         return 0;
7364 }
7365
7366 static void hpsa_free_reply_queues(struct ctlr_info *h)
7367 {
7368         int i;
7369
7370         for (i = 0; i < h->nreply_queues; i++) {
7371                 if (!h->reply_queue[i].head)
7372                         continue;
7373                 pci_free_consistent(h->pdev,
7374                                         h->reply_queue_size,
7375                                         h->reply_queue[i].head,
7376                                         h->reply_queue[i].busaddr);
7377                 h->reply_queue[i].head = NULL;
7378                 h->reply_queue[i].busaddr = 0;
7379         }
7380         h->reply_queue_size = 0;
7381 }
7382
7383 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7384 {
7385         hpsa_free_performant_mode(h);           /* init_one 7 */
7386         hpsa_free_sg_chain_blocks(h);           /* init_one 6 */
7387         hpsa_free_cmd_pool(h);                  /* init_one 5 */
7388         hpsa_free_irqs(h);                      /* init_one 4 */
7389         hpsa_free_pci_init(h);                  /* init_one 3 */
7390         free_percpu(h->lockup_detected);        /* init_one 2 */
7391         h->lockup_detected = NULL;              /* init_one 2 */
7392         if (h->resubmit_wq) {
7393                 destroy_workqueue(h->resubmit_wq);      /* init_one 1 */
7394                 h->resubmit_wq = NULL;
7395         }
7396         if (h->rescan_ctlr_wq) {
7397                 destroy_workqueue(h->rescan_ctlr_wq);
7398                 h->rescan_ctlr_wq = NULL;
7399         }
7400         kfree(h);                               /* init_one 1 */
7401 }
7402
7403 /* Called when controller lockup detected. */
7404 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7405 {
7406         int i, refcount;
7407         struct CommandList *c;
7408         int failcount = 0;
7409
7410         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7411         for (i = 0; i < h->nr_cmds; i++) {
7412                 c = h->cmd_pool + i;
7413                 refcount = atomic_inc_return(&c->refcount);
7414                 if (refcount > 1) {
7415                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7416                         finish_cmd(c);
7417                         atomic_dec(&h->commands_outstanding);
7418                         failcount++;
7419                 }
7420                 cmd_free(h, c);
7421         }
7422         dev_warn(&h->pdev->dev,
7423                 "failed %d commands in fail_all\n", failcount);
7424 }
7425
7426 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7427 {
7428         int cpu;
7429
7430         for_each_online_cpu(cpu) {
7431                 u32 *lockup_detected;
7432                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7433                 *lockup_detected = value;
7434         }
7435         wmb(); /* be sure the per-cpu variables are out to memory */
7436 }
7437
7438 static void controller_lockup_detected(struct ctlr_info *h)
7439 {
7440         unsigned long flags;
7441         u32 lockup_detected;
7442
7443         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7444         spin_lock_irqsave(&h->lock, flags);
7445         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7446         if (!lockup_detected) {
7447                 /* no heartbeat, but controller gave us a zero. */
7448                 dev_warn(&h->pdev->dev,
7449                         "lockup detected after %d but scratchpad register is zero\n",
7450                         h->heartbeat_sample_interval / HZ);
7451                 lockup_detected = 0xffffffff;
7452         }
7453         set_lockup_detected_for_all_cpus(h, lockup_detected);
7454         spin_unlock_irqrestore(&h->lock, flags);
7455         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7456                         lockup_detected, h->heartbeat_sample_interval / HZ);
7457         pci_disable_device(h->pdev);
7458         fail_all_outstanding_cmds(h);
7459 }
7460
7461 static int detect_controller_lockup(struct ctlr_info *h)
7462 {
7463         u64 now;
7464         u32 heartbeat;
7465         unsigned long flags;
7466
7467         now = get_jiffies_64();
7468         /* If we've received an interrupt recently, we're ok. */
7469         if (time_after64(h->last_intr_timestamp +
7470                                 (h->heartbeat_sample_interval), now))
7471                 return false;
7472
7473         /*
7474          * If we've already checked the heartbeat recently, we're ok.
7475          * This could happen if someone sends us a signal. We
7476          * otherwise don't care about signals in this thread.
7477          */
7478         if (time_after64(h->last_heartbeat_timestamp +
7479                                 (h->heartbeat_sample_interval), now))
7480                 return false;
7481
7482         /* If heartbeat has not changed since we last looked, we're not ok. */
7483         spin_lock_irqsave(&h->lock, flags);
7484         heartbeat = readl(&h->cfgtable->HeartBeat);
7485         spin_unlock_irqrestore(&h->lock, flags);
7486         if (h->last_heartbeat == heartbeat) {
7487                 controller_lockup_detected(h);
7488                 return true;
7489         }
7490
7491         /* We're ok. */
7492         h->last_heartbeat = heartbeat;
7493         h->last_heartbeat_timestamp = now;
7494         return false;
7495 }
7496
7497 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7498 {
7499         int i;
7500         char *event_type;
7501
7502         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7503                 return;
7504
7505         /* Ask the controller to clear the events we're handling. */
7506         if ((h->transMethod & (CFGTBL_Trans_io_accel1
7507                         | CFGTBL_Trans_io_accel2)) &&
7508                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
7509                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
7510
7511                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
7512                         event_type = "state change";
7513                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
7514                         event_type = "configuration change";
7515                 /* Stop sending new RAID offload reqs via the IO accelerator */
7516                 scsi_block_requests(h->scsi_host);
7517                 for (i = 0; i < h->ndevices; i++)
7518                         h->dev[i]->offload_enabled = 0;
7519                 hpsa_drain_accel_commands(h);
7520                 /* Set 'accelerator path config change' bit */
7521                 dev_warn(&h->pdev->dev,
7522                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
7523                         h->events, event_type);
7524                 writel(h->events, &(h->cfgtable->clear_event_notify));
7525                 /* Set the "clear event notify field update" bit 6 */
7526                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7527                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
7528                 hpsa_wait_for_clear_event_notify_ack(h);
7529                 scsi_unblock_requests(h->scsi_host);
7530         } else {
7531                 /* Acknowledge controller notification events. */
7532                 writel(h->events, &(h->cfgtable->clear_event_notify));
7533                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7534                 hpsa_wait_for_clear_event_notify_ack(h);
7535 #if 0
7536                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7537                 hpsa_wait_for_mode_change_ack(h);
7538 #endif
7539         }
7540         return;
7541 }
7542
7543 /* Check a register on the controller to see if there are configuration
7544  * changes (added/changed/removed logical drives, etc.) which mean that
7545  * we should rescan the controller for devices.
7546  * Also check flag for driver-initiated rescan.
7547  */
7548 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7549 {
7550         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7551                 return 0;
7552
7553         h->events = readl(&(h->cfgtable->event_notify));
7554         return h->events & RESCAN_REQUIRED_EVENT_BITS;
7555 }
7556
7557 /*
7558  * Check if any of the offline devices have become ready
7559  */
7560 static int hpsa_offline_devices_ready(struct ctlr_info *h)
7561 {
7562         unsigned long flags;
7563         struct offline_device_entry *d;
7564         struct list_head *this, *tmp;
7565
7566         spin_lock_irqsave(&h->offline_device_lock, flags);
7567         list_for_each_safe(this, tmp, &h->offline_device_list) {
7568                 d = list_entry(this, struct offline_device_entry,
7569                                 offline_list);
7570                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
7571                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
7572                         spin_lock_irqsave(&h->offline_device_lock, flags);
7573                         list_del(&d->offline_list);
7574                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7575                         return 1;
7576                 }
7577                 spin_lock_irqsave(&h->offline_device_lock, flags);
7578         }
7579         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7580         return 0;
7581 }
7582
7583 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7584 {
7585         unsigned long flags;
7586         struct ctlr_info *h = container_of(to_delayed_work(work),
7587                                         struct ctlr_info, rescan_ctlr_work);
7588
7589
7590         if (h->remove_in_progress)
7591                 return;
7592
7593         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
7594                 scsi_host_get(h->scsi_host);
7595                 hpsa_ack_ctlr_events(h);
7596                 hpsa_scan_start(h->scsi_host);
7597                 scsi_host_put(h->scsi_host);
7598         }
7599         spin_lock_irqsave(&h->lock, flags);
7600         if (!h->remove_in_progress)
7601                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7602                                 h->heartbeat_sample_interval);
7603         spin_unlock_irqrestore(&h->lock, flags);
7604 }
7605
7606 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
7607 {
7608         unsigned long flags;
7609         struct ctlr_info *h = container_of(to_delayed_work(work),
7610                                         struct ctlr_info, monitor_ctlr_work);
7611
7612         detect_controller_lockup(h);
7613         if (lockup_detected(h))
7614                 return;
7615
7616         spin_lock_irqsave(&h->lock, flags);
7617         if (!h->remove_in_progress)
7618                 schedule_delayed_work(&h->monitor_ctlr_work,
7619                                 h->heartbeat_sample_interval);
7620         spin_unlock_irqrestore(&h->lock, flags);
7621 }
7622
7623 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
7624                                                 char *name)
7625 {
7626         struct workqueue_struct *wq = NULL;
7627
7628         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7629         if (!wq)
7630                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
7631
7632         return wq;
7633 }
7634
7635 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7636 {
7637         int dac, rc;
7638         struct ctlr_info *h;
7639         int try_soft_reset = 0;
7640         unsigned long flags;
7641         u32 board_id;
7642
7643         if (number_of_controllers == 0)
7644                 printk(KERN_INFO DRIVER_NAME "\n");
7645
7646         rc = hpsa_lookup_board_id(pdev, &board_id);
7647         if (rc < 0) {
7648                 dev_warn(&pdev->dev, "Board ID not found\n");
7649                 return rc;
7650         }
7651
7652         rc = hpsa_init_reset_devices(pdev, board_id);
7653         if (rc) {
7654                 if (rc != -ENOTSUPP)
7655                         return rc;
7656                 /* If the reset fails in a particular way (it has no way to do
7657                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
7658                  * a soft reset once we get the controller configured up to the
7659                  * point that it can accept a command.
7660                  */
7661                 try_soft_reset = 1;
7662                 rc = 0;
7663         }
7664
7665 reinit_after_soft_reset:
7666
7667         /* Command structures must be aligned on a 32-byte boundary because
7668          * the 5 lower bits of the address are used by the hardware. and by
7669          * the driver.  See comments in hpsa.h for more info.
7670          */
7671         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
7672         h = kzalloc(sizeof(*h), GFP_KERNEL);
7673         if (!h) {
7674                 dev_err(&pdev->dev, "Failed to allocate controller head\n");
7675                 return -ENOMEM;
7676         }
7677
7678         h->pdev = pdev;
7679
7680         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7681         INIT_LIST_HEAD(&h->offline_device_list);
7682         spin_lock_init(&h->lock);
7683         spin_lock_init(&h->offline_device_lock);
7684         spin_lock_init(&h->scan_lock);
7685         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
7686         atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
7687
7688         /* Allocate and clear per-cpu variable lockup_detected */
7689         h->lockup_detected = alloc_percpu(u32);
7690         if (!h->lockup_detected) {
7691                 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
7692                 rc = -ENOMEM;
7693                 goto clean1;    /* aer/h */
7694         }
7695         set_lockup_detected_for_all_cpus(h, 0);
7696
7697         rc = hpsa_pci_init(h);
7698         if (rc)
7699                 goto clean2;    /* lockup, aer/h */
7700
7701         sprintf(h->devname, HPSA "%d", number_of_controllers);
7702         h->ctlr = number_of_controllers;
7703         number_of_controllers++;
7704
7705         /* configure PCI DMA stuff */
7706         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
7707         if (rc == 0) {
7708                 dac = 1;
7709         } else {
7710                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
7711                 if (rc == 0) {
7712                         dac = 0;
7713                 } else {
7714                         dev_err(&pdev->dev, "no suitable DMA available\n");
7715                         goto clean3;    /* pci, lockup, aer/h */
7716                 }
7717         }
7718
7719         /* make sure the board interrupts are off */
7720         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7721
7722         rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
7723         if (rc)
7724                 goto clean3;    /* pci, lockup, aer/h */
7725         rc = hpsa_alloc_cmd_pool(h);
7726         if (rc)
7727                 goto clean4;    /* irq, pci, lockup, aer/h */
7728         rc = hpsa_alloc_sg_chain_blocks(h);
7729         if (rc)
7730                 goto clean5;    /* cmd, irq, pci, lockup, aer/h */
7731         init_waitqueue_head(&h->scan_wait_queue);
7732         init_waitqueue_head(&h->abort_cmd_wait_queue);
7733         init_waitqueue_head(&h->abort_sync_wait_queue);
7734         h->scan_finished = 1; /* no scan currently in progress */
7735
7736         pci_set_drvdata(pdev, h);
7737         h->ndevices = 0;
7738         h->hba_mode_enabled = 0;
7739         h->scsi_host = NULL;
7740         spin_lock_init(&h->devlock);
7741         rc = hpsa_put_ctlr_into_performant_mode(h);
7742         if (rc)
7743                 goto clean6;    /* sg, cmd, irq, pci, lockup, aer/h */
7744
7745         /* create the resubmit workqueue */
7746         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
7747         if (!h->rescan_ctlr_wq) {
7748                 rc = -ENOMEM;
7749                 goto clean7;
7750         }
7751
7752         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
7753         if (!h->resubmit_wq) {
7754                 rc = -ENOMEM;
7755                 goto clean7;    /* aer/h */
7756         }
7757
7758         /*
7759          * At this point, the controller is ready to take commands.
7760          * Now, if reset_devices and the hard reset didn't work, try
7761          * the soft reset and see if that works.
7762          */
7763         if (try_soft_reset) {
7764
7765                 /* This is kind of gross.  We may or may not get a completion
7766                  * from the soft reset command, and if we do, then the value
7767                  * from the fifo may or may not be valid.  So, we wait 10 secs
7768                  * after the reset throwing away any completions we get during
7769                  * that time.  Unregister the interrupt handler and register
7770                  * fake ones to scoop up any residual completions.
7771                  */
7772                 spin_lock_irqsave(&h->lock, flags);
7773                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7774                 spin_unlock_irqrestore(&h->lock, flags);
7775                 hpsa_free_irqs(h);
7776                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
7777                                         hpsa_intx_discard_completions);
7778                 if (rc) {
7779                         dev_warn(&h->pdev->dev,
7780                                 "Failed to request_irq after soft reset.\n");
7781                         /*
7782                          * cannot goto clean7 or free_irqs will be called
7783                          * again. Instead, do its work
7784                          */
7785                         hpsa_free_performant_mode(h);   /* clean7 */
7786                         hpsa_free_sg_chain_blocks(h);   /* clean6 */
7787                         hpsa_free_cmd_pool(h);          /* clean5 */
7788                         /*
7789                          * skip hpsa_free_irqs(h) clean4 since that
7790                          * was just called before request_irqs failed
7791                          */
7792                         goto clean3;
7793                 }
7794
7795                 rc = hpsa_kdump_soft_reset(h);
7796                 if (rc)
7797                         /* Neither hard nor soft reset worked, we're hosed. */
7798                         goto clean8;
7799
7800                 dev_info(&h->pdev->dev, "Board READY.\n");
7801                 dev_info(&h->pdev->dev,
7802                         "Waiting for stale completions to drain.\n");
7803                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7804                 msleep(10000);
7805                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7806
7807                 rc = controller_reset_failed(h->cfgtable);
7808                 if (rc)
7809                         dev_info(&h->pdev->dev,
7810                                 "Soft reset appears to have failed.\n");
7811
7812                 /* since the controller's reset, we have to go back and re-init
7813                  * everything.  Easiest to just forget what we've done and do it
7814                  * all over again.
7815                  */
7816                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7817                 try_soft_reset = 0;
7818                 if (rc)
7819                         /* don't goto clean, we already unallocated */
7820                         return -ENODEV;
7821
7822                 goto reinit_after_soft_reset;
7823         }
7824
7825         /* Enable Accelerated IO path at driver layer */
7826         h->acciopath_status = 1;
7827
7828
7829         /* Turn the interrupts on so we can service requests */
7830         h->access.set_intr_mask(h, HPSA_INTR_ON);
7831
7832         hpsa_hba_inquiry(h);
7833         rc = hpsa_register_scsi(h);     /* hook ourselves into SCSI subsystem */
7834         if (rc)
7835                 goto clean8; /* wq, perf, sg, cmd, irq, pci, lockup, aer/h */
7836
7837         /* Monitor the controller for firmware lockups */
7838         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7839         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7840         schedule_delayed_work(&h->monitor_ctlr_work,
7841                                 h->heartbeat_sample_interval);
7842         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
7843         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7844                                 h->heartbeat_sample_interval);
7845         return 0;
7846
7847 clean8: /* perf, sg, cmd, irq, pci, lockup, aer/h */
7848         kfree(h->hba_inquiry_data);
7849 clean7: /* perf, sg, cmd, irq, pci, lockup, aer/h */
7850         hpsa_free_performant_mode(h);
7851         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7852 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
7853         hpsa_free_sg_chain_blocks(h);
7854 clean5: /* cmd, irq, pci, lockup, aer/h */
7855         hpsa_free_cmd_pool(h);
7856 clean4: /* irq, pci, lockup, aer/h */
7857         hpsa_free_irqs(h);
7858 clean3: /* pci, lockup, aer/h */
7859         hpsa_free_pci_init(h);
7860 clean2: /* lockup, aer/h */
7861         if (h->lockup_detected) {
7862                 free_percpu(h->lockup_detected);
7863                 h->lockup_detected = NULL;
7864         }
7865 clean1: /* wq/aer/h */
7866         if (h->resubmit_wq) {
7867                 destroy_workqueue(h->resubmit_wq);
7868                 h->resubmit_wq = NULL;
7869         }
7870         if (h->rescan_ctlr_wq) {
7871                 destroy_workqueue(h->rescan_ctlr_wq);
7872                 h->rescan_ctlr_wq = NULL;
7873         }
7874         kfree(h);
7875         return rc;
7876 }
7877
7878 static void hpsa_flush_cache(struct ctlr_info *h)
7879 {
7880         char *flush_buf;
7881         struct CommandList *c;
7882         int rc;
7883
7884         if (unlikely(lockup_detected(h)))
7885                 return;
7886         flush_buf = kzalloc(4, GFP_KERNEL);
7887         if (!flush_buf)
7888                 return;
7889
7890         c = cmd_alloc(h);
7891
7892         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7893                 RAID_CTLR_LUNID, TYPE_CMD)) {
7894                 goto out;
7895         }
7896         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
7897                                         PCI_DMA_TODEVICE, NO_TIMEOUT);
7898         if (rc)
7899                 goto out;
7900         if (c->err_info->CommandStatus != 0)
7901 out:
7902                 dev_warn(&h->pdev->dev,
7903                         "error flushing cache on controller\n");
7904         cmd_free(h, c);
7905         kfree(flush_buf);
7906 }
7907
7908 static void hpsa_shutdown(struct pci_dev *pdev)
7909 {
7910         struct ctlr_info *h;
7911
7912         h = pci_get_drvdata(pdev);
7913         /* Turn board interrupts off  and send the flush cache command
7914          * sendcmd will turn off interrupt, and send the flush...
7915          * To write all data in the battery backed cache to disks
7916          */
7917         hpsa_flush_cache(h);
7918         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7919         hpsa_free_irqs(h);                      /* init_one 4 */
7920         hpsa_disable_interrupt_mode(h);         /* pci_init 2 */
7921 }
7922
7923 static void hpsa_free_device_info(struct ctlr_info *h)
7924 {
7925         int i;
7926
7927         for (i = 0; i < h->ndevices; i++) {
7928                 kfree(h->dev[i]);
7929                 h->dev[i] = NULL;
7930         }
7931 }
7932
7933 static void hpsa_remove_one(struct pci_dev *pdev)
7934 {
7935         struct ctlr_info *h;
7936         unsigned long flags;
7937
7938         if (pci_get_drvdata(pdev) == NULL) {
7939                 dev_err(&pdev->dev, "unable to remove device\n");
7940                 return;
7941         }
7942         h = pci_get_drvdata(pdev);
7943
7944         /* Get rid of any controller monitoring work items */
7945         spin_lock_irqsave(&h->lock, flags);
7946         h->remove_in_progress = 1;
7947         spin_unlock_irqrestore(&h->lock, flags);
7948         cancel_delayed_work_sync(&h->monitor_ctlr_work);
7949         cancel_delayed_work_sync(&h->rescan_ctlr_work);
7950         destroy_workqueue(h->rescan_ctlr_wq);
7951         destroy_workqueue(h->resubmit_wq);
7952
7953         /* includes hpsa_free_irqs - init_one 4 */
7954         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
7955         hpsa_shutdown(pdev);
7956
7957         hpsa_free_device_info(h);               /* scan */
7958
7959         hpsa_unregister_scsi(h);                        /* init_one 9 */
7960         kfree(h->hba_inquiry_data);                     /* init_one 9 */
7961         h->hba_inquiry_data = NULL;                     /* init_one 9 */
7962         hpsa_free_performant_mode(h);                   /* init_one 7 */
7963         hpsa_free_sg_chain_blocks(h);                   /* init_one 6 */
7964         hpsa_free_cmd_pool(h);                          /* init_one 5 */
7965
7966         /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
7967
7968         /* includes hpsa_disable_interrupt_mode - pci_init 2 */
7969         hpsa_free_pci_init(h);                          /* init_one 3 */
7970
7971         free_percpu(h->lockup_detected);                /* init_one 2 */
7972         h->lockup_detected = NULL;                      /* init_one 2 */
7973         /* (void) pci_disable_pcie_error_reporting(pdev); */    /* init_one 1 */
7974         kfree(h);                                       /* init_one 1 */
7975 }
7976
7977 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7978         __attribute__((unused)) pm_message_t state)
7979 {
7980         return -ENOSYS;
7981 }
7982
7983 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7984 {
7985         return -ENOSYS;
7986 }
7987
7988 static struct pci_driver hpsa_pci_driver = {
7989         .name = HPSA,
7990         .probe = hpsa_init_one,
7991         .remove = hpsa_remove_one,
7992         .id_table = hpsa_pci_device_id, /* id_table */
7993         .shutdown = hpsa_shutdown,
7994         .suspend = hpsa_suspend,
7995         .resume = hpsa_resume,
7996 };
7997
7998 /* Fill in bucket_map[], given nsgs (the max number of
7999  * scatter gather elements supported) and bucket[],
8000  * which is an array of 8 integers.  The bucket[] array
8001  * contains 8 different DMA transfer sizes (in 16
8002  * byte increments) which the controller uses to fetch
8003  * commands.  This function fills in bucket_map[], which
8004  * maps a given number of scatter gather elements to one of
8005  * the 8 DMA transfer sizes.  The point of it is to allow the
8006  * controller to only do as much DMA as needed to fetch the
8007  * command, with the DMA transfer size encoded in the lower
8008  * bits of the command address.
8009  */
8010 static void  calc_bucket_map(int bucket[], int num_buckets,
8011         int nsgs, int min_blocks, u32 *bucket_map)
8012 {
8013         int i, j, b, size;
8014
8015         /* Note, bucket_map must have nsgs+1 entries. */
8016         for (i = 0; i <= nsgs; i++) {
8017                 /* Compute size of a command with i SG entries */
8018                 size = i + min_blocks;
8019                 b = num_buckets; /* Assume the biggest bucket */
8020                 /* Find the bucket that is just big enough */
8021                 for (j = 0; j < num_buckets; j++) {
8022                         if (bucket[j] >= size) {
8023                                 b = j;
8024                                 break;
8025                         }
8026                 }
8027                 /* for a command with i SG entries, use bucket b. */
8028                 bucket_map[i] = b;
8029         }
8030 }
8031
8032 /*
8033  * return -ENODEV on err, 0 on success (or no action)
8034  * allocates numerous items that must be freed later
8035  */
8036 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
8037 {
8038         int i;
8039         unsigned long register_value;
8040         unsigned long transMethod = CFGTBL_Trans_Performant |
8041                         (trans_support & CFGTBL_Trans_use_short_tags) |
8042                                 CFGTBL_Trans_enable_directed_msix |
8043                         (trans_support & (CFGTBL_Trans_io_accel1 |
8044                                 CFGTBL_Trans_io_accel2));
8045         struct access_method access = SA5_performant_access;
8046
8047         /* This is a bit complicated.  There are 8 registers on
8048          * the controller which we write to to tell it 8 different
8049          * sizes of commands which there may be.  It's a way of
8050          * reducing the DMA done to fetch each command.  Encoded into
8051          * each command's tag are 3 bits which communicate to the controller
8052          * which of the eight sizes that command fits within.  The size of
8053          * each command depends on how many scatter gather entries there are.
8054          * Each SG entry requires 16 bytes.  The eight registers are programmed
8055          * with the number of 16-byte blocks a command of that size requires.
8056          * The smallest command possible requires 5 such 16 byte blocks.
8057          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
8058          * blocks.  Note, this only extends to the SG entries contained
8059          * within the command block, and does not extend to chained blocks
8060          * of SG elements.   bft[] contains the eight values we write to
8061          * the registers.  They are not evenly distributed, but have more
8062          * sizes for small commands, and fewer sizes for larger commands.
8063          */
8064         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
8065 #define MIN_IOACCEL2_BFT_ENTRY 5
8066 #define HPSA_IOACCEL2_HEADER_SZ 4
8067         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
8068                         13, 14, 15, 16, 17, 18, 19,
8069                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
8070         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
8071         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
8072         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
8073                                  16 * MIN_IOACCEL2_BFT_ENTRY);
8074         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
8075         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
8076         /*  5 = 1 s/g entry or 4k
8077          *  6 = 2 s/g entry or 8k
8078          *  8 = 4 s/g entry or 16k
8079          * 10 = 6 s/g entry or 24k
8080          */
8081
8082         /* If the controller supports either ioaccel method then
8083          * we can also use the RAID stack submit path that does not
8084          * perform the superfluous readl() after each command submission.
8085          */
8086         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
8087                 access = SA5_performant_access_no_read;
8088
8089         /* Controller spec: zero out this buffer. */
8090         for (i = 0; i < h->nreply_queues; i++)
8091                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
8092
8093         bft[7] = SG_ENTRIES_IN_CMD + 4;
8094         calc_bucket_map(bft, ARRAY_SIZE(bft),
8095                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
8096         for (i = 0; i < 8; i++)
8097                 writel(bft[i], &h->transtable->BlockFetch[i]);
8098
8099         /* size of controller ring buffer */
8100         writel(h->max_commands, &h->transtable->RepQSize);
8101         writel(h->nreply_queues, &h->transtable->RepQCount);
8102         writel(0, &h->transtable->RepQCtrAddrLow32);
8103         writel(0, &h->transtable->RepQCtrAddrHigh32);
8104
8105         for (i = 0; i < h->nreply_queues; i++) {
8106                 writel(0, &h->transtable->RepQAddr[i].upper);
8107                 writel(h->reply_queue[i].busaddr,
8108                         &h->transtable->RepQAddr[i].lower);
8109         }
8110
8111         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
8112         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
8113         /*
8114          * enable outbound interrupt coalescing in accelerator mode;
8115          */
8116         if (trans_support & CFGTBL_Trans_io_accel1) {
8117                 access = SA5_ioaccel_mode1_access;
8118                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8119                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8120         } else {
8121                 if (trans_support & CFGTBL_Trans_io_accel2) {
8122                         access = SA5_ioaccel_mode2_access;
8123                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
8124                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
8125                 }
8126         }
8127         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8128         if (hpsa_wait_for_mode_change_ack(h)) {
8129                 dev_err(&h->pdev->dev,
8130                         "performant mode problem - doorbell timeout\n");
8131                 return -ENODEV;
8132         }
8133         register_value = readl(&(h->cfgtable->TransportActive));
8134         if (!(register_value & CFGTBL_Trans_Performant)) {
8135                 dev_err(&h->pdev->dev,
8136                         "performant mode problem - transport not active\n");
8137                 return -ENODEV;
8138         }
8139         /* Change the access methods to the performant access methods */
8140         h->access = access;
8141         h->transMethod = transMethod;
8142
8143         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
8144                 (trans_support & CFGTBL_Trans_io_accel2)))
8145                 return 0;
8146
8147         if (trans_support & CFGTBL_Trans_io_accel1) {
8148                 /* Set up I/O accelerator mode */
8149                 for (i = 0; i < h->nreply_queues; i++) {
8150                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
8151                         h->reply_queue[i].current_entry =
8152                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
8153                 }
8154                 bft[7] = h->ioaccel_maxsg + 8;
8155                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
8156                                 h->ioaccel1_blockFetchTable);
8157
8158                 /* initialize all reply queue entries to unused */
8159                 for (i = 0; i < h->nreply_queues; i++)
8160                         memset(h->reply_queue[i].head,
8161                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
8162                                 h->reply_queue_size);
8163
8164                 /* set all the constant fields in the accelerator command
8165                  * frames once at init time to save CPU cycles later.
8166                  */
8167                 for (i = 0; i < h->nr_cmds; i++) {
8168                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
8169
8170                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
8171                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
8172                                         (i * sizeof(struct ErrorInfo)));
8173                         cp->err_info_len = sizeof(struct ErrorInfo);
8174                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
8175                         cp->host_context_flags =
8176                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
8177                         cp->timeout_sec = 0;
8178                         cp->ReplyQueue = 0;
8179                         cp->tag =
8180                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
8181                         cp->host_addr =
8182                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
8183                                         (i * sizeof(struct io_accel1_cmd)));
8184                 }
8185         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8186                 u64 cfg_offset, cfg_base_addr_index;
8187                 u32 bft2_offset, cfg_base_addr;
8188                 int rc;
8189
8190                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
8191                         &cfg_base_addr_index, &cfg_offset);
8192                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
8193                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
8194                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
8195                                 4, h->ioaccel2_blockFetchTable);
8196                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
8197                 BUILD_BUG_ON(offsetof(struct CfgTable,
8198                                 io_accel_request_size_offset) != 0xb8);
8199                 h->ioaccel2_bft2_regs =
8200                         remap_pci_mem(pci_resource_start(h->pdev,
8201                                         cfg_base_addr_index) +
8202                                         cfg_offset + bft2_offset,
8203                                         ARRAY_SIZE(bft2) *
8204                                         sizeof(*h->ioaccel2_bft2_regs));
8205                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
8206                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
8207         }
8208         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
8209         if (hpsa_wait_for_mode_change_ack(h)) {
8210                 dev_err(&h->pdev->dev,
8211                         "performant mode problem - enabling ioaccel mode\n");
8212                 return -ENODEV;
8213         }
8214         return 0;
8215 }
8216
8217 /* Free ioaccel1 mode command blocks and block fetch table */
8218 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8219 {
8220         if (h->ioaccel_cmd_pool) {
8221                 pci_free_consistent(h->pdev,
8222                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8223                         h->ioaccel_cmd_pool,
8224                         h->ioaccel_cmd_pool_dhandle);
8225                 h->ioaccel_cmd_pool = NULL;
8226                 h->ioaccel_cmd_pool_dhandle = 0;
8227         }
8228         kfree(h->ioaccel1_blockFetchTable);
8229         h->ioaccel1_blockFetchTable = NULL;
8230 }
8231
8232 /* Allocate ioaccel1 mode command blocks and block fetch table */
8233 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
8234 {
8235         h->ioaccel_maxsg =
8236                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8237         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
8238                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
8239
8240         /* Command structures must be aligned on a 128-byte boundary
8241          * because the 7 lower bits of the address are used by the
8242          * hardware.
8243          */
8244         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
8245                         IOACCEL1_COMMANDLIST_ALIGNMENT);
8246         h->ioaccel_cmd_pool =
8247                 pci_alloc_consistent(h->pdev,
8248                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
8249                         &(h->ioaccel_cmd_pool_dhandle));
8250
8251         h->ioaccel1_blockFetchTable =
8252                 kmalloc(((h->ioaccel_maxsg + 1) *
8253                                 sizeof(u32)), GFP_KERNEL);
8254
8255         if ((h->ioaccel_cmd_pool == NULL) ||
8256                 (h->ioaccel1_blockFetchTable == NULL))
8257                 goto clean_up;
8258
8259         memset(h->ioaccel_cmd_pool, 0,
8260                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
8261         return 0;
8262
8263 clean_up:
8264         hpsa_free_ioaccel1_cmd_and_bft(h);
8265         return -ENOMEM;
8266 }
8267
8268 /* Free ioaccel2 mode command blocks and block fetch table */
8269 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8270 {
8271         hpsa_free_ioaccel2_sg_chain_blocks(h);
8272
8273         if (h->ioaccel2_cmd_pool) {
8274                 pci_free_consistent(h->pdev,
8275                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8276                         h->ioaccel2_cmd_pool,
8277                         h->ioaccel2_cmd_pool_dhandle);
8278                 h->ioaccel2_cmd_pool = NULL;
8279                 h->ioaccel2_cmd_pool_dhandle = 0;
8280         }
8281         kfree(h->ioaccel2_blockFetchTable);
8282         h->ioaccel2_blockFetchTable = NULL;
8283 }
8284
8285 /* Allocate ioaccel2 mode command blocks and block fetch table */
8286 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
8287 {
8288         int rc;
8289
8290         /* Allocate ioaccel2 mode command blocks and block fetch table */
8291
8292         h->ioaccel_maxsg =
8293                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
8294         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
8295                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
8296
8297         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
8298                         IOACCEL2_COMMANDLIST_ALIGNMENT);
8299         h->ioaccel2_cmd_pool =
8300                 pci_alloc_consistent(h->pdev,
8301                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
8302                         &(h->ioaccel2_cmd_pool_dhandle));
8303
8304         h->ioaccel2_blockFetchTable =
8305                 kmalloc(((h->ioaccel_maxsg + 1) *
8306                                 sizeof(u32)), GFP_KERNEL);
8307
8308         if ((h->ioaccel2_cmd_pool == NULL) ||
8309                 (h->ioaccel2_blockFetchTable == NULL)) {
8310                 rc = -ENOMEM;
8311                 goto clean_up;
8312         }
8313
8314         rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
8315         if (rc)
8316                 goto clean_up;
8317
8318         memset(h->ioaccel2_cmd_pool, 0,
8319                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
8320         return 0;
8321
8322 clean_up:
8323         hpsa_free_ioaccel2_cmd_and_bft(h);
8324         return rc;
8325 }
8326
8327 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
8328 static void hpsa_free_performant_mode(struct ctlr_info *h)
8329 {
8330         kfree(h->blockFetchTable);
8331         h->blockFetchTable = NULL;
8332         hpsa_free_reply_queues(h);
8333         hpsa_free_ioaccel1_cmd_and_bft(h);
8334         hpsa_free_ioaccel2_cmd_and_bft(h);
8335 }
8336
8337 /* return -ENODEV on error, 0 on success (or no action)
8338  * allocates numerous items that must be freed later
8339  */
8340 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
8341 {
8342         u32 trans_support;
8343         unsigned long transMethod = CFGTBL_Trans_Performant |
8344                                         CFGTBL_Trans_use_short_tags;
8345         int i, rc;
8346
8347         if (hpsa_simple_mode)
8348                 return 0;
8349
8350         trans_support = readl(&(h->cfgtable->TransportSupport));
8351         if (!(trans_support & PERFORMANT_MODE))
8352                 return 0;
8353
8354         /* Check for I/O accelerator mode support */
8355         if (trans_support & CFGTBL_Trans_io_accel1) {
8356                 transMethod |= CFGTBL_Trans_io_accel1 |
8357                                 CFGTBL_Trans_enable_directed_msix;
8358                 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
8359                 if (rc)
8360                         return rc;
8361         } else if (trans_support & CFGTBL_Trans_io_accel2) {
8362                 transMethod |= CFGTBL_Trans_io_accel2 |
8363                                 CFGTBL_Trans_enable_directed_msix;
8364                 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
8365                 if (rc)
8366                         return rc;
8367         }
8368
8369         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
8370         hpsa_get_max_perf_mode_cmds(h);
8371         /* Performant mode ring buffer and supporting data structures */
8372         h->reply_queue_size = h->max_commands * sizeof(u64);
8373
8374         for (i = 0; i < h->nreply_queues; i++) {
8375                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
8376                                                 h->reply_queue_size,
8377                                                 &(h->reply_queue[i].busaddr));
8378                 if (!h->reply_queue[i].head) {
8379                         rc = -ENOMEM;
8380                         goto clean1;    /* rq, ioaccel */
8381                 }
8382                 h->reply_queue[i].size = h->max_commands;
8383                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
8384                 h->reply_queue[i].current_entry = 0;
8385         }
8386
8387         /* Need a block fetch table for performant mode */
8388         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
8389                                 sizeof(u32)), GFP_KERNEL);
8390         if (!h->blockFetchTable) {
8391                 rc = -ENOMEM;
8392                 goto clean1;    /* rq, ioaccel */
8393         }
8394
8395         rc = hpsa_enter_performant_mode(h, trans_support);
8396         if (rc)
8397                 goto clean2;    /* bft, rq, ioaccel */
8398         return 0;
8399
8400 clean2: /* bft, rq, ioaccel */
8401         kfree(h->blockFetchTable);
8402         h->blockFetchTable = NULL;
8403 clean1: /* rq, ioaccel */
8404         hpsa_free_reply_queues(h);
8405         hpsa_free_ioaccel1_cmd_and_bft(h);
8406         hpsa_free_ioaccel2_cmd_and_bft(h);
8407         return rc;
8408 }
8409
8410 static int is_accelerated_cmd(struct CommandList *c)
8411 {
8412         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
8413 }
8414
8415 static void hpsa_drain_accel_commands(struct ctlr_info *h)
8416 {
8417         struct CommandList *c = NULL;
8418         int i, accel_cmds_out;
8419         int refcount;
8420
8421         do { /* wait for all outstanding ioaccel commands to drain out */
8422                 accel_cmds_out = 0;
8423                 for (i = 0; i < h->nr_cmds; i++) {
8424                         c = h->cmd_pool + i;
8425                         refcount = atomic_inc_return(&c->refcount);
8426                         if (refcount > 1) /* Command is allocated */
8427                                 accel_cmds_out += is_accelerated_cmd(c);
8428                         cmd_free(h, c);
8429                 }
8430                 if (accel_cmds_out <= 0)
8431                         break;
8432                 msleep(100);
8433         } while (1);
8434 }
8435
8436 /*
8437  *  This is it.  Register the PCI driver information for the cards we control
8438  *  the OS will call our registered routines when it finds one of our cards.
8439  */
8440 static int __init hpsa_init(void)
8441 {
8442         return pci_register_driver(&hpsa_pci_driver);
8443 }
8444
8445 static void __exit hpsa_cleanup(void)
8446 {
8447         pci_unregister_driver(&hpsa_pci_driver);
8448 }
8449
8450 static void __attribute__((unused)) verify_offsets(void)
8451 {
8452 #define VERIFY_OFFSET(member, offset) \
8453         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
8454
8455         VERIFY_OFFSET(structure_size, 0);
8456         VERIFY_OFFSET(volume_blk_size, 4);
8457         VERIFY_OFFSET(volume_blk_cnt, 8);
8458         VERIFY_OFFSET(phys_blk_shift, 16);
8459         VERIFY_OFFSET(parity_rotation_shift, 17);
8460         VERIFY_OFFSET(strip_size, 18);
8461         VERIFY_OFFSET(disk_starting_blk, 20);
8462         VERIFY_OFFSET(disk_blk_cnt, 28);
8463         VERIFY_OFFSET(data_disks_per_row, 36);
8464         VERIFY_OFFSET(metadata_disks_per_row, 38);
8465         VERIFY_OFFSET(row_cnt, 40);
8466         VERIFY_OFFSET(layout_map_count, 42);
8467         VERIFY_OFFSET(flags, 44);
8468         VERIFY_OFFSET(dekindex, 46);
8469         /* VERIFY_OFFSET(reserved, 48 */
8470         VERIFY_OFFSET(data, 64);
8471
8472 #undef VERIFY_OFFSET
8473
8474 #define VERIFY_OFFSET(member, offset) \
8475         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
8476
8477         VERIFY_OFFSET(IU_type, 0);
8478         VERIFY_OFFSET(direction, 1);
8479         VERIFY_OFFSET(reply_queue, 2);
8480         /* VERIFY_OFFSET(reserved1, 3);  */
8481         VERIFY_OFFSET(scsi_nexus, 4);
8482         VERIFY_OFFSET(Tag, 8);
8483         VERIFY_OFFSET(cdb, 16);
8484         VERIFY_OFFSET(cciss_lun, 32);
8485         VERIFY_OFFSET(data_len, 40);
8486         VERIFY_OFFSET(cmd_priority_task_attr, 44);
8487         VERIFY_OFFSET(sg_count, 45);
8488         /* VERIFY_OFFSET(reserved3 */
8489         VERIFY_OFFSET(err_ptr, 48);
8490         VERIFY_OFFSET(err_len, 56);
8491         /* VERIFY_OFFSET(reserved4  */
8492         VERIFY_OFFSET(sg, 64);
8493
8494 #undef VERIFY_OFFSET
8495
8496 #define VERIFY_OFFSET(member, offset) \
8497         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
8498
8499         VERIFY_OFFSET(dev_handle, 0x00);
8500         VERIFY_OFFSET(reserved1, 0x02);
8501         VERIFY_OFFSET(function, 0x03);
8502         VERIFY_OFFSET(reserved2, 0x04);
8503         VERIFY_OFFSET(err_info, 0x0C);
8504         VERIFY_OFFSET(reserved3, 0x10);
8505         VERIFY_OFFSET(err_info_len, 0x12);
8506         VERIFY_OFFSET(reserved4, 0x13);
8507         VERIFY_OFFSET(sgl_offset, 0x14);
8508         VERIFY_OFFSET(reserved5, 0x15);
8509         VERIFY_OFFSET(transfer_len, 0x1C);
8510         VERIFY_OFFSET(reserved6, 0x20);
8511         VERIFY_OFFSET(io_flags, 0x24);
8512         VERIFY_OFFSET(reserved7, 0x26);
8513         VERIFY_OFFSET(LUN, 0x34);
8514         VERIFY_OFFSET(control, 0x3C);
8515         VERIFY_OFFSET(CDB, 0x40);
8516         VERIFY_OFFSET(reserved8, 0x50);
8517         VERIFY_OFFSET(host_context_flags, 0x60);
8518         VERIFY_OFFSET(timeout_sec, 0x62);
8519         VERIFY_OFFSET(ReplyQueue, 0x64);
8520         VERIFY_OFFSET(reserved9, 0x65);
8521         VERIFY_OFFSET(tag, 0x68);
8522         VERIFY_OFFSET(host_addr, 0x70);
8523         VERIFY_OFFSET(CISS_LUN, 0x78);
8524         VERIFY_OFFSET(SG, 0x78 + 8);
8525 #undef VERIFY_OFFSET
8526 }
8527
8528 module_init(hpsa_init);
8529 module_exit(hpsa_cleanup);