1 // SPDX-License-Identifier: GPL-2.0-only
2 /* esp_scsi.c: ESP SCSI driver.
4 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
7 #include <linux/kernel.h>
8 #include <linux/types.h>
9 #include <linux/slab.h>
10 #include <linux/delay.h>
11 #include <linux/list.h>
12 #include <linux/completion.h>
13 #include <linux/kallsyms.h>
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/irqreturn.h>
23 #include <scsi/scsi.h>
24 #include <scsi/scsi_host.h>
25 #include <scsi/scsi_cmnd.h>
26 #include <scsi/scsi_device.h>
27 #include <scsi/scsi_tcq.h>
28 #include <scsi/scsi_dbg.h>
29 #include <scsi/scsi_transport_spi.h>
33 #define DRV_MODULE_NAME "esp"
34 #define PFX DRV_MODULE_NAME ": "
35 #define DRV_VERSION "2.000"
36 #define DRV_MODULE_RELDATE "April 19, 2007"
38 /* SCSI bus reset settle time in seconds. */
39 static int esp_bus_reset_settle = 3;
42 #define ESP_DEBUG_INTR 0x00000001
43 #define ESP_DEBUG_SCSICMD 0x00000002
44 #define ESP_DEBUG_RESET 0x00000004
45 #define ESP_DEBUG_MSGIN 0x00000008
46 #define ESP_DEBUG_MSGOUT 0x00000010
47 #define ESP_DEBUG_CMDDONE 0x00000020
48 #define ESP_DEBUG_DISCONNECT 0x00000040
49 #define ESP_DEBUG_DATASTART 0x00000080
50 #define ESP_DEBUG_DATADONE 0x00000100
51 #define ESP_DEBUG_RECONNECT 0x00000200
52 #define ESP_DEBUG_AUTOSENSE 0x00000400
53 #define ESP_DEBUG_EVENT 0x00000800
54 #define ESP_DEBUG_COMMAND 0x00001000
56 #define esp_log_intr(f, a...) \
57 do { if (esp_debug & ESP_DEBUG_INTR) \
58 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
61 #define esp_log_reset(f, a...) \
62 do { if (esp_debug & ESP_DEBUG_RESET) \
63 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
66 #define esp_log_msgin(f, a...) \
67 do { if (esp_debug & ESP_DEBUG_MSGIN) \
68 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
71 #define esp_log_msgout(f, a...) \
72 do { if (esp_debug & ESP_DEBUG_MSGOUT) \
73 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
76 #define esp_log_cmddone(f, a...) \
77 do { if (esp_debug & ESP_DEBUG_CMDDONE) \
78 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
81 #define esp_log_disconnect(f, a...) \
82 do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
83 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
86 #define esp_log_datastart(f, a...) \
87 do { if (esp_debug & ESP_DEBUG_DATASTART) \
88 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
91 #define esp_log_datadone(f, a...) \
92 do { if (esp_debug & ESP_DEBUG_DATADONE) \
93 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
96 #define esp_log_reconnect(f, a...) \
97 do { if (esp_debug & ESP_DEBUG_RECONNECT) \
98 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
101 #define esp_log_autosense(f, a...) \
102 do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
103 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
106 #define esp_log_event(f, a...) \
107 do { if (esp_debug & ESP_DEBUG_EVENT) \
108 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
111 #define esp_log_command(f, a...) \
112 do { if (esp_debug & ESP_DEBUG_COMMAND) \
113 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
116 #define esp_read8(REG) esp->ops->esp_read8(esp, REG)
117 #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
119 static void esp_log_fill_regs(struct esp *esp,
120 struct esp_event_ent *p)
123 p->seqreg = esp->seqreg;
124 p->sreg2 = esp->sreg2;
126 p->select_state = esp->select_state;
127 p->event = esp->event;
130 void scsi_esp_cmd(struct esp *esp, u8 val)
132 struct esp_event_ent *p;
133 int idx = esp->esp_event_cur;
135 p = &esp->esp_event_log[idx];
136 p->type = ESP_EVENT_TYPE_CMD;
138 esp_log_fill_regs(esp, p);
140 esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
142 esp_log_command("cmd[%02x]\n", val);
143 esp_write8(val, ESP_CMD);
145 EXPORT_SYMBOL(scsi_esp_cmd);
147 static void esp_send_dma_cmd(struct esp *esp, int len, int max_len, int cmd)
149 if (esp->flags & ESP_FLAG_USE_FIFO) {
152 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
153 for (i = 0; i < len; i++)
154 esp_write8(esp->command_block[i], ESP_FDATA);
155 scsi_esp_cmd(esp, cmd);
157 if (esp->rev == FASHME)
158 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
160 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
161 len, max_len, 0, cmd);
165 static void esp_event(struct esp *esp, u8 val)
167 struct esp_event_ent *p;
168 int idx = esp->esp_event_cur;
170 p = &esp->esp_event_log[idx];
171 p->type = ESP_EVENT_TYPE_EVENT;
173 esp_log_fill_regs(esp, p);
175 esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
180 static void esp_dump_cmd_log(struct esp *esp)
182 int idx = esp->esp_event_cur;
185 shost_printk(KERN_INFO, esp->host, "Dumping command log\n");
187 struct esp_event_ent *p = &esp->esp_event_log[idx];
189 shost_printk(KERN_INFO, esp->host,
190 "ent[%d] %s val[%02x] sreg[%02x] seqreg[%02x] "
191 "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
193 p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT",
194 p->val, p->sreg, p->seqreg,
195 p->sreg2, p->ireg, p->select_state, p->event);
197 idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
198 } while (idx != stop);
201 static void esp_flush_fifo(struct esp *esp)
203 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
204 if (esp->rev == ESP236) {
207 while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
209 shost_printk(KERN_ALERT, esp->host,
210 "ESP_FF_BYTES will not clear!\n");
218 static void hme_read_fifo(struct esp *esp)
220 int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
224 esp->fifo[idx++] = esp_read8(ESP_FDATA);
225 esp->fifo[idx++] = esp_read8(ESP_FDATA);
227 if (esp->sreg2 & ESP_STAT2_F1BYTE) {
228 esp_write8(0, ESP_FDATA);
229 esp->fifo[idx++] = esp_read8(ESP_FDATA);
230 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
235 static void esp_set_all_config3(struct esp *esp, u8 val)
239 for (i = 0; i < ESP_MAX_TARGET; i++)
240 esp->target[i].esp_config3 = val;
243 /* Reset the ESP chip, _not_ the SCSI bus. */
244 static void esp_reset_esp(struct esp *esp)
246 /* Now reset the ESP chip */
247 scsi_esp_cmd(esp, ESP_CMD_RC);
248 scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
249 if (esp->rev == FAST)
250 esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
251 scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
253 /* This is the only point at which it is reliable to read
254 * the ID-code for a fast ESP chip variants.
256 esp->max_period = ((35 * esp->ccycle) / 1000);
257 if (esp->rev == FAST) {
258 u8 family_code = ESP_FAMILY(esp_read8(ESP_UID));
260 if (family_code == ESP_UID_F236) {
262 } else if (family_code == ESP_UID_HME) {
263 esp->rev = FASHME; /* Version is usually '5'. */
264 } else if (family_code == ESP_UID_FSC) {
266 /* Enable Active Negation */
267 esp_write8(ESP_CONFIG4_RADE, ESP_CFG4);
271 esp->min_period = ((4 * esp->ccycle) / 1000);
273 esp->min_period = ((5 * esp->ccycle) / 1000);
275 if (esp->rev == FAS236) {
277 * The AM53c974 chip returns the same ID as FAS236;
278 * try to configure glitch eater.
280 u8 config4 = ESP_CONFIG4_GE1;
281 esp_write8(config4, ESP_CFG4);
282 config4 = esp_read8(ESP_CFG4);
283 if (config4 & ESP_CONFIG4_GE1) {
285 esp_write8(esp->config4, ESP_CFG4);
288 esp->max_period = (esp->max_period + 3)>>2;
289 esp->min_period = (esp->min_period + 3)>>2;
291 esp_write8(esp->config1, ESP_CFG1);
298 esp_write8(esp->config2, ESP_CFG2);
303 esp_write8(esp->config2, ESP_CFG2);
304 esp->prev_cfg3 = esp->target[0].esp_config3;
305 esp_write8(esp->prev_cfg3, ESP_CFG3);
309 esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
315 esp_write8(esp->config2, ESP_CFG2);
316 if (esp->rev == FASHME) {
317 u8 cfg3 = esp->target[0].esp_config3;
319 cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
320 if (esp->scsi_id >= 8)
321 cfg3 |= ESP_CONFIG3_IDBIT3;
322 esp_set_all_config3(esp, cfg3);
324 u32 cfg3 = esp->target[0].esp_config3;
326 cfg3 |= ESP_CONFIG3_FCLK;
327 esp_set_all_config3(esp, cfg3);
329 esp->prev_cfg3 = esp->target[0].esp_config3;
330 esp_write8(esp->prev_cfg3, ESP_CFG3);
331 if (esp->rev == FASHME) {
334 if (esp->flags & ESP_FLAG_DIFFERENTIAL)
343 esp_write8(esp->config2, ESP_CFG2);
344 esp_set_all_config3(esp,
345 (esp->target[0].esp_config3 |
346 ESP_CONFIG3_FCLOCK));
347 esp->prev_cfg3 = esp->target[0].esp_config3;
348 esp_write8(esp->prev_cfg3, ESP_CFG3);
356 /* Reload the configuration registers */
357 esp_write8(esp->cfact, ESP_CFACT);
360 esp_write8(esp->prev_stp, ESP_STP);
363 esp_write8(esp->prev_soff, ESP_SOFF);
365 esp_write8(esp->neg_defp, ESP_TIMEO);
367 /* Eat any bitrot in the chip */
368 esp_read8(ESP_INTRPT);
372 static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
374 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
375 struct scatterlist *sg = scsi_sglist(cmd);
377 struct scatterlist *s;
379 if (cmd->sc_data_direction == DMA_NONE)
382 if (esp->flags & ESP_FLAG_NO_DMA_MAP) {
384 * For pseudo DMA and PIO we need the virtual address instead of
385 * a dma address, so perform an identity mapping.
387 spriv->num_sg = scsi_sg_count(cmd);
389 scsi_for_each_sg(cmd, s, spriv->num_sg, i) {
390 s->dma_address = (uintptr_t)sg_virt(s);
391 total += sg_dma_len(s);
394 spriv->num_sg = scsi_dma_map(cmd);
395 scsi_for_each_sg(cmd, s, spriv->num_sg, i)
396 total += sg_dma_len(s);
398 spriv->cur_residue = sg_dma_len(sg);
399 spriv->prv_sg = NULL;
401 spriv->tot_residue = total;
404 static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
405 struct scsi_cmnd *cmd)
407 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
409 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
410 return ent->sense_dma +
411 (ent->sense_ptr - cmd->sense_buffer);
414 return sg_dma_address(p->cur_sg) +
415 (sg_dma_len(p->cur_sg) -
419 static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
420 struct scsi_cmnd *cmd)
422 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
424 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
425 return SCSI_SENSE_BUFFERSIZE -
426 (ent->sense_ptr - cmd->sense_buffer);
428 return p->cur_residue;
431 static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
432 struct scsi_cmnd *cmd, unsigned int len)
434 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
436 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
437 ent->sense_ptr += len;
441 p->cur_residue -= len;
442 p->tot_residue -= len;
443 if (p->cur_residue < 0 || p->tot_residue < 0) {
444 shost_printk(KERN_ERR, esp->host,
445 "Data transfer overflow.\n");
446 shost_printk(KERN_ERR, esp->host,
447 "cur_residue[%d] tot_residue[%d] len[%u]\n",
448 p->cur_residue, p->tot_residue, len);
452 if (!p->cur_residue && p->tot_residue) {
453 p->prv_sg = p->cur_sg;
454 p->cur_sg = sg_next(p->cur_sg);
455 p->cur_residue = sg_dma_len(p->cur_sg);
459 static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
461 if (!(esp->flags & ESP_FLAG_NO_DMA_MAP))
465 static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
467 struct scsi_cmnd *cmd = ent->cmd;
468 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
470 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
471 ent->saved_sense_ptr = ent->sense_ptr;
474 ent->saved_cur_residue = spriv->cur_residue;
475 ent->saved_prv_sg = spriv->prv_sg;
476 ent->saved_cur_sg = spriv->cur_sg;
477 ent->saved_tot_residue = spriv->tot_residue;
480 static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
482 struct scsi_cmnd *cmd = ent->cmd;
483 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
485 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
486 ent->sense_ptr = ent->saved_sense_ptr;
489 spriv->cur_residue = ent->saved_cur_residue;
490 spriv->prv_sg = ent->saved_prv_sg;
491 spriv->cur_sg = ent->saved_cur_sg;
492 spriv->tot_residue = ent->saved_tot_residue;
495 static void esp_write_tgt_config3(struct esp *esp, int tgt)
497 if (esp->rev > ESP100A) {
498 u8 val = esp->target[tgt].esp_config3;
500 if (val != esp->prev_cfg3) {
501 esp->prev_cfg3 = val;
502 esp_write8(val, ESP_CFG3);
507 static void esp_write_tgt_sync(struct esp *esp, int tgt)
509 u8 off = esp->target[tgt].esp_offset;
510 u8 per = esp->target[tgt].esp_period;
512 if (off != esp->prev_soff) {
513 esp->prev_soff = off;
514 esp_write8(off, ESP_SOFF);
516 if (per != esp->prev_stp) {
518 esp_write8(per, ESP_STP);
522 static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
524 if (esp->rev == FASHME) {
525 /* Arbitrary segment boundaries, 24-bit counts. */
526 if (dma_len > (1U << 24))
527 dma_len = (1U << 24);
531 /* ESP chip limits other variants by 16-bits of transfer
532 * count. Actually on FAS100A and FAS236 we could get
533 * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
534 * in the ESP_CFG2 register but that causes other unwanted
535 * changes so we don't use it currently.
537 if (dma_len > (1U << 16))
538 dma_len = (1U << 16);
540 /* All of the DMA variants hooked up to these chips
541 * cannot handle crossing a 24-bit address boundary.
543 base = dma_addr & ((1U << 24) - 1U);
544 end = base + dma_len;
545 if (end > (1U << 24))
547 dma_len = end - base;
552 static int esp_need_to_nego_wide(struct esp_target_data *tp)
554 struct scsi_target *target = tp->starget;
556 return spi_width(target) != tp->nego_goal_width;
559 static int esp_need_to_nego_sync(struct esp_target_data *tp)
561 struct scsi_target *target = tp->starget;
563 /* When offset is zero, period is "don't care". */
564 if (!spi_offset(target) && !tp->nego_goal_offset)
567 if (spi_offset(target) == tp->nego_goal_offset &&
568 spi_period(target) == tp->nego_goal_period)
574 static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
575 struct esp_lun_data *lp)
577 if (!ent->orig_tag[0]) {
578 /* Non-tagged, slot already taken? */
579 if (lp->non_tagged_cmd)
583 /* We are being held by active tagged
589 /* Tagged commands completed, we can unplug
590 * the queue and run this untagged command.
593 } else if (lp->num_tagged) {
594 /* Plug the queue until num_tagged decreases
595 * to zero in esp_free_lun_tag.
601 lp->non_tagged_cmd = ent;
605 /* Tagged command. Check that it isn't blocked by a non-tagged one. */
606 if (lp->non_tagged_cmd || lp->hold)
609 BUG_ON(lp->tagged_cmds[ent->orig_tag[1]]);
611 lp->tagged_cmds[ent->orig_tag[1]] = ent;
617 static void esp_free_lun_tag(struct esp_cmd_entry *ent,
618 struct esp_lun_data *lp)
620 if (ent->orig_tag[0]) {
621 BUG_ON(lp->tagged_cmds[ent->orig_tag[1]] != ent);
622 lp->tagged_cmds[ent->orig_tag[1]] = NULL;
625 BUG_ON(lp->non_tagged_cmd != ent);
626 lp->non_tagged_cmd = NULL;
630 static void esp_map_sense(struct esp *esp, struct esp_cmd_entry *ent)
632 ent->sense_ptr = ent->cmd->sense_buffer;
633 if (esp->flags & ESP_FLAG_NO_DMA_MAP) {
634 ent->sense_dma = (uintptr_t)ent->sense_ptr;
638 ent->sense_dma = dma_map_single(esp->dev, ent->sense_ptr,
639 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
642 static void esp_unmap_sense(struct esp *esp, struct esp_cmd_entry *ent)
644 if (!(esp->flags & ESP_FLAG_NO_DMA_MAP))
645 dma_unmap_single(esp->dev, ent->sense_dma,
646 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
647 ent->sense_ptr = NULL;
650 /* When a contingent allegiance condition is created, we force feed a
651 * REQUEST_SENSE command to the device to fetch the sense data. I
652 * tried many other schemes, relying on the scsi error handling layer
653 * to send out the REQUEST_SENSE automatically, but this was difficult
654 * to get right especially in the presence of applications like smartd
655 * which use SG_IO to send out their own REQUEST_SENSE commands.
657 static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
659 struct scsi_cmnd *cmd = ent->cmd;
660 struct scsi_device *dev = cmd->device;
668 if (!ent->sense_ptr) {
669 esp_log_autosense("Doing auto-sense for tgt[%d] lun[%d]\n",
671 esp_map_sense(esp, ent);
673 ent->saved_sense_ptr = ent->sense_ptr;
675 esp->active_cmd = ent;
677 p = esp->command_block;
678 esp->msg_out_len = 0;
680 *p++ = IDENTIFY(0, lun);
681 *p++ = REQUEST_SENSE;
682 *p++ = ((dev->scsi_level <= SCSI_2) ?
686 *p++ = SCSI_SENSE_BUFFERSIZE;
689 esp->select_state = ESP_SELECT_BASIC;
692 if (esp->rev == FASHME)
693 val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
694 esp_write8(val, ESP_BUSID);
696 esp_write_tgt_sync(esp, tgt);
697 esp_write_tgt_config3(esp, tgt);
699 val = (p - esp->command_block);
701 esp_send_dma_cmd(esp, val, 16, ESP_CMD_SELA);
704 static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
706 struct esp_cmd_entry *ent;
708 list_for_each_entry(ent, &esp->queued_cmds, list) {
709 struct scsi_cmnd *cmd = ent->cmd;
710 struct scsi_device *dev = cmd->device;
711 struct esp_lun_data *lp = dev->hostdata;
713 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
719 if (!spi_populate_tag_msg(&ent->tag[0], cmd)) {
723 ent->orig_tag[0] = ent->tag[0];
724 ent->orig_tag[1] = ent->tag[1];
726 if (esp_alloc_lun_tag(ent, lp) < 0)
735 static void esp_maybe_execute_command(struct esp *esp)
737 struct esp_target_data *tp;
738 struct scsi_device *dev;
739 struct scsi_cmnd *cmd;
740 struct esp_cmd_entry *ent;
741 bool select_and_stop = false;
746 if (esp->active_cmd ||
747 (esp->flags & ESP_FLAG_RESETTING))
750 ent = find_and_prep_issuable_command(esp);
754 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
755 esp_autosense(esp, ent);
763 tp = &esp->target[tgt];
765 list_move(&ent->list, &esp->active_cmds);
767 esp->active_cmd = ent;
769 esp_map_dma(esp, cmd);
770 esp_save_pointers(esp, ent);
772 if (!(cmd->cmd_len == 6 || cmd->cmd_len == 10 || cmd->cmd_len == 12))
773 select_and_stop = true;
775 p = esp->command_block;
777 esp->msg_out_len = 0;
778 if (tp->flags & ESP_TGT_CHECK_NEGO) {
779 /* Need to negotiate. If the target is broken
780 * go for synchronous transfers and non-wide.
782 if (tp->flags & ESP_TGT_BROKEN) {
783 tp->flags &= ~ESP_TGT_DISCONNECT;
784 tp->nego_goal_period = 0;
785 tp->nego_goal_offset = 0;
786 tp->nego_goal_width = 0;
787 tp->nego_goal_tags = 0;
790 /* If the settings are not changing, skip this. */
791 if (spi_width(tp->starget) == tp->nego_goal_width &&
792 spi_period(tp->starget) == tp->nego_goal_period &&
793 spi_offset(tp->starget) == tp->nego_goal_offset) {
794 tp->flags &= ~ESP_TGT_CHECK_NEGO;
798 if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
800 spi_populate_width_msg(&esp->msg_out[0],
801 (tp->nego_goal_width ?
803 tp->flags |= ESP_TGT_NEGO_WIDE;
804 } else if (esp_need_to_nego_sync(tp)) {
806 spi_populate_sync_msg(&esp->msg_out[0],
807 tp->nego_goal_period,
808 tp->nego_goal_offset);
809 tp->flags |= ESP_TGT_NEGO_SYNC;
811 tp->flags &= ~ESP_TGT_CHECK_NEGO;
814 /* If there are multiple message bytes, use Select and Stop */
815 if (esp->msg_out_len)
816 select_and_stop = true;
820 *p++ = IDENTIFY(tp->flags & ESP_TGT_DISCONNECT, lun);
822 if (ent->tag[0] && esp->rev == ESP100) {
823 /* ESP100 lacks select w/atn3 command, use select
826 select_and_stop = true;
829 if (select_and_stop) {
830 esp->cmd_bytes_left = cmd->cmd_len;
831 esp->cmd_bytes_ptr = &cmd->cmnd[0];
834 for (i = esp->msg_out_len - 1;
836 esp->msg_out[i + 2] = esp->msg_out[i];
837 esp->msg_out[0] = ent->tag[0];
838 esp->msg_out[1] = ent->tag[1];
839 esp->msg_out_len += 2;
842 start_cmd = ESP_CMD_SELAS;
843 esp->select_state = ESP_SELECT_MSGOUT;
845 start_cmd = ESP_CMD_SELA;
850 start_cmd = ESP_CMD_SA3;
853 for (i = 0; i < cmd->cmd_len; i++)
856 esp->select_state = ESP_SELECT_BASIC;
859 if (esp->rev == FASHME)
860 val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
861 esp_write8(val, ESP_BUSID);
863 esp_write_tgt_sync(esp, tgt);
864 esp_write_tgt_config3(esp, tgt);
866 val = (p - esp->command_block);
868 if (esp_debug & ESP_DEBUG_SCSICMD) {
869 printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
870 for (i = 0; i < cmd->cmd_len; i++)
871 printk("%02x ", cmd->cmnd[i]);
875 esp_send_dma_cmd(esp, val, 16, start_cmd);
878 static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
880 struct list_head *head = &esp->esp_cmd_pool;
881 struct esp_cmd_entry *ret;
883 if (list_empty(head)) {
884 ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
886 ret = list_entry(head->next, struct esp_cmd_entry, list);
887 list_del(&ret->list);
888 memset(ret, 0, sizeof(*ret));
893 static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
895 list_add(&ent->list, &esp->esp_cmd_pool);
898 static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
899 struct scsi_cmnd *cmd, unsigned char host_byte)
901 struct scsi_device *dev = cmd->device;
905 esp->active_cmd = NULL;
906 esp_unmap_dma(esp, cmd);
907 esp_free_lun_tag(ent, dev->hostdata);
909 set_host_byte(cmd, host_byte);
910 if (host_byte == DID_OK)
911 set_status_byte(cmd, ent->status);
914 complete(ent->eh_done);
918 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
919 esp_unmap_sense(esp, ent);
921 /* Restore the message/status bytes to what we actually
922 * saw originally. Also, report that we are providing
925 cmd->result = SAM_STAT_CHECK_CONDITION;
927 ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
928 if (esp_debug & ESP_DEBUG_AUTOSENSE) {
931 printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
932 esp->host->unique_id, tgt, lun);
933 for (i = 0; i < 18; i++)
934 printk("%02x ", cmd->sense_buffer[i]);
941 list_del(&ent->list);
942 esp_put_ent(esp, ent);
944 esp_maybe_execute_command(esp);
947 static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
949 struct scsi_device *dev = ent->cmd->device;
950 struct esp_lun_data *lp = dev->hostdata;
952 scsi_track_queue_full(dev, lp->num_tagged - 1);
955 static int esp_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
957 struct scsi_device *dev = cmd->device;
958 struct esp *esp = shost_priv(dev->host);
959 struct esp_cmd_priv *spriv;
960 struct esp_cmd_entry *ent;
962 ent = esp_get_ent(esp);
964 return SCSI_MLQUEUE_HOST_BUSY;
968 cmd->scsi_done = done;
970 spriv = ESP_CMD_PRIV(cmd);
973 list_add_tail(&ent->list, &esp->queued_cmds);
975 esp_maybe_execute_command(esp);
980 static DEF_SCSI_QCMD(esp_queuecommand)
982 static int esp_check_gross_error(struct esp *esp)
984 if (esp->sreg & ESP_STAT_SPAM) {
985 /* Gross Error, could be one of:
986 * - top of fifo overwritten
987 * - top of command register overwritten
988 * - DMA programmed with wrong direction
989 * - improper phase change
991 shost_printk(KERN_ERR, esp->host,
992 "Gross error sreg[%02x]\n", esp->sreg);
993 /* XXX Reset the chip. XXX */
999 static int esp_check_spur_intr(struct esp *esp)
1004 /* The interrupt pending bit of the status register cannot
1005 * be trusted on these revisions.
1007 esp->sreg &= ~ESP_STAT_INTR;
1011 if (!(esp->sreg & ESP_STAT_INTR)) {
1012 if (esp->ireg & ESP_INTR_SR)
1015 /* If the DMA is indicating interrupt pending and the
1016 * ESP is not, the only possibility is a DMA error.
1018 if (!esp->ops->dma_error(esp)) {
1019 shost_printk(KERN_ERR, esp->host,
1020 "Spurious irq, sreg=%02x.\n",
1025 shost_printk(KERN_ERR, esp->host, "DMA error\n");
1027 /* XXX Reset the chip. XXX */
1036 static void esp_schedule_reset(struct esp *esp)
1038 esp_log_reset("esp_schedule_reset() from %ps\n",
1039 __builtin_return_address(0));
1040 esp->flags |= ESP_FLAG_RESETTING;
1041 esp_event(esp, ESP_EVENT_RESET);
1044 /* In order to avoid having to add a special half-reconnected state
1045 * into the driver we just sit here and poll through the rest of
1046 * the reselection process to get the tag message bytes.
1048 static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
1049 struct esp_lun_data *lp)
1051 struct esp_cmd_entry *ent;
1054 if (!lp->num_tagged) {
1055 shost_printk(KERN_ERR, esp->host,
1056 "Reconnect w/num_tagged==0\n");
1060 esp_log_reconnect("reconnect tag, ");
1062 for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
1063 if (esp->ops->irq_pending(esp))
1066 if (i == ESP_QUICKIRQ_LIMIT) {
1067 shost_printk(KERN_ERR, esp->host,
1068 "Reconnect IRQ1 timeout\n");
1072 esp->sreg = esp_read8(ESP_STATUS);
1073 esp->ireg = esp_read8(ESP_INTRPT);
1075 esp_log_reconnect("IRQ(%d:%x:%x), ",
1076 i, esp->ireg, esp->sreg);
1078 if (esp->ireg & ESP_INTR_DC) {
1079 shost_printk(KERN_ERR, esp->host,
1080 "Reconnect, got disconnect.\n");
1084 if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
1085 shost_printk(KERN_ERR, esp->host,
1086 "Reconnect, not MIP sreg[%02x].\n", esp->sreg);
1090 /* DMA in the tag bytes... */
1091 esp->command_block[0] = 0xff;
1092 esp->command_block[1] = 0xff;
1093 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
1094 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
1096 /* ACK the message. */
1097 scsi_esp_cmd(esp, ESP_CMD_MOK);
1099 for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
1100 if (esp->ops->irq_pending(esp)) {
1101 esp->sreg = esp_read8(ESP_STATUS);
1102 esp->ireg = esp_read8(ESP_INTRPT);
1103 if (esp->ireg & ESP_INTR_FDONE)
1108 if (i == ESP_RESELECT_TAG_LIMIT) {
1109 shost_printk(KERN_ERR, esp->host, "Reconnect IRQ2 timeout\n");
1112 esp->ops->dma_drain(esp);
1113 esp->ops->dma_invalidate(esp);
1115 esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
1116 i, esp->ireg, esp->sreg,
1117 esp->command_block[0],
1118 esp->command_block[1]);
1120 if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
1121 esp->command_block[0] > ORDERED_QUEUE_TAG) {
1122 shost_printk(KERN_ERR, esp->host,
1123 "Reconnect, bad tag type %02x.\n",
1124 esp->command_block[0]);
1128 ent = lp->tagged_cmds[esp->command_block[1]];
1130 shost_printk(KERN_ERR, esp->host,
1131 "Reconnect, no entry for tag %02x.\n",
1132 esp->command_block[1]);
1139 static int esp_reconnect(struct esp *esp)
1141 struct esp_cmd_entry *ent;
1142 struct esp_target_data *tp;
1143 struct esp_lun_data *lp;
1144 struct scsi_device *dev;
1147 BUG_ON(esp->active_cmd);
1148 if (esp->rev == FASHME) {
1149 /* FASHME puts the target and lun numbers directly
1152 target = esp->fifo[0];
1153 lun = esp->fifo[1] & 0x7;
1155 u8 bits = esp_read8(ESP_FDATA);
1157 /* Older chips put the lun directly into the fifo, but
1158 * the target is given as a sample of the arbitration
1159 * lines on the bus at reselection time. So we should
1160 * see the ID of the ESP and the one reconnecting target
1161 * set in the bitmap.
1163 if (!(bits & esp->scsi_id_mask))
1165 bits &= ~esp->scsi_id_mask;
1166 if (!bits || (bits & (bits - 1)))
1169 target = ffs(bits) - 1;
1170 lun = (esp_read8(ESP_FDATA) & 0x7);
1172 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1173 if (esp->rev == ESP100) {
1174 u8 ireg = esp_read8(ESP_INTRPT);
1175 /* This chip has a bug during reselection that can
1176 * cause a spurious illegal-command interrupt, which
1177 * we simply ACK here. Another possibility is a bus
1178 * reset so we must check for that.
1180 if (ireg & ESP_INTR_SR)
1183 scsi_esp_cmd(esp, ESP_CMD_NULL);
1186 esp_write_tgt_sync(esp, target);
1187 esp_write_tgt_config3(esp, target);
1189 scsi_esp_cmd(esp, ESP_CMD_MOK);
1191 if (esp->rev == FASHME)
1192 esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
1195 tp = &esp->target[target];
1196 dev = __scsi_device_lookup_by_target(tp->starget, lun);
1198 shost_printk(KERN_ERR, esp->host,
1199 "Reconnect, no lp tgt[%u] lun[%u]\n",
1205 ent = lp->non_tagged_cmd;
1207 ent = esp_reconnect_with_tag(esp, lp);
1212 esp->active_cmd = ent;
1214 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1215 esp_restore_pointers(esp, ent);
1216 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1220 esp_schedule_reset(esp);
1224 static int esp_finish_select(struct esp *esp)
1226 struct esp_cmd_entry *ent;
1227 struct scsi_cmnd *cmd;
1229 /* No longer selecting. */
1230 esp->select_state = ESP_SELECT_NONE;
1232 esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
1233 ent = esp->active_cmd;
1236 if (esp->ops->dma_error(esp)) {
1237 /* If we see a DMA error during or as a result of selection,
1240 esp_schedule_reset(esp);
1241 esp_cmd_is_done(esp, ent, cmd, DID_ERROR);
1245 esp->ops->dma_invalidate(esp);
1247 if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
1248 struct esp_target_data *tp = &esp->target[cmd->device->id];
1250 /* Carefully back out of the selection attempt. Release
1251 * resources (such as DMA mapping & TAG) and reset state (such
1252 * as message out and command delivery variables).
1254 if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
1255 esp_unmap_dma(esp, cmd);
1256 esp_free_lun_tag(ent, cmd->device->hostdata);
1257 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
1258 esp->cmd_bytes_ptr = NULL;
1259 esp->cmd_bytes_left = 0;
1261 esp_unmap_sense(esp, ent);
1264 /* Now that the state is unwound properly, put back onto
1265 * the issue queue. This command is no longer active.
1267 list_move(&ent->list, &esp->queued_cmds);
1268 esp->active_cmd = NULL;
1270 /* Return value ignored by caller, it directly invokes
1276 if (esp->ireg == ESP_INTR_DC) {
1277 struct scsi_device *dev = cmd->device;
1279 /* Disconnect. Make sure we re-negotiate sync and
1280 * wide parameters if this target starts responding
1281 * again in the future.
1283 esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
1285 scsi_esp_cmd(esp, ESP_CMD_ESEL);
1286 esp_cmd_is_done(esp, ent, cmd, DID_BAD_TARGET);
1290 if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
1291 /* Selection successful. On pre-FAST chips we have
1292 * to do a NOP and possibly clean out the FIFO.
1294 if (esp->rev <= ESP236) {
1295 int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
1297 scsi_esp_cmd(esp, ESP_CMD_NULL);
1301 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
1302 esp_flush_fifo(esp);
1305 /* If we are doing a Select And Stop command, negotiation, etc.
1306 * we'll do the right thing as we transition to the next phase.
1308 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1312 shost_printk(KERN_INFO, esp->host,
1313 "Unexpected selection completion ireg[%x]\n", esp->ireg);
1314 esp_schedule_reset(esp);
1318 static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
1319 struct scsi_cmnd *cmd)
1321 int fifo_cnt, ecount, bytes_sent, flush_fifo;
1323 fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
1324 if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
1328 if (!(esp->sreg & ESP_STAT_TCNT)) {
1329 ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
1330 (((unsigned int)esp_read8(ESP_TCMED)) << 8));
1331 if (esp->rev == FASHME)
1332 ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
1333 if (esp->rev == PCSCSI && (esp->config2 & ESP_CONFIG2_FENAB))
1334 ecount |= ((unsigned int)esp_read8(ESP_TCHI)) << 16;
1337 bytes_sent = esp->data_dma_len;
1338 bytes_sent -= ecount;
1339 bytes_sent -= esp->send_cmd_residual;
1342 * The am53c974 has a DMA 'peculiarity'. The doc states:
1343 * In some odd byte conditions, one residual byte will
1344 * be left in the SCSI FIFO, and the FIFO Flags will
1345 * never count to '0 '. When this happens, the residual
1346 * byte should be retrieved via PIO following completion
1347 * of the BLAST operation.
1349 if (fifo_cnt == 1 && ent->flags & ESP_CMD_FLAG_RESIDUAL) {
1351 size_t offset = bytes_sent;
1352 u8 bval = esp_read8(ESP_FDATA);
1354 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE)
1355 ent->sense_ptr[bytes_sent] = bval;
1357 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
1360 ptr = scsi_kmap_atomic_sg(p->cur_sg, p->num_sg,
1363 *(ptr + offset) = bval;
1364 scsi_kunmap_atomic_sg(ptr);
1367 bytes_sent += fifo_cnt;
1368 ent->flags &= ~ESP_CMD_FLAG_RESIDUAL;
1370 if (!(ent->flags & ESP_CMD_FLAG_WRITE))
1371 bytes_sent -= fifo_cnt;
1374 if (!esp->prev_soff) {
1375 /* Synchronous data transfer, always flush fifo. */
1378 if (esp->rev == ESP100) {
1381 /* ESP100 has a chip bug where in the synchronous data
1382 * phase it can mistake a final long REQ pulse from the
1383 * target as an extra data byte. Fun.
1385 * To detect this case we resample the status register
1386 * and fifo flags. If we're still in a data phase and
1387 * we see spurious chunks in the fifo, we return error
1388 * to the caller which should reset and set things up
1389 * such that we only try future transfers to this
1390 * target in synchronous mode.
1392 esp->sreg = esp_read8(ESP_STATUS);
1393 phase = esp->sreg & ESP_STAT_PMASK;
1394 fflags = esp_read8(ESP_FFLAGS);
1396 if ((phase == ESP_DOP &&
1397 (fflags & ESP_FF_ONOTZERO)) ||
1398 (phase == ESP_DIP &&
1399 (fflags & ESP_FF_FBYTES)))
1402 if (!(ent->flags & ESP_CMD_FLAG_WRITE))
1407 esp_flush_fifo(esp);
1412 static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
1413 u8 scsi_period, u8 scsi_offset,
1414 u8 esp_stp, u8 esp_soff)
1416 spi_period(tp->starget) = scsi_period;
1417 spi_offset(tp->starget) = scsi_offset;
1418 spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
1422 esp_soff |= esp->radelay;
1423 if (esp->rev >= FAS236) {
1424 u8 bit = ESP_CONFIG3_FSCSI;
1425 if (esp->rev >= FAS100A)
1426 bit = ESP_CONFIG3_FAST;
1428 if (scsi_period < 50) {
1429 if (esp->rev == FASHME)
1430 esp_soff &= ~esp->radelay;
1431 tp->esp_config3 |= bit;
1433 tp->esp_config3 &= ~bit;
1435 esp->prev_cfg3 = tp->esp_config3;
1436 esp_write8(esp->prev_cfg3, ESP_CFG3);
1440 tp->esp_period = esp->prev_stp = esp_stp;
1441 tp->esp_offset = esp->prev_soff = esp_soff;
1443 esp_write8(esp_soff, ESP_SOFF);
1444 esp_write8(esp_stp, ESP_STP);
1446 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
1448 spi_display_xfer_agreement(tp->starget);
1451 static void esp_msgin_reject(struct esp *esp)
1453 struct esp_cmd_entry *ent = esp->active_cmd;
1454 struct scsi_cmnd *cmd = ent->cmd;
1455 struct esp_target_data *tp;
1458 tgt = cmd->device->id;
1459 tp = &esp->target[tgt];
1461 if (tp->flags & ESP_TGT_NEGO_WIDE) {
1462 tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
1464 if (!esp_need_to_nego_sync(tp)) {
1465 tp->flags &= ~ESP_TGT_CHECK_NEGO;
1466 scsi_esp_cmd(esp, ESP_CMD_RATN);
1469 spi_populate_sync_msg(&esp->msg_out[0],
1470 tp->nego_goal_period,
1471 tp->nego_goal_offset);
1472 tp->flags |= ESP_TGT_NEGO_SYNC;
1473 scsi_esp_cmd(esp, ESP_CMD_SATN);
1478 if (tp->flags & ESP_TGT_NEGO_SYNC) {
1479 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
1482 esp_setsync(esp, tp, 0, 0, 0, 0);
1483 scsi_esp_cmd(esp, ESP_CMD_RATN);
1487 shost_printk(KERN_INFO, esp->host, "Unexpected MESSAGE REJECT\n");
1488 esp_schedule_reset(esp);
1491 static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
1493 u8 period = esp->msg_in[3];
1494 u8 offset = esp->msg_in[4];
1497 if (!(tp->flags & ESP_TGT_NEGO_SYNC))
1506 if (period > esp->max_period) {
1507 period = offset = 0;
1510 if (period < esp->min_period)
1513 one_clock = esp->ccycle / 1000;
1514 stp = DIV_ROUND_UP(period << 2, one_clock);
1515 if (stp && esp->rev >= FAS236) {
1523 esp_setsync(esp, tp, period, offset, stp, offset);
1527 esp->msg_out[0] = MESSAGE_REJECT;
1528 esp->msg_out_len = 1;
1529 scsi_esp_cmd(esp, ESP_CMD_SATN);
1533 tp->nego_goal_period = period;
1534 tp->nego_goal_offset = offset;
1536 spi_populate_sync_msg(&esp->msg_out[0],
1537 tp->nego_goal_period,
1538 tp->nego_goal_offset);
1539 scsi_esp_cmd(esp, ESP_CMD_SATN);
1542 static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
1544 int size = 8 << esp->msg_in[3];
1547 if (esp->rev != FASHME)
1550 if (size != 8 && size != 16)
1553 if (!(tp->flags & ESP_TGT_NEGO_WIDE))
1556 cfg3 = tp->esp_config3;
1558 tp->flags |= ESP_TGT_WIDE;
1559 cfg3 |= ESP_CONFIG3_EWIDE;
1561 tp->flags &= ~ESP_TGT_WIDE;
1562 cfg3 &= ~ESP_CONFIG3_EWIDE;
1564 tp->esp_config3 = cfg3;
1565 esp->prev_cfg3 = cfg3;
1566 esp_write8(cfg3, ESP_CFG3);
1568 tp->flags &= ~ESP_TGT_NEGO_WIDE;
1570 spi_period(tp->starget) = 0;
1571 spi_offset(tp->starget) = 0;
1572 if (!esp_need_to_nego_sync(tp)) {
1573 tp->flags &= ~ESP_TGT_CHECK_NEGO;
1574 scsi_esp_cmd(esp, ESP_CMD_RATN);
1577 spi_populate_sync_msg(&esp->msg_out[0],
1578 tp->nego_goal_period,
1579 tp->nego_goal_offset);
1580 tp->flags |= ESP_TGT_NEGO_SYNC;
1581 scsi_esp_cmd(esp, ESP_CMD_SATN);
1586 esp->msg_out[0] = MESSAGE_REJECT;
1587 esp->msg_out_len = 1;
1588 scsi_esp_cmd(esp, ESP_CMD_SATN);
1591 static void esp_msgin_extended(struct esp *esp)
1593 struct esp_cmd_entry *ent = esp->active_cmd;
1594 struct scsi_cmnd *cmd = ent->cmd;
1595 struct esp_target_data *tp;
1596 int tgt = cmd->device->id;
1598 tp = &esp->target[tgt];
1599 if (esp->msg_in[2] == EXTENDED_SDTR) {
1600 esp_msgin_sdtr(esp, tp);
1603 if (esp->msg_in[2] == EXTENDED_WDTR) {
1604 esp_msgin_wdtr(esp, tp);
1608 shost_printk(KERN_INFO, esp->host,
1609 "Unexpected extended msg type %x\n", esp->msg_in[2]);
1611 esp->msg_out[0] = MESSAGE_REJECT;
1612 esp->msg_out_len = 1;
1613 scsi_esp_cmd(esp, ESP_CMD_SATN);
1616 /* Analyze msgin bytes received from target so far. Return non-zero
1617 * if there are more bytes needed to complete the message.
1619 static int esp_msgin_process(struct esp *esp)
1621 u8 msg0 = esp->msg_in[0];
1622 int len = esp->msg_in_len;
1626 shost_printk(KERN_INFO, esp->host,
1627 "Unexpected msgin identify\n");
1632 case EXTENDED_MESSAGE:
1635 if (len < esp->msg_in[1] + 2)
1637 esp_msgin_extended(esp);
1640 case IGNORE_WIDE_RESIDUE: {
1641 struct esp_cmd_entry *ent;
1642 struct esp_cmd_priv *spriv;
1646 if (esp->msg_in[1] != 1)
1649 ent = esp->active_cmd;
1650 spriv = ESP_CMD_PRIV(ent->cmd);
1652 if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
1653 spriv->cur_sg = spriv->prv_sg;
1654 spriv->cur_residue = 1;
1656 spriv->cur_residue++;
1657 spriv->tot_residue++;
1662 case RESTORE_POINTERS:
1663 esp_restore_pointers(esp, esp->active_cmd);
1666 esp_save_pointers(esp, esp->active_cmd);
1669 case COMMAND_COMPLETE:
1671 struct esp_cmd_entry *ent = esp->active_cmd;
1673 ent->message = msg0;
1674 esp_event(esp, ESP_EVENT_FREE_BUS);
1675 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1678 case MESSAGE_REJECT:
1679 esp_msgin_reject(esp);
1684 esp->msg_out[0] = MESSAGE_REJECT;
1685 esp->msg_out_len = 1;
1686 scsi_esp_cmd(esp, ESP_CMD_SATN);
1691 static int esp_process_event(struct esp *esp)
1697 esp_log_event("process event %d phase %x\n",
1698 esp->event, esp->sreg & ESP_STAT_PMASK);
1699 switch (esp->event) {
1700 case ESP_EVENT_CHECK_PHASE:
1701 switch (esp->sreg & ESP_STAT_PMASK) {
1703 esp_event(esp, ESP_EVENT_DATA_OUT);
1706 esp_event(esp, ESP_EVENT_DATA_IN);
1709 esp_flush_fifo(esp);
1710 scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
1711 esp_event(esp, ESP_EVENT_STATUS);
1712 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1716 esp_event(esp, ESP_EVENT_MSGOUT);
1720 esp_event(esp, ESP_EVENT_MSGIN);
1724 esp_event(esp, ESP_EVENT_CMD_START);
1728 shost_printk(KERN_INFO, esp->host,
1729 "Unexpected phase, sreg=%02x\n",
1731 esp_schedule_reset(esp);
1736 case ESP_EVENT_DATA_IN:
1740 case ESP_EVENT_DATA_OUT: {
1741 struct esp_cmd_entry *ent = esp->active_cmd;
1742 struct scsi_cmnd *cmd = ent->cmd;
1743 dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
1744 unsigned int dma_len = esp_cur_dma_len(ent, cmd);
1746 if (esp->rev == ESP100)
1747 scsi_esp_cmd(esp, ESP_CMD_NULL);
1750 ent->flags |= ESP_CMD_FLAG_WRITE;
1752 ent->flags &= ~ESP_CMD_FLAG_WRITE;
1754 if (esp->ops->dma_length_limit)
1755 dma_len = esp->ops->dma_length_limit(esp, dma_addr,
1758 dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
1760 esp->data_dma_len = dma_len;
1763 shost_printk(KERN_ERR, esp->host,
1764 "DMA length is zero!\n");
1765 shost_printk(KERN_ERR, esp->host,
1766 "cur adr[%08llx] len[%08x]\n",
1767 (unsigned long long)esp_cur_dma_addr(ent, cmd),
1768 esp_cur_dma_len(ent, cmd));
1769 esp_schedule_reset(esp);
1773 esp_log_datastart("start data addr[%08llx] len[%u] write(%d)\n",
1774 (unsigned long long)dma_addr, dma_len, write);
1776 esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
1777 write, ESP_CMD_DMA | ESP_CMD_TI);
1778 esp_event(esp, ESP_EVENT_DATA_DONE);
1781 case ESP_EVENT_DATA_DONE: {
1782 struct esp_cmd_entry *ent = esp->active_cmd;
1783 struct scsi_cmnd *cmd = ent->cmd;
1786 if (esp->ops->dma_error(esp)) {
1787 shost_printk(KERN_INFO, esp->host,
1788 "data done, DMA error, resetting\n");
1789 esp_schedule_reset(esp);
1793 if (ent->flags & ESP_CMD_FLAG_WRITE) {
1794 /* XXX parity errors, etc. XXX */
1796 esp->ops->dma_drain(esp);
1798 esp->ops->dma_invalidate(esp);
1800 if (esp->ireg != ESP_INTR_BSERV) {
1801 /* We should always see exactly a bus-service
1802 * interrupt at the end of a successful transfer.
1804 shost_printk(KERN_INFO, esp->host,
1805 "data done, not BSERV, resetting\n");
1806 esp_schedule_reset(esp);
1810 bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
1812 esp_log_datadone("data done flgs[%x] sent[%d]\n",
1813 ent->flags, bytes_sent);
1815 if (bytes_sent < 0) {
1816 /* XXX force sync mode for this target XXX */
1817 esp_schedule_reset(esp);
1821 esp_advance_dma(esp, ent, cmd, bytes_sent);
1822 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1826 case ESP_EVENT_STATUS: {
1827 struct esp_cmd_entry *ent = esp->active_cmd;
1829 if (esp->ireg & ESP_INTR_FDONE) {
1830 ent->status = esp_read8(ESP_FDATA);
1831 ent->message = esp_read8(ESP_FDATA);
1832 scsi_esp_cmd(esp, ESP_CMD_MOK);
1833 } else if (esp->ireg == ESP_INTR_BSERV) {
1834 ent->status = esp_read8(ESP_FDATA);
1835 ent->message = 0xff;
1836 esp_event(esp, ESP_EVENT_MSGIN);
1840 if (ent->message != COMMAND_COMPLETE) {
1841 shost_printk(KERN_INFO, esp->host,
1842 "Unexpected message %x in status\n",
1844 esp_schedule_reset(esp);
1848 esp_event(esp, ESP_EVENT_FREE_BUS);
1849 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1852 case ESP_EVENT_FREE_BUS: {
1853 struct esp_cmd_entry *ent = esp->active_cmd;
1854 struct scsi_cmnd *cmd = ent->cmd;
1856 if (ent->message == COMMAND_COMPLETE ||
1857 ent->message == DISCONNECT)
1858 scsi_esp_cmd(esp, ESP_CMD_ESEL);
1860 if (ent->message == COMMAND_COMPLETE) {
1861 esp_log_cmddone("Command done status[%x] message[%x]\n",
1862 ent->status, ent->message);
1863 if (ent->status == SAM_STAT_TASK_SET_FULL)
1864 esp_event_queue_full(esp, ent);
1866 if (ent->status == SAM_STAT_CHECK_CONDITION &&
1867 !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
1868 ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
1869 esp_autosense(esp, ent);
1871 esp_cmd_is_done(esp, ent, cmd, DID_OK);
1873 } else if (ent->message == DISCONNECT) {
1874 esp_log_disconnect("Disconnecting tgt[%d] tag[%x:%x]\n",
1876 ent->tag[0], ent->tag[1]);
1878 esp->active_cmd = NULL;
1879 esp_maybe_execute_command(esp);
1881 shost_printk(KERN_INFO, esp->host,
1882 "Unexpected message %x in freebus\n",
1884 esp_schedule_reset(esp);
1887 if (esp->active_cmd)
1888 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1891 case ESP_EVENT_MSGOUT: {
1892 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1894 if (esp_debug & ESP_DEBUG_MSGOUT) {
1896 printk("ESP: Sending message [ ");
1897 for (i = 0; i < esp->msg_out_len; i++)
1898 printk("%02x ", esp->msg_out[i]);
1902 if (esp->rev == FASHME) {
1905 /* Always use the fifo. */
1906 for (i = 0; i < esp->msg_out_len; i++) {
1907 esp_write8(esp->msg_out[i], ESP_FDATA);
1908 esp_write8(0, ESP_FDATA);
1910 scsi_esp_cmd(esp, ESP_CMD_TI);
1912 if (esp->msg_out_len == 1) {
1913 esp_write8(esp->msg_out[0], ESP_FDATA);
1914 scsi_esp_cmd(esp, ESP_CMD_TI);
1915 } else if (esp->flags & ESP_FLAG_USE_FIFO) {
1916 for (i = 0; i < esp->msg_out_len; i++)
1917 esp_write8(esp->msg_out[i], ESP_FDATA);
1918 scsi_esp_cmd(esp, ESP_CMD_TI);
1921 memcpy(esp->command_block,
1925 esp->ops->send_dma_cmd(esp,
1926 esp->command_block_dma,
1930 ESP_CMD_DMA|ESP_CMD_TI);
1933 esp_event(esp, ESP_EVENT_MSGOUT_DONE);
1936 case ESP_EVENT_MSGOUT_DONE:
1937 if (esp->rev == FASHME) {
1938 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1940 if (esp->msg_out_len > 1)
1941 esp->ops->dma_invalidate(esp);
1943 /* XXX if the chip went into disconnected mode,
1944 * we can't run the phase state machine anyway.
1946 if (!(esp->ireg & ESP_INTR_DC))
1947 scsi_esp_cmd(esp, ESP_CMD_NULL);
1950 esp->msg_out_len = 0;
1952 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1954 case ESP_EVENT_MSGIN:
1955 if (esp->ireg & ESP_INTR_BSERV) {
1956 if (esp->rev == FASHME) {
1957 if (!(esp_read8(ESP_STATUS2) &
1959 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1961 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1962 if (esp->rev == ESP100)
1963 scsi_esp_cmd(esp, ESP_CMD_NULL);
1965 scsi_esp_cmd(esp, ESP_CMD_TI);
1966 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1969 if (esp->ireg & ESP_INTR_FDONE) {
1972 if (esp->rev == FASHME)
1975 val = esp_read8(ESP_FDATA);
1976 esp->msg_in[esp->msg_in_len++] = val;
1978 esp_log_msgin("Got msgin byte %x\n", val);
1980 if (!esp_msgin_process(esp))
1981 esp->msg_in_len = 0;
1983 if (esp->rev == FASHME)
1984 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1986 scsi_esp_cmd(esp, ESP_CMD_MOK);
1988 /* Check whether a bus reset is to be done next */
1989 if (esp->event == ESP_EVENT_RESET)
1992 if (esp->event != ESP_EVENT_FREE_BUS)
1993 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1995 shost_printk(KERN_INFO, esp->host,
1996 "MSGIN neither BSERV not FDON, resetting");
1997 esp_schedule_reset(esp);
2001 case ESP_EVENT_CMD_START:
2002 memcpy(esp->command_block, esp->cmd_bytes_ptr,
2003 esp->cmd_bytes_left);
2004 esp_send_dma_cmd(esp, esp->cmd_bytes_left, 16, ESP_CMD_TI);
2005 esp_event(esp, ESP_EVENT_CMD_DONE);
2006 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
2008 case ESP_EVENT_CMD_DONE:
2009 esp->ops->dma_invalidate(esp);
2010 if (esp->ireg & ESP_INTR_BSERV) {
2011 esp_event(esp, ESP_EVENT_CHECK_PHASE);
2014 esp_schedule_reset(esp);
2017 case ESP_EVENT_RESET:
2018 scsi_esp_cmd(esp, ESP_CMD_RS);
2022 shost_printk(KERN_INFO, esp->host,
2023 "Unexpected event %x, resetting\n", esp->event);
2024 esp_schedule_reset(esp);
2030 static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
2032 struct scsi_cmnd *cmd = ent->cmd;
2034 esp_unmap_dma(esp, cmd);
2035 esp_free_lun_tag(ent, cmd->device->hostdata);
2036 cmd->result = DID_RESET << 16;
2038 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE)
2039 esp_unmap_sense(esp, ent);
2041 cmd->scsi_done(cmd);
2042 list_del(&ent->list);
2043 esp_put_ent(esp, ent);
2046 static void esp_clear_hold(struct scsi_device *dev, void *data)
2048 struct esp_lun_data *lp = dev->hostdata;
2050 BUG_ON(lp->num_tagged);
2054 static void esp_reset_cleanup(struct esp *esp)
2056 struct esp_cmd_entry *ent, *tmp;
2059 list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
2060 struct scsi_cmnd *cmd = ent->cmd;
2062 list_del(&ent->list);
2063 cmd->result = DID_RESET << 16;
2064 cmd->scsi_done(cmd);
2065 esp_put_ent(esp, ent);
2068 list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
2069 if (ent == esp->active_cmd)
2070 esp->active_cmd = NULL;
2071 esp_reset_cleanup_one(esp, ent);
2074 BUG_ON(esp->active_cmd != NULL);
2076 /* Force renegotiation of sync/wide transfers. */
2077 for (i = 0; i < ESP_MAX_TARGET; i++) {
2078 struct esp_target_data *tp = &esp->target[i];
2082 tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
2085 tp->flags &= ~ESP_TGT_WIDE;
2086 tp->flags |= ESP_TGT_CHECK_NEGO;
2089 __starget_for_each_device(tp->starget, NULL,
2092 esp->flags &= ~ESP_FLAG_RESETTING;
2095 /* Runs under host->lock */
2096 static void __esp_interrupt(struct esp *esp)
2098 int finish_reset, intr_done;
2102 * Once INTRPT is read STATUS and SSTEP are cleared.
2104 esp->sreg = esp_read8(ESP_STATUS);
2105 esp->seqreg = esp_read8(ESP_SSTEP);
2106 esp->ireg = esp_read8(ESP_INTRPT);
2108 if (esp->flags & ESP_FLAG_RESETTING) {
2111 if (esp_check_gross_error(esp))
2114 finish_reset = esp_check_spur_intr(esp);
2115 if (finish_reset < 0)
2119 if (esp->ireg & ESP_INTR_SR)
2123 esp_reset_cleanup(esp);
2124 if (esp->eh_reset) {
2125 complete(esp->eh_reset);
2126 esp->eh_reset = NULL;
2131 phase = (esp->sreg & ESP_STAT_PMASK);
2132 if (esp->rev == FASHME) {
2133 if (((phase != ESP_DIP && phase != ESP_DOP) &&
2134 esp->select_state == ESP_SELECT_NONE &&
2135 esp->event != ESP_EVENT_STATUS &&
2136 esp->event != ESP_EVENT_DATA_DONE) ||
2137 (esp->ireg & ESP_INTR_RSEL)) {
2138 esp->sreg2 = esp_read8(ESP_STATUS2);
2139 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2140 (esp->sreg2 & ESP_STAT2_F1BYTE))
2145 esp_log_intr("intr sreg[%02x] seqreg[%02x] "
2146 "sreg2[%02x] ireg[%02x]\n",
2147 esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
2151 if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
2152 shost_printk(KERN_INFO, esp->host,
2153 "unexpected IREG %02x\n", esp->ireg);
2154 if (esp->ireg & ESP_INTR_IC)
2155 esp_dump_cmd_log(esp);
2157 esp_schedule_reset(esp);
2159 if (esp->ireg & ESP_INTR_RSEL) {
2160 if (esp->active_cmd)
2161 (void) esp_finish_select(esp);
2162 intr_done = esp_reconnect(esp);
2164 /* Some combination of FDONE, BSERV, DC. */
2165 if (esp->select_state != ESP_SELECT_NONE)
2166 intr_done = esp_finish_select(esp);
2170 intr_done = esp_process_event(esp);
2173 irqreturn_t scsi_esp_intr(int irq, void *dev_id)
2175 struct esp *esp = dev_id;
2176 unsigned long flags;
2179 spin_lock_irqsave(esp->host->host_lock, flags);
2181 if (esp->ops->irq_pending(esp)) {
2186 __esp_interrupt(esp);
2187 if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
2189 esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
2191 for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
2192 if (esp->ops->irq_pending(esp))
2195 if (i == ESP_QUICKIRQ_LIMIT)
2199 spin_unlock_irqrestore(esp->host->host_lock, flags);
2203 EXPORT_SYMBOL(scsi_esp_intr);
2205 static void esp_get_revision(struct esp *esp)
2209 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
2210 if (esp->config2 == 0) {
2211 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
2212 esp_write8(esp->config2, ESP_CFG2);
2214 val = esp_read8(ESP_CFG2);
2215 val &= ~ESP_CONFIG2_MAGIC;
2218 if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
2220 * If what we write to cfg2 does not come back,
2221 * cfg2 is not implemented.
2222 * Therefore this must be a plain esp100.
2229 esp_set_all_config3(esp, 5);
2231 esp_write8(esp->config2, ESP_CFG2);
2232 esp_write8(0, ESP_CFG3);
2233 esp_write8(esp->prev_cfg3, ESP_CFG3);
2235 val = esp_read8(ESP_CFG3);
2237 /* The cfg2 register is implemented, however
2238 * cfg3 is not, must be esp100a.
2242 esp_set_all_config3(esp, 0);
2244 esp_write8(esp->prev_cfg3, ESP_CFG3);
2246 /* All of cfg{1,2,3} implemented, must be one of
2247 * the fas variants, figure out which one.
2249 if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
2251 esp->sync_defp = SYNC_DEFP_FAST;
2258 static void esp_init_swstate(struct esp *esp)
2262 INIT_LIST_HEAD(&esp->queued_cmds);
2263 INIT_LIST_HEAD(&esp->active_cmds);
2264 INIT_LIST_HEAD(&esp->esp_cmd_pool);
2266 /* Start with a clear state, domain validation (via ->slave_configure,
2267 * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
2270 for (i = 0 ; i < ESP_MAX_TARGET; i++) {
2271 esp->target[i].flags = 0;
2272 esp->target[i].nego_goal_period = 0;
2273 esp->target[i].nego_goal_offset = 0;
2274 esp->target[i].nego_goal_width = 0;
2275 esp->target[i].nego_goal_tags = 0;
2279 /* This places the ESP into a known state at boot time. */
2280 static void esp_bootup_reset(struct esp *esp)
2285 esp->ops->reset_dma(esp);
2290 /* Reset the SCSI bus, but tell ESP not to generate an irq */
2291 val = esp_read8(ESP_CFG1);
2292 val |= ESP_CONFIG1_SRRDISAB;
2293 esp_write8(val, ESP_CFG1);
2295 scsi_esp_cmd(esp, ESP_CMD_RS);
2298 esp_write8(esp->config1, ESP_CFG1);
2300 /* Eat any bitrot in the chip and we are done... */
2301 esp_read8(ESP_INTRPT);
2304 static void esp_set_clock_params(struct esp *esp)
2309 /* This is getting messy but it has to be done correctly or else
2310 * you get weird behavior all over the place. We are trying to
2311 * basically figure out three pieces of information.
2313 * a) Clock Conversion Factor
2315 * This is a representation of the input crystal clock frequency
2316 * going into the ESP on this machine. Any operation whose timing
2317 * is longer than 400ns depends on this value being correct. For
2318 * example, you'll get blips for arbitration/selection during high
2319 * load or with multiple targets if this is not set correctly.
2321 * b) Selection Time-Out
2323 * The ESP isn't very bright and will arbitrate for the bus and try
2324 * to select a target forever if you let it. This value tells the
2325 * ESP when it has taken too long to negotiate and that it should
2326 * interrupt the CPU so we can see what happened. The value is
2327 * computed as follows (from NCR/Symbios chip docs).
2329 * (Time Out Period) * (Input Clock)
2330 * STO = ----------------------------------
2331 * (8192) * (Clock Conversion Factor)
2333 * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
2335 * c) Imperical constants for synchronous offset and transfer period
2338 * This entails the smallest and largest sync period we could ever
2339 * handle on this ESP.
2343 ccf = ((fhz / 1000000) + 4) / 5;
2347 /* If we can't find anything reasonable, just assume 20MHZ.
2348 * This is the clock frequency of the older sun4c's where I've
2349 * been unable to find the clock-frequency PROM property. All
2350 * other machines provide useful values it seems.
2352 if (fhz <= 5000000 || ccf < 1 || ccf > 8) {
2357 esp->cfact = (ccf == 8 ? 0 : ccf);
2359 esp->ccycle = ESP_HZ_TO_CYCLE(fhz);
2360 esp->ctick = ESP_TICK(ccf, esp->ccycle);
2361 esp->neg_defp = ESP_NEG_DEFP(fhz, ccf);
2362 esp->sync_defp = SYNC_DEFP_SLOW;
2365 static const char *esp_chip_names[] = {
2377 static struct scsi_transport_template *esp_transport_template;
2379 int scsi_esp_register(struct esp *esp)
2381 static int instance;
2385 esp->num_tags = ESP_DEFAULT_TAGS;
2386 esp->host->transportt = esp_transport_template;
2387 esp->host->max_lun = ESP_MAX_LUN;
2388 esp->host->cmd_per_lun = 2;
2389 esp->host->unique_id = instance;
2391 esp_set_clock_params(esp);
2393 esp_get_revision(esp);
2395 esp_init_swstate(esp);
2397 esp_bootup_reset(esp);
2399 dev_printk(KERN_INFO, esp->dev, "esp%u: regs[%1p:%1p] irq[%u]\n",
2400 esp->host->unique_id, esp->regs, esp->dma_regs,
2402 dev_printk(KERN_INFO, esp->dev,
2403 "esp%u: is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
2404 esp->host->unique_id, esp_chip_names[esp->rev],
2405 esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
2407 /* Let the SCSI bus reset settle. */
2408 ssleep(esp_bus_reset_settle);
2410 err = scsi_add_host(esp->host, esp->dev);
2416 scsi_scan_host(esp->host);
2420 EXPORT_SYMBOL(scsi_esp_register);
2422 void scsi_esp_unregister(struct esp *esp)
2424 scsi_remove_host(esp->host);
2426 EXPORT_SYMBOL(scsi_esp_unregister);
2428 static int esp_target_alloc(struct scsi_target *starget)
2430 struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
2431 struct esp_target_data *tp = &esp->target[starget->id];
2433 tp->starget = starget;
2438 static void esp_target_destroy(struct scsi_target *starget)
2440 struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
2441 struct esp_target_data *tp = &esp->target[starget->id];
2446 static int esp_slave_alloc(struct scsi_device *dev)
2448 struct esp *esp = shost_priv(dev->host);
2449 struct esp_target_data *tp = &esp->target[dev->id];
2450 struct esp_lun_data *lp;
2452 lp = kzalloc(sizeof(*lp), GFP_KERNEL);
2457 spi_min_period(tp->starget) = esp->min_period;
2458 spi_max_offset(tp->starget) = 15;
2460 if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
2461 spi_max_width(tp->starget) = 1;
2463 spi_max_width(tp->starget) = 0;
2468 static int esp_slave_configure(struct scsi_device *dev)
2470 struct esp *esp = shost_priv(dev->host);
2471 struct esp_target_data *tp = &esp->target[dev->id];
2473 if (dev->tagged_supported)
2474 scsi_change_queue_depth(dev, esp->num_tags);
2476 tp->flags |= ESP_TGT_DISCONNECT;
2478 if (!spi_initial_dv(dev->sdev_target))
2484 static void esp_slave_destroy(struct scsi_device *dev)
2486 struct esp_lun_data *lp = dev->hostdata;
2489 dev->hostdata = NULL;
2492 static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
2494 struct esp *esp = shost_priv(cmd->device->host);
2495 struct esp_cmd_entry *ent, *tmp;
2496 struct completion eh_done;
2497 unsigned long flags;
2499 /* XXX This helps a lot with debugging but might be a bit
2500 * XXX much for the final driver.
2502 spin_lock_irqsave(esp->host->host_lock, flags);
2503 shost_printk(KERN_ERR, esp->host, "Aborting command [%p:%02x]\n",
2505 ent = esp->active_cmd;
2507 shost_printk(KERN_ERR, esp->host,
2508 "Current command [%p:%02x]\n",
2509 ent->cmd, ent->cmd->cmnd[0]);
2510 list_for_each_entry(ent, &esp->queued_cmds, list) {
2511 shost_printk(KERN_ERR, esp->host, "Queued command [%p:%02x]\n",
2512 ent->cmd, ent->cmd->cmnd[0]);
2514 list_for_each_entry(ent, &esp->active_cmds, list) {
2515 shost_printk(KERN_ERR, esp->host, " Active command [%p:%02x]\n",
2516 ent->cmd, ent->cmd->cmnd[0]);
2518 esp_dump_cmd_log(esp);
2519 spin_unlock_irqrestore(esp->host->host_lock, flags);
2521 spin_lock_irqsave(esp->host->host_lock, flags);
2524 list_for_each_entry(tmp, &esp->queued_cmds, list) {
2525 if (tmp->cmd == cmd) {
2532 /* Easiest case, we didn't even issue the command
2533 * yet so it is trivial to abort.
2535 list_del(&ent->list);
2537 cmd->result = DID_ABORT << 16;
2538 cmd->scsi_done(cmd);
2540 esp_put_ent(esp, ent);
2545 init_completion(&eh_done);
2547 ent = esp->active_cmd;
2548 if (ent && ent->cmd == cmd) {
2549 /* Command is the currently active command on
2550 * the bus. If we already have an output message
2553 if (esp->msg_out_len)
2556 /* Send out an abort, encouraging the target to
2557 * go to MSGOUT phase by asserting ATN.
2559 esp->msg_out[0] = ABORT_TASK_SET;
2560 esp->msg_out_len = 1;
2561 ent->eh_done = &eh_done;
2563 scsi_esp_cmd(esp, ESP_CMD_SATN);
2565 /* The command is disconnected. This is not easy to
2566 * abort. For now we fail and let the scsi error
2567 * handling layer go try a scsi bus reset or host
2570 * What we could do is put together a scsi command
2571 * solely for the purpose of sending an abort message
2572 * to the target. Coming up with all the code to
2573 * cook up scsi commands, special case them everywhere,
2574 * etc. is for questionable gain and it would be better
2575 * if the generic scsi error handling layer could do at
2576 * least some of that for us.
2578 * Anyways this is an area for potential future improvement
2584 spin_unlock_irqrestore(esp->host->host_lock, flags);
2586 if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
2587 spin_lock_irqsave(esp->host->host_lock, flags);
2588 ent->eh_done = NULL;
2589 spin_unlock_irqrestore(esp->host->host_lock, flags);
2597 spin_unlock_irqrestore(esp->host->host_lock, flags);
2601 /* XXX This might be a good location to set ESP_TGT_BROKEN
2602 * XXX since we know which target/lun in particular is
2603 * XXX causing trouble.
2605 spin_unlock_irqrestore(esp->host->host_lock, flags);
2609 static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
2611 struct esp *esp = shost_priv(cmd->device->host);
2612 struct completion eh_reset;
2613 unsigned long flags;
2615 init_completion(&eh_reset);
2617 spin_lock_irqsave(esp->host->host_lock, flags);
2619 esp->eh_reset = &eh_reset;
2621 /* XXX This is too simple... We should add lots of
2622 * XXX checks here so that if we find that the chip is
2623 * XXX very wedged we return failure immediately so
2624 * XXX that we can perform a full chip reset.
2626 esp->flags |= ESP_FLAG_RESETTING;
2627 scsi_esp_cmd(esp, ESP_CMD_RS);
2629 spin_unlock_irqrestore(esp->host->host_lock, flags);
2631 ssleep(esp_bus_reset_settle);
2633 if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
2634 spin_lock_irqsave(esp->host->host_lock, flags);
2635 esp->eh_reset = NULL;
2636 spin_unlock_irqrestore(esp->host->host_lock, flags);
2644 /* All bets are off, reset the entire device. */
2645 static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
2647 struct esp *esp = shost_priv(cmd->device->host);
2648 unsigned long flags;
2650 spin_lock_irqsave(esp->host->host_lock, flags);
2651 esp_bootup_reset(esp);
2652 esp_reset_cleanup(esp);
2653 spin_unlock_irqrestore(esp->host->host_lock, flags);
2655 ssleep(esp_bus_reset_settle);
2660 static const char *esp_info(struct Scsi_Host *host)
2665 struct scsi_host_template scsi_esp_template = {
2666 .module = THIS_MODULE,
2669 .queuecommand = esp_queuecommand,
2670 .target_alloc = esp_target_alloc,
2671 .target_destroy = esp_target_destroy,
2672 .slave_alloc = esp_slave_alloc,
2673 .slave_configure = esp_slave_configure,
2674 .slave_destroy = esp_slave_destroy,
2675 .eh_abort_handler = esp_eh_abort_handler,
2676 .eh_bus_reset_handler = esp_eh_bus_reset_handler,
2677 .eh_host_reset_handler = esp_eh_host_reset_handler,
2680 .sg_tablesize = SG_ALL,
2681 .max_sectors = 0xffff,
2682 .skip_settle_delay = 1,
2684 EXPORT_SYMBOL(scsi_esp_template);
2686 static void esp_get_signalling(struct Scsi_Host *host)
2688 struct esp *esp = shost_priv(host);
2689 enum spi_signal_type type;
2691 if (esp->flags & ESP_FLAG_DIFFERENTIAL)
2692 type = SPI_SIGNAL_HVD;
2694 type = SPI_SIGNAL_SE;
2696 spi_signalling(host) = type;
2699 static void esp_set_offset(struct scsi_target *target, int offset)
2701 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2702 struct esp *esp = shost_priv(host);
2703 struct esp_target_data *tp = &esp->target[target->id];
2705 if (esp->flags & ESP_FLAG_DISABLE_SYNC)
2706 tp->nego_goal_offset = 0;
2708 tp->nego_goal_offset = offset;
2709 tp->flags |= ESP_TGT_CHECK_NEGO;
2712 static void esp_set_period(struct scsi_target *target, int period)
2714 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2715 struct esp *esp = shost_priv(host);
2716 struct esp_target_data *tp = &esp->target[target->id];
2718 tp->nego_goal_period = period;
2719 tp->flags |= ESP_TGT_CHECK_NEGO;
2722 static void esp_set_width(struct scsi_target *target, int width)
2724 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2725 struct esp *esp = shost_priv(host);
2726 struct esp_target_data *tp = &esp->target[target->id];
2728 tp->nego_goal_width = (width ? 1 : 0);
2729 tp->flags |= ESP_TGT_CHECK_NEGO;
2732 static struct spi_function_template esp_transport_ops = {
2733 .set_offset = esp_set_offset,
2735 .set_period = esp_set_period,
2737 .set_width = esp_set_width,
2739 .get_signalling = esp_get_signalling,
2742 static int __init esp_init(void)
2744 BUILD_BUG_ON(sizeof(struct scsi_pointer) <
2745 sizeof(struct esp_cmd_priv));
2747 esp_transport_template = spi_attach_transport(&esp_transport_ops);
2748 if (!esp_transport_template)
2754 static void __exit esp_exit(void)
2756 spi_release_transport(esp_transport_template);
2759 MODULE_DESCRIPTION("ESP SCSI driver core");
2760 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
2761 MODULE_LICENSE("GPL");
2762 MODULE_VERSION(DRV_VERSION);
2764 module_param(esp_bus_reset_settle, int, 0);
2765 MODULE_PARM_DESC(esp_bus_reset_settle,
2766 "ESP scsi bus reset delay in seconds");
2768 module_param(esp_debug, int, 0);
2769 MODULE_PARM_DESC(esp_debug,
2770 "ESP bitmapped debugging message enable value:\n"
2771 " 0x00000001 Log interrupt events\n"
2772 " 0x00000002 Log scsi commands\n"
2773 " 0x00000004 Log resets\n"
2774 " 0x00000008 Log message in events\n"
2775 " 0x00000010 Log message out events\n"
2776 " 0x00000020 Log command completion\n"
2777 " 0x00000040 Log disconnects\n"
2778 " 0x00000080 Log data start\n"
2779 " 0x00000100 Log data done\n"
2780 " 0x00000200 Log reconnects\n"
2781 " 0x00000400 Log auto-sense data\n"
2784 module_init(esp_init);
2785 module_exit(esp_exit);
2787 #ifdef CONFIG_SCSI_ESP_PIO
2788 static inline unsigned int esp_wait_for_fifo(struct esp *esp)
2793 unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
2801 shost_printk(KERN_ERR, esp->host, "FIFO is empty. sreg [%02x]\n",
2802 esp_read8(ESP_STATUS));
2806 static inline int esp_wait_for_intr(struct esp *esp)
2811 esp->sreg = esp_read8(ESP_STATUS);
2812 if (esp->sreg & ESP_STAT_INTR)
2818 shost_printk(KERN_ERR, esp->host, "IRQ timeout. sreg [%02x]\n",
2823 #define ESP_FIFO_SIZE 16
2825 void esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
2826 u32 dma_count, int write, u8 cmd)
2828 u8 phase = esp->sreg & ESP_STAT_PMASK;
2830 cmd &= ~ESP_CMD_DMA;
2831 esp->send_cmd_error = 0;
2834 u8 *dst = (u8 *)addr;
2835 u8 mask = ~(phase == ESP_MIP ? ESP_INTR_FDONE : ESP_INTR_BSERV);
2837 scsi_esp_cmd(esp, cmd);
2840 if (!esp_wait_for_fifo(esp))
2843 *dst++ = readb(esp->fifo_reg);
2849 if (esp_wait_for_intr(esp)) {
2850 esp->send_cmd_error = 1;
2854 if ((esp->sreg & ESP_STAT_PMASK) != phase)
2857 esp->ireg = esp_read8(ESP_INTRPT);
2858 if (esp->ireg & mask) {
2859 esp->send_cmd_error = 1;
2863 if (phase == ESP_MIP)
2864 esp_write8(ESP_CMD_MOK, ESP_CMD);
2866 esp_write8(ESP_CMD_TI, ESP_CMD);
2869 unsigned int n = ESP_FIFO_SIZE;
2870 u8 *src = (u8 *)addr;
2872 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
2876 writesb(esp->fifo_reg, src, n);
2880 scsi_esp_cmd(esp, cmd);
2883 if (esp_wait_for_intr(esp)) {
2884 esp->send_cmd_error = 1;
2888 if ((esp->sreg & ESP_STAT_PMASK) != phase)
2891 esp->ireg = esp_read8(ESP_INTRPT);
2892 if (esp->ireg & ~ESP_INTR_BSERV) {
2893 esp->send_cmd_error = 1;
2898 (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
2902 writesb(esp->fifo_reg, src, n);
2906 esp_write8(ESP_CMD_TI, ESP_CMD);
2910 esp->send_cmd_residual = esp_count;
2912 EXPORT_SYMBOL(esp_send_pio_cmd);