drivers/scsi/arcmsr/arcmsr_hba.c

   1 /*
   2 *******************************************************************************
   3 **        O.S   : Linux
   4 **   FILE NAME  : arcmsr_hba.c
   5 **        BY    : Nick Cheng, C.L. Huang
   6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
   7 *******************************************************************************
   8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
   9 **
  10 **     Web site: www.areca.com.tw
  11 **       E-mail: support@areca.com.tw
  12 **
  13 ** This program is free software; you can redistribute it and/or modify
  14 ** it under the terms of the GNU General Public License version 2 as
  15 ** published by the Free Software Foundation.
  16 ** This program is distributed in the hope that it will be useful,
  17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 ** GNU General Public License for more details.
  20 *******************************************************************************
  21 ** Redistribution and use in source and binary forms, with or without
  22 ** modification, are permitted provided that the following conditions
  23 ** are met:
  24 ** 1. Redistributions of source code must retain the above copyright
  25 **    notice, this list of conditions and the following disclaimer.
  26 ** 2. Redistributions in binary form must reproduce the above copyright
  27 **    notice, this list of conditions and the following disclaimer in the
  28 **    documentation and/or other materials provided with the distribution.
  29 ** 3. The name of the author may not be used to endorse or promote products
  30 **    derived from this software without specific prior written permission.
  31 **
  32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 *******************************************************************************
  43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.rst
  45 *******************************************************************************
  46 */
  47 #include <linux/module.h>
  48 #include <linux/reboot.h>
  49 #include <linux/spinlock.h>
  50 #include <linux/pci_ids.h>
  51 #include <linux/interrupt.h>
  52 #include <linux/moduleparam.h>
  53 #include <linux/errno.h>
  54 #include <linux/types.h>
  55 #include <linux/delay.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/timer.h>
  58 #include <linux/slab.h>
  59 #include <linux/pci.h>
  60 #include <linux/circ_buf.h>
  61 #include <asm/dma.h>
  62 #include <asm/io.h>
  63 #include <linux/uaccess.h>
  64 #include <scsi/scsi_host.h>
  65 #include <scsi/scsi.h>
  66 #include <scsi/scsi_cmnd.h>
  67 #include <scsi/scsi_tcq.h>
  68 #include <scsi/scsi_device.h>
  69 #include <scsi/scsi_transport.h>
  70 #include <scsi/scsicam.h>
  71 #include "arcmsr.h"
  72 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
  73 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
  74 MODULE_LICENSE("Dual BSD/GPL");
  75 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  76
  77 static int msix_enable = 1;
  78 module_param(msix_enable, int, S_IRUGO);
  79 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
  80
  81 static int msi_enable = 1;
  82 module_param(msi_enable, int, S_IRUGO);
  83 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
  84
  85 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
  86 module_param(host_can_queue, int, S_IRUGO);
  87 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
  88
  89 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
  90 module_param(cmd_per_lun, int, S_IRUGO);
  91 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
  92
  93 static int dma_mask_64 = 0;
  94 module_param(dma_mask_64, int, S_IRUGO);
  95 MODULE_PARM_DESC(dma_mask_64, " set DMA mask to 64 bits(0 ~ 1), dma_mask_64=1(64 bits), =0(32 bits)");
  96
  97 static int set_date_time = 0;
  98 module_param(set_date_time, int, S_IRUGO);
  99 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
 100
 101 static int cmd_timeout = ARCMSR_DEFAULT_TIMEOUT;
 102 module_param(cmd_timeout, int, S_IRUGO);
 103 MODULE_PARM_DESC(cmd_timeout, " scsi cmd timeout(0 ~ 120 sec.), default is 90");
 104
 105 #define ARCMSR_SLEEPTIME        10
 106 #define ARCMSR_RETRYCOUNT       12
 107
 108 static wait_queue_head_t wait_q;
 109 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 110                                         struct scsi_cmnd *cmd);
 111 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 112 static int arcmsr_abort(struct scsi_cmnd *);
 113 static int arcmsr_bus_reset(struct scsi_cmnd *);
 114 static int arcmsr_bios_param(struct scsi_device *sdev,
 115                 struct block_device *bdev, sector_t capacity, int *info);
 116 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 117 static int arcmsr_probe(struct pci_dev *pdev,
 118                                 const struct pci_device_id *id);
 119 static int __maybe_unused arcmsr_suspend(struct device *dev);
 120 static int __maybe_unused arcmsr_resume(struct device *dev);
 121 static void arcmsr_remove(struct pci_dev *pdev);
 122 static void arcmsr_shutdown(struct pci_dev *pdev);
 123 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 124 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 125 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 126 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
 127         u32 intmask_org);
 128 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
 129 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
 130 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
 131 static void arcmsr_request_device_map(struct timer_list *t);
 132 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
 133 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
 134 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
 135 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
 136 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
 137 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
 138 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
 139 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb);
 140 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
 141 static const char *arcmsr_info(struct Scsi_Host *);
 142 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
 143 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
 144 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
 145 static void arcmsr_set_iop_datetime(struct timer_list *);
 146 static int arcmsr_slave_config(struct scsi_device *sdev);
 147 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
 148 {
 149         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
 150                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
 151         return scsi_change_queue_depth(sdev, queue_depth);
 152 }
 153
 154 static const struct scsi_host_template arcmsr_scsi_host_template = {
 155         .module                 = THIS_MODULE,
 156         .proc_name              = ARCMSR_NAME,
 157         .name                   = "Areca SAS/SATA RAID driver",
 158         .info                   = arcmsr_info,
 159         .queuecommand           = arcmsr_queue_command,
 160         .eh_abort_handler       = arcmsr_abort,
 161         .eh_bus_reset_handler   = arcmsr_bus_reset,
 162         .bios_param             = arcmsr_bios_param,
 163         .slave_configure        = arcmsr_slave_config,
 164         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
 165         .can_queue              = ARCMSR_DEFAULT_OUTSTANDING_CMD,
 166         .this_id                = ARCMSR_SCSI_INITIATOR_ID,
 167         .sg_tablesize           = ARCMSR_DEFAULT_SG_ENTRIES,
 168         .max_sectors            = ARCMSR_MAX_XFER_SECTORS_C,
 169         .cmd_per_lun            = ARCMSR_DEFAULT_CMD_PERLUN,
 170         .shost_groups           = arcmsr_host_groups,
 171         .no_write_same          = 1,
 172 };
 173
 174 static struct pci_device_id arcmsr_device_id_table[] = {
 175         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
 176                 .driver_data = ACB_ADAPTER_TYPE_A},
 177         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
 178                 .driver_data = ACB_ADAPTER_TYPE_A},
 179         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
 180                 .driver_data = ACB_ADAPTER_TYPE_A},
 181         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
 182                 .driver_data = ACB_ADAPTER_TYPE_A},
 183         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
 184                 .driver_data = ACB_ADAPTER_TYPE_A},
 185         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
 186                 .driver_data = ACB_ADAPTER_TYPE_B},
 187         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
 188                 .driver_data = ACB_ADAPTER_TYPE_B},
 189         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
 190                 .driver_data = ACB_ADAPTER_TYPE_B},
 191         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
 192                 .driver_data = ACB_ADAPTER_TYPE_B},
 193         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
 194                 .driver_data = ACB_ADAPTER_TYPE_A},
 195         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
 196                 .driver_data = ACB_ADAPTER_TYPE_D},
 197         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
 198                 .driver_data = ACB_ADAPTER_TYPE_A},
 199         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
 200                 .driver_data = ACB_ADAPTER_TYPE_A},
 201         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
 202                 .driver_data = ACB_ADAPTER_TYPE_A},
 203         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
 204                 .driver_data = ACB_ADAPTER_TYPE_A},
 205         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
 206                 .driver_data = ACB_ADAPTER_TYPE_A},
 207         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
 208                 .driver_data = ACB_ADAPTER_TYPE_A},
 209         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
 210                 .driver_data = ACB_ADAPTER_TYPE_A},
 211         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
 212                 .driver_data = ACB_ADAPTER_TYPE_A},
 213         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
 214                 .driver_data = ACB_ADAPTER_TYPE_A},
 215         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
 216                 .driver_data = ACB_ADAPTER_TYPE_C},
 217         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1883),
 218                 .driver_data = ACB_ADAPTER_TYPE_C},
 219         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
 220                 .driver_data = ACB_ADAPTER_TYPE_E},
 221         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886_0),
 222                 .driver_data = ACB_ADAPTER_TYPE_F},
 223         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886),
 224                 .driver_data = ACB_ADAPTER_TYPE_F},
 225         {0, 0}, /* Terminating entry */
 226 };
 227 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
 228
 229 static SIMPLE_DEV_PM_OPS(arcmsr_pm_ops, arcmsr_suspend, arcmsr_resume);
 230
 231 static struct pci_driver arcmsr_pci_driver = {
 232         .name                   = "arcmsr",
 233         .id_table               = arcmsr_device_id_table,
 234         .probe                  = arcmsr_probe,
 235         .remove                 = arcmsr_remove,
 236         .driver.pm              = &arcmsr_pm_ops,
 237         .shutdown               = arcmsr_shutdown,
 238 };
 239 /*
 240 ****************************************************************************
 241 ****************************************************************************
 242 */
 243
 244 static void arcmsr_free_io_queue(struct AdapterControlBlock *acb)
 245 {
 246         switch (acb->adapter_type) {
 247         case ACB_ADAPTER_TYPE_B:
 248         case ACB_ADAPTER_TYPE_D:
 249         case ACB_ADAPTER_TYPE_E:
 250         case ACB_ADAPTER_TYPE_F:
 251                 dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,
 252                         acb->dma_coherent2, acb->dma_coherent_handle2);
 253                 break;
 254         }
 255 }
 256
 257 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
 258 {
 259         struct pci_dev *pdev = acb->pdev;
 260         switch (acb->adapter_type){
 261         case ACB_ADAPTER_TYPE_A:{
 262                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
 263                 if (!acb->pmuA) {
 264                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 265                         return false;
 266                 }
 267                 break;
 268         }
 269         case ACB_ADAPTER_TYPE_B:{
 270                 void __iomem *mem_base0, *mem_base1;
 271                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 272                 if (!mem_base0) {
 273                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 274                         return false;
 275                 }
 276                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
 277                 if (!mem_base1) {
 278                         iounmap(mem_base0);
 279                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 280                         return false;
 281                 }
 282                 acb->mem_base0 = mem_base0;
 283                 acb->mem_base1 = mem_base1;
 284                 break;
 285         }
 286         case ACB_ADAPTER_TYPE_C:{
 287                 acb->pmuC = ioremap(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
 288                 if (!acb->pmuC) {
 289                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 290                         return false;
 291                 }
 292                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 293                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
 294                         return true;
 295                 }
 296                 break;
 297         }
 298         case ACB_ADAPTER_TYPE_D: {
 299                 void __iomem *mem_base0;
 300                 unsigned long addr, range;
 301
 302                 addr = (unsigned long)pci_resource_start(pdev, 0);
 303                 range = pci_resource_len(pdev, 0);
 304                 mem_base0 = ioremap(addr, range);
 305                 if (!mem_base0) {
 306                         pr_notice("arcmsr%d: memory mapping region fail\n",
 307                                 acb->host->host_no);
 308                         return false;
 309                 }
 310                 acb->mem_base0 = mem_base0;
 311                 break;
 312                 }
 313         case ACB_ADAPTER_TYPE_E: {
 314                 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
 315                         pci_resource_len(pdev, 1));
 316                 if (!acb->pmuE) {
 317                         pr_notice("arcmsr%d: memory mapping region fail \n",
 318                                 acb->host->host_no);
 319                         return false;
 320                 }
 321                 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
 322                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);       /* synchronize doorbell to 0 */
 323                 acb->in_doorbell = 0;
 324                 acb->out_doorbell = 0;
 325                 break;
 326                 }
 327         case ACB_ADAPTER_TYPE_F: {
 328                 acb->pmuF = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 329                 if (!acb->pmuF) {
 330                         pr_notice("arcmsr%d: memory mapping region fail\n",
 331                                 acb->host->host_no);
 332                         return false;
 333                 }
 334                 writel(0, &acb->pmuF->host_int_status); /* clear interrupt */
 335                 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
 336                 acb->in_doorbell = 0;
 337                 acb->out_doorbell = 0;
 338                 break;
 339                 }
 340         }
 341         return true;
 342 }
 343
 344 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
 345 {
 346         switch (acb->adapter_type) {
 347         case ACB_ADAPTER_TYPE_A:
 348                 iounmap(acb->pmuA);
 349                 break;
 350         case ACB_ADAPTER_TYPE_B:
 351                 iounmap(acb->mem_base0);
 352                 iounmap(acb->mem_base1);
 353                 break;
 354         case ACB_ADAPTER_TYPE_C:
 355                 iounmap(acb->pmuC);
 356                 break;
 357         case ACB_ADAPTER_TYPE_D:
 358                 iounmap(acb->mem_base0);
 359                 break;
 360         case ACB_ADAPTER_TYPE_E:
 361                 iounmap(acb->pmuE);
 362                 break;
 363         case ACB_ADAPTER_TYPE_F:
 364                 iounmap(acb->pmuF);
 365                 break;
 366         }
 367 }
 368
 369 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
 370 {
 371         irqreturn_t handle_state;
 372         struct AdapterControlBlock *acb = dev_id;
 373
 374         handle_state = arcmsr_interrupt(acb);
 375         return handle_state;
 376 }
 377
 378 static int arcmsr_bios_param(struct scsi_device *sdev,
 379                 struct block_device *bdev, sector_t capacity, int *geom)
 380 {
 381         int heads, sectors, cylinders, total_capacity;
 382
 383         if (scsi_partsize(bdev, capacity, geom))
 384                 return 0;
 385
 386         total_capacity = capacity;
 387         heads = 64;
 388         sectors = 32;
 389         cylinders = total_capacity / (heads * sectors);
 390         if (cylinders > 1024) {
 391                 heads = 255;
 392                 sectors = 63;
 393                 cylinders = total_capacity / (heads * sectors);
 394         }
 395         geom[0] = heads;
 396         geom[1] = sectors;
 397         geom[2] = cylinders;
 398         return 0;
 399 }
 400
 401 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
 402 {
 403         struct MessageUnit_A __iomem *reg = acb->pmuA;
 404         int i;
 405
 406         for (i = 0; i < 2000; i++) {
 407                 if (readl(&reg->outbound_intstatus) &
 408                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
 409                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
 410                                 &reg->outbound_intstatus);
 411                         return true;
 412                 }
 413                 msleep(10);
 414         } /* max 20 seconds */
 415
 416         return false;
 417 }
 418
 419 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
 420 {
 421         struct MessageUnit_B *reg = acb->pmuB;
 422         int i;
 423
 424         for (i = 0; i < 2000; i++) {
 425                 if (readl(reg->iop2drv_doorbell)
 426                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
 427                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
 428                                         reg->iop2drv_doorbell);
 429                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
 430                                         reg->drv2iop_doorbell);
 431                         return true;
 432                 }
 433                 msleep(10);
 434         } /* max 20 seconds */
 435
 436         return false;
 437 }
 438
 439 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
 440 {
 441         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
 442         int i;
 443
 444         for (i = 0; i < 2000; i++) {
 445                 if (readl(&phbcmu->outbound_doorbell)
 446                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 447                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
 448                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
 449                         return true;
 450                 }
 451                 msleep(10);
 452         } /* max 20 seconds */
 453
 454         return false;
 455 }
 456
 457 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
 458 {
 459         struct MessageUnit_D *reg = pACB->pmuD;
 460         int i;
 461
 462         for (i = 0; i < 2000; i++) {
 463                 if (readl(reg->outbound_doorbell)
 464                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
 465                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
 466                                 reg->outbound_doorbell);
 467                         return true;
 468                 }
 469                 msleep(10);
 470         } /* max 20 seconds */
 471         return false;
 472 }
 473
 474 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
 475 {
 476         int i;
 477         uint32_t read_doorbell;
 478         struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
 479
 480         for (i = 0; i < 2000; i++) {
 481                 read_doorbell = readl(&phbcmu->iobound_doorbell);
 482                 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
 483                         writel(0, &phbcmu->host_int_status); /*clear interrupt*/
 484                         pACB->in_doorbell = read_doorbell;
 485                         return true;
 486                 }
 487                 msleep(10);
 488         } /* max 20 seconds */
 489         return false;
 490 }
 491
 492 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
 493 {
 494         struct MessageUnit_A __iomem *reg = acb->pmuA;
 495         int retry_count = 30;
 496         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 497         do {
 498                 if (arcmsr_hbaA_wait_msgint_ready(acb))
 499                         break;
 500                 else {
 501                         retry_count--;
 502                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 503                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
 504                 }
 505         } while (retry_count != 0);
 506 }
 507
 508 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
 509 {
 510         struct MessageUnit_B *reg = acb->pmuB;
 511         int retry_count = 30;
 512         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
 513         do {
 514                 if (arcmsr_hbaB_wait_msgint_ready(acb))
 515                         break;
 516                 else {
 517                         retry_count--;
 518                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 519                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
 520                 }
 521         } while (retry_count != 0);
 522 }
 523
 524 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
 525 {
 526         struct MessageUnit_C __iomem *reg = pACB->pmuC;
 527         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
 528         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 529         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
 530         do {
 531                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
 532                         break;
 533                 } else {
 534                         retry_count--;
 535                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 536                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
 537                 }
 538         } while (retry_count != 0);
 539         return;
 540 }
 541
 542 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
 543 {
 544         int retry_count = 15;
 545         struct MessageUnit_D *reg = pACB->pmuD;
 546
 547         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
 548         do {
 549                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
 550                         break;
 551
 552                 retry_count--;
 553                 pr_notice("arcmsr%d: wait 'flush adapter "
 554                         "cache' timeout, retry count down = %d\n",
 555                         pACB->host->host_no, retry_count);
 556         } while (retry_count != 0);
 557 }
 558
 559 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
 560 {
 561         int retry_count = 30;
 562         struct MessageUnit_E __iomem *reg = pACB->pmuE;
 563
 564         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 565         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
 566         writel(pACB->out_doorbell, &reg->iobound_doorbell);
 567         do {
 568                 if (arcmsr_hbaE_wait_msgint_ready(pACB))
 569                         break;
 570                 retry_count--;
 571                 pr_notice("arcmsr%d: wait 'flush adapter "
 572                         "cache' timeout, retry count down = %d\n",
 573                         pACB->host->host_no, retry_count);
 574         } while (retry_count != 0);
 575 }
 576
 577 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
 578 {
 579         switch (acb->adapter_type) {
 580
 581         case ACB_ADAPTER_TYPE_A:
 582                 arcmsr_hbaA_flush_cache(acb);
 583                 break;
 584         case ACB_ADAPTER_TYPE_B:
 585                 arcmsr_hbaB_flush_cache(acb);
 586                 break;
 587         case ACB_ADAPTER_TYPE_C:
 588                 arcmsr_hbaC_flush_cache(acb);
 589                 break;
 590         case ACB_ADAPTER_TYPE_D:
 591                 arcmsr_hbaD_flush_cache(acb);
 592                 break;
 593         case ACB_ADAPTER_TYPE_E:
 594         case ACB_ADAPTER_TYPE_F:
 595                 arcmsr_hbaE_flush_cache(acb);
 596                 break;
 597         }
 598 }
 599
 600 static void arcmsr_hbaB_assign_regAddr(struct AdapterControlBlock *acb)
 601 {
 602         struct MessageUnit_B *reg = acb->pmuB;
 603
 604         if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
 605                 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
 606                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
 607                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
 608                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
 609         } else {
 610                 reg->drv2iop_doorbell= MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
 611                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
 612                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
 613                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
 614         }
 615         reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
 616         reg->message_rbuffer =  MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
 617         reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
 618 }
 619
 620 static void arcmsr_hbaD_assign_regAddr(struct AdapterControlBlock *acb)
 621 {
 622         struct MessageUnit_D *reg = acb->pmuD;
 623
 624         reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
 625         reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
 626         reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
 627         reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
 628         reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
 629         reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
 630         reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
 631         reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
 632         reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
 633         reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
 634         reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
 635         reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
 636         reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
 637         reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
 638         reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
 639         reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
 640         reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
 641         reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
 642         reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
 643         reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
 644         reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
 645         reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
 646         reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
 647         reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
 648         reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
 649         reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
 650 }
 651
 652 static void arcmsr_hbaF_assign_regAddr(struct AdapterControlBlock *acb)
 653 {
 654         dma_addr_t host_buffer_dma;
 655         struct MessageUnit_F __iomem *pmuF;
 656
 657         memset(acb->dma_coherent2, 0xff, acb->completeQ_size);
 658         acb->message_wbuffer = (uint32_t *)round_up((unsigned long)acb->dma_coherent2 +
 659                 acb->completeQ_size, 4);
 660         acb->message_rbuffer = ((void *)acb->message_wbuffer) + 0x100;
 661         acb->msgcode_rwbuffer = ((void *)acb->message_wbuffer) + 0x200;
 662         memset((void *)acb->message_wbuffer, 0, MESG_RW_BUFFER_SIZE);
 663         host_buffer_dma = round_up(acb->dma_coherent_handle2 + acb->completeQ_size, 4);
 664         pmuF = acb->pmuF;
 665         /* host buffer low address, bit0:1 all buffer active */
 666         writel(lower_32_bits(host_buffer_dma | 1), &pmuF->inbound_msgaddr0);
 667         /* host buffer high address */
 668         writel(upper_32_bits(host_buffer_dma), &pmuF->inbound_msgaddr1);
 669         /* set host buffer physical address */
 670         writel(ARCMSR_HBFMU_DOORBELL_SYNC1, &pmuF->iobound_doorbell);
 671 }
 672
 673 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
 674 {
 675         bool rtn = true;
 676         void *dma_coherent;
 677         dma_addr_t dma_coherent_handle;
 678         struct pci_dev *pdev = acb->pdev;
 679
 680         switch (acb->adapter_type) {
 681         case ACB_ADAPTER_TYPE_B: {
 682                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_B), 32);
 683                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 684                         &dma_coherent_handle, GFP_KERNEL);
 685                 if (!dma_coherent) {
 686                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 687                         return false;
 688                 }
 689                 acb->dma_coherent_handle2 = dma_coherent_handle;
 690                 acb->dma_coherent2 = dma_coherent;
 691                 acb->pmuB = (struct MessageUnit_B *)dma_coherent;
 692                 arcmsr_hbaB_assign_regAddr(acb);
 693                 }
 694                 break;
 695         case ACB_ADAPTER_TYPE_D: {
 696                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_D), 32);
 697                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 698                         &dma_coherent_handle, GFP_KERNEL);
 699                 if (!dma_coherent) {
 700                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 701                         return false;
 702                 }
 703                 acb->dma_coherent_handle2 = dma_coherent_handle;
 704                 acb->dma_coherent2 = dma_coherent;
 705                 acb->pmuD = (struct MessageUnit_D *)dma_coherent;
 706                 arcmsr_hbaD_assign_regAddr(acb);
 707                 }
 708                 break;
 709         case ACB_ADAPTER_TYPE_E: {
 710                 uint32_t completeQ_size;
 711                 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
 712                 acb->ioqueue_size = roundup(completeQ_size, 32);
 713                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 714                         &dma_coherent_handle, GFP_KERNEL);
 715                 if (!dma_coherent){
 716                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 717                         return false;
 718                 }
 719                 acb->dma_coherent_handle2 = dma_coherent_handle;
 720                 acb->dma_coherent2 = dma_coherent;
 721                 acb->pCompletionQ = dma_coherent;
 722                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 723                 acb->doneq_index = 0;
 724                 }
 725                 break;
 726         case ACB_ADAPTER_TYPE_F: {
 727                 uint32_t QueueDepth;
 728                 uint32_t depthTbl[] = {256, 512, 1024, 128, 64, 32};
 729
 730                 arcmsr_wait_firmware_ready(acb);
 731                 QueueDepth = depthTbl[readl(&acb->pmuF->outbound_msgaddr1) & 7];
 732                 acb->completeQ_size = sizeof(struct deliver_completeQ) * QueueDepth + 128;
 733                 acb->ioqueue_size = roundup(acb->completeQ_size + MESG_RW_BUFFER_SIZE, 32);
 734                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 735                         &dma_coherent_handle, GFP_KERNEL);
 736                 if (!dma_coherent) {
 737                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 738                         return false;
 739                 }
 740                 acb->dma_coherent_handle2 = dma_coherent_handle;
 741                 acb->dma_coherent2 = dma_coherent;
 742                 acb->pCompletionQ = dma_coherent;
 743                 acb->completionQ_entry = acb->completeQ_size / sizeof(struct deliver_completeQ);
 744                 acb->doneq_index = 0;
 745                 arcmsr_hbaF_assign_regAddr(acb);
 746                 }
 747                 break;
 748         default:
 749                 break;
 750         }
 751         return rtn;
 752 }
 753
 754 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
 755 {
 756         struct pci_dev *pdev = acb->pdev;
 757         void *dma_coherent;
 758         dma_addr_t dma_coherent_handle;
 759         struct CommandControlBlock *ccb_tmp;
 760         int i = 0, j = 0;
 761         unsigned long cdb_phyaddr, next_ccb_phy;
 762         unsigned long roundup_ccbsize;
 763         unsigned long max_xfer_len;
 764         unsigned long max_sg_entrys;
 765         uint32_t  firm_config_version, curr_phy_upper32;
 766
 767         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
 768                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
 769                         acb->devstate[i][j] = ARECA_RAID_GONE;
 770
 771         max_xfer_len = ARCMSR_MAX_XFER_LEN;
 772         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
 773         firm_config_version = acb->firm_cfg_version;
 774         if((firm_config_version & 0xFF) >= 3){
 775                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
 776                 max_sg_entrys = (max_xfer_len/4096);
 777         }
 778         acb->host->max_sectors = max_xfer_len/512;
 779         acb->host->sg_tablesize = max_sg_entrys;
 780         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
 781         acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
 782         if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
 783                 acb->uncache_size += acb->ioqueue_size;
 784         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
 785         if(!dma_coherent){
 786                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
 787                 return -ENOMEM;
 788         }
 789         acb->dma_coherent = dma_coherent;
 790         acb->dma_coherent_handle = dma_coherent_handle;
 791         memset(dma_coherent, 0, acb->uncache_size);
 792         acb->ccbsize = roundup_ccbsize;
 793         ccb_tmp = dma_coherent;
 794         curr_phy_upper32 = upper_32_bits(dma_coherent_handle);
 795         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
 796         for(i = 0; i < acb->maxFreeCCB; i++){
 797                 cdb_phyaddr = (unsigned long)dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
 798                 switch (acb->adapter_type) {
 799                 case ACB_ADAPTER_TYPE_A:
 800                 case ACB_ADAPTER_TYPE_B:
 801                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
 802                         break;
 803                 case ACB_ADAPTER_TYPE_C:
 804                 case ACB_ADAPTER_TYPE_D:
 805                 case ACB_ADAPTER_TYPE_E:
 806                 case ACB_ADAPTER_TYPE_F:
 807                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
 808                         break;
 809                 }
 810                 acb->pccb_pool[i] = ccb_tmp;
 811                 ccb_tmp->acb = acb;
 812                 ccb_tmp->smid = (u32)i << 16;
 813                 INIT_LIST_HEAD(&ccb_tmp->list);
 814                 next_ccb_phy = dma_coherent_handle + roundup_ccbsize;
 815                 if (upper_32_bits(next_ccb_phy) != curr_phy_upper32) {
 816                         acb->maxFreeCCB = i;
 817                         acb->host->can_queue = i;
 818                         break;
 819                 }
 820                 else
 821                         list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
 822                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
 823                 dma_coherent_handle = next_ccb_phy;
 824         }
 825         if (acb->adapter_type != ACB_ADAPTER_TYPE_F) {
 826                 acb->dma_coherent_handle2 = dma_coherent_handle;
 827                 acb->dma_coherent2 = ccb_tmp;
 828         }
 829         switch (acb->adapter_type) {
 830         case ACB_ADAPTER_TYPE_B:
 831                 acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;
 832                 arcmsr_hbaB_assign_regAddr(acb);
 833                 break;
 834         case ACB_ADAPTER_TYPE_D:
 835                 acb->pmuD = (struct MessageUnit_D *)acb->dma_coherent2;
 836                 arcmsr_hbaD_assign_regAddr(acb);
 837                 break;
 838         case ACB_ADAPTER_TYPE_E:
 839                 acb->pCompletionQ = acb->dma_coherent2;
 840                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 841                 acb->doneq_index = 0;
 842                 break;
 843         }
 844         return 0;
 845 }
 846
 847 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
 848 {
 849         struct AdapterControlBlock *acb = container_of(work,
 850                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
 851         char *acb_dev_map = (char *)acb->device_map;
 852         uint32_t __iomem *signature = NULL;
 853         char __iomem *devicemap = NULL;
 854         int target, lun;
 855         struct scsi_device *psdev;
 856         char diff, temp;
 857
 858         switch (acb->adapter_type) {
 859         case ACB_ADAPTER_TYPE_A: {
 860                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
 861
 862                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 863                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 864                 break;
 865         }
 866         case ACB_ADAPTER_TYPE_B: {
 867                 struct MessageUnit_B *reg  = acb->pmuB;
 868
 869                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 870                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 871                 break;
 872         }
 873         case ACB_ADAPTER_TYPE_C: {
 874                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
 875
 876                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 877                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 878                 break;
 879         }
 880         case ACB_ADAPTER_TYPE_D: {
 881                 struct MessageUnit_D *reg  = acb->pmuD;
 882
 883                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 884                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 885                 break;
 886         }
 887         case ACB_ADAPTER_TYPE_E: {
 888                 struct MessageUnit_E __iomem *reg  = acb->pmuE;
 889
 890                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 891                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 892                 break;
 893                 }
 894         case ACB_ADAPTER_TYPE_F: {
 895                 signature = (uint32_t __iomem *)(&acb->msgcode_rwbuffer[0]);
 896                 devicemap = (char __iomem *)(&acb->msgcode_rwbuffer[21]);
 897                 break;
 898                 }
 899         }
 900         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
 901                 return;
 902         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
 903                 target++) {
 904                 temp = readb(devicemap);
 905                 diff = (*acb_dev_map) ^ temp;
 906                 if (diff != 0) {
 907                         *acb_dev_map = temp;
 908                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
 909                                 lun++) {
 910                                 if ((diff & 0x01) == 1 &&
 911                                         (temp & 0x01) == 1) {
 912                                         scsi_add_device(acb->host,
 913                                                 0, target, lun);
 914                                 } else if ((diff & 0x01) == 1
 915                                         && (temp & 0x01) == 0) {
 916                                         psdev = scsi_device_lookup(acb->host,
 917                                                 0, target, lun);
 918                                         if (psdev != NULL) {
 919                                                 scsi_remove_device(psdev);
 920                                                 scsi_device_put(psdev);
 921                                         }
 922                                 }
 923                                 temp >>= 1;
 924                                 diff >>= 1;
 925                         }
 926                 }
 927                 devicemap++;
 928                 acb_dev_map++;
 929         }
 930         acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
 931 }
 932
 933 static int
 934 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
 935 {
 936         unsigned long flags;
 937         int nvec, i;
 938
 939         if (msix_enable == 0)
 940                 goto msi_int0;
 941         nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
 942                         PCI_IRQ_MSIX);
 943         if (nvec > 0) {
 944                 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
 945                 flags = 0;
 946         } else {
 947 msi_int0:
 948                 if (msi_enable == 1) {
 949                         nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
 950                         if (nvec == 1) {
 951                                 dev_info(&pdev->dev, "msi enabled\n");
 952                                 goto msi_int1;
 953                         }
 954                 }
 955                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
 956                 if (nvec < 1)
 957                         return FAILED;
 958 msi_int1:
 959                 flags = IRQF_SHARED;
 960         }
 961
 962         acb->vector_count = nvec;
 963         for (i = 0; i < nvec; i++) {
 964                 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
 965                                 flags, "arcmsr", acb)) {
 966                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
 967                                 acb->host->host_no, pci_irq_vector(pdev, i));
 968                         goto out_free_irq;
 969                 }
 970         }
 971
 972         return SUCCESS;
 973 out_free_irq:
 974         while (--i >= 0)
 975                 free_irq(pci_irq_vector(pdev, i), acb);
 976         pci_free_irq_vectors(pdev);
 977         return FAILED;
 978 }
 979
 980 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
 981 {
 982         INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
 983         pacb->fw_flag = FW_NORMAL;
 984         timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
 985         pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
 986         add_timer(&pacb->eternal_timer);
 987 }
 988
 989 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
 990 {
 991         timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
 992         pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
 993         add_timer(&pacb->refresh_timer);
 994 }
 995
 996 static int arcmsr_set_dma_mask(struct AdapterControlBlock *acb)
 997 {
 998         struct pci_dev *pcidev = acb->pdev;
 999
1000         if (IS_DMA64) {
1001                 if (((acb->adapter_type == ACB_ADAPTER_TYPE_A) && !dma_mask_64) ||
1002                     dma_set_mask(&pcidev->dev, DMA_BIT_MASK(64)))
1003                         goto    dma32;
1004                 if (acb->adapter_type <= ACB_ADAPTER_TYPE_B)
1005                         return 0;
1006                 if (dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(64)) ||
1007                     dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(64))) {
1008                         printk("arcmsr: set DMA 64 mask failed\n");
1009                         return -ENXIO;
1010                 }
1011         } else {
1012 dma32:
1013                 if (dma_set_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1014                     dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1015                     dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32))) {
1016                         printk("arcmsr: set DMA 32-bit mask failed\n");
1017                         return -ENXIO;
1018                 }
1019         }
1020         return 0;
1021 }
1022
1023 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1024 {
1025         struct Scsi_Host *host;
1026         struct AdapterControlBlock *acb;
1027         uint8_t bus,dev_fun;
1028         int error;
1029         error = pci_enable_device(pdev);
1030         if(error){
1031                 return -ENODEV;
1032         }
1033         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
1034         if(!host){
1035                 goto pci_disable_dev;
1036         }
1037         init_waitqueue_head(&wait_q);
1038         bus = pdev->bus->number;
1039         dev_fun = pdev->devfn;
1040         acb = (struct AdapterControlBlock *) host->hostdata;
1041         memset(acb,0,sizeof(struct AdapterControlBlock));
1042         acb->pdev = pdev;
1043         acb->adapter_type = id->driver_data;
1044         if (arcmsr_set_dma_mask(acb))
1045                 goto scsi_host_release;
1046         acb->host = host;
1047         host->max_lun = ARCMSR_MAX_TARGETLUN;
1048         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
1049         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
1050         if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
1051                 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
1052         host->can_queue = host_can_queue;       /* max simultaneous cmds */
1053         if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
1054                 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
1055         host->cmd_per_lun = cmd_per_lun;
1056         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
1057         host->unique_id = (bus << 8) | dev_fun;
1058         pci_set_drvdata(pdev, host);
1059         pci_set_master(pdev);
1060         error = pci_request_regions(pdev, "arcmsr");
1061         if(error){
1062                 goto scsi_host_release;
1063         }
1064         spin_lock_init(&acb->eh_lock);
1065         spin_lock_init(&acb->ccblist_lock);
1066         spin_lock_init(&acb->postq_lock);
1067         spin_lock_init(&acb->doneq_lock);
1068         spin_lock_init(&acb->rqbuffer_lock);
1069         spin_lock_init(&acb->wqbuffer_lock);
1070         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1071                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
1072                         ACB_F_MESSAGE_WQBUFFER_READED);
1073         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
1074         INIT_LIST_HEAD(&acb->ccb_free_list);
1075         error = arcmsr_remap_pciregion(acb);
1076         if(!error){
1077                 goto pci_release_regs;
1078         }
1079         error = arcmsr_alloc_io_queue(acb);
1080         if (!error)
1081                 goto unmap_pci_region;
1082         error = arcmsr_get_firmware_spec(acb);
1083         if(!error){
1084                 goto free_hbb_mu;
1085         }
1086         if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
1087                 arcmsr_free_io_queue(acb);
1088         error = arcmsr_alloc_ccb_pool(acb);
1089         if(error){
1090                 goto unmap_pci_region;
1091         }
1092         error = scsi_add_host(host, &pdev->dev);
1093         if(error){
1094                 goto free_ccb_pool;
1095         }
1096         if (arcmsr_request_irq(pdev, acb) == FAILED)
1097                 goto scsi_host_remove;
1098         arcmsr_iop_init(acb);
1099         arcmsr_init_get_devmap_timer(acb);
1100         if (set_date_time)
1101                 arcmsr_init_set_datetime_timer(acb);
1102         if(arcmsr_alloc_sysfs_attr(acb))
1103                 goto out_free_sysfs;
1104         scsi_scan_host(host);
1105         return 0;
1106 out_free_sysfs:
1107         if (set_date_time)
1108                 del_timer_sync(&acb->refresh_timer);
1109         del_timer_sync(&acb->eternal_timer);
1110         flush_work(&acb->arcmsr_do_message_isr_bh);
1111         arcmsr_stop_adapter_bgrb(acb);
1112         arcmsr_flush_adapter_cache(acb);
1113         arcmsr_free_irq(pdev, acb);
1114 scsi_host_remove:
1115         scsi_remove_host(host);
1116 free_ccb_pool:
1117         arcmsr_free_ccb_pool(acb);
1118         goto unmap_pci_region;
1119 free_hbb_mu:
1120         arcmsr_free_io_queue(acb);
1121 unmap_pci_region:
1122         arcmsr_unmap_pciregion(acb);
1123 pci_release_regs:
1124         pci_release_regions(pdev);
1125 scsi_host_release:
1126         scsi_host_put(host);
1127 pci_disable_dev:
1128         pci_disable_device(pdev);
1129         return -ENODEV;
1130 }
1131
1132 static void arcmsr_free_irq(struct pci_dev *pdev,
1133                 struct AdapterControlBlock *acb)
1134 {
1135         int i;
1136
1137         for (i = 0; i < acb->vector_count; i++)
1138                 free_irq(pci_irq_vector(pdev, i), acb);
1139         pci_free_irq_vectors(pdev);
1140 }
1141
1142 static int __maybe_unused arcmsr_suspend(struct device *dev)
1143 {
1144         struct pci_dev *pdev = to_pci_dev(dev);
1145         struct Scsi_Host *host = pci_get_drvdata(pdev);
1146         struct AdapterControlBlock *acb =
1147                 (struct AdapterControlBlock *)host->hostdata;
1148
1149         arcmsr_disable_outbound_ints(acb);
1150         arcmsr_free_irq(pdev, acb);
1151         del_timer_sync(&acb->eternal_timer);
1152         if (set_date_time)
1153                 del_timer_sync(&acb->refresh_timer);
1154         flush_work(&acb->arcmsr_do_message_isr_bh);
1155         arcmsr_stop_adapter_bgrb(acb);
1156         arcmsr_flush_adapter_cache(acb);
1157         return 0;
1158 }
1159
1160 static int __maybe_unused arcmsr_resume(struct device *dev)
1161 {
1162         struct pci_dev *pdev = to_pci_dev(dev);
1163         struct Scsi_Host *host = pci_get_drvdata(pdev);
1164         struct AdapterControlBlock *acb =
1165                 (struct AdapterControlBlock *)host->hostdata;
1166
1167         if (arcmsr_set_dma_mask(acb))
1168                 goto controller_unregister;
1169         if (arcmsr_request_irq(pdev, acb) == FAILED)
1170                 goto controller_stop;
1171         switch (acb->adapter_type) {
1172         case ACB_ADAPTER_TYPE_B: {
1173                 struct MessageUnit_B *reg = acb->pmuB;
1174                 uint32_t i;
1175                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1176                         reg->post_qbuffer[i] = 0;
1177                         reg->done_qbuffer[i] = 0;
1178                 }
1179                 reg->postq_index = 0;
1180                 reg->doneq_index = 0;
1181                 break;
1182                 }
1183         case ACB_ADAPTER_TYPE_E:
1184                 writel(0, &acb->pmuE->host_int_status);
1185                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1186                 acb->in_doorbell = 0;
1187                 acb->out_doorbell = 0;
1188                 acb->doneq_index = 0;
1189                 break;
1190         case ACB_ADAPTER_TYPE_F:
1191                 writel(0, &acb->pmuF->host_int_status);
1192                 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
1193                 acb->in_doorbell = 0;
1194                 acb->out_doorbell = 0;
1195                 acb->doneq_index = 0;
1196                 arcmsr_hbaF_assign_regAddr(acb);
1197                 break;
1198         }
1199         arcmsr_iop_init(acb);
1200         arcmsr_init_get_devmap_timer(acb);
1201         if (set_date_time)
1202                 arcmsr_init_set_datetime_timer(acb);
1203         return 0;
1204 controller_stop:
1205         arcmsr_stop_adapter_bgrb(acb);
1206         arcmsr_flush_adapter_cache(acb);
1207 controller_unregister:
1208         scsi_remove_host(host);
1209         arcmsr_free_ccb_pool(acb);
1210         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1211                 arcmsr_free_io_queue(acb);
1212         arcmsr_unmap_pciregion(acb);
1213         scsi_host_put(host);
1214         return -ENODEV;
1215 }
1216
1217 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1218 {
1219         struct MessageUnit_A __iomem *reg = acb->pmuA;
1220         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1221         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1222                 printk(KERN_NOTICE
1223                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1224                         , acb->host->host_no);
1225                 return false;
1226         }
1227         return true;
1228 }
1229
1230 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1231 {
1232         struct MessageUnit_B *reg = acb->pmuB;
1233
1234         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1235         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1236                 printk(KERN_NOTICE
1237                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1238                         , acb->host->host_no);
1239                 return false;
1240         }
1241         return true;
1242 }
1243 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1244 {
1245         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1246         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1247         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1248         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1249                 printk(KERN_NOTICE
1250                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1251                         , pACB->host->host_no);
1252                 return false;
1253         }
1254         return true;
1255 }
1256
1257 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1258 {
1259         struct MessageUnit_D *reg = pACB->pmuD;
1260
1261         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1262         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1263                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1264                         "command' timeout\n", pACB->host->host_no);
1265                 return false;
1266         }
1267         return true;
1268 }
1269
1270 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1271 {
1272         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1273
1274         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1275         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1276         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1277         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1278                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1279                         "command' timeout\n", pACB->host->host_no);
1280                 return false;
1281         }
1282         return true;
1283 }
1284
1285 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1286 {
1287         uint8_t rtnval = 0;
1288         switch (acb->adapter_type) {
1289         case ACB_ADAPTER_TYPE_A:
1290                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1291                 break;
1292         case ACB_ADAPTER_TYPE_B:
1293                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1294                 break;
1295         case ACB_ADAPTER_TYPE_C:
1296                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1297                 break;
1298         case ACB_ADAPTER_TYPE_D:
1299                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1300                 break;
1301         case ACB_ADAPTER_TYPE_E:
1302         case ACB_ADAPTER_TYPE_F:
1303                 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1304                 break;
1305         }
1306         return rtnval;
1307 }
1308
1309 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1310 {
1311         struct AdapterControlBlock *acb = ccb->acb;
1312         struct scsi_cmnd *pcmd = ccb->pcmd;
1313         unsigned long flags;
1314         atomic_dec(&acb->ccboutstandingcount);
1315         scsi_dma_unmap(ccb->pcmd);
1316         ccb->startdone = ARCMSR_CCB_DONE;
1317         spin_lock_irqsave(&acb->ccblist_lock, flags);
1318         list_add_tail(&ccb->list, &acb->ccb_free_list);
1319         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1320         scsi_done(pcmd);
1321 }
1322
1323 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1324 {
1325         struct scsi_cmnd *pcmd = ccb->pcmd;
1326
1327         pcmd->result = (DID_OK << 16) | SAM_STAT_CHECK_CONDITION;
1328         if (pcmd->sense_buffer) {
1329                 struct SENSE_DATA *sensebuffer;
1330
1331                 memcpy_and_pad(pcmd->sense_buffer,
1332                                SCSI_SENSE_BUFFERSIZE,
1333                                ccb->arcmsr_cdb.SenseData,
1334                                sizeof(ccb->arcmsr_cdb.SenseData),
1335                                0);
1336
1337                 sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1338                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1339                 sensebuffer->Valid = 1;
1340         }
1341 }
1342
1343 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1344 {
1345         u32 orig_mask = 0;
1346         switch (acb->adapter_type) {
1347         case ACB_ADAPTER_TYPE_A : {
1348                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1349                 orig_mask = readl(&reg->outbound_intmask);
1350                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1351                                                 &reg->outbound_intmask);
1352                 }
1353                 break;
1354         case ACB_ADAPTER_TYPE_B : {
1355                 struct MessageUnit_B *reg = acb->pmuB;
1356                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1357                 writel(0, reg->iop2drv_doorbell_mask);
1358                 }
1359                 break;
1360         case ACB_ADAPTER_TYPE_C:{
1361                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1362                 /* disable all outbound interrupt */
1363                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1364                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1365                 }
1366                 break;
1367         case ACB_ADAPTER_TYPE_D: {
1368                 struct MessageUnit_D *reg = acb->pmuD;
1369                 /* disable all outbound interrupt */
1370                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1371                 }
1372                 break;
1373         case ACB_ADAPTER_TYPE_E:
1374         case ACB_ADAPTER_TYPE_F: {
1375                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1376                 orig_mask = readl(&reg->host_int_mask);
1377                 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
1378                 readl(&reg->host_int_mask); /* Dummy readl to force pci flush */
1379                 }
1380                 break;
1381         }
1382         return orig_mask;
1383 }
1384
1385 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1386                         struct CommandControlBlock *ccb, bool error)
1387 {
1388         uint8_t id, lun;
1389         id = ccb->pcmd->device->id;
1390         lun = ccb->pcmd->device->lun;
1391         if (!error) {
1392                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1393                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1394                 ccb->pcmd->result = DID_OK << 16;
1395                 arcmsr_ccb_complete(ccb);
1396         }else{
1397                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1398                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1399                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1400                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1401                         arcmsr_ccb_complete(ccb);
1402                         }
1403                         break;
1404
1405                 case ARCMSR_DEV_ABORTED:
1406
1407                 case ARCMSR_DEV_INIT_FAIL: {
1408                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1409                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1410                         arcmsr_ccb_complete(ccb);
1411                         }
1412                         break;
1413
1414                 case ARCMSR_DEV_CHECK_CONDITION: {
1415                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1416                         arcmsr_report_sense_info(ccb);
1417                         arcmsr_ccb_complete(ccb);
1418                         }
1419                         break;
1420
1421                 default:
1422                         printk(KERN_NOTICE
1423                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1424                                 but got unknown DeviceStatus = 0x%x \n"
1425                                 , acb->host->host_no
1426                                 , id
1427                                 , lun
1428                                 , ccb->arcmsr_cdb.DeviceStatus);
1429                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1430                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1431                                 arcmsr_ccb_complete(ccb);
1432                         break;
1433                 }
1434         }
1435 }
1436
1437 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1438 {
1439         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1440                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1441                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1442                         if (abortcmd) {
1443                                 abortcmd->result |= DID_ABORT << 16;
1444                                 arcmsr_ccb_complete(pCCB);
1445                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1446                                 acb->host->host_no, pCCB);
1447                         }
1448                         return;
1449                 }
1450                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1451                                 done acb = '0x%p'"
1452                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1453                                 " ccboutstandingcount = %d \n"
1454                                 , acb->host->host_no
1455                                 , acb
1456                                 , pCCB
1457                                 , pCCB->acb
1458                                 , pCCB->startdone
1459                                 , atomic_read(&acb->ccboutstandingcount));
1460                 return;
1461         }
1462         arcmsr_report_ccb_state(acb, pCCB, error);
1463 }
1464
1465 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1466 {
1467         int i = 0;
1468         uint32_t flag_ccb;
1469         struct ARCMSR_CDB *pARCMSR_CDB;
1470         bool error;
1471         struct CommandControlBlock *pCCB;
1472         unsigned long ccb_cdb_phy;
1473
1474         switch (acb->adapter_type) {
1475
1476         case ACB_ADAPTER_TYPE_A: {
1477                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1478                 uint32_t outbound_intstatus;
1479                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1480                                         acb->outbound_int_enable;
1481                 /*clear and abort all outbound posted Q*/
1482                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1483                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1484                                 && (i++ < acb->maxOutstanding)) {
1485                         ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1486                         if (acb->cdb_phyadd_hipart)
1487                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1488                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1489                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1490                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1491                         arcmsr_drain_donequeue(acb, pCCB, error);
1492                 }
1493                 }
1494                 break;
1495
1496         case ACB_ADAPTER_TYPE_B: {
1497                 struct MessageUnit_B *reg = acb->pmuB;
1498                 /*clear all outbound posted Q*/
1499                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1500                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1501                         flag_ccb = reg->done_qbuffer[i];
1502                         if (flag_ccb != 0) {
1503                                 reg->done_qbuffer[i] = 0;
1504                                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1505                                 if (acb->cdb_phyadd_hipart)
1506                                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1507                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1508                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1509                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1510                                 arcmsr_drain_donequeue(acb, pCCB, error);
1511                         }
1512                         reg->post_qbuffer[i] = 0;
1513                 }
1514                 reg->doneq_index = 0;
1515                 reg->postq_index = 0;
1516                 }
1517                 break;
1518         case ACB_ADAPTER_TYPE_C: {
1519                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1520                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1521                         /*need to do*/
1522                         flag_ccb = readl(&reg->outbound_queueport_low);
1523                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1524                         if (acb->cdb_phyadd_hipart)
1525                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1526                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1527                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1528                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1529                         arcmsr_drain_donequeue(acb, pCCB, error);
1530                 }
1531                 }
1532                 break;
1533         case ACB_ADAPTER_TYPE_D: {
1534                 struct MessageUnit_D  *pmu = acb->pmuD;
1535                 uint32_t outbound_write_pointer;
1536                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1537                 unsigned long flags;
1538
1539                 residual = atomic_read(&acb->ccboutstandingcount);
1540                 for (i = 0; i < residual; i++) {
1541                         spin_lock_irqsave(&acb->doneq_lock, flags);
1542                         outbound_write_pointer =
1543                                 pmu->done_qbuffer[0].addressLow + 1;
1544                         doneq_index = pmu->doneq_index;
1545                         if ((doneq_index & 0xFFF) !=
1546                                 (outbound_write_pointer & 0xFFF)) {
1547                                 toggle = doneq_index & 0x4000;
1548                                 index_stripped = (doneq_index & 0xFFF) + 1;
1549                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1550                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1551                                         ((toggle ^ 0x4000) + 1);
1552                                 doneq_index = pmu->doneq_index;
1553                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1554                                 addressLow = pmu->done_qbuffer[doneq_index &
1555                                         0xFFF].addressLow;
1556                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1557                                 if (acb->cdb_phyadd_hipart)
1558                                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1559                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1560                                         (acb->vir2phy_offset + ccb_cdb_phy);
1561                                 pCCB = container_of(pARCMSR_CDB,
1562                                         struct CommandControlBlock, arcmsr_cdb);
1563                                 error = (addressLow &
1564                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1565                                         true : false;
1566                                 arcmsr_drain_donequeue(acb, pCCB, error);
1567                                 writel(doneq_index,
1568                                         pmu->outboundlist_read_pointer);
1569                         } else {
1570                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1571                                 mdelay(10);
1572                         }
1573                 }
1574                 pmu->postq_index = 0;
1575                 pmu->doneq_index = 0x40FF;
1576                 }
1577                 break;
1578         case ACB_ADAPTER_TYPE_E:
1579                 arcmsr_hbaE_postqueue_isr(acb);
1580                 break;
1581         case ACB_ADAPTER_TYPE_F:
1582                 arcmsr_hbaF_postqueue_isr(acb);
1583                 break;
1584         }
1585 }
1586
1587 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1588 {
1589         char *acb_dev_map = (char *)acb->device_map;
1590         int target, lun, i;
1591         struct scsi_device *psdev;
1592         struct CommandControlBlock *ccb;
1593         char temp;
1594
1595         for (i = 0; i < acb->maxFreeCCB; i++) {
1596                 ccb = acb->pccb_pool[i];
1597                 if (ccb->startdone == ARCMSR_CCB_START) {
1598                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1599                         scsi_dma_unmap(ccb->pcmd);
1600                         scsi_done(ccb->pcmd);
1601                 }
1602         }
1603         for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1604                 temp = *acb_dev_map;
1605                 if (temp) {
1606                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1607                                 if (temp & 1) {
1608                                         psdev = scsi_device_lookup(acb->host,
1609                                                 0, target, lun);
1610                                         if (psdev != NULL) {
1611                                                 scsi_remove_device(psdev);
1612                                                 scsi_device_put(psdev);
1613                                         }
1614                                 }
1615                                 temp >>= 1;
1616                         }
1617                         *acb_dev_map = 0;
1618                 }
1619                 acb_dev_map++;
1620         }
1621 }
1622
1623 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1624 {
1625         struct pci_dev *pdev;
1626         struct Scsi_Host *host;
1627
1628         host = acb->host;
1629         arcmsr_free_sysfs_attr(acb);
1630         scsi_remove_host(host);
1631         flush_work(&acb->arcmsr_do_message_isr_bh);
1632         del_timer_sync(&acb->eternal_timer);
1633         if (set_date_time)
1634                 del_timer_sync(&acb->refresh_timer);
1635         pdev = acb->pdev;
1636         arcmsr_free_irq(pdev, acb);
1637         arcmsr_free_ccb_pool(acb);
1638         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1639                 arcmsr_free_io_queue(acb);
1640         arcmsr_unmap_pciregion(acb);
1641         pci_release_regions(pdev);
1642         scsi_host_put(host);
1643         pci_disable_device(pdev);
1644 }
1645
1646 static void arcmsr_remove(struct pci_dev *pdev)
1647 {
1648         struct Scsi_Host *host = pci_get_drvdata(pdev);
1649         struct AdapterControlBlock *acb =
1650                 (struct AdapterControlBlock *) host->hostdata;
1651         int poll_count = 0;
1652         uint16_t dev_id;
1653
1654         pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1655         if (dev_id == 0xffff) {
1656                 acb->acb_flags &= ~ACB_F_IOP_INITED;
1657                 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1658                 arcmsr_remove_scsi_devices(acb);
1659                 arcmsr_free_pcidev(acb);
1660                 return;
1661         }
1662         arcmsr_free_sysfs_attr(acb);
1663         scsi_remove_host(host);
1664         flush_work(&acb->arcmsr_do_message_isr_bh);
1665         del_timer_sync(&acb->eternal_timer);
1666         if (set_date_time)
1667                 del_timer_sync(&acb->refresh_timer);
1668         arcmsr_disable_outbound_ints(acb);
1669         arcmsr_stop_adapter_bgrb(acb);
1670         arcmsr_flush_adapter_cache(acb);
1671         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1672         acb->acb_flags &= ~ACB_F_IOP_INITED;
1673
1674         for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1675                 if (!atomic_read(&acb->ccboutstandingcount))
1676                         break;
1677                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1678                 msleep(25);
1679         }
1680
1681         if (atomic_read(&acb->ccboutstandingcount)) {
1682                 int i;
1683
1684                 arcmsr_abort_allcmd(acb);
1685                 arcmsr_done4abort_postqueue(acb);
1686                 for (i = 0; i < acb->maxFreeCCB; i++) {
1687                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1688                         if (ccb->startdone == ARCMSR_CCB_START) {
1689                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1690                                 ccb->pcmd->result = DID_ABORT << 16;
1691                                 arcmsr_ccb_complete(ccb);
1692                         }
1693                 }
1694         }
1695         arcmsr_free_irq(pdev, acb);
1696         arcmsr_free_ccb_pool(acb);
1697         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1698                 arcmsr_free_io_queue(acb);
1699         arcmsr_unmap_pciregion(acb);
1700         pci_release_regions(pdev);
1701         scsi_host_put(host);
1702         pci_disable_device(pdev);
1703 }
1704
1705 static void arcmsr_shutdown(struct pci_dev *pdev)
1706 {
1707         struct Scsi_Host *host = pci_get_drvdata(pdev);
1708         struct AdapterControlBlock *acb =
1709                 (struct AdapterControlBlock *)host->hostdata;
1710         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1711                 return;
1712         del_timer_sync(&acb->eternal_timer);
1713         if (set_date_time)
1714                 del_timer_sync(&acb->refresh_timer);
1715         arcmsr_disable_outbound_ints(acb);
1716         arcmsr_free_irq(pdev, acb);
1717         flush_work(&acb->arcmsr_do_message_isr_bh);
1718         arcmsr_stop_adapter_bgrb(acb);
1719         arcmsr_flush_adapter_cache(acb);
1720 }
1721
1722 static int __init arcmsr_module_init(void)
1723 {
1724         int error = 0;
1725         error = pci_register_driver(&arcmsr_pci_driver);
1726         return error;
1727 }
1728
1729 static void __exit arcmsr_module_exit(void)
1730 {
1731         pci_unregister_driver(&arcmsr_pci_driver);
1732 }
1733 module_init(arcmsr_module_init);
1734 module_exit(arcmsr_module_exit);
1735
1736 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1737                                                 u32 intmask_org)
1738 {
1739         u32 mask;
1740         switch (acb->adapter_type) {
1741
1742         case ACB_ADAPTER_TYPE_A: {
1743                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1744                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1745                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1746                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1747                 writel(mask, &reg->outbound_intmask);
1748                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1749                 }
1750                 break;
1751
1752         case ACB_ADAPTER_TYPE_B: {
1753                 struct MessageUnit_B *reg = acb->pmuB;
1754                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1755                         ARCMSR_IOP2DRV_DATA_READ_OK |
1756                         ARCMSR_IOP2DRV_CDB_DONE |
1757                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1758                 writel(mask, reg->iop2drv_doorbell_mask);
1759                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1760                 }
1761                 break;
1762         case ACB_ADAPTER_TYPE_C: {
1763                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1764                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1765                 writel(intmask_org & mask, &reg->host_int_mask);
1766                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1767                 }
1768                 break;
1769         case ACB_ADAPTER_TYPE_D: {
1770                 struct MessageUnit_D *reg = acb->pmuD;
1771
1772                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1773                 writel(intmask_org | mask, reg->pcief0_int_enable);
1774                 break;
1775                 }
1776         case ACB_ADAPTER_TYPE_E:
1777         case ACB_ADAPTER_TYPE_F: {
1778                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1779
1780                 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1781                 writel(intmask_org & mask, &reg->host_int_mask);
1782                 break;
1783                 }
1784         }
1785 }
1786
1787 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1788         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1789 {
1790         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1791         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1792         __le32 address_lo, address_hi;
1793         int arccdbsize = 0x30;
1794         __le32 length = 0;
1795         int i;
1796         struct scatterlist *sg;
1797         int nseg;
1798         ccb->pcmd = pcmd;
1799         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1800         arcmsr_cdb->TargetID = pcmd->device->id;
1801         arcmsr_cdb->LUN = pcmd->device->lun;
1802         arcmsr_cdb->Function = 1;
1803         arcmsr_cdb->msgContext = 0;
1804         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1805
1806         nseg = scsi_dma_map(pcmd);
1807         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1808                 return FAILED;
1809         scsi_for_each_sg(pcmd, sg, nseg, i) {
1810                 /* Get the physical address of the current data pointer */
1811                 length = cpu_to_le32(sg_dma_len(sg));
1812                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1813                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1814                 if (address_hi == 0) {
1815                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1816
1817                         pdma_sg->address = address_lo;
1818                         pdma_sg->length = length;
1819                         psge += sizeof (struct SG32ENTRY);
1820                         arccdbsize += sizeof (struct SG32ENTRY);
1821                 } else {
1822                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1823
1824                         pdma_sg->addresshigh = address_hi;
1825                         pdma_sg->address = address_lo;
1826                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1827                         psge += sizeof (struct SG64ENTRY);
1828                         arccdbsize += sizeof (struct SG64ENTRY);
1829                 }
1830         }
1831         arcmsr_cdb->sgcount = (uint8_t)nseg;
1832         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1833         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1834         if ( arccdbsize > 256)
1835                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1836         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1837                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1838         ccb->arc_cdb_size = arccdbsize;
1839         return SUCCESS;
1840 }
1841
1842 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1843 {
1844         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1845         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1846         atomic_inc(&acb->ccboutstandingcount);
1847         ccb->startdone = ARCMSR_CCB_START;
1848         switch (acb->adapter_type) {
1849         case ACB_ADAPTER_TYPE_A: {
1850                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1851
1852                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1853                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1854                         &reg->inbound_queueport);
1855                 else
1856                         writel(cdb_phyaddr, &reg->inbound_queueport);
1857                 break;
1858         }
1859
1860         case ACB_ADAPTER_TYPE_B: {
1861                 struct MessageUnit_B *reg = acb->pmuB;
1862                 uint32_t ending_index, index = reg->postq_index;
1863
1864                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1865                 reg->post_qbuffer[ending_index] = 0;
1866                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1867                         reg->post_qbuffer[index] =
1868                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1869                 } else {
1870                         reg->post_qbuffer[index] = cdb_phyaddr;
1871                 }
1872                 index++;
1873                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1874                 reg->postq_index = index;
1875                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1876                 }
1877                 break;
1878         case ACB_ADAPTER_TYPE_C: {
1879                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1880                 uint32_t ccb_post_stamp, arc_cdb_size;
1881
1882                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1883                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1884                 writel(upper_32_bits(ccb->cdb_phyaddr), &phbcmu->inbound_queueport_high);
1885                 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1886                 }
1887                 break;
1888         case ACB_ADAPTER_TYPE_D: {
1889                 struct MessageUnit_D  *pmu = acb->pmuD;
1890                 u16 index_stripped;
1891                 u16 postq_index, toggle;
1892                 unsigned long flags;
1893                 struct InBound_SRB *pinbound_srb;
1894
1895                 spin_lock_irqsave(&acb->postq_lock, flags);
1896                 postq_index = pmu->postq_index;
1897                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1898                 pinbound_srb->addressHigh = upper_32_bits(ccb->cdb_phyaddr);
1899                 pinbound_srb->addressLow = cdb_phyaddr;
1900                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1901                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1902                 toggle = postq_index & 0x4000;
1903                 index_stripped = postq_index + 1;
1904                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1905                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1906                         (toggle ^ 0x4000);
1907                 writel(postq_index, pmu->inboundlist_write_pointer);
1908                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1909                 break;
1910                 }
1911         case ACB_ADAPTER_TYPE_E: {
1912                 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1913                 u32 ccb_post_stamp, arc_cdb_size;
1914
1915                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1916                 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1917                 writel(0, &pmu->inbound_queueport_high);
1918                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1919                 break;
1920                 }
1921         case ACB_ADAPTER_TYPE_F: {
1922                 struct MessageUnit_F __iomem *pmu = acb->pmuF;
1923                 u32 ccb_post_stamp, arc_cdb_size;
1924
1925                 if (ccb->arc_cdb_size <= 0x300)
1926                         arc_cdb_size = (ccb->arc_cdb_size - 1) >> 6 | 1;
1927                 else {
1928                         arc_cdb_size = ((ccb->arc_cdb_size + 0xff) >> 8) + 2;
1929                         if (arc_cdb_size > 0xF)
1930                                 arc_cdb_size = 0xF;
1931                         arc_cdb_size = (arc_cdb_size << 1) | 1;
1932                 }
1933                 ccb_post_stamp = (ccb->smid | arc_cdb_size);
1934                 writel(0, &pmu->inbound_queueport_high);
1935                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1936                 break;
1937                 }
1938         }
1939 }
1940
1941 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1942 {
1943         struct MessageUnit_A __iomem *reg = acb->pmuA;
1944         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1945         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1946         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1947                 printk(KERN_NOTICE
1948                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1949                         , acb->host->host_no);
1950         }
1951 }
1952
1953 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1954 {
1955         struct MessageUnit_B *reg = acb->pmuB;
1956         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1957         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1958
1959         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1960                 printk(KERN_NOTICE
1961                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1962                         , acb->host->host_no);
1963         }
1964 }
1965
1966 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1967 {
1968         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1969         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1970         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1971         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1972         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1973                 printk(KERN_NOTICE
1974                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1975                         , pACB->host->host_no);
1976         }
1977         return;
1978 }
1979
1980 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1981 {
1982         struct MessageUnit_D *reg = pACB->pmuD;
1983
1984         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1985         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1986         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1987                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1988                         "timeout\n", pACB->host->host_no);
1989 }
1990
1991 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1992 {
1993         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1994
1995         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1996         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1997         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1998         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1999         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
2000                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
2001                         "timeout\n", pACB->host->host_no);
2002         }
2003 }
2004
2005 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
2006 {
2007         switch (acb->adapter_type) {
2008         case ACB_ADAPTER_TYPE_A:
2009                 arcmsr_hbaA_stop_bgrb(acb);
2010                 break;
2011         case ACB_ADAPTER_TYPE_B:
2012                 arcmsr_hbaB_stop_bgrb(acb);
2013                 break;
2014         case ACB_ADAPTER_TYPE_C:
2015                 arcmsr_hbaC_stop_bgrb(acb);
2016                 break;
2017         case ACB_ADAPTER_TYPE_D:
2018                 arcmsr_hbaD_stop_bgrb(acb);
2019                 break;
2020         case ACB_ADAPTER_TYPE_E:
2021         case ACB_ADAPTER_TYPE_F:
2022                 arcmsr_hbaE_stop_bgrb(acb);
2023                 break;
2024         }
2025 }
2026
2027 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
2028 {
2029         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
2030 }
2031
2032 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
2033 {
2034         switch (acb->adapter_type) {
2035         case ACB_ADAPTER_TYPE_A: {
2036                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2037                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2038                 }
2039                 break;
2040         case ACB_ADAPTER_TYPE_B: {
2041                 struct MessageUnit_B *reg = acb->pmuB;
2042                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2043                 }
2044                 break;
2045         case ACB_ADAPTER_TYPE_C: {
2046                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2047
2048                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2049                 }
2050                 break;
2051         case ACB_ADAPTER_TYPE_D: {
2052                 struct MessageUnit_D *reg = acb->pmuD;
2053                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
2054                         reg->inbound_doorbell);
2055                 }
2056                 break;
2057         case ACB_ADAPTER_TYPE_E:
2058         case ACB_ADAPTER_TYPE_F: {
2059                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2060                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
2061                 writel(acb->out_doorbell, &reg->iobound_doorbell);
2062                 }
2063                 break;
2064         }
2065 }
2066
2067 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
2068 {
2069         switch (acb->adapter_type) {
2070         case ACB_ADAPTER_TYPE_A: {
2071                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2072                 /*
2073                 ** push inbound doorbell tell iop, driver data write ok
2074                 ** and wait reply on next hwinterrupt for next Qbuffer post
2075                 */
2076                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
2077                 }
2078                 break;
2079
2080         case ACB_ADAPTER_TYPE_B: {
2081                 struct MessageUnit_B *reg = acb->pmuB;
2082                 /*
2083                 ** push inbound doorbell tell iop, driver data write ok
2084                 ** and wait reply on next hwinterrupt for next Qbuffer post
2085                 */
2086                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
2087                 }
2088                 break;
2089         case ACB_ADAPTER_TYPE_C: {
2090                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2091                 /*
2092                 ** push inbound doorbell tell iop, driver data write ok
2093                 ** and wait reply on next hwinterrupt for next Qbuffer post
2094                 */
2095                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
2096                 }
2097                 break;
2098         case ACB_ADAPTER_TYPE_D: {
2099                 struct MessageUnit_D *reg = acb->pmuD;
2100                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
2101                         reg->inbound_doorbell);
2102                 }
2103                 break;
2104         case ACB_ADAPTER_TYPE_E:
2105         case ACB_ADAPTER_TYPE_F: {
2106                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2107                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
2108                 writel(acb->out_doorbell, &reg->iobound_doorbell);
2109                 }
2110                 break;
2111         }
2112 }
2113
2114 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
2115 {
2116         struct QBUFFER __iomem *qbuffer = NULL;
2117         switch (acb->adapter_type) {
2118
2119         case ACB_ADAPTER_TYPE_A: {
2120                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2121                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2122                 }
2123                 break;
2124         case ACB_ADAPTER_TYPE_B: {
2125                 struct MessageUnit_B *reg = acb->pmuB;
2126                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2127                 }
2128                 break;
2129         case ACB_ADAPTER_TYPE_C: {
2130                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
2131                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
2132                 }
2133                 break;
2134         case ACB_ADAPTER_TYPE_D: {
2135                 struct MessageUnit_D *reg = acb->pmuD;
2136                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2137                 }
2138                 break;
2139         case ACB_ADAPTER_TYPE_E: {
2140                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2141                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2142                 }
2143                 break;
2144         case ACB_ADAPTER_TYPE_F: {
2145                 qbuffer = (struct QBUFFER __iomem *)acb->message_rbuffer;
2146                 }
2147                 break;
2148         }
2149         return qbuffer;
2150 }
2151
2152 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2153 {
2154         struct QBUFFER __iomem *pqbuffer = NULL;
2155         switch (acb->adapter_type) {
2156
2157         case ACB_ADAPTER_TYPE_A: {
2158                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2159                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2160                 }
2161                 break;
2162         case ACB_ADAPTER_TYPE_B: {
2163                 struct MessageUnit_B  *reg = acb->pmuB;
2164                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2165                 }
2166                 break;
2167         case ACB_ADAPTER_TYPE_C: {
2168                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2169                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2170                 }
2171                 break;
2172         case ACB_ADAPTER_TYPE_D: {
2173                 struct MessageUnit_D *reg = acb->pmuD;
2174                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2175                 }
2176                 break;
2177         case ACB_ADAPTER_TYPE_E: {
2178                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2179                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2180                 }
2181                 break;
2182         case ACB_ADAPTER_TYPE_F:
2183                 pqbuffer = (struct QBUFFER __iomem *)acb->message_wbuffer;
2184                 break;
2185         }
2186         return pqbuffer;
2187 }
2188
2189 static uint32_t
2190 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2191                 struct QBUFFER __iomem *prbuffer)
2192 {
2193         uint8_t *pQbuffer;
2194         uint8_t *buf1 = NULL;
2195         uint32_t __iomem *iop_data;
2196         uint32_t iop_len, data_len, *buf2 = NULL;
2197
2198         iop_data = (uint32_t __iomem *)prbuffer->data;
2199         iop_len = readl(&prbuffer->data_len);
2200         if (iop_len > 0) {
2201                 buf1 = kmalloc(128, GFP_ATOMIC);
2202                 buf2 = (uint32_t *)buf1;
2203                 if (buf1 == NULL)
2204                         return 0;
2205                 data_len = iop_len;
2206                 while (data_len >= 4) {
2207                         *buf2++ = readl(iop_data);
2208                         iop_data++;
2209                         data_len -= 4;
2210                 }
2211                 if (data_len)
2212                         *buf2 = readl(iop_data);
2213                 buf2 = (uint32_t *)buf1;
2214         }
2215         while (iop_len > 0) {
2216                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2217                 *pQbuffer = *buf1;
2218                 acb->rqbuf_putIndex++;
2219                 /* if last, index number set it to 0 */
2220                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2221                 buf1++;
2222                 iop_len--;
2223         }
2224         kfree(buf2);
2225         /* let IOP know data has been read */
2226         arcmsr_iop_message_read(acb);
2227         return 1;
2228 }
2229
2230 uint32_t
2231 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2232         struct QBUFFER __iomem *prbuffer) {
2233
2234         uint8_t *pQbuffer;
2235         uint8_t __iomem *iop_data;
2236         uint32_t iop_len;
2237
2238         if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2239                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2240         iop_data = (uint8_t __iomem *)prbuffer->data;
2241         iop_len = readl(&prbuffer->data_len);
2242         while (iop_len > 0) {
2243                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2244                 *pQbuffer = readb(iop_data);
2245                 acb->rqbuf_putIndex++;
2246                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2247                 iop_data++;
2248                 iop_len--;
2249         }
2250         arcmsr_iop_message_read(acb);
2251         return 1;
2252 }
2253
2254 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2255 {
2256         unsigned long flags;
2257         struct QBUFFER __iomem  *prbuffer;
2258         int32_t buf_empty_len;
2259
2260         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2261         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2262         if (acb->rqbuf_putIndex >= acb->rqbuf_getIndex) {
2263                 buf_empty_len = (ARCMSR_MAX_QBUFFER - 1) -
2264                 (acb->rqbuf_putIndex - acb->rqbuf_getIndex);
2265         } else
2266                 buf_empty_len = acb->rqbuf_getIndex - acb->rqbuf_putIndex - 1;
2267         if (buf_empty_len >= readl(&prbuffer->data_len)) {
2268                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2269                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2270         } else
2271                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2272         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2273 }
2274
2275 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2276 {
2277         uint8_t *pQbuffer;
2278         struct QBUFFER __iomem *pwbuffer;
2279         uint8_t *buf1 = NULL;
2280         uint32_t __iomem *iop_data;
2281         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2282
2283         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2284                 buf1 = kmalloc(128, GFP_ATOMIC);
2285                 buf2 = (uint32_t *)buf1;
2286                 if (buf1 == NULL)
2287                         return;
2288
2289                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2290                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2291                 iop_data = (uint32_t __iomem *)pwbuffer->data;
2292                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2293                         && (allxfer_len < 124)) {
2294                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2295                         *buf1 = *pQbuffer;
2296                         acb->wqbuf_getIndex++;
2297                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2298                         buf1++;
2299                         allxfer_len++;
2300                 }
2301                 data_len = allxfer_len;
2302                 buf1 = (uint8_t *)buf2;
2303                 while (data_len >= 4) {
2304                         data = *buf2++;
2305                         writel(data, iop_data);
2306                         iop_data++;
2307                         data_len -= 4;
2308                 }
2309                 if (data_len) {
2310                         data = *buf2;
2311                         writel(data, iop_data);
2312                 }
2313                 writel(allxfer_len, &pwbuffer->data_len);
2314                 kfree(buf1);
2315                 arcmsr_iop_message_wrote(acb);
2316         }
2317 }
2318
2319 void
2320 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2321 {
2322         uint8_t *pQbuffer;
2323         struct QBUFFER __iomem *pwbuffer;
2324         uint8_t __iomem *iop_data;
2325         int32_t allxfer_len = 0;
2326
2327         if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2328                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2329                 return;
2330         }
2331         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2332                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2333                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2334                 iop_data = (uint8_t __iomem *)pwbuffer->data;
2335                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2336                         && (allxfer_len < 124)) {
2337                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2338                         writeb(*pQbuffer, iop_data);
2339                         acb->wqbuf_getIndex++;
2340                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2341                         iop_data++;
2342                         allxfer_len++;
2343                 }
2344                 writel(allxfer_len, &pwbuffer->data_len);
2345                 arcmsr_iop_message_wrote(acb);
2346         }
2347 }
2348
2349 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2350 {
2351         unsigned long flags;
2352
2353         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2354         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2355         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2356                 arcmsr_write_ioctldata2iop(acb);
2357         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2358                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2359         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2360 }
2361
2362 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2363 {
2364         uint32_t outbound_doorbell;
2365         struct MessageUnit_A __iomem *reg = acb->pmuA;
2366         outbound_doorbell = readl(&reg->outbound_doorbell);
2367         do {
2368                 writel(outbound_doorbell, &reg->outbound_doorbell);
2369                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2370                         arcmsr_iop2drv_data_wrote_handle(acb);
2371                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2372                         arcmsr_iop2drv_data_read_handle(acb);
2373                 outbound_doorbell = readl(&reg->outbound_doorbell);
2374         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2375                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2376 }
2377 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2378 {
2379         uint32_t outbound_doorbell;
2380         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2381         /*
2382         *******************************************************************
2383         **  Maybe here we need to check wrqbuffer_lock is lock or not
2384         **  DOORBELL: din! don!
2385         **  check if there are any mail need to pack from firmware
2386         *******************************************************************
2387         */
2388         outbound_doorbell = readl(&reg->outbound_doorbell);
2389         do {
2390                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2391                 readl(&reg->outbound_doorbell_clear);
2392                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2393                         arcmsr_iop2drv_data_wrote_handle(pACB);
2394                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2395                         arcmsr_iop2drv_data_read_handle(pACB);
2396                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2397                         arcmsr_hbaC_message_isr(pACB);
2398                 outbound_doorbell = readl(&reg->outbound_doorbell);
2399         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2400                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2401                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2402 }
2403
2404 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2405 {
2406         uint32_t outbound_doorbell;
2407         struct MessageUnit_D  *pmu = pACB->pmuD;
2408
2409         outbound_doorbell = readl(pmu->outbound_doorbell);
2410         do {
2411                 writel(outbound_doorbell, pmu->outbound_doorbell);
2412                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2413                         arcmsr_hbaD_message_isr(pACB);
2414                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2415                         arcmsr_iop2drv_data_wrote_handle(pACB);
2416                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2417                         arcmsr_iop2drv_data_read_handle(pACB);
2418                 outbound_doorbell = readl(pmu->outbound_doorbell);
2419         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2420                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2421                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2422 }
2423
2424 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2425 {
2426         uint32_t outbound_doorbell, in_doorbell, tmp, i;
2427         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2428
2429         if (pACB->adapter_type == ACB_ADAPTER_TYPE_F) {
2430                 for (i = 0; i < 5; i++) {
2431                         in_doorbell = readl(&reg->iobound_doorbell);
2432                         if (in_doorbell != 0)
2433                                 break;
2434                 }
2435         } else
2436                 in_doorbell = readl(&reg->iobound_doorbell);
2437         outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2438         do {
2439                 writel(0, &reg->host_int_status); /* clear interrupt */
2440                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2441                         arcmsr_iop2drv_data_wrote_handle(pACB);
2442                 }
2443                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2444                         arcmsr_iop2drv_data_read_handle(pACB);
2445                 }
2446                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2447                         arcmsr_hbaE_message_isr(pACB);
2448                 }
2449                 tmp = in_doorbell;
2450                 in_doorbell = readl(&reg->iobound_doorbell);
2451                 outbound_doorbell = tmp ^ in_doorbell;
2452         } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2453                 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2454                 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2455         pACB->in_doorbell = in_doorbell;
2456 }
2457
2458 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2459 {
2460         uint32_t flag_ccb;
2461         struct MessageUnit_A __iomem *reg = acb->pmuA;
2462         struct ARCMSR_CDB *pARCMSR_CDB;
2463         struct CommandControlBlock *pCCB;
2464         bool error;
2465         unsigned long cdb_phy_addr;
2466
2467         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
2468                 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2469                 if (acb->cdb_phyadd_hipart)
2470                         cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2471                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2472                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2473                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2474                 arcmsr_drain_donequeue(acb, pCCB, error);
2475         }
2476 }
2477 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2478 {
2479         uint32_t index;
2480         uint32_t flag_ccb;
2481         struct MessageUnit_B *reg = acb->pmuB;
2482         struct ARCMSR_CDB *pARCMSR_CDB;
2483         struct CommandControlBlock *pCCB;
2484         bool error;
2485         unsigned long cdb_phy_addr;
2486
2487         index = reg->doneq_index;
2488         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2489                 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2490                 if (acb->cdb_phyadd_hipart)
2491                         cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2492                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2493                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2494                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2495                 arcmsr_drain_donequeue(acb, pCCB, error);
2496                 reg->done_qbuffer[index] = 0;
2497                 index++;
2498                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2499                 reg->doneq_index = index;
2500         }
2501 }
2502
2503 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2504 {
2505         struct MessageUnit_C __iomem *phbcmu;
2506         struct ARCMSR_CDB *arcmsr_cdb;
2507         struct CommandControlBlock *ccb;
2508         uint32_t flag_ccb, throttling = 0;
2509         unsigned long ccb_cdb_phy;
2510         int error;
2511
2512         phbcmu = acb->pmuC;
2513         /* areca cdb command done */
2514         /* Use correct offset and size for syncing */
2515
2516         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2517                         0xFFFFFFFF) {
2518                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2519                 if (acb->cdb_phyadd_hipart)
2520                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2521                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2522                         + ccb_cdb_phy);
2523                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2524                         arcmsr_cdb);
2525                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2526                         ? true : false;
2527                 /* check if command done with no error */
2528                 arcmsr_drain_donequeue(acb, ccb, error);
2529                 throttling++;
2530                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2531                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2532                                 &phbcmu->inbound_doorbell);
2533                         throttling = 0;
2534                 }
2535         }
2536 }
2537
2538 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2539 {
2540         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2541         uint32_t addressLow;
2542         int error;
2543         struct MessageUnit_D  *pmu;
2544         struct ARCMSR_CDB *arcmsr_cdb;
2545         struct CommandControlBlock *ccb;
2546         unsigned long flags, ccb_cdb_phy;
2547
2548         spin_lock_irqsave(&acb->doneq_lock, flags);
2549         pmu = acb->pmuD;
2550         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2551         doneq_index = pmu->doneq_index;
2552         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2553                 do {
2554                         toggle = doneq_index & 0x4000;
2555                         index_stripped = (doneq_index & 0xFFF) + 1;
2556                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2557                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2558                                 ((toggle ^ 0x4000) + 1);
2559                         doneq_index = pmu->doneq_index;
2560                         addressLow = pmu->done_qbuffer[doneq_index &
2561                                 0xFFF].addressLow;
2562                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2563                         if (acb->cdb_phyadd_hipart)
2564                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2565                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2566                                 + ccb_cdb_phy);
2567                         ccb = container_of(arcmsr_cdb,
2568                                 struct CommandControlBlock, arcmsr_cdb);
2569                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2570                                 ? true : false;
2571                         arcmsr_drain_donequeue(acb, ccb, error);
2572                         writel(doneq_index, pmu->outboundlist_read_pointer);
2573                 } while ((doneq_index & 0xFFF) !=
2574                         (outbound_write_pointer & 0xFFF));
2575         }
2576         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2577                 pmu->outboundlist_interrupt_cause);
2578         readl(pmu->outboundlist_interrupt_cause);
2579         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2580 }
2581
2582 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2583 {
2584         uint32_t doneq_index;
2585         uint16_t cmdSMID;
2586         int error;
2587         struct MessageUnit_E __iomem *pmu;
2588         struct CommandControlBlock *ccb;
2589         unsigned long flags;
2590
2591         spin_lock_irqsave(&acb->doneq_lock, flags);
2592         doneq_index = acb->doneq_index;
2593         pmu = acb->pmuE;
2594         while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2595                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2596                 ccb = acb->pccb_pool[cmdSMID];
2597                 error = (acb->pCompletionQ[doneq_index].cmdFlag
2598                         & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2599                 arcmsr_drain_donequeue(acb, ccb, error);
2600                 doneq_index++;
2601                 if (doneq_index >= acb->completionQ_entry)
2602                         doneq_index = 0;
2603         }
2604         acb->doneq_index = doneq_index;
2605         writel(doneq_index, &pmu->reply_post_consumer_index);
2606         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2607 }
2608
2609 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb)
2610 {
2611         uint32_t doneq_index;
2612         uint16_t cmdSMID;
2613         int error;
2614         struct MessageUnit_F __iomem *phbcmu;
2615         struct CommandControlBlock *ccb;
2616         unsigned long flags;
2617
2618         spin_lock_irqsave(&acb->doneq_lock, flags);
2619         doneq_index = acb->doneq_index;
2620         phbcmu = acb->pmuF;
2621         while (1) {
2622                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2623                 if (cmdSMID == 0xffff)
2624                         break;
2625                 ccb = acb->pccb_pool[cmdSMID];
2626                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
2627                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2628                 arcmsr_drain_donequeue(acb, ccb, error);
2629                 acb->pCompletionQ[doneq_index].cmdSMID = 0xffff;
2630                 doneq_index++;
2631                 if (doneq_index >= acb->completionQ_entry)
2632                         doneq_index = 0;
2633         }
2634         acb->doneq_index = doneq_index;
2635         writel(doneq_index, &phbcmu->reply_post_consumer_index);
2636         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2637 }
2638
2639 /*
2640 **********************************************************************************
2641 ** Handle a message interrupt
2642 **
2643 ** The only message interrupt we expect is in response to a query for the current adapter config.
2644 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2645 **********************************************************************************
2646 */
2647 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2648 {
2649         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2650         /*clear interrupt and message state*/
2651         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2652         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2653                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2654 }
2655 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2656 {
2657         struct MessageUnit_B *reg  = acb->pmuB;
2658
2659         /*clear interrupt and message state*/
2660         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2661         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2662                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2663 }
2664 /*
2665 **********************************************************************************
2666 ** Handle a message interrupt
2667 **
2668 ** The only message interrupt we expect is in response to a query for the
2669 ** current adapter config.
2670 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2671 **********************************************************************************
2672 */
2673 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2674 {
2675         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2676         /*clear interrupt and message state*/
2677         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2678         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2679                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2680 }
2681
2682 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2683 {
2684         struct MessageUnit_D *reg  = acb->pmuD;
2685
2686         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2687         readl(reg->outbound_doorbell);
2688         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2689                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2690 }
2691
2692 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2693 {
2694         struct MessageUnit_E __iomem *reg  = acb->pmuE;
2695
2696         writel(0, &reg->host_int_status);
2697         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2698                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2699 }
2700
2701 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2702 {
2703         uint32_t outbound_intstatus;
2704         struct MessageUnit_A __iomem *reg = acb->pmuA;
2705         outbound_intstatus = readl(&reg->outbound_intstatus) &
2706                 acb->outbound_int_enable;
2707         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2708                 return IRQ_NONE;
2709         do {
2710                 writel(outbound_intstatus, &reg->outbound_intstatus);
2711                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2712                         arcmsr_hbaA_doorbell_isr(acb);
2713                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2714                         arcmsr_hbaA_postqueue_isr(acb);
2715                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2716                         arcmsr_hbaA_message_isr(acb);
2717                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2718                         acb->outbound_int_enable;
2719         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2720                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2721                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2722         return IRQ_HANDLED;
2723 }
2724
2725 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2726 {
2727         uint32_t outbound_doorbell;
2728         struct MessageUnit_B *reg = acb->pmuB;
2729         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2730                                 acb->outbound_int_enable;
2731         if (!outbound_doorbell)
2732                 return IRQ_NONE;
2733         do {
2734                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2735                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2736                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2737                         arcmsr_iop2drv_data_wrote_handle(acb);
2738                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2739                         arcmsr_iop2drv_data_read_handle(acb);
2740                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2741                         arcmsr_hbaB_postqueue_isr(acb);
2742                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2743                         arcmsr_hbaB_message_isr(acb);
2744                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2745                         acb->outbound_int_enable;
2746         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2747                 | ARCMSR_IOP2DRV_DATA_READ_OK
2748                 | ARCMSR_IOP2DRV_CDB_DONE
2749                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2750         return IRQ_HANDLED;
2751 }
2752
2753 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2754 {
2755         uint32_t host_interrupt_status;
2756         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2757         /*
2758         *********************************************
2759         **   check outbound intstatus
2760         *********************************************
2761         */
2762         host_interrupt_status = readl(&phbcmu->host_int_status) &
2763                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2764                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2765         if (!host_interrupt_status)
2766                 return IRQ_NONE;
2767         do {
2768                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2769                         arcmsr_hbaC_doorbell_isr(pACB);
2770                 /* MU post queue interrupts*/
2771                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2772                         arcmsr_hbaC_postqueue_isr(pACB);
2773                 host_interrupt_status = readl(&phbcmu->host_int_status);
2774         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2775                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2776         return IRQ_HANDLED;
2777 }
2778
2779 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2780 {
2781         u32 host_interrupt_status;
2782         struct MessageUnit_D  *pmu = pACB->pmuD;
2783
2784         host_interrupt_status = readl(pmu->host_int_status) &
2785                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2786                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2787         if (!host_interrupt_status)
2788                 return IRQ_NONE;
2789         do {
2790                 /* MU post queue interrupts*/
2791                 if (host_interrupt_status &
2792                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2793                         arcmsr_hbaD_postqueue_isr(pACB);
2794                 if (host_interrupt_status &
2795                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2796                         arcmsr_hbaD_doorbell_isr(pACB);
2797                 host_interrupt_status = readl(pmu->host_int_status);
2798         } while (host_interrupt_status &
2799                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2800                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2801         return IRQ_HANDLED;
2802 }
2803
2804 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2805 {
2806         uint32_t host_interrupt_status;
2807         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2808
2809         host_interrupt_status = readl(&pmu->host_int_status) &
2810                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2811                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2812         if (!host_interrupt_status)
2813                 return IRQ_NONE;
2814         do {
2815                 /* MU ioctl transfer doorbell interrupts*/
2816                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2817                         arcmsr_hbaE_doorbell_isr(pACB);
2818                 }
2819                 /* MU post queue interrupts*/
2820                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2821                         arcmsr_hbaE_postqueue_isr(pACB);
2822                 }
2823                 host_interrupt_status = readl(&pmu->host_int_status);
2824         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2825                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2826         return IRQ_HANDLED;
2827 }
2828
2829 static irqreturn_t arcmsr_hbaF_handle_isr(struct AdapterControlBlock *pACB)
2830 {
2831         uint32_t host_interrupt_status;
2832         struct MessageUnit_F __iomem *phbcmu = pACB->pmuF;
2833
2834         host_interrupt_status = readl(&phbcmu->host_int_status) &
2835                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2836                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2837         if (!host_interrupt_status)
2838                 return IRQ_NONE;
2839         do {
2840                 /* MU post queue interrupts*/
2841                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR)
2842                         arcmsr_hbaF_postqueue_isr(pACB);
2843
2844                 /* MU ioctl transfer doorbell interrupts*/
2845                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR)
2846                         arcmsr_hbaE_doorbell_isr(pACB);
2847
2848                 host_interrupt_status = readl(&phbcmu->host_int_status);
2849         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2850                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2851         return IRQ_HANDLED;
2852 }
2853
2854 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2855 {
2856         switch (acb->adapter_type) {
2857         case ACB_ADAPTER_TYPE_A:
2858                 return arcmsr_hbaA_handle_isr(acb);
2859         case ACB_ADAPTER_TYPE_B:
2860                 return arcmsr_hbaB_handle_isr(acb);
2861         case ACB_ADAPTER_TYPE_C:
2862                 return arcmsr_hbaC_handle_isr(acb);
2863         case ACB_ADAPTER_TYPE_D:
2864                 return arcmsr_hbaD_handle_isr(acb);
2865         case ACB_ADAPTER_TYPE_E:
2866                 return arcmsr_hbaE_handle_isr(acb);
2867         case ACB_ADAPTER_TYPE_F:
2868                 return arcmsr_hbaF_handle_isr(acb);
2869         default:
2870                 return IRQ_NONE;
2871         }
2872 }
2873
2874 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2875 {
2876         if (acb) {
2877                 /* stop adapter background rebuild */
2878                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2879                         uint32_t intmask_org;
2880                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2881                         intmask_org = arcmsr_disable_outbound_ints(acb);
2882                         arcmsr_stop_adapter_bgrb(acb);
2883                         arcmsr_flush_adapter_cache(acb);
2884                         arcmsr_enable_outbound_ints(acb, intmask_org);
2885                 }
2886         }
2887 }
2888
2889
2890 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2891 {
2892         uint32_t        i;
2893
2894         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2895                 for (i = 0; i < 15; i++) {
2896                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2897                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2898                                 acb->rqbuf_getIndex = 0;
2899                                 acb->rqbuf_putIndex = 0;
2900                                 arcmsr_iop_message_read(acb);
2901                                 mdelay(30);
2902                         } else if (acb->rqbuf_getIndex !=
2903                                    acb->rqbuf_putIndex) {
2904                                 acb->rqbuf_getIndex = 0;
2905                                 acb->rqbuf_putIndex = 0;
2906                                 mdelay(30);
2907                         } else
2908                                 break;
2909                 }
2910         }
2911 }
2912
2913 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2914                 struct scsi_cmnd *cmd)
2915 {
2916         char *buffer;
2917         unsigned short use_sg;
2918         int retvalue = 0, transfer_len = 0;
2919         unsigned long flags;
2920         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2921         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2922                 (uint32_t)cmd->cmnd[6] << 16 |
2923                 (uint32_t)cmd->cmnd[7] << 8 |
2924                 (uint32_t)cmd->cmnd[8];
2925         struct scatterlist *sg;
2926
2927         use_sg = scsi_sg_count(cmd);
2928         sg = scsi_sglist(cmd);
2929         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2930         if (use_sg > 1) {
2931                 retvalue = ARCMSR_MESSAGE_FAIL;
2932                 goto message_out;
2933         }
2934         transfer_len += sg->length;
2935         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2936                 retvalue = ARCMSR_MESSAGE_FAIL;
2937                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2938                 goto message_out;
2939         }
2940         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2941         switch (controlcode) {
2942         case ARCMSR_MESSAGE_READ_RQBUFFER: {
2943                 unsigned char *ver_addr;
2944                 uint8_t *ptmpQbuffer;
2945                 uint32_t allxfer_len = 0;
2946                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2947                 if (!ver_addr) {
2948                         retvalue = ARCMSR_MESSAGE_FAIL;
2949                         pr_info("%s: memory not enough!\n", __func__);
2950                         goto message_out;
2951                 }
2952                 ptmpQbuffer = ver_addr;
2953                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2954                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2955                         unsigned int tail = acb->rqbuf_getIndex;
2956                         unsigned int head = acb->rqbuf_putIndex;
2957                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2958
2959                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2960                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2961                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2962
2963                         if (allxfer_len <= cnt_to_end)
2964                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2965                         else {
2966                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2967                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2968                         }
2969                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2970                 }
2971                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2972                         allxfer_len);
2973                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2974                         struct QBUFFER __iomem *prbuffer;
2975                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2976                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2977                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2978                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2979                 }
2980                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2981                 kfree(ver_addr);
2982                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2983                 if (acb->fw_flag == FW_DEADLOCK)
2984                         pcmdmessagefld->cmdmessage.ReturnCode =
2985                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2986                 else
2987                         pcmdmessagefld->cmdmessage.ReturnCode =
2988                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2989                 break;
2990         }
2991         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2992                 unsigned char *ver_addr;
2993                 uint32_t user_len;
2994                 int32_t cnt2end;
2995                 uint8_t *pQbuffer, *ptmpuserbuffer;
2996
2997                 user_len = pcmdmessagefld->cmdmessage.Length;
2998                 if (user_len > ARCMSR_API_DATA_BUFLEN) {
2999                         retvalue = ARCMSR_MESSAGE_FAIL;
3000                         goto message_out;
3001                 }
3002
3003                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
3004                 if (!ver_addr) {
3005                         retvalue = ARCMSR_MESSAGE_FAIL;
3006                         goto message_out;
3007                 }
3008                 ptmpuserbuffer = ver_addr;
3009
3010                 memcpy(ptmpuserbuffer,
3011                         pcmdmessagefld->messagedatabuffer, user_len);
3012                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3013                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
3014                         struct SENSE_DATA *sensebuffer =
3015                                 (struct SENSE_DATA *)cmd->sense_buffer;
3016                         arcmsr_write_ioctldata2iop(acb);
3017                         /* has error report sensedata */
3018                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
3019                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
3020                         sensebuffer->AdditionalSenseLength = 0x0A;
3021                         sensebuffer->AdditionalSenseCode = 0x20;
3022                         sensebuffer->Valid = 1;
3023                         retvalue = ARCMSR_MESSAGE_FAIL;
3024                 } else {
3025                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
3026                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
3027                         if (user_len > cnt2end) {
3028                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
3029                                 ptmpuserbuffer += cnt2end;
3030                                 user_len -= cnt2end;
3031                                 acb->wqbuf_putIndex = 0;
3032                                 pQbuffer = acb->wqbuffer;
3033                         }
3034                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
3035                         acb->wqbuf_putIndex += user_len;
3036                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
3037                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
3038                                 acb->acb_flags &=
3039                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
3040                                 arcmsr_write_ioctldata2iop(acb);
3041                         }
3042                 }
3043                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3044                 kfree(ver_addr);
3045                 if (acb->fw_flag == FW_DEADLOCK)
3046                         pcmdmessagefld->cmdmessage.ReturnCode =
3047                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3048                 else
3049                         pcmdmessagefld->cmdmessage.ReturnCode =
3050                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3051                 break;
3052         }
3053         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
3054                 uint8_t *pQbuffer = acb->rqbuffer;
3055
3056                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3057                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3058                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3059                 acb->rqbuf_getIndex = 0;
3060                 acb->rqbuf_putIndex = 0;
3061                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3062                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3063                 if (acb->fw_flag == FW_DEADLOCK)
3064                         pcmdmessagefld->cmdmessage.ReturnCode =
3065                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3066                 else
3067                         pcmdmessagefld->cmdmessage.ReturnCode =
3068                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3069                 break;
3070         }
3071         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
3072                 uint8_t *pQbuffer = acb->wqbuffer;
3073                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3074                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3075                         ACB_F_MESSAGE_WQBUFFER_READED);
3076                 acb->wqbuf_getIndex = 0;
3077                 acb->wqbuf_putIndex = 0;
3078                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3079                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3080                 if (acb->fw_flag == FW_DEADLOCK)
3081                         pcmdmessagefld->cmdmessage.ReturnCode =
3082                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3083                 else
3084                         pcmdmessagefld->cmdmessage.ReturnCode =
3085                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3086                 break;
3087         }
3088         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
3089                 uint8_t *pQbuffer;
3090                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3091                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3092                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3093                 acb->rqbuf_getIndex = 0;
3094                 acb->rqbuf_putIndex = 0;
3095                 pQbuffer = acb->rqbuffer;
3096                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3097                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3098                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3099                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3100                         ACB_F_MESSAGE_WQBUFFER_READED);
3101                 acb->wqbuf_getIndex = 0;
3102                 acb->wqbuf_putIndex = 0;
3103                 pQbuffer = acb->wqbuffer;
3104                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3105                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3106                 if (acb->fw_flag == FW_DEADLOCK)
3107                         pcmdmessagefld->cmdmessage.ReturnCode =
3108                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3109                 else
3110                         pcmdmessagefld->cmdmessage.ReturnCode =
3111                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3112                 break;
3113         }
3114         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
3115                 if (acb->fw_flag == FW_DEADLOCK)
3116                         pcmdmessagefld->cmdmessage.ReturnCode =
3117                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3118                 else
3119                         pcmdmessagefld->cmdmessage.ReturnCode =
3120                                 ARCMSR_MESSAGE_RETURNCODE_3F;
3121                 break;
3122         }
3123         case ARCMSR_MESSAGE_SAY_HELLO: {
3124                 int8_t *hello_string = "Hello! I am ARCMSR";
3125                 if (acb->fw_flag == FW_DEADLOCK)
3126                         pcmdmessagefld->cmdmessage.ReturnCode =
3127                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3128                 else
3129                         pcmdmessagefld->cmdmessage.ReturnCode =
3130                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3131                 memcpy(pcmdmessagefld->messagedatabuffer,
3132                         hello_string, (int16_t)strlen(hello_string));
3133                 break;
3134         }
3135         case ARCMSR_MESSAGE_SAY_GOODBYE: {
3136                 if (acb->fw_flag == FW_DEADLOCK)
3137                         pcmdmessagefld->cmdmessage.ReturnCode =
3138                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3139                 else
3140                         pcmdmessagefld->cmdmessage.ReturnCode =
3141                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3142                 arcmsr_iop_parking(acb);
3143                 break;
3144         }
3145         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
3146                 if (acb->fw_flag == FW_DEADLOCK)
3147                         pcmdmessagefld->cmdmessage.ReturnCode =
3148                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3149                 else
3150                         pcmdmessagefld->cmdmessage.ReturnCode =
3151                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3152                 arcmsr_flush_adapter_cache(acb);
3153                 break;
3154         }
3155         default:
3156                 retvalue = ARCMSR_MESSAGE_FAIL;
3157                 pr_info("%s: unknown controlcode!\n", __func__);
3158         }
3159 message_out:
3160         if (use_sg) {
3161                 struct scatterlist *sg = scsi_sglist(cmd);
3162                 kunmap_atomic(buffer - sg->offset);
3163         }
3164         return retvalue;
3165 }
3166
3167 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
3168 {
3169         struct list_head *head;
3170         struct CommandControlBlock *ccb = NULL;
3171         unsigned long flags;
3172
3173         spin_lock_irqsave(&acb->ccblist_lock, flags);
3174         head = &acb->ccb_free_list;
3175         if (!list_empty(head)) {
3176                 ccb = list_entry(head->next, struct CommandControlBlock, list);
3177                 list_del_init(&ccb->list);
3178         }else{
3179                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3180                 return NULL;
3181         }
3182         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3183         return ccb;
3184 }
3185
3186 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
3187                 struct scsi_cmnd *cmd)
3188 {
3189         switch (cmd->cmnd[0]) {
3190         case INQUIRY: {
3191                 unsigned char inqdata[36];
3192                 char *buffer;
3193                 struct scatterlist *sg;
3194
3195                 if (cmd->device->lun) {
3196                         cmd->result = (DID_TIME_OUT << 16);
3197                         scsi_done(cmd);
3198                         return;
3199                 }
3200                 inqdata[0] = TYPE_PROCESSOR;
3201                 /* Periph Qualifier & Periph Dev Type */
3202                 inqdata[1] = 0;
3203                 /* rem media bit & Dev Type Modifier */
3204                 inqdata[2] = 0;
3205                 /* ISO, ECMA, & ANSI versions */
3206                 inqdata[4] = 31;
3207                 /* length of additional data */
3208                 memcpy(&inqdata[8], "Areca   ", 8);
3209                 /* Vendor Identification */
3210                 memcpy(&inqdata[16], "RAID controller ", 16);
3211                 /* Product Identification */
3212                 memcpy(&inqdata[32], "R001", 4); /* Product Revision */
3213
3214                 sg = scsi_sglist(cmd);
3215                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
3216
3217                 memcpy(buffer, inqdata, sizeof(inqdata));
3218                 sg = scsi_sglist(cmd);
3219                 kunmap_atomic(buffer - sg->offset);
3220
3221                 scsi_done(cmd);
3222         }
3223         break;
3224         case WRITE_BUFFER:
3225         case READ_BUFFER: {
3226                 if (arcmsr_iop_message_xfer(acb, cmd))
3227                         cmd->result = (DID_ERROR << 16);
3228                 scsi_done(cmd);
3229         }
3230         break;
3231         default:
3232                 scsi_done(cmd);
3233         }
3234 }
3235
3236 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd)
3237 {
3238         struct Scsi_Host *host = cmd->device->host;
3239         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3240         struct CommandControlBlock *ccb;
3241         int target = cmd->device->id;
3242
3243         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3244                 cmd->result = (DID_NO_CONNECT << 16);
3245                 scsi_done(cmd);
3246                 return 0;
3247         }
3248         cmd->host_scribble = NULL;
3249         cmd->result = 0;
3250         if (target == 16) {
3251                 /* virtual device for iop message transfer */
3252                 arcmsr_handle_virtual_command(acb, cmd);
3253                 return 0;
3254         }
3255         ccb = arcmsr_get_freeccb(acb);
3256         if (!ccb)
3257                 return SCSI_MLQUEUE_HOST_BUSY;
3258         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3259                 cmd->result = (DID_ERROR << 16) | SAM_STAT_RESERVATION_CONFLICT;
3260                 scsi_done(cmd);
3261                 return 0;
3262         }
3263         arcmsr_post_ccb(acb, ccb);
3264         return 0;
3265 }
3266
3267 static DEF_SCSI_QCMD(arcmsr_queue_command)
3268
3269 static int arcmsr_slave_config(struct scsi_device *sdev)
3270 {
3271         unsigned int    dev_timeout;
3272
3273         dev_timeout = sdev->request_queue->rq_timeout;
3274         if ((cmd_timeout > 0) && ((cmd_timeout * HZ) > dev_timeout))
3275                 blk_queue_rq_timeout(sdev->request_queue, cmd_timeout * HZ);
3276         return 0;
3277 }
3278
3279 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3280 {
3281         int count;
3282         uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3283         uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3284         uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3285         uint32_t *firm_model = &rwbuffer[15];
3286         uint32_t *firm_version = &rwbuffer[17];
3287         uint32_t *device_map = &rwbuffer[21];
3288
3289         count = 2;
3290         while (count) {
3291                 *acb_firm_model = readl(firm_model);
3292                 acb_firm_model++;
3293                 firm_model++;
3294                 count--;
3295         }
3296         count = 4;
3297         while (count) {
3298                 *acb_firm_version = readl(firm_version);
3299                 acb_firm_version++;
3300                 firm_version++;
3301                 count--;
3302         }
3303         count = 4;
3304         while (count) {
3305                 *acb_device_map = readl(device_map);
3306                 acb_device_map++;
3307                 device_map++;
3308                 count--;
3309         }
3310         pACB->signature = readl(&rwbuffer[0]);
3311         pACB->firm_request_len = readl(&rwbuffer[1]);
3312         pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3313         pACB->firm_sdram_size = readl(&rwbuffer[3]);
3314         pACB->firm_hd_channels = readl(&rwbuffer[4]);
3315         pACB->firm_cfg_version = readl(&rwbuffer[25]);
3316         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3317                 pACB->host->host_no,
3318                 pACB->firm_model,
3319                 pACB->firm_version);
3320 }
3321
3322 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3323 {
3324         struct MessageUnit_A __iomem *reg = acb->pmuA;
3325
3326         arcmsr_wait_firmware_ready(acb);
3327         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3328         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3329                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3330                         miscellaneous data' timeout \n", acb->host->host_no);
3331                 return false;
3332         }
3333         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3334         return true;
3335 }
3336 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3337 {
3338         struct MessageUnit_B *reg = acb->pmuB;
3339
3340         arcmsr_wait_firmware_ready(acb);
3341         writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3342         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3343                 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3344                 return false;
3345         }
3346         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3347         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3348                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3349                         miscellaneous data' timeout \n", acb->host->host_no);
3350                 return false;
3351         }
3352         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3353         return true;
3354 }
3355
3356 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3357 {
3358         uint32_t intmask_org;
3359         struct MessageUnit_C __iomem *reg = pACB->pmuC;
3360
3361         /* disable all outbound interrupt */
3362         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3363         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3364         /* wait firmware ready */
3365         arcmsr_wait_firmware_ready(pACB);
3366         /* post "get config" instruction */
3367         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3368         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3369         /* wait message ready */
3370         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3371                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3372                         miscellaneous data' timeout \n", pACB->host->host_no);
3373                 return false;
3374         }
3375         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3376         return true;
3377 }
3378
3379 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3380 {
3381         struct MessageUnit_D *reg = acb->pmuD;
3382
3383         if (readl(acb->pmuD->outbound_doorbell) &
3384                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3385                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3386                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
3387         }
3388         arcmsr_wait_firmware_ready(acb);
3389         /* post "get config" instruction */
3390         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3391         /* wait message ready */
3392         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3393                 pr_notice("arcmsr%d: wait get adapter firmware "
3394                         "miscellaneous data timeout\n", acb->host->host_no);
3395                 return false;
3396         }
3397         arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3398         return true;
3399 }
3400
3401 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3402 {
3403         struct MessageUnit_E __iomem *reg = pACB->pmuE;
3404         uint32_t intmask_org;
3405
3406         /* disable all outbound interrupt */
3407         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3408         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3409         /* wait firmware ready */
3410         arcmsr_wait_firmware_ready(pACB);
3411         mdelay(20);
3412         /* post "get config" instruction */
3413         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3414
3415         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3416         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3417         /* wait message ready */
3418         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3419                 pr_notice("arcmsr%d: wait get adapter firmware "
3420                         "miscellaneous data timeout\n", pACB->host->host_no);
3421                 return false;
3422         }
3423         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3424         return true;
3425 }
3426
3427 static bool arcmsr_hbaF_get_config(struct AdapterControlBlock *pACB)
3428 {
3429         struct MessageUnit_F __iomem *reg = pACB->pmuF;
3430         uint32_t intmask_org;
3431
3432         /* disable all outbound interrupt */
3433         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3434         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3435         /* wait firmware ready */
3436         arcmsr_wait_firmware_ready(pACB);
3437         /* post "get config" instruction */
3438         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3439
3440         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3441         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3442         /* wait message ready */
3443         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3444                 pr_notice("arcmsr%d: wait get adapter firmware miscellaneous data timeout\n",
3445                           pACB->host->host_no);
3446                 return false;
3447         }
3448         arcmsr_get_adapter_config(pACB, pACB->msgcode_rwbuffer);
3449         return true;
3450 }
3451
3452 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3453 {
3454         bool rtn = false;
3455
3456         switch (acb->adapter_type) {
3457         case ACB_ADAPTER_TYPE_A:
3458                 rtn = arcmsr_hbaA_get_config(acb);
3459                 break;
3460         case ACB_ADAPTER_TYPE_B:
3461                 rtn = arcmsr_hbaB_get_config(acb);
3462                 break;
3463         case ACB_ADAPTER_TYPE_C:
3464                 rtn = arcmsr_hbaC_get_config(acb);
3465                 break;
3466         case ACB_ADAPTER_TYPE_D:
3467                 rtn = arcmsr_hbaD_get_config(acb);
3468                 break;
3469         case ACB_ADAPTER_TYPE_E:
3470                 rtn = arcmsr_hbaE_get_config(acb);
3471                 break;
3472         case ACB_ADAPTER_TYPE_F:
3473                 rtn = arcmsr_hbaF_get_config(acb);
3474                 break;
3475         default:
3476                 break;
3477         }
3478         acb->maxOutstanding = acb->firm_numbers_queue - 1;
3479         if (acb->host->can_queue >= acb->firm_numbers_queue)
3480                 acb->host->can_queue = acb->maxOutstanding;
3481         else
3482                 acb->maxOutstanding = acb->host->can_queue;
3483         acb->maxFreeCCB = acb->host->can_queue;
3484         if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3485                 acb->maxFreeCCB += 64;
3486         return rtn;
3487 }
3488
3489 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3490         struct CommandControlBlock *poll_ccb)
3491 {
3492         struct MessageUnit_A __iomem *reg = acb->pmuA;
3493         struct CommandControlBlock *ccb;
3494         struct ARCMSR_CDB *arcmsr_cdb;
3495         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3496         int rtn;
3497         bool error;
3498         unsigned long ccb_cdb_phy;
3499
3500 polling_hba_ccb_retry:
3501         poll_count++;
3502         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
3503         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
3504         while (1) {
3505                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
3506                         if (poll_ccb_done){
3507                                 rtn = SUCCESS;
3508                                 break;
3509                         }else {
3510                                 msleep(25);
3511                                 if (poll_count > 100){
3512                                         rtn = FAILED;
3513                                         break;
3514                                 }
3515                                 goto polling_hba_ccb_retry;
3516                         }
3517                 }
3518                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3519                 if (acb->cdb_phyadd_hipart)
3520                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3521                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3522                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3523                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3524                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3525                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3526                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3527                                         " poll command abort successfully \n"
3528                                         , acb->host->host_no
3529                                         , ccb->pcmd->device->id
3530                                         , (u32)ccb->pcmd->device->lun
3531                                         , ccb);
3532                                 ccb->pcmd->result = DID_ABORT << 16;
3533                                 arcmsr_ccb_complete(ccb);
3534                                 continue;
3535                         }
3536                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3537                                 " command done ccb = '0x%p'"
3538                                 "ccboutstandingcount = %d \n"
3539                                 , acb->host->host_no
3540                                 , ccb
3541                                 , atomic_read(&acb->ccboutstandingcount));
3542                         continue;
3543                 }
3544                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3545                 arcmsr_report_ccb_state(acb, ccb, error);
3546         }
3547         return rtn;
3548 }
3549
3550 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3551                                         struct CommandControlBlock *poll_ccb)
3552 {
3553         struct MessageUnit_B *reg = acb->pmuB;
3554         struct ARCMSR_CDB *arcmsr_cdb;
3555         struct CommandControlBlock *ccb;
3556         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3557         int index, rtn;
3558         bool error;
3559         unsigned long ccb_cdb_phy;
3560
3561 polling_hbb_ccb_retry:
3562         poll_count++;
3563         /* clear doorbell interrupt */
3564         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3565         while(1){
3566                 index = reg->doneq_index;
3567                 flag_ccb = reg->done_qbuffer[index];
3568                 if (flag_ccb == 0) {
3569                         if (poll_ccb_done){
3570                                 rtn = SUCCESS;
3571                                 break;
3572                         }else {
3573                                 msleep(25);
3574                                 if (poll_count > 100){
3575                                         rtn = FAILED;
3576                                         break;
3577                                 }
3578                                 goto polling_hbb_ccb_retry;
3579                         }
3580                 }
3581                 reg->done_qbuffer[index] = 0;
3582                 index++;
3583                 /*if last index number set it to 0 */
3584                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3585                 reg->doneq_index = index;
3586                 /* check if command done with no error*/
3587                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3588                 if (acb->cdb_phyadd_hipart)
3589                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3590                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3591                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3592                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3593                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3594                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3595                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3596                                         " poll command abort successfully \n"
3597                                         ,acb->host->host_no
3598                                         ,ccb->pcmd->device->id
3599                                         ,(u32)ccb->pcmd->device->lun
3600                                         ,ccb);
3601                                 ccb->pcmd->result = DID_ABORT << 16;
3602                                 arcmsr_ccb_complete(ccb);
3603                                 continue;
3604                         }
3605                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3606                                 " command done ccb = '0x%p'"
3607                                 "ccboutstandingcount = %d \n"
3608                                 , acb->host->host_no
3609                                 , ccb
3610                                 , atomic_read(&acb->ccboutstandingcount));
3611                         continue;
3612                 }
3613                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3614                 arcmsr_report_ccb_state(acb, ccb, error);
3615         }
3616         return rtn;
3617 }
3618
3619 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3620                 struct CommandControlBlock *poll_ccb)
3621 {
3622         struct MessageUnit_C __iomem *reg = acb->pmuC;
3623         uint32_t flag_ccb;
3624         struct ARCMSR_CDB *arcmsr_cdb;
3625         bool error;
3626         struct CommandControlBlock *pCCB;
3627         uint32_t poll_ccb_done = 0, poll_count = 0;
3628         int rtn;
3629         unsigned long ccb_cdb_phy;
3630
3631 polling_hbc_ccb_retry:
3632         poll_count++;
3633         while (1) {
3634                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3635                         if (poll_ccb_done) {
3636                                 rtn = SUCCESS;
3637                                 break;
3638                         } else {
3639                                 msleep(25);
3640                                 if (poll_count > 100) {
3641                                         rtn = FAILED;
3642                                         break;
3643                                 }
3644                                 goto polling_hbc_ccb_retry;
3645                         }
3646                 }
3647                 flag_ccb = readl(&reg->outbound_queueport_low);
3648                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3649                 if (acb->cdb_phyadd_hipart)
3650                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3651                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3652                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3653                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3654                 /* check ifcommand done with no error*/
3655                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3656                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3657                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3658                                         " poll command abort successfully \n"
3659                                         , acb->host->host_no
3660                                         , pCCB->pcmd->device->id
3661                                         , (u32)pCCB->pcmd->device->lun
3662                                         , pCCB);
3663                                 pCCB->pcmd->result = DID_ABORT << 16;
3664                                 arcmsr_ccb_complete(pCCB);
3665                                 continue;
3666                         }
3667                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3668                                 " command done ccb = '0x%p'"
3669                                 "ccboutstandingcount = %d \n"
3670                                 , acb->host->host_no
3671                                 , pCCB
3672                                 , atomic_read(&acb->ccboutstandingcount));
3673                         continue;
3674                 }
3675                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3676                 arcmsr_report_ccb_state(acb, pCCB, error);
3677         }
3678         return rtn;
3679 }
3680
3681 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3682                                 struct CommandControlBlock *poll_ccb)
3683 {
3684         bool error;
3685         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb;
3686         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3687         unsigned long flags, ccb_cdb_phy;
3688         struct ARCMSR_CDB *arcmsr_cdb;
3689         struct CommandControlBlock *pCCB;
3690         struct MessageUnit_D *pmu = acb->pmuD;
3691
3692 polling_hbaD_ccb_retry:
3693         poll_count++;
3694         while (1) {
3695                 spin_lock_irqsave(&acb->doneq_lock, flags);
3696                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3697                 doneq_index = pmu->doneq_index;
3698                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3699                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3700                         if (poll_ccb_done) {
3701                                 rtn = SUCCESS;
3702                                 break;
3703                         } else {
3704                                 msleep(25);
3705                                 if (poll_count > 40) {
3706                                         rtn = FAILED;
3707                                         break;
3708                                 }
3709                                 goto polling_hbaD_ccb_retry;
3710                         }
3711                 }
3712                 toggle = doneq_index & 0x4000;
3713                 index_stripped = (doneq_index & 0xFFF) + 1;
3714                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3715                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3716                                 ((toggle ^ 0x4000) + 1);
3717                 doneq_index = pmu->doneq_index;
3718                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3719                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3720                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3721                 if (acb->cdb_phyadd_hipart)
3722                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3723                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3724                         ccb_cdb_phy);
3725                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3726                         arcmsr_cdb);
3727                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3728                 if ((pCCB->acb != acb) ||
3729                         (pCCB->startdone != ARCMSR_CCB_START)) {
3730                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3731                                 pr_notice("arcmsr%d: scsi id = %d "
3732                                         "lun = %d ccb = '0x%p' poll command "
3733                                         "abort successfully\n"
3734                                         , acb->host->host_no
3735                                         , pCCB->pcmd->device->id
3736                                         , (u32)pCCB->pcmd->device->lun
3737                                         , pCCB);
3738                                 pCCB->pcmd->result = DID_ABORT << 16;
3739                                 arcmsr_ccb_complete(pCCB);
3740                                 continue;
3741                         }
3742                         pr_notice("arcmsr%d: polling an illegal "
3743                                 "ccb command done ccb = '0x%p' "
3744                                 "ccboutstandingcount = %d\n"
3745                                 , acb->host->host_no
3746                                 , pCCB
3747                                 , atomic_read(&acb->ccboutstandingcount));
3748                         continue;
3749                 }
3750                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3751                         ? true : false;
3752                 arcmsr_report_ccb_state(acb, pCCB, error);
3753         }
3754         return rtn;
3755 }
3756
3757 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3758                                 struct CommandControlBlock *poll_ccb)
3759 {
3760         bool error;
3761         uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3762         uint16_t cmdSMID;
3763         unsigned long flags;
3764         int rtn;
3765         struct CommandControlBlock *pCCB;
3766         struct MessageUnit_E __iomem *reg = acb->pmuE;
3767
3768         polling_hbaC_ccb_retry:
3769         poll_count++;
3770         while (1) {
3771                 spin_lock_irqsave(&acb->doneq_lock, flags);
3772                 doneq_index = acb->doneq_index;
3773                 if ((readl(&reg->reply_post_producer_index) & 0xFFFF) ==
3774                                 doneq_index) {
3775                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3776                         if (poll_ccb_done) {
3777                                 rtn = SUCCESS;
3778                                 break;
3779                         } else {
3780                                 msleep(25);
3781                                 if (poll_count > 40) {
3782                                         rtn = FAILED;
3783                                         break;
3784                                 }
3785                                 goto polling_hbaC_ccb_retry;
3786                         }
3787                 }
3788                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3789                 doneq_index++;
3790                 if (doneq_index >= acb->completionQ_entry)
3791                         doneq_index = 0;
3792                 acb->doneq_index = doneq_index;
3793                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3794                 pCCB = acb->pccb_pool[cmdSMID];
3795                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3796                 /* check if command done with no error*/
3797                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3798                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3799                                 pr_notice("arcmsr%d: scsi id = %d "
3800                                         "lun = %d ccb = '0x%p' poll command "
3801                                         "abort successfully\n"
3802                                         , acb->host->host_no
3803                                         , pCCB->pcmd->device->id
3804                                         , (u32)pCCB->pcmd->device->lun
3805                                         , pCCB);
3806                                 pCCB->pcmd->result = DID_ABORT << 16;
3807                                 arcmsr_ccb_complete(pCCB);
3808                                 continue;
3809                         }
3810                         pr_notice("arcmsr%d: polling an illegal "
3811                                 "ccb command done ccb = '0x%p' "
3812                                 "ccboutstandingcount = %d\n"
3813                                 , acb->host->host_no
3814                                 , pCCB
3815                                 , atomic_read(&acb->ccboutstandingcount));
3816                         continue;
3817                 }
3818                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3819                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3820                 arcmsr_report_ccb_state(acb, pCCB, error);
3821         }
3822         writel(doneq_index, &reg->reply_post_consumer_index);
3823         return rtn;
3824 }
3825
3826 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3827                                         struct CommandControlBlock *poll_ccb)
3828 {
3829         int rtn = 0;
3830         switch (acb->adapter_type) {
3831
3832         case ACB_ADAPTER_TYPE_A:
3833                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3834                 break;
3835         case ACB_ADAPTER_TYPE_B:
3836                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3837                 break;
3838         case ACB_ADAPTER_TYPE_C:
3839                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3840                 break;
3841         case ACB_ADAPTER_TYPE_D:
3842                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3843                 break;
3844         case ACB_ADAPTER_TYPE_E:
3845         case ACB_ADAPTER_TYPE_F:
3846                 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3847                 break;
3848         }
3849         return rtn;
3850 }
3851
3852 static void arcmsr_set_iop_datetime(struct timer_list *t)
3853 {
3854         struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3855         unsigned int next_time;
3856         struct tm tm;
3857
3858         union {
3859                 struct  {
3860                 uint16_t        signature;
3861                 uint8_t         year;
3862                 uint8_t         month;
3863                 uint8_t         date;
3864                 uint8_t         hour;
3865                 uint8_t         minute;
3866                 uint8_t         second;
3867                 } a;
3868                 struct  {
3869                 uint32_t        msg_time[2];
3870                 } b;
3871         } datetime;
3872
3873         time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3874
3875         datetime.a.signature = 0x55AA;
3876         datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3877         datetime.a.month = tm.tm_mon;
3878         datetime.a.date = tm.tm_mday;
3879         datetime.a.hour = tm.tm_hour;
3880         datetime.a.minute = tm.tm_min;
3881         datetime.a.second = tm.tm_sec;
3882
3883         switch (pacb->adapter_type) {
3884                 case ACB_ADAPTER_TYPE_A: {
3885                         struct MessageUnit_A __iomem *reg = pacb->pmuA;
3886                         writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
3887                         writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
3888                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3889                         break;
3890                 }
3891                 case ACB_ADAPTER_TYPE_B: {
3892                         uint32_t __iomem *rwbuffer;
3893                         struct MessageUnit_B *reg = pacb->pmuB;
3894                         rwbuffer = reg->message_rwbuffer;
3895                         writel(datetime.b.msg_time[0], rwbuffer++);
3896                         writel(datetime.b.msg_time[1], rwbuffer++);
3897                         writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3898                         break;
3899                 }
3900                 case ACB_ADAPTER_TYPE_C: {
3901                         struct MessageUnit_C __iomem *reg = pacb->pmuC;
3902                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3903                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3904                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3905                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3906                         break;
3907                 }
3908                 case ACB_ADAPTER_TYPE_D: {
3909                         uint32_t __iomem *rwbuffer;
3910                         struct MessageUnit_D *reg = pacb->pmuD;
3911                         rwbuffer = reg->msgcode_rwbuffer;
3912                         writel(datetime.b.msg_time[0], rwbuffer++);
3913                         writel(datetime.b.msg_time[1], rwbuffer++);
3914                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3915                         break;
3916                 }
3917                 case ACB_ADAPTER_TYPE_E: {
3918                         struct MessageUnit_E __iomem *reg = pacb->pmuE;
3919                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3920                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3921                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3922                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3923                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3924                         break;
3925                 }
3926                 case ACB_ADAPTER_TYPE_F: {
3927                         struct MessageUnit_F __iomem *reg = pacb->pmuF;
3928
3929                         pacb->msgcode_rwbuffer[0] = datetime.b.msg_time[0];
3930                         pacb->msgcode_rwbuffer[1] = datetime.b.msg_time[1];
3931                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3932                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3933                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3934                         break;
3935                 }
3936         }
3937         if (sys_tz.tz_minuteswest)
3938                 next_time = ARCMSR_HOURS;
3939         else
3940                 next_time = ARCMSR_MINUTES;
3941         mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3942 }
3943
3944 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3945 {
3946         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3947         dma_addr_t dma_coherent_handle;
3948
3949         /*
3950         ********************************************************************
3951         ** here we need to tell iop 331 our freeccb.HighPart
3952         ** if freeccb.HighPart is not zero
3953         ********************************************************************
3954         */
3955         switch (acb->adapter_type) {
3956         case ACB_ADAPTER_TYPE_B:
3957         case ACB_ADAPTER_TYPE_D:
3958                 dma_coherent_handle = acb->dma_coherent_handle2;
3959                 break;
3960         case ACB_ADAPTER_TYPE_E:
3961         case ACB_ADAPTER_TYPE_F:
3962                 dma_coherent_handle = acb->dma_coherent_handle +
3963                         offsetof(struct CommandControlBlock, arcmsr_cdb);
3964                 break;
3965         default:
3966                 dma_coherent_handle = acb->dma_coherent_handle;
3967                 break;
3968         }
3969         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3970         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3971         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3972         acb->cdb_phyadd_hipart = ((uint64_t)cdb_phyaddr_hi32) << 32;
3973         /*
3974         ***********************************************************************
3975         **    if adapter type B, set window of "post command Q"
3976         ***********************************************************************
3977         */
3978         switch (acb->adapter_type) {
3979
3980         case ACB_ADAPTER_TYPE_A: {
3981                 if (cdb_phyaddr_hi32 != 0) {
3982                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3983                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3984                                                 &reg->message_rwbuffer[0]);
3985                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
3986                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3987                                                         &reg->inbound_msgaddr0);
3988                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3989                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3990                                 part physical address timeout\n",
3991                                 acb->host->host_no);
3992                                 return 1;
3993                         }
3994                 }
3995                 }
3996                 break;
3997
3998         case ACB_ADAPTER_TYPE_B: {
3999                 uint32_t __iomem *rwbuffer;
4000
4001                 struct MessageUnit_B *reg = acb->pmuB;
4002                 reg->postq_index = 0;
4003                 reg->doneq_index = 0;
4004                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
4005                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4006                         printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
4007                                 acb->host->host_no);
4008                         return 1;
4009                 }
4010                 rwbuffer = reg->message_rwbuffer;
4011                 /* driver "set config" signature */
4012                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4013                 /* normal should be zero */
4014                 writel(cdb_phyaddr_hi32, rwbuffer++);
4015                 /* postQ size (256 + 8)*4        */
4016                 writel(cdb_phyaddr, rwbuffer++);
4017                 /* doneQ size (256 + 8)*4        */
4018                 writel(cdb_phyaddr + 1056, rwbuffer++);
4019                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
4020                 writel(1056, rwbuffer);
4021
4022                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
4023                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4024                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4025                         timeout \n",acb->host->host_no);
4026                         return 1;
4027                 }
4028                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
4029                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4030                         pr_err("arcmsr%d: can't set driver mode.\n",
4031                                 acb->host->host_no);
4032                         return 1;
4033                 }
4034                 }
4035                 break;
4036         case ACB_ADAPTER_TYPE_C: {
4037                         struct MessageUnit_C __iomem *reg = acb->pmuC;
4038
4039                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
4040                                         acb->adapter_index, cdb_phyaddr_hi32);
4041                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
4042                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
4043                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4044                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
4045                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
4046                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4047                                 timeout \n", acb->host->host_no);
4048                                 return 1;
4049                         }
4050                 }
4051                 break;
4052         case ACB_ADAPTER_TYPE_D: {
4053                 uint32_t __iomem *rwbuffer;
4054                 struct MessageUnit_D *reg = acb->pmuD;
4055                 reg->postq_index = 0;
4056                 reg->doneq_index = 0;
4057                 rwbuffer = reg->msgcode_rwbuffer;
4058                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4059                 writel(cdb_phyaddr_hi32, rwbuffer++);
4060                 writel(cdb_phyaddr, rwbuffer++);
4061                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
4062                         sizeof(struct InBound_SRB)), rwbuffer++);
4063                 writel(0x100, rwbuffer);
4064                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
4065                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
4066                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4067                                 acb->host->host_no);
4068                         return 1;
4069                 }
4070                 }
4071                 break;
4072         case ACB_ADAPTER_TYPE_E: {
4073                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4074                 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
4075                 writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
4076                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
4077                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
4078                 writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
4079                 writel(lower_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[5]);
4080                 writel(upper_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[6]);
4081                 writel(acb->ioqueue_size, &reg->msgcode_rwbuffer[7]);
4082                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4083                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4084                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4085                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4086                         pr_notice("arcmsr%d: 'set command Q window' timeout \n",
4087                                 acb->host->host_no);
4088                         return 1;
4089                 }
4090                 }
4091                 break;
4092         case ACB_ADAPTER_TYPE_F: {
4093                 struct MessageUnit_F __iomem *reg = acb->pmuF;
4094
4095                 acb->msgcode_rwbuffer[0] = ARCMSR_SIGNATURE_SET_CONFIG;
4096                 acb->msgcode_rwbuffer[1] = ARCMSR_SIGNATURE_1886;
4097                 acb->msgcode_rwbuffer[2] = cdb_phyaddr;
4098                 acb->msgcode_rwbuffer[3] = cdb_phyaddr_hi32;
4099                 acb->msgcode_rwbuffer[4] = acb->ccbsize;
4100                 acb->msgcode_rwbuffer[5] = lower_32_bits(acb->dma_coherent_handle2);
4101                 acb->msgcode_rwbuffer[6] = upper_32_bits(acb->dma_coherent_handle2);
4102                 acb->msgcode_rwbuffer[7] = acb->completeQ_size;
4103                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4104                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4105                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4106                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4107                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4108                                 acb->host->host_no);
4109                         return 1;
4110                 }
4111                 }
4112                 break;
4113         }
4114         return 0;
4115 }
4116
4117 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
4118 {
4119         uint32_t firmware_state = 0;
4120         switch (acb->adapter_type) {
4121
4122         case ACB_ADAPTER_TYPE_A: {
4123                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4124                 do {
4125                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4126                                 msleep(20);
4127                         firmware_state = readl(&reg->outbound_msgaddr1);
4128                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
4129                 }
4130                 break;
4131
4132         case ACB_ADAPTER_TYPE_B: {
4133                 struct MessageUnit_B *reg = acb->pmuB;
4134                 do {
4135                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4136                                 msleep(20);
4137                         firmware_state = readl(reg->iop2drv_doorbell);
4138                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
4139                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
4140                 }
4141                 break;
4142         case ACB_ADAPTER_TYPE_C: {
4143                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4144                 do {
4145                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4146                                 msleep(20);
4147                         firmware_state = readl(&reg->outbound_msgaddr1);
4148                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
4149                 }
4150                 break;
4151         case ACB_ADAPTER_TYPE_D: {
4152                 struct MessageUnit_D *reg = acb->pmuD;
4153                 do {
4154                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4155                                 msleep(20);
4156                         firmware_state = readl(reg->outbound_msgaddr1);
4157                 } while ((firmware_state &
4158                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
4159                 }
4160                 break;
4161         case ACB_ADAPTER_TYPE_E:
4162         case ACB_ADAPTER_TYPE_F: {
4163                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4164                 do {
4165                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4166                                 msleep(20);
4167                         firmware_state = readl(&reg->outbound_msgaddr1);
4168                 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
4169                 }
4170                 break;
4171         }
4172 }
4173
4174 static void arcmsr_request_device_map(struct timer_list *t)
4175 {
4176         struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
4177         if (acb->acb_flags & (ACB_F_MSG_GET_CONFIG | ACB_F_BUS_RESET | ACB_F_ABORT)) {
4178                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4179         } else {
4180                 acb->fw_flag = FW_NORMAL;
4181                 switch (acb->adapter_type) {
4182                 case ACB_ADAPTER_TYPE_A: {
4183                         struct MessageUnit_A __iomem *reg = acb->pmuA;
4184                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4185                         break;
4186                         }
4187                 case ACB_ADAPTER_TYPE_B: {
4188                         struct MessageUnit_B *reg = acb->pmuB;
4189                         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
4190                         break;
4191                         }
4192                 case ACB_ADAPTER_TYPE_C: {
4193                         struct MessageUnit_C __iomem *reg = acb->pmuC;
4194                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4195                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
4196                         break;
4197                         }
4198                 case ACB_ADAPTER_TYPE_D: {
4199                         struct MessageUnit_D *reg = acb->pmuD;
4200                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
4201                         break;
4202                         }
4203                 case ACB_ADAPTER_TYPE_E: {
4204                         struct MessageUnit_E __iomem *reg = acb->pmuE;
4205                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4206                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4207                         writel(acb->out_doorbell, &reg->iobound_doorbell);
4208                         break;
4209                         }
4210                 case ACB_ADAPTER_TYPE_F: {
4211                         struct MessageUnit_F __iomem *reg = acb->pmuF;
4212                         uint32_t outMsg1 = readl(&reg->outbound_msgaddr1);
4213
4214                         if (!(outMsg1 & ARCMSR_HBFMU_MESSAGE_FIRMWARE_OK) ||
4215                                 (outMsg1 & ARCMSR_HBFMU_MESSAGE_NO_VOLUME_CHANGE))
4216                                 goto nxt6s;
4217                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4218                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4219                         writel(acb->out_doorbell, &reg->iobound_doorbell);
4220                         break;
4221                         }
4222                 default:
4223                         return;
4224                 }
4225                 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
4226 nxt6s:
4227                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4228         }
4229 }
4230
4231 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
4232 {
4233         struct MessageUnit_A __iomem *reg = acb->pmuA;
4234         acb->acb_flags |= ACB_F_MSG_START_BGRB;
4235         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
4236         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
4237                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4238                                 rebuild' timeout \n", acb->host->host_no);
4239         }
4240 }
4241
4242 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
4243 {
4244         struct MessageUnit_B *reg = acb->pmuB;
4245         acb->acb_flags |= ACB_F_MSG_START_BGRB;
4246         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
4247         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4248                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4249                                 rebuild' timeout \n",acb->host->host_no);
4250         }
4251 }
4252
4253 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
4254 {
4255         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
4256         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4257         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
4258         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
4259         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
4260                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4261                                 rebuild' timeout \n", pACB->host->host_no);
4262         }
4263         return;
4264 }
4265
4266 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
4267 {
4268         struct MessageUnit_D *pmu = pACB->pmuD;
4269
4270         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4271         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
4272         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
4273                 pr_notice("arcmsr%d: wait 'start adapter "
4274                         "background rebuild' timeout\n", pACB->host->host_no);
4275         }
4276 }
4277
4278 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
4279 {
4280         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
4281
4282         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4283         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
4284         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4285         writel(pACB->out_doorbell, &pmu->iobound_doorbell);
4286         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
4287                 pr_notice("arcmsr%d: wait 'start adapter "
4288                         "background rebuild' timeout \n", pACB->host->host_no);
4289         }
4290 }
4291
4292 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
4293 {
4294         switch (acb->adapter_type) {
4295         case ACB_ADAPTER_TYPE_A:
4296                 arcmsr_hbaA_start_bgrb(acb);
4297                 break;
4298         case ACB_ADAPTER_TYPE_B:
4299                 arcmsr_hbaB_start_bgrb(acb);
4300                 break;
4301         case ACB_ADAPTER_TYPE_C:
4302                 arcmsr_hbaC_start_bgrb(acb);
4303                 break;
4304         case ACB_ADAPTER_TYPE_D:
4305                 arcmsr_hbaD_start_bgrb(acb);
4306                 break;
4307         case ACB_ADAPTER_TYPE_E:
4308         case ACB_ADAPTER_TYPE_F:
4309                 arcmsr_hbaE_start_bgrb(acb);
4310                 break;
4311         }
4312 }
4313
4314 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4315 {
4316         switch (acb->adapter_type) {
4317         case ACB_ADAPTER_TYPE_A: {
4318                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4319                 uint32_t outbound_doorbell;
4320                 /* empty doorbell Qbuffer if door bell ringed */
4321                 outbound_doorbell = readl(&reg->outbound_doorbell);
4322                 /*clear doorbell interrupt */
4323                 writel(outbound_doorbell, &reg->outbound_doorbell);
4324                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
4325                 }
4326                 break;
4327
4328         case ACB_ADAPTER_TYPE_B: {
4329                 struct MessageUnit_B *reg = acb->pmuB;
4330                 uint32_t outbound_doorbell, i;
4331                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4332                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4333                 /* let IOP know data has been read */
4334                 for(i=0; i < 200; i++) {
4335                         msleep(20);
4336                         outbound_doorbell = readl(reg->iop2drv_doorbell);
4337                         if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4338                                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4339                                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4340                         } else
4341                                 break;
4342                 }
4343                 }
4344                 break;
4345         case ACB_ADAPTER_TYPE_C: {
4346                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4347                 uint32_t outbound_doorbell, i;
4348                 /* empty doorbell Qbuffer if door bell ringed */
4349                 outbound_doorbell = readl(&reg->outbound_doorbell);
4350                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
4351                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
4352                 for (i = 0; i < 200; i++) {
4353                         msleep(20);
4354                         outbound_doorbell = readl(&reg->outbound_doorbell);
4355                         if (outbound_doorbell &
4356                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4357                                 writel(outbound_doorbell,
4358                                         &reg->outbound_doorbell_clear);
4359                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4360                                         &reg->inbound_doorbell);
4361                         } else
4362                                 break;
4363                 }
4364                 }
4365                 break;
4366         case ACB_ADAPTER_TYPE_D: {
4367                 struct MessageUnit_D *reg = acb->pmuD;
4368                 uint32_t outbound_doorbell, i;
4369                 /* empty doorbell Qbuffer if door bell ringed */
4370                 outbound_doorbell = readl(reg->outbound_doorbell);
4371                 writel(outbound_doorbell, reg->outbound_doorbell);
4372                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4373                         reg->inbound_doorbell);
4374                 for (i = 0; i < 200; i++) {
4375                         msleep(20);
4376                         outbound_doorbell = readl(reg->outbound_doorbell);
4377                         if (outbound_doorbell &
4378                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4379                                 writel(outbound_doorbell,
4380                                         reg->outbound_doorbell);
4381                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4382                                         reg->inbound_doorbell);
4383                         } else
4384                                 break;
4385                 }
4386                 }
4387                 break;
4388         case ACB_ADAPTER_TYPE_E:
4389         case ACB_ADAPTER_TYPE_F: {
4390                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4391                 uint32_t i, tmp;
4392
4393                 acb->in_doorbell = readl(&reg->iobound_doorbell);
4394                 writel(0, &reg->host_int_status); /*clear interrupt*/
4395                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4396                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4397                 for(i=0; i < 200; i++) {
4398                         msleep(20);
4399                         tmp = acb->in_doorbell;
4400                         acb->in_doorbell = readl(&reg->iobound_doorbell);
4401                         if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4402                                 writel(0, &reg->host_int_status); /*clear interrupt*/
4403                                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4404                                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4405                         } else
4406                                 break;
4407                 }
4408                 }
4409                 break;
4410         }
4411 }
4412
4413 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4414 {
4415         switch (acb->adapter_type) {
4416         case ACB_ADAPTER_TYPE_A:
4417                 return;
4418         case ACB_ADAPTER_TYPE_B:
4419                 {
4420                         struct MessageUnit_B *reg = acb->pmuB;
4421                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4422                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4423                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4424                                 return;
4425                         }
4426                 }
4427                 break;
4428         case ACB_ADAPTER_TYPE_C:
4429                 return;
4430         }
4431         return;
4432 }
4433
4434 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4435 {
4436         uint8_t value[64];
4437         int i, count = 0;
4438         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4439         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4440         struct MessageUnit_D *pmuD = acb->pmuD;
4441
4442         /* backup pci config data */
4443         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4444         for (i = 0; i < 64; i++) {
4445                 pci_read_config_byte(acb->pdev, i, &value[i]);
4446         }
4447         /* hardware reset signal */
4448         if (acb->dev_id == 0x1680) {
4449                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4450         } else if (acb->dev_id == 0x1880) {
4451                 do {
4452                         count++;
4453                         writel(0xF, &pmuC->write_sequence);
4454                         writel(0x4, &pmuC->write_sequence);
4455                         writel(0xB, &pmuC->write_sequence);
4456                         writel(0x2, &pmuC->write_sequence);
4457                         writel(0x7, &pmuC->write_sequence);
4458                         writel(0xD, &pmuC->write_sequence);
4459                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4460                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4461         } else if (acb->dev_id == 0x1884) {
4462                 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4463                 do {
4464                         count++;
4465                         writel(0x4, &pmuE->write_sequence_3xxx);
4466                         writel(0xB, &pmuE->write_sequence_3xxx);
4467                         writel(0x2, &pmuE->write_sequence_3xxx);
4468                         writel(0x7, &pmuE->write_sequence_3xxx);
4469                         writel(0xD, &pmuE->write_sequence_3xxx);
4470                         mdelay(10);
4471                 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4472                         ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4473                 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4474         } else if (acb->dev_id == 0x1214) {
4475                 writel(0x20, pmuD->reset_request);
4476         } else {
4477                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4478         }
4479         msleep(2000);
4480         /* write back pci config data */
4481         for (i = 0; i < 64; i++) {
4482                 pci_write_config_byte(acb->pdev, i, value[i]);
4483         }
4484         msleep(1000);
4485         return;
4486 }
4487
4488 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4489 {
4490         bool rtn = true;
4491
4492         switch(acb->adapter_type) {
4493         case ACB_ADAPTER_TYPE_A:{
4494                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4495                 rtn = ((readl(&reg->outbound_msgaddr1) &
4496                         ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4497                 }
4498                 break;
4499         case ACB_ADAPTER_TYPE_B:{
4500                 struct MessageUnit_B *reg = acb->pmuB;
4501                 rtn = ((readl(reg->iop2drv_doorbell) &
4502                         ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4503                 }
4504                 break;
4505         case ACB_ADAPTER_TYPE_C:{
4506                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4507                 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
4508                 }
4509                 break;
4510         case ACB_ADAPTER_TYPE_D:{
4511                 struct MessageUnit_D *reg = acb->pmuD;
4512                 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4513                         true : false;
4514                 }
4515                 break;
4516         case ACB_ADAPTER_TYPE_E:
4517         case ACB_ADAPTER_TYPE_F:{
4518                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4519                 rtn = (readl(&reg->host_diagnostic_3xxx) &
4520                         ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4521                 }
4522                 break;
4523         }
4524         return rtn;
4525 }
4526
4527 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4528 {
4529         uint32_t intmask_org;
4530         /* disable all outbound interrupt */
4531         intmask_org = arcmsr_disable_outbound_ints(acb);
4532         arcmsr_wait_firmware_ready(acb);
4533         arcmsr_iop_confirm(acb);
4534         /*start background rebuild*/
4535         arcmsr_start_adapter_bgrb(acb);
4536         /* empty doorbell Qbuffer if door bell ringed */
4537         arcmsr_clear_doorbell_queue_buffer(acb);
4538         arcmsr_enable_eoi_mode(acb);
4539         /* enable outbound Post Queue,outbound doorbell Interrupt */
4540         arcmsr_enable_outbound_ints(acb, intmask_org);
4541         acb->acb_flags |= ACB_F_IOP_INITED;
4542 }
4543
4544 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4545 {
4546         struct CommandControlBlock *ccb;
4547         uint32_t intmask_org;
4548         uint8_t rtnval = 0x00;
4549         int i = 0;
4550         unsigned long flags;
4551
4552         if (atomic_read(&acb->ccboutstandingcount) != 0) {
4553                 /* disable all outbound interrupt */
4554                 intmask_org = arcmsr_disable_outbound_ints(acb);
4555                 /* talk to iop 331 outstanding command aborted */
4556                 rtnval = arcmsr_abort_allcmd(acb);
4557                 /* clear all outbound posted Q */
4558                 arcmsr_done4abort_postqueue(acb);
4559                 for (i = 0; i < acb->maxFreeCCB; i++) {
4560                         ccb = acb->pccb_pool[i];
4561                         if (ccb->startdone == ARCMSR_CCB_START) {
4562                                 scsi_dma_unmap(ccb->pcmd);
4563                                 ccb->startdone = ARCMSR_CCB_DONE;
4564                                 ccb->ccb_flags = 0;
4565                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
4566                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
4567                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4568                         }
4569                 }
4570                 atomic_set(&acb->ccboutstandingcount, 0);
4571                 /* enable all outbound interrupt */
4572                 arcmsr_enable_outbound_ints(acb, intmask_org);
4573                 return rtnval;
4574         }
4575         return rtnval;
4576 }
4577
4578 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4579 {
4580         struct AdapterControlBlock *acb;
4581         int retry_count = 0;
4582         int rtn = FAILED;
4583         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4584         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4585                 return SUCCESS;
4586         pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4587                 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4588         acb->num_resets++;
4589
4590         if (acb->acb_flags & ACB_F_BUS_RESET) {
4591                 long timeout;
4592                 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4593                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4594                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
4595                 if (timeout)
4596                         return SUCCESS;
4597         }
4598         acb->acb_flags |= ACB_F_BUS_RESET;
4599         if (!arcmsr_iop_reset(acb)) {
4600                 arcmsr_hardware_reset(acb);
4601                 acb->acb_flags &= ~ACB_F_IOP_INITED;
4602 wait_reset_done:
4603                 ssleep(ARCMSR_SLEEPTIME);
4604                 if (arcmsr_reset_in_progress(acb)) {
4605                         if (retry_count > ARCMSR_RETRYCOUNT) {
4606                                 acb->fw_flag = FW_DEADLOCK;
4607                                 pr_notice("arcmsr%d: waiting for hw bus reset"
4608                                         " return, RETRY TERMINATED!!\n",
4609                                         acb->host->host_no);
4610                                 return FAILED;
4611                         }
4612                         retry_count++;
4613                         goto wait_reset_done;
4614                 }
4615                 arcmsr_iop_init(acb);
4616                 acb->fw_flag = FW_NORMAL;
4617                 mod_timer(&acb->eternal_timer, jiffies +
4618                         msecs_to_jiffies(6 * HZ));
4619                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4620                 rtn = SUCCESS;
4621                 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4622         } else {
4623                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4624                 acb->fw_flag = FW_NORMAL;
4625                 mod_timer(&acb->eternal_timer, jiffies +
4626                         msecs_to_jiffies(6 * HZ));
4627                 rtn = SUCCESS;
4628         }
4629         return rtn;
4630 }
4631
4632 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4633                 struct CommandControlBlock *ccb)
4634 {
4635         int rtn;
4636         rtn = arcmsr_polling_ccbdone(acb, ccb);
4637         return rtn;
4638 }
4639
4640 static int arcmsr_abort(struct scsi_cmnd *cmd)
4641 {
4642         struct AdapterControlBlock *acb =
4643                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4644         int i = 0;
4645         int rtn = FAILED;
4646         uint32_t intmask_org;
4647
4648         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4649                 return SUCCESS;
4650         printk(KERN_NOTICE
4651                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4652                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4653         acb->acb_flags |= ACB_F_ABORT;
4654         acb->num_aborts++;
4655         /*
4656         ************************************************
4657         ** the all interrupt service routine is locked
4658         ** we need to handle it as soon as possible and exit
4659         ************************************************
4660         */
4661         if (!atomic_read(&acb->ccboutstandingcount)) {
4662                 acb->acb_flags &= ~ACB_F_ABORT;
4663                 return rtn;
4664         }
4665
4666         intmask_org = arcmsr_disable_outbound_ints(acb);
4667         for (i = 0; i < acb->maxFreeCCB; i++) {
4668                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4669                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4670                         ccb->startdone = ARCMSR_CCB_ABORTED;
4671                         rtn = arcmsr_abort_one_cmd(acb, ccb);
4672                         break;
4673                 }
4674         }
4675         acb->acb_flags &= ~ACB_F_ABORT;
4676         arcmsr_enable_outbound_ints(acb, intmask_org);
4677         return rtn;
4678 }
4679
4680 static const char *arcmsr_info(struct Scsi_Host *host)
4681 {
4682         struct AdapterControlBlock *acb =
4683                 (struct AdapterControlBlock *) host->hostdata;
4684         static char buf[256];
4685         char *type;
4686         int raid6 = 1;
4687         switch (acb->pdev->device) {
4688         case PCI_DEVICE_ID_ARECA_1110:
4689         case PCI_DEVICE_ID_ARECA_1200:
4690         case PCI_DEVICE_ID_ARECA_1202:
4691         case PCI_DEVICE_ID_ARECA_1210:
4692                 raid6 = 0;
4693                 fallthrough;
4694         case PCI_DEVICE_ID_ARECA_1120:
4695         case PCI_DEVICE_ID_ARECA_1130:
4696         case PCI_DEVICE_ID_ARECA_1160:
4697         case PCI_DEVICE_ID_ARECA_1170:
4698         case PCI_DEVICE_ID_ARECA_1201:
4699         case PCI_DEVICE_ID_ARECA_1203:
4700         case PCI_DEVICE_ID_ARECA_1220:
4701         case PCI_DEVICE_ID_ARECA_1230:
4702         case PCI_DEVICE_ID_ARECA_1260:
4703         case PCI_DEVICE_ID_ARECA_1270:
4704         case PCI_DEVICE_ID_ARECA_1280:
4705                 type = "SATA";
4706                 break;
4707         case PCI_DEVICE_ID_ARECA_1214:
4708         case PCI_DEVICE_ID_ARECA_1380:
4709         case PCI_DEVICE_ID_ARECA_1381:
4710         case PCI_DEVICE_ID_ARECA_1680:
4711         case PCI_DEVICE_ID_ARECA_1681:
4712         case PCI_DEVICE_ID_ARECA_1880:
4713         case PCI_DEVICE_ID_ARECA_1883:
4714         case PCI_DEVICE_ID_ARECA_1884:
4715                 type = "SAS/SATA";
4716                 break;
4717         case PCI_DEVICE_ID_ARECA_1886_0:
4718         case PCI_DEVICE_ID_ARECA_1886:
4719                 type = "NVMe/SAS/SATA";
4720                 break;
4721         default:
4722                 type = "unknown";
4723                 raid6 = 0;
4724                 break;
4725         }
4726         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4727                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4728         return buf;
4729 }