4 #define NUM_OF_REGISTERS 0x10
11 #define SYSCONFIG1 0x04
12 #define SYSCONFIG2 0x05
13 #define SYSCONFIG3 0x06
16 #define BOOTCONFIG 0x09
17 #define STATUSRSSI 0x0A
24 /***********POWERCFG************/
25 #define POWERCFG_DSMUTE 0x8000
26 #define POWERCFG_DMUTE 0x4000
27 #define POWERCFG_MONO 0x2000
28 #define POWERCFG_RDSM 0x0800
29 #define POWERCFG_SKMODE 0x0400
30 #define POWERCFG_SEEKUP 0x0200
31 #define POWERCFG_SEEK 0x0100
32 #define POWERCFG_DISABLE 0x0040
33 #define POWERCFG_ENABLE 0x0001
34 /************************************/
36 /***********CHANNEL************/
37 #define CHANNEL_TUNE 0x8000
38 /************************************/
40 /***********SYSCONFIG1************/
41 #define SYSCONFIG1_RDSIEN 0x8000
42 #define SYSCONFIG1_STCIEN 0x4000
43 #define SYSCONFIG1_RDS 0x1000
44 #define SYSCONFIG1_DE 0x0800
45 #define SYSCONFIG1_AGCD 0x0400
46 #define SYSCONFIG1_BLNDADJ1 0x0080
47 #define SYSCONFIG1_BLNDADJ0 0x0040
48 #define SYSCONFIG1_GPO1 0x0008
49 #define SYSCONFIG1_GPO0 0x0004
50 /************************************/
52 /***********SYSCONFIG2************/
53 #define SYSCONFIG2_BAND1 0x0080
54 #define SYSCONFIG2_BAND0 0x0040
55 #define SYSCONFIG2_SPACE1 0x0020
56 #define SYSCONFIG2_SPACE0 0x0010
57 #define SYSCONFIG2_VOLUME3 0x0008
58 #define SYSCONFIG2_VOLUME2 0x0004
59 #define SYSCONFIG2_VOLUME1 0x0002
60 #define SYSCONFIG2_VOLUME0 0x0001
61 /************************************/
63 /***********SYSCONFIG3************/
64 #define SYSCONFIG3_SMUTER1 0x8000
65 #define SYSCONFIG3_SMUTER0 0x4000
66 #define SYSCONFIG3_SMUTEA1 0x2000
67 #define SYSCONFIG3_SMUTEA0 0x1000
68 #define SYSCONFIG3_VOLEXT 0x0100
69 #define SYSCONFIG3_SKSNR3 0x0080
70 #define SYSCONFIG3_SKSNR2 0x0040
71 #define SYSCONFIG3_SKSNR1 0x0020
72 #define SYSCONFIG3_SKSNR0 0x0010
73 #define SYSCONFIG3_SKCNT3 0x0008
74 #define SYSCONFIG3_SKCNT2 0x0004
75 #define SYSCONFIG3_SKCNT1 0x0002
76 #define SYSCONFIG3_SKCNT0 0x0001
77 /************************************/
79 /***********TEST1************/
80 #define TEST1_AHIZEN 0x4000
81 /************************************/
83 /***********STATUSRSSI************/
84 #define STATUSRSSI_RDSR 0x8000
85 #define STATUSRSSI_STC 0x4000
86 #define STATUSRSSI_SF_BL 0x2000
87 #define STATUSRSSI_AFCRL 0x1000
88 #define STATUSRSSI_RDSS 0x0800
89 #define STATUSRSSI_BLERA1 0x0400
90 #define STATUSRSSI_BLERA0 0x0200
91 #define STATUSRSSI_ST 0x0100
92 /************************************/
94 /***********READCHAN************/
95 #define READCHAN_BLERB1 0x8000
96 #define READCHAN_BLERB0 0x4000
97 #define READCHAN_BLERC1 0x2000
98 #define READCHAN_BLERC0 0x1000
99 #define READCHAN_BLERD1 0x0800
100 #define READCHAN_BLERD0 0x0400
102 #define READCHAN_CHAN_MASK 0x03FF
103 /************************************/
105 /*************************************************************/
106 static inline void switch_on_bits(u16 *data, u16 bits_on)
111 static inline void switch_off_bits(u16 *data, u16 bits_off)
121 static inline int check_bit(u16 data, u16 bit)
123 return data & bit ? BIT_ON : BIT_OFF;
126 /**************************************************************/
128 /********************************************************************/
129 static inline void POWERCFG_BITSET_ENABLE_HIGH(u16 *data)
131 switch_on_bits(data, (POWERCFG_ENABLE));
134 static inline void POWERCFG_BITSET_DISABLE_HIGH(u16 *data)
136 switch_on_bits(data, (POWERCFG_DISABLE));
139 static inline void POWERCFG_BITSET_DISABLE_LOW(u16 *data)
141 switch_off_bits(data, (POWERCFG_DISABLE));
144 static inline void POWERCFG_BITSET_DMUTE_HIGH(u16 *data)
146 switch_on_bits(data, (POWERCFG_DMUTE));
149 static inline void POWERCFG_BITSET_DMUTE_LOW(u16 *data)
151 switch_off_bits(data, (POWERCFG_DMUTE));
154 static inline void POWERCFG_BITSET_DSMUTE_HIGH(u16 *data)
156 switch_on_bits(data, (POWERCFG_DSMUTE));
159 static inline void POWERCFG_BITSET_DSMUTE_LOW(u16 *data)
161 switch_off_bits(data, (POWERCFG_DSMUTE));
164 static inline void POWERCFG_BITSET_MONO_HIGH(u16 *data)
166 switch_on_bits(data, (POWERCFG_MONO));
169 static inline void POWERCFG_BITSET_MONO_LOW(u16 *data)
171 switch_off_bits(data, (POWERCFG_MONO));
174 static inline void POWERCFG_BITSET_RDSM_HIGH(u16 *data)
176 switch_on_bits(data, (POWERCFG_RDSM));
179 static inline void POWERCFG_BITSET_RDSM_LOW(u16 *data)
181 switch_off_bits(data, (POWERCFG_RDSM));
184 static inline void POWERCFG_BITSET_SKMODE_HIGH(u16 *data)
186 switch_on_bits(data, (POWERCFG_SKMODE));
189 static inline void POWERCFG_BITSET_SKMODE_LOW(u16 *data)
191 switch_off_bits(data, (POWERCFG_SKMODE));
194 static inline void POWERCFG_BITSET_SEEKUP_HIGH(u16 *data)
196 switch_on_bits(data, (POWERCFG_SEEKUP));
199 static inline void POWERCFG_BITSET_SEEKUP_LOW(u16 *data)
201 switch_off_bits(data, (POWERCFG_SEEKUP));
204 static inline void POWERCFG_BITSET_SEEK_HIGH(u16 *data)
206 switch_on_bits(data, (POWERCFG_SEEK));
209 static inline void POWERCFG_BITSET_SEEK_LOW(u16 *data)
211 switch_off_bits(data, (POWERCFG_SEEK));
214 static inline void POWERCFG_BITSET_RESERVED(u16 *data)
219 /********************************************************************/
221 static inline void CHANNEL_BITSET_TUNE_HIGH(u16 *data)
223 switch_on_bits(data, (CHANNEL_TUNE));
226 static inline void CHANNEL_BITSET_TUNE_LOW(u16 *data)
228 switch_off_bits(data, (CHANNEL_TUNE));
231 static inline void CHANNEL_BITSET_RESERVED(u16 *data)
236 /********************************************************************/
238 static inline void SYSCONFIG1_BITSET_RDSIEN_HIGH(u16 *data)
240 switch_on_bits(data, (SYSCONFIG1_RDSIEN));
243 static inline void SYSCONFIG1_BITSET_RDSIEN_LOW(u16 *data)
245 switch_off_bits(data, (SYSCONFIG1_RDSIEN));
248 static inline void SYSCONFIG1_BITSET_STCIEN_HIGH(u16 *data)
250 switch_on_bits(data, (SYSCONFIG1_STCIEN));
253 static inline void SYSCONFIG1_BITSET_STCIEN_LOW(u16 *data)
255 switch_off_bits(data, (SYSCONFIG1_STCIEN));
258 static inline void SYSCONFIG1_BITSET_RDS_HIGH(u16 *data)
260 switch_on_bits(data, (SYSCONFIG1_RDS));
263 static inline void SYSCONFIG1_BITSET_RDS_LOW(u16 *data)
265 switch_off_bits(data, (SYSCONFIG1_RDS));
268 static inline void SYSCONFIG1_BITSET_DE_50(u16 *data)
270 switch_on_bits(data, (SYSCONFIG1_DE));
273 static inline void SYSCONFIG1_BITSET_DE_75(u16 *data)
275 switch_off_bits(data, (SYSCONFIG1_DE));
278 static inline void SYSCONFIG1_BITSET_AGCD_HIGH(u16 *data)
280 switch_on_bits(data, (SYSCONFIG1_AGCD));
283 static inline void SYSCONFIG1_BITSET_AGCD_LOW(u16 *data)
285 switch_off_bits(data, (SYSCONFIG1_AGCD));
288 static inline void SYSCONFIG1_BITSET_RSSI_DEF_31_49(u16 *data)
290 switch_off_bits(data, (SYSCONFIG1_BLNDADJ1 | SYSCONFIG1_BLNDADJ0));
293 static inline void SYSCONFIG1_BITSET_RSSI_37_55(u16 *data)
295 switch_on_bits(data, (SYSCONFIG1_BLNDADJ0));
296 switch_off_bits(data, (SYSCONFIG1_BLNDADJ1));
299 static inline void SYSCONFIG1_BITSET_RSSI_19_37(u16 *data)
301 switch_on_bits(data, (SYSCONFIG1_BLNDADJ1));
302 switch_off_bits(data, (SYSCONFIG1_BLNDADJ0));
305 static inline void SYSCONFIG1_BITSET_RSSI_25_43(u16 *data)
307 switch_on_bits(data, (SYSCONFIG1_BLNDADJ1 | SYSCONFIG1_BLNDADJ0));
310 static inline void SYSCONFIG1_BITSET_GPIO_HIGH_IMP(u16 *data)
312 switch_off_bits(data, (SYSCONFIG1_GPO1 | SYSCONFIG1_GPO0));
315 static inline void SYSCONFIG1_BITSET_GPIO_STC_RDS_INT(u16 *data)
317 switch_on_bits(data, (SYSCONFIG1_GPO0));
318 switch_off_bits(data, (SYSCONFIG1_GPO1));
321 static inline void SYSCONFIG1_BITSET_GPIO_LOW(u16 *data)
323 switch_on_bits(data, (SYSCONFIG1_GPO1));
324 switch_off_bits(data, (SYSCONFIG1_GPO0));
327 static inline void SYSCONFIG1_BITSET_GPIO_HIGH(u16 *data)
329 switch_on_bits(data, (SYSCONFIG1_GPO1 | SYSCONFIG1_GPO0));
332 static inline void SYSCONFIG1_BITSET_RESERVED(u16 *data)
338 /********************************************************************/
340 /*US/EUROPE (Default)*/
341 static inline void SYSCONFIG2_BITSET_BAND_87p5_108_MHz(u16 *data)
343 switch_off_bits(data, (SYSCONFIG2_BAND1 | SYSCONFIG2_BAND0));
347 static inline void SYSCONFIG2_BITSET_BAND_76_108_MHz(u16 *data)
349 switch_on_bits(data, (SYSCONFIG2_BAND0));
350 switch_off_bits(data, (SYSCONFIG2_BAND1));
354 static inline void SYSCONFIG2_BITSET_BAND_76_90_MHz(u16 *data)
356 switch_on_bits(data, (SYSCONFIG2_BAND1));
357 switch_off_bits(data, (SYSCONFIG2_BAND0));
360 /*US, Australia (Default)*/
361 static inline void SYSCONFIG2_BITSET_SPACE_200_KHz(u16 *data)
363 switch_off_bits(data, (SYSCONFIG2_SPACE1 | SYSCONFIG2_SPACE0));
367 static inline void SYSCONFIG2_BITSET_SPACE_100_KHz(u16 *data)
369 switch_on_bits(data, (SYSCONFIG2_SPACE0));
370 switch_off_bits(data, (SYSCONFIG2_SPACE1));
373 static inline void SYSCONFIG2_BITSET_SPACE_50_KHz(u16 *data)
375 switch_on_bits(data, (SYSCONFIG2_SPACE1));
376 switch_off_bits(data, (SYSCONFIG2_SPACE0));
379 static inline void SYSCONFIG2_BITSET_VOLUME(u16 *data, u8 volume)
382 *data |= (volume & 0x0F);
385 static inline void SYSCONFIG2_BITSET_SEEKTH(u16 *data, u8 seek_th)
388 *data |= ((seek_th << 8) & 0xFF00);
391 static inline u8 SYSCONFIG2_GET_VOLUME(u16 data)
393 return (u8) (data & 0x000F);
396 /********************************************************************/
398 static inline void SYSCONFIG3_BITSET_SMUTER_FASTEST(u16 *data)
400 switch_off_bits(data, (SYSCONFIG3_SMUTER1 | SYSCONFIG3_SMUTER0));
403 static inline void SYSCONFIG3_BITSET_SMUTER_FAST(u16 *data)
405 switch_off_bits(data, (SYSCONFIG3_SMUTER1));
406 switch_on_bits(data, (SYSCONFIG3_SMUTER0));
409 static inline void SYSCONFIG3_BITSET_SMUTER_SLOW(u16 *data)
411 switch_off_bits(data, (SYSCONFIG3_SMUTER0));
412 switch_on_bits(data, (SYSCONFIG3_SMUTER1));
415 static inline void SYSCONFIG3_BITSET_SMUTER_SLOWEST(u16 *data)
417 switch_on_bits(data, (SYSCONFIG3_SMUTER1 | SYSCONFIG3_SMUTER0));
420 static inline void SYSCONFIG3_BITSET_SMUTEA_16_dB(u16 *data)
422 switch_off_bits(data, (SYSCONFIG3_SMUTEA1 | SYSCONFIG3_SMUTEA0));
425 static inline void SYSCONFIG3_BITSET_SMUTEA_14dB(u16 *data)
427 switch_off_bits(data, (SYSCONFIG3_SMUTEA1));
428 switch_on_bits(data, (SYSCONFIG3_SMUTEA0));
431 static inline void SYSCONFIG3_BITSET_SMUTEA_12dB(u16 *data)
433 switch_off_bits(data, (SYSCONFIG3_SMUTEA0));
434 switch_on_bits(data, (SYSCONFIG3_SMUTEA1));
437 static inline void SYSCONFIG3_BITSET_SMUTEA_10dB(u16 *data)
439 switch_on_bits(data, (SYSCONFIG3_SMUTEA1 | SYSCONFIG3_SMUTEA0));
442 static inline void SYSCONFIG3_BITSET_VOLEXT_DISB(u16 *data)
444 switch_off_bits(data, (SYSCONFIG3_VOLEXT));
447 static inline void SYSCONFIG3_BITSET_VOLEXT_ENB(u16 *data)
449 switch_on_bits(data, (SYSCONFIG3_VOLEXT));
452 static inline void SYSCONFIG3_BITSET_SKSNR(u16 *data, u8 seeksnr)
455 *data |= ((seeksnr << 4) & 0xF0);
458 static inline void SYSCONFIG3_BITSET_SKCNT(u16 *data, u8 seekcnt)
461 *data |= ((seekcnt) & 0x0F);
464 static inline void SYSCONFIG3_BITSET_RESERVED(u16 *data)
469 /********************************************************************/
471 static inline void TEST1_BITSET_AHIZEN_HIGH(u16 *data)
473 switch_on_bits(data, (TEST1_AHIZEN));
476 static inline void TEST1_BITSET_AHIZEN_LOW(u16 *data)
478 switch_off_bits(data, (TEST1_AHIZEN));
481 static inline void TEST1_BITSET_RESERVED(u16 *data)
486 /********************************************************************/
488 #define NEW_RDS_GROUP_READY 1
489 #define NO_RDS_GROUP_READY 0
494 #define SEEK_SUCCESSFUL 1
495 #define SEEK_FAILURE_BAND_LMT_RCHD 0
498 #define AFC_NOT_RAILED 0
500 #define RDS_DECODER_SYNCHRONIZED 1
501 #define RDS_DECODER_NOT_SYNCHRONIZED 0
509 #define ERRORS_NO_CORREC_POSSIBLE_6_p 3
511 static inline int STATUSRSSI_RDS_READY_STATUS(u16 data)
513 if (check_bit(data, STATUSRSSI_RDSR) == BIT_ON)
514 return NEW_RDS_GROUP_READY;
516 return NO_RDS_GROUP_READY;
519 static inline int STATUSRSSI_SEEK_TUNE_STATUS(u16 data)
521 if (check_bit(data, STATUSRSSI_STC) == BIT_ON)
527 static inline int STATUSRSSI_SF_BL_STATUS(u16 data)
529 if (check_bit(data, STATUSRSSI_SF_BL) == BIT_ON)
530 return SEEK_FAILURE_BAND_LMT_RCHD;
532 return SEEK_SUCCESSFUL;
535 static inline int STATUSRSSI_AFC_RAIL_STATUS(u16 data)
537 if (check_bit(data, STATUSRSSI_AFCRL) == BIT_ON)
540 return AFC_NOT_RAILED;
543 static inline int STATUSRSSI_RDS_SYNC_STATUS(u16 data)
545 if (check_bit(data, STATUSRSSI_RDSS) == BIT_ON)
546 return RDS_DECODER_SYNCHRONIZED;
548 return RDS_DECODER_NOT_SYNCHRONIZED;
551 static inline int STATUSRSSI_RDS_BLOCK_A_ERRORS(u16 data)
556 ret = check_bit(data, STATUSRSSI_BLERA1);
563 ret = check_bit(data, STATUSRSSI_BLERA0);
571 static inline int STATUSRSSI_STEREO_STATUS(u16 data)
573 if (check_bit(data, STATUSRSSI_RDSS) == BIT_ON)
579 static inline u8 STATUSRSSI_RSSI_SIGNAL_STRENGTH(u16 data)
581 return (u8) (0x00FF & data);
584 static inline u8 DEVICE_ID_PART_NUMBER(u16 data)
587 return (u8) (0x000F & data);
590 static inline u16 DEVICE_ID_MANUFACT_NUMBER(u16 data)
592 return (u16) (0x0FFF & data);
595 static inline u8 CHIP_ID_CHIP_VERSION(u16 data)
598 return (u8) (0x003F & data);
601 static inline u8 CHIP_ID_DEVICE(u16 data)
604 return (u8) (0x000F & data);
607 static inline u8 CHIP_ID_FIRMWARE_VERSION(u16 data)
609 return (u8) (0x003F & data);
612 static inline u8 SYS_CONFIG2_RSSI_TH(u16 data)
615 return (u8) (0x00FF & data);
618 static inline u8 SYS_CONFIG2_FM_BAND(u16 data)
621 return (u8) (0x0003 & data);
624 static inline u8 SYS_CONFIG2_FM_CHAN_SPAC(u16 data)
627 return (u8) (0x0003 & data);
630 static inline u8 SYS_CONFIG2_FM_VOL(u16 data)
632 return (u8) (0x000F & data);
635 /*POWER_CONFIG_STATUS*/
637 #define SOFTMUTE_ENABLE 0
638 #define SOFTMUTE_DISABLE 1
640 #define MUTE_ENABLE 0
641 #define MUTE_DISABLE 1
643 #define STEREO_SELECT 0
644 #define MONO_SELECT 1
646 #define RDS_MODE_STANDARD 0
647 #define RDS_MODE_VERBOSE 1
649 #define SEEK_MODE_CONT_SEEK 0
650 #define SEEK_MODE_STOP_SEEK 1
655 #define SEEK_DISABLE 0
658 static inline int POWER_CONFIG_SOFTMUTE_STATUS(u16 data)
660 if (check_bit(data, POWERCFG_DSMUTE) == BIT_ON)
661 return SOFTMUTE_DISABLE;
663 return SOFTMUTE_ENABLE;
666 static inline int POWER_CONFIG_MUTE_STATUS(u16 data)
668 if (check_bit(data, POWERCFG_DMUTE) == BIT_ON)
674 static inline int POWER_CONFIG_MONO_STATUS(u16 data)
676 if (check_bit(data, POWERCFG_MONO) == BIT_ON)
679 return STEREO_SELECT;
682 static inline int POWER_CONFIG_RDS_MODE_STATUS(u16 data)
684 if (check_bit(data, POWERCFG_RDSM) == BIT_ON)
685 return RDS_MODE_VERBOSE;
687 return RDS_MODE_STANDARD;
690 static inline int POWER_CONFIG_SKMODE_STATUS(u16 data)
692 if (check_bit(data, POWERCFG_SKMODE) == BIT_ON)
693 return SEEK_MODE_STOP_SEEK;
695 return SEEK_MODE_CONT_SEEK;
698 static inline int POWER_CONFIG_SEEKUP_STATUS(u16 data)
700 if (check_bit(data, POWERCFG_SEEKUP) == BIT_ON)
706 static inline int POWER_CONFIG_SEEK_STATUS(u16 data)
708 if (check_bit(data, POWERCFG_SEEK) == BIT_ON)
714 static inline int POWER_CONFIG_DISABLE_STATUS(u16 data)
716 if (check_bit(data, POWERCFG_DISABLE) == BIT_ON)
722 static inline int POWER_CONFIG_ENABLE_STATUS(u16 data)
724 if (check_bit(data, POWERCFG_ENABLE) == BIT_ON)
730 /********************************************************************/
732 static inline int READCHAN_BLOCK_B_ERRORS(u16 data)
737 ret = check_bit(data, READCHAN_BLERB1);
744 ret = check_bit(data, READCHAN_BLERB0);
752 static inline int READCHAN_BLOCK_C_ERRORS(u16 data)
757 ret = check_bit(data, READCHAN_BLERC1);
764 ret = check_bit(data, READCHAN_BLERC0);
772 static inline int READCHAN_BLOCK_D_ERRORS(u16 data)
777 ret = check_bit(data, READCHAN_BLERD1);
784 ret = check_bit(data, READCHAN_BLERD0);
792 static inline u16 READCHAN_GET_CHAN(u16 data)
794 return data & READCHAN_CHAN_MASK;
797 /********************************************************************/