1 // SPDX-License-Identifier: GPL-2.0-only
3 * An i2c driver for the Xicor/Intersil X1205 RTC
4 * Copyright 2004 Karen Spearel
5 * Copyright 2005 Alessandro Zummo
7 * please send all reports to:
8 * Karen Spearel <kas111 at gmail dot com>
9 * Alessandro Zummo <a.zummo@towertech.it>
11 * based on a lot of other RTC drivers.
13 * Information and datasheet:
14 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
17 #include <linux/i2c.h>
18 #include <linux/bcd.h>
19 #include <linux/rtc.h>
20 #include <linux/delay.h>
21 #include <linux/module.h>
22 #include <linux/bitops.h>
24 /* offsets into CCR area */
35 #define X1205_REG_SR 0x3F /* status register */
36 #define X1205_REG_Y2K 0x37
37 #define X1205_REG_DW 0x36
38 #define X1205_REG_YR 0x35
39 #define X1205_REG_MO 0x34
40 #define X1205_REG_DT 0x33
41 #define X1205_REG_HR 0x32
42 #define X1205_REG_MN 0x31
43 #define X1205_REG_SC 0x30
44 #define X1205_REG_DTR 0x13
45 #define X1205_REG_ATR 0x12
46 #define X1205_REG_INT 0x11
47 #define X1205_REG_0 0x10
48 #define X1205_REG_Y2K1 0x0F
49 #define X1205_REG_DWA1 0x0E
50 #define X1205_REG_YRA1 0x0D
51 #define X1205_REG_MOA1 0x0C
52 #define X1205_REG_DTA1 0x0B
53 #define X1205_REG_HRA1 0x0A
54 #define X1205_REG_MNA1 0x09
55 #define X1205_REG_SCA1 0x08
56 #define X1205_REG_Y2K0 0x07
57 #define X1205_REG_DWA0 0x06
58 #define X1205_REG_YRA0 0x05
59 #define X1205_REG_MOA0 0x04
60 #define X1205_REG_DTA0 0x03
61 #define X1205_REG_HRA0 0x02
62 #define X1205_REG_MNA0 0x01
63 #define X1205_REG_SCA0 0x00
65 #define X1205_CCR_BASE 0x30 /* Base address of CCR */
66 #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
68 #define X1205_SR_RTCF 0x01 /* Clock failure */
69 #define X1205_SR_WEL 0x02 /* Write Enable Latch */
70 #define X1205_SR_RWEL 0x04 /* Register Write Enable */
71 #define X1205_SR_AL0 0x20 /* Alarm 0 match */
73 #define X1205_DTR_DTR0 0x01
74 #define X1205_DTR_DTR1 0x02
75 #define X1205_DTR_DTR2 0x04
77 #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
79 #define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
81 static struct i2c_driver x1205_driver;
84 * In the routines that deal directly with the x1205 hardware, we use
85 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
86 * Epoch is initialized as 2000. Time is set to UTC.
88 static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
89 unsigned char reg_base)
91 unsigned char dt_addr[2] = { 0, reg_base };
95 struct i2c_msg msgs[] = {
102 .addr = client->addr,
109 /* read date registers */
110 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
111 dev_err(&client->dev, "%s: read error\n", __func__);
115 dev_dbg(&client->dev,
116 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
117 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
119 buf[0], buf[1], buf[2], buf[3],
120 buf[4], buf[5], buf[6], buf[7]);
122 /* Mask out the enable bits if these are alarm registers */
123 if (reg_base < X1205_CCR_BASE)
124 for (i = 0; i <= 4; i++)
127 tm->tm_sec = bcd2bin(buf[CCR_SEC]);
128 tm->tm_min = bcd2bin(buf[CCR_MIN]);
129 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
130 tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
131 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
132 tm->tm_year = bcd2bin(buf[CCR_YEAR])
133 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
134 tm->tm_wday = buf[CCR_WDAY];
136 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
137 "mday=%d, mon=%d, year=%d, wday=%d\n",
139 tm->tm_sec, tm->tm_min, tm->tm_hour,
140 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
145 static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
147 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
149 struct i2c_msg msgs[] = {
150 { /* setup read ptr */
151 .addr = client->addr,
156 .addr = client->addr,
163 /* read status register */
164 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
165 dev_err(&client->dev, "%s: read error\n", __func__);
172 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
173 u8 reg_base, unsigned char alm_enable)
176 unsigned char rdata[10] = { 0, reg_base };
177 unsigned char *buf = rdata + 2;
179 static const unsigned char wel[3] = { 0, X1205_REG_SR,
182 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
183 X1205_SR_WEL | X1205_SR_RWEL };
185 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
187 dev_dbg(&client->dev,
188 "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
189 __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
190 tm->tm_mon, tm->tm_year, tm->tm_wday);
192 buf[CCR_SEC] = bin2bcd(tm->tm_sec);
193 buf[CCR_MIN] = bin2bcd(tm->tm_min);
195 /* set hour and 24hr bit */
196 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
198 buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
201 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
203 /* year, since the rtc epoch*/
204 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
205 buf[CCR_WDAY] = tm->tm_wday & 0x07;
206 buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
208 /* If writing alarm registers, set compare bits on registers 0-4 */
209 if (reg_base < X1205_CCR_BASE)
210 for (i = 0; i <= 4; i++)
213 /* this sequence is required to unlock the chip */
214 xfer = i2c_master_send(client, wel, 3);
216 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
220 xfer = i2c_master_send(client, rwel, 3);
222 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
226 xfer = i2c_master_send(client, rdata, sizeof(rdata));
227 if (xfer != sizeof(rdata)) {
228 dev_err(&client->dev,
229 "%s: result=%d addr=%02x, data=%02x\n",
231 xfer, rdata[1], rdata[2]);
235 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
236 if (reg_base < X1205_CCR_BASE) {
237 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
241 /* ...and set or clear the AL0E bit in the INT register */
243 /* Need to set RWEL again as the write has cleared it */
244 xfer = i2c_master_send(client, rwel, 3);
246 dev_err(&client->dev,
247 "%s: aloe rwel - %d\n",
254 al0e[2] = X1205_INT_AL0E;
256 xfer = i2c_master_send(client, al0e, 3);
258 dev_err(&client->dev,
265 /* and wait 10msec again for this write to complete */
269 /* disable further writes */
270 xfer = i2c_master_send(client, diswe, 3);
272 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
279 static int x1205_fix_osc(struct i2c_client *client)
284 memset(&tm, 0, sizeof(tm));
286 err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
288 dev_err(&client->dev, "unable to restart the oscillator\n");
293 static int x1205_get_dtrim(struct i2c_client *client, int *trim)
296 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
298 struct i2c_msg msgs[] = {
299 { /* setup read ptr */
300 .addr = client->addr,
305 .addr = client->addr,
312 /* read dtr register */
313 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
314 dev_err(&client->dev, "%s: read error\n", __func__);
318 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
322 if (dtr & X1205_DTR_DTR0)
325 if (dtr & X1205_DTR_DTR1)
328 if (dtr & X1205_DTR_DTR2)
334 static int x1205_get_atrim(struct i2c_client *client, int *trim)
337 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
339 struct i2c_msg msgs[] = {
340 {/* setup read ptr */
341 .addr = client->addr,
346 .addr = client->addr,
353 /* read atr register */
354 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
355 dev_err(&client->dev, "%s: read error\n", __func__);
359 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
361 /* atr is a two's complement value on 6 bits,
362 * perform sign extension. The formula is
363 * Catr = (atr * 0.25pF) + 11.00pF.
365 atr = sign_extend32(atr, 5);
367 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
369 *trim = (atr * 250) + 11000;
371 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
377 unsigned char reg, mask, min, max;
380 static int x1205_validate_client(struct i2c_client *client)
384 /* Probe array. We will read the register at the specified
385 * address and check if the given bits are zero.
387 static const unsigned char probe_zero_pattern[] = {
396 static const struct x1205_limit probe_limits_pattern[] = {
397 /* register, mask, min, max */
398 { X1205_REG_Y2K, 0xFF, 19, 20 },
399 { X1205_REG_DW, 0xFF, 0, 6 },
400 { X1205_REG_YR, 0xFF, 0, 99 },
401 { X1205_REG_MO, 0xFF, 0, 12 },
402 { X1205_REG_DT, 0xFF, 0, 31 },
403 { X1205_REG_HR, 0x7F, 0, 23 },
404 { X1205_REG_MN, 0xFF, 0, 59 },
405 { X1205_REG_SC, 0xFF, 0, 59 },
406 { X1205_REG_Y2K1, 0xFF, 19, 20 },
407 { X1205_REG_Y2K0, 0xFF, 19, 20 },
410 /* check that registers have bits a 0 where expected */
411 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
414 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
416 struct i2c_msg msgs[2] = {
418 .addr = client->addr,
423 .addr = client->addr,
430 xfer = i2c_transfer(client->adapter, msgs, 2);
432 dev_err(&client->dev,
433 "%s: could not read register %x\n",
434 __func__, probe_zero_pattern[i]);
439 if ((buf & probe_zero_pattern[i+1]) != 0) {
440 dev_err(&client->dev,
441 "%s: register=%02x, zero pattern=%d, value=%x\n",
442 __func__, probe_zero_pattern[i], i, buf);
448 /* check limits (only registers with bcd values) */
449 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
450 unsigned char reg, value;
452 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
454 struct i2c_msg msgs[2] = {
456 .addr = client->addr,
461 .addr = client->addr,
468 xfer = i2c_transfer(client->adapter, msgs, 2);
470 dev_err(&client->dev,
471 "%s: could not read register %x\n",
472 __func__, probe_limits_pattern[i].reg);
477 value = bcd2bin(reg & probe_limits_pattern[i].mask);
479 if (value > probe_limits_pattern[i].max ||
480 value < probe_limits_pattern[i].min) {
481 dev_dbg(&client->dev,
482 "%s: register=%x, lim pattern=%d, value=%d\n",
483 __func__, probe_limits_pattern[i].reg,
493 static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
496 unsigned char intreg, status;
497 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
498 struct i2c_client *client = to_i2c_client(dev);
499 struct i2c_msg msgs[] = {
500 { /* setup read ptr */
501 .addr = client->addr,
505 {/* read INT register */
507 .addr = client->addr,
514 /* read interrupt register and status register */
515 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
516 dev_err(&client->dev, "%s: read error\n", __func__);
519 err = x1205_get_status(client, &status);
521 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
522 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
523 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
528 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
530 return x1205_set_datetime(to_i2c_client(dev),
531 &alrm->time, X1205_ALM0_BASE, alrm->enabled);
534 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
536 return x1205_get_datetime(to_i2c_client(dev),
540 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
542 return x1205_set_datetime(to_i2c_client(dev),
543 tm, X1205_CCR_BASE, 0);
546 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
548 int err, dtrim, atrim;
550 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
552 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
554 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
556 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
557 atrim / 1000, atrim % 1000);
561 static const struct rtc_class_ops x1205_rtc_ops = {
562 .proc = x1205_rtc_proc,
563 .read_time = x1205_rtc_read_time,
564 .set_time = x1205_rtc_set_time,
565 .read_alarm = x1205_rtc_read_alarm,
566 .set_alarm = x1205_rtc_set_alarm,
569 static ssize_t x1205_sysfs_show_atrim(struct device *dev,
570 struct device_attribute *attr, char *buf)
574 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
578 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
580 static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
582 static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
583 struct device_attribute *attr, char *buf)
587 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
591 return sprintf(buf, "%d ppm\n", dtrim);
593 static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
595 static int x1205_sysfs_register(struct device *dev)
599 err = device_create_file(dev, &dev_attr_atrim);
603 err = device_create_file(dev, &dev_attr_dtrim);
605 device_remove_file(dev, &dev_attr_atrim);
610 static void x1205_sysfs_unregister(struct device *dev)
612 device_remove_file(dev, &dev_attr_atrim);
613 device_remove_file(dev, &dev_attr_dtrim);
617 static int x1205_probe(struct i2c_client *client)
621 struct rtc_device *rtc;
623 dev_dbg(&client->dev, "%s\n", __func__);
625 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
628 if (x1205_validate_client(client) < 0)
631 rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name,
632 &x1205_rtc_ops, THIS_MODULE);
637 i2c_set_clientdata(client, rtc);
639 /* Check for power failures and eventually enable the osc */
640 err = x1205_get_status(client, &sr);
642 if (sr & X1205_SR_RTCF) {
643 dev_err(&client->dev,
644 "power failure detected, "
645 "please set the clock\n");
647 x1205_fix_osc(client);
650 dev_err(&client->dev, "couldn't read status\n");
653 err = x1205_sysfs_register(&client->dev);
655 dev_err(&client->dev, "Unable to create sysfs entries\n");
660 static void x1205_remove(struct i2c_client *client)
662 x1205_sysfs_unregister(&client->dev);
665 static const struct i2c_device_id x1205_id[] = {
669 MODULE_DEVICE_TABLE(i2c, x1205_id);
671 static const struct of_device_id x1205_dt_ids[] = {
672 { .compatible = "xircom,x1205", },
675 MODULE_DEVICE_TABLE(of, x1205_dt_ids);
677 static struct i2c_driver x1205_driver = {
680 .of_match_table = x1205_dt_ids,
682 .probe = x1205_probe,
683 .remove = x1205_remove,
684 .id_table = x1205_id,
687 module_i2c_driver(x1205_driver);
690 "Karen Spearel <kas111 at gmail dot com>, "
691 "Alessandro Zummo <a.zummo@towertech.it>");
692 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
693 MODULE_LICENSE("GPL");