1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017 Spreadtrum Communications Inc.
7 #include <linux/bitops.h>
8 #include <linux/delay.h>
10 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <linux/rtc.h>
16 #define SPRD_RTC_SEC_CNT_VALUE 0x0
17 #define SPRD_RTC_MIN_CNT_VALUE 0x4
18 #define SPRD_RTC_HOUR_CNT_VALUE 0x8
19 #define SPRD_RTC_DAY_CNT_VALUE 0xc
20 #define SPRD_RTC_SEC_CNT_UPD 0x10
21 #define SPRD_RTC_MIN_CNT_UPD 0x14
22 #define SPRD_RTC_HOUR_CNT_UPD 0x18
23 #define SPRD_RTC_DAY_CNT_UPD 0x1c
24 #define SPRD_RTC_SEC_ALM_UPD 0x20
25 #define SPRD_RTC_MIN_ALM_UPD 0x24
26 #define SPRD_RTC_HOUR_ALM_UPD 0x28
27 #define SPRD_RTC_DAY_ALM_UPD 0x2c
28 #define SPRD_RTC_INT_EN 0x30
29 #define SPRD_RTC_INT_RAW_STS 0x34
30 #define SPRD_RTC_INT_CLR 0x38
31 #define SPRD_RTC_INT_MASK_STS 0x3C
32 #define SPRD_RTC_SEC_ALM_VALUE 0x40
33 #define SPRD_RTC_MIN_ALM_VALUE 0x44
34 #define SPRD_RTC_HOUR_ALM_VALUE 0x48
35 #define SPRD_RTC_DAY_ALM_VALUE 0x4c
36 #define SPRD_RTC_SPG_VALUE 0x50
37 #define SPRD_RTC_SPG_UPD 0x54
38 #define SPRD_RTC_PWR_CTRL 0x58
39 #define SPRD_RTC_PWR_STS 0x5c
40 #define SPRD_RTC_SEC_AUXALM_UPD 0x60
41 #define SPRD_RTC_MIN_AUXALM_UPD 0x64
42 #define SPRD_RTC_HOUR_AUXALM_UPD 0x68
43 #define SPRD_RTC_DAY_AUXALM_UPD 0x6c
45 /* BIT & MASK definition for SPRD_RTC_INT_* registers */
46 #define SPRD_RTC_SEC_EN BIT(0)
47 #define SPRD_RTC_MIN_EN BIT(1)
48 #define SPRD_RTC_HOUR_EN BIT(2)
49 #define SPRD_RTC_DAY_EN BIT(3)
50 #define SPRD_RTC_ALARM_EN BIT(4)
51 #define SPRD_RTC_HRS_FORMAT_EN BIT(5)
52 #define SPRD_RTC_AUXALM_EN BIT(6)
53 #define SPRD_RTC_SPG_UPD_EN BIT(7)
54 #define SPRD_RTC_SEC_UPD_EN BIT(8)
55 #define SPRD_RTC_MIN_UPD_EN BIT(9)
56 #define SPRD_RTC_HOUR_UPD_EN BIT(10)
57 #define SPRD_RTC_DAY_UPD_EN BIT(11)
58 #define SPRD_RTC_ALMSEC_UPD_EN BIT(12)
59 #define SPRD_RTC_ALMMIN_UPD_EN BIT(13)
60 #define SPRD_RTC_ALMHOUR_UPD_EN BIT(14)
61 #define SPRD_RTC_ALMDAY_UPD_EN BIT(15)
62 #define SPRD_RTC_INT_MASK GENMASK(15, 0)
64 #define SPRD_RTC_TIME_INT_MASK \
65 (SPRD_RTC_SEC_UPD_EN | SPRD_RTC_MIN_UPD_EN | \
66 SPRD_RTC_HOUR_UPD_EN | SPRD_RTC_DAY_UPD_EN)
68 #define SPRD_RTC_ALMTIME_INT_MASK \
69 (SPRD_RTC_ALMSEC_UPD_EN | SPRD_RTC_ALMMIN_UPD_EN | \
70 SPRD_RTC_ALMHOUR_UPD_EN | SPRD_RTC_ALMDAY_UPD_EN)
72 #define SPRD_RTC_ALM_INT_MASK \
73 (SPRD_RTC_SEC_EN | SPRD_RTC_MIN_EN | \
74 SPRD_RTC_HOUR_EN | SPRD_RTC_DAY_EN | \
75 SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN)
77 /* second/minute/hour/day values mask definition */
78 #define SPRD_RTC_SEC_MASK GENMASK(5, 0)
79 #define SPRD_RTC_MIN_MASK GENMASK(5, 0)
80 #define SPRD_RTC_HOUR_MASK GENMASK(4, 0)
81 #define SPRD_RTC_DAY_MASK GENMASK(15, 0)
83 /* alarm lock definition for SPRD_RTC_SPG_UPD register */
84 #define SPRD_RTC_ALMLOCK_MASK GENMASK(7, 0)
85 #define SPRD_RTC_ALM_UNLOCK 0xa5
86 #define SPRD_RTC_ALM_LOCK (~SPRD_RTC_ALM_UNLOCK & \
87 SPRD_RTC_ALMLOCK_MASK)
89 /* SPG values definition for SPRD_RTC_SPG_UPD register */
90 #define SPRD_RTC_POWEROFF_ALM_FLAG BIT(8)
92 /* power control/status definition */
93 #define SPRD_RTC_POWER_RESET_VALUE 0x96
94 #define SPRD_RTC_POWER_STS_CLEAR GENMASK(7, 0)
95 #define SPRD_RTC_POWER_STS_SHIFT 8
96 #define SPRD_RTC_POWER_STS_VALID \
97 (~SPRD_RTC_POWER_RESET_VALUE << SPRD_RTC_POWER_STS_SHIFT)
99 /* timeout of synchronizing time and alarm registers (us) */
100 #define SPRD_RTC_POLL_TIMEOUT 200000
101 #define SPRD_RTC_POLL_DELAY_US 20000
104 struct rtc_device *rtc;
105 struct regmap *regmap;
113 * The Spreadtrum RTC controller has 3 groups registers, including time, normal
114 * alarm and auxiliary alarm. The time group registers are used to set RTC time,
115 * the normal alarm registers are used to set normal alarm, and the auxiliary
116 * alarm registers are used to set auxiliary alarm. Both alarm event and
117 * auxiliary alarm event can wake up system from deep sleep, but only alarm
118 * event can power up system from power down status.
120 enum sprd_rtc_reg_types {
126 static int sprd_rtc_clear_alarm_ints(struct sprd_rtc *rtc)
128 return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
129 SPRD_RTC_ALM_INT_MASK);
132 static int sprd_rtc_lock_alarm(struct sprd_rtc *rtc, bool lock)
137 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val);
141 val &= ~SPRD_RTC_ALMLOCK_MASK;
143 val |= SPRD_RTC_ALM_LOCK;
145 val |= SPRD_RTC_ALM_UNLOCK | SPRD_RTC_POWEROFF_ALM_FLAG;
147 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_SPG_UPD, val);
151 /* wait until the SPG value is updated successfully */
152 ret = regmap_read_poll_timeout(rtc->regmap,
153 rtc->base + SPRD_RTC_INT_RAW_STS, val,
154 (val & SPRD_RTC_SPG_UPD_EN),
155 SPRD_RTC_POLL_DELAY_US,
156 SPRD_RTC_POLL_TIMEOUT);
158 dev_err(rtc->dev, "failed to update SPG value:%d\n", ret);
162 return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
163 SPRD_RTC_SPG_UPD_EN);
166 static int sprd_rtc_get_secs(struct sprd_rtc *rtc, enum sprd_rtc_reg_types type,
169 u32 sec_reg, min_reg, hour_reg, day_reg;
170 u32 val, sec, min, hour, day;
175 sec_reg = SPRD_RTC_SEC_CNT_VALUE;
176 min_reg = SPRD_RTC_MIN_CNT_VALUE;
177 hour_reg = SPRD_RTC_HOUR_CNT_VALUE;
178 day_reg = SPRD_RTC_DAY_CNT_VALUE;
181 sec_reg = SPRD_RTC_SEC_ALM_VALUE;
182 min_reg = SPRD_RTC_MIN_ALM_VALUE;
183 hour_reg = SPRD_RTC_HOUR_ALM_VALUE;
184 day_reg = SPRD_RTC_DAY_ALM_VALUE;
186 case SPRD_RTC_AUX_ALARM:
187 sec_reg = SPRD_RTC_SEC_AUXALM_UPD;
188 min_reg = SPRD_RTC_MIN_AUXALM_UPD;
189 hour_reg = SPRD_RTC_HOUR_AUXALM_UPD;
190 day_reg = SPRD_RTC_DAY_AUXALM_UPD;
196 ret = regmap_read(rtc->regmap, rtc->base + sec_reg, &val);
200 sec = val & SPRD_RTC_SEC_MASK;
202 ret = regmap_read(rtc->regmap, rtc->base + min_reg, &val);
206 min = val & SPRD_RTC_MIN_MASK;
208 ret = regmap_read(rtc->regmap, rtc->base + hour_reg, &val);
212 hour = val & SPRD_RTC_HOUR_MASK;
214 ret = regmap_read(rtc->regmap, rtc->base + day_reg, &val);
218 day = val & SPRD_RTC_DAY_MASK;
219 *secs = (((time64_t)(day * 24) + hour) * 60 + min) * 60 + sec;
223 static int sprd_rtc_set_secs(struct sprd_rtc *rtc, enum sprd_rtc_reg_types type,
226 u32 sec_reg, min_reg, hour_reg, day_reg, sts_mask;
227 u32 sec, min, hour, day, val;
230 /* convert seconds to RTC time format */
231 day = div_s64_rem(secs, 86400, &rem);
235 sec = rem - min * 60;
239 sec_reg = SPRD_RTC_SEC_CNT_UPD;
240 min_reg = SPRD_RTC_MIN_CNT_UPD;
241 hour_reg = SPRD_RTC_HOUR_CNT_UPD;
242 day_reg = SPRD_RTC_DAY_CNT_UPD;
243 sts_mask = SPRD_RTC_TIME_INT_MASK;
246 sec_reg = SPRD_RTC_SEC_ALM_UPD;
247 min_reg = SPRD_RTC_MIN_ALM_UPD;
248 hour_reg = SPRD_RTC_HOUR_ALM_UPD;
249 day_reg = SPRD_RTC_DAY_ALM_UPD;
250 sts_mask = SPRD_RTC_ALMTIME_INT_MASK;
252 case SPRD_RTC_AUX_ALARM:
253 sec_reg = SPRD_RTC_SEC_AUXALM_UPD;
254 min_reg = SPRD_RTC_MIN_AUXALM_UPD;
255 hour_reg = SPRD_RTC_HOUR_AUXALM_UPD;
256 day_reg = SPRD_RTC_DAY_AUXALM_UPD;
263 ret = regmap_write(rtc->regmap, rtc->base + sec_reg, sec);
267 ret = regmap_write(rtc->regmap, rtc->base + min_reg, min);
271 ret = regmap_write(rtc->regmap, rtc->base + hour_reg, hour);
275 ret = regmap_write(rtc->regmap, rtc->base + day_reg, day);
279 if (type == SPRD_RTC_AUX_ALARM)
283 * Since the time and normal alarm registers are put in always-power-on
284 * region supplied by VDDRTC, then these registers changing time will
285 * be very long, about 125ms. Thus here we should wait until all
286 * values are updated successfully.
288 ret = regmap_read_poll_timeout(rtc->regmap,
289 rtc->base + SPRD_RTC_INT_RAW_STS, val,
290 ((val & sts_mask) == sts_mask),
291 SPRD_RTC_POLL_DELAY_US,
292 SPRD_RTC_POLL_TIMEOUT);
294 dev_err(rtc->dev, "set time/alarm values timeout\n");
298 return regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
302 static int sprd_rtc_set_aux_alarm(struct device *dev, struct rtc_wkalrm *alrm)
304 struct sprd_rtc *rtc = dev_get_drvdata(dev);
305 time64_t secs = rtc_tm_to_time64(&alrm->time);
308 /* clear the auxiliary alarm interrupt status */
309 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
314 ret = sprd_rtc_set_secs(rtc, SPRD_RTC_AUX_ALARM, secs);
319 ret = regmap_update_bits(rtc->regmap,
320 rtc->base + SPRD_RTC_INT_EN,
324 ret = regmap_update_bits(rtc->regmap,
325 rtc->base + SPRD_RTC_INT_EN,
326 SPRD_RTC_AUXALM_EN, 0);
332 static int sprd_rtc_read_time(struct device *dev, struct rtc_time *tm)
334 struct sprd_rtc *rtc = dev_get_drvdata(dev);
339 dev_warn(dev, "RTC values are invalid\n");
343 ret = sprd_rtc_get_secs(rtc, SPRD_RTC_TIME, &secs);
347 rtc_time64_to_tm(secs, tm);
351 static int sprd_rtc_set_time(struct device *dev, struct rtc_time *tm)
353 struct sprd_rtc *rtc = dev_get_drvdata(dev);
354 time64_t secs = rtc_tm_to_time64(tm);
357 ret = sprd_rtc_set_secs(rtc, SPRD_RTC_TIME, secs);
362 /* Clear RTC power status firstly */
363 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_PWR_CTRL,
364 SPRD_RTC_POWER_STS_CLEAR);
369 * Set RTC power status to indicate now RTC has valid time
372 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_PWR_CTRL,
373 SPRD_RTC_POWER_STS_VALID);
383 static int sprd_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
385 struct sprd_rtc *rtc = dev_get_drvdata(dev);
391 * The RTC core checks to see if there is an alarm already set in RTC
392 * hardware, and we always read the normal alarm at this time.
394 ret = sprd_rtc_get_secs(rtc, SPRD_RTC_ALARM, &secs);
398 rtc_time64_to_tm(secs, &alrm->time);
400 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_EN, &val);
404 alrm->enabled = !!(val & SPRD_RTC_ALARM_EN);
406 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_INT_RAW_STS, &val);
410 alrm->pending = !!(val & SPRD_RTC_ALARM_EN);
414 static int sprd_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
416 struct sprd_rtc *rtc = dev_get_drvdata(dev);
417 time64_t secs = rtc_tm_to_time64(&alrm->time);
418 struct rtc_time aie_time =
419 rtc_ktime_to_tm(rtc->rtc->aie_timer.node.expires);
423 * We have 2 groups alarms: normal alarm and auxiliary alarm. Since
424 * both normal alarm event and auxiliary alarm event can wake up system
425 * from deep sleep, but only alarm event can power up system from power
426 * down status. Moreover we do not need to poll about 125ms when
427 * updating auxiliary alarm registers. Thus we usually set auxiliary
428 * alarm when wake up system from deep sleep, and for other scenarios,
429 * we should set normal alarm with polling status.
431 * So here we check if the alarm time is set by aie_timer, if yes, we
432 * should set normal alarm, if not, we should set auxiliary alarm which
433 * means it is just a wake event.
435 if (!rtc->rtc->aie_timer.enabled || rtc_tm_sub(&aie_time, &alrm->time))
436 return sprd_rtc_set_aux_alarm(dev, alrm);
438 /* clear the alarm interrupt status firstly */
439 ret = regmap_write(rtc->regmap, rtc->base + SPRD_RTC_INT_CLR,
444 ret = sprd_rtc_set_secs(rtc, SPRD_RTC_ALARM, secs);
449 ret = regmap_update_bits(rtc->regmap,
450 rtc->base + SPRD_RTC_INT_EN,
456 /* unlock the alarm to enable the alarm function. */
457 ret = sprd_rtc_lock_alarm(rtc, false);
459 regmap_update_bits(rtc->regmap,
460 rtc->base + SPRD_RTC_INT_EN,
461 SPRD_RTC_ALARM_EN, 0);
464 * Lock the alarm function in case fake alarm event will power
467 ret = sprd_rtc_lock_alarm(rtc, true);
473 static int sprd_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
475 struct sprd_rtc *rtc = dev_get_drvdata(dev);
479 ret = regmap_update_bits(rtc->regmap,
480 rtc->base + SPRD_RTC_INT_EN,
481 SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN,
482 SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN);
486 ret = sprd_rtc_lock_alarm(rtc, false);
488 regmap_update_bits(rtc->regmap, rtc->base + SPRD_RTC_INT_EN,
489 SPRD_RTC_ALARM_EN | SPRD_RTC_AUXALM_EN, 0);
491 ret = sprd_rtc_lock_alarm(rtc, true);
497 static const struct rtc_class_ops sprd_rtc_ops = {
498 .read_time = sprd_rtc_read_time,
499 .set_time = sprd_rtc_set_time,
500 .read_alarm = sprd_rtc_read_alarm,
501 .set_alarm = sprd_rtc_set_alarm,
502 .alarm_irq_enable = sprd_rtc_alarm_irq_enable,
505 static irqreturn_t sprd_rtc_handler(int irq, void *dev_id)
507 struct sprd_rtc *rtc = dev_id;
510 ret = sprd_rtc_clear_alarm_ints(rtc);
512 return IRQ_RETVAL(ret);
514 rtc_update_irq(rtc->rtc, 1, RTC_AF | RTC_IRQF);
518 static int sprd_rtc_check_power_down(struct sprd_rtc *rtc)
523 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_PWR_STS, &val);
528 * If the RTC power status value is SPRD_RTC_POWER_RESET_VALUE, which
529 * means the RTC has been powered down, so the RTC time values are
532 rtc->valid = val != SPRD_RTC_POWER_RESET_VALUE;
536 static int sprd_rtc_check_alarm_int(struct sprd_rtc *rtc)
541 ret = regmap_read(rtc->regmap, rtc->base + SPRD_RTC_SPG_VALUE, &val);
546 * The SPRD_RTC_INT_EN register is not put in always-power-on region
547 * supplied by VDDRTC, so we should check if we need enable the alarm
548 * interrupt when system booting.
550 * If we have set SPRD_RTC_POWEROFF_ALM_FLAG which is saved in
551 * always-power-on region, that means we have set one alarm last time,
552 * so we should enable the alarm interrupt to help RTC core to see if
553 * there is an alarm already set in RTC hardware.
555 if (!(val & SPRD_RTC_POWEROFF_ALM_FLAG))
558 return regmap_update_bits(rtc->regmap, rtc->base + SPRD_RTC_INT_EN,
559 SPRD_RTC_ALARM_EN, SPRD_RTC_ALARM_EN);
562 static int sprd_rtc_probe(struct platform_device *pdev)
564 struct device_node *node = pdev->dev.of_node;
565 struct sprd_rtc *rtc;
568 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
572 rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
576 ret = of_property_read_u32(node, "reg", &rtc->base);
578 dev_err(&pdev->dev, "failed to get RTC base address\n");
582 rtc->irq = platform_get_irq(pdev, 0);
586 rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
587 if (IS_ERR(rtc->rtc))
588 return PTR_ERR(rtc->rtc);
590 rtc->dev = &pdev->dev;
591 platform_set_drvdata(pdev, rtc);
593 /* check if we need set the alarm interrupt */
594 ret = sprd_rtc_check_alarm_int(rtc);
596 dev_err(&pdev->dev, "failed to check RTC alarm interrupt\n");
600 /* check if RTC time values are valid */
601 ret = sprd_rtc_check_power_down(rtc);
603 dev_err(&pdev->dev, "failed to check RTC time values\n");
607 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
609 IRQF_ONESHOT | IRQF_EARLY_RESUME,
612 dev_err(&pdev->dev, "failed to request RTC irq\n");
616 device_init_wakeup(&pdev->dev, 1);
618 rtc->rtc->ops = &sprd_rtc_ops;
619 rtc->rtc->range_min = 0;
620 rtc->rtc->range_max = 5662310399LL;
621 ret = devm_rtc_register_device(rtc->rtc);
623 device_init_wakeup(&pdev->dev, 0);
630 static const struct of_device_id sprd_rtc_of_match[] = {
631 { .compatible = "sprd,sc2731-rtc", },
634 MODULE_DEVICE_TABLE(of, sprd_rtc_of_match);
636 static struct platform_driver sprd_rtc_driver = {
639 .of_match_table = sprd_rtc_of_match,
641 .probe = sprd_rtc_probe,
643 module_platform_driver(sprd_rtc_driver);
645 MODULE_LICENSE("GPL v2");
646 MODULE_DESCRIPTION("Spreadtrum RTC Device Driver");
647 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");