1 // SPDX-License-Identifier: GPL-2.0
3 * RTC driver for the Micro Crystal RV3032
5 * Copyright (C) 2020 Micro Crystal SA
7 * Alexandre Belloni <alexandre.belloni@bootlin.com>
11 #include <linux/clk.h>
12 #include <linux/clk-provider.h>
13 #include <linux/bcd.h>
14 #include <linux/bitfield.h>
15 #include <linux/bitops.h>
16 #include <linux/hwmon.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/kernel.h>
20 #include <linux/log2.h>
21 #include <linux/module.h>
23 #include <linux/regmap.h>
24 #include <linux/rtc.h>
26 #define RV3032_SEC 0x01
27 #define RV3032_MIN 0x02
28 #define RV3032_HOUR 0x03
29 #define RV3032_WDAY 0x04
30 #define RV3032_DAY 0x05
31 #define RV3032_MONTH 0x06
32 #define RV3032_YEAR 0x07
33 #define RV3032_ALARM_MIN 0x08
34 #define RV3032_ALARM_HOUR 0x09
35 #define RV3032_ALARM_DAY 0x0A
36 #define RV3032_STATUS 0x0D
37 #define RV3032_TLSB 0x0E
38 #define RV3032_TMSB 0x0F
39 #define RV3032_CTRL1 0x10
40 #define RV3032_CTRL2 0x11
41 #define RV3032_CTRL3 0x12
42 #define RV3032_TS_CTRL 0x13
43 #define RV3032_CLK_IRQ 0x14
44 #define RV3032_EEPROM_ADDR 0x3D
45 #define RV3032_EEPROM_DATA 0x3E
46 #define RV3032_EEPROM_CMD 0x3F
47 #define RV3032_RAM1 0x40
48 #define RV3032_PMU 0xC0
49 #define RV3032_OFFSET 0xC1
50 #define RV3032_CLKOUT1 0xC2
51 #define RV3032_CLKOUT2 0xC3
52 #define RV3032_TREF0 0xC4
53 #define RV3032_TREF1 0xC5
55 #define RV3032_STATUS_VLF BIT(0)
56 #define RV3032_STATUS_PORF BIT(1)
57 #define RV3032_STATUS_EVF BIT(2)
58 #define RV3032_STATUS_AF BIT(3)
59 #define RV3032_STATUS_TF BIT(4)
60 #define RV3032_STATUS_UF BIT(5)
61 #define RV3032_STATUS_TLF BIT(6)
62 #define RV3032_STATUS_THF BIT(7)
64 #define RV3032_TLSB_CLKF BIT(1)
65 #define RV3032_TLSB_EEBUSY BIT(2)
66 #define RV3032_TLSB_TEMP GENMASK(7, 4)
68 #define RV3032_CLKOUT2_HFD_MSK GENMASK(4, 0)
69 #define RV3032_CLKOUT2_FD_MSK GENMASK(6, 5)
70 #define RV3032_CLKOUT2_OS BIT(7)
72 #define RV3032_CTRL1_EERD BIT(3)
73 #define RV3032_CTRL1_WADA BIT(5)
75 #define RV3032_CTRL2_STOP BIT(0)
76 #define RV3032_CTRL2_EIE BIT(2)
77 #define RV3032_CTRL2_AIE BIT(3)
78 #define RV3032_CTRL2_TIE BIT(4)
79 #define RV3032_CTRL2_UIE BIT(5)
80 #define RV3032_CTRL2_CLKIE BIT(6)
81 #define RV3032_CTRL2_TSE BIT(7)
83 #define RV3032_PMU_TCM GENMASK(1, 0)
84 #define RV3032_PMU_TCR GENMASK(3, 2)
85 #define RV3032_PMU_BSM GENMASK(5, 4)
86 #define RV3032_PMU_NCLKE BIT(6)
88 #define RV3032_PMU_BSM_DSM 1
89 #define RV3032_PMU_BSM_LSM 2
91 #define RV3032_OFFSET_MSK GENMASK(5, 0)
93 #define RV3032_EVT_CTRL_TSR BIT(2)
95 #define RV3032_EEPROM_CMD_UPDATE 0x11
96 #define RV3032_EEPROM_CMD_WRITE 0x21
97 #define RV3032_EEPROM_CMD_READ 0x22
99 #define RV3032_EEPROM_USER 0xCB
101 #define RV3032_EEBUSY_POLL 10000
102 #define RV3032_EEBUSY_TIMEOUT 100000
104 #define OFFSET_STEP_PPT 238419
107 struct regmap *regmap;
108 struct rtc_device *rtc;
109 bool trickle_charger_set;
110 #ifdef CONFIG_COMMON_CLK
111 struct clk_hw clkout_hw;
115 static u16 rv3032_trickle_resistors[] = {1000, 2000, 7000, 11000};
116 static u16 rv3032_trickle_voltages[] = {0, 1750, 3000, 4400};
118 static int rv3032_exit_eerd(struct rv3032_data *rv3032, u32 eerd)
123 return regmap_update_bits(rv3032->regmap, RV3032_CTRL1, RV3032_CTRL1_EERD, 0);
126 static int rv3032_enter_eerd(struct rv3032_data *rv3032, u32 *eerd)
131 ret = regmap_read(rv3032->regmap, RV3032_CTRL1, &ctrl1);
135 *eerd = ctrl1 & RV3032_CTRL1_EERD;
139 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL1,
140 RV3032_CTRL1_EERD, RV3032_CTRL1_EERD);
144 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status,
145 !(status & RV3032_TLSB_EEBUSY),
146 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT);
148 rv3032_exit_eerd(rv3032, *eerd);
156 static int rv3032_update_cfg(struct rv3032_data *rv3032, unsigned int reg,
157 unsigned int mask, unsigned int val)
162 ret = rv3032_enter_eerd(rv3032, &eerd);
166 ret = regmap_update_bits(rv3032->regmap, reg, mask, val);
170 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, RV3032_EEPROM_CMD_UPDATE);
174 usleep_range(46000, RV3032_EEBUSY_TIMEOUT);
176 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status,
177 !(status & RV3032_TLSB_EEBUSY),
178 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT);
181 rv3032_exit_eerd(rv3032, eerd);
186 static irqreturn_t rv3032_handle_irq(int irq, void *dev_id)
188 struct rv3032_data *rv3032 = dev_id;
189 unsigned long events = 0;
190 u32 status = 0, ctrl = 0;
192 if (regmap_read(rv3032->regmap, RV3032_STATUS, &status) < 0 ||
197 if (status & RV3032_STATUS_TF) {
198 status |= RV3032_STATUS_TF;
199 ctrl |= RV3032_CTRL2_TIE;
203 if (status & RV3032_STATUS_AF) {
204 status |= RV3032_STATUS_AF;
205 ctrl |= RV3032_CTRL2_AIE;
209 if (status & RV3032_STATUS_UF) {
210 status |= RV3032_STATUS_UF;
211 ctrl |= RV3032_CTRL2_UIE;
216 rtc_update_irq(rv3032->rtc, 1, events);
217 regmap_update_bits(rv3032->regmap, RV3032_STATUS, status, 0);
218 regmap_update_bits(rv3032->regmap, RV3032_CTRL2, ctrl, 0);
224 static int rv3032_get_time(struct device *dev, struct rtc_time *tm)
226 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
230 ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status);
234 if (status & (RV3032_STATUS_PORF | RV3032_STATUS_VLF))
237 ret = regmap_bulk_read(rv3032->regmap, RV3032_SEC, date, sizeof(date));
241 tm->tm_sec = bcd2bin(date[0] & 0x7f);
242 tm->tm_min = bcd2bin(date[1] & 0x7f);
243 tm->tm_hour = bcd2bin(date[2] & 0x3f);
244 tm->tm_wday = date[3] & 0x7;
245 tm->tm_mday = bcd2bin(date[4] & 0x3f);
246 tm->tm_mon = bcd2bin(date[5] & 0x1f) - 1;
247 tm->tm_year = bcd2bin(date[6]) + 100;
252 static int rv3032_set_time(struct device *dev, struct rtc_time *tm)
254 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
258 date[0] = bin2bcd(tm->tm_sec);
259 date[1] = bin2bcd(tm->tm_min);
260 date[2] = bin2bcd(tm->tm_hour);
261 date[3] = tm->tm_wday;
262 date[4] = bin2bcd(tm->tm_mday);
263 date[5] = bin2bcd(tm->tm_mon + 1);
264 date[6] = bin2bcd(tm->tm_year - 100);
266 ret = regmap_bulk_write(rv3032->regmap, RV3032_SEC, date,
271 ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS,
272 RV3032_STATUS_PORF | RV3032_STATUS_VLF, 0);
277 static int rv3032_get_alarm(struct device *dev, struct rtc_wkalrm *alrm)
279 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
281 int status, ctrl, ret;
283 ret = regmap_bulk_read(rv3032->regmap, RV3032_ALARM_MIN, alarmvals,
288 ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status);
292 ret = regmap_read(rv3032->regmap, RV3032_CTRL2, &ctrl);
296 alrm->time.tm_sec = 0;
297 alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f);
298 alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
299 alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f);
301 alrm->enabled = !!(ctrl & RV3032_CTRL2_AIE);
302 alrm->pending = (status & RV3032_STATUS_AF) && alrm->enabled;
307 static int rv3032_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
309 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
314 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2,
315 RV3032_CTRL2_AIE | RV3032_CTRL2_UIE, 0);
319 alarmvals[0] = bin2bcd(alrm->time.tm_min);
320 alarmvals[1] = bin2bcd(alrm->time.tm_hour);
321 alarmvals[2] = bin2bcd(alrm->time.tm_mday);
323 ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS,
324 RV3032_STATUS_AF, 0);
328 ret = regmap_bulk_write(rv3032->regmap, RV3032_ALARM_MIN, alarmvals,
334 if (rv3032->rtc->uie_rtctimer.enabled)
335 ctrl |= RV3032_CTRL2_UIE;
336 if (rv3032->rtc->aie_timer.enabled)
337 ctrl |= RV3032_CTRL2_AIE;
340 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2,
341 RV3032_CTRL2_UIE | RV3032_CTRL2_AIE, ctrl);
346 static int rv3032_alarm_irq_enable(struct device *dev, unsigned int enabled)
348 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
352 if (rv3032->rtc->uie_rtctimer.enabled)
353 ctrl |= RV3032_CTRL2_UIE;
354 if (rv3032->rtc->aie_timer.enabled)
355 ctrl |= RV3032_CTRL2_AIE;
358 ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS,
359 RV3032_STATUS_AF | RV3032_STATUS_UF, 0);
363 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2,
364 RV3032_CTRL2_UIE | RV3032_CTRL2_AIE, ctrl);
371 static int rv3032_read_offset(struct device *dev, long *offset)
373 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
374 int ret, value, steps;
376 ret = regmap_read(rv3032->regmap, RV3032_OFFSET, &value);
380 steps = sign_extend32(FIELD_GET(RV3032_OFFSET_MSK, value), 5);
382 *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000);
387 static int rv3032_set_offset(struct device *dev, long offset)
389 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
391 offset = clamp(offset, -7629L, 7391L) * 1000;
392 offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT);
394 return rv3032_update_cfg(rv3032, RV3032_OFFSET, RV3032_OFFSET_MSK,
395 FIELD_PREP(RV3032_OFFSET_MSK, offset));
398 static int rv3032_param_get(struct device *dev, struct rtc_param *param)
400 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
403 switch(param->param) {
406 case RTC_PARAM_BACKUP_SWITCH_MODE:
407 ret = regmap_read(rv3032->regmap, RV3032_PMU, &value);
411 value = FIELD_GET(RV3032_PMU_BSM, value);
414 case RV3032_PMU_BSM_DSM:
415 param->uvalue = RTC_BSM_DIRECT;
417 case RV3032_PMU_BSM_LSM:
418 param->uvalue = RTC_BSM_LEVEL;
421 param->uvalue = RTC_BSM_DISABLED;
433 static int rv3032_param_set(struct device *dev, struct rtc_param *param)
435 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
437 switch(param->param) {
439 case RTC_PARAM_BACKUP_SWITCH_MODE:
440 if (rv3032->trickle_charger_set)
443 switch (param->uvalue) {
444 case RTC_BSM_DISABLED:
448 mode = RV3032_PMU_BSM_DSM;
451 mode = RV3032_PMU_BSM_LSM;
457 return rv3032_update_cfg(rv3032, RV3032_PMU, RV3032_PMU_BSM,
458 FIELD_PREP(RV3032_PMU_BSM, mode));
467 static int rv3032_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
469 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
470 int status, val = 0, ret = 0;
474 ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status);
478 if (status & (RV3032_STATUS_PORF | RV3032_STATUS_VLF))
479 val = RTC_VL_DATA_INVALID;
480 return put_user(val, (unsigned int __user *)arg);
487 static int rv3032_nvram_write(void *priv, unsigned int offset, void *val, size_t bytes)
489 return regmap_bulk_write(priv, RV3032_RAM1 + offset, val, bytes);
492 static int rv3032_nvram_read(void *priv, unsigned int offset, void *val, size_t bytes)
494 return regmap_bulk_read(priv, RV3032_RAM1 + offset, val, bytes);
497 static int rv3032_eeprom_write(void *priv, unsigned int offset, void *val, size_t bytes)
499 struct rv3032_data *rv3032 = priv;
504 ret = rv3032_enter_eerd(rv3032, &eerd);
508 for (i = 0; i < bytes; i++) {
509 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_ADDR,
510 RV3032_EEPROM_USER + offset + i);
514 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_DATA, buf[i]);
518 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD,
519 RV3032_EEPROM_CMD_WRITE);
523 usleep_range(RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT);
525 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status,
526 !(status & RV3032_TLSB_EEBUSY),
527 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT);
533 rv3032_exit_eerd(rv3032, eerd);
538 static int rv3032_eeprom_read(void *priv, unsigned int offset, void *val, size_t bytes)
540 struct rv3032_data *rv3032 = priv;
541 u32 status, eerd, data;
545 ret = rv3032_enter_eerd(rv3032, &eerd);
549 for (i = 0; i < bytes; i++) {
550 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_ADDR,
551 RV3032_EEPROM_USER + offset + i);
555 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD,
556 RV3032_EEPROM_CMD_READ);
560 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status,
561 !(status & RV3032_TLSB_EEBUSY),
562 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT);
566 ret = regmap_read(rv3032->regmap, RV3032_EEPROM_DATA, &data);
573 rv3032_exit_eerd(rv3032, eerd);
578 static int rv3032_trickle_charger_setup(struct device *dev, struct rv3032_data *rv3032)
580 u32 val, ohms, voltage;
583 val = FIELD_PREP(RV3032_PMU_TCM, 1) | FIELD_PREP(RV3032_PMU_BSM, RV3032_PMU_BSM_DSM);
584 if (!device_property_read_u32(dev, "trickle-voltage-millivolt", &voltage)) {
585 for (i = 0; i < ARRAY_SIZE(rv3032_trickle_voltages); i++)
586 if (voltage == rv3032_trickle_voltages[i])
588 if (i < ARRAY_SIZE(rv3032_trickle_voltages))
589 val = FIELD_PREP(RV3032_PMU_TCM, i) |
590 FIELD_PREP(RV3032_PMU_BSM, RV3032_PMU_BSM_LSM);
593 if (device_property_read_u32(dev, "trickle-resistor-ohms", &ohms))
596 for (i = 0; i < ARRAY_SIZE(rv3032_trickle_resistors); i++)
597 if (ohms == rv3032_trickle_resistors[i])
600 if (i >= ARRAY_SIZE(rv3032_trickle_resistors)) {
601 dev_warn(dev, "invalid trickle resistor value\n");
606 rv3032->trickle_charger_set = true;
608 return rv3032_update_cfg(rv3032, RV3032_PMU,
609 RV3032_PMU_TCR | RV3032_PMU_TCM | RV3032_PMU_BSM,
610 val | FIELD_PREP(RV3032_PMU_TCR, i));
613 #ifdef CONFIG_COMMON_CLK
614 #define clkout_hw_to_rv3032(hw) container_of(hw, struct rv3032_data, clkout_hw)
616 static int clkout_xtal_rates[] = {
623 #define RV3032_HFD_STEP 8192
625 static unsigned long rv3032_clkout_recalc_rate(struct clk_hw *hw,
626 unsigned long parent_rate)
629 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw);
631 ret = regmap_read(rv3032->regmap, RV3032_CLKOUT2, &clkout);
635 if (clkout & RV3032_CLKOUT2_OS) {
636 unsigned long rate = FIELD_GET(RV3032_CLKOUT2_HFD_MSK, clkout) << 8;
638 ret = regmap_read(rv3032->regmap, RV3032_CLKOUT1, &clkout);
644 return rate * RV3032_HFD_STEP;
647 return clkout_xtal_rates[FIELD_GET(RV3032_CLKOUT2_FD_MSK, clkout)];
650 static long rv3032_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
651 unsigned long *prate)
655 if (rate < RV3032_HFD_STEP)
656 for (i = 0; i < ARRAY_SIZE(clkout_xtal_rates); i++)
657 if (clkout_xtal_rates[i] <= rate)
658 return clkout_xtal_rates[i];
660 hfd = DIV_ROUND_CLOSEST(rate, RV3032_HFD_STEP);
662 return RV3032_HFD_STEP * clamp(hfd, 0, 8192);
665 static int rv3032_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
666 unsigned long parent_rate)
668 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw);
672 for (i = 0; i < ARRAY_SIZE(clkout_xtal_rates); i++) {
673 if (clkout_xtal_rates[i] == rate) {
674 return rv3032_update_cfg(rv3032, RV3032_CLKOUT2, 0xff,
675 FIELD_PREP(RV3032_CLKOUT2_FD_MSK, i));
679 hfd = DIV_ROUND_CLOSEST(rate, RV3032_HFD_STEP);
680 hfd = clamp(hfd, 1, 8192) - 1;
682 ret = rv3032_enter_eerd(rv3032, &eerd);
686 ret = regmap_write(rv3032->regmap, RV3032_CLKOUT1, hfd & 0xff);
690 ret = regmap_write(rv3032->regmap, RV3032_CLKOUT2, RV3032_CLKOUT2_OS |
691 FIELD_PREP(RV3032_CLKOUT2_HFD_MSK, hfd >> 8));
695 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, RV3032_EEPROM_CMD_UPDATE);
699 usleep_range(46000, RV3032_EEBUSY_TIMEOUT);
701 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status,
702 !(status & RV3032_TLSB_EEBUSY),
703 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT);
706 rv3032_exit_eerd(rv3032, eerd);
711 static int rv3032_clkout_prepare(struct clk_hw *hw)
713 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw);
715 return rv3032_update_cfg(rv3032, RV3032_PMU, RV3032_PMU_NCLKE, 0);
718 static void rv3032_clkout_unprepare(struct clk_hw *hw)
720 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw);
722 rv3032_update_cfg(rv3032, RV3032_PMU, RV3032_PMU_NCLKE, RV3032_PMU_NCLKE);
725 static int rv3032_clkout_is_prepared(struct clk_hw *hw)
728 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw);
730 ret = regmap_read(rv3032->regmap, RV3032_PMU, &val);
734 return !(val & RV3032_PMU_NCLKE);
737 static const struct clk_ops rv3032_clkout_ops = {
738 .prepare = rv3032_clkout_prepare,
739 .unprepare = rv3032_clkout_unprepare,
740 .is_prepared = rv3032_clkout_is_prepared,
741 .recalc_rate = rv3032_clkout_recalc_rate,
742 .round_rate = rv3032_clkout_round_rate,
743 .set_rate = rv3032_clkout_set_rate,
746 static int rv3032_clkout_register_clk(struct rv3032_data *rv3032,
747 struct i2c_client *client)
751 struct clk_init_data init;
752 struct device_node *node = client->dev.of_node;
754 ret = regmap_update_bits(rv3032->regmap, RV3032_TLSB, RV3032_TLSB_CLKF, 0);
758 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, RV3032_CTRL2_CLKIE, 0);
762 ret = regmap_write(rv3032->regmap, RV3032_CLK_IRQ, 0);
766 init.name = "rv3032-clkout";
767 init.ops = &rv3032_clkout_ops;
769 init.parent_names = NULL;
770 init.num_parents = 0;
771 rv3032->clkout_hw.init = &init;
773 of_property_read_string(node, "clock-output-names", &init.name);
775 clk = devm_clk_register(&client->dev, &rv3032->clkout_hw);
777 of_clk_add_provider(node, of_clk_src_simple_get, clk);
783 static int rv3032_hwmon_read_temp(struct device *dev, long *mC)
785 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
790 ret = regmap_bulk_read(rv3032->regmap, RV3032_TLSB, buf, sizeof(buf));
794 temp = sign_extend32(buf[1], 7) << 4;
795 temp |= FIELD_GET(RV3032_TLSB_TEMP, buf[0]);
797 /* No blocking or shadowing on RV3032_TLSB and RV3032_TMSB */
801 ret = regmap_bulk_read(rv3032->regmap, RV3032_TLSB, buf, sizeof(buf));
805 temp = sign_extend32(buf[1], 7) << 4;
806 temp |= FIELD_GET(RV3032_TLSB_TEMP, buf[0]);
807 } while (temp != prev);
809 *mC = (temp * 1000) / 16;
814 static umode_t rv3032_hwmon_is_visible(const void *data, enum hwmon_sensor_types type,
815 u32 attr, int channel)
817 if (type != hwmon_temp)
821 case hwmon_temp_input:
828 static int rv3032_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
829 u32 attr, int channel, long *temp)
834 case hwmon_temp_input:
835 err = rv3032_hwmon_read_temp(dev, temp);
845 static const struct hwmon_channel_info * const rv3032_hwmon_info[] = {
846 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
847 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST),
851 static const struct hwmon_ops rv3032_hwmon_hwmon_ops = {
852 .is_visible = rv3032_hwmon_is_visible,
853 .read = rv3032_hwmon_read,
856 static const struct hwmon_chip_info rv3032_hwmon_chip_info = {
857 .ops = &rv3032_hwmon_hwmon_ops,
858 .info = rv3032_hwmon_info,
861 static void rv3032_hwmon_register(struct device *dev)
863 struct rv3032_data *rv3032 = dev_get_drvdata(dev);
865 if (!IS_REACHABLE(CONFIG_HWMON))
868 devm_hwmon_device_register_with_info(dev, "rv3032", rv3032, &rv3032_hwmon_chip_info, NULL);
871 static const struct rtc_class_ops rv3032_rtc_ops = {
872 .read_time = rv3032_get_time,
873 .set_time = rv3032_set_time,
874 .read_offset = rv3032_read_offset,
875 .set_offset = rv3032_set_offset,
876 .ioctl = rv3032_ioctl,
877 .read_alarm = rv3032_get_alarm,
878 .set_alarm = rv3032_set_alarm,
879 .alarm_irq_enable = rv3032_alarm_irq_enable,
880 .param_get = rv3032_param_get,
881 .param_set = rv3032_param_set,
884 static const struct regmap_config regmap_config = {
887 .max_register = 0xCA,
890 static int rv3032_probe(struct i2c_client *client)
892 struct rv3032_data *rv3032;
894 struct nvmem_config nvmem_cfg = {
895 .name = "rv3032_nvram",
899 .type = NVMEM_TYPE_BATTERY_BACKED,
900 .reg_read = rv3032_nvram_read,
901 .reg_write = rv3032_nvram_write,
903 struct nvmem_config eeprom_cfg = {
904 .name = "rv3032_eeprom",
908 .type = NVMEM_TYPE_EEPROM,
909 .reg_read = rv3032_eeprom_read,
910 .reg_write = rv3032_eeprom_write,
913 rv3032 = devm_kzalloc(&client->dev, sizeof(struct rv3032_data),
918 rv3032->regmap = devm_regmap_init_i2c(client, ®map_config);
919 if (IS_ERR(rv3032->regmap))
920 return PTR_ERR(rv3032->regmap);
922 i2c_set_clientdata(client, rv3032);
924 ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status);
928 rv3032->rtc = devm_rtc_allocate_device(&client->dev);
929 if (IS_ERR(rv3032->rtc))
930 return PTR_ERR(rv3032->rtc);
932 if (client->irq > 0) {
933 unsigned long irqflags = IRQF_TRIGGER_LOW;
935 if (dev_fwnode(&client->dev))
938 ret = devm_request_threaded_irq(&client->dev, client->irq,
939 NULL, rv3032_handle_irq,
940 irqflags | IRQF_ONESHOT,
943 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
948 clear_bit(RTC_FEATURE_ALARM, rv3032->rtc->features);
950 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL1,
951 RV3032_CTRL1_WADA, RV3032_CTRL1_WADA);
955 rv3032_trickle_charger_setup(&client->dev, rv3032);
957 set_bit(RTC_FEATURE_BACKUP_SWITCH_MODE, rv3032->rtc->features);
958 set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rv3032->rtc->features);
960 rv3032->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
961 rv3032->rtc->range_max = RTC_TIMESTAMP_END_2099;
962 rv3032->rtc->ops = &rv3032_rtc_ops;
963 ret = devm_rtc_register_device(rv3032->rtc);
967 nvmem_cfg.priv = rv3032->regmap;
968 devm_rtc_nvmem_register(rv3032->rtc, &nvmem_cfg);
969 eeprom_cfg.priv = rv3032;
970 devm_rtc_nvmem_register(rv3032->rtc, &eeprom_cfg);
972 rv3032->rtc->max_user_freq = 1;
974 #ifdef CONFIG_COMMON_CLK
975 rv3032_clkout_register_clk(rv3032, client);
978 rv3032_hwmon_register(&client->dev);
983 static const struct acpi_device_id rv3032_i2c_acpi_match[] = {
987 MODULE_DEVICE_TABLE(acpi, rv3032_i2c_acpi_match);
989 static const __maybe_unused struct of_device_id rv3032_of_match[] = {
990 { .compatible = "microcrystal,rv3032", },
993 MODULE_DEVICE_TABLE(of, rv3032_of_match);
995 static struct i2c_driver rv3032_driver = {
997 .name = "rtc-rv3032",
998 .acpi_match_table = rv3032_i2c_acpi_match,
999 .of_match_table = of_match_ptr(rv3032_of_match),
1001 .probe = rv3032_probe,
1003 module_i2c_driver(rv3032_driver);
1005 MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
1006 MODULE_DESCRIPTION("Micro Crystal RV3032 RTC driver");
1007 MODULE_LICENSE("GPL v2");