1 // SPDX-License-Identifier: GPL-2.0
3 * RTC driver for the Micro Crystal RV3028
5 * Copyright (C) 2019 Micro Crystal SA
7 * Alexandre Belloni <alexandre.belloni@bootlin.com>
11 #include <linux/clk-provider.h>
12 #include <linux/bcd.h>
13 #include <linux/bitops.h>
14 #include <linux/i2c.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/log2.h>
18 #include <linux/module.h>
19 #include <linux/of_device.h>
20 #include <linux/regmap.h>
21 #include <linux/rtc.h>
23 #define RV3028_SEC 0x00
24 #define RV3028_MIN 0x01
25 #define RV3028_HOUR 0x02
26 #define RV3028_WDAY 0x03
27 #define RV3028_DAY 0x04
28 #define RV3028_MONTH 0x05
29 #define RV3028_YEAR 0x06
30 #define RV3028_ALARM_MIN 0x07
31 #define RV3028_ALARM_HOUR 0x08
32 #define RV3028_ALARM_DAY 0x09
33 #define RV3028_STATUS 0x0E
34 #define RV3028_CTRL1 0x0F
35 #define RV3028_CTRL2 0x10
36 #define RV3028_EVT_CTRL 0x13
37 #define RV3028_TS_COUNT 0x14
38 #define RV3028_TS_SEC 0x15
39 #define RV3028_RAM1 0x1F
40 #define RV3028_EEPROM_ADDR 0x25
41 #define RV3028_EEPROM_DATA 0x26
42 #define RV3028_EEPROM_CMD 0x27
43 #define RV3028_CLKOUT 0x35
44 #define RV3028_OFFSET 0x36
45 #define RV3028_BACKUP 0x37
47 #define RV3028_STATUS_PORF BIT(0)
48 #define RV3028_STATUS_EVF BIT(1)
49 #define RV3028_STATUS_AF BIT(2)
50 #define RV3028_STATUS_TF BIT(3)
51 #define RV3028_STATUS_UF BIT(4)
52 #define RV3028_STATUS_BSF BIT(5)
53 #define RV3028_STATUS_CLKF BIT(6)
54 #define RV3028_STATUS_EEBUSY BIT(7)
56 #define RV3028_CLKOUT_FD_MASK GENMASK(2, 0)
57 #define RV3028_CLKOUT_PORIE BIT(3)
58 #define RV3028_CLKOUT_CLKSY BIT(6)
59 #define RV3028_CLKOUT_CLKOE BIT(7)
61 #define RV3028_CTRL1_EERD BIT(3)
62 #define RV3028_CTRL1_WADA BIT(5)
64 #define RV3028_CTRL2_RESET BIT(0)
65 #define RV3028_CTRL2_12_24 BIT(1)
66 #define RV3028_CTRL2_EIE BIT(2)
67 #define RV3028_CTRL2_AIE BIT(3)
68 #define RV3028_CTRL2_TIE BIT(4)
69 #define RV3028_CTRL2_UIE BIT(5)
70 #define RV3028_CTRL2_TSE BIT(7)
72 #define RV3028_EVT_CTRL_TSR BIT(2)
74 #define RV3028_EEPROM_CMD_UPDATE 0x11
75 #define RV3028_EEPROM_CMD_WRITE 0x21
76 #define RV3028_EEPROM_CMD_READ 0x22
78 #define RV3028_EEBUSY_POLL 10000
79 #define RV3028_EEBUSY_TIMEOUT 100000
81 #define RV3028_BACKUP_TCE BIT(5)
82 #define RV3028_BACKUP_TCR_MASK GENMASK(1,0)
83 #define RV3028_BACKUP_BSM_MASK 0x0C
85 #define OFFSET_STEP_PPT 953674
92 struct regmap *regmap;
93 struct rtc_device *rtc;
94 enum rv3028_type type;
95 #ifdef CONFIG_COMMON_CLK
96 struct clk_hw clkout_hw;
100 static u16 rv3028_trickle_resistors[] = {3000, 5000, 9000, 15000};
102 static ssize_t timestamp0_store(struct device *dev,
103 struct device_attribute *attr,
104 const char *buf, size_t count)
106 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
108 regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR,
109 RV3028_EVT_CTRL_TSR);
114 static ssize_t timestamp0_show(struct device *dev,
115 struct device_attribute *attr, char *buf)
117 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
122 ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
129 ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date,
134 tm.tm_sec = bcd2bin(date[0]);
135 tm.tm_min = bcd2bin(date[1]);
136 tm.tm_hour = bcd2bin(date[2]);
137 tm.tm_mday = bcd2bin(date[3]);
138 tm.tm_mon = bcd2bin(date[4]) - 1;
139 tm.tm_year = bcd2bin(date[5]) + 100;
141 ret = rtc_valid_tm(&tm);
145 return sprintf(buf, "%llu\n",
146 (unsigned long long)rtc_tm_to_time64(&tm));
149 static DEVICE_ATTR_RW(timestamp0);
151 static ssize_t timestamp0_count_show(struct device *dev,
152 struct device_attribute *attr, char *buf)
154 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent);
157 ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count);
161 return sprintf(buf, "%u\n", count);
164 static DEVICE_ATTR_RO(timestamp0_count);
166 static struct attribute *rv3028_attrs[] = {
167 &dev_attr_timestamp0.attr,
168 &dev_attr_timestamp0_count.attr,
172 static const struct attribute_group rv3028_attr_group = {
173 .attrs = rv3028_attrs,
176 static int rv3028_exit_eerd(struct rv3028_data *rv3028, u32 eerd)
181 return regmap_update_bits(rv3028->regmap, RV3028_CTRL1, RV3028_CTRL1_EERD, 0);
184 static int rv3028_enter_eerd(struct rv3028_data *rv3028, u32 *eerd)
189 ret = regmap_read(rv3028->regmap, RV3028_CTRL1, &ctrl1);
193 *eerd = ctrl1 & RV3028_CTRL1_EERD;
197 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
198 RV3028_CTRL1_EERD, RV3028_CTRL1_EERD);
202 ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
203 !(status & RV3028_STATUS_EEBUSY),
204 RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
206 rv3028_exit_eerd(rv3028, *eerd);
214 static int rv3028_update_eeprom(struct rv3028_data *rv3028, u32 eerd)
219 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
223 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, RV3028_EEPROM_CMD_UPDATE);
227 usleep_range(63000, RV3028_EEBUSY_TIMEOUT);
229 ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
230 !(status & RV3028_STATUS_EEBUSY),
231 RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
234 rv3028_exit_eerd(rv3028, eerd);
239 static int rv3028_update_cfg(struct rv3028_data *rv3028, unsigned int reg,
240 unsigned int mask, unsigned int val)
245 ret = rv3028_enter_eerd(rv3028, &eerd);
249 ret = regmap_update_bits(rv3028->regmap, reg, mask, val);
251 rv3028_exit_eerd(rv3028, eerd);
255 return rv3028_update_eeprom(rv3028, eerd);
258 static irqreturn_t rv3028_handle_irq(int irq, void *dev_id)
260 struct rv3028_data *rv3028 = dev_id;
261 unsigned long events = 0;
262 u32 status = 0, ctrl = 0;
264 if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 ||
269 status &= ~RV3028_STATUS_PORF;
271 if (status & RV3028_STATUS_TF) {
272 status |= RV3028_STATUS_TF;
273 ctrl |= RV3028_CTRL2_TIE;
277 if (status & RV3028_STATUS_AF) {
278 status |= RV3028_STATUS_AF;
279 ctrl |= RV3028_CTRL2_AIE;
283 if (status & RV3028_STATUS_UF) {
284 status |= RV3028_STATUS_UF;
285 ctrl |= RV3028_CTRL2_UIE;
290 rtc_update_irq(rv3028->rtc, 1, events);
291 regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0);
292 regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0);
295 if (status & RV3028_STATUS_EVF) {
296 sysfs_notify(&rv3028->rtc->dev.kobj, NULL,
297 dev_attr_timestamp0.attr.name);
298 dev_warn(&rv3028->rtc->dev, "event detected");
304 static int rv3028_get_time(struct device *dev, struct rtc_time *tm)
306 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
310 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
314 if (status & RV3028_STATUS_PORF)
317 ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date));
321 tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f);
322 tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f);
323 tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f);
324 tm->tm_wday = date[RV3028_WDAY] & 0x7f;
325 tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f);
326 tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1;
327 tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100;
332 static int rv3028_set_time(struct device *dev, struct rtc_time *tm)
334 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
338 date[RV3028_SEC] = bin2bcd(tm->tm_sec);
339 date[RV3028_MIN] = bin2bcd(tm->tm_min);
340 date[RV3028_HOUR] = bin2bcd(tm->tm_hour);
341 date[RV3028_WDAY] = tm->tm_wday;
342 date[RV3028_DAY] = bin2bcd(tm->tm_mday);
343 date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1);
344 date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100);
347 * Writing to the Seconds register has the same effect as setting RESET
350 ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date,
355 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
356 RV3028_STATUS_PORF, 0);
361 static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm)
363 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
365 int status, ctrl, ret;
367 ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
372 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
376 ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl);
380 alrm->time.tm_sec = 0;
381 alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f);
382 alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f);
383 alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f);
385 alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE);
386 alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled;
391 static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
393 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
398 /* The alarm has no seconds, round up to nearest minute */
399 if (alrm->time.tm_sec) {
400 time64_t alarm_time = rtc_tm_to_time64(&alrm->time);
402 alarm_time += 60 - alrm->time.tm_sec;
403 rtc_time64_to_tm(alarm_time, &alrm->time);
406 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
407 RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0);
411 alarmvals[0] = bin2bcd(alrm->time.tm_min);
412 alarmvals[1] = bin2bcd(alrm->time.tm_hour);
413 alarmvals[2] = bin2bcd(alrm->time.tm_mday);
415 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
416 RV3028_STATUS_AF, 0);
420 ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals,
426 if (rv3028->rtc->uie_rtctimer.enabled)
427 ctrl |= RV3028_CTRL2_UIE;
428 if (rv3028->rtc->aie_timer.enabled)
429 ctrl |= RV3028_CTRL2_AIE;
432 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
433 RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
438 static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled)
440 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
444 if (rv3028->rtc->uie_rtctimer.enabled)
445 ctrl |= RV3028_CTRL2_UIE;
446 if (rv3028->rtc->aie_timer.enabled)
447 ctrl |= RV3028_CTRL2_AIE;
450 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
451 RV3028_STATUS_AF | RV3028_STATUS_UF, 0);
455 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
456 RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl);
463 static int rv3028_read_offset(struct device *dev, long *offset)
465 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
466 int ret, value, steps;
468 ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value);
472 steps = sign_extend32(value << 1, 8);
474 ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value);
480 *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000);
485 static int rv3028_set_offset(struct device *dev, long offset)
487 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
491 offset = clamp(offset, -244141L, 243187L) * 1000;
492 offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT);
494 ret = rv3028_enter_eerd(rv3028, &eerd);
498 ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1);
502 ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7),
507 return rv3028_update_eeprom(rv3028, eerd);
510 rv3028_exit_eerd(rv3028, eerd);
516 static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
518 struct rv3028_data *rv3028 = dev_get_drvdata(dev);
523 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
527 status = status & RV3028_STATUS_PORF ? RTC_VL_DATA_INVALID : 0;
528 return put_user(status, (unsigned int __user *)arg);
535 static int rv3028_nvram_write(void *priv, unsigned int offset, void *val,
538 return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes);
541 static int rv3028_nvram_read(void *priv, unsigned int offset, void *val,
544 return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes);
547 static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val,
550 struct rv3028_data *rv3028 = priv;
555 ret = rv3028_enter_eerd(rv3028, &eerd);
559 for (i = 0; i < bytes; i++) {
560 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
564 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_DATA, buf[i]);
568 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
572 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
573 RV3028_EEPROM_CMD_WRITE);
577 usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT);
579 ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
580 !(status & RV3028_STATUS_EEBUSY),
582 RV3028_EEBUSY_TIMEOUT);
588 rv3028_exit_eerd(rv3028, eerd);
593 static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val,
596 struct rv3028_data *rv3028 = priv;
597 u32 status, eerd, data;
601 ret = rv3028_enter_eerd(rv3028, &eerd);
605 for (i = 0; i < bytes; i++) {
606 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_ADDR, offset + i);
610 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD, 0x0);
614 ret = regmap_write(rv3028->regmap, RV3028_EEPROM_CMD,
615 RV3028_EEPROM_CMD_READ);
619 ret = regmap_read_poll_timeout(rv3028->regmap, RV3028_STATUS, status,
620 !(status & RV3028_STATUS_EEBUSY),
622 RV3028_EEBUSY_TIMEOUT);
626 ret = regmap_read(rv3028->regmap, RV3028_EEPROM_DATA, &data);
633 rv3028_exit_eerd(rv3028, eerd);
638 #ifdef CONFIG_COMMON_CLK
639 #define clkout_hw_to_rv3028(hw) container_of(hw, struct rv3028_data, clkout_hw)
641 static int clkout_rates[] = {
650 static unsigned long rv3028_clkout_recalc_rate(struct clk_hw *hw,
651 unsigned long parent_rate)
654 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
656 ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
660 clkout &= RV3028_CLKOUT_FD_MASK;
661 return clkout_rates[clkout];
664 static long rv3028_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
665 unsigned long *prate)
669 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
670 if (clkout_rates[i] <= rate)
671 return clkout_rates[i];
676 static int rv3028_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
677 unsigned long parent_rate)
681 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
683 ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &enabled);
687 ret = regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
691 enabled &= RV3028_CLKOUT_CLKOE;
693 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
694 if (clkout_rates[i] == rate)
695 return rv3028_update_cfg(rv3028, RV3028_CLKOUT, 0xff,
696 RV3028_CLKOUT_CLKSY | enabled | i);
701 static int rv3028_clkout_prepare(struct clk_hw *hw)
703 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
705 return regmap_write(rv3028->regmap, RV3028_CLKOUT,
706 RV3028_CLKOUT_CLKSY | RV3028_CLKOUT_CLKOE);
709 static void rv3028_clkout_unprepare(struct clk_hw *hw)
711 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
713 regmap_write(rv3028->regmap, RV3028_CLKOUT, 0x0);
714 regmap_update_bits(rv3028->regmap, RV3028_STATUS,
715 RV3028_STATUS_CLKF, 0);
718 static int rv3028_clkout_is_prepared(struct clk_hw *hw)
721 struct rv3028_data *rv3028 = clkout_hw_to_rv3028(hw);
723 ret = regmap_read(rv3028->regmap, RV3028_CLKOUT, &clkout);
727 return !!(clkout & RV3028_CLKOUT_CLKOE);
730 static const struct clk_ops rv3028_clkout_ops = {
731 .prepare = rv3028_clkout_prepare,
732 .unprepare = rv3028_clkout_unprepare,
733 .is_prepared = rv3028_clkout_is_prepared,
734 .recalc_rate = rv3028_clkout_recalc_rate,
735 .round_rate = rv3028_clkout_round_rate,
736 .set_rate = rv3028_clkout_set_rate,
739 static int rv3028_clkout_register_clk(struct rv3028_data *rv3028,
740 struct i2c_client *client)
744 struct clk_init_data init;
745 struct device_node *node = client->dev.of_node;
747 ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS,
748 RV3028_STATUS_CLKF, 0);
752 init.name = "rv3028-clkout";
753 init.ops = &rv3028_clkout_ops;
755 init.parent_names = NULL;
756 init.num_parents = 0;
757 rv3028->clkout_hw.init = &init;
759 /* optional override of the clockname */
760 of_property_read_string(node, "clock-output-names", &init.name);
762 /* register the clock */
763 clk = devm_clk_register(&client->dev, &rv3028->clkout_hw);
765 of_clk_add_provider(node, of_clk_src_simple_get, clk);
771 static const struct rtc_class_ops rv3028_rtc_ops = {
772 .read_time = rv3028_get_time,
773 .set_time = rv3028_set_time,
774 .read_alarm = rv3028_get_alarm,
775 .set_alarm = rv3028_set_alarm,
776 .alarm_irq_enable = rv3028_alarm_irq_enable,
777 .read_offset = rv3028_read_offset,
778 .set_offset = rv3028_set_offset,
779 .ioctl = rv3028_ioctl,
782 static const struct regmap_config regmap_config = {
785 .max_register = 0x37,
788 static int rv3028_probe(struct i2c_client *client)
790 struct rv3028_data *rv3028;
794 struct nvmem_config nvmem_cfg = {
795 .name = "rv3028_nvram",
799 .type = NVMEM_TYPE_BATTERY_BACKED,
800 .reg_read = rv3028_nvram_read,
801 .reg_write = rv3028_nvram_write,
803 struct nvmem_config eeprom_cfg = {
804 .name = "rv3028_eeprom",
808 .type = NVMEM_TYPE_EEPROM,
809 .reg_read = rv3028_eeprom_read,
810 .reg_write = rv3028_eeprom_write,
813 rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data),
818 rv3028->regmap = devm_regmap_init_i2c(client, ®map_config);
819 if (IS_ERR(rv3028->regmap))
820 return PTR_ERR(rv3028->regmap);
822 i2c_set_clientdata(client, rv3028);
824 ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status);
828 if (status & RV3028_STATUS_AF)
829 dev_warn(&client->dev, "An alarm may have been missed.\n");
831 rv3028->rtc = devm_rtc_allocate_device(&client->dev);
832 if (IS_ERR(rv3028->rtc))
833 return PTR_ERR(rv3028->rtc);
835 if (client->irq > 0) {
836 ret = devm_request_threaded_irq(&client->dev, client->irq,
837 NULL, rv3028_handle_irq,
838 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
841 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
846 clear_bit(RTC_FEATURE_ALARM, rv3028->rtc->features);
848 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1,
849 RV3028_CTRL1_WADA, RV3028_CTRL1_WADA);
853 /* setup timestamping */
854 ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2,
855 RV3028_CTRL2_EIE | RV3028_CTRL2_TSE,
856 RV3028_CTRL2_EIE | RV3028_CTRL2_TSE);
860 /* setup backup switchover mode */
861 if (!device_property_read_u8(&client->dev, "backup-switchover-mode",
864 ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP,
865 RV3028_BACKUP_BSM_MASK,
871 dev_warn(&client->dev, "invalid backup switchover mode value\n");
875 /* setup trickle charger */
876 if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms",
880 for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++)
881 if (ohms == rv3028_trickle_resistors[i])
884 if (i < ARRAY_SIZE(rv3028_trickle_resistors)) {
885 ret = rv3028_update_cfg(rv3028, RV3028_BACKUP, RV3028_BACKUP_TCE |
886 RV3028_BACKUP_TCR_MASK, RV3028_BACKUP_TCE | i);
890 dev_warn(&client->dev, "invalid trickle resistor value\n");
894 ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group);
898 rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
899 rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099;
900 rv3028->rtc->ops = &rv3028_rtc_ops;
901 ret = devm_rtc_register_device(rv3028->rtc);
905 nvmem_cfg.priv = rv3028->regmap;
906 devm_rtc_nvmem_register(rv3028->rtc, &nvmem_cfg);
907 eeprom_cfg.priv = rv3028;
908 devm_rtc_nvmem_register(rv3028->rtc, &eeprom_cfg);
910 rv3028->rtc->max_user_freq = 1;
912 #ifdef CONFIG_COMMON_CLK
913 rv3028_clkout_register_clk(rv3028, client);
918 static const __maybe_unused struct of_device_id rv3028_of_match[] = {
919 { .compatible = "microcrystal,rv3028", },
922 MODULE_DEVICE_TABLE(of, rv3028_of_match);
924 static struct i2c_driver rv3028_driver = {
926 .name = "rtc-rv3028",
927 .of_match_table = of_match_ptr(rv3028_of_match),
929 .probe_new = rv3028_probe,
931 module_i2c_driver(rv3028_driver);
933 MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>");
934 MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver");
935 MODULE_LICENSE("GPL v2");