drivers/rtc/rtc-pcf85363.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * drivers/rtc/rtc-pcf85363.c
   4  *
   5  * Driver for NXP PCF85363 real-time clock.
   6  *
   7  * Copyright (C) 2017 Eric Nelson
   8  */
   9 #include <linux/module.h>
  10 #include <linux/i2c.h>
  11 #include <linux/slab.h>
  12 #include <linux/rtc.h>
  13 #include <linux/init.h>
  14 #include <linux/err.h>
  15 #include <linux/errno.h>
  16 #include <linux/bcd.h>
  17 #include <linux/of.h>
  18 #include <linux/of_device.h>
  19 #include <linux/regmap.h>
  20
  21 /*
  22  * Date/Time registers
  23  */
  24 #define DT_100THS       0x00
  25 #define DT_SECS         0x01
  26 #define DT_MINUTES      0x02
  27 #define DT_HOURS        0x03
  28 #define DT_DAYS         0x04
  29 #define DT_WEEKDAYS     0x05
  30 #define DT_MONTHS       0x06
  31 #define DT_YEARS        0x07
  32
  33 /*
  34  * Alarm registers
  35  */
  36 #define DT_SECOND_ALM1  0x08
  37 #define DT_MINUTE_ALM1  0x09
  38 #define DT_HOUR_ALM1    0x0a
  39 #define DT_DAY_ALM1     0x0b
  40 #define DT_MONTH_ALM1   0x0c
  41 #define DT_MINUTE_ALM2  0x0d
  42 #define DT_HOUR_ALM2    0x0e
  43 #define DT_WEEKDAY_ALM2 0x0f
  44 #define DT_ALARM_EN     0x10
  45
  46 /*
  47  * Time stamp registers
  48  */
  49 #define DT_TIMESTAMP1   0x11
  50 #define DT_TIMESTAMP2   0x17
  51 #define DT_TIMESTAMP3   0x1d
  52 #define DT_TS_MODE      0x23
  53
  54 /*
  55  * control registers
  56  */
  57 #define CTRL_OFFSET     0x24
  58 #define CTRL_OSCILLATOR 0x25
  59 #define CTRL_BATTERY    0x26
  60 #define CTRL_PIN_IO     0x27
  61 #define CTRL_FUNCTION   0x28
  62 #define CTRL_INTA_EN    0x29
  63 #define CTRL_INTB_EN    0x2a
  64 #define CTRL_FLAGS      0x2b
  65 #define CTRL_RAMBYTE    0x2c
  66 #define CTRL_WDOG       0x2d
  67 #define CTRL_STOP_EN    0x2e
  68 #define CTRL_RESETS     0x2f
  69 #define CTRL_RAM        0x40
  70
  71 #define ALRM_SEC_A1E    BIT(0)
  72 #define ALRM_MIN_A1E    BIT(1)
  73 #define ALRM_HR_A1E     BIT(2)
  74 #define ALRM_DAY_A1E    BIT(3)
  75 #define ALRM_MON_A1E    BIT(4)
  76 #define ALRM_MIN_A2E    BIT(5)
  77 #define ALRM_HR_A2E     BIT(6)
  78 #define ALRM_DAY_A2E    BIT(7)
  79
  80 #define INT_WDIE        BIT(0)
  81 #define INT_BSIE        BIT(1)
  82 #define INT_TSRIE       BIT(2)
  83 #define INT_A2IE        BIT(3)
  84 #define INT_A1IE        BIT(4)
  85 #define INT_OIE         BIT(5)
  86 #define INT_PIE         BIT(6)
  87 #define INT_ILP         BIT(7)
  88
  89 #define FLAGS_TSR1F     BIT(0)
  90 #define FLAGS_TSR2F     BIT(1)
  91 #define FLAGS_TSR3F     BIT(2)
  92 #define FLAGS_BSF       BIT(3)
  93 #define FLAGS_WDF       BIT(4)
  94 #define FLAGS_A1F       BIT(5)
  95 #define FLAGS_A2F       BIT(6)
  96 #define FLAGS_PIF       BIT(7)
  97
  98 #define PIN_IO_INTAPM   GENMASK(1, 0)
  99 #define PIN_IO_INTA_CLK 0
 100 #define PIN_IO_INTA_BAT 1
 101 #define PIN_IO_INTA_OUT 2
 102 #define PIN_IO_INTA_HIZ 3
 103
 104 #define OSC_CAP_SEL     GENMASK(1, 0)
 105 #define OSC_CAP_6000    0x01
 106 #define OSC_CAP_12500   0x02
 107
 108 #define STOP_EN_STOP    BIT(0)
 109
 110 #define RESET_CPR       0xa4
 111
 112 #define NVRAM_SIZE      0x40
 113
 114 struct pcf85363 {
 115         struct rtc_device       *rtc;
 116         struct regmap           *regmap;
 117 };
 118
 119 struct pcf85x63_config {
 120         struct regmap_config regmap;
 121         unsigned int num_nvram;
 122 };
 123
 124 static int pcf85363_load_capacitance(struct pcf85363 *pcf85363, struct device_node *node)
 125 {
 126         u32 load = 7000;
 127         u8 value = 0;
 128
 129         of_property_read_u32(node, "quartz-load-femtofarads", &load);
 130
 131         switch (load) {
 132         default:
 133                 dev_warn(&pcf85363->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 7000",
 134                          load);
 135                 fallthrough;
 136         case 7000:
 137                 break;
 138         case 6000:
 139                 value = OSC_CAP_6000;
 140                 break;
 141         case 12500:
 142                 value = OSC_CAP_12500;
 143                 break;
 144         }
 145
 146         return regmap_update_bits(pcf85363->regmap, CTRL_OSCILLATOR,
 147                                   OSC_CAP_SEL, value);
 148 }
 149
 150 static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm)
 151 {
 152         struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
 153         unsigned char buf[DT_YEARS + 1];
 154         int ret, len = sizeof(buf);
 155
 156         /* read the RTC date and time registers all at once */
 157         ret = regmap_bulk_read(pcf85363->regmap, DT_100THS, buf, len);
 158         if (ret) {
 159                 dev_err(dev, "%s: error %d\n", __func__, ret);
 160                 return ret;
 161         }
 162
 163         tm->tm_year = bcd2bin(buf[DT_YEARS]);
 164         /* adjust for 1900 base of rtc_time */
 165         tm->tm_year += 100;
 166
 167         tm->tm_wday = buf[DT_WEEKDAYS] & 7;
 168         buf[DT_SECS] &= 0x7F;
 169         tm->tm_sec = bcd2bin(buf[DT_SECS]);
 170         buf[DT_MINUTES] &= 0x7F;
 171         tm->tm_min = bcd2bin(buf[DT_MINUTES]);
 172         tm->tm_hour = bcd2bin(buf[DT_HOURS]);
 173         tm->tm_mday = bcd2bin(buf[DT_DAYS]);
 174         tm->tm_mon = bcd2bin(buf[DT_MONTHS]) - 1;
 175
 176         return 0;
 177 }
 178
 179 static int pcf85363_rtc_set_time(struct device *dev, struct rtc_time *tm)
 180 {
 181         struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
 182         unsigned char tmp[11];
 183         unsigned char *buf = &tmp[2];
 184         int ret;
 185
 186         tmp[0] = STOP_EN_STOP;
 187         tmp[1] = RESET_CPR;
 188
 189         buf[DT_100THS] = 0;
 190         buf[DT_SECS] = bin2bcd(tm->tm_sec);
 191         buf[DT_MINUTES] = bin2bcd(tm->tm_min);
 192         buf[DT_HOURS] = bin2bcd(tm->tm_hour);
 193         buf[DT_DAYS] = bin2bcd(tm->tm_mday);
 194         buf[DT_WEEKDAYS] = tm->tm_wday;
 195         buf[DT_MONTHS] = bin2bcd(tm->tm_mon + 1);
 196         buf[DT_YEARS] = bin2bcd(tm->tm_year % 100);
 197
 198         ret = regmap_bulk_write(pcf85363->regmap, CTRL_STOP_EN,
 199                                 tmp, 2);
 200         if (ret)
 201                 return ret;
 202
 203         ret = regmap_bulk_write(pcf85363->regmap, DT_100THS,
 204                                 buf, sizeof(tmp) - 2);
 205         if (ret)
 206                 return ret;
 207
 208         return regmap_write(pcf85363->regmap, CTRL_STOP_EN, 0);
 209 }
 210
 211 static int pcf85363_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 212 {
 213         struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
 214         unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
 215         unsigned int val;
 216         int ret;
 217
 218         ret = regmap_bulk_read(pcf85363->regmap, DT_SECOND_ALM1, buf,
 219                                sizeof(buf));
 220         if (ret)
 221                 return ret;
 222
 223         alrm->time.tm_sec = bcd2bin(buf[0]);
 224         alrm->time.tm_min = bcd2bin(buf[1]);
 225         alrm->time.tm_hour = bcd2bin(buf[2]);
 226         alrm->time.tm_mday = bcd2bin(buf[3]);
 227         alrm->time.tm_mon = bcd2bin(buf[4]) - 1;
 228
 229         ret = regmap_read(pcf85363->regmap, CTRL_INTA_EN, &val);
 230         if (ret)
 231                 return ret;
 232
 233         alrm->enabled =  !!(val & INT_A1IE);
 234
 235         return 0;
 236 }
 237
 238 static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned
 239                                           int enabled)
 240 {
 241         unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E |
 242                                    ALRM_DAY_A1E | ALRM_MON_A1E;
 243         int ret;
 244
 245         ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags,
 246                                  enabled ? alarm_flags : 0);
 247         if (ret)
 248                 return ret;
 249
 250         ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN,
 251                                  INT_A1IE, enabled ? INT_A1IE : 0);
 252
 253         if (ret || enabled)
 254                 return ret;
 255
 256         /* clear current flags */
 257         return regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
 258 }
 259
 260 static int pcf85363_rtc_alarm_irq_enable(struct device *dev,
 261                                          unsigned int enabled)
 262 {
 263         struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
 264
 265         return _pcf85363_rtc_alarm_irq_enable(pcf85363, enabled);
 266 }
 267
 268 static int pcf85363_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 269 {
 270         struct pcf85363 *pcf85363 = dev_get_drvdata(dev);
 271         unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1];
 272         int ret;
 273
 274         buf[0] = bin2bcd(alrm->time.tm_sec);
 275         buf[1] = bin2bcd(alrm->time.tm_min);
 276         buf[2] = bin2bcd(alrm->time.tm_hour);
 277         buf[3] = bin2bcd(alrm->time.tm_mday);
 278         buf[4] = bin2bcd(alrm->time.tm_mon + 1);
 279
 280         /*
 281          * Disable the alarm interrupt before changing the value to avoid
 282          * spurious interrupts
 283          */
 284         ret = _pcf85363_rtc_alarm_irq_enable(pcf85363, 0);
 285         if (ret)
 286                 return ret;
 287
 288         ret = regmap_bulk_write(pcf85363->regmap, DT_SECOND_ALM1, buf,
 289                                 sizeof(buf));
 290         if (ret)
 291                 return ret;
 292
 293         return _pcf85363_rtc_alarm_irq_enable(pcf85363, alrm->enabled);
 294 }
 295
 296 static irqreturn_t pcf85363_rtc_handle_irq(int irq, void *dev_id)
 297 {
 298         struct pcf85363 *pcf85363 = i2c_get_clientdata(dev_id);
 299         unsigned int flags;
 300         int err;
 301
 302         err = regmap_read(pcf85363->regmap, CTRL_FLAGS, &flags);
 303         if (err)
 304                 return IRQ_NONE;
 305
 306         if (flags & FLAGS_A1F) {
 307                 rtc_update_irq(pcf85363->rtc, 1, RTC_IRQF | RTC_AF);
 308                 regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0);
 309                 return IRQ_HANDLED;
 310         }
 311
 312         return IRQ_NONE;
 313 }
 314
 315 static const struct rtc_class_ops rtc_ops = {
 316         .read_time      = pcf85363_rtc_read_time,
 317         .set_time       = pcf85363_rtc_set_time,
 318         .read_alarm     = pcf85363_rtc_read_alarm,
 319         .set_alarm      = pcf85363_rtc_set_alarm,
 320         .alarm_irq_enable = pcf85363_rtc_alarm_irq_enable,
 321 };
 322
 323 static int pcf85363_nvram_read(void *priv, unsigned int offset, void *val,
 324                                size_t bytes)
 325 {
 326         struct pcf85363 *pcf85363 = priv;
 327
 328         return regmap_bulk_read(pcf85363->regmap, CTRL_RAM + offset,
 329                                 val, bytes);
 330 }
 331
 332 static int pcf85363_nvram_write(void *priv, unsigned int offset, void *val,
 333                                 size_t bytes)
 334 {
 335         struct pcf85363 *pcf85363 = priv;
 336
 337         return regmap_bulk_write(pcf85363->regmap, CTRL_RAM + offset,
 338                                  val, bytes);
 339 }
 340
 341 static int pcf85x63_nvram_read(void *priv, unsigned int offset, void *val,
 342                                size_t bytes)
 343 {
 344         struct pcf85363 *pcf85363 = priv;
 345         unsigned int tmp_val;
 346         int ret;
 347
 348         ret = regmap_read(pcf85363->regmap, CTRL_RAMBYTE, &tmp_val);
 349         (*(unsigned char *) val) = (unsigned char) tmp_val;
 350
 351         return ret;
 352 }
 353
 354 static int pcf85x63_nvram_write(void *priv, unsigned int offset, void *val,
 355                                 size_t bytes)
 356 {
 357         struct pcf85363 *pcf85363 = priv;
 358         unsigned char tmp_val;
 359
 360         tmp_val = *((unsigned char *)val);
 361         return regmap_write(pcf85363->regmap, CTRL_RAMBYTE,
 362                                 (unsigned int)tmp_val);
 363 }
 364
 365 static const struct pcf85x63_config pcf_85263_config = {
 366         .regmap = {
 367                 .reg_bits = 8,
 368                 .val_bits = 8,
 369                 .max_register = 0x2f,
 370         },
 371         .num_nvram = 1
 372 };
 373
 374 static const struct pcf85x63_config pcf_85363_config = {
 375         .regmap = {
 376                 .reg_bits = 8,
 377                 .val_bits = 8,
 378                 .max_register = 0x7f,
 379         },
 380         .num_nvram = 2
 381 };
 382
 383 static int pcf85363_probe(struct i2c_client *client)
 384 {
 385         struct pcf85363 *pcf85363;
 386         const struct pcf85x63_config *config = &pcf_85363_config;
 387         const void *data = of_device_get_match_data(&client->dev);
 388         static struct nvmem_config nvmem_cfg[] = {
 389                 {
 390                         .name = "pcf85x63-",
 391                         .word_size = 1,
 392                         .stride = 1,
 393                         .size = 1,
 394                         .reg_read = pcf85x63_nvram_read,
 395                         .reg_write = pcf85x63_nvram_write,
 396                 }, {
 397                         .name = "pcf85363-",
 398                         .word_size = 1,
 399                         .stride = 1,
 400                         .size = NVRAM_SIZE,
 401                         .reg_read = pcf85363_nvram_read,
 402                         .reg_write = pcf85363_nvram_write,
 403                 },
 404         };
 405         int ret, i, err;
 406
 407         if (data)
 408                 config = data;
 409
 410         pcf85363 = devm_kzalloc(&client->dev, sizeof(struct pcf85363),
 411                                 GFP_KERNEL);
 412         if (!pcf85363)
 413                 return -ENOMEM;
 414
 415         pcf85363->regmap = devm_regmap_init_i2c(client, &config->regmap);
 416         if (IS_ERR(pcf85363->regmap)) {
 417                 dev_err(&client->dev, "regmap allocation failed\n");
 418                 return PTR_ERR(pcf85363->regmap);
 419         }
 420
 421         i2c_set_clientdata(client, pcf85363);
 422
 423         pcf85363->rtc = devm_rtc_allocate_device(&client->dev);
 424         if (IS_ERR(pcf85363->rtc))
 425                 return PTR_ERR(pcf85363->rtc);
 426
 427         err = pcf85363_load_capacitance(pcf85363, client->dev.of_node);
 428         if (err < 0)
 429                 dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
 430                          err);
 431
 432         pcf85363->rtc->ops = &rtc_ops;
 433         pcf85363->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
 434         pcf85363->rtc->range_max = RTC_TIMESTAMP_END_2099;
 435         clear_bit(RTC_FEATURE_ALARM, pcf85363->rtc->features);
 436
 437         if (client->irq > 0) {
 438                 unsigned long irqflags = IRQF_TRIGGER_LOW;
 439
 440                 if (dev_fwnode(&client->dev))
 441                         irqflags = 0;
 442
 443                 regmap_write(pcf85363->regmap, CTRL_FLAGS, 0);
 444                 regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO,
 445                                    PIN_IO_INTA_OUT, PIN_IO_INTAPM);
 446                 ret = devm_request_threaded_irq(&client->dev, client->irq,
 447                                                 NULL, pcf85363_rtc_handle_irq,
 448                                                 irqflags | IRQF_ONESHOT,
 449                                                 "pcf85363", client);
 450                 if (ret)
 451                         dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
 452                 else
 453                         set_bit(RTC_FEATURE_ALARM, pcf85363->rtc->features);
 454         }
 455
 456         ret = devm_rtc_register_device(pcf85363->rtc);
 457
 458         for (i = 0; i < config->num_nvram; i++) {
 459                 nvmem_cfg[i].priv = pcf85363;
 460                 devm_rtc_nvmem_register(pcf85363->rtc, &nvmem_cfg[i]);
 461         }
 462
 463         return ret;
 464 }
 465
 466 static const __maybe_unused struct of_device_id dev_ids[] = {
 467         { .compatible = "nxp,pcf85263", .data = &pcf_85263_config },
 468         { .compatible = "nxp,pcf85363", .data = &pcf_85363_config },
 469         { /* sentinel */ }
 470 };
 471 MODULE_DEVICE_TABLE(of, dev_ids);
 472
 473 static struct i2c_driver pcf85363_driver = {
 474         .driver = {
 475                 .name   = "pcf85363",
 476                 .of_match_table = of_match_ptr(dev_ids),
 477         },
 478         .probe_new = pcf85363_probe,
 479 };
 480
 481 module_i2c_driver(pcf85363_driver);
 482
 483 MODULE_AUTHOR("Eric Nelson");
 484 MODULE_DESCRIPTION("pcf85263/pcf85363 I2C RTC driver");
 485 MODULE_LICENSE("GPL");